blob: 211e91e79eae02f8a52283d7c56ed7521c7c86ce [file] [log] [blame]
Liam Girdwooddd96dac2019-04-12 11:08:47 -05001// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2//
3// This file is provided under a dual BSD/GPLv2 license. When using or
4// redistributing this file, you may do so under either license.
5//
6// Copyright(c) 2018 Intel Corporation. All rights reserved.
7//
8// Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9// Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
10// Rander Wang <rander.wang@intel.com>
11// Keyon Jie <yang.jie@linux.intel.com>
12//
13
14/*
15 * Hardware interface for generic Intel audio DSP HDA IP
16 */
17
Liam Girdwooddd96dac2019-04-12 11:08:47 -050018#include <sound/hdaudio_ext.h>
Kai Vehmanenf1fd9d02019-06-12 11:57:03 -050019#include <sound/hda_register.h>
20
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -050021#include <linux/acpi.h>
Liam Girdwooddd96dac2019-04-12 11:08:47 -050022#include <linux/module.h>
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -050023#include <linux/soundwire/sdw.h>
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -050024#include <linux/soundwire/sdw_intel.h>
Pierre-Louis Bossart68b953a2019-08-12 11:06:23 -050025#include <sound/intel-nhlt.h>
Liam Girdwooddd96dac2019-04-12 11:08:47 -050026#include <sound/sof.h>
27#include <sound/sof/xtensa.h>
Pierre-Louis Bossartd2c383a2020-03-25 16:50:20 -050028#include "../sof-audio.h"
Liam Girdwooddd96dac2019-04-12 11:08:47 -050029#include "../ops.h"
30#include "hda.h"
Liam Girdwooddd96dac2019-04-12 11:08:47 -050031
32#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
33#include <sound/soc-acpi-intel-match.h>
34#endif
35
36/* platform specific devices */
37#include "shim.h"
38
Liam Girdwoodff2be862019-09-27 15:05:36 -050039#define EXCEPT_MAX_HDR_SIZE 0x400
40
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -050041#if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
42
Pierre-Louis Bossart02df8f42020-03-25 16:50:24 -050043/*
44 * The default for SoundWire clock stop quirks is to power gate the IP
45 * and do a Bus Reset, this will need to be modified when the DSP
46 * needs to remain in D0i3 so that the Master does not lose context
47 * and enumeration is not required on clock restart
48 */
49static int sdw_clock_stop_quirks = SDW_INTEL_CLK_STOP_BUS_RESET;
50module_param(sdw_clock_stop_quirks, int, 0444);
51MODULE_PARM_DESC(sdw_clock_stop_quirks, "SOF SoundWire clock stop quirks");
52
Pierre-Louis Bossartd2c383a2020-03-25 16:50:20 -050053static int sdw_params_stream(struct device *dev,
54 struct sdw_intel_stream_params_data *params_data)
55{
56 struct snd_sof_dev *sdev = dev_get_drvdata(dev);
57 struct snd_soc_dai *d = params_data->dai;
58 struct sof_ipc_dai_config config;
59 struct sof_ipc_reply reply;
60 int link_id = params_data->link_id;
61 int alh_stream_id = params_data->alh_stream_id;
62 int ret;
63 u32 size = sizeof(config);
64
65 memset(&config, 0, size);
66 config.hdr.size = size;
67 config.hdr.cmd = SOF_IPC_GLB_DAI_MSG | SOF_IPC_DAI_CONFIG;
68 config.type = SOF_DAI_INTEL_ALH;
69 config.dai_index = (link_id << 8) | (d->id);
70 config.alh.stream_id = alh_stream_id;
71
72 /* send message to DSP */
73 ret = sof_ipc_tx_message(sdev->ipc,
74 config.hdr.cmd, &config, size, &reply,
75 sizeof(reply));
76 if (ret < 0) {
77 dev_err(sdev->dev,
78 "error: failed to set DAI hw_params for link %d dai->id %d ALH %d\n",
79 link_id, d->id, alh_stream_id);
80 }
81
82 return ret;
83}
84
85static int sdw_free_stream(struct device *dev,
86 struct sdw_intel_stream_free_data *free_data)
87{
88 struct snd_sof_dev *sdev = dev_get_drvdata(dev);
89 struct snd_soc_dai *d = free_data->dai;
90 struct sof_ipc_dai_config config;
91 struct sof_ipc_reply reply;
92 int link_id = free_data->link_id;
93 int ret;
94 u32 size = sizeof(config);
95
96 memset(&config, 0, size);
97 config.hdr.size = size;
98 config.hdr.cmd = SOF_IPC_GLB_DAI_MSG | SOF_IPC_DAI_CONFIG;
99 config.type = SOF_DAI_INTEL_ALH;
100 config.dai_index = (link_id << 8) | d->id;
101 config.alh.stream_id = 0xFFFF; /* invalid value on purpose */
102
103 /* send message to DSP */
104 ret = sof_ipc_tx_message(sdev->ipc,
105 config.hdr.cmd, &config, size, &reply,
106 sizeof(reply));
107 if (ret < 0) {
108 dev_err(sdev->dev,
109 "error: failed to free stream for link %d dai->id %d\n",
110 link_id, d->id);
111 }
112
113 return ret;
114}
115
116static const struct sdw_intel_ops sdw_callback = {
117 .params_stream = sdw_params_stream,
118 .free_stream = sdw_free_stream,
119};
120
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500121void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable)
122{
123 sdw_intel_enable_irq(sdev->bar[HDA_DSP_BAR], enable);
124}
125
126static int hda_sdw_acpi_scan(struct snd_sof_dev *sdev)
127{
128 struct sof_intel_hda_dev *hdev;
129 acpi_handle handle;
130 int ret;
131
132 handle = ACPI_HANDLE(sdev->dev);
133
134 /* save ACPI info for the probe step */
135 hdev = sdev->pdata->hw_pdata;
136
137 ret = sdw_intel_acpi_scan(handle, &hdev->info);
138 if (ret < 0) {
139 dev_err(sdev->dev, "%s failed\n", __func__);
140 return -EINVAL;
141 }
142
143 return 0;
144}
145
146static int hda_sdw_probe(struct snd_sof_dev *sdev)
147{
148 struct sof_intel_hda_dev *hdev;
149 struct sdw_intel_res res;
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500150 void *sdw;
151
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500152 hdev = sdev->pdata->hw_pdata;
153
154 memset(&res, 0, sizeof(res));
155
156 res.mmio_base = sdev->bar[HDA_DSP_BAR];
157 res.irq = sdev->ipc_irq;
158 res.handle = hdev->info.handle;
159 res.parent = sdev->dev;
Pierre-Louis Bossartd2c383a2020-03-25 16:50:20 -0500160 res.ops = &sdw_callback;
161 res.dev = sdev->dev;
Pierre-Louis Bossart02df8f42020-03-25 16:50:24 -0500162 res.clock_stop_quirks = sdw_clock_stop_quirks;
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500163
164 /*
165 * ops and arg fields are not populated for now,
166 * they will be needed when the DAI callbacks are
167 * provided
168 */
169
170 /* we could filter links here if needed, e.g for quirks */
171 res.count = hdev->info.count;
172 res.link_mask = hdev->info.link_mask;
173
174 sdw = sdw_intel_probe(&res);
175 if (!sdw) {
176 dev_err(sdev->dev, "error: SoundWire probe failed\n");
177 return -EINVAL;
178 }
179
180 /* save context */
181 hdev->sdw = sdw;
182
183 return 0;
184}
185
186int hda_sdw_startup(struct snd_sof_dev *sdev)
187{
188 struct sof_intel_hda_dev *hdev;
189
190 hdev = sdev->pdata->hw_pdata;
191
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -0500192 if (!hdev->sdw)
193 return 0;
194
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500195 return sdw_intel_startup(hdev->sdw);
196}
197
198static int hda_sdw_exit(struct snd_sof_dev *sdev)
199{
200 struct sof_intel_hda_dev *hdev;
201
202 hdev = sdev->pdata->hw_pdata;
203
204 hda_sdw_int_enable(sdev, false);
205
206 if (hdev->sdw)
207 sdw_intel_exit(hdev->sdw);
208 hdev->sdw = NULL;
209
210 return 0;
211}
Bard Liao722ba5f2020-03-25 16:50:23 -0500212
213static bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev)
214{
215 struct sof_intel_hda_dev *hdev;
216 bool ret = false;
217 u32 irq_status;
218
219 hdev = sdev->pdata->hw_pdata;
220
221 if (!hdev->sdw)
222 return ret;
223
224 /* store status */
225 irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS2);
226
227 /* invalid message ? */
228 if (irq_status == 0xffffffff)
229 goto out;
230
231 /* SDW message ? */
232 if (irq_status & HDA_DSP_REG_ADSPIS2_SNDW)
233 ret = true;
234
235out:
236 return ret;
237}
238
239static irqreturn_t hda_dsp_sdw_thread(int irq, void *context)
240{
241 return sdw_intel_thread(irq, context);
242}
243
Rander Wang90de3282020-03-25 16:50:26 -0500244static bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev)
245{
246 struct sof_intel_hda_dev *hdev;
247
248 hdev = sdev->pdata->hw_pdata;
249 if (hdev->sdw &&
250 snd_sof_dsp_read(sdev, HDA_DSP_BAR,
251 HDA_DSP_REG_SNDW_WAKE_STS))
252 return true;
253
254 return false;
255}
256
Rander Wangbbd19cd2020-03-25 16:50:25 -0500257void hda_sdw_process_wakeen(struct snd_sof_dev *sdev)
258{
259 struct sof_intel_hda_dev *hdev;
260
261 hdev = sdev->pdata->hw_pdata;
262 if (!hdev->sdw)
263 return;
264
265 sdw_intel_process_wakeen_event(hdev->sdw);
266}
267
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500268#endif
269
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500270/*
271 * Debug
272 */
273
274struct hda_dsp_msg_code {
275 u32 code;
276 const char *msg;
277};
278
Guennadi Liakhovetski672ff5e2019-07-22 09:13:57 -0500279static bool hda_use_msi = IS_ENABLED(CONFIG_PCI);
280#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG)
281module_param_named(use_msi, hda_use_msi, bool, 0444);
282MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode");
283#endif
284
Pierre-Louis Bossart68b953a2019-08-12 11:06:23 -0500285#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
286static int hda_dmic_num = -1;
287module_param_named(dmic_num, hda_dmic_num, int, 0444);
288MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number");
Kai Vehmanen139c7fe2019-10-29 15:40:13 +0200289
Kai Vehmanen42c67752020-03-12 14:48:53 -0500290static bool hda_codec_use_common_hdmi = IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI);
Kai Vehmanen139c7fe2019-10-29 15:40:13 +0200291module_param_named(use_common_hdmi, hda_codec_use_common_hdmi, bool, 0444);
292MODULE_PARM_DESC(use_common_hdmi, "SOF HDA use common HDMI codec driver");
Pierre-Louis Bossart68b953a2019-08-12 11:06:23 -0500293#endif
294
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500295static const struct hda_dsp_msg_code hda_dsp_rom_msg[] = {
296 {HDA_DSP_ROM_FW_MANIFEST_LOADED, "status: manifest loaded"},
297 {HDA_DSP_ROM_FW_FW_LOADED, "status: fw loaded"},
298 {HDA_DSP_ROM_FW_ENTERED, "status: fw entered"},
299 {HDA_DSP_ROM_CSE_ERROR, "error: cse error"},
300 {HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"},
301 {HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"},
302 {HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"},
303 {HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"},
304 {HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"},
305 {HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"},
306 {HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"},
307 {HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"},
Colin Ian King07f80452019-05-01 11:23:08 +0100308 {HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"},
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500309 {HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"},
310 {HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"},
311 {HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"},
312 {HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"},
313 {HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"},
314 {HDA_DSP_ROM_NULL_FW_ENTRY, "error: null FW entry point"},
315};
316
317static void hda_dsp_get_status_skl(struct snd_sof_dev *sdev)
318{
319 u32 status;
320 int i;
321
322 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
323 HDA_ADSP_FW_STATUS_SKL);
324
325 for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) {
326 if (status == hda_dsp_rom_msg[i].code) {
327 dev_err(sdev->dev, "%s - code %8.8x\n",
328 hda_dsp_rom_msg[i].msg, status);
329 return;
330 }
331 }
332
333 /* not for us, must be generic sof message */
334 dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status);
335}
336
337static void hda_dsp_get_status(struct snd_sof_dev *sdev)
338{
339 u32 status;
340 int i;
341
342 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
343 HDA_DSP_SRAM_REG_ROM_STATUS);
344
345 for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) {
346 if (status == hda_dsp_rom_msg[i].code) {
347 dev_err(sdev->dev, "%s - code %8.8x\n",
348 hda_dsp_rom_msg[i].msg, status);
349 return;
350 }
351 }
352
353 /* not for us, must be generic sof message */
354 dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status);
355}
356
357static void hda_dsp_get_registers(struct snd_sof_dev *sdev,
358 struct sof_ipc_dsp_oops_xtensa *xoops,
359 struct sof_ipc_panic_info *panic_info,
360 u32 *stack, size_t stack_words)
361{
Kai Vehmanen14104eb2019-06-03 11:18:15 -0500362 u32 offset = sdev->dsp_oops_offset;
363
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500364 /* first read registers */
Kai Vehmanen14104eb2019-06-03 11:18:15 -0500365 sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops));
366
367 /* note: variable AR register array is not read */
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500368
369 /* then get panic info */
Liam Girdwoodff2be862019-09-27 15:05:36 -0500370 if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) {
371 dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n",
372 xoops->arch_hdr.totalsize);
373 return;
374 }
Kai Vehmanen14104eb2019-06-03 11:18:15 -0500375 offset += xoops->arch_hdr.totalsize;
376 sof_block_read(sdev, sdev->mmio_bar, offset,
377 panic_info, sizeof(*panic_info));
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500378
379 /* then get the stack */
Kai Vehmanen14104eb2019-06-03 11:18:15 -0500380 offset += sizeof(*panic_info);
381 sof_block_read(sdev, sdev->mmio_bar, offset, stack,
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500382 stack_words * sizeof(u32));
383}
384
385void hda_dsp_dump_skl(struct snd_sof_dev *sdev, u32 flags)
386{
387 struct sof_ipc_dsp_oops_xtensa xoops;
388 struct sof_ipc_panic_info panic_info;
389 u32 stack[HDA_DSP_STACK_DUMP_SIZE];
390 u32 status, panic;
391
392 /* try APL specific status message types first */
393 hda_dsp_get_status_skl(sdev);
394
395 /* now try generic SOF status messages */
396 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
397 HDA_ADSP_ERROR_CODE_SKL);
398
399 /*TODO: Check: there is no define in spec, but it is used in the code*/
400 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
401 HDA_ADSP_ERROR_CODE_SKL + 0x4);
402
Ranjani Sridharan6ca5cec2019-12-17 18:26:09 -0600403 if (sdev->fw_state == SOF_FW_BOOT_COMPLETE) {
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500404 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack,
405 HDA_DSP_STACK_DUMP_SIZE);
406 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info,
407 stack, HDA_DSP_STACK_DUMP_SIZE);
408 } else {
409 dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n",
410 status, panic);
411 hda_dsp_get_status_skl(sdev);
412 }
413}
414
415void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags)
416{
417 struct sof_ipc_dsp_oops_xtensa xoops;
418 struct sof_ipc_panic_info panic_info;
419 u32 stack[HDA_DSP_STACK_DUMP_SIZE];
420 u32 status, panic;
421
422 /* try APL specific status message types first */
423 hda_dsp_get_status(sdev);
424
425 /* now try generic SOF status messages */
426 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
427 HDA_DSP_SRAM_REG_FW_STATUS);
428 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP);
429
Ranjani Sridharan6ca5cec2019-12-17 18:26:09 -0600430 if (sdev->fw_state == SOF_FW_BOOT_COMPLETE) {
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500431 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack,
432 HDA_DSP_STACK_DUMP_SIZE);
433 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info,
434 stack, HDA_DSP_STACK_DUMP_SIZE);
435 } else {
436 dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n",
437 status, panic);
438 hda_dsp_get_status(sdev);
439 }
440}
441
Kai Vehmanenf1fd9d02019-06-12 11:57:03 -0500442void hda_ipc_irq_dump(struct snd_sof_dev *sdev)
443{
444 struct hdac_bus *bus = sof_to_bus(sdev);
445 u32 adspis;
446 u32 intsts;
447 u32 intctl;
448 u32 ppsts;
449 u8 rirbsts;
450
451 /* read key IRQ stats and config registers */
452 adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS);
453 intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS);
454 intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL);
455 ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS);
456 rirbsts = snd_hdac_chip_readb(bus, RIRBSTS);
457
458 dev_err(sdev->dev,
459 "error: hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n",
460 intsts, intctl, rirbsts);
461 dev_err(sdev->dev,
462 "error: dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n",
463 ppsts, adspis);
464}
465
Pan Xiulif3da49f2019-04-30 18:09:33 -0500466void hda_ipc_dump(struct snd_sof_dev *sdev)
467{
468 u32 hipcie;
469 u32 hipct;
470 u32 hipcctl;
471
Kai Vehmanenf1fd9d02019-06-12 11:57:03 -0500472 hda_ipc_irq_dump(sdev);
473
Pan Xiulif3da49f2019-04-30 18:09:33 -0500474 /* read IPC status */
475 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE);
476 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT);
477 hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL);
478
479 /* dump the IPC regs */
480 /* TODO: parse the raw msg */
481 dev_err(sdev->dev,
482 "error: host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n",
483 hipcie, hipct, hipcctl);
484}
485
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500486static int hda_init(struct snd_sof_dev *sdev)
487{
488 struct hda_bus *hbus;
489 struct hdac_bus *bus;
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500490 struct pci_dev *pci = to_pci_dev(sdev->dev);
491 int ret;
492
493 hbus = sof_to_hbus(sdev);
494 bus = sof_to_bus(sdev);
495
496 /* HDA bus init */
Takashi Iwaid4ff1b32019-08-07 20:50:50 +0200497 sof_hda_bus_init(bus, &pci->dev);
Bard Liao64ca9d92019-05-27 00:58:36 +0800498
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500499 bus->use_posbuf = 1;
500 bus->bdl_pos_adj = 0;
Kai Vehmanenf3416e72019-10-08 11:44:35 -0500501 bus->sync_write = 1;
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500502
503 mutex_init(&hbus->prepare_mutex);
504 hbus->pci = pci;
505 hbus->mixer_assigned = -1;
506 hbus->modelname = "sofbus";
507
508 /* initialise hdac bus */
509 bus->addr = pci_resource_start(pci, 0);
YueHaibingad169f92019-05-31 22:25:26 +0800510#if IS_ENABLED(CONFIG_PCI)
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500511 bus->remap_addr = pci_ioremap_bar(pci, 0);
YueHaibingad169f92019-05-31 22:25:26 +0800512#endif
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500513 if (!bus->remap_addr) {
514 dev_err(bus->dev, "error: ioremap error\n");
515 return -ENXIO;
516 }
517
518 /* HDA base */
519 sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr;
520
Kai Vehmanenaf7aae12020-02-06 22:02:23 +0200521 /* init i915 and HDMI codecs */
522 ret = hda_codec_i915_init(sdev);
Kai Vehmanen71cc8ab2020-02-20 19:10:28 +0200523 if (ret < 0)
524 dev_warn(sdev->dev, "init of i915 and HDMI codec failed\n");
Kai Vehmanenaf7aae12020-02-06 22:02:23 +0200525
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500526 /* get controller capabilities */
527 ret = hda_dsp_ctrl_get_caps(sdev);
528 if (ret < 0)
529 dev_err(sdev->dev, "error: get caps error\n");
530
531 return ret;
532}
533
534#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
535
Pierre-Louis Bossart68b953a2019-08-12 11:06:23 -0500536static int check_nhlt_dmic(struct snd_sof_dev *sdev)
537{
538 struct nhlt_acpi_table *nhlt;
539 int dmic_num;
540
541 nhlt = intel_nhlt_init(sdev->dev);
542 if (nhlt) {
543 dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt);
544 intel_nhlt_free(nhlt);
545 if (dmic_num == 2 || dmic_num == 4)
546 return dmic_num;
547 }
548
549 return 0;
550}
551
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500552static const char *fixup_tplg_name(struct snd_sof_dev *sdev,
Pierre-Louis Bossart68b953a2019-08-12 11:06:23 -0500553 const char *sof_tplg_filename,
554 const char *idisp_str,
555 const char *dmic_str)
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500556{
557 const char *tplg_filename = NULL;
558 char *filename;
559 char *split_ext;
560
561 filename = devm_kstrdup(sdev->dev, sof_tplg_filename, GFP_KERNEL);
562 if (!filename)
563 return NULL;
564
565 /* this assumes a .tplg extension */
566 split_ext = strsep(&filename, ".");
567 if (split_ext) {
568 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL,
Pierre-Louis Bossart68b953a2019-08-12 11:06:23 -0500569 "%s%s%s.tplg",
570 split_ext, idisp_str, dmic_str);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500571 if (!tplg_filename)
572 return NULL;
573 }
574 return tplg_filename;
575}
576
Zhu Yingjiangbe1b5772019-05-24 14:09:24 -0500577#endif
578
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500579static int hda_init_caps(struct snd_sof_dev *sdev)
580{
581 struct hdac_bus *bus = sof_to_bus(sdev);
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500582 struct snd_sof_pdata *pdata = sdev->pdata;
Zhu Yingjiangbe1b5772019-05-24 14:09:24 -0500583#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500584 struct hdac_ext_link *hlink;
Zhu Yingjiangbe1b5772019-05-24 14:09:24 -0500585#endif
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500586 struct sof_intel_hda_dev *hdev = pdata->hw_pdata;
587 u32 link_mask;
Zhu Yingjiangbe1b5772019-05-24 14:09:24 -0500588 int ret = 0;
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500589
590 device_disable_async_suspend(bus->dev);
591
592 /* check if dsp is there */
593 if (bus->ppcap)
594 dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n");
595
Ranjani Sridharancc352732019-08-06 15:19:58 -0700596 /* Init HDA controller after i915 init */
Zhu Yingjiangbe1b5772019-05-24 14:09:24 -0500597 ret = hda_dsp_ctrl_init_chip(sdev, true);
598 if (ret < 0) {
599 dev_err(bus->dev, "error: init chip failed with ret: %d\n",
600 ret);
601 return ret;
602 }
603
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500604 /* scan SoundWire capabilities exposed by DSDT */
605 ret = hda_sdw_acpi_scan(sdev);
606 if (ret < 0) {
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -0500607 dev_dbg(sdev->dev, "skipping SoundWire, ACPI scan error\n");
608 goto skip_soundwire;
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500609 }
610
611 link_mask = hdev->info.link_mask;
612 if (!link_mask) {
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -0500613 dev_dbg(sdev->dev, "skipping SoundWire, no links enabled\n");
614 goto skip_soundwire;
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500615 }
616
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -0500617 /*
618 * probe/allocate SoundWire resources.
619 * The hardware configuration takes place in hda_sdw_startup
620 * after power rails are enabled.
621 * It's entirely possible to have a mix of I2S/DMIC/SoundWire
622 * devices, so we allocate the resources in all cases.
623 */
624 ret = hda_sdw_probe(sdev);
625 if (ret < 0) {
626 dev_err(sdev->dev, "error: SoundWire probe error\n");
627 return ret;
628 }
629
630skip_soundwire:
631
Zhu Yingjiangbe1b5772019-05-24 14:09:24 -0500632#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500633 if (bus->mlcap)
634 snd_hdac_ext_bus_get_ml_capabilities(bus);
635
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500636 /* create codec instances */
Ranjani Sridharan80acdd42019-12-04 15:15:52 -0600637 hda_codec_probe_bus(sdev, hda_codec_use_common_hdmi);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500638
Kai Vehmanen0c754192020-01-20 18:01:16 +0200639 if (!HDA_IDISP_CODEC(bus->codec_mask))
Kai Vehmanen71cc8ab2020-02-20 19:10:28 +0200640 hda_codec_i915_display_power(sdev, false);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500641
642 /*
643 * we are done probing so decrement link counts
644 */
645 list_for_each_entry(hlink, &bus->hlink_list, list)
646 snd_hdac_ext_bus_link_put(bus, hlink);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500647#endif
Zhu Yingjiangbe1b5772019-05-24 14:09:24 -0500648 return 0;
649}
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500650
651static const struct sof_intel_dsp_desc
652 *get_chip_info(struct snd_sof_pdata *pdata)
653{
654 const struct sof_dev_desc *desc = pdata->desc;
655 const struct sof_intel_dsp_desc *chip_info;
656
657 chip_info = desc->chip_info;
658
659 return chip_info;
660}
661
Bard Liao7c11af92019-12-04 15:28:59 -0600662static irqreturn_t hda_dsp_interrupt_handler(int irq, void *context)
663{
664 struct snd_sof_dev *sdev = context;
665
666 /*
667 * Get global interrupt status. It includes all hardware interrupt
668 * sources in the Intel HD Audio controller.
669 */
670 if (snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS) &
671 SOF_HDA_INTSTS_GIS) {
672
673 /* disable GIE interrupt */
674 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
675 SOF_HDA_INTCTL,
676 SOF_HDA_INT_GLOBAL_EN,
677 0);
678
679 return IRQ_WAKE_THREAD;
680 }
681
682 return IRQ_NONE;
683}
684
685static irqreturn_t hda_dsp_interrupt_thread(int irq, void *context)
686{
687 struct snd_sof_dev *sdev = context;
Bard Liao722ba5f2020-03-25 16:50:23 -0500688 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;
Bard Liao7c11af92019-12-04 15:28:59 -0600689
690 /* deal with streams and controller first */
691 if (hda_dsp_check_stream_irq(sdev))
692 hda_dsp_stream_threaded_handler(irq, sdev);
693
694 if (hda_dsp_check_ipc_irq(sdev))
695 sof_ops(sdev)->irq_thread(irq, sdev);
696
Bard Liao722ba5f2020-03-25 16:50:23 -0500697 if (hda_dsp_check_sdw_irq(sdev))
698 hda_dsp_sdw_thread(irq, hdev->sdw);
699
Rander Wang90de3282020-03-25 16:50:26 -0500700 if (hda_sdw_check_wakeen_irq(sdev))
701 hda_sdw_process_wakeen(sdev);
702
Bard Liao7c11af92019-12-04 15:28:59 -0600703 /* enable GIE interrupt */
704 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
705 SOF_HDA_INTCTL,
706 SOF_HDA_INT_GLOBAL_EN,
707 SOF_HDA_INT_GLOBAL_EN);
708
709 return IRQ_HANDLED;
710}
711
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500712int hda_dsp_probe(struct snd_sof_dev *sdev)
713{
714 struct pci_dev *pci = to_pci_dev(sdev->dev);
715 struct sof_intel_hda_dev *hdev;
716 struct hdac_bus *bus;
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500717 const struct sof_intel_dsp_desc *chip;
Zhu Yingjiangbe1b5772019-05-24 14:09:24 -0500718 int ret = 0;
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500719
720 /*
721 * detect DSP by checking class/subclass/prog-id information
722 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required
723 * class=04 subclass 01 prog-if 00: DSP is present
724 * (and may be required e.g. for DMIC or SSP support)
725 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works
726 */
727 if (pci->class == 0x040300) {
728 dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n");
729 return -ENODEV;
730 } else if (pci->class != 0x040100 && pci->class != 0x040380) {
731 dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class);
732 return -ENODEV;
733 }
734 dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class);
735
736 chip = get_chip_info(sdev->pdata);
737 if (!chip) {
738 dev_err(sdev->dev, "error: no such device supported, chip id:%x\n",
739 pci->device);
740 ret = -EIO;
741 goto err;
742 }
743
744 hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL);
745 if (!hdev)
746 return -ENOMEM;
747 sdev->pdata->hw_pdata = hdev;
748 hdev->desc = chip;
749
750 hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec",
751 PLATFORM_DEVID_NONE,
752 NULL, 0);
753 if (IS_ERR(hdev->dmic_dev)) {
754 dev_err(sdev->dev, "error: failed to create DMIC device\n");
755 return PTR_ERR(hdev->dmic_dev);
756 }
757
758 /*
759 * use position update IPC if either it is forced
760 * or we don't have other choice
761 */
762#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION)
763 hdev->no_ipc_position = 0;
764#else
765 hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0;
766#endif
767
768 /* set up HDA base */
769 bus = sof_to_bus(sdev);
770 ret = hda_init(sdev);
771 if (ret < 0)
772 goto hdac_bus_unmap;
773
774 /* DSP base */
YueHaibingad169f92019-05-31 22:25:26 +0800775#if IS_ENABLED(CONFIG_PCI)
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500776 sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR);
YueHaibingad169f92019-05-31 22:25:26 +0800777#endif
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500778 if (!sdev->bar[HDA_DSP_BAR]) {
779 dev_err(sdev->dev, "error: ioremap error\n");
780 ret = -ENXIO;
781 goto hdac_bus_unmap;
782 }
783
784 sdev->mmio_bar = HDA_DSP_BAR;
785 sdev->mailbox_bar = HDA_DSP_BAR;
786
787 /* allow 64bit DMA address if supported by H/W */
788 if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(64))) {
789 dev_dbg(sdev->dev, "DMA mask is 64 bit\n");
790 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(64));
791 } else {
792 dev_dbg(sdev->dev, "DMA mask is 32 bit\n");
793 dma_set_mask(&pci->dev, DMA_BIT_MASK(32));
794 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32));
795 }
796
797 /* init streams */
798 ret = hda_dsp_stream_init(sdev);
799 if (ret < 0) {
800 dev_err(sdev->dev, "error: failed to init streams\n");
801 /*
802 * not all errors are due to memory issues, but trying
803 * to free everything does not harm
804 */
805 goto free_streams;
806 }
807
808 /*
809 * register our IRQ
810 * let's try to enable msi firstly
811 * if it fails, use legacy interrupt mode
Guennadi Liakhovetski672ff5e2019-07-22 09:13:57 -0500812 * TODO: support msi multiple vectors
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500813 */
Pierre-Louis Bossartbb67dd12019-08-06 12:06:03 -0500814 if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) {
Guennadi Liakhovetski672ff5e2019-07-22 09:13:57 -0500815 dev_info(sdev->dev, "use msi interrupt mode\n");
Bard Liao7c11af92019-12-04 15:28:59 -0600816 sdev->ipc_irq = pci_irq_vector(pci, 0);
Guennadi Liakhovetski672ff5e2019-07-22 09:13:57 -0500817 /* initialised to "false" by kzalloc() */
818 sdev->msi_enabled = true;
819 }
820
821 if (!sdev->msi_enabled) {
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500822 dev_info(sdev->dev, "use legacy interrupt mode\n");
823 /*
824 * in IO-APIC mode, hda->irq and ipc_irq are using the same
825 * irq number of pci->irq
826 */
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500827 sdev->ipc_irq = pci->irq;
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500828 }
829
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500830 dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq);
Bard Liao7c11af92019-12-04 15:28:59 -0600831 ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_interrupt_handler,
832 hda_dsp_interrupt_thread,
833 IRQF_SHARED, "AudioDSP", sdev);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500834 if (ret < 0) {
835 dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n",
836 sdev->ipc_irq);
Bard Liao7c11af92019-12-04 15:28:59 -0600837 goto free_irq_vector;
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500838 }
839
840 pci_set_master(pci);
841 synchronize_irq(pci->irq);
842
843 /*
844 * clear TCSEL to clear playback on some HD Audio
845 * codecs. PCI TCSEL is defined in the Intel manuals.
846 */
847 snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0);
848
849 /* init HDA capabilities */
850 ret = hda_init_caps(sdev);
851 if (ret < 0)
852 goto free_ipc_irq;
853
Zhu Yingjiang1f5253b2019-05-22 11:21:40 -0500854 /* enable ppcap interrupt */
855 hda_dsp_ctrl_ppcap_enable(sdev, true);
856 hda_dsp_ctrl_ppcap_int_enable(sdev, true);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500857
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500858 /* set default mailbox offset for FW ready message */
859 sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET;
860
Ranjani Sridharan63e51fd32020-01-29 16:07:25 -0600861 INIT_DELAYED_WORK(&hdev->d0i3_work, hda_dsp_d0i3_work);
862
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500863 return 0;
864
865free_ipc_irq:
866 free_irq(sdev->ipc_irq, sdev);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500867free_irq_vector:
868 if (sdev->msi_enabled)
869 pci_free_irq_vectors(pci);
870free_streams:
871 hda_dsp_stream_free(sdev);
872/* dsp_unmap: not currently used */
873 iounmap(sdev->bar[HDA_DSP_BAR]);
874hdac_bus_unmap:
875 iounmap(bus->remap_addr);
Kai Vehmanenaf7aae12020-02-06 22:02:23 +0200876 hda_codec_i915_exit(sdev);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500877err:
878 return ret;
879}
880
881int hda_dsp_remove(struct snd_sof_dev *sdev)
882{
883 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
884 struct hdac_bus *bus = sof_to_bus(sdev);
885 struct pci_dev *pci = to_pci_dev(sdev->dev);
886 const struct sof_intel_dsp_desc *chip = hda->desc;
887
Ranjani Sridharan63e51fd32020-01-29 16:07:25 -0600888 /* cancel any attempt for DSP D0I3 */
889 cancel_delayed_work_sync(&hda->d0i3_work);
890
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500891#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
892 /* codec removal, invoke bus_device_remove */
893 snd_hdac_ext_bus_device_remove(bus);
894#endif
895
Pierre-Louis Bossart51dfed12020-03-25 16:50:18 -0500896 hda_sdw_exit(sdev);
897
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500898 if (!IS_ERR_OR_NULL(hda->dmic_dev))
899 platform_device_unregister(hda->dmic_dev);
900
901 /* disable DSP IRQ */
902 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
903 SOF_HDA_PPCTL_PIE, 0);
904
905 /* disable CIE and GIE interrupts */
906 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,
907 SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0);
908
909 /* disable cores */
910 if (chip)
911 hda_dsp_core_reset_power_down(sdev, chip->cores_mask);
912
913 /* disable DSP */
914 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
915 SOF_HDA_PPCTL_GPROCEN, 0);
916
917 free_irq(sdev->ipc_irq, sdev);
Liam Girdwooddd96dac2019-04-12 11:08:47 -0500918 if (sdev->msi_enabled)
919 pci_free_irq_vectors(pci);
920
921 hda_dsp_stream_free(sdev);
922#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
923 snd_hdac_link_free_all(bus);
924#endif
925
926 iounmap(sdev->bar[HDA_DSP_BAR]);
927 iounmap(bus->remap_addr);
928
929#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
930 snd_hdac_ext_bus_exit(bus);
931#endif
932 hda_codec_i915_exit(sdev);
933
934 return 0;
935}
936
Daniel Baluta285880a2019-12-04 15:15:53 -0600937#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
938static int hda_generic_machine_select(struct snd_sof_dev *sdev)
939{
940 struct hdac_bus *bus = sof_to_bus(sdev);
941 struct snd_soc_acpi_mach_params *mach_params;
942 struct snd_soc_acpi_mach *hda_mach;
943 struct snd_sof_pdata *pdata = sdev->pdata;
944 const char *tplg_filename;
945 const char *idisp_str;
946 const char *dmic_str;
947 int dmic_num = 0;
948 int codec_num = 0;
949 int i;
950
951 /* codec detection */
952 if (!bus->codec_mask) {
953 dev_info(bus->dev, "no hda codecs found!\n");
954 } else {
955 dev_info(bus->dev, "hda codecs found, mask %lx\n",
956 bus->codec_mask);
957
958 for (i = 0; i < HDA_MAX_CODECS; i++) {
959 if (bus->codec_mask & (1 << i))
960 codec_num++;
961 }
962
963 /*
964 * If no machine driver is found, then:
965 *
Kai Vehmanen71cc8ab2020-02-20 19:10:28 +0200966 * generic hda machine driver can handle:
967 * - one HDMI codec, and/or
968 * - one external HDAudio codec
Daniel Baluta285880a2019-12-04 15:15:53 -0600969 */
Kai Vehmanen71cc8ab2020-02-20 19:10:28 +0200970 if (!pdata->machine && codec_num <= 2) {
Daniel Baluta285880a2019-12-04 15:15:53 -0600971 hda_mach = snd_soc_acpi_intel_hda_machines;
972
973 /* topology: use the info from hda_machines */
974 pdata->tplg_filename =
975 hda_mach->sof_tplg_filename;
976
977 dev_info(bus->dev, "using HDA machine driver %s now\n",
978 hda_mach->drv_name);
979
Kai Vehmanen71cc8ab2020-02-20 19:10:28 +0200980 if (codec_num == 1 && HDA_IDISP_CODEC(bus->codec_mask))
Daniel Baluta285880a2019-12-04 15:15:53 -0600981 idisp_str = "-idisp";
982 else
983 idisp_str = "";
984
985 /* first check NHLT for DMICs */
986 dmic_num = check_nhlt_dmic(sdev);
987
988 /* allow for module parameter override */
989 if (hda_dmic_num != -1)
990 dmic_num = hda_dmic_num;
991
992 switch (dmic_num) {
993 case 2:
994 dmic_str = "-2ch";
995 break;
996 case 4:
997 dmic_str = "-4ch";
998 break;
999 default:
1000 dmic_num = 0;
1001 dmic_str = "";
1002 break;
1003 }
1004
1005 tplg_filename = pdata->tplg_filename;
1006 tplg_filename = fixup_tplg_name(sdev, tplg_filename,
1007 idisp_str, dmic_str);
1008 if (!tplg_filename)
1009 return -EINVAL;
1010
1011 pdata->machine = hda_mach;
1012 pdata->tplg_filename = tplg_filename;
1013 }
1014 }
1015
1016 /* used by hda machine driver to create dai links */
1017 if (pdata->machine) {
1018 mach_params = (struct snd_soc_acpi_mach_params *)
1019 &pdata->machine->mach_params;
1020 mach_params->codec_mask = bus->codec_mask;
1021 mach_params->common_hdmi_codec_drv = hda_codec_use_common_hdmi;
1022 mach_params->dmic_num = dmic_num;
1023 }
1024
1025 return 0;
1026}
1027#else
1028static int hda_generic_machine_select(struct snd_sof_dev *sdev)
1029{
1030 return 0;
1031}
1032#endif
1033
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -05001034#if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
1035/* Check if all Slaves defined on the link can be found */
1036static bool link_slaves_found(struct snd_sof_dev *sdev,
1037 const struct snd_soc_acpi_link_adr *link,
1038 struct sdw_intel_ctx *sdw)
1039{
1040 struct hdac_bus *bus = sof_to_bus(sdev);
1041 struct sdw_intel_slave_id *ids = sdw->ids;
1042 int num_slaves = sdw->num_slaves;
1043 unsigned int part_id, link_id, unique_id, mfg_id;
1044 int i, j;
1045
1046 for (i = 0; i < link->num_adr; i++) {
1047 u64 adr = link->adr_d[i].adr;
1048
1049 mfg_id = SDW_MFG_ID(adr);
1050 part_id = SDW_PART_ID(adr);
1051 link_id = SDW_DISCO_LINK_ID(adr);
1052 for (j = 0; j < num_slaves; j++) {
1053 if (ids[j].link_id != link_id ||
1054 ids[j].id.part_id != part_id ||
1055 ids[j].id.mfg_id != mfg_id)
1056 continue;
1057 /*
1058 * we have to check unique id
1059 * if there is more than one
1060 * Slave on the link
1061 */
1062 unique_id = SDW_UNIQUE_ID(adr);
1063 if (link->num_adr == 1 ||
1064 ids[j].id.unique_id == SDW_IGNORED_UNIQUE_ID ||
1065 ids[j].id.unique_id == unique_id) {
1066 dev_dbg(bus->dev,
1067 "found %x at link %d\n",
1068 part_id, link_id);
1069 break;
1070 }
1071 }
1072 if (j == num_slaves) {
1073 dev_dbg(bus->dev,
1074 "Slave %x not found\n",
1075 part_id);
1076 return false;
1077 }
1078 }
1079 return true;
1080}
1081
1082static int hda_sdw_machine_select(struct snd_sof_dev *sdev)
1083{
1084 struct snd_sof_pdata *pdata = sdev->pdata;
1085 const struct snd_soc_acpi_link_adr *link;
1086 struct hdac_bus *bus = sof_to_bus(sdev);
1087 struct snd_soc_acpi_mach *mach;
1088 struct sof_intel_hda_dev *hdev;
1089 u32 link_mask;
1090 int i;
1091
1092 hdev = pdata->hw_pdata;
1093 link_mask = hdev->info.link_mask;
1094
1095 /*
1096 * Select SoundWire machine driver if needed using the
1097 * alternate tables. This case deals with SoundWire-only
1098 * machines, for mixed cases with I2C/I2S the detection relies
1099 * on the HID list.
1100 */
1101 if (link_mask && !pdata->machine) {
1102 for (mach = pdata->desc->alt_machines;
1103 mach && mach->link_mask; mach++) {
1104 if (mach->link_mask != link_mask)
1105 continue;
1106
1107 /* No need to match adr if there is no links defined */
1108 if (!mach->links)
1109 break;
1110
1111 link = mach->links;
1112 for (i = 0; i < hdev->info.count && link->num_adr;
1113 i++, link++) {
1114 /*
1115 * Try next machine if any expected Slaves
1116 * are not found on this link.
1117 */
1118 if (!link_slaves_found(sdev, link, hdev->sdw))
1119 break;
1120 }
1121 /* Found if all Slaves are checked */
1122 if (i == hdev->info.count || !link->num_adr)
1123 break;
1124 }
1125 if (mach && mach->link_mask) {
1126 dev_dbg(bus->dev,
1127 "SoundWire machine driver %s topology %s\n",
1128 mach->drv_name,
1129 mach->sof_tplg_filename);
1130 pdata->machine = mach;
1131 mach->mach_params.links = mach->links;
1132 mach->mach_params.link_mask = mach->link_mask;
1133 mach->mach_params.platform = dev_name(sdev->dev);
1134 pdata->fw_filename = mach->sof_fw_filename;
1135 pdata->tplg_filename = mach->sof_tplg_filename;
1136 } else {
1137 dev_info(sdev->dev,
1138 "No SoundWire machine driver found\n");
1139 }
1140 }
1141
1142 return 0;
1143}
1144#else
1145static int hda_sdw_machine_select(struct snd_sof_dev *sdev)
1146{
1147 return 0;
1148}
1149#endif
1150
Daniel Baluta285880a2019-12-04 15:15:53 -06001151void hda_set_mach_params(const struct snd_soc_acpi_mach *mach,
1152 struct device *dev)
1153{
1154 struct snd_soc_acpi_mach_params *mach_params;
1155
1156 mach_params = (struct snd_soc_acpi_mach_params *)&mach->mach_params;
1157 mach_params->platform = dev_name(dev);
1158}
1159
1160void hda_machine_select(struct snd_sof_dev *sdev)
1161{
1162 struct snd_sof_pdata *sof_pdata = sdev->pdata;
1163 const struct sof_dev_desc *desc = sof_pdata->desc;
1164 struct snd_soc_acpi_mach *mach;
1165
1166 mach = snd_soc_acpi_find_machine(desc->machines);
1167 if (mach) {
1168 sof_pdata->tplg_filename = mach->sof_tplg_filename;
1169 sof_pdata->machine = mach;
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -05001170
1171 if (mach->link_mask) {
1172 mach->mach_params.links = mach->links;
1173 mach->mach_params.link_mask = mach->link_mask;
1174 }
Daniel Baluta285880a2019-12-04 15:15:53 -06001175 }
1176
1177 /*
Pierre-Louis Bossartb9ddd812020-03-25 16:50:21 -05001178 * If I2S fails, try SoundWire
1179 */
1180 hda_sdw_machine_select(sdev);
1181
1182 /*
Daniel Baluta285880a2019-12-04 15:15:53 -06001183 * Choose HDA generic machine driver if mach is NULL.
1184 * Otherwise, set certain mach params.
1185 */
1186 hda_generic_machine_select(sdev);
1187
1188 if (!sof_pdata->machine)
1189 dev_warn(sdev->dev, "warning: No matching ASoC machine driver found\n");
1190}
1191
Liam Girdwooddd96dac2019-04-12 11:08:47 -05001192MODULE_LICENSE("Dual BSD/GPL");
Pierre-Louis Bossart5bd216c2019-12-17 14:22:29 -06001193MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC);
1194MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC_I915);
Pierre-Louis Bossart068ac0d2019-12-17 14:22:31 -06001195MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA);