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Catalin Marinas1d18c472012-03-05 11:49:27 +00001/*
2 * Based on arch/arm/mm/fault.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Copyright (C) 1995-2004 Russell King
6 * Copyright (C) 2012 ARM Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
Paul Gortmaker0edfa832016-09-19 17:38:55 -040021#include <linux/extable.h>
Catalin Marinas1d18c472012-03-05 11:49:27 +000022#include <linux/signal.h>
23#include <linux/mm.h>
24#include <linux/hardirq.h>
25#include <linux/init.h>
26#include <linux/kprobes.h>
27#include <linux/uaccess.h>
28#include <linux/page-flags.h>
Ingo Molnar3f07c012017-02-08 18:51:30 +010029#include <linux/sched/signal.h>
Ingo Molnarb17b0152017-02-08 18:51:35 +010030#include <linux/sched/debug.h>
Catalin Marinas1d18c472012-03-05 11:49:27 +000031#include <linux/highmem.h>
32#include <linux/perf_event.h>
James Morse7209c862016-10-18 11:27:47 +010033#include <linux/preempt.h>
Jonathan (Zhixiong) Zhange7c600f2017-06-08 18:25:27 +010034#include <linux/hugetlb.h>
Catalin Marinas1d18c472012-03-05 11:49:27 +000035
James Morse7209c862016-10-18 11:27:47 +010036#include <asm/bug.h>
Catalin Marinas3bbf7152017-06-26 14:27:36 +010037#include <asm/cmpxchg.h>
James Morse338d4f42015-07-22 19:05:54 +010038#include <asm/cpufeature.h>
Catalin Marinas1d18c472012-03-05 11:49:27 +000039#include <asm/exception.h>
40#include <asm/debug-monitors.h>
Catalin Marinas91413002014-04-06 23:04:12 +010041#include <asm/esr.h>
James Morse338d4f42015-07-22 19:05:54 +010042#include <asm/sysreg.h>
Catalin Marinas1d18c472012-03-05 11:49:27 +000043#include <asm/system_misc.h>
44#include <asm/pgtable.h>
45#include <asm/tlbflush.h>
46
Tyler Baicar7edda082017-06-21 12:17:09 -060047#include <acpi/ghes.h>
48
Victor Kamensky09a6adf2017-04-03 22:51:01 -070049struct fault_info {
50 int (*fn)(unsigned long addr, unsigned int esr,
51 struct pt_regs *regs);
52 int sig;
53 int code;
54 const char *name;
55};
56
57static const struct fault_info fault_info[];
58
59static inline const struct fault_info *esr_to_fault_info(unsigned int esr)
60{
61 return fault_info + (esr & 63);
62}
Catalin Marinas3495386b2012-10-24 16:34:02 +010063
Sandeepa Prabhu2dd0e8d2016-07-08 12:35:48 -040064#ifdef CONFIG_KPROBES
65static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
66{
67 int ret = 0;
68
69 /* kprobe_running() needs smp_processor_id() */
70 if (!user_mode(regs)) {
71 preempt_disable();
72 if (kprobe_running() && kprobe_fault_handler(regs, esr))
73 ret = 1;
74 preempt_enable();
75 }
76
77 return ret;
78}
79#else
80static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
81{
82 return 0;
83}
84#endif
85
Julien Thierry1f9b8932017-08-04 09:31:42 +010086static void data_abort_decode(unsigned int esr)
87{
88 pr_alert("Data abort info:\n");
89
90 if (esr & ESR_ELx_ISV) {
91 pr_alert(" Access size = %u byte(s)\n",
92 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT));
93 pr_alert(" SSE = %lu, SRT = %lu\n",
94 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT,
95 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT);
96 pr_alert(" SF = %lu, AR = %lu\n",
97 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT,
98 (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT);
99 } else {
Mark Rutland0a6de8b2017-10-02 12:42:00 +0100100 pr_alert(" ISV = 0, ISS = 0x%08lx\n", esr & ESR_ELx_ISS_MASK);
Julien Thierry1f9b8932017-08-04 09:31:42 +0100101 }
102
103 pr_alert(" CM = %lu, WnR = %lu\n",
104 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT,
105 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT);
106}
107
Julien Thierry1f9b8932017-08-04 09:31:42 +0100108static void mem_abort_decode(unsigned int esr)
109{
110 pr_alert("Mem abort info:\n");
111
Mark Rutland42dbf542017-10-19 11:19:55 +0100112 pr_alert(" ESR = 0x%08x\n", esr);
Julien Thierry1f9b8932017-08-04 09:31:42 +0100113 pr_alert(" Exception class = %s, IL = %u bits\n",
114 esr_get_class_string(esr),
115 (esr & ESR_ELx_IL) ? 32 : 16);
116 pr_alert(" SET = %lu, FnV = %lu\n",
117 (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT,
118 (esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT);
119 pr_alert(" EA = %lu, S1PTW = %lu\n",
120 (esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT,
121 (esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT);
122
123 if (esr_is_data_abort(esr))
124 data_abort_decode(esr);
125}
126
Catalin Marinas1d18c472012-03-05 11:49:27 +0000127/*
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100128 * Dump out the page tables associated with 'addr' in the currently active mm.
Catalin Marinas1d18c472012-03-05 11:49:27 +0000129 */
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100130void show_pte(unsigned long addr)
Catalin Marinas1d18c472012-03-05 11:49:27 +0000131{
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100132 struct mm_struct *mm;
Catalin Marinas1d18c472012-03-05 11:49:27 +0000133 pgd_t *pgd;
134
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100135 if (addr < TASK_SIZE) {
136 /* TTBR0 */
137 mm = current->active_mm;
138 if (mm == &init_mm) {
139 pr_alert("[%016lx] user address but active_mm is swapper\n",
140 addr);
141 return;
142 }
143 } else if (addr >= VA_START) {
144 /* TTBR1 */
Catalin Marinas1d18c472012-03-05 11:49:27 +0000145 mm = &init_mm;
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100146 } else {
147 pr_alert("[%016lx] address between user and kernel address ranges\n",
148 addr);
149 return;
150 }
Catalin Marinas1d18c472012-03-05 11:49:27 +0000151
Will Deacon1eb34b62017-05-15 15:23:58 +0100152 pr_alert("%s pgtable: %luk pages, %u-bit VAs, pgd = %p\n",
153 mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K,
154 VA_BITS, mm->pgd);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000155 pgd = pgd_offset(mm, addr);
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100156 pr_alert("[%016lx] *pgd=%016llx", addr, pgd_val(*pgd));
Catalin Marinas1d18c472012-03-05 11:49:27 +0000157
158 do {
159 pud_t *pud;
160 pmd_t *pmd;
161 pte_t *pte;
162
Steve Capper4339e3f32013-04-19 15:49:31 +0100163 if (pgd_none(*pgd) || pgd_bad(*pgd))
Catalin Marinas1d18c472012-03-05 11:49:27 +0000164 break;
165
166 pud = pud_offset(pgd, addr);
Mark Rutland6ef4fb32017-01-03 14:27:26 +0000167 pr_cont(", *pud=%016llx", pud_val(*pud));
Steve Capper4339e3f32013-04-19 15:49:31 +0100168 if (pud_none(*pud) || pud_bad(*pud))
Catalin Marinas1d18c472012-03-05 11:49:27 +0000169 break;
170
171 pmd = pmd_offset(pud, addr);
Mark Rutland6ef4fb32017-01-03 14:27:26 +0000172 pr_cont(", *pmd=%016llx", pmd_val(*pmd));
Steve Capper4339e3f32013-04-19 15:49:31 +0100173 if (pmd_none(*pmd) || pmd_bad(*pmd))
Catalin Marinas1d18c472012-03-05 11:49:27 +0000174 break;
175
176 pte = pte_offset_map(pmd, addr);
Mark Rutland6ef4fb32017-01-03 14:27:26 +0000177 pr_cont(", *pte=%016llx", pte_val(*pte));
Catalin Marinas1d18c472012-03-05 11:49:27 +0000178 pte_unmap(pte);
179 } while(0);
180
Mark Rutland6ef4fb32017-01-03 14:27:26 +0000181 pr_cont("\n");
Catalin Marinas1d18c472012-03-05 11:49:27 +0000182}
183
Catalin Marinas66dbd6e2016-04-13 16:01:22 +0100184/*
185 * This function sets the access flags (dirty, accessed), as well as write
186 * permission, and only to a more permissive setting.
187 *
188 * It needs to cope with hardware update of the accessed/dirty state by other
189 * agents in the system and can safely skip the __sync_icache_dcache() call as,
190 * like set_pte_at(), the PTE is never changed from no-exec to exec here.
191 *
192 * Returns whether or not the PTE actually changed.
193 */
194int ptep_set_access_flags(struct vm_area_struct *vma,
195 unsigned long address, pte_t *ptep,
196 pte_t entry, int dirty)
197{
Catalin Marinas3bbf7152017-06-26 14:27:36 +0100198 pteval_t old_pteval, pteval;
Catalin Marinas66dbd6e2016-04-13 16:01:22 +0100199
200 if (pte_same(*ptep, entry))
201 return 0;
202
203 /* only preserve the access flags and write permission */
Catalin Marinas73e86cb2017-07-04 19:04:18 +0100204 pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY;
Catalin Marinas66dbd6e2016-04-13 16:01:22 +0100205
206 /*
207 * Setting the flags must be done atomically to avoid racing with the
Catalin Marinas6d332742017-07-25 14:53:03 +0100208 * hardware update of the access/dirty state. The PTE_RDONLY bit must
209 * be set to the most permissive (lowest value) of *ptep and entry
210 * (calculated as: a & b == ~(~a | ~b)).
Catalin Marinas66dbd6e2016-04-13 16:01:22 +0100211 */
Catalin Marinas6d332742017-07-25 14:53:03 +0100212 pte_val(entry) ^= PTE_RDONLY;
Catalin Marinas3bbf7152017-06-26 14:27:36 +0100213 pteval = READ_ONCE(pte_val(*ptep));
214 do {
215 old_pteval = pteval;
216 pteval ^= PTE_RDONLY;
217 pteval |= pte_val(entry);
218 pteval ^= PTE_RDONLY;
219 pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval);
220 } while (pteval != old_pteval);
Catalin Marinas66dbd6e2016-04-13 16:01:22 +0100221
222 flush_tlb_fix_spurious_fault(vma, address);
223 return 1;
224}
Catalin Marinas66dbd6e2016-04-13 16:01:22 +0100225
Laura Abbott9adeb8e2016-08-09 18:25:26 -0700226static bool is_el1_instruction_abort(unsigned int esr)
227{
228 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR;
229}
230
Stephen Boydb824b932017-04-05 12:18:31 -0700231static inline bool is_permission_fault(unsigned int esr, struct pt_regs *regs,
232 unsigned long addr)
233{
234 unsigned int ec = ESR_ELx_EC(esr);
235 unsigned int fsc_type = esr & ESR_ELx_FSC_TYPE;
236
237 if (ec != ESR_ELx_EC_DABT_CUR && ec != ESR_ELx_EC_IABT_CUR)
238 return false;
239
240 if (fsc_type == ESR_ELx_FSC_PERM)
241 return true;
242
Robin Murphy51369e32018-02-05 15:34:18 +0000243 if (addr < TASK_SIZE && system_uses_ttbr0_pan())
Stephen Boydb824b932017-04-05 12:18:31 -0700244 return fsc_type == ESR_ELx_FSC_FAULT &&
245 (regs->pstate & PSR_PAN_BIT);
246
247 return false;
248}
249
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100250static void __do_kernel_fault(unsigned long addr, unsigned int esr,
251 struct pt_regs *regs)
Catalin Marinas1d18c472012-03-05 11:49:27 +0000252{
Stephen Boydb824b932017-04-05 12:18:31 -0700253 const char *msg;
254
Catalin Marinas1d18c472012-03-05 11:49:27 +0000255 /*
256 * Are we prepared to handle this kernel fault?
Laura Abbott9adeb8e2016-08-09 18:25:26 -0700257 * We are almost certainly not prepared to handle instruction faults.
Catalin Marinas1d18c472012-03-05 11:49:27 +0000258 */
Laura Abbott9adeb8e2016-08-09 18:25:26 -0700259 if (!is_el1_instruction_abort(esr) && fixup_exception(regs))
Catalin Marinas1d18c472012-03-05 11:49:27 +0000260 return;
261
Catalin Marinas1d18c472012-03-05 11:49:27 +0000262 bust_spinlocks(1);
Stephen Boydb824b932017-04-05 12:18:31 -0700263
264 if (is_permission_fault(esr, regs, addr)) {
265 if (esr & ESR_ELx_WNR)
266 msg = "write to read-only memory";
267 else
268 msg = "read from unreadable memory";
269 } else if (addr < PAGE_SIZE) {
270 msg = "NULL pointer dereference";
271 } else {
272 msg = "paging request";
273 }
274
275 pr_alert("Unable to handle kernel %s at virtual address %08lx\n", msg,
276 addr);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000277
Julien Thierry1f9b8932017-08-04 09:31:42 +0100278 mem_abort_decode(esr);
279
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100280 show_pte(addr);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000281 die("Oops", regs, esr);
282 bust_spinlocks(0);
283 do_exit(SIGKILL);
284}
285
Catalin Marinas1d18c472012-03-05 11:49:27 +0000286static void __do_user_fault(struct task_struct *tsk, unsigned long addr,
287 unsigned int esr, unsigned int sig, int code,
Jonathan (Zhixiong) Zhange7c600f2017-06-08 18:25:27 +0100288 struct pt_regs *regs, int fault)
Catalin Marinas1d18c472012-03-05 11:49:27 +0000289{
290 struct siginfo si;
Victor Kamensky09a6adf2017-04-03 22:51:01 -0700291 const struct fault_info *inf;
Jonathan (Zhixiong) Zhange7c600f2017-06-08 18:25:27 +0100292 unsigned int lsb = 0;
Catalin Marinas1d18c472012-03-05 11:49:27 +0000293
Suzuki K. Poulosef871d262015-07-03 15:08:08 +0100294 if (unhandled_signal(tsk, sig) && show_unhandled_signals_ratelimited()) {
Victor Kamensky09a6adf2017-04-03 22:51:01 -0700295 inf = esr_to_fault_info(esr);
Kristina Martsenko83016b22017-06-09 16:35:54 +0100296 pr_info("%s[%d]: unhandled %s (%d) at 0x%08lx, esr 0x%03x",
Victor Kamensky09a6adf2017-04-03 22:51:01 -0700297 tsk->comm, task_pid_nr(tsk), inf->name, sig,
Catalin Marinas3495386b2012-10-24 16:34:02 +0100298 addr, esr);
Kristina Martsenko83016b22017-06-09 16:35:54 +0100299 print_vma_addr(KERN_CONT ", in ", regs->pc);
300 pr_cont("\n");
Kefeng Wangc07ab952017-05-09 09:53:36 +0800301 __show_regs(regs);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000302 }
303
304 tsk->thread.fault_address = addr;
Catalin Marinas91413002014-04-06 23:04:12 +0100305 tsk->thread.fault_code = esr;
Catalin Marinas1d18c472012-03-05 11:49:27 +0000306 si.si_signo = sig;
307 si.si_errno = 0;
308 si.si_code = code;
309 si.si_addr = (void __user *)addr;
Jonathan (Zhixiong) Zhange7c600f2017-06-08 18:25:27 +0100310 /*
311 * Either small page or large page may be poisoned.
312 * In other words, VM_FAULT_HWPOISON_LARGE and
313 * VM_FAULT_HWPOISON are mutually exclusive.
314 */
315 if (fault & VM_FAULT_HWPOISON_LARGE)
316 lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault));
317 else if (fault & VM_FAULT_HWPOISON)
318 lsb = PAGE_SHIFT;
319 si.si_addr_lsb = lsb;
320
Catalin Marinas1d18c472012-03-05 11:49:27 +0000321 force_sig_info(sig, &si, tsk);
322}
323
Catalin Marinas59f67e12013-09-16 15:18:28 +0100324static void do_bad_area(unsigned long addr, unsigned int esr, struct pt_regs *regs)
Catalin Marinas1d18c472012-03-05 11:49:27 +0000325{
326 struct task_struct *tsk = current;
Victor Kamensky09a6adf2017-04-03 22:51:01 -0700327 const struct fault_info *inf;
Catalin Marinas1d18c472012-03-05 11:49:27 +0000328
329 /*
330 * If we are in kernel mode at this point, we have no context to
331 * handle this fault with.
332 */
Victor Kamensky09a6adf2017-04-03 22:51:01 -0700333 if (user_mode(regs)) {
334 inf = esr_to_fault_info(esr);
Jonathan (Zhixiong) Zhange7c600f2017-06-08 18:25:27 +0100335 __do_user_fault(tsk, addr, esr, inf->sig, inf->code, regs, 0);
Victor Kamensky09a6adf2017-04-03 22:51:01 -0700336 } else
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100337 __do_kernel_fault(addr, esr, regs);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000338}
339
340#define VM_FAULT_BADMAP 0x010000
341#define VM_FAULT_BADACCESS 0x020000
342
Catalin Marinas1d18c472012-03-05 11:49:27 +0000343static int __do_page_fault(struct mm_struct *mm, unsigned long addr,
Will Deacondb6f4102013-07-19 15:37:12 +0100344 unsigned int mm_flags, unsigned long vm_flags,
Catalin Marinas1d18c472012-03-05 11:49:27 +0000345 struct task_struct *tsk)
346{
347 struct vm_area_struct *vma;
348 int fault;
349
350 vma = find_vma(mm, addr);
351 fault = VM_FAULT_BADMAP;
352 if (unlikely(!vma))
353 goto out;
354 if (unlikely(vma->vm_start > addr))
355 goto check_stack;
356
357 /*
358 * Ok, we have a good vm_area for this memory access, so we can handle
359 * it.
360 */
361good_area:
Will Deacondb6f4102013-07-19 15:37:12 +0100362 /*
363 * Check that the permissions on the VMA allow for the fault which
Catalin Marinascab15ce2016-08-11 18:44:50 +0100364 * occurred.
Will Deacondb6f4102013-07-19 15:37:12 +0100365 */
366 if (!(vma->vm_flags & vm_flags)) {
Catalin Marinas1d18c472012-03-05 11:49:27 +0000367 fault = VM_FAULT_BADACCESS;
368 goto out;
369 }
370
Kirill A. Shutemovdcddffd2016-07-26 15:25:18 -0700371 return handle_mm_fault(vma, addr & PAGE_MASK, mm_flags);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000372
373check_stack:
374 if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr))
375 goto good_area;
376out:
377 return fault;
378}
379
Mark Rutland541ec872016-05-31 12:33:03 +0100380static bool is_el0_instruction_abort(unsigned int esr)
381{
382 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW;
383}
384
Catalin Marinas1d18c472012-03-05 11:49:27 +0000385static int __kprobes do_page_fault(unsigned long addr, unsigned int esr,
386 struct pt_regs *regs)
387{
388 struct task_struct *tsk;
389 struct mm_struct *mm;
Punit Agrawal0e3a9022017-06-08 18:25:28 +0100390 int fault, sig, code, major = 0;
Catalin Marinascab15ce2016-08-11 18:44:50 +0100391 unsigned long vm_flags = VM_READ | VM_WRITE;
Will Deacondb6f4102013-07-19 15:37:12 +0100392 unsigned int mm_flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
393
Sandeepa Prabhu2dd0e8d2016-07-08 12:35:48 -0400394 if (notify_page_fault(regs, esr))
395 return 0;
396
Catalin Marinas1d18c472012-03-05 11:49:27 +0000397 tsk = current;
398 mm = tsk->mm;
399
Catalin Marinas1d18c472012-03-05 11:49:27 +0000400 /*
401 * If we're in an interrupt or have no user context, we must not take
402 * the fault.
403 */
David Hildenbrand70ffdb92015-05-11 17:52:11 +0200404 if (faulthandler_disabled() || !mm)
Catalin Marinas1d18c472012-03-05 11:49:27 +0000405 goto no_context;
406
Johannes Weiner759496b2013-09-12 15:13:39 -0700407 if (user_mode(regs))
408 mm_flags |= FAULT_FLAG_USER;
409
Mark Rutland541ec872016-05-31 12:33:03 +0100410 if (is_el0_instruction_abort(esr)) {
Johannes Weiner759496b2013-09-12 15:13:39 -0700411 vm_flags = VM_EXEC;
Mark Rutlandaed40e02014-11-24 12:31:40 +0000412 } else if ((esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM)) {
Johannes Weiner759496b2013-09-12 15:13:39 -0700413 vm_flags = VM_WRITE;
414 mm_flags |= FAULT_FLAG_WRITE;
415 }
416
Robin Murphy51369e32018-02-05 15:34:18 +0000417 if (addr < TASK_SIZE && is_permission_fault(esr, regs, addr)) {
James Morsee19a6ee2016-06-20 18:28:01 +0100418 /* regs->orig_addr_limit may be 0 if we entered from EL0 */
419 if (regs->orig_addr_limit == KERNEL_DS)
Catalin Marinas70c8abc2016-02-19 14:28:58 +0000420 die("Accessing user space memory with fs=KERNEL_DS", regs, esr);
James Morse70544192016-02-05 14:58:50 +0000421
Laura Abbott9adeb8e2016-08-09 18:25:26 -0700422 if (is_el1_instruction_abort(esr))
423 die("Attempting to execute userspace memory", regs, esr);
424
James Morse57f49592016-02-05 14:58:48 +0000425 if (!search_exception_tables(regs->pc))
Catalin Marinas70c8abc2016-02-19 14:28:58 +0000426 die("Accessing user space memory outside uaccess.h routines", regs, esr);
James Morse57f49592016-02-05 14:58:48 +0000427 }
James Morse338d4f42015-07-22 19:05:54 +0100428
Punit Agrawal0e3a9022017-06-08 18:25:28 +0100429 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
430
James Morse338d4f42015-07-22 19:05:54 +0100431 /*
Catalin Marinas1d18c472012-03-05 11:49:27 +0000432 * As per x86, we may deadlock here. However, since the kernel only
433 * validly references user space from well defined areas of the code,
434 * we can bug out early if this is from code which shouldn't.
435 */
436 if (!down_read_trylock(&mm->mmap_sem)) {
437 if (!user_mode(regs) && !search_exception_tables(regs->pc))
438 goto no_context;
439retry:
440 down_read(&mm->mmap_sem);
441 } else {
442 /*
443 * The above down_read_trylock() might have succeeded in which
444 * case, we'll have missed the might_sleep() from down_read().
445 */
446 might_sleep();
447#ifdef CONFIG_DEBUG_VM
448 if (!user_mode(regs) && !search_exception_tables(regs->pc))
449 goto no_context;
450#endif
451 }
452
Will Deacondb6f4102013-07-19 15:37:12 +0100453 fault = __do_page_fault(mm, addr, mm_flags, vm_flags, tsk);
Punit Agrawal0e3a9022017-06-08 18:25:28 +0100454 major |= fault & VM_FAULT_MAJOR;
455
456 if (fault & VM_FAULT_RETRY) {
457 /*
458 * If we need to retry but a fatal signal is pending,
459 * handle the signal first. We do not need to release
460 * the mmap_sem because it would already be released
461 * in __lock_page_or_retry in mm/filemap.c.
462 */
Mark Rutland289d07a2017-07-11 15:19:22 +0100463 if (fatal_signal_pending(current)) {
464 if (!user_mode(regs))
465 goto no_context;
Punit Agrawal0e3a9022017-06-08 18:25:28 +0100466 return 0;
Mark Rutland289d07a2017-07-11 15:19:22 +0100467 }
Punit Agrawal0e3a9022017-06-08 18:25:28 +0100468
469 /*
470 * Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk of
471 * starvation.
472 */
473 if (mm_flags & FAULT_FLAG_ALLOW_RETRY) {
474 mm_flags &= ~FAULT_FLAG_ALLOW_RETRY;
475 mm_flags |= FAULT_FLAG_TRIED;
476 goto retry;
477 }
478 }
479 up_read(&mm->mmap_sem);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000480
481 /*
Punit Agrawal0e3a9022017-06-08 18:25:28 +0100482 * Handle the "normal" (no error) case first.
Catalin Marinas1d18c472012-03-05 11:49:27 +0000483 */
Punit Agrawal0e3a9022017-06-08 18:25:28 +0100484 if (likely(!(fault & (VM_FAULT_ERROR | VM_FAULT_BADMAP |
485 VM_FAULT_BADACCESS)))) {
486 /*
487 * Major/minor page fault accounting is only done
488 * once. If we go through a retry, it is extremely
489 * likely that the page will be found in page cache at
490 * that point.
491 */
492 if (major) {
Catalin Marinas1d18c472012-03-05 11:49:27 +0000493 tsk->maj_flt++;
494 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs,
495 addr);
496 } else {
497 tsk->min_flt++;
498 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs,
499 addr);
500 }
Catalin Marinas1d18c472012-03-05 11:49:27 +0000501
Catalin Marinas1d18c472012-03-05 11:49:27 +0000502 return 0;
Punit Agrawal0e3a9022017-06-08 18:25:28 +0100503 }
Catalin Marinas1d18c472012-03-05 11:49:27 +0000504
Johannes Weiner87134102013-09-12 15:13:38 -0700505 /*
506 * If we are in kernel mode at this point, we have no context to
507 * handle this fault with.
508 */
509 if (!user_mode(regs))
510 goto no_context;
511
Catalin Marinas1d18c472012-03-05 11:49:27 +0000512 if (fault & VM_FAULT_OOM) {
513 /*
514 * We ran out of memory, call the OOM killer, and return to
515 * userspace (which will retry the fault, or kill us if we got
516 * oom-killed).
517 */
518 pagefault_out_of_memory();
519 return 0;
520 }
521
Catalin Marinas1d18c472012-03-05 11:49:27 +0000522 if (fault & VM_FAULT_SIGBUS) {
523 /*
524 * We had some memory, but were unable to successfully fix up
525 * this page fault.
526 */
527 sig = SIGBUS;
528 code = BUS_ADRERR;
Jonathan (Zhixiong) Zhange7c600f2017-06-08 18:25:27 +0100529 } else if (fault & (VM_FAULT_HWPOISON | VM_FAULT_HWPOISON_LARGE)) {
530 sig = SIGBUS;
531 code = BUS_MCEERR_AR;
Catalin Marinas1d18c472012-03-05 11:49:27 +0000532 } else {
533 /*
534 * Something tried to access memory that isn't in our memory
535 * map.
536 */
537 sig = SIGSEGV;
538 code = fault == VM_FAULT_BADACCESS ?
539 SEGV_ACCERR : SEGV_MAPERR;
540 }
541
Jonathan (Zhixiong) Zhange7c600f2017-06-08 18:25:27 +0100542 __do_user_fault(tsk, addr, esr, sig, code, regs, fault);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000543 return 0;
544
545no_context:
Kristina Martsenko67ce16e2017-06-09 16:35:52 +0100546 __do_kernel_fault(addr, esr, regs);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000547 return 0;
548}
549
Catalin Marinas1d18c472012-03-05 11:49:27 +0000550static int __kprobes do_translation_fault(unsigned long addr,
551 unsigned int esr,
552 struct pt_regs *regs)
553{
554 if (addr < TASK_SIZE)
555 return do_page_fault(addr, esr, regs);
556
557 do_bad_area(addr, esr, regs);
558 return 0;
559}
560
EunTaik Lee52d75232016-02-16 04:44:35 +0000561static int do_alignment_fault(unsigned long addr, unsigned int esr,
562 struct pt_regs *regs)
563{
564 do_bad_area(addr, esr, regs);
565 return 0;
566}
567
Catalin Marinas1d18c472012-03-05 11:49:27 +0000568static int do_bad(unsigned long addr, unsigned int esr, struct pt_regs *regs)
569{
Will Deaconf67d5c42017-09-22 11:01:26 +0100570 return 1; /* "fault" */
Catalin Marinas1d18c472012-03-05 11:49:27 +0000571}
572
Tyler Baicar32015c22017-06-21 12:17:08 -0600573static int do_sea(unsigned long addr, unsigned int esr, struct pt_regs *regs)
574{
575 struct siginfo info;
576 const struct fault_info *inf;
Tyler Baicar621f48e2017-06-21 12:17:14 -0600577 int ret = 0;
Tyler Baicar32015c22017-06-21 12:17:08 -0600578
579 inf = esr_to_fault_info(esr);
580 pr_err("Synchronous External Abort: %s (0x%08x) at 0x%016lx\n",
581 inf->name, esr, addr);
582
Tyler Baicar7edda082017-06-21 12:17:09 -0600583 /*
584 * Synchronous aborts may interrupt code which had interrupts masked.
585 * Before calling out into the wider kernel tell the interested
586 * subsystems.
587 */
588 if (IS_ENABLED(CONFIG_ACPI_APEI_SEA)) {
589 if (interrupts_enabled(regs))
590 nmi_enter();
591
Tyler Baicar621f48e2017-06-21 12:17:14 -0600592 ret = ghes_notify_sea();
Tyler Baicar7edda082017-06-21 12:17:09 -0600593
594 if (interrupts_enabled(regs))
595 nmi_exit();
596 }
597
Tyler Baicar32015c22017-06-21 12:17:08 -0600598 info.si_signo = SIGBUS;
599 info.si_errno = 0;
600 info.si_code = 0;
601 if (esr & ESR_ELx_FnV)
602 info.si_addr = NULL;
603 else
604 info.si_addr = (void __user *)addr;
605 arm64_notify_die("", regs, &info, esr);
606
Tyler Baicar621f48e2017-06-21 12:17:14 -0600607 return ret;
Tyler Baicar32015c22017-06-21 12:17:08 -0600608}
609
Victor Kamensky09a6adf2017-04-03 22:51:01 -0700610static const struct fault_info fault_info[] = {
Catalin Marinas1d18c472012-03-05 11:49:27 +0000611 { do_bad, SIGBUS, 0, "ttbr address size fault" },
612 { do_bad, SIGBUS, 0, "level 1 address size fault" },
613 { do_bad, SIGBUS, 0, "level 2 address size fault" },
614 { do_bad, SIGBUS, 0, "level 3 address size fault" },
Will Deacon7f73f7a2014-11-21 14:22:22 +0000615 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 0 translation fault" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000616 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" },
617 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" },
Will Deacon760bfb42017-09-29 12:27:41 +0100618 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000619 { do_bad, SIGBUS, 0, "unknown 8" },
Steve Capper084bd292013-04-10 13:48:00 +0100620 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" },
621 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000622 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000623 { do_bad, SIGBUS, 0, "unknown 12" },
Steve Capper084bd292013-04-10 13:48:00 +0100624 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" },
625 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000626 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" },
Tyler Baicar32015c22017-06-21 12:17:08 -0600627 { do_sea, SIGBUS, 0, "synchronous external abort" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000628 { do_bad, SIGBUS, 0, "unknown 17" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000629 { do_bad, SIGBUS, 0, "unknown 18" },
630 { do_bad, SIGBUS, 0, "unknown 19" },
Tyler Baicar32015c22017-06-21 12:17:08 -0600631 { do_sea, SIGBUS, 0, "level 0 (translation table walk)" },
632 { do_sea, SIGBUS, 0, "level 1 (translation table walk)" },
633 { do_sea, SIGBUS, 0, "level 2 (translation table walk)" },
634 { do_sea, SIGBUS, 0, "level 3 (translation table walk)" },
Julien Thierry3f7c86b2017-10-17 14:11:30 +0100635 { do_sea, SIGBUS, 0, "synchronous parity or ECC error" }, // Reserved when RAS is implemented
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000636 { do_bad, SIGBUS, 0, "unknown 25" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000637 { do_bad, SIGBUS, 0, "unknown 26" },
638 { do_bad, SIGBUS, 0, "unknown 27" },
Julien Thierry3f7c86b2017-10-17 14:11:30 +0100639 { do_sea, SIGBUS, 0, "level 0 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
640 { do_sea, SIGBUS, 0, "level 1 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
641 { do_sea, SIGBUS, 0, "level 2 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
642 { do_sea, SIGBUS, 0, "level 3 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
Catalin Marinas1d18c472012-03-05 11:49:27 +0000643 { do_bad, SIGBUS, 0, "unknown 32" },
EunTaik Lee52d75232016-02-16 04:44:35 +0000644 { do_alignment_fault, SIGBUS, BUS_ADRALN, "alignment fault" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000645 { do_bad, SIGBUS, 0, "unknown 34" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000646 { do_bad, SIGBUS, 0, "unknown 35" },
647 { do_bad, SIGBUS, 0, "unknown 36" },
648 { do_bad, SIGBUS, 0, "unknown 37" },
649 { do_bad, SIGBUS, 0, "unknown 38" },
650 { do_bad, SIGBUS, 0, "unknown 39" },
651 { do_bad, SIGBUS, 0, "unknown 40" },
652 { do_bad, SIGBUS, 0, "unknown 41" },
653 { do_bad, SIGBUS, 0, "unknown 42" },
654 { do_bad, SIGBUS, 0, "unknown 43" },
655 { do_bad, SIGBUS, 0, "unknown 44" },
656 { do_bad, SIGBUS, 0, "unknown 45" },
657 { do_bad, SIGBUS, 0, "unknown 46" },
658 { do_bad, SIGBUS, 0, "unknown 47" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000659 { do_bad, SIGBUS, 0, "TLB conflict abort" },
Julien Thierry3f7c86b2017-10-17 14:11:30 +0100660 { do_bad, SIGBUS, 0, "Unsupported atomic hardware update fault" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000661 { do_bad, SIGBUS, 0, "unknown 50" },
662 { do_bad, SIGBUS, 0, "unknown 51" },
663 { do_bad, SIGBUS, 0, "implementation fault (lockdown abort)" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000664 { do_bad, SIGBUS, 0, "implementation fault (unsupported exclusive)" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000665 { do_bad, SIGBUS, 0, "unknown 54" },
666 { do_bad, SIGBUS, 0, "unknown 55" },
667 { do_bad, SIGBUS, 0, "unknown 56" },
668 { do_bad, SIGBUS, 0, "unknown 57" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000669 { do_bad, SIGBUS, 0, "unknown 58" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000670 { do_bad, SIGBUS, 0, "unknown 59" },
671 { do_bad, SIGBUS, 0, "unknown 60" },
Mark Rutlandc03784ee82015-11-23 15:09:36 +0000672 { do_bad, SIGBUS, 0, "section domain fault" },
673 { do_bad, SIGBUS, 0, "page domain fault" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000674 { do_bad, SIGBUS, 0, "unknown 63" },
675};
676
Tyler Baicar621f48e2017-06-21 12:17:14 -0600677int handle_guest_sea(phys_addr_t addr, unsigned int esr)
678{
679 int ret = -ENOENT;
680
681 if (IS_ENABLED(CONFIG_ACPI_APEI_SEA))
682 ret = ghes_notify_sea();
683
684 return ret;
685}
686
Catalin Marinas1d18c472012-03-05 11:49:27 +0000687asmlinkage void __exception do_mem_abort(unsigned long addr, unsigned int esr,
688 struct pt_regs *regs)
689{
Victor Kamensky09a6adf2017-04-03 22:51:01 -0700690 const struct fault_info *inf = esr_to_fault_info(esr);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000691 struct siginfo info;
692
693 if (!inf->fn(addr, esr, regs))
694 return;
695
Mark Rutland42dbf542017-10-19 11:19:55 +0100696 pr_alert("Unhandled fault: %s at 0x%016lx\n",
697 inf->name, addr);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000698
Julien Thierry1f9b8932017-08-04 09:31:42 +0100699 mem_abort_decode(esr);
700
Will Deacon80b6eb02017-10-31 15:56:11 +0000701 if (!user_mode(regs))
702 show_pte(addr);
Mark Rutland42dbf542017-10-19 11:19:55 +0100703
Catalin Marinas1d18c472012-03-05 11:49:27 +0000704 info.si_signo = inf->sig;
705 info.si_errno = 0;
706 info.si_code = inf->code;
707 info.si_addr = (void __user *)addr;
708 arm64_notify_die("", regs, &info, esr);
709}
710
Will Deacon0f15adb2018-01-03 11:17:58 +0000711asmlinkage void __exception do_el0_ia_bp_hardening(unsigned long addr,
712 unsigned int esr,
713 struct pt_regs *regs)
714{
715 /*
716 * We've taken an instruction abort from userspace and not yet
717 * re-enabled IRQs. If the address is a kernel address, apply
718 * BP hardening prior to enabling IRQs and pre-emption.
719 */
720 if (addr > TASK_SIZE)
721 arm64_apply_bp_hardening();
722
723 local_irq_enable();
724 do_mem_abort(addr, esr, regs);
725}
726
727
Catalin Marinas1d18c472012-03-05 11:49:27 +0000728asmlinkage void __exception do_sp_pc_abort(unsigned long addr,
729 unsigned int esr,
730 struct pt_regs *regs)
731{
732 struct siginfo info;
Vladimir Murzin9e793ab2015-06-19 15:28:16 +0100733 struct task_struct *tsk = current;
734
Will Deacon5dfc6ed2018-02-02 17:31:39 +0000735 if (user_mode(regs)) {
736 if (instruction_pointer(regs) > TASK_SIZE)
737 arm64_apply_bp_hardening();
738 local_irq_enable();
739 }
740
Vladimir Murzin9e793ab2015-06-19 15:28:16 +0100741 if (show_unhandled_signals && unhandled_signal(tsk, SIGBUS))
742 pr_info_ratelimited("%s[%d]: %s exception: pc=%p sp=%p\n",
743 tsk->comm, task_pid_nr(tsk),
744 esr_get_class_string(esr), (void *)regs->pc,
745 (void *)regs->sp);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000746
747 info.si_signo = SIGBUS;
748 info.si_errno = 0;
749 info.si_code = BUS_ADRALN;
750 info.si_addr = (void __user *)addr;
Vladimir Murzin9e793ab2015-06-19 15:28:16 +0100751 arm64_notify_die("Oops - SP/PC alignment exception", regs, &info, esr);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000752}
753
Dave P Martin9fb74102015-07-24 16:37:48 +0100754int __init early_brk64(unsigned long addr, unsigned int esr,
755 struct pt_regs *regs);
756
757/*
758 * __refdata because early_brk64 is __init, but the reference to it is
759 * clobbered at arch_initcall time.
760 * See traps.c and debug-monitors.c:debug_traps_init().
761 */
762static struct fault_info __refdata debug_fault_info[] = {
Catalin Marinas1d18c472012-03-05 11:49:27 +0000763 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware breakpoint" },
764 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware single-step" },
765 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware watchpoint" },
766 { do_bad, SIGBUS, 0, "unknown 3" },
767 { do_bad, SIGTRAP, TRAP_BRKPT, "aarch32 BKPT" },
768 { do_bad, SIGTRAP, 0, "aarch32 vector catch" },
Dave P Martin9fb74102015-07-24 16:37:48 +0100769 { early_brk64, SIGTRAP, TRAP_BRKPT, "aarch64 BRK" },
Catalin Marinas1d18c472012-03-05 11:49:27 +0000770 { do_bad, SIGBUS, 0, "unknown 7" },
771};
772
773void __init hook_debug_fault_code(int nr,
774 int (*fn)(unsigned long, unsigned int, struct pt_regs *),
775 int sig, int code, const char *name)
776{
777 BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info));
778
779 debug_fault_info[nr].fn = fn;
780 debug_fault_info[nr].sig = sig;
781 debug_fault_info[nr].code = code;
782 debug_fault_info[nr].name = name;
783}
784
785asmlinkage int __exception do_debug_exception(unsigned long addr,
786 unsigned int esr,
787 struct pt_regs *regs)
788{
789 const struct fault_info *inf = debug_fault_info + DBG_ESR_EVT(esr);
790 struct siginfo info;
James Morse6afedcd2016-04-13 13:40:00 +0100791 int rv;
Catalin Marinas1d18c472012-03-05 11:49:27 +0000792
James Morse6afedcd2016-04-13 13:40:00 +0100793 /*
794 * Tell lockdep we disabled irqs in entry.S. Do nothing if they were
795 * already disabled to preserve the last enabled/disabled addresses.
796 */
797 if (interrupts_enabled(regs))
798 trace_hardirqs_off();
Catalin Marinas1d18c472012-03-05 11:49:27 +0000799
Will Deacon5dfc6ed2018-02-02 17:31:39 +0000800 if (user_mode(regs) && instruction_pointer(regs) > TASK_SIZE)
801 arm64_apply_bp_hardening();
802
James Morse6afedcd2016-04-13 13:40:00 +0100803 if (!inf->fn(addr, esr, regs)) {
804 rv = 1;
805 } else {
806 pr_alert("Unhandled debug exception: %s (0x%08x) at 0x%016lx\n",
807 inf->name, esr, addr);
Catalin Marinas1d18c472012-03-05 11:49:27 +0000808
James Morse6afedcd2016-04-13 13:40:00 +0100809 info.si_signo = inf->sig;
810 info.si_errno = 0;
811 info.si_code = inf->code;
812 info.si_addr = (void __user *)addr;
813 arm64_notify_die("", regs, &info, 0);
814 rv = 0;
815 }
Catalin Marinas1d18c472012-03-05 11:49:27 +0000816
James Morse6afedcd2016-04-13 13:40:00 +0100817 if (interrupts_enabled(regs))
818 trace_hardirqs_on();
819
820 return rv;
Catalin Marinas1d18c472012-03-05 11:49:27 +0000821}
Sandeepa Prabhu2dd0e8d2016-07-08 12:35:48 -0400822NOKPROBE_SYMBOL(do_debug_exception);
James Morse338d4f42015-07-22 19:05:54 +0100823
824#ifdef CONFIG_ARM64_PAN
James Morse2a6dcb22016-10-18 11:27:46 +0100825int cpu_enable_pan(void *__unused)
James Morse338d4f42015-07-22 19:05:54 +0100826{
James Morse7209c862016-10-18 11:27:47 +0100827 /*
828 * We modify PSTATE. This won't work from irq context as the PSTATE
829 * is discarded once we return from the exception.
830 */
831 WARN_ON_ONCE(in_interrupt());
832
James Morse338d4f42015-07-22 19:05:54 +0100833 config_sctlr_el1(SCTLR_EL1_SPAN, 0);
James Morse7209c862016-10-18 11:27:47 +0100834 asm(SET_PSTATE_PAN(1));
James Morse2a6dcb22016-10-18 11:27:46 +0100835 return 0;
James Morse338d4f42015-07-22 19:05:54 +0100836}
837#endif /* CONFIG_ARM64_PAN */