Thomas Gleixner | ec8f24b | 2019-05-19 13:07:45 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 2 | # |
| 3 | # SPI driver configuration |
| 4 | # |
Alessandro Guido | 79d8c7a | 2008-04-28 02:14:16 -0700 | [diff] [blame] | 5 | menuconfig SPI |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 6 | bool "SPI support" |
Alessandro Guido | 79d8c7a | 2008-04-28 02:14:16 -0700 | [diff] [blame] | 7 | depends on HAS_IOMEM |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 8 | help |
| 9 | The "Serial Peripheral Interface" is a low level synchronous |
| 10 | protocol. Chips that support SPI can have data transfer rates |
| 11 | up to several tens of Mbit/sec. Chips are addressed with a |
| 12 | controller and a chipselect. Most SPI slaves don't support |
| 13 | dynamic device discovery; some are even write-only or read-only. |
| 14 | |
Matt LaPlante | 3cb2fcc | 2006-11-30 05:22:59 +0100 | [diff] [blame] | 15 | SPI is widely used by microcontrollers to talk with sensors, |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 16 | eeprom and flash memory, codecs and various other controller |
| 17 | chips, analog to digital (and d-to-a) converters, and more. |
| 18 | MMC and SD cards can be accessed using SPI protocol; and for |
| 19 | DataFlash cards used in MMC sockets, SPI must always be used. |
| 20 | |
| 21 | SPI is one of a family of similar protocols using a four wire |
| 22 | interface (select, clock, data in, data out) including Microwire |
| 23 | (half duplex), SSP, SSI, and PSP. This driver framework should |
| 24 | work with most such devices and controllers. |
| 25 | |
Alessandro Guido | 79d8c7a | 2008-04-28 02:14:16 -0700 | [diff] [blame] | 26 | if SPI |
| 27 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 28 | config SPI_DEBUG |
Christoph Jaeger | 6341e62 | 2014-12-20 15:41:11 -0500 | [diff] [blame] | 29 | bool "Debug support for SPI drivers" |
Alessandro Guido | 79d8c7a | 2008-04-28 02:14:16 -0700 | [diff] [blame] | 30 | depends on DEBUG_KERNEL |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 31 | help |
| 32 | Say "yes" to enable debug messaging (like dev_dbg and pr_debug), |
| 33 | sysfs, and debugfs support in SPI controller and protocol drivers. |
| 34 | |
| 35 | # |
| 36 | # MASTER side ... talking to discrete SPI slave chips including microcontrollers |
| 37 | # |
| 38 | |
| 39 | config SPI_MASTER |
Christoph Jaeger | 6341e62 | 2014-12-20 15:41:11 -0500 | [diff] [blame] | 40 | # bool "SPI Master Support" |
| 41 | bool |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 42 | default SPI |
| 43 | help |
| 44 | If your system has an master-capable SPI controller (which |
| 45 | provides the clock and chipselect), you can enable that |
| 46 | controller and the protocol drivers for the SPI slave chips |
| 47 | that are connected. |
| 48 | |
Robert P. J. Day | 6291fe2 | 2008-07-23 21:29:53 -0700 | [diff] [blame] | 49 | if SPI_MASTER |
| 50 | |
Boris Brezillon | c36ff26 | 2018-04-26 18:18:14 +0200 | [diff] [blame] | 51 | config SPI_MEM |
| 52 | bool "SPI memory extension" |
| 53 | help |
| 54 | Enable this option if you want to enable the SPI memory extension. |
| 55 | This extension is meant to simplify interaction with SPI memories |
Fabio Estevam | 29e795c | 2018-05-30 16:29:15 -0300 | [diff] [blame] | 56 | by providing a high-level interface to send memory-like commands. |
Boris Brezillon | c36ff26 | 2018-04-26 18:18:14 +0200 | [diff] [blame] | 57 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 58 | comment "SPI Master Controller Drivers" |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 59 | |
Thomas Chou | 0b78253 | 2011-02-14 10:10:43 +0800 | [diff] [blame] | 60 | config SPI_ALTERA |
Matthew Gerlach | b0c3d93 | 2021-04-16 09:57:19 -0700 | [diff] [blame] | 61 | tristate "Altera SPI Controller platform driver" |
| 62 | select SPI_ALTERA_CORE |
Xu Yilun | 3c65197 | 2020-06-19 09:43:39 +0800 | [diff] [blame] | 63 | select REGMAP_MMIO |
Thomas Chou | 0b78253 | 2011-02-14 10:10:43 +0800 | [diff] [blame] | 64 | help |
| 65 | This is the driver for the Altera SPI Controller. |
| 66 | |
Matthew Gerlach | b0c3d93 | 2021-04-16 09:57:19 -0700 | [diff] [blame] | 67 | config SPI_ALTERA_CORE |
Geert Uytterhoeven | 41f48a2 | 2021-04-27 16:38:42 +0200 | [diff] [blame] | 68 | tristate "Altera SPI Controller core code" if COMPILE_TEST |
Matthew Gerlach | b0c3d93 | 2021-04-16 09:57:19 -0700 | [diff] [blame] | 69 | select REGMAP |
| 70 | help |
| 71 | "The core code for the Altera SPI Controller" |
| 72 | |
Matthew Gerlach | ba2fc16 | 2021-04-16 09:57:20 -0700 | [diff] [blame] | 73 | config SPI_ALTERA_DFL |
| 74 | tristate "DFL bus driver for Altera SPI Controller" |
| 75 | depends on FPGA_DFL |
| 76 | select SPI_ALTERA_CORE |
| 77 | help |
| 78 | This is a Device Feature List (DFL) bus driver for the |
| 79 | Altera SPI master controller. The SPI master is connected |
| 80 | to a SPI slave to Avalon bridge in a Intel MAX BMC. |
| 81 | |
Chuanhong Guo | 047980c | 2020-02-10 11:41:51 +0800 | [diff] [blame] | 82 | config SPI_AR934X |
| 83 | tristate "Qualcomm Atheros AR934X/QCA95XX SPI controller driver" |
| 84 | depends on ATH79 || COMPILE_TEST |
| 85 | help |
| 86 | This enables support for the SPI controller present on the |
| 87 | Qualcomm Atheros AR934X/QCA95XX SoCs. |
| 88 | |
Gabor Juhos | 8efaef4 | 2011-01-04 21:28:22 +0100 | [diff] [blame] | 89 | config SPI_ATH79 |
| 90 | tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver" |
Alban Bedel | b172fd0 | 2019-01-16 19:55:46 +0100 | [diff] [blame] | 91 | depends on ATH79 || COMPILE_TEST |
Gabor Juhos | 8efaef4 | 2011-01-04 21:28:22 +0100 | [diff] [blame] | 92 | select SPI_BITBANG |
| 93 | help |
| 94 | This enables support for the SPI controller present on the |
| 95 | Atheros AR71XX/AR724X/AR913X SoCs. |
| 96 | |
Romain Perier | 5762ab7 | 2016-12-08 15:58:44 +0100 | [diff] [blame] | 97 | config SPI_ARMADA_3700 |
| 98 | tristate "Marvell Armada 3700 SPI Controller" |
| 99 | depends on (ARCH_MVEBU && OF) || COMPILE_TEST |
| 100 | help |
| 101 | This enables support for the SPI controller present on the |
| 102 | Marvell Armada 3700 SoCs. |
| 103 | |
Haavard Skinnemoen | 754ce4f | 2007-02-14 00:33:09 -0800 | [diff] [blame] | 104 | config SPI_ATMEL |
| 105 | tristate "Atmel SPI Controller" |
Arnd Bergmann | a687a53 | 2018-03-07 23:30:54 +0100 | [diff] [blame] | 106 | depends on ARCH_AT91 || COMPILE_TEST |
Gregory CLEMENT | 1cb84b0 | 2019-10-17 16:18:44 +0200 | [diff] [blame] | 107 | depends on OF |
Haavard Skinnemoen | 754ce4f | 2007-02-14 00:33:09 -0800 | [diff] [blame] | 108 | help |
| 109 | This selects a driver for the Atmel SPI Controller, present on |
Arnd Bergmann | a687a53 | 2018-03-07 23:30:54 +0100 | [diff] [blame] | 110 | many AT91 ARM chips. |
Haavard Skinnemoen | 754ce4f | 2007-02-14 00:33:09 -0800 | [diff] [blame] | 111 | |
Radu Pirea | e189254 | 2018-07-13 19:47:35 +0300 | [diff] [blame] | 112 | config SPI_AT91_USART |
| 113 | tristate "Atmel USART Controller SPI driver" |
| 114 | depends on (ARCH_AT91 || COMPILE_TEST) |
| 115 | depends on MFD_AT91_USART |
| 116 | help |
| 117 | This selects a driver for the AT91 USART Controller as SPI Master, |
| 118 | present on AT91 and SAMA5 SoC series. |
| 119 | |
Piotr Bugalski | 0e6aae0 | 2018-11-05 11:36:24 +0100 | [diff] [blame] | 120 | config SPI_ATMEL_QUADSPI |
| 121 | tristate "Atmel Quad SPI Controller" |
Tudor Ambarus | b780c3f | 2020-07-16 07:31:39 +0300 | [diff] [blame] | 122 | depends on ARCH_AT91 || COMPILE_TEST |
Piotr Bugalski | 0e6aae0 | 2018-11-05 11:36:24 +0100 | [diff] [blame] | 123 | depends on OF && HAS_IOMEM |
| 124 | help |
| 125 | This enables support for the Quad SPI controller in master mode. |
| 126 | This driver does not support generic SPI. The implementation only |
| 127 | supports spi-mem interface. |
| 128 | |
Mark Brown | e32bb87 | 2016-02-02 11:27:42 +0000 | [diff] [blame] | 129 | config SPI_AU1550 |
| 130 | tristate "Au1550/Au1200/Au1300 SPI Controller" |
| 131 | depends on MIPS_ALCHEMY |
| 132 | select SPI_BITBANG |
| 133 | help |
| 134 | If you say yes to this option, support will be included for the |
| 135 | PSC SPI controller found on Au1550, Au1200 and Au1300 series. |
| 136 | |
Lars-Peter Clausen | b1353d1 | 2016-02-04 17:13:30 +0100 | [diff] [blame] | 137 | config SPI_AXI_SPI_ENGINE |
| 138 | tristate "Analog Devices AXI SPI Engine controller" |
| 139 | depends on HAS_IOMEM |
| 140 | help |
| 141 | This enables support for the Analog Devices AXI SPI Engine SPI controller. |
| 142 | It is part of the SPI Engine framework that is used in some Analog Devices |
| 143 | reference designs for FPGAs. |
| 144 | |
Chris Boot | f804387 | 2013-03-11 21:38:24 -0600 | [diff] [blame] | 145 | config SPI_BCM2835 |
| 146 | tristate "BCM2835 SPI controller" |
Yoshinori Sato | e0d58cd | 2015-05-04 00:16:36 +0900 | [diff] [blame] | 147 | depends on GPIOLIB |
Florian Fainelli | 35ceb67 | 2019-05-09 13:36:00 -0700 | [diff] [blame] | 148 | depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST |
Chris Boot | f804387 | 2013-03-11 21:38:24 -0600 | [diff] [blame] | 149 | help |
| 150 | This selects a driver for the Broadcom BCM2835 SPI master. |
| 151 | |
| 152 | The BCM2835 contains two types of SPI master controller; the |
| 153 | "universal SPI master", and the regular SPI controller. This driver |
| 154 | is for the regular SPI controller. Slave mode operation is not also |
| 155 | not supported. |
| 156 | |
Martin Sperl | 1ea29b3 | 2015-09-11 11:22:04 +0000 | [diff] [blame] | 157 | config SPI_BCM2835AUX |
| 158 | tristate "BCM2835 SPI auxiliary controller" |
Florian Fainelli | 35ceb67 | 2019-05-09 13:36:00 -0700 | [diff] [blame] | 159 | depends on ((ARCH_BCM2835 || ARCH_BRCMSTB) && GPIOLIB) || COMPILE_TEST |
Martin Sperl | 1ea29b3 | 2015-09-11 11:22:04 +0000 | [diff] [blame] | 160 | help |
| 161 | This selects a driver for the Broadcom BCM2835 SPI aux master. |
| 162 | |
| 163 | The BCM2835 contains two types of SPI master controller; the |
| 164 | "universal SPI master", and the regular SPI controller. |
| 165 | This driver is for the universal/auxiliary SPI controller. |
| 166 | |
Florian Fainelli | b42dfed | 2012-02-01 11:14:09 +0100 | [diff] [blame] | 167 | config SPI_BCM63XX |
| 168 | tristate "Broadcom BCM63xx SPI controller" |
Álvaro Fernández Rojas | 3a52145 | 2020-06-15 11:09:41 +0200 | [diff] [blame] | 169 | depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST |
Florian Fainelli | b42dfed | 2012-02-01 11:14:09 +0100 | [diff] [blame] | 170 | help |
Krzysztof Kozlowski | 554bbe7 | 2019-11-20 21:39:16 +0800 | [diff] [blame] | 171 | Enable support for the SPI controller on the Broadcom BCM63xx SoCs. |
Florian Fainelli | b42dfed | 2012-02-01 11:14:09 +0100 | [diff] [blame] | 172 | |
Jonas Gorski | 142168e | 2013-11-30 12:42:06 +0100 | [diff] [blame] | 173 | config SPI_BCM63XX_HSSPI |
| 174 | tristate "Broadcom BCM63XX HS SPI controller driver" |
Álvaro Fernández Rojas | ba2137f | 2020-06-15 11:09:43 +0200 | [diff] [blame] | 175 | depends on BCM63XX || BMIPS_GENERIC || ARCH_BCM_63XX || COMPILE_TEST |
Jonas Gorski | 142168e | 2013-11-30 12:42:06 +0100 | [diff] [blame] | 176 | help |
| 177 | This enables support for the High Speed SPI controller present on |
| 178 | newer Broadcom BCM63XX SoCs. |
| 179 | |
Kamal Dasu | fa236a7 | 2016-08-24 18:04:23 -0400 | [diff] [blame] | 180 | config SPI_BCM_QSPI |
| 181 | tristate "Broadcom BSPI and MSPI controller support" |
Jaedon Shin | 279e4af | 2016-12-30 15:30:00 +0900 | [diff] [blame] | 182 | depends on ARCH_BRCMSTB || ARCH_BCM || ARCH_BCM_IPROC || \ |
| 183 | BMIPS_GENERIC || COMPILE_TEST |
Kamal Dasu | fa236a7 | 2016-08-24 18:04:23 -0400 | [diff] [blame] | 184 | default ARCH_BCM_IPROC |
| 185 | help |
| 186 | Enables support for the Broadcom SPI flash and MSPI controller. |
| 187 | Select this option for any one of BRCMSTB, iProc NSP and NS2 SoCs |
Tudor Ambarus | 3e84cdd | 2020-07-16 08:11:44 +0300 | [diff] [blame] | 188 | based platforms. This driver works for both SPI master for SPI NOR |
Kamal Dasu | fa236a7 | 2016-08-24 18:04:23 -0400 | [diff] [blame] | 189 | flash device as well as MSPI device. |
| 190 | |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 191 | config SPI_BITBANG |
David Brownell | d29389d | 2009-01-06 14:41:41 -0800 | [diff] [blame] | 192 | tristate "Utilities for Bitbanging SPI masters" |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 193 | help |
| 194 | With a few GPIO pins, your system can bitbang the SPI protocol. |
| 195 | Select this to get SPI support through I/O pins (GPIO, parallel |
| 196 | port, etc). Or, some systems' SPI master controller drivers use |
| 197 | this code to manage the per-word or per-transfer accesses to the |
| 198 | hardware shift registers. |
| 199 | |
| 200 | This is library code, and is automatically selected by drivers that |
| 201 | need it. You only need to select this explicitly to support driver |
| 202 | modules that aren't part of this kernel tree. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 203 | |
David Brownell | 7111763 | 2006-01-08 13:34:29 -0800 | [diff] [blame] | 204 | config SPI_BUTTERFLY |
| 205 | tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)" |
Robert P. J. Day | 6291fe2 | 2008-07-23 21:29:53 -0700 | [diff] [blame] | 206 | depends on PARPORT |
David Brownell | 7111763 | 2006-01-08 13:34:29 -0800 | [diff] [blame] | 207 | select SPI_BITBANG |
| 208 | help |
| 209 | This uses a custom parallel port cable to connect to an AVR |
| 210 | Butterfly <http://www.atmel.com/products/avr/butterfly>, an |
| 211 | inexpensive battery powered microcontroller evaluation board. |
| 212 | This same cable can be used to flash new firmware. |
| 213 | |
Harini Katakam | c474b38 | 2014-04-14 14:36:53 +0530 | [diff] [blame] | 214 | config SPI_CADENCE |
| 215 | tristate "Cadence SPI controller" |
Harini Katakam | c474b38 | 2014-04-14 14:36:53 +0530 | [diff] [blame] | 216 | help |
| 217 | This selects the Cadence SPI controller master driver |
Michal Simek | 38b6484 | 2015-03-09 09:46:15 +0100 | [diff] [blame] | 218 | used by Xilinx Zynq and ZynqMP. |
Harini Katakam | c474b38 | 2014-04-14 14:36:53 +0530 | [diff] [blame] | 219 | |
Ramuthevar Vadivel Murugan | 31fb632 | 2020-06-01 12:34:44 +0530 | [diff] [blame] | 220 | config SPI_CADENCE_QUADSPI |
| 221 | tristate "Cadence Quad SPI controller" |
Ramuthevar Vadivel Murugan | ab2d287 | 2020-11-24 12:18:36 +0800 | [diff] [blame] | 222 | depends on OF && (ARM || ARM64 || X86 || COMPILE_TEST) |
Ramuthevar Vadivel Murugan | 31fb632 | 2020-06-01 12:34:44 +0530 | [diff] [blame] | 223 | help |
| 224 | Enable support for the Cadence Quad SPI Flash controller. |
| 225 | |
| 226 | Cadence QSPI is a specialized controller for connecting an SPI |
| 227 | Flash over 1/2/4-bit wide bus. Enable this option if you have a |
| 228 | device with a Cadence QSPI controller and want to access the |
| 229 | Flash as an MTD device. |
| 230 | |
Parshuram Thombare | a16cc80 | 2021-09-19 10:05:34 +0200 | [diff] [blame] | 231 | config SPI_CADENCE_XSPI |
| 232 | tristate "Cadence XSPI controller" |
| 233 | depends on (OF || COMPILE_TEST) && HAS_IOMEM |
| 234 | depends on SPI_MEM |
| 235 | help |
| 236 | Enable support for the Cadence XSPI Flash controller. |
| 237 | |
| 238 | Cadence XSPI is a specialized controller for connecting an SPI |
| 239 | Flash over upto 8bit wide bus. Enable this option if you have a |
| 240 | device with a Cadence XSPI controller and want to access the |
| 241 | Flash as an MTD device. |
| 242 | |
Alexander Shiyan | 161b96c | 2012-11-07 21:30:29 +0400 | [diff] [blame] | 243 | config SPI_CLPS711X |
| 244 | tristate "CLPS711X host SPI controller" |
Axel Lin | 5634dd8 | 2014-03-26 16:53:18 +0800 | [diff] [blame] | 245 | depends on ARCH_CLPS711X || COMPILE_TEST |
Alexander Shiyan | 161b96c | 2012-11-07 21:30:29 +0400 | [diff] [blame] | 246 | help |
| 247 | This enables dedicated general purpose SPI/Microwire1-compatible |
| 248 | master mode interface (SSI1) for CLPS711X-based CPUs. |
| 249 | |
Steven King | 34b8c66 | 2010-01-20 13:49:44 -0700 | [diff] [blame] | 250 | config SPI_COLDFIRE_QSPI |
| 251 | tristate "Freescale Coldfire QSPI controller" |
Steven King | bce4d12 | 2012-06-05 09:24:59 -0700 | [diff] [blame] | 252 | depends on (M520x || M523x || M5249 || M525x || M527x || M528x || M532x) |
Steven King | 34b8c66 | 2010-01-20 13:49:44 -0700 | [diff] [blame] | 253 | help |
| 254 | This enables support for the Coldfire QSPI controller in master |
| 255 | mode. |
| 256 | |
Sandeep Paulraj | 358934a | 2009-12-16 22:02:18 +0000 | [diff] [blame] | 257 | config SPI_DAVINCI |
Sekhar Nori | 23ce17a | 2010-10-12 11:58:02 +0530 | [diff] [blame] | 258 | tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller" |
Santosh Shilimkar | 7884891 | 2013-07-24 20:31:37 -0400 | [diff] [blame] | 259 | depends on ARCH_DAVINCI || ARCH_KEYSTONE |
Sandeep Paulraj | 358934a | 2009-12-16 22:02:18 +0000 | [diff] [blame] | 260 | select SPI_BITBANG |
| 261 | help |
Sekhar Nori | 23ce17a | 2010-10-12 11:58:02 +0530 | [diff] [blame] | 262 | SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules. |
| 263 | |
Mark Brown | e32bb87 | 2016-02-02 11:27:42 +0000 | [diff] [blame] | 264 | config SPI_DESIGNWARE |
| 265 | tristate "DesignWare SPI controller core support" |
Serge Semin | 6423207 | 2020-10-08 02:55:06 +0300 | [diff] [blame] | 266 | imply SPI_MEM |
Mark Brown | e32bb87 | 2016-02-02 11:27:42 +0000 | [diff] [blame] | 267 | help |
| 268 | general driver for SPI controller core from DesignWare |
| 269 | |
Serge Semin | ecb3a67 | 2020-05-29 16:12:01 +0300 | [diff] [blame] | 270 | if SPI_DESIGNWARE |
| 271 | |
Serge Semin | 6c710c0 | 2020-05-29 16:11:59 +0300 | [diff] [blame] | 272 | config SPI_DW_DMA |
| 273 | bool "DMA support for DW SPI controller" |
Serge Semin | 6c710c0 | 2020-05-29 16:11:59 +0300 | [diff] [blame] | 274 | |
Mark Brown | e32bb87 | 2016-02-02 11:27:42 +0000 | [diff] [blame] | 275 | config SPI_DW_PCI |
| 276 | tristate "PCI interface driver for DW SPI core" |
Serge Semin | ecb3a67 | 2020-05-29 16:12:01 +0300 | [diff] [blame] | 277 | depends on PCI |
Mark Brown | e32bb87 | 2016-02-02 11:27:42 +0000 | [diff] [blame] | 278 | |
Mark Brown | e32bb87 | 2016-02-02 11:27:42 +0000 | [diff] [blame] | 279 | config SPI_DW_MMIO |
| 280 | tristate "Memory-mapped io interface driver for DW SPI core" |
Serge Semin | ecb3a67 | 2020-05-29 16:12:01 +0300 | [diff] [blame] | 281 | depends on HAS_IOMEM |
| 282 | |
Serge Semin | abf0090 | 2020-10-08 02:55:10 +0300 | [diff] [blame] | 283 | config SPI_DW_BT1 |
| 284 | tristate "Baikal-T1 SPI driver for DW SPI core" |
| 285 | depends on MIPS_BAIKAL_T1 || COMPILE_TEST |
Serge Semin | 7218838 | 2020-11-27 17:46:11 +0300 | [diff] [blame] | 286 | select MULTIPLEXER |
| 287 | select MUX_MMIO |
Serge Semin | abf0090 | 2020-10-08 02:55:10 +0300 | [diff] [blame] | 288 | help |
| 289 | Baikal-T1 SoC is equipped with three DW APB SSI-based MMIO SPI |
| 290 | controllers. Two of them are pretty much normal: with IRQ, DMA, |
| 291 | FIFOs of 64 words depth, 4x CSs, but the third one as being a |
| 292 | part of the Baikal-T1 System Boot Controller has got a very |
| 293 | limited resources: no IRQ, no DMA, only a single native |
| 294 | chip-select and Tx/Rx FIFO with just 8 words depth available. |
| 295 | The later one is normally connected to an external SPI-nor flash |
| 296 | of 128Mb (in general can be of bigger size). |
| 297 | |
| 298 | config SPI_DW_BT1_DIRMAP |
| 299 | bool "Directly mapped Baikal-T1 Boot SPI flash support" |
| 300 | depends on SPI_DW_BT1 |
Serge Semin | abf0090 | 2020-10-08 02:55:10 +0300 | [diff] [blame] | 301 | help |
| 302 | Directly mapped SPI flash memory is an interface specific to the |
| 303 | Baikal-T1 System Boot Controller. It is a 16MB MMIO region, which |
| 304 | can be used to access a peripheral memory device just by |
| 305 | reading/writing data from/to it. Note that the system APB bus |
| 306 | will stall during each IO from/to the dirmap region until the |
| 307 | operation is finished. So try not to use it concurrently with |
| 308 | time-critical tasks (like the SPI memory operations implemented |
| 309 | in this driver). |
| 310 | |
Serge Semin | ecb3a67 | 2020-05-29 16:12:01 +0300 | [diff] [blame] | 311 | endif |
Mark Brown | e32bb87 | 2016-02-02 11:27:42 +0000 | [diff] [blame] | 312 | |
Laurentiu Palcu | 3d8c0d74 | 2014-12-08 15:52:29 +0200 | [diff] [blame] | 313 | config SPI_DLN2 |
| 314 | tristate "Diolan DLN-2 USB SPI adapter" |
| 315 | depends on MFD_DLN2 |
| 316 | help |
Krzysztof Kozlowski | 554bbe7 | 2019-11-20 21:39:16 +0800 | [diff] [blame] | 317 | If you say yes to this option, support will be included for Diolan |
| 318 | DLN2, a USB to SPI interface. |
Laurentiu Palcu | 3d8c0d74 | 2014-12-08 15:52:29 +0200 | [diff] [blame] | 319 | |
Krzysztof Kozlowski | 554bbe7 | 2019-11-20 21:39:16 +0800 | [diff] [blame] | 320 | This driver can also be built as a module. If so, the module |
| 321 | will be called spi-dln2. |
Laurentiu Palcu | 3d8c0d74 | 2014-12-08 15:52:29 +0200 | [diff] [blame] | 322 | |
Mika Westerberg | 011f23a | 2010-05-06 04:47:04 +0000 | [diff] [blame] | 323 | config SPI_EP93XX |
| 324 | tristate "Cirrus Logic EP93xx SPI controller" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 325 | depends on ARCH_EP93XX || COMPILE_TEST |
Mika Westerberg | 011f23a | 2010-05-06 04:47:04 +0000 | [diff] [blame] | 326 | help |
| 327 | This enables using the Cirrus EP93xx SPI controller in master |
| 328 | mode. |
| 329 | |
Thomas Langer | 6cd3c7e | 2012-05-20 15:46:19 +0200 | [diff] [blame] | 330 | config SPI_FALCON |
Hauke Mehrtens | 9c6a3af | 2017-01-03 18:04:27 +0100 | [diff] [blame] | 331 | bool "Falcon SPI controller support" |
Thomas Langer | 6cd3c7e | 2012-05-20 15:46:19 +0200 | [diff] [blame] | 332 | depends on SOC_FALCON |
| 333 | help |
| 334 | The external bus unit (EBU) found on the FALC-ON SoC has SPI |
| 335 | emulation that is designed for serial flash access. This driver |
| 336 | has only been tested with m25p80 type chips. The hardware has no |
| 337 | support for other types of SPI peripherals. |
| 338 | |
Eddie James | bbb6b2f | 2020-03-06 13:41:18 -0600 | [diff] [blame] | 339 | config SPI_FSI |
| 340 | tristate "FSI SPI driver" |
| 341 | depends on FSI |
| 342 | help |
| 343 | This enables support for the driver for FSI bus attached SPI |
| 344 | controllers. |
| 345 | |
Gao Pan | 5314987 | 2016-11-22 21:52:17 +0800 | [diff] [blame] | 346 | config SPI_FSL_LPSPI |
| 347 | tristate "Freescale i.MX LPSPI controller" |
| 348 | depends on ARCH_MXC || COMPILE_TEST |
| 349 | help |
| 350 | This enables Freescale i.MX LPSPI controllers in master mode. |
| 351 | |
Frieder Schrempf | 84d0431 | 2019-01-07 09:29:47 +0000 | [diff] [blame] | 352 | config SPI_FSL_QUADSPI |
| 353 | tristate "Freescale QSPI controller" |
| 354 | depends on ARCH_MXC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST |
| 355 | depends on HAS_IOMEM |
| 356 | help |
| 357 | This enables support for the Quad SPI controller in master mode. |
| 358 | Up to four flash chips can be connected on two buses with two |
| 359 | chipselects each. |
| 360 | This controller does not support generic SPI messages. It only |
| 361 | supports the high-level SPI memory interface. |
| 362 | |
Jay Fang | c770d86 | 2021-03-27 17:10:00 +0800 | [diff] [blame] | 363 | config SPI_HISI_KUNPENG |
| 364 | tristate "HiSilicon SPI Controller for Kunpeng SoCs" |
| 365 | depends on (ARM64 && ACPI) || COMPILE_TEST |
| 366 | help |
| 367 | This enables support for HiSilicon SPI controller found on |
| 368 | Kunpeng SoCs. |
| 369 | |
| 370 | This driver can also be built as a module. If so, the module |
| 371 | will be called hisi-kunpeng-spi. |
| 372 | |
John Garry | a2ca53b | 2019-12-09 22:08:09 +0800 | [diff] [blame] | 373 | config SPI_HISI_SFC_V3XX |
Tudor Ambarus | 3e84cdd | 2020-07-16 08:11:44 +0300 | [diff] [blame] | 374 | tristate "HiSilicon SPI NOR Flash Controller for Hi16XX chipsets" |
John Garry | a2ca53b | 2019-12-09 22:08:09 +0800 | [diff] [blame] | 375 | depends on (ARM64 && ACPI) || COMPILE_TEST |
| 376 | depends on HAS_IOMEM |
John Garry | a2ca53b | 2019-12-09 22:08:09 +0800 | [diff] [blame] | 377 | help |
Tudor Ambarus | 3e84cdd | 2020-07-16 08:11:44 +0300 | [diff] [blame] | 378 | This enables support for HiSilicon v3xx SPI NOR flash controller |
John Garry | a2ca53b | 2019-12-09 22:08:09 +0800 | [diff] [blame] | 379 | found in hi16xx chipsets. |
| 380 | |
Yogesh Narayan Gaur | a5356ae | 2019-01-15 12:00:15 +0000 | [diff] [blame] | 381 | config SPI_NXP_FLEXSPI |
| 382 | tristate "NXP Flex SPI controller" |
| 383 | depends on ARCH_LAYERSCAPE || HAS_IOMEM |
| 384 | help |
| 385 | This enables support for the Flex SPI controller in master mode. |
| 386 | Up to four slave devices can be connected on two buses with two |
| 387 | chipselects each. |
| 388 | This controller does not support generic SPI messages and only |
| 389 | supports the high-level SPI memory interface. |
| 390 | |
David Brownell | d29389d | 2009-01-06 14:41:41 -0800 | [diff] [blame] | 391 | config SPI_GPIO |
| 392 | tristate "GPIO-based bitbanging SPI Master" |
Geert Uytterhoeven | 5c2301a | 2015-05-05 18:32:33 +0200 | [diff] [blame] | 393 | depends on GPIOLIB || COMPILE_TEST |
David Brownell | d29389d | 2009-01-06 14:41:41 -0800 | [diff] [blame] | 394 | select SPI_BITBANG |
| 395 | help |
| 396 | This simple GPIO bitbanging SPI master uses the arch-neutral GPIO |
| 397 | interface to manage MOSI, MISO, SCK, and chipselect signals. SPI |
| 398 | slaves connected to a bus using this driver are configured as usual, |
| 399 | except that the spi_board_info.controller_data holds the GPIO number |
| 400 | for the chipselect used by this controller driver. |
| 401 | |
| 402 | Note that this driver often won't achieve even 1 Mbit/sec speeds, |
| 403 | making it unusually slow for SPI. If your platform can inline |
| 404 | GPIO operations, you should be able to leverage that for better |
| 405 | speed with a custom version of this driver; see the source code. |
| 406 | |
Andrew Bresticker | deba2580 | 2014-11-14 10:48:32 -0800 | [diff] [blame] | 407 | config SPI_IMG_SPFI |
| 408 | tristate "IMG SPFI controller" |
| 409 | depends on MIPS || COMPILE_TEST |
| 410 | help |
| 411 | This enables support for the SPFI master controller found on |
| 412 | IMG SoCs. |
| 413 | |
Sascha Hauer | b5f3294 | 2009-09-22 16:46:02 -0700 | [diff] [blame] | 414 | config SPI_IMX |
| 415 | tristate "Freescale i.MX SPI controllers" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 416 | depends on ARCH_MXC || COMPILE_TEST |
Sascha Hauer | b5f3294 | 2009-09-22 16:46:02 -0700 | [diff] [blame] | 417 | select SPI_BITBANG |
| 418 | help |
Fabio Estevam | 2e236ba | 2019-01-26 19:32:07 -0200 | [diff] [blame] | 419 | This enables support for the Freescale i.MX SPI controllers. |
Sascha Hauer | b5f3294 | 2009-09-22 16:46:02 -0700 | [diff] [blame] | 420 | |
Artur Rojek | ae5f94c | 2021-08-31 01:01:38 +0200 | [diff] [blame] | 421 | config SPI_INGENIC |
| 422 | tristate "Ingenic JZ47xx SoCs SPI controller" |
| 423 | depends on MACH_INGENIC || COMPILE_TEST |
| 424 | help |
| 425 | This enables support for the Ingenic JZ47xx SoCs SPI controller. |
| 426 | |
| 427 | To compile this driver as a module, choose M here: the module |
| 428 | will be called spi-ingenic. |
| 429 | |
Rich Felker | 2cb1b3b | 2016-08-04 04:30:37 +0000 | [diff] [blame] | 430 | config SPI_JCORE |
| 431 | tristate "J-Core SPI Master" |
| 432 | depends on OF && (SUPERH || COMPILE_TEST) |
| 433 | help |
| 434 | This enables support for the SPI master controller in the J-Core |
| 435 | synthesizable, open source SoC. |
| 436 | |
Kaiwan N Billimoria | 78961a5 | 2007-07-17 04:04:05 -0700 | [diff] [blame] | 437 | config SPI_LM70_LLP |
| 438 | tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)" |
Kees Cook | 6d1f56a | 2013-01-16 18:53:55 -0800 | [diff] [blame] | 439 | depends on PARPORT |
Kaiwan N Billimoria | 78961a5 | 2007-07-17 04:04:05 -0700 | [diff] [blame] | 440 | select SPI_BITBANG |
| 441 | help |
| 442 | This driver supports the NS LM70 LLP Evaluation Board, |
| 443 | which interfaces to an LM70 temperature sensor using |
| 444 | a parallel port. |
| 445 | |
Sergei Ianovich | 7ecbfff | 2016-02-23 13:44:28 +0300 | [diff] [blame] | 446 | config SPI_LP8841_RTC |
| 447 | tristate "ICP DAS LP-8841 SPI Controller for RTC" |
| 448 | depends on MACH_PXA27X_DT || COMPILE_TEST |
| 449 | help |
| 450 | This driver provides an SPI master device to drive Maxim |
| 451 | DS-1302 real time clock. |
| 452 | |
| 453 | Say N here unless you plan to run the kernel on an ICP DAS |
| 454 | LP-8x4x industrial computer. |
| 455 | |
Grant Likely | 42bbb70 | 2009-11-04 15:34:18 -0700 | [diff] [blame] | 456 | config SPI_MPC52xx |
| 457 | tristate "Freescale MPC52xx SPI (non-PSC) controller support" |
Paul Bolle | 7433f2b | 2011-11-13 22:52:40 +0100 | [diff] [blame] | 458 | depends on PPC_MPC52xx |
Grant Likely | 42bbb70 | 2009-11-04 15:34:18 -0700 | [diff] [blame] | 459 | help |
| 460 | This drivers supports the MPC52xx SPI controller in master SPI |
| 461 | mode. |
| 462 | |
Dragos Carp | 00b8fd2 | 2007-05-10 22:22:52 -0700 | [diff] [blame] | 463 | config SPI_MPC52xx_PSC |
| 464 | tristate "Freescale MPC52xx PSC SPI controller" |
Kees Cook | 6d1f56a | 2013-01-16 18:53:55 -0800 | [diff] [blame] | 465 | depends on PPC_MPC52xx |
Dragos Carp | 00b8fd2 | 2007-05-10 22:22:52 -0700 | [diff] [blame] | 466 | help |
| 467 | This enables using the Freescale MPC52xx Programmable Serial |
| 468 | Controller in master SPI mode. |
| 469 | |
Anatolij Gustschin | 6e27388f1b | 2010-04-30 13:21:27 +0000 | [diff] [blame] | 470 | config SPI_MPC512x_PSC |
| 471 | tristate "Freescale MPC512x PSC SPI controller" |
Uwe Kleine-König | 5e8afa3 | 2012-02-23 10:37:55 +0100 | [diff] [blame] | 472 | depends on PPC_MPC512x |
Anatolij Gustschin | 6e27388f1b | 2010-04-30 13:21:27 +0000 | [diff] [blame] | 473 | help |
| 474 | This enables using the Freescale MPC5121 Programmable Serial |
| 475 | Controller in SPI master mode. |
| 476 | |
Mingkai Hu | b36ece8 | 2010-10-12 18:18:31 +0800 | [diff] [blame] | 477 | config SPI_FSL_LIB |
| 478 | tristate |
Andreas Larsson | e8beacb | 2013-02-15 16:52:21 +0100 | [diff] [blame] | 479 | depends on OF |
| 480 | |
| 481 | config SPI_FSL_CPM |
| 482 | tristate |
Mingkai Hu | b36ece8 | 2010-10-12 18:18:31 +0800 | [diff] [blame] | 483 | depends on FSL_SOC |
| 484 | |
Mingkai Hu | 3272029 | 2010-10-12 18:18:30 +0800 | [diff] [blame] | 485 | config SPI_FSL_SPI |
Esben Haabendal | 38455d7a | 2015-01-06 14:07:34 +0100 | [diff] [blame] | 486 | tristate "Freescale SPI controller and Aeroflex Gaisler GRLIB SPI controller" |
Andreas Larsson | e8beacb | 2013-02-15 16:52:21 +0100 | [diff] [blame] | 487 | depends on OF |
Mingkai Hu | b36ece8 | 2010-10-12 18:18:31 +0800 | [diff] [blame] | 488 | select SPI_FSL_LIB |
Andreas Larsson | e8beacb | 2013-02-15 16:52:21 +0100 | [diff] [blame] | 489 | select SPI_FSL_CPM if FSL_SOC |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 490 | help |
Mingkai Hu | 3272029 | 2010-10-12 18:18:30 +0800 | [diff] [blame] | 491 | This enables using the Freescale SPI controllers in master mode. |
| 492 | MPC83xx platform uses the controller in cpu mode or CPM/QE mode. |
| 493 | MPC8569 uses the controller in QE mode, MPC8610 in cpu mode. |
Andreas Larsson | 447b0c7 | 2013-02-15 16:52:26 +0100 | [diff] [blame] | 494 | This also enables using the Aeroflex Gaisler GRLIB SPI controller in |
| 495 | master mode. |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 496 | |
Chao Fu | 349ad66 | 2013-08-16 11:08:55 +0800 | [diff] [blame] | 497 | config SPI_FSL_DSPI |
| 498 | tristate "Freescale DSPI controller" |
Chao Fu | 1acbdeb | 2014-02-12 15:29:05 +0800 | [diff] [blame] | 499 | select REGMAP_MMIO |
Angelo Dureghello | ec7ed77 | 2017-10-28 00:23:01 +0200 | [diff] [blame] | 500 | depends on SOC_VF610 || SOC_LS1021A || ARCH_LAYERSCAPE || M5441x || COMPILE_TEST |
Chao Fu | 349ad66 | 2013-08-16 11:08:55 +0800 | [diff] [blame] | 501 | help |
| 502 | This enables support for the Freescale DSPI controller in master |
Angelo Dureghello | 0dcdcd0 | 2018-12-26 22:43:00 +0100 | [diff] [blame] | 503 | mode. VF610, LS1021A and ColdFire platforms uses the controller. |
Chao Fu | 349ad66 | 2013-08-16 11:08:55 +0800 | [diff] [blame] | 504 | |
Mingkai Hu | 8b60d6c | 2010-10-12 18:18:32 +0800 | [diff] [blame] | 505 | config SPI_FSL_ESPI |
Esben Haabendal | 38455d7a | 2015-01-06 14:07:34 +0100 | [diff] [blame] | 506 | tristate "Freescale eSPI controller" |
Mingkai Hu | 8b60d6c | 2010-10-12 18:18:32 +0800 | [diff] [blame] | 507 | depends on FSL_SOC |
Mingkai Hu | 8b60d6c | 2010-10-12 18:18:32 +0800 | [diff] [blame] | 508 | help |
| 509 | This enables using the Freescale eSPI controllers in master mode. |
| 510 | From MPC8536, 85xx platform uses the controller, and all P10xx, |
| 511 | P20xx, P30xx,P40xx, P50xx uses this controller. |
| 512 | |
Neil Armstrong | 454fa27 | 2017-05-23 15:39:33 +0200 | [diff] [blame] | 513 | config SPI_MESON_SPICC |
| 514 | tristate "Amlogic Meson SPICC controller" |
Sunny Luo | 3e0cf4d | 2020-03-12 14:31:25 +0100 | [diff] [blame] | 515 | depends on COMMON_CLK |
Neil Armstrong | 454fa27 | 2017-05-23 15:39:33 +0200 | [diff] [blame] | 516 | depends on ARCH_MESON || COMPILE_TEST |
| 517 | help |
| 518 | This enables master mode support for the SPICC (SPI communication |
| 519 | controller) available in Amlogic Meson SoCs. |
| 520 | |
Beniamino Galvani | c3e4bc5 | 2014-11-22 16:21:41 +0100 | [diff] [blame] | 521 | config SPI_MESON_SPIFC |
| 522 | tristate "Amlogic Meson SPIFC controller" |
| 523 | depends on ARCH_MESON || COMPILE_TEST |
Beniamino Galvani | 1327ecd | 2014-11-27 00:07:48 +0100 | [diff] [blame] | 524 | select REGMAP_MMIO |
Beniamino Galvani | c3e4bc5 | 2014-11-22 16:21:41 +0100 | [diff] [blame] | 525 | help |
| 526 | This enables master mode support for the SPIFC (SPI flash |
| 527 | controller) available in Amlogic Meson SoCs. |
| 528 | |
Leilk Liu | a568231 | 2015-08-07 15:19:50 +0800 | [diff] [blame] | 529 | config SPI_MT65XX |
| 530 | tristate "MediaTek SPI controller" |
| 531 | depends on ARCH_MEDIATEK || COMPILE_TEST |
| 532 | help |
| 533 | This selects the MediaTek(R) SPI bus driver. |
| 534 | If you want to use MediaTek(R) SPI interface, |
| 535 | say Y or M here.If you are not sure, say N. |
| 536 | SPI drivers for Mediatek MT65XX and MT81XX series ARM SoCs. |
| 537 | |
Stefan Roese | cbd66c6 | 2019-03-25 09:29:25 +0100 | [diff] [blame] | 538 | config SPI_MT7621 |
| 539 | tristate "MediaTek MT7621 SPI Controller" |
| 540 | depends on RALINK || COMPILE_TEST |
| 541 | help |
| 542 | This selects a driver for the MediaTek MT7621 SPI Controller. |
| 543 | |
Chuanhong Guo | 881d1ee | 2020-03-06 16:50:50 +0800 | [diff] [blame] | 544 | config SPI_MTK_NOR |
| 545 | tristate "MediaTek SPI NOR controller" |
| 546 | depends on ARCH_MEDIATEK || COMPILE_TEST |
| 547 | help |
| 548 | This enables support for SPI NOR controller found on MediaTek |
Tudor Ambarus | 3e84cdd | 2020-07-16 08:11:44 +0300 | [diff] [blame] | 549 | ARM SoCs. This is a controller specifically for SPI NOR flash. |
Chuanhong Guo | 881d1ee | 2020-03-06 16:50:50 +0800 | [diff] [blame] | 550 | It can perform generic SPI transfers up to 6 bytes via generic |
Tudor Ambarus | 3e84cdd | 2020-07-16 08:11:44 +0300 | [diff] [blame] | 551 | SPI interface as well as several SPI NOR specific instructions |
Chuanhong Guo | 881d1ee | 2020-03-06 16:50:50 +0800 | [diff] [blame] | 552 | via SPI MEM interface. |
| 553 | |
Tomer Maimon | ace55c4 | 2019-08-28 17:25:13 +0300 | [diff] [blame] | 554 | config SPI_NPCM_FIU |
| 555 | tristate "Nuvoton NPCM FLASH Interface Unit" |
| 556 | depends on ARCH_NPCM || COMPILE_TEST |
| 557 | depends on OF && HAS_IOMEM |
| 558 | help |
| 559 | This enables support for the Flash Interface Unit SPI controller |
| 560 | in master mode. |
| 561 | This driver does not support generic SPI. The implementation only |
| 562 | supports spi-mem interface. |
| 563 | |
Tomer Maimon | 2a22f1b | 2018-11-12 18:42:32 +0200 | [diff] [blame] | 564 | config SPI_NPCM_PSPI |
| 565 | tristate "Nuvoton NPCM PSPI Controller" |
| 566 | depends on ARCH_NPCM || COMPILE_TEST |
| 567 | help |
| 568 | This driver provides support for Nuvoton NPCM BMC |
| 569 | Peripheral SPI controller in master mode. |
| 570 | |
Hauke Mehrtens | 17f84b7 | 2017-02-14 00:31:11 +0100 | [diff] [blame] | 571 | config SPI_LANTIQ_SSC |
| 572 | tristate "Lantiq SSC SPI controller" |
Dilip Kota | 040f7f9 | 2020-07-17 14:27:57 +0800 | [diff] [blame] | 573 | depends on LANTIQ || X86 || COMPILE_TEST |
Hauke Mehrtens | 17f84b7 | 2017-02-14 00:31:11 +0100 | [diff] [blame] | 574 | help |
| 575 | This driver supports the Lantiq SSC SPI controller in master |
| 576 | mode. This controller is found on Intel (former Lantiq) SoCs like |
Dilip Kota | 040f7f9 | 2020-07-17 14:27:57 +0800 | [diff] [blame] | 577 | the Danube, Falcon, xRX200, xRX300, Lightning Mountain. |
Hauke Mehrtens | 17f84b7 | 2017-02-14 00:31:11 +0100 | [diff] [blame] | 578 | |
Thomas Chou | ce79258 | 2011-02-14 10:20:39 +0800 | [diff] [blame] | 579 | config SPI_OC_TINY |
| 580 | tristate "OpenCores tiny SPI" |
Geert Uytterhoeven | 5c2301a | 2015-05-05 18:32:33 +0200 | [diff] [blame] | 581 | depends on GPIOLIB || COMPILE_TEST |
Thomas Chou | ce79258 | 2011-02-14 10:20:39 +0800 | [diff] [blame] | 582 | select SPI_BITBANG |
| 583 | help |
| 584 | This is the driver for OpenCores tiny SPI master controller. |
| 585 | |
David Daney | 6b52c00 | 2012-08-22 12:25:07 -0700 | [diff] [blame] | 586 | config SPI_OCTEON |
| 587 | tristate "Cavium OCTEON SPI controller" |
David Daney | 9ddebc4 | 2013-05-22 15:10:46 +0000 | [diff] [blame] | 588 | depends on CAVIUM_OCTEON_SOC |
David Daney | 6b52c00 | 2012-08-22 12:25:07 -0700 | [diff] [blame] | 589 | help |
| 590 | SPI host driver for the hardware found on some Cavium OCTEON |
| 591 | SOCs. |
| 592 | |
David Brownell | fdb3c18 | 2007-02-12 00:52:37 -0800 | [diff] [blame] | 593 | config SPI_OMAP_UWIRE |
| 594 | tristate "OMAP1 MicroWire" |
Robert P. J. Day | 6291fe2 | 2008-07-23 21:29:53 -0700 | [diff] [blame] | 595 | depends on ARCH_OMAP1 |
David Brownell | fdb3c18 | 2007-02-12 00:52:37 -0800 | [diff] [blame] | 596 | select SPI_BITBANG |
| 597 | help |
| 598 | This hooks up to the MicroWire controller on OMAP1 chips. |
| 599 | |
Samuel Ortiz | ccdc7bf | 2007-07-17 04:04:13 -0700 | [diff] [blame] | 600 | config SPI_OMAP24XX |
Syed Rafiuddin | 8ebeb54 | 2010-05-14 12:05:25 -0700 | [diff] [blame] | 601 | tristate "McSPI driver for OMAP" |
Vignesh R | 81df42d | 2018-11-07 16:09:26 +0530 | [diff] [blame] | 602 | depends on ARCH_OMAP2PLUS || ARCH_K3 || COMPILE_TEST |
Franklin S Cooper Jr | 2b32e98 | 2016-07-07 12:17:49 -0500 | [diff] [blame] | 603 | select SG_SPLIT |
Samuel Ortiz | ccdc7bf | 2007-07-17 04:04:13 -0700 | [diff] [blame] | 604 | help |
Syed Rafiuddin | 8ebeb54 | 2010-05-14 12:05:25 -0700 | [diff] [blame] | 605 | SPI master controller for OMAP24XX and later Multichannel SPI |
Samuel Ortiz | ccdc7bf | 2007-07-17 04:04:13 -0700 | [diff] [blame] | 606 | (McSPI) modules. |
Andrea Paterniani | 69c202a | 2007-02-12 00:52:39 -0800 | [diff] [blame] | 607 | |
Sourav Poddar | 505a149 | 2013-08-20 18:55:48 +0530 | [diff] [blame] | 608 | config SPI_TI_QSPI |
| 609 | tristate "DRA7xxx QSPI controller support" |
| 610 | depends on ARCH_OMAP2PLUS || COMPILE_TEST |
| 611 | help |
| 612 | QSPI master controller for DRA7xxx used for flash devices. |
| 613 | This device supports single, dual and quad read support, while |
| 614 | it only supports single write mode. |
| 615 | |
Cory Maccarrone | 35c9049 | 2009-12-13 01:02:11 -0700 | [diff] [blame] | 616 | config SPI_OMAP_100K |
| 617 | tristate "OMAP SPI 100K" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 618 | depends on ARCH_OMAP850 || ARCH_OMAP730 || COMPILE_TEST |
Cory Maccarrone | 35c9049 | 2009-12-13 01:02:11 -0700 | [diff] [blame] | 619 | help |
| 620 | OMAP SPI 100K master controller for omap7xx boards. |
| 621 | |
Shadi Ammouri | 60cadec | 2008-08-05 13:01:09 -0700 | [diff] [blame] | 622 | config SPI_ORION |
Kees Cook | 6d1f56a | 2013-01-16 18:53:55 -0800 | [diff] [blame] | 623 | tristate "Orion SPI master" |
Thomas Petazzoni | 710a1d5 | 2016-04-22 15:17:28 +0200 | [diff] [blame] | 624 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
Shadi Ammouri | 60cadec | 2008-08-05 13:01:09 -0700 | [diff] [blame] | 625 | help |
Uwe Kleine-König | 7348291 | 2016-11-30 11:47:44 +0100 | [diff] [blame] | 626 | This enables using the SPI master controller on the Orion |
| 627 | and MVEBU chips. |
Shadi Ammouri | 60cadec | 2008-08-05 13:01:09 -0700 | [diff] [blame] | 628 | |
Purna Chandra Mandal | 1bcb9f8c | 2016-04-01 16:48:50 +0530 | [diff] [blame] | 629 | config SPI_PIC32 |
| 630 | tristate "Microchip PIC32 series SPI" |
| 631 | depends on MACH_PIC32 || COMPILE_TEST |
| 632 | help |
| 633 | SPI driver for Microchip PIC32 SPI master controller. |
| 634 | |
Purna Chandra Mandal | 3270ac2 | 2016-04-15 16:57:19 +0530 | [diff] [blame] | 635 | config SPI_PIC32_SQI |
| 636 | tristate "Microchip PIC32 Quad SPI driver" |
| 637 | depends on MACH_PIC32 || COMPILE_TEST |
| 638 | help |
| 639 | SPI driver for PIC32 Quad SPI controller. |
| 640 | |
Linus Walleij | b43d65f | 2009-06-09 08:11:42 +0100 | [diff] [blame] | 641 | config SPI_PL022 |
Linus Walleij | 7f9a4b9 | 2011-05-19 14:13:19 +0200 | [diff] [blame] | 642 | tristate "ARM AMBA PL022 SSP controller" |
| 643 | depends on ARM_AMBA |
linus.walleij@stericsson.com | f33b29e | 2009-09-22 16:46:01 -0700 | [diff] [blame] | 644 | default y if ARCH_REALVIEW |
| 645 | default y if INTEGRATOR_IMPD1 |
| 646 | default y if ARCH_VERSATILE |
Linus Walleij | b43d65f | 2009-06-09 08:11:42 +0100 | [diff] [blame] | 647 | help |
| 648 | This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP |
| 649 | controller. If you have an embedded system with an AMBA(R) |
| 650 | bus and a PL022 controller, say Y or M here. |
| 651 | |
Steven A. Falco | 44dab88 | 2009-09-22 16:45:58 -0700 | [diff] [blame] | 652 | config SPI_PPC4xx |
| 653 | tristate "PPC4xx SPI Controller" |
Uwe Kleine-König | 5e8afa3 | 2012-02-23 10:37:55 +0100 | [diff] [blame] | 654 | depends on PPC32 && 4xx |
Steven A. Falco | 44dab88 | 2009-09-22 16:45:58 -0700 | [diff] [blame] | 655 | select SPI_BITBANG |
| 656 | help |
| 657 | This selects a driver for the PPC4xx SPI Controller. |
| 658 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 659 | config SPI_PXA2XX |
| 660 | tristate "PXA2xx SSP SPI master" |
Geert Uytterhoeven | 0d44164 | 2020-02-10 10:30:27 +0100 | [diff] [blame] | 661 | depends on ARCH_PXA || ARCH_MMP || PCI || ACPI || COMPILE_TEST |
Arnd Bergmann | 128345b | 2017-08-07 17:42:55 +0200 | [diff] [blame] | 662 | select PXA_SSP if ARCH_PXA || ARCH_MMP |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 663 | help |
Sebastian Andrzej Siewior | d6ea3df | 2010-11-24 10:17:14 +0100 | [diff] [blame] | 664 | This enables using a PXA2xx or Sodaville SSP port as a SPI master |
| 665 | controller. The driver can be configured to use any SSP port and |
Mauro Carvalho Chehab | 9cdd273 | 2019-07-31 17:08:50 -0300 | [diff] [blame] | 666 | additional documentation can be found a Documentation/spi/pxa2xx.rst. |
Sebastian Andrzej Siewior | d6ea3df | 2010-11-24 10:17:14 +0100 | [diff] [blame] | 667 | |
| 668 | config SPI_PXA2XX_PCI |
Chew, Chiau Ee | afa93c9 | 2014-07-25 01:10:54 +0800 | [diff] [blame] | 669 | def_tristate SPI_PXA2XX && PCI && COMMON_CLK |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 670 | |
addy ke | 64e3682 | 2014-07-01 09:03:59 +0800 | [diff] [blame] | 671 | config SPI_ROCKCHIP |
| 672 | tristate "Rockchip SPI controller driver" |
| 673 | help |
| 674 | This selects a driver for Rockchip SPI controller. |
| 675 | |
| 676 | If you say yes to this option, support will be included for |
| 677 | RK3066, RK3188 and RK3288 families of SPI controller. |
| 678 | Rockchip SPI controller support DMA transport and PIO mode. |
| 679 | The main usecase of this controller is to use spi flash as boot |
| 680 | device. |
| 681 | |
Chris Morgan | 0b89fc0 | 2021-08-12 21:45:42 +0800 | [diff] [blame] | 682 | config SPI_ROCKCHIP_SFC |
| 683 | tristate "Rockchip Serial Flash Controller (SFC)" |
| 684 | depends on ARCH_ROCKCHIP || COMPILE_TEST |
| 685 | depends on HAS_IOMEM && HAS_DMA |
| 686 | help |
| 687 | This enables support for Rockchip serial flash controller. This |
| 688 | is a specialized controller used to access SPI flash on some |
| 689 | Rockchip SOCs. |
| 690 | |
| 691 | ROCKCHIP SFC supports DMA and PIO modes. When DMA is not available, |
| 692 | the driver automatically falls back to PIO mode. |
| 693 | |
Bert Vermeulen | 05aec35 | 2015-04-15 17:43:52 +0200 | [diff] [blame] | 694 | config SPI_RB4XX |
| 695 | tristate "Mikrotik RB4XX SPI master" |
| 696 | depends on SPI_MASTER && ATH79 |
| 697 | help |
| 698 | SPI controller driver for the Mikrotik RB4xx series boards. |
| 699 | |
Sergei Shtylyov | eb8d6d4 | 2020-06-13 22:18:34 +0300 | [diff] [blame] | 700 | config SPI_RPCIF |
| 701 | tristate "Renesas RPC-IF SPI driver" |
| 702 | depends on RENESAS_RPCIF |
| 703 | help |
Adam Ford | f4a10fc | 2021-01-02 05:54:11 -0600 | [diff] [blame] | 704 | SPI driver for Renesas R-Car Gen3 or RZ/G2 RPC-IF. |
Sergei Shtylyov | eb8d6d4 | 2020-06-13 22:18:34 +0300 | [diff] [blame] | 705 | |
Shimoda, Yoshihiro | 0b2182d | 2012-03-07 14:46:25 +0900 | [diff] [blame] | 706 | config SPI_RSPI |
Geert Uytterhoeven | e290c34 | 2014-01-21 16:10:09 +0100 | [diff] [blame] | 707 | tristate "Renesas RSPI/QSPI controller" |
Simon Horman | 3aec316 | 2016-02-18 10:47:52 +0900 | [diff] [blame] | 708 | depends on SUPERH || ARCH_RENESAS || COMPILE_TEST |
Shimoda, Yoshihiro | 0b2182d | 2012-03-07 14:46:25 +0900 | [diff] [blame] | 709 | help |
Geert Uytterhoeven | e290c34 | 2014-01-21 16:10:09 +0100 | [diff] [blame] | 710 | SPI driver for Renesas RSPI and QSPI blocks. |
Shimoda, Yoshihiro | 0b2182d | 2012-03-07 14:46:25 +0900 | [diff] [blame] | 711 | |
Girish Mahadevan | 04000dc | 2018-10-02 14:47:08 -0700 | [diff] [blame] | 712 | config SPI_QCOM_QSPI |
| 713 | tristate "QTI QSPI controller" |
| 714 | depends on ARCH_QCOM |
| 715 | help |
| 716 | QSPI(Quad SPI) driver for Qualcomm QSPI controller. |
| 717 | |
Ivan T. Ivanov | 64ff247 | 2014-02-13 18:21:38 +0200 | [diff] [blame] | 718 | config SPI_QUP |
| 719 | tristate "Qualcomm SPI controller with QUP interface" |
Alex Dewar | 2abaad6 | 2020-09-04 17:37:10 +0100 | [diff] [blame] | 720 | depends on ARCH_QCOM || COMPILE_TEST |
Ivan T. Ivanov | 64ff247 | 2014-02-13 18:21:38 +0200 | [diff] [blame] | 721 | help |
| 722 | Qualcomm Universal Peripheral (QUP) core is an AHB slave that |
| 723 | provides a common data path (an output FIFO and an input FIFO) |
| 724 | for serial peripheral interface (SPI) mini-core. SPI in master |
| 725 | mode supports up to 50MHz, up to four chip selects, programmable |
| 726 | data path from 4 bits to 32 bits and numerous protocol variants. |
| 727 | |
| 728 | This driver can also be built as a module. If so, the module |
| 729 | will be called spi_qup. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 730 | |
Girish Mahadevan | 561de45 | 2018-10-03 19:14:25 +0530 | [diff] [blame] | 731 | config SPI_QCOM_GENI |
| 732 | tristate "Qualcomm GENI based SPI controller" |
| 733 | depends on QCOM_GENI_SE |
| 734 | help |
| 735 | This driver supports GENI serial engine based SPI controller in |
| 736 | master mode on the Qualcomm Technologies Inc.'s SoCs. If you say |
| 737 | yes to this option, support will be included for the built-in SPI |
| 738 | interface on the Qualcomm Technologies Inc.'s SoCs. |
| 739 | |
| 740 | This driver can also be built as a module. If so, the module |
| 741 | will be called spi-geni-qcom. |
| 742 | |
David Brownell | 85abfaa | 2007-02-12 00:52:36 -0800 | [diff] [blame] | 743 | config SPI_S3C24XX |
| 744 | tristate "Samsung S3C24XX series SPI" |
Kees Cook | 6d1f56a | 2013-01-16 18:53:55 -0800 | [diff] [blame] | 745 | depends on ARCH_S3C24XX |
David Brownell | da0abc2 | 2007-07-17 04:04:09 -0700 | [diff] [blame] | 746 | select SPI_BITBANG |
David Brownell | 85abfaa | 2007-02-12 00:52:36 -0800 | [diff] [blame] | 747 | help |
| 748 | SPI driver for Samsung S3C24XX series ARM SoCs |
| 749 | |
Ben Dooks | bec0806 | 2009-12-14 22:20:24 -0800 | [diff] [blame] | 750 | config SPI_S3C24XX_FIQ |
| 751 | bool "S3C24XX driver with FIQ pseudo-DMA" |
| 752 | depends on SPI_S3C24XX |
| 753 | select FIQ |
| 754 | help |
| 755 | Enable FIQ support for the S3C24XX SPI driver to provide pseudo |
| 756 | DMA by using the fast-interrupt request framework, This allows |
| 757 | the driver to get DMA-like performance when there are either |
| 758 | no free DMA channels, or when doing transfers that required both |
| 759 | TX and RX data paths. |
| 760 | |
Jassi Brar | 230d42d | 2009-11-30 07:39:42 +0000 | [diff] [blame] | 761 | config SPI_S3C64XX |
Krzysztof Kozlowski | 5b71cbf | 2021-09-24 15:31:14 +0200 | [diff] [blame] | 762 | tristate "Samsung S3C64XX/Exynos SoC series type SPI" |
Arnd Bergmann | db8230d | 2020-08-06 20:20:35 +0200 | [diff] [blame] | 763 | depends on (PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST) |
Jassi Brar | 230d42d | 2009-11-30 07:39:42 +0000 | [diff] [blame] | 764 | help |
Krzysztof Kozlowski | 5b71cbf | 2021-09-24 15:31:14 +0200 | [diff] [blame] | 765 | SPI driver for Samsung S3C64XX, S5Pv210 and Exynos SoCs. |
| 766 | Choose Y/M here only if you build for such Samsung SoC. |
Jassi Brar | 230d42d | 2009-11-30 07:39:42 +0000 | [diff] [blame] | 767 | |
Guenter Roeck | 3ce8859 | 2012-08-18 09:06:27 -0700 | [diff] [blame] | 768 | config SPI_SC18IS602 |
| 769 | tristate "NXP SC18IS602/602B/603 I2C to SPI bridge" |
| 770 | depends on I2C |
| 771 | help |
| 772 | SPI driver for NXP SC18IS602/602B/603 I2C to SPI bridge. |
| 773 | |
Magnus Damm | 8051eff | 2009-11-26 11:10:05 +0000 | [diff] [blame] | 774 | config SPI_SH_MSIOF |
| 775 | tristate "SuperH MSIOF SPI controller" |
Geert Uytterhoeven | e5b43ed | 2018-04-17 19:49:18 +0200 | [diff] [blame] | 776 | depends on HAVE_CLK |
Geert Uytterhoeven | 6ffc84d | 2016-08-31 11:37:05 +0200 | [diff] [blame] | 777 | depends on ARCH_SHMOBILE || ARCH_RENESAS || COMPILE_TEST |
Magnus Damm | 8051eff | 2009-11-26 11:10:05 +0000 | [diff] [blame] | 778 | help |
Bastian Hecht | 746aeff | 2012-11-07 12:40:05 +0100 | [diff] [blame] | 779 | SPI driver for SuperH and SH Mobile MSIOF blocks. |
Magnus Damm | 8051eff | 2009-11-26 11:10:05 +0000 | [diff] [blame] | 780 | |
Yoshihiro Shimoda | 5c05dd0 | 2011-02-15 10:30:32 +0900 | [diff] [blame] | 781 | config SPI_SH |
| 782 | tristate "SuperH SPI controller" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 783 | depends on SUPERH || COMPILE_TEST |
Yoshihiro Shimoda | 5c05dd0 | 2011-02-15 10:30:32 +0900 | [diff] [blame] | 784 | help |
| 785 | SPI driver for SuperH SPI blocks. |
| 786 | |
Magnus Damm | 37e4664 | 2008-02-06 01:38:15 -0800 | [diff] [blame] | 787 | config SPI_SH_SCI |
| 788 | tristate "SuperH SCI SPI controller" |
Robert P. J. Day | 6291fe2 | 2008-07-23 21:29:53 -0700 | [diff] [blame] | 789 | depends on SUPERH |
Magnus Damm | 37e4664 | 2008-02-06 01:38:15 -0800 | [diff] [blame] | 790 | select SPI_BITBANG |
| 791 | help |
| 792 | SPI driver for SuperH SCI blocks. |
| 793 | |
Kuninori Morimoto | d1c8bbd | 2012-03-01 17:10:17 -0800 | [diff] [blame] | 794 | config SPI_SH_HSPI |
| 795 | tristate "SuperH HSPI controller" |
Simon Horman | 3aec316 | 2016-02-18 10:47:52 +0900 | [diff] [blame] | 796 | depends on ARCH_RENESAS || COMPILE_TEST |
Kuninori Morimoto | d1c8bbd | 2012-03-01 17:10:17 -0800 | [diff] [blame] | 797 | help |
| 798 | SPI driver for SuperH HSPI blocks. |
| 799 | |
Yash Shah | 484a9a6 | 2019-02-19 17:10:07 +0530 | [diff] [blame] | 800 | config SPI_SIFIVE |
| 801 | tristate "SiFive SPI controller" |
| 802 | depends on HAS_IOMEM |
| 803 | help |
| 804 | This exposes the SPI controller IP from SiFive. |
| 805 | |
Leilk Liu | 805be7d | 2018-09-28 18:53:04 +0800 | [diff] [blame] | 806 | config SPI_SLAVE_MT27XX |
| 807 | tristate "MediaTek SPI slave device" |
| 808 | depends on ARCH_MEDIATEK || COMPILE_TEST |
| 809 | depends on SPI_SLAVE |
| 810 | help |
| 811 | This selects the MediaTek(R) SPI slave device driver. |
| 812 | If you want to use MediaTek(R) SPI slave interface, |
| 813 | say Y or M here.If you are not sure, say N. |
| 814 | SPI slave drivers for Mediatek MT27XX series ARM SoCs. |
| 815 | |
Lanqing Liu | e7d973a | 2018-08-16 20:54:51 +0800 | [diff] [blame] | 816 | config SPI_SPRD |
| 817 | tristate "Spreadtrum SPI controller" |
| 818 | depends on ARCH_SPRD || COMPILE_TEST |
| 819 | help |
| 820 | SPI driver for Spreadtrum SoCs. |
| 821 | |
Baolin Wang | 7e2903c | 2017-09-15 15:29:16 +0800 | [diff] [blame] | 822 | config SPI_SPRD_ADI |
| 823 | tristate "Spreadtrum ADI controller" |
| 824 | depends on ARCH_SPRD || COMPILE_TEST |
Arnd Bergmann | e83f374 | 2017-10-05 22:39:37 +0200 | [diff] [blame] | 825 | depends on HWSPINLOCK || (COMPILE_TEST && !HWSPINLOCK) |
Baolin Wang | 7e2903c | 2017-09-15 15:29:16 +0800 | [diff] [blame] | 826 | help |
| 827 | ADI driver based on SPI for Spreadtrum SoCs. |
| 828 | |
Amelie Delaunay | dcbe0d8 | 2017-06-21 16:32:06 +0200 | [diff] [blame] | 829 | config SPI_STM32 |
| 830 | tristate "STMicroelectronics STM32 SPI controller" |
| 831 | depends on ARCH_STM32 || COMPILE_TEST |
| 832 | help |
Cezary Gapinski | bb35c9f | 2018-12-24 23:00:30 +0100 | [diff] [blame] | 833 | SPI driver for STMicroelectronics STM32 SoCs. |
Amelie Delaunay | dcbe0d8 | 2017-06-21 16:32:06 +0200 | [diff] [blame] | 834 | |
| 835 | STM32 SPI controller supports DMA and PIO modes. When DMA |
| 836 | is not available, the driver automatically falls back to |
| 837 | PIO mode. |
| 838 | |
Ludovic Barre | c530cd1 | 2018-10-05 09:43:03 +0200 | [diff] [blame] | 839 | config SPI_STM32_QSPI |
| 840 | tristate "STMicroelectronics STM32 QUAD SPI controller" |
| 841 | depends on ARCH_STM32 || COMPILE_TEST |
| 842 | depends on OF |
Patrice Chotard | 6829222 | 2021-06-04 09:50:09 +0200 | [diff] [blame] | 843 | depends on SPI_MEM |
Ludovic Barre | c530cd1 | 2018-10-05 09:43:03 +0200 | [diff] [blame] | 844 | help |
| 845 | This enables support for the Quad SPI controller in master mode. |
| 846 | This driver does not support generic SPI. The implementation only |
| 847 | supports spi-mem interface. |
| 848 | |
Lee Jones | 9e86237 | 2014-12-09 20:21:30 +0000 | [diff] [blame] | 849 | config SPI_ST_SSC4 |
| 850 | tristate "STMicroelectronics SPI SSC-based driver" |
Axel Lin | 83fefd2 | 2016-04-29 13:38:41 +0800 | [diff] [blame] | 851 | depends on ARCH_STI || COMPILE_TEST |
Lee Jones | 9e86237 | 2014-12-09 20:21:30 +0000 | [diff] [blame] | 852 | help |
| 853 | STMicroelectronics SoCs support for SPI. If you say yes to |
| 854 | this option, support will be included for the SSC driven SPI. |
| 855 | |
Maxime Ripard | b5f6517 | 2014-02-22 22:35:53 +0100 | [diff] [blame] | 856 | config SPI_SUN4I |
| 857 | tristate "Allwinner A10 SoCs SPI controller" |
| 858 | depends on ARCH_SUNXI || COMPILE_TEST |
| 859 | help |
| 860 | SPI driver for Allwinner sun4i, sun5i and sun7i SoCs |
| 861 | |
Maxime Ripard | 3558fe9 | 2014-02-05 14:05:05 +0100 | [diff] [blame] | 862 | config SPI_SUN6I |
| 863 | tristate "Allwinner A31 SPI controller" |
| 864 | depends on ARCH_SUNXI || COMPILE_TEST |
Mark Brown | 7961656 | 2014-02-06 10:53:51 +0000 | [diff] [blame] | 865 | depends on RESET_CONTROLLER |
Maxime Ripard | 3558fe9 | 2014-02-05 14:05:05 +0100 | [diff] [blame] | 866 | help |
| 867 | This enables using the SPI controller on the Allwinner A31 SoCs. |
| 868 | |
Masahisa Kojima | b0823ee | 2019-06-04 14:12:57 +0900 | [diff] [blame] | 869 | config SPI_SYNQUACER |
| 870 | tristate "Socionext's SynQuacer HighSpeed SPI controller" |
| 871 | depends on ARCH_SYNQUACER || COMPILE_TEST |
| 872 | help |
| 873 | SPI driver for Socionext's High speed SPI controller which provides |
| 874 | various operating modes for interfacing to serial peripheral devices |
| 875 | that use the de-facto standard SPI protocol. |
| 876 | |
| 877 | It also supports the new dual-bit and quad-bit SPI protocol. |
| 878 | |
Mason Yang | b942d80 | 2018-10-17 10:08:11 +0800 | [diff] [blame] | 879 | config SPI_MXIC |
Krzysztof Kozlowski | 554bbe7 | 2019-11-20 21:39:16 +0800 | [diff] [blame] | 880 | tristate "Macronix MX25F0A SPI controller" |
| 881 | depends on SPI_MASTER |
| 882 | help |
| 883 | This selects the Macronix MX25F0A SPI controller driver. |
Mason Yang | b942d80 | 2018-10-17 10:08:11 +0800 | [diff] [blame] | 884 | |
Marek Vasut | 646781d3 | 2012-08-03 17:26:11 +0200 | [diff] [blame] | 885 | config SPI_MXS |
| 886 | tristate "Freescale MXS SPI controller" |
| 887 | depends on ARCH_MXS |
| 888 | select STMP_DEVICE |
| 889 | help |
| 890 | SPI driver for Freescale MXS devices. |
| 891 | |
Sowjanya Komatineni | 921fc18 | 2020-12-21 13:17:34 -0800 | [diff] [blame] | 892 | config SPI_TEGRA210_QUAD |
| 893 | tristate "NVIDIA Tegra QSPI Controller" |
| 894 | depends on ARCH_TEGRA || COMPILE_TEST |
| 895 | depends on RESET_CONTROLLER |
| 896 | help |
| 897 | QSPI driver for NVIDIA Tegra QSPI Controller interface. This |
| 898 | controller is different from the SPI controller and is available |
| 899 | on Tegra SoCs starting from Tegra210. |
| 900 | |
Laxman Dewangan | f333a33 | 2013-02-22 18:07:39 +0530 | [diff] [blame] | 901 | config SPI_TEGRA114 |
| 902 | tristate "NVIDIA Tegra114 SPI Controller" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 903 | depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST |
Geert Uytterhoeven | e5b43ed | 2018-04-17 19:49:18 +0200 | [diff] [blame] | 904 | depends on RESET_CONTROLLER |
Laxman Dewangan | f333a33 | 2013-02-22 18:07:39 +0530 | [diff] [blame] | 905 | help |
| 906 | SPI driver for NVIDIA Tegra114 SPI Controller interface. This controller |
| 907 | is different than the older SoCs SPI controller and also register interface |
| 908 | get changed with this controller. |
| 909 | |
Laxman Dewangan | 8528547 | 2012-11-14 05:54:47 +0530 | [diff] [blame] | 910 | config SPI_TEGRA20_SFLASH |
| 911 | tristate "Nvidia Tegra20 Serial flash Controller" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 912 | depends on ARCH_TEGRA || COMPILE_TEST |
Stephen Warren | ff2251e | 2013-11-06 16:31:24 -0700 | [diff] [blame] | 913 | depends on RESET_CONTROLLER |
Laxman Dewangan | 8528547 | 2012-11-14 05:54:47 +0530 | [diff] [blame] | 914 | help |
| 915 | SPI driver for Nvidia Tegra20 Serial flash Controller interface. |
| 916 | The main usecase of this controller is to use spi flash as boot |
| 917 | device. |
| 918 | |
Laxman Dewangan | dc4dc36 | 2012-10-30 12:34:05 +0530 | [diff] [blame] | 919 | config SPI_TEGRA20_SLINK |
| 920 | tristate "Nvidia Tegra20/Tegra30 SLINK Controller" |
Mark Brown | dd1053a | 2013-07-05 19:42:58 +0100 | [diff] [blame] | 921 | depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST |
Geert Uytterhoeven | e5b43ed | 2018-04-17 19:49:18 +0200 | [diff] [blame] | 922 | depends on RESET_CONTROLLER |
Laxman Dewangan | dc4dc36 | 2012-10-30 12:34:05 +0530 | [diff] [blame] | 923 | help |
| 924 | SPI driver for Nvidia Tegra20/Tegra30 SLINK Controller interface. |
| 925 | |
Jan Glauber | 7347a6c7 | 2016-08-19 16:03:20 +0200 | [diff] [blame] | 926 | config SPI_THUNDERX |
| 927 | tristate "Cavium ThunderX SPI controller" |
| 928 | depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) |
| 929 | help |
| 930 | SPI host driver for the hardware found on Cavium ThunderX |
| 931 | SOCs. |
| 932 | |
Masayuki Ohtake | e8b17b5 | 2010-10-08 12:44:49 -0600 | [diff] [blame] | 933 | config SPI_TOPCLIFF_PCH |
Tomoya MORINAGA | 92b3a5c | 2011-10-28 09:35:21 +0900 | [diff] [blame] | 934 | tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) SPI" |
Paul Burton | f05ca85 | 2015-11-30 16:21:42 +0000 | [diff] [blame] | 935 | depends on PCI && (X86_32 || MIPS || COMPILE_TEST) |
Masayuki Ohtake | e8b17b5 | 2010-10-08 12:44:49 -0600 | [diff] [blame] | 936 | help |
Grant Likely | cdbc8f0 | 2010-10-08 12:56:13 -0600 | [diff] [blame] | 937 | SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus |
| 938 | used in some x86 embedded processors. |
Masayuki Ohtake | e8b17b5 | 2010-10-08 12:44:49 -0600 | [diff] [blame] | 939 | |
Tomoya MORINAGA | 92b3a5c | 2011-10-28 09:35:21 +0900 | [diff] [blame] | 940 | This driver also supports the ML7213/ML7223/ML7831, a companion chip |
| 941 | for the Atom E6xx series and compatible with the Intel EG20T PCH. |
Tomoya MORINAGA | f016aeb | 2011-06-07 14:50:10 +0900 | [diff] [blame] | 942 | |
Keiji Hayashibara | 5ba155a | 2018-08-01 16:29:12 +0900 | [diff] [blame] | 943 | config SPI_UNIPHIER |
| 944 | tristate "Socionext UniPhier SPI Controller" |
| 945 | depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF |
Kunihiko Hayashi | 6a09140 | 2020-05-11 17:25:29 +0900 | [diff] [blame] | 946 | depends on HAS_IOMEM |
Keiji Hayashibara | 5ba155a | 2018-08-01 16:29:12 +0900 | [diff] [blame] | 947 | help |
| 948 | This enables a driver for the Socionext UniPhier SoC SCSSI SPI controller. |
| 949 | |
| 950 | UniPhier SoCs have SCSSI and MCSSI SPI controllers. |
| 951 | Every UniPhier SoC has SCSSI which supports single channel. |
| 952 | Older UniPhier Pro4/Pro5 also has MCSSI which support multiple channels. |
| 953 | This driver supports SCSSI only. |
| 954 | |
| 955 | If your SoC supports SCSSI, say Y here. |
| 956 | |
Lars-Peter Clausen | b316590 | 2012-07-19 18:44:07 +0200 | [diff] [blame] | 957 | config SPI_XCOMM |
| 958 | tristate "Analog Devices AD-FMCOMMS1-EBZ SPI-I2C-bridge driver" |
| 959 | depends on I2C |
| 960 | help |
| 961 | Support for the SPI-I2C bridge found on the Analog Devices |
| 962 | AD-FMCOMMS1-EBZ board. |
| 963 | |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 964 | config SPI_XILINX |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 965 | tristate "Xilinx SPI controller common module" |
Kees Cook | 6d1f56a | 2013-01-16 18:53:55 -0800 | [diff] [blame] | 966 | depends on HAS_IOMEM |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 967 | select SPI_BITBANG |
| 968 | help |
| 969 | This exposes the SPI controller IP from the Xilinx EDK. |
| 970 | |
| 971 | See the "OPB Serial Peripheral Interface (SPI) (v1.00e)" |
| 972 | Product Specification document (DS464) for hardware details. |
| 973 | |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 974 | Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)" |
| 975 | |
Kamlakant Patel | d8c80d4 | 2015-08-27 17:49:28 +0530 | [diff] [blame] | 976 | config SPI_XLP |
Rob Herring | f7d344f | 2021-11-09 10:13:25 -0600 | [diff] [blame] | 977 | tristate "Cavium ThunderX2 SPI controller driver" |
| 978 | depends on ARCH_THUNDER2 || COMPILE_TEST |
Kamlakant Patel | d8c80d4 | 2015-08-27 17:49:28 +0530 | [diff] [blame] | 979 | help |
Rob Herring | f7d344f | 2021-11-09 10:13:25 -0600 | [diff] [blame] | 980 | Enable support for the SPI controller on the Cavium ThunderX2. |
| 981 | (Originally on Netlogic XLP SoCs.) |
Kamlakant Patel | d8c80d4 | 2015-08-27 17:49:28 +0530 | [diff] [blame] | 982 | |
Rob Herring | f7d344f | 2021-11-09 10:13:25 -0600 | [diff] [blame] | 983 | If you have a Cavium ThunderX2 platform say Y here. |
Kamlakant Patel | d8c80d4 | 2015-08-27 17:49:28 +0530 | [diff] [blame] | 984 | If unsure, say N. |
| 985 | |
Max Filippov | 6840cc2 | 2014-03-12 21:55:24 +0400 | [diff] [blame] | 986 | config SPI_XTENSA_XTFPGA |
| 987 | tristate "Xtensa SPI controller for xtfpga" |
Axel Lin | be8dde46 | 2014-03-20 18:08:04 +0800 | [diff] [blame] | 988 | depends on (XTENSA && XTENSA_PLATFORM_XTFPGA) || COMPILE_TEST |
Max Filippov | 6840cc2 | 2014-03-12 21:55:24 +0400 | [diff] [blame] | 989 | select SPI_BITBANG |
| 990 | help |
| 991 | SPI driver for xtfpga SPI master controller. |
| 992 | |
| 993 | This simple SPI master controller is built into xtfpga bitstreams |
| 994 | and is used to control daughterboard audio codec. It always transfers |
| 995 | 16 bit words in SPI mode 0, automatically asserting CS on transfer |
| 996 | start and deasserting on end. |
| 997 | |
Naga Sureshkumar Relli | 67dca5e | 2019-04-01 13:29:13 +0530 | [diff] [blame] | 998 | config SPI_ZYNQ_QSPI |
| 999 | tristate "Xilinx Zynq QSPI controller" |
| 1000 | depends on ARCH_ZYNQ || COMPILE_TEST |
| 1001 | help |
| 1002 | This enables support for the Zynq Quad SPI controller |
| 1003 | in master mode. |
| 1004 | This controller only supports SPI memory interface. |
| 1005 | |
Ranjit Waghmode | dfe11a1 | 2015-06-10 16:08:21 +0530 | [diff] [blame] | 1006 | config SPI_ZYNQMP_GQSPI |
| 1007 | tristate "Xilinx ZynqMP GQSPI controller" |
Naga Sureshkumar Relli | 67dca5e | 2019-04-01 13:29:13 +0530 | [diff] [blame] | 1008 | depends on (SPI_MASTER && HAS_DMA) || COMPILE_TEST |
Ranjit Waghmode | dfe11a1 | 2015-06-10 16:08:21 +0530 | [diff] [blame] | 1009 | help |
| 1010 | Enables Xilinx GQSPI controller driver for Zynq UltraScale+ MPSoC. |
| 1011 | |
Sanjay R Mehta | bbb336f | 2020-04-25 14:59:48 -0500 | [diff] [blame] | 1012 | config SPI_AMD |
| 1013 | tristate "AMD SPI controller" |
| 1014 | depends on SPI_MASTER || COMPILE_TEST |
| 1015 | help |
| 1016 | Enables SPI controller driver for AMD SoC. |
| 1017 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 1018 | # |
| 1019 | # Add new SPI master controllers in alphabetical order above this line |
| 1020 | # |
| 1021 | |
Chris Packham | e9e4054 | 2020-02-04 16:28:38 +1300 | [diff] [blame] | 1022 | comment "SPI Multiplexer support" |
| 1023 | |
| 1024 | config SPI_MUX |
| 1025 | tristate "SPI multiplexer support" |
| 1026 | select MULTIPLEXER |
| 1027 | help |
| 1028 | This adds support for SPI multiplexers. Each SPI mux will be |
| 1029 | accessible as a SPI controller, the devices behind the mux will appear |
| 1030 | to be chip selects on this controller. It is still necessary to |
| 1031 | select one or more specific mux-controller drivers. |
| 1032 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 1033 | # |
| 1034 | # There are lots of SPI device types, with sensors and memory |
| 1035 | # being probably the most widely used ones. |
| 1036 | # |
| 1037 | comment "SPI Protocol Masters" |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 1038 | |
Andrea Paterniani | 814a8d5 | 2007-05-08 00:32:15 -0700 | [diff] [blame] | 1039 | config SPI_SPIDEV |
| 1040 | tristate "User mode SPI device driver support" |
Andrea Paterniani | 814a8d5 | 2007-05-08 00:32:15 -0700 | [diff] [blame] | 1041 | help |
| 1042 | This supports user mode SPI protocol drivers. |
| 1043 | |
| 1044 | Note that this application programming interface is EXPERIMENTAL |
| 1045 | and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes. |
| 1046 | |
Martin Sperl | 9789619 | 2015-11-27 16:17:21 +0000 | [diff] [blame] | 1047 | config SPI_LOOPBACK_TEST |
| 1048 | tristate "spi loopback test framework support" |
| 1049 | depends on m |
| 1050 | help |
| 1051 | This enables the SPI loopback testing framework driver |
| 1052 | |
| 1053 | primarily used for development of spi_master drivers |
| 1054 | and to detect regressions |
| 1055 | |
Ben Dooks | 447aef1 | 2007-07-17 04:04:10 -0700 | [diff] [blame] | 1056 | config SPI_TLE62X0 |
| 1057 | tristate "Infineon TLE62X0 (for power switching)" |
Robert P. J. Day | 6291fe2 | 2008-07-23 21:29:53 -0700 | [diff] [blame] | 1058 | depends on SYSFS |
Ben Dooks | 447aef1 | 2007-07-17 04:04:10 -0700 | [diff] [blame] | 1059 | help |
| 1060 | SPI driver for Infineon TLE62X0 series line driver chips, |
| 1061 | such as the TLE6220, TLE6230 and TLE6240. This provides a |
| 1062 | sysfs interface, with each line presented as a kind of GPIO |
| 1063 | exposing both switch control and diagnostic feedback. |
| 1064 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 1065 | # |
| 1066 | # Add new SPI protocol masters in alphabetical order above this line |
| 1067 | # |
| 1068 | |
Robert P. J. Day | 6291fe2 | 2008-07-23 21:29:53 -0700 | [diff] [blame] | 1069 | endif # SPI_MASTER |
| 1070 | |
Geert Uytterhoeven | 6c36406 | 2017-05-22 15:11:41 +0200 | [diff] [blame] | 1071 | # |
| 1072 | # SLAVE side ... listening to other SPI masters |
| 1073 | # |
| 1074 | |
| 1075 | config SPI_SLAVE |
| 1076 | bool "SPI slave protocol handlers" |
| 1077 | help |
| 1078 | If your system has a slave-capable SPI controller, you can enable |
| 1079 | slave protocol handlers. |
| 1080 | |
| 1081 | if SPI_SLAVE |
| 1082 | |
Geert Uytterhoeven | 29f9ffa | 2017-05-22 15:11:44 +0200 | [diff] [blame] | 1083 | config SPI_SLAVE_TIME |
| 1084 | tristate "SPI slave handler reporting boot up time" |
| 1085 | help |
| 1086 | SPI slave handler responding with the time of reception of the last |
| 1087 | SPI message. |
| 1088 | |
Geert Uytterhoeven | ce70e06 | 2017-05-22 15:11:45 +0200 | [diff] [blame] | 1089 | config SPI_SLAVE_SYSTEM_CONTROL |
| 1090 | tristate "SPI slave handler controlling system state" |
| 1091 | help |
| 1092 | SPI slave handler to allow remote control of system reboot, power |
| 1093 | off, halt, and suspend. |
| 1094 | |
Geert Uytterhoeven | 6c36406 | 2017-05-22 15:11:41 +0200 | [diff] [blame] | 1095 | endif # SPI_SLAVE |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 1096 | |
Lukas Wunner | ddf75be | 2020-08-03 13:09:01 +0200 | [diff] [blame] | 1097 | config SPI_DYNAMIC |
| 1098 | def_bool ACPI || OF_DYNAMIC || SPI_SLAVE |
| 1099 | |
Alessandro Guido | 79d8c7a | 2008-04-28 02:14:16 -0700 | [diff] [blame] | 1100 | endif # SPI |