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Thomas Gleixner50acfb22019-05-29 07:18:00 -07001/* SPDX-License-Identifier: GPL-2.0-only */
Palmer Dabbelt6d60b6e2017-07-10 18:05:09 -07002/*
3 * Copyright (C) 2015 Regents of the University of California
Palmer Dabbelt6d60b6e2017-07-10 18:05:09 -07004 */
5
6#ifndef _ASM_RISCV_SBI_H
7#define _ASM_RISCV_SBI_H
8
9#include <linux/types.h>
10
Christoph Hellwig3b03ac62019-10-28 13:10:34 +010011#ifdef CONFIG_RISCV_SBI
Palmer Dabbelt6d60b6e2017-07-10 18:05:09 -070012#define SBI_SET_TIMER 0
13#define SBI_CONSOLE_PUTCHAR 1
14#define SBI_CONSOLE_GETCHAR 2
15#define SBI_CLEAR_IPI 3
16#define SBI_SEND_IPI 4
17#define SBI_REMOTE_FENCE_I 5
18#define SBI_REMOTE_SFENCE_VMA 6
19#define SBI_REMOTE_SFENCE_VMA_ASID 7
20#define SBI_SHUTDOWN 8
21
Gary Guoa21344d2019-03-27 00:41:29 +000022#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \
Palmer Dabbelt6d60b6e2017-07-10 18:05:09 -070023 register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \
24 register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \
25 register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \
Gary Guoa21344d2019-03-27 00:41:29 +000026 register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); \
Palmer Dabbelt6d60b6e2017-07-10 18:05:09 -070027 register uintptr_t a7 asm ("a7") = (uintptr_t)(which); \
28 asm volatile ("ecall" \
29 : "+r" (a0) \
Gary Guoa21344d2019-03-27 00:41:29 +000030 : "r" (a1), "r" (a2), "r" (a3), "r" (a7) \
Palmer Dabbelt6d60b6e2017-07-10 18:05:09 -070031 : "memory"); \
32 a0; \
33})
34
35/* Lazy implementations until SBI is finalized */
Gary Guoa21344d2019-03-27 00:41:29 +000036#define SBI_CALL_0(which) SBI_CALL(which, 0, 0, 0, 0)
37#define SBI_CALL_1(which, arg0) SBI_CALL(which, arg0, 0, 0, 0)
38#define SBI_CALL_2(which, arg0, arg1) SBI_CALL(which, arg0, arg1, 0, 0)
39#define SBI_CALL_3(which, arg0, arg1, arg2) \
40 SBI_CALL(which, arg0, arg1, arg2, 0)
41#define SBI_CALL_4(which, arg0, arg1, arg2, arg3) \
42 SBI_CALL(which, arg0, arg1, arg2, arg3)
Palmer Dabbelt6d60b6e2017-07-10 18:05:09 -070043
44static inline void sbi_console_putchar(int ch)
45{
46 SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch);
47}
48
49static inline int sbi_console_getchar(void)
50{
51 return SBI_CALL_0(SBI_CONSOLE_GETCHAR);
52}
53
54static inline void sbi_set_timer(uint64_t stime_value)
55{
56#if __riscv_xlen == 32
57 SBI_CALL_2(SBI_SET_TIMER, stime_value, stime_value >> 32);
58#else
59 SBI_CALL_1(SBI_SET_TIMER, stime_value);
60#endif
61}
62
63static inline void sbi_shutdown(void)
64{
65 SBI_CALL_0(SBI_SHUTDOWN);
66}
67
68static inline void sbi_clear_ipi(void)
69{
70 SBI_CALL_0(SBI_CLEAR_IPI);
71}
72
73static inline void sbi_send_ipi(const unsigned long *hart_mask)
74{
75 SBI_CALL_1(SBI_SEND_IPI, hart_mask);
76}
77
78static inline void sbi_remote_fence_i(const unsigned long *hart_mask)
79{
80 SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask);
81}
82
83static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask,
84 unsigned long start,
85 unsigned long size)
86{
Gary Guoa21344d2019-03-27 00:41:29 +000087 SBI_CALL_3(SBI_REMOTE_SFENCE_VMA, hart_mask, start, size);
Palmer Dabbelt6d60b6e2017-07-10 18:05:09 -070088}
89
90static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
91 unsigned long start,
92 unsigned long size,
93 unsigned long asid)
94{
Gary Guoa21344d2019-03-27 00:41:29 +000095 SBI_CALL_4(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask, start, size, asid);
Palmer Dabbelt6d60b6e2017-07-10 18:05:09 -070096}
Christoph Hellwig8bf90f32019-10-28 13:10:36 +010097#else /* CONFIG_RISCV_SBI */
Christoph Hellwig4f9bbce2019-10-28 13:10:37 +010098/* stubs for code that is only reachable under IS_ENABLED(CONFIG_RISCV_SBI): */
99void sbi_set_timer(uint64_t stime_value);
Christoph Hellwig8bf90f32019-10-28 13:10:36 +0100100void sbi_remote_fence_i(const unsigned long *hart_mask);
Christoph Hellwig3b03ac62019-10-28 13:10:34 +0100101#endif /* CONFIG_RISCV_SBI */
102#endif /* _ASM_RISCV_SBI_H */