Thomas Gleixner | 50acfb2 | 2019-05-29 07:18:00 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Palmer Dabbelt | 6d60b6e | 2017-07-10 18:05:09 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2015 Regents of the University of California |
Palmer Dabbelt | 6d60b6e | 2017-07-10 18:05:09 -0700 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef _ASM_RISCV_SBI_H |
| 7 | #define _ASM_RISCV_SBI_H |
| 8 | |
| 9 | #include <linux/types.h> |
| 10 | |
Christoph Hellwig | 3b03ac6 | 2019-10-28 13:10:34 +0100 | [diff] [blame] | 11 | #ifdef CONFIG_RISCV_SBI |
Palmer Dabbelt | 6d60b6e | 2017-07-10 18:05:09 -0700 | [diff] [blame] | 12 | #define SBI_SET_TIMER 0 |
| 13 | #define SBI_CONSOLE_PUTCHAR 1 |
| 14 | #define SBI_CONSOLE_GETCHAR 2 |
| 15 | #define SBI_CLEAR_IPI 3 |
| 16 | #define SBI_SEND_IPI 4 |
| 17 | #define SBI_REMOTE_FENCE_I 5 |
| 18 | #define SBI_REMOTE_SFENCE_VMA 6 |
| 19 | #define SBI_REMOTE_SFENCE_VMA_ASID 7 |
| 20 | #define SBI_SHUTDOWN 8 |
| 21 | |
Gary Guo | a21344d | 2019-03-27 00:41:29 +0000 | [diff] [blame] | 22 | #define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \ |
Palmer Dabbelt | 6d60b6e | 2017-07-10 18:05:09 -0700 | [diff] [blame] | 23 | register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \ |
| 24 | register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \ |
| 25 | register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \ |
Gary Guo | a21344d | 2019-03-27 00:41:29 +0000 | [diff] [blame] | 26 | register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); \ |
Palmer Dabbelt | 6d60b6e | 2017-07-10 18:05:09 -0700 | [diff] [blame] | 27 | register uintptr_t a7 asm ("a7") = (uintptr_t)(which); \ |
| 28 | asm volatile ("ecall" \ |
| 29 | : "+r" (a0) \ |
Gary Guo | a21344d | 2019-03-27 00:41:29 +0000 | [diff] [blame] | 30 | : "r" (a1), "r" (a2), "r" (a3), "r" (a7) \ |
Palmer Dabbelt | 6d60b6e | 2017-07-10 18:05:09 -0700 | [diff] [blame] | 31 | : "memory"); \ |
| 32 | a0; \ |
| 33 | }) |
| 34 | |
| 35 | /* Lazy implementations until SBI is finalized */ |
Gary Guo | a21344d | 2019-03-27 00:41:29 +0000 | [diff] [blame] | 36 | #define SBI_CALL_0(which) SBI_CALL(which, 0, 0, 0, 0) |
| 37 | #define SBI_CALL_1(which, arg0) SBI_CALL(which, arg0, 0, 0, 0) |
| 38 | #define SBI_CALL_2(which, arg0, arg1) SBI_CALL(which, arg0, arg1, 0, 0) |
| 39 | #define SBI_CALL_3(which, arg0, arg1, arg2) \ |
| 40 | SBI_CALL(which, arg0, arg1, arg2, 0) |
| 41 | #define SBI_CALL_4(which, arg0, arg1, arg2, arg3) \ |
| 42 | SBI_CALL(which, arg0, arg1, arg2, arg3) |
Palmer Dabbelt | 6d60b6e | 2017-07-10 18:05:09 -0700 | [diff] [blame] | 43 | |
| 44 | static inline void sbi_console_putchar(int ch) |
| 45 | { |
| 46 | SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch); |
| 47 | } |
| 48 | |
| 49 | static inline int sbi_console_getchar(void) |
| 50 | { |
| 51 | return SBI_CALL_0(SBI_CONSOLE_GETCHAR); |
| 52 | } |
| 53 | |
| 54 | static inline void sbi_set_timer(uint64_t stime_value) |
| 55 | { |
| 56 | #if __riscv_xlen == 32 |
| 57 | SBI_CALL_2(SBI_SET_TIMER, stime_value, stime_value >> 32); |
| 58 | #else |
| 59 | SBI_CALL_1(SBI_SET_TIMER, stime_value); |
| 60 | #endif |
| 61 | } |
| 62 | |
| 63 | static inline void sbi_shutdown(void) |
| 64 | { |
| 65 | SBI_CALL_0(SBI_SHUTDOWN); |
| 66 | } |
| 67 | |
| 68 | static inline void sbi_clear_ipi(void) |
| 69 | { |
| 70 | SBI_CALL_0(SBI_CLEAR_IPI); |
| 71 | } |
| 72 | |
| 73 | static inline void sbi_send_ipi(const unsigned long *hart_mask) |
| 74 | { |
| 75 | SBI_CALL_1(SBI_SEND_IPI, hart_mask); |
| 76 | } |
| 77 | |
| 78 | static inline void sbi_remote_fence_i(const unsigned long *hart_mask) |
| 79 | { |
| 80 | SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask); |
| 81 | } |
| 82 | |
| 83 | static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask, |
| 84 | unsigned long start, |
| 85 | unsigned long size) |
| 86 | { |
Gary Guo | a21344d | 2019-03-27 00:41:29 +0000 | [diff] [blame] | 87 | SBI_CALL_3(SBI_REMOTE_SFENCE_VMA, hart_mask, start, size); |
Palmer Dabbelt | 6d60b6e | 2017-07-10 18:05:09 -0700 | [diff] [blame] | 88 | } |
| 89 | |
| 90 | static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, |
| 91 | unsigned long start, |
| 92 | unsigned long size, |
| 93 | unsigned long asid) |
| 94 | { |
Gary Guo | a21344d | 2019-03-27 00:41:29 +0000 | [diff] [blame] | 95 | SBI_CALL_4(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask, start, size, asid); |
Palmer Dabbelt | 6d60b6e | 2017-07-10 18:05:09 -0700 | [diff] [blame] | 96 | } |
Christoph Hellwig | 8bf90f3 | 2019-10-28 13:10:36 +0100 | [diff] [blame^] | 97 | #else /* CONFIG_RISCV_SBI */ |
| 98 | /* stub for code that is only reachable under IS_ENABLED(CONFIG_RISCV_SBI): */ |
| 99 | void sbi_remote_fence_i(const unsigned long *hart_mask); |
Christoph Hellwig | 3b03ac6 | 2019-10-28 13:10:34 +0100 | [diff] [blame] | 100 | #endif /* CONFIG_RISCV_SBI */ |
| 101 | #endif /* _ASM_RISCV_SBI_H */ |