David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1 | /* |
| 2 | * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips. |
| 3 | * |
| 4 | * Copyright (C) 2005 James Chapman (ds1337 core) |
| 5 | * Copyright (C) 2006 David Brownell |
Matthias Fuchs | a216685 | 2009-03-31 15:24:58 -0700 | [diff] [blame] | 6 | * Copyright (C) 2009 Matthias Fuchs (rx8025 support) |
Bertrand Achard | bc48b90 | 2013-04-29 16:19:26 -0700 | [diff] [blame] | 7 | * Copyright (C) 2012 Bertrand Achard (nvram access fixes) |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | */ |
| 13 | |
Tin Huynh | 9c19b89 | 2016-11-30 09:57:31 +0700 | [diff] [blame] | 14 | #include <linux/acpi.h> |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 15 | #include <linux/bcd.h> |
Nishanth Menon | eac7237 | 2015-06-23 11:15:12 -0500 | [diff] [blame] | 16 | #include <linux/i2c.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/module.h> |
Javier Martinez Canillas | 7ef6d2c | 2017-03-03 11:29:15 -0300 | [diff] [blame] | 19 | #include <linux/of_device.h> |
Wolfram Sang | eb86c30 | 2012-05-29 15:07:38 -0700 | [diff] [blame] | 20 | #include <linux/rtc/ds1307.h> |
Nishanth Menon | eac7237 | 2015-06-23 11:15:12 -0500 | [diff] [blame] | 21 | #include <linux/rtc.h> |
| 22 | #include <linux/slab.h> |
| 23 | #include <linux/string.h> |
Akinobu Mita | 445c020 | 2016-01-25 00:22:16 +0900 | [diff] [blame] | 24 | #include <linux/hwmon.h> |
| 25 | #include <linux/hwmon-sysfs.h> |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 26 | #include <linux/clk-provider.h> |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 27 | #include <linux/regmap.h> |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 28 | |
David Anders | 40ce972 | 2012-03-23 15:02:37 -0700 | [diff] [blame] | 29 | /* |
| 30 | * We can't determine type by probing, but if we expect pre-Linux code |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 31 | * to have set the chip up as a clock (turning on the oscillator and |
| 32 | * setting the date and time), Linux can ignore the non-clock features. |
| 33 | * That's a natural job for a factory or repair bench. |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 34 | */ |
| 35 | enum ds_type { |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 36 | ds_1307, |
Sean Nyekjaer | 300a773 | 2017-06-08 12:36:54 +0200 | [diff] [blame] | 37 | ds_1308, |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 38 | ds_1337, |
| 39 | ds_1338, |
| 40 | ds_1339, |
| 41 | ds_1340, |
Nikita Yushchenko | 0759c88 | 2017-08-24 09:32:11 +0300 | [diff] [blame] | 42 | ds_1341, |
Joakim Tjernlund | 33df2ee | 2009-06-17 16:26:08 -0700 | [diff] [blame] | 43 | ds_1388, |
Wolfram Sang | 97f902b | 2009-06-17 16:26:10 -0700 | [diff] [blame] | 44 | ds_3231, |
Stefan Agner | 8566f70 | 2017-03-23 16:54:57 -0700 | [diff] [blame] | 45 | m41t0, |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 46 | m41t00, |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 47 | mcp794xx, |
Matthias Fuchs | a216685 | 2009-03-31 15:24:58 -0700 | [diff] [blame] | 48 | rx_8025, |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 49 | rx_8130, |
Wolfram Sang | 32d322b | 2012-03-23 15:02:36 -0700 | [diff] [blame] | 50 | last_ds_type /* always last */ |
David Anders | 40ce972 | 2012-03-23 15:02:37 -0700 | [diff] [blame] | 51 | /* rs5c372 too? different address... */ |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 52 | }; |
| 53 | |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 54 | /* RTC registers don't differ much, except for the century flag */ |
| 55 | #define DS1307_REG_SECS 0x00 /* 00-59 */ |
| 56 | # define DS1307_BIT_CH 0x80 |
Rodolfo Giometti | be5f59f | 2007-07-17 04:05:06 -0700 | [diff] [blame] | 57 | # define DS1340_BIT_nEOSC 0x80 |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 58 | # define MCP794XX_BIT_ST 0x80 |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 59 | #define DS1307_REG_MIN 0x01 /* 00-59 */ |
Stefan Agner | 8566f70 | 2017-03-23 16:54:57 -0700 | [diff] [blame] | 60 | # define M41T0_BIT_OF 0x80 |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 61 | #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */ |
David Brownell | c065f35 | 2007-07-17 04:05:10 -0700 | [diff] [blame] | 62 | # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */ |
| 63 | # define DS1307_BIT_PM 0x20 /* in REG_HOUR */ |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 64 | # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */ |
| 65 | # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */ |
| 66 | #define DS1307_REG_WDAY 0x03 /* 01-07 */ |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 67 | # define MCP794XX_BIT_VBATEN 0x08 |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 68 | #define DS1307_REG_MDAY 0x04 /* 01-31 */ |
| 69 | #define DS1307_REG_MONTH 0x05 /* 01-12 */ |
| 70 | # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */ |
| 71 | #define DS1307_REG_YEAR 0x06 /* 00-99 */ |
| 72 | |
David Anders | 40ce972 | 2012-03-23 15:02:37 -0700 | [diff] [blame] | 73 | /* |
| 74 | * Other registers (control, status, alarms, trickle charge, NVRAM, etc) |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 75 | * start at 7, and they differ a LOT. Only control and status matter for |
| 76 | * basic RTC date and time functionality; be careful using them. |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 77 | */ |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 78 | #define DS1307_REG_CONTROL 0x07 /* or ds1338 */ |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 79 | # define DS1307_BIT_OUT 0x80 |
Rodolfo Giometti | be5f59f | 2007-07-17 04:05:06 -0700 | [diff] [blame] | 80 | # define DS1338_BIT_OSF 0x20 |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 81 | # define DS1307_BIT_SQWE 0x10 |
| 82 | # define DS1307_BIT_RS1 0x02 |
| 83 | # define DS1307_BIT_RS0 0x01 |
| 84 | #define DS1337_REG_CONTROL 0x0e |
| 85 | # define DS1337_BIT_nEOSC 0x80 |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 86 | # define DS1339_BIT_BBSQI 0x20 |
Wolfram Sang | 97f902b | 2009-06-17 16:26:10 -0700 | [diff] [blame] | 87 | # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */ |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 88 | # define DS1337_BIT_RS2 0x10 |
| 89 | # define DS1337_BIT_RS1 0x08 |
| 90 | # define DS1337_BIT_INTCN 0x04 |
| 91 | # define DS1337_BIT_A2IE 0x02 |
| 92 | # define DS1337_BIT_A1IE 0x01 |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 93 | #define DS1340_REG_CONTROL 0x07 |
| 94 | # define DS1340_BIT_OUT 0x80 |
| 95 | # define DS1340_BIT_FT 0x40 |
| 96 | # define DS1340_BIT_CALIB_SIGN 0x20 |
| 97 | # define DS1340_M_CALIBRATION 0x1f |
Rodolfo Giometti | be5f59f | 2007-07-17 04:05:06 -0700 | [diff] [blame] | 98 | #define DS1340_REG_FLAG 0x09 |
| 99 | # define DS1340_BIT_OSF 0x80 |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 100 | #define DS1337_REG_STATUS 0x0f |
| 101 | # define DS1337_BIT_OSF 0x80 |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 102 | # define DS3231_BIT_EN32KHZ 0x08 |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 103 | # define DS1337_BIT_A2I 0x02 |
| 104 | # define DS1337_BIT_A1I 0x01 |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 105 | #define DS1339_REG_ALARM1_SECS 0x07 |
Wolfram Sang | eb86c30 | 2012-05-29 15:07:38 -0700 | [diff] [blame] | 106 | |
| 107 | #define DS13XX_TRICKLE_CHARGER_MAGIC 0xa0 |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 108 | |
Matthias Fuchs | a216685 | 2009-03-31 15:24:58 -0700 | [diff] [blame] | 109 | #define RX8025_REG_CTRL1 0x0e |
| 110 | # define RX8025_BIT_2412 0x20 |
| 111 | #define RX8025_REG_CTRL2 0x0f |
| 112 | # define RX8025_BIT_PON 0x10 |
| 113 | # define RX8025_BIT_VDET 0x40 |
| 114 | # define RX8025_BIT_XST 0x20 |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 115 | |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 116 | struct ds1307 { |
Alexandre Belloni | abc925f | 2017-07-06 11:42:07 +0200 | [diff] [blame] | 117 | struct nvmem_config nvmem_cfg; |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 118 | enum ds_type type; |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 119 | unsigned long flags; |
| 120 | #define HAS_NVRAM 0 /* bit 0 == sysfs file active */ |
| 121 | #define HAS_ALARM 1 /* bit 1 == irq claimed */ |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 122 | struct device *dev; |
| 123 | struct regmap *regmap; |
| 124 | const char *name; |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 125 | struct rtc_device *rtc; |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 126 | #ifdef CONFIG_COMMON_CLK |
| 127 | struct clk_hw clks[2]; |
| 128 | #endif |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 129 | }; |
| 130 | |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 131 | struct chip_desc { |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 132 | unsigned alarm:1; |
Austin Boyle | 9eab0a7 | 2012-03-23 15:02:38 -0700 | [diff] [blame] | 133 | u16 nvram_offset; |
| 134 | u16 nvram_size; |
Heiner Kallweit | e553170 | 2017-07-12 07:49:47 +0200 | [diff] [blame] | 135 | u8 offset; /* register's offset */ |
Heiner Kallweit | e48585d | 2017-06-05 17:57:33 +0200 | [diff] [blame] | 136 | u8 century_reg; |
| 137 | u8 century_enable_bit; |
| 138 | u8 century_bit; |
Heiner Kallweit | 0b6ee80 | 2017-07-12 07:49:22 +0200 | [diff] [blame] | 139 | u8 bbsqi_bit; |
Heiner Kallweit | 4594712 | 2017-07-12 07:49:41 +0200 | [diff] [blame] | 140 | irq_handler_t irq_handler; |
Heiner Kallweit | 1efb98b | 2017-07-12 07:49:44 +0200 | [diff] [blame] | 141 | const struct rtc_class_ops *rtc_ops; |
Wolfram Sang | eb86c30 | 2012-05-29 15:07:38 -0700 | [diff] [blame] | 142 | u16 trickle_charger_reg; |
Alexandre Belloni | 57ec2d9 | 2017-09-04 22:46:04 +0200 | [diff] [blame] | 143 | u8 (*do_trickle_setup)(struct ds1307 *, u32, |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 144 | bool); |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 145 | }; |
| 146 | |
Heiner Kallweit | 1efb98b | 2017-07-12 07:49:44 +0200 | [diff] [blame] | 147 | static int ds1307_get_time(struct device *dev, struct rtc_time *t); |
| 148 | static int ds1307_set_time(struct device *dev, struct rtc_time *t); |
Alexandre Belloni | 57ec2d9 | 2017-09-04 22:46:04 +0200 | [diff] [blame] | 149 | static u8 do_trickle_setup_ds1339(struct ds1307 *, u32 ohms, bool diode); |
Heiner Kallweit | 4594712 | 2017-07-12 07:49:41 +0200 | [diff] [blame] | 150 | static irqreturn_t rx8130_irq(int irq, void *dev_id); |
Heiner Kallweit | 1efb98b | 2017-07-12 07:49:44 +0200 | [diff] [blame] | 151 | static int rx8130_read_alarm(struct device *dev, struct rtc_wkalrm *t); |
| 152 | static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t); |
| 153 | static int rx8130_alarm_irq_enable(struct device *dev, unsigned int enabled); |
Heiner Kallweit | 4594712 | 2017-07-12 07:49:41 +0200 | [diff] [blame] | 154 | static irqreturn_t mcp794xx_irq(int irq, void *dev_id); |
Heiner Kallweit | 1efb98b | 2017-07-12 07:49:44 +0200 | [diff] [blame] | 155 | static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t); |
| 156 | static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t); |
| 157 | static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled); |
Matti Vaittinen | 33b04b7 | 2014-10-13 15:52:48 -0700 | [diff] [blame] | 158 | |
Heiner Kallweit | 1efb98b | 2017-07-12 07:49:44 +0200 | [diff] [blame] | 159 | static const struct rtc_class_ops rx8130_rtc_ops = { |
| 160 | .read_time = ds1307_get_time, |
| 161 | .set_time = ds1307_set_time, |
| 162 | .read_alarm = rx8130_read_alarm, |
| 163 | .set_alarm = rx8130_set_alarm, |
| 164 | .alarm_irq_enable = rx8130_alarm_irq_enable, |
| 165 | }; |
| 166 | |
| 167 | static const struct rtc_class_ops mcp794xx_rtc_ops = { |
| 168 | .read_time = ds1307_get_time, |
| 169 | .set_time = ds1307_set_time, |
| 170 | .read_alarm = mcp794xx_read_alarm, |
| 171 | .set_alarm = mcp794xx_set_alarm, |
| 172 | .alarm_irq_enable = mcp794xx_alarm_irq_enable, |
| 173 | }; |
Matti Vaittinen | 33b04b7 | 2014-10-13 15:52:48 -0700 | [diff] [blame] | 174 | |
Heiner Kallweit | 7624df4 | 2017-07-12 07:49:33 +0200 | [diff] [blame] | 175 | static const struct chip_desc chips[last_ds_type] = { |
Wolfram Sang | 32d322b | 2012-03-23 15:02:36 -0700 | [diff] [blame] | 176 | [ds_1307] = { |
Austin Boyle | 9eab0a7 | 2012-03-23 15:02:38 -0700 | [diff] [blame] | 177 | .nvram_offset = 8, |
| 178 | .nvram_size = 56, |
Wolfram Sang | 32d322b | 2012-03-23 15:02:36 -0700 | [diff] [blame] | 179 | }, |
Sean Nyekjaer | 300a773 | 2017-06-08 12:36:54 +0200 | [diff] [blame] | 180 | [ds_1308] = { |
| 181 | .nvram_offset = 8, |
| 182 | .nvram_size = 56, |
| 183 | }, |
Wolfram Sang | 32d322b | 2012-03-23 15:02:36 -0700 | [diff] [blame] | 184 | [ds_1337] = { |
| 185 | .alarm = 1, |
Heiner Kallweit | e48585d | 2017-06-05 17:57:33 +0200 | [diff] [blame] | 186 | .century_reg = DS1307_REG_MONTH, |
| 187 | .century_bit = DS1337_BIT_CENTURY, |
Wolfram Sang | 32d322b | 2012-03-23 15:02:36 -0700 | [diff] [blame] | 188 | }, |
| 189 | [ds_1338] = { |
Austin Boyle | 9eab0a7 | 2012-03-23 15:02:38 -0700 | [diff] [blame] | 190 | .nvram_offset = 8, |
| 191 | .nvram_size = 56, |
Wolfram Sang | 32d322b | 2012-03-23 15:02:36 -0700 | [diff] [blame] | 192 | }, |
| 193 | [ds_1339] = { |
| 194 | .alarm = 1, |
Heiner Kallweit | e48585d | 2017-06-05 17:57:33 +0200 | [diff] [blame] | 195 | .century_reg = DS1307_REG_MONTH, |
| 196 | .century_bit = DS1337_BIT_CENTURY, |
Heiner Kallweit | 0b6ee80 | 2017-07-12 07:49:22 +0200 | [diff] [blame] | 197 | .bbsqi_bit = DS1339_BIT_BBSQI, |
Wolfram Sang | eb86c30 | 2012-05-29 15:07:38 -0700 | [diff] [blame] | 198 | .trickle_charger_reg = 0x10, |
Matti Vaittinen | 33b04b7 | 2014-10-13 15:52:48 -0700 | [diff] [blame] | 199 | .do_trickle_setup = &do_trickle_setup_ds1339, |
Wolfram Sang | eb86c30 | 2012-05-29 15:07:38 -0700 | [diff] [blame] | 200 | }, |
| 201 | [ds_1340] = { |
Heiner Kallweit | e48585d | 2017-06-05 17:57:33 +0200 | [diff] [blame] | 202 | .century_reg = DS1307_REG_HOUR, |
| 203 | .century_enable_bit = DS1340_BIT_CENTURY_EN, |
| 204 | .century_bit = DS1340_BIT_CENTURY, |
Wolfram Sang | eb86c30 | 2012-05-29 15:07:38 -0700 | [diff] [blame] | 205 | .trickle_charger_reg = 0x08, |
| 206 | }, |
Nikita Yushchenko | 0759c88 | 2017-08-24 09:32:11 +0300 | [diff] [blame] | 207 | [ds_1341] = { |
| 208 | .century_reg = DS1307_REG_MONTH, |
| 209 | .century_bit = DS1337_BIT_CENTURY, |
| 210 | }, |
Wolfram Sang | eb86c30 | 2012-05-29 15:07:38 -0700 | [diff] [blame] | 211 | [ds_1388] = { |
Heiner Kallweit | e553170 | 2017-07-12 07:49:47 +0200 | [diff] [blame] | 212 | .offset = 1, |
Wolfram Sang | eb86c30 | 2012-05-29 15:07:38 -0700 | [diff] [blame] | 213 | .trickle_charger_reg = 0x0a, |
Wolfram Sang | 32d322b | 2012-03-23 15:02:36 -0700 | [diff] [blame] | 214 | }, |
| 215 | [ds_3231] = { |
| 216 | .alarm = 1, |
Heiner Kallweit | e48585d | 2017-06-05 17:57:33 +0200 | [diff] [blame] | 217 | .century_reg = DS1307_REG_MONTH, |
| 218 | .century_bit = DS1337_BIT_CENTURY, |
Heiner Kallweit | 0b6ee80 | 2017-07-12 07:49:22 +0200 | [diff] [blame] | 219 | .bbsqi_bit = DS3231_BIT_BBSQW, |
Wolfram Sang | 32d322b | 2012-03-23 15:02:36 -0700 | [diff] [blame] | 220 | }, |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 221 | [rx_8130] = { |
| 222 | .alarm = 1, |
| 223 | /* this is battery backed SRAM */ |
| 224 | .nvram_offset = 0x20, |
| 225 | .nvram_size = 4, /* 32bit (4 word x 8 bit) */ |
Heiner Kallweit | e553170 | 2017-07-12 07:49:47 +0200 | [diff] [blame] | 226 | .offset = 0x10, |
Heiner Kallweit | 4594712 | 2017-07-12 07:49:41 +0200 | [diff] [blame] | 227 | .irq_handler = rx8130_irq, |
Heiner Kallweit | 1efb98b | 2017-07-12 07:49:44 +0200 | [diff] [blame] | 228 | .rtc_ops = &rx8130_rtc_ops, |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 229 | }, |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 230 | [mcp794xx] = { |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 231 | .alarm = 1, |
Austin Boyle | 9eab0a7 | 2012-03-23 15:02:38 -0700 | [diff] [blame] | 232 | /* this is battery backed SRAM */ |
| 233 | .nvram_offset = 0x20, |
| 234 | .nvram_size = 0x40, |
Heiner Kallweit | 4594712 | 2017-07-12 07:49:41 +0200 | [diff] [blame] | 235 | .irq_handler = mcp794xx_irq, |
Heiner Kallweit | 1efb98b | 2017-07-12 07:49:44 +0200 | [diff] [blame] | 236 | .rtc_ops = &mcp794xx_rtc_ops, |
Austin Boyle | 9eab0a7 | 2012-03-23 15:02:38 -0700 | [diff] [blame] | 237 | }, |
Wolfram Sang | 32d322b | 2012-03-23 15:02:36 -0700 | [diff] [blame] | 238 | }; |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 239 | |
Jean Delvare | 3760f73 | 2008-04-29 23:11:40 +0200 | [diff] [blame] | 240 | static const struct i2c_device_id ds1307_id[] = { |
| 241 | { "ds1307", ds_1307 }, |
Sean Nyekjaer | 300a773 | 2017-06-08 12:36:54 +0200 | [diff] [blame] | 242 | { "ds1308", ds_1308 }, |
Jean Delvare | 3760f73 | 2008-04-29 23:11:40 +0200 | [diff] [blame] | 243 | { "ds1337", ds_1337 }, |
| 244 | { "ds1338", ds_1338 }, |
| 245 | { "ds1339", ds_1339 }, |
Joakim Tjernlund | 33df2ee | 2009-06-17 16:26:08 -0700 | [diff] [blame] | 246 | { "ds1388", ds_1388 }, |
Jean Delvare | 3760f73 | 2008-04-29 23:11:40 +0200 | [diff] [blame] | 247 | { "ds1340", ds_1340 }, |
Nikita Yushchenko | 0759c88 | 2017-08-24 09:32:11 +0300 | [diff] [blame] | 248 | { "ds1341", ds_1341 }, |
Wolfram Sang | 97f902b | 2009-06-17 16:26:10 -0700 | [diff] [blame] | 249 | { "ds3231", ds_3231 }, |
Stefan Agner | 8566f70 | 2017-03-23 16:54:57 -0700 | [diff] [blame] | 250 | { "m41t0", m41t0 }, |
Jean Delvare | 3760f73 | 2008-04-29 23:11:40 +0200 | [diff] [blame] | 251 | { "m41t00", m41t00 }, |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 252 | { "mcp7940x", mcp794xx }, |
| 253 | { "mcp7941x", mcp794xx }, |
Priyanka Jain | 31c1771 | 2011-06-27 16:18:04 -0700 | [diff] [blame] | 254 | { "pt7c4338", ds_1307 }, |
Matthias Fuchs | a216685 | 2009-03-31 15:24:58 -0700 | [diff] [blame] | 255 | { "rx8025", rx_8025 }, |
Alexandre Belloni | 78aaa06 | 2016-07-13 02:36:41 +0200 | [diff] [blame] | 256 | { "isl12057", ds_1337 }, |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 257 | { "rx8130", rx_8130 }, |
Jean Delvare | 3760f73 | 2008-04-29 23:11:40 +0200 | [diff] [blame] | 258 | { } |
| 259 | }; |
| 260 | MODULE_DEVICE_TABLE(i2c, ds1307_id); |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 261 | |
Javier Martinez Canillas | 7ef6d2c | 2017-03-03 11:29:15 -0300 | [diff] [blame] | 262 | #ifdef CONFIG_OF |
| 263 | static const struct of_device_id ds1307_of_match[] = { |
| 264 | { |
| 265 | .compatible = "dallas,ds1307", |
| 266 | .data = (void *)ds_1307 |
| 267 | }, |
| 268 | { |
Sean Nyekjaer | 300a773 | 2017-06-08 12:36:54 +0200 | [diff] [blame] | 269 | .compatible = "dallas,ds1308", |
| 270 | .data = (void *)ds_1308 |
| 271 | }, |
| 272 | { |
Javier Martinez Canillas | 7ef6d2c | 2017-03-03 11:29:15 -0300 | [diff] [blame] | 273 | .compatible = "dallas,ds1337", |
| 274 | .data = (void *)ds_1337 |
| 275 | }, |
| 276 | { |
| 277 | .compatible = "dallas,ds1338", |
| 278 | .data = (void *)ds_1338 |
| 279 | }, |
| 280 | { |
| 281 | .compatible = "dallas,ds1339", |
| 282 | .data = (void *)ds_1339 |
| 283 | }, |
| 284 | { |
| 285 | .compatible = "dallas,ds1388", |
| 286 | .data = (void *)ds_1388 |
| 287 | }, |
| 288 | { |
| 289 | .compatible = "dallas,ds1340", |
| 290 | .data = (void *)ds_1340 |
| 291 | }, |
| 292 | { |
Nikita Yushchenko | 0759c88 | 2017-08-24 09:32:11 +0300 | [diff] [blame] | 293 | .compatible = "dallas,ds1341", |
| 294 | .data = (void *)ds_1341 |
| 295 | }, |
| 296 | { |
Javier Martinez Canillas | 7ef6d2c | 2017-03-03 11:29:15 -0300 | [diff] [blame] | 297 | .compatible = "maxim,ds3231", |
| 298 | .data = (void *)ds_3231 |
| 299 | }, |
| 300 | { |
Alexandre Belloni | db2f814 | 2017-04-08 17:22:02 +0200 | [diff] [blame] | 301 | .compatible = "st,m41t0", |
| 302 | .data = (void *)m41t00 |
| 303 | }, |
| 304 | { |
Javier Martinez Canillas | 7ef6d2c | 2017-03-03 11:29:15 -0300 | [diff] [blame] | 305 | .compatible = "st,m41t00", |
| 306 | .data = (void *)m41t00 |
| 307 | }, |
| 308 | { |
| 309 | .compatible = "microchip,mcp7940x", |
| 310 | .data = (void *)mcp794xx |
| 311 | }, |
| 312 | { |
| 313 | .compatible = "microchip,mcp7941x", |
| 314 | .data = (void *)mcp794xx |
| 315 | }, |
| 316 | { |
| 317 | .compatible = "pericom,pt7c4338", |
| 318 | .data = (void *)ds_1307 |
| 319 | }, |
| 320 | { |
| 321 | .compatible = "epson,rx8025", |
| 322 | .data = (void *)rx_8025 |
| 323 | }, |
| 324 | { |
| 325 | .compatible = "isil,isl12057", |
| 326 | .data = (void *)ds_1337 |
| 327 | }, |
Bastian Stender | 47dd472 | 2017-10-17 14:46:07 +0200 | [diff] [blame^] | 328 | { |
| 329 | .compatible = "epson,rx8130", |
| 330 | .data = (void *)rx_8130 |
| 331 | }, |
Javier Martinez Canillas | 7ef6d2c | 2017-03-03 11:29:15 -0300 | [diff] [blame] | 332 | { } |
| 333 | }; |
| 334 | MODULE_DEVICE_TABLE(of, ds1307_of_match); |
| 335 | #endif |
| 336 | |
Tin Huynh | 9c19b89 | 2016-11-30 09:57:31 +0700 | [diff] [blame] | 337 | #ifdef CONFIG_ACPI |
| 338 | static const struct acpi_device_id ds1307_acpi_ids[] = { |
| 339 | { .id = "DS1307", .driver_data = ds_1307 }, |
Sean Nyekjaer | 300a773 | 2017-06-08 12:36:54 +0200 | [diff] [blame] | 340 | { .id = "DS1308", .driver_data = ds_1308 }, |
Tin Huynh | 9c19b89 | 2016-11-30 09:57:31 +0700 | [diff] [blame] | 341 | { .id = "DS1337", .driver_data = ds_1337 }, |
| 342 | { .id = "DS1338", .driver_data = ds_1338 }, |
| 343 | { .id = "DS1339", .driver_data = ds_1339 }, |
| 344 | { .id = "DS1388", .driver_data = ds_1388 }, |
| 345 | { .id = "DS1340", .driver_data = ds_1340 }, |
Nikita Yushchenko | 0759c88 | 2017-08-24 09:32:11 +0300 | [diff] [blame] | 346 | { .id = "DS1341", .driver_data = ds_1341 }, |
Tin Huynh | 9c19b89 | 2016-11-30 09:57:31 +0700 | [diff] [blame] | 347 | { .id = "DS3231", .driver_data = ds_3231 }, |
Stefan Agner | 8566f70 | 2017-03-23 16:54:57 -0700 | [diff] [blame] | 348 | { .id = "M41T0", .driver_data = m41t0 }, |
Tin Huynh | 9c19b89 | 2016-11-30 09:57:31 +0700 | [diff] [blame] | 349 | { .id = "M41T00", .driver_data = m41t00 }, |
| 350 | { .id = "MCP7940X", .driver_data = mcp794xx }, |
| 351 | { .id = "MCP7941X", .driver_data = mcp794xx }, |
| 352 | { .id = "PT7C4338", .driver_data = ds_1307 }, |
| 353 | { .id = "RX8025", .driver_data = rx_8025 }, |
| 354 | { .id = "ISL12057", .driver_data = ds_1337 }, |
Bastian Stender | 47dd472 | 2017-10-17 14:46:07 +0200 | [diff] [blame^] | 355 | { .id = "RX8130", .driver_data = rx_8130 }, |
Tin Huynh | 9c19b89 | 2016-11-30 09:57:31 +0700 | [diff] [blame] | 356 | { } |
| 357 | }; |
| 358 | MODULE_DEVICE_TABLE(acpi, ds1307_acpi_ids); |
| 359 | #endif |
| 360 | |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 361 | /* |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 362 | * The ds1337 and ds1339 both have two alarms, but we only use the first |
| 363 | * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm |
| 364 | * signal; ds1339 chips have only one alarm signal. |
| 365 | */ |
Felipe Balbi | 2fb07a1 | 2015-06-23 11:15:10 -0500 | [diff] [blame] | 366 | static irqreturn_t ds1307_irq(int irq, void *dev_id) |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 367 | { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 368 | struct ds1307 *ds1307 = dev_id; |
Felipe Balbi | 2fb07a1 | 2015-06-23 11:15:10 -0500 | [diff] [blame] | 369 | struct mutex *lock = &ds1307->rtc->ops_lock; |
Heiner Kallweit | 078f3f6 | 2017-06-05 17:57:29 +0200 | [diff] [blame] | 370 | int stat, ret; |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 371 | |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 372 | mutex_lock(lock); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 373 | ret = regmap_read(ds1307->regmap, DS1337_REG_STATUS, &stat); |
| 374 | if (ret) |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 375 | goto out; |
| 376 | |
| 377 | if (stat & DS1337_BIT_A1I) { |
| 378 | stat &= ~DS1337_BIT_A1I; |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 379 | regmap_write(ds1307->regmap, DS1337_REG_STATUS, stat); |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 380 | |
Heiner Kallweit | 078f3f6 | 2017-06-05 17:57:29 +0200 | [diff] [blame] | 381 | ret = regmap_update_bits(ds1307->regmap, DS1337_REG_CONTROL, |
| 382 | DS1337_BIT_A1IE, 0); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 383 | if (ret) |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 384 | goto out; |
| 385 | |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 386 | rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 387 | } |
| 388 | |
| 389 | out: |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 390 | mutex_unlock(lock); |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 391 | |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 392 | return IRQ_HANDLED; |
| 393 | } |
| 394 | |
| 395 | /*----------------------------------------------------------------------*/ |
| 396 | |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 397 | static int ds1307_get_time(struct device *dev, struct rtc_time *t) |
| 398 | { |
| 399 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 400 | int tmp, ret; |
Heiner Kallweit | e48585d | 2017-06-05 17:57:33 +0200 | [diff] [blame] | 401 | const struct chip_desc *chip = &chips[ds1307->type]; |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 402 | u8 regs[7]; |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 403 | |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 404 | /* read the RTC date and time registers all at once */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 405 | ret = regmap_bulk_read(ds1307->regmap, chip->offset, regs, |
| 406 | sizeof(regs)); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 407 | if (ret) { |
| 408 | dev_err(dev, "%s error %d\n", "read", ret); |
| 409 | return ret; |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 410 | } |
| 411 | |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 412 | dev_dbg(dev, "%s: %7ph\n", "read", regs); |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 413 | |
Stefan Agner | 8566f70 | 2017-03-23 16:54:57 -0700 | [diff] [blame] | 414 | /* if oscillator fail bit is set, no data can be trusted */ |
| 415 | if (ds1307->type == m41t0 && |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 416 | regs[DS1307_REG_MIN] & M41T0_BIT_OF) { |
Stefan Agner | 8566f70 | 2017-03-23 16:54:57 -0700 | [diff] [blame] | 417 | dev_warn_once(dev, "oscillator failed, set time!\n"); |
| 418 | return -EINVAL; |
| 419 | } |
| 420 | |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 421 | t->tm_sec = bcd2bin(regs[DS1307_REG_SECS] & 0x7f); |
| 422 | t->tm_min = bcd2bin(regs[DS1307_REG_MIN] & 0x7f); |
| 423 | tmp = regs[DS1307_REG_HOUR] & 0x3f; |
Adrian Bunk | fe20ba7 | 2008-10-18 20:28:41 -0700 | [diff] [blame] | 424 | t->tm_hour = bcd2bin(tmp); |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 425 | t->tm_wday = bcd2bin(regs[DS1307_REG_WDAY] & 0x07) - 1; |
| 426 | t->tm_mday = bcd2bin(regs[DS1307_REG_MDAY] & 0x3f); |
| 427 | tmp = regs[DS1307_REG_MONTH] & 0x1f; |
Adrian Bunk | fe20ba7 | 2008-10-18 20:28:41 -0700 | [diff] [blame] | 428 | t->tm_mon = bcd2bin(tmp) - 1; |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 429 | t->tm_year = bcd2bin(regs[DS1307_REG_YEAR]) + 100; |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 430 | |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 431 | if (regs[chip->century_reg] & chip->century_bit && |
Heiner Kallweit | e48585d | 2017-06-05 17:57:33 +0200 | [diff] [blame] | 432 | IS_ENABLED(CONFIG_RTC_DRV_DS1307_CENTURY)) |
| 433 | t->tm_year += 100; |
Alexandre Belloni | 50d6c0e | 2016-07-13 02:26:08 +0200 | [diff] [blame] | 434 | |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 435 | dev_dbg(dev, "%s secs=%d, mins=%d, " |
| 436 | "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", |
| 437 | "read", t->tm_sec, t->tm_min, |
| 438 | t->tm_hour, t->tm_mday, |
| 439 | t->tm_mon, t->tm_year, t->tm_wday); |
| 440 | |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 441 | /* initial clock setting can be undefined */ |
| 442 | return rtc_valid_tm(t); |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 443 | } |
| 444 | |
| 445 | static int ds1307_set_time(struct device *dev, struct rtc_time *t) |
| 446 | { |
| 447 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
Heiner Kallweit | e48585d | 2017-06-05 17:57:33 +0200 | [diff] [blame] | 448 | const struct chip_desc *chip = &chips[ds1307->type]; |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 449 | int result; |
| 450 | int tmp; |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 451 | u8 regs[7]; |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 452 | |
| 453 | dev_dbg(dev, "%s secs=%d, mins=%d, " |
| 454 | "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", |
Jeff Garzik | 11966ad | 2006-10-04 04:41:53 -0400 | [diff] [blame] | 455 | "write", t->tm_sec, t->tm_min, |
| 456 | t->tm_hour, t->tm_mday, |
| 457 | t->tm_mon, t->tm_year, t->tm_wday); |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 458 | |
Alexandre Belloni | 50d6c0e | 2016-07-13 02:26:08 +0200 | [diff] [blame] | 459 | if (t->tm_year < 100) |
| 460 | return -EINVAL; |
| 461 | |
Heiner Kallweit | e48585d | 2017-06-05 17:57:33 +0200 | [diff] [blame] | 462 | #ifdef CONFIG_RTC_DRV_DS1307_CENTURY |
| 463 | if (t->tm_year > (chip->century_bit ? 299 : 199)) |
| 464 | return -EINVAL; |
Alexandre Belloni | 50d6c0e | 2016-07-13 02:26:08 +0200 | [diff] [blame] | 465 | #else |
Heiner Kallweit | e48585d | 2017-06-05 17:57:33 +0200 | [diff] [blame] | 466 | if (t->tm_year > 199) |
Alexandre Belloni | 50d6c0e | 2016-07-13 02:26:08 +0200 | [diff] [blame] | 467 | return -EINVAL; |
| 468 | #endif |
| 469 | |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 470 | regs[DS1307_REG_SECS] = bin2bcd(t->tm_sec); |
| 471 | regs[DS1307_REG_MIN] = bin2bcd(t->tm_min); |
| 472 | regs[DS1307_REG_HOUR] = bin2bcd(t->tm_hour); |
| 473 | regs[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1); |
| 474 | regs[DS1307_REG_MDAY] = bin2bcd(t->tm_mday); |
| 475 | regs[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1); |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 476 | |
| 477 | /* assume 20YY not 19YY */ |
| 478 | tmp = t->tm_year - 100; |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 479 | regs[DS1307_REG_YEAR] = bin2bcd(tmp); |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 480 | |
Heiner Kallweit | e48585d | 2017-06-05 17:57:33 +0200 | [diff] [blame] | 481 | if (chip->century_enable_bit) |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 482 | regs[chip->century_reg] |= chip->century_enable_bit; |
Heiner Kallweit | e48585d | 2017-06-05 17:57:33 +0200 | [diff] [blame] | 483 | if (t->tm_year > 199 && chip->century_bit) |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 484 | regs[chip->century_reg] |= chip->century_bit; |
Heiner Kallweit | e48585d | 2017-06-05 17:57:33 +0200 | [diff] [blame] | 485 | |
| 486 | if (ds1307->type == mcp794xx) { |
David Anders | 40ce972 | 2012-03-23 15:02:37 -0700 | [diff] [blame] | 487 | /* |
| 488 | * these bits were cleared when preparing the date/time |
| 489 | * values and need to be set again before writing the |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 490 | * regsfer out to the device. |
David Anders | 40ce972 | 2012-03-23 15:02:37 -0700 | [diff] [blame] | 491 | */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 492 | regs[DS1307_REG_SECS] |= MCP794XX_BIT_ST; |
| 493 | regs[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN; |
Rodolfo Giometti | be5f59f | 2007-07-17 04:05:06 -0700 | [diff] [blame] | 494 | } |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 495 | |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 496 | dev_dbg(dev, "%s: %7ph\n", "write", regs); |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 497 | |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 498 | result = regmap_bulk_write(ds1307->regmap, chip->offset, regs, |
| 499 | sizeof(regs)); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 500 | if (result) { |
BARRE Sebastien | fed40b7 | 2009-01-07 18:07:13 -0800 | [diff] [blame] | 501 | dev_err(dev, "%s error %d\n", "write", result); |
| 502 | return result; |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 503 | } |
| 504 | return 0; |
| 505 | } |
| 506 | |
Jüri Reitel | 74d88eb | 2009-01-07 18:07:16 -0800 | [diff] [blame] | 507 | static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t) |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 508 | { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 509 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 510 | int ret; |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 511 | u8 regs[9]; |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 512 | |
| 513 | if (!test_bit(HAS_ALARM, &ds1307->flags)) |
| 514 | return -EINVAL; |
| 515 | |
| 516 | /* read all ALARM1, ALARM2, and status registers at once */ |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 517 | ret = regmap_bulk_read(ds1307->regmap, DS1339_REG_ALARM1_SECS, |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 518 | regs, sizeof(regs)); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 519 | if (ret) { |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 520 | dev_err(dev, "%s error %d\n", "alarm read", ret); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 521 | return ret; |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 522 | } |
| 523 | |
Rasmus Villemoes | ff67abd | 2015-11-24 14:51:23 +0100 | [diff] [blame] | 524 | dev_dbg(dev, "%s: %4ph, %3ph, %2ph\n", "alarm read", |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 525 | ®s[0], ®s[4], ®s[7]); |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 526 | |
David Anders | 40ce972 | 2012-03-23 15:02:37 -0700 | [diff] [blame] | 527 | /* |
| 528 | * report alarm time (ALARM1); assume 24 hour and day-of-month modes, |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 529 | * and that all four fields are checked matches |
| 530 | */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 531 | t->time.tm_sec = bcd2bin(regs[0] & 0x7f); |
| 532 | t->time.tm_min = bcd2bin(regs[1] & 0x7f); |
| 533 | t->time.tm_hour = bcd2bin(regs[2] & 0x3f); |
| 534 | t->time.tm_mday = bcd2bin(regs[3] & 0x3f); |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 535 | |
| 536 | /* ... and status */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 537 | t->enabled = !!(regs[7] & DS1337_BIT_A1IE); |
| 538 | t->pending = !!(regs[8] & DS1337_BIT_A1I); |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 539 | |
| 540 | dev_dbg(dev, "%s secs=%d, mins=%d, " |
| 541 | "hours=%d, mday=%d, enabled=%d, pending=%d\n", |
| 542 | "alarm read", t->time.tm_sec, t->time.tm_min, |
| 543 | t->time.tm_hour, t->time.tm_mday, |
| 544 | t->enabled, t->pending); |
| 545 | |
| 546 | return 0; |
| 547 | } |
| 548 | |
Jüri Reitel | 74d88eb | 2009-01-07 18:07:16 -0800 | [diff] [blame] | 549 | static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t) |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 550 | { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 551 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 552 | unsigned char regs[9]; |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 553 | u8 control, status; |
| 554 | int ret; |
| 555 | |
| 556 | if (!test_bit(HAS_ALARM, &ds1307->flags)) |
| 557 | return -EINVAL; |
| 558 | |
| 559 | dev_dbg(dev, "%s secs=%d, mins=%d, " |
| 560 | "hours=%d, mday=%d, enabled=%d, pending=%d\n", |
| 561 | "alarm set", t->time.tm_sec, t->time.tm_min, |
| 562 | t->time.tm_hour, t->time.tm_mday, |
| 563 | t->enabled, t->pending); |
| 564 | |
| 565 | /* read current status of both alarms and the chip */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 566 | ret = regmap_bulk_read(ds1307->regmap, DS1339_REG_ALARM1_SECS, regs, |
| 567 | sizeof(regs)); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 568 | if (ret) { |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 569 | dev_err(dev, "%s error %d\n", "alarm write", ret); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 570 | return ret; |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 571 | } |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 572 | control = regs[7]; |
| 573 | status = regs[8]; |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 574 | |
Rasmus Villemoes | ff67abd | 2015-11-24 14:51:23 +0100 | [diff] [blame] | 575 | dev_dbg(dev, "%s: %4ph, %3ph, %02x %02x\n", "alarm set (old status)", |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 576 | ®s[0], ®s[4], control, status); |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 577 | |
| 578 | /* set ALARM1, using 24 hour and day-of-month modes */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 579 | regs[0] = bin2bcd(t->time.tm_sec); |
| 580 | regs[1] = bin2bcd(t->time.tm_min); |
| 581 | regs[2] = bin2bcd(t->time.tm_hour); |
| 582 | regs[3] = bin2bcd(t->time.tm_mday); |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 583 | |
| 584 | /* set ALARM2 to non-garbage */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 585 | regs[4] = 0; |
| 586 | regs[5] = 0; |
| 587 | regs[6] = 0; |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 588 | |
Nicolas Boullis | 5919fb9 | 2016-04-10 13:23:05 +0200 | [diff] [blame] | 589 | /* disable alarms */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 590 | regs[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE); |
| 591 | regs[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I); |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 592 | |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 593 | ret = regmap_bulk_write(ds1307->regmap, DS1339_REG_ALARM1_SECS, regs, |
| 594 | sizeof(regs)); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 595 | if (ret) { |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 596 | dev_err(dev, "can't set alarm time\n"); |
BARRE Sebastien | fed40b7 | 2009-01-07 18:07:13 -0800 | [diff] [blame] | 597 | return ret; |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 598 | } |
| 599 | |
Nicolas Boullis | 5919fb9 | 2016-04-10 13:23:05 +0200 | [diff] [blame] | 600 | /* optionally enable ALARM1 */ |
| 601 | if (t->enabled) { |
| 602 | dev_dbg(dev, "alarm IRQ armed\n"); |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 603 | regs[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */ |
| 604 | regmap_write(ds1307->regmap, DS1337_REG_CONTROL, regs[7]); |
Nicolas Boullis | 5919fb9 | 2016-04-10 13:23:05 +0200 | [diff] [blame] | 605 | } |
| 606 | |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 607 | return 0; |
| 608 | } |
| 609 | |
John Stultz | 16380c1 | 2011-02-02 17:02:41 -0800 | [diff] [blame] | 610 | static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled) |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 611 | { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 612 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 613 | |
John Stultz | 16380c1 | 2011-02-02 17:02:41 -0800 | [diff] [blame] | 614 | if (!test_bit(HAS_ALARM, &ds1307->flags)) |
| 615 | return -ENOTTY; |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 616 | |
Heiner Kallweit | 078f3f6 | 2017-06-05 17:57:29 +0200 | [diff] [blame] | 617 | return regmap_update_bits(ds1307->regmap, DS1337_REG_CONTROL, |
| 618 | DS1337_BIT_A1IE, |
| 619 | enabled ? DS1337_BIT_A1IE : 0); |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 620 | } |
| 621 | |
David Brownell | ff8371a | 2006-09-30 23:28:17 -0700 | [diff] [blame] | 622 | static const struct rtc_class_ops ds13xx_rtc_ops = { |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 623 | .read_time = ds1307_get_time, |
| 624 | .set_time = ds1307_set_time, |
Jüri Reitel | 74d88eb | 2009-01-07 18:07:16 -0800 | [diff] [blame] | 625 | .read_alarm = ds1337_read_alarm, |
| 626 | .set_alarm = ds1337_set_alarm, |
John Stultz | 16380c1 | 2011-02-02 17:02:41 -0800 | [diff] [blame] | 627 | .alarm_irq_enable = ds1307_alarm_irq_enable, |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 628 | }; |
| 629 | |
David Brownell | 682d73f | 2007-11-14 16:58:32 -0800 | [diff] [blame] | 630 | /*----------------------------------------------------------------------*/ |
| 631 | |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 632 | /* |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 633 | * Alarm support for rx8130 devices. |
| 634 | */ |
| 635 | |
| 636 | #define RX8130_REG_ALARM_MIN 0x07 |
| 637 | #define RX8130_REG_ALARM_HOUR 0x08 |
| 638 | #define RX8130_REG_ALARM_WEEK_OR_DAY 0x09 |
| 639 | #define RX8130_REG_EXTENSION 0x0c |
Alexandre Belloni | eb4fd19 | 2017-09-04 22:46:05 +0200 | [diff] [blame] | 640 | #define RX8130_REG_EXTENSION_WADA BIT(3) |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 641 | #define RX8130_REG_FLAG 0x0d |
Alexandre Belloni | eb4fd19 | 2017-09-04 22:46:05 +0200 | [diff] [blame] | 642 | #define RX8130_REG_FLAG_AF BIT(3) |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 643 | #define RX8130_REG_CONTROL0 0x0e |
Alexandre Belloni | eb4fd19 | 2017-09-04 22:46:05 +0200 | [diff] [blame] | 644 | #define RX8130_REG_CONTROL0_AIE BIT(3) |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 645 | |
| 646 | static irqreturn_t rx8130_irq(int irq, void *dev_id) |
| 647 | { |
| 648 | struct ds1307 *ds1307 = dev_id; |
| 649 | struct mutex *lock = &ds1307->rtc->ops_lock; |
| 650 | u8 ctl[3]; |
| 651 | int ret; |
| 652 | |
| 653 | mutex_lock(lock); |
| 654 | |
| 655 | /* Read control registers. */ |
Alexandre Belloni | f2b4801 | 2017-09-04 22:46:03 +0200 | [diff] [blame] | 656 | ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl, |
| 657 | sizeof(ctl)); |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 658 | if (ret < 0) |
| 659 | goto out; |
| 660 | if (!(ctl[1] & RX8130_REG_FLAG_AF)) |
| 661 | goto out; |
| 662 | ctl[1] &= ~RX8130_REG_FLAG_AF; |
| 663 | ctl[2] &= ~RX8130_REG_CONTROL0_AIE; |
| 664 | |
Alexandre Belloni | f2b4801 | 2017-09-04 22:46:03 +0200 | [diff] [blame] | 665 | ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, |
| 666 | sizeof(ctl)); |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 667 | if (ret < 0) |
| 668 | goto out; |
| 669 | |
| 670 | rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); |
| 671 | |
| 672 | out: |
| 673 | mutex_unlock(lock); |
| 674 | |
| 675 | return IRQ_HANDLED; |
| 676 | } |
| 677 | |
| 678 | static int rx8130_read_alarm(struct device *dev, struct rtc_wkalrm *t) |
| 679 | { |
| 680 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
| 681 | u8 ald[3], ctl[3]; |
| 682 | int ret; |
| 683 | |
| 684 | if (!test_bit(HAS_ALARM, &ds1307->flags)) |
| 685 | return -EINVAL; |
| 686 | |
| 687 | /* Read alarm registers. */ |
Alexandre Belloni | f2b4801 | 2017-09-04 22:46:03 +0200 | [diff] [blame] | 688 | ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_ALARM_MIN, ald, |
| 689 | sizeof(ald)); |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 690 | if (ret < 0) |
| 691 | return ret; |
| 692 | |
| 693 | /* Read control registers. */ |
Alexandre Belloni | f2b4801 | 2017-09-04 22:46:03 +0200 | [diff] [blame] | 694 | ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl, |
| 695 | sizeof(ctl)); |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 696 | if (ret < 0) |
| 697 | return ret; |
| 698 | |
| 699 | t->enabled = !!(ctl[2] & RX8130_REG_CONTROL0_AIE); |
| 700 | t->pending = !!(ctl[1] & RX8130_REG_FLAG_AF); |
| 701 | |
| 702 | /* Report alarm 0 time assuming 24-hour and day-of-month modes. */ |
| 703 | t->time.tm_sec = -1; |
| 704 | t->time.tm_min = bcd2bin(ald[0] & 0x7f); |
| 705 | t->time.tm_hour = bcd2bin(ald[1] & 0x7f); |
| 706 | t->time.tm_wday = -1; |
| 707 | t->time.tm_mday = bcd2bin(ald[2] & 0x7f); |
| 708 | t->time.tm_mon = -1; |
| 709 | t->time.tm_year = -1; |
| 710 | t->time.tm_yday = -1; |
| 711 | t->time.tm_isdst = -1; |
| 712 | |
| 713 | dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d enabled=%d\n", |
| 714 | __func__, t->time.tm_sec, t->time.tm_min, t->time.tm_hour, |
| 715 | t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled); |
| 716 | |
| 717 | return 0; |
| 718 | } |
| 719 | |
| 720 | static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t) |
| 721 | { |
| 722 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
| 723 | u8 ald[3], ctl[3]; |
| 724 | int ret; |
| 725 | |
| 726 | if (!test_bit(HAS_ALARM, &ds1307->flags)) |
| 727 | return -EINVAL; |
| 728 | |
| 729 | dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d " |
| 730 | "enabled=%d pending=%d\n", __func__, |
| 731 | t->time.tm_sec, t->time.tm_min, t->time.tm_hour, |
| 732 | t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, |
| 733 | t->enabled, t->pending); |
| 734 | |
| 735 | /* Read control registers. */ |
Alexandre Belloni | f2b4801 | 2017-09-04 22:46:03 +0200 | [diff] [blame] | 736 | ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl, |
| 737 | sizeof(ctl)); |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 738 | if (ret < 0) |
| 739 | return ret; |
| 740 | |
| 741 | ctl[0] &= ~RX8130_REG_EXTENSION_WADA; |
| 742 | ctl[1] |= RX8130_REG_FLAG_AF; |
| 743 | ctl[2] &= ~RX8130_REG_CONTROL0_AIE; |
| 744 | |
Alexandre Belloni | f2b4801 | 2017-09-04 22:46:03 +0200 | [diff] [blame] | 745 | ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, |
| 746 | sizeof(ctl)); |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 747 | if (ret < 0) |
| 748 | return ret; |
| 749 | |
| 750 | /* Hardware alarm precision is 1 minute! */ |
| 751 | ald[0] = bin2bcd(t->time.tm_min); |
| 752 | ald[1] = bin2bcd(t->time.tm_hour); |
| 753 | ald[2] = bin2bcd(t->time.tm_mday); |
| 754 | |
Alexandre Belloni | f2b4801 | 2017-09-04 22:46:03 +0200 | [diff] [blame] | 755 | ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_ALARM_MIN, ald, |
| 756 | sizeof(ald)); |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 757 | if (ret < 0) |
| 758 | return ret; |
| 759 | |
| 760 | if (!t->enabled) |
| 761 | return 0; |
| 762 | |
| 763 | ctl[2] |= RX8130_REG_CONTROL0_AIE; |
| 764 | |
Alexandre Belloni | f2b4801 | 2017-09-04 22:46:03 +0200 | [diff] [blame] | 765 | return regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, |
| 766 | sizeof(ctl)); |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 767 | } |
| 768 | |
| 769 | static int rx8130_alarm_irq_enable(struct device *dev, unsigned int enabled) |
| 770 | { |
| 771 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
| 772 | int ret, reg; |
| 773 | |
| 774 | if (!test_bit(HAS_ALARM, &ds1307->flags)) |
| 775 | return -EINVAL; |
| 776 | |
| 777 | ret = regmap_read(ds1307->regmap, RX8130_REG_CONTROL0, ®); |
| 778 | if (ret < 0) |
| 779 | return ret; |
| 780 | |
| 781 | if (enabled) |
| 782 | reg |= RX8130_REG_CONTROL0_AIE; |
| 783 | else |
| 784 | reg &= ~RX8130_REG_CONTROL0_AIE; |
| 785 | |
| 786 | return regmap_write(ds1307->regmap, RX8130_REG_CONTROL0, reg); |
| 787 | } |
| 788 | |
Marek Vasut | ee0981b | 2017-06-18 22:55:28 +0200 | [diff] [blame] | 789 | /*----------------------------------------------------------------------*/ |
| 790 | |
| 791 | /* |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 792 | * Alarm support for mcp794xx devices. |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 793 | */ |
| 794 | |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 795 | #define MCP794XX_REG_CONTROL 0x07 |
| 796 | # define MCP794XX_BIT_ALM0_EN 0x10 |
| 797 | # define MCP794XX_BIT_ALM1_EN 0x20 |
| 798 | #define MCP794XX_REG_ALARM0_BASE 0x0a |
| 799 | #define MCP794XX_REG_ALARM0_CTRL 0x0d |
| 800 | #define MCP794XX_REG_ALARM1_BASE 0x11 |
| 801 | #define MCP794XX_REG_ALARM1_CTRL 0x14 |
Alexandre Belloni | eb4fd19 | 2017-09-04 22:46:05 +0200 | [diff] [blame] | 802 | # define MCP794XX_BIT_ALMX_IF BIT(3) |
| 803 | # define MCP794XX_BIT_ALMX_C0 BIT(4) |
| 804 | # define MCP794XX_BIT_ALMX_C1 BIT(5) |
| 805 | # define MCP794XX_BIT_ALMX_C2 BIT(6) |
| 806 | # define MCP794XX_BIT_ALMX_POL BIT(7) |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 807 | # define MCP794XX_MSK_ALMX_MATCH (MCP794XX_BIT_ALMX_C0 | \ |
| 808 | MCP794XX_BIT_ALMX_C1 | \ |
| 809 | MCP794XX_BIT_ALMX_C2) |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 810 | |
Felipe Balbi | 2fb07a1 | 2015-06-23 11:15:10 -0500 | [diff] [blame] | 811 | static irqreturn_t mcp794xx_irq(int irq, void *dev_id) |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 812 | { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 813 | struct ds1307 *ds1307 = dev_id; |
Felipe Balbi | 2fb07a1 | 2015-06-23 11:15:10 -0500 | [diff] [blame] | 814 | struct mutex *lock = &ds1307->rtc->ops_lock; |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 815 | int reg, ret; |
| 816 | |
Felipe Balbi | 2fb07a1 | 2015-06-23 11:15:10 -0500 | [diff] [blame] | 817 | mutex_lock(lock); |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 818 | |
| 819 | /* Check and clear alarm 0 interrupt flag. */ |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 820 | ret = regmap_read(ds1307->regmap, MCP794XX_REG_ALARM0_CTRL, ®); |
| 821 | if (ret) |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 822 | goto out; |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 823 | if (!(reg & MCP794XX_BIT_ALMX_IF)) |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 824 | goto out; |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 825 | reg &= ~MCP794XX_BIT_ALMX_IF; |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 826 | ret = regmap_write(ds1307->regmap, MCP794XX_REG_ALARM0_CTRL, reg); |
| 827 | if (ret) |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 828 | goto out; |
| 829 | |
| 830 | /* Disable alarm 0. */ |
Heiner Kallweit | 078f3f6 | 2017-06-05 17:57:29 +0200 | [diff] [blame] | 831 | ret = regmap_update_bits(ds1307->regmap, MCP794XX_REG_CONTROL, |
| 832 | MCP794XX_BIT_ALM0_EN, 0); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 833 | if (ret) |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 834 | goto out; |
| 835 | |
| 836 | rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); |
| 837 | |
| 838 | out: |
Felipe Balbi | 2fb07a1 | 2015-06-23 11:15:10 -0500 | [diff] [blame] | 839 | mutex_unlock(lock); |
| 840 | |
| 841 | return IRQ_HANDLED; |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 842 | } |
| 843 | |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 844 | static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t) |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 845 | { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 846 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 847 | u8 regs[10]; |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 848 | int ret; |
| 849 | |
| 850 | if (!test_bit(HAS_ALARM, &ds1307->flags)) |
| 851 | return -EINVAL; |
| 852 | |
| 853 | /* Read control and alarm 0 registers. */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 854 | ret = regmap_bulk_read(ds1307->regmap, MCP794XX_REG_CONTROL, regs, |
| 855 | sizeof(regs)); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 856 | if (ret) |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 857 | return ret; |
| 858 | |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 859 | t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN); |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 860 | |
| 861 | /* Report alarm 0 time assuming 24-hour and day-of-month modes. */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 862 | t->time.tm_sec = bcd2bin(regs[3] & 0x7f); |
| 863 | t->time.tm_min = bcd2bin(regs[4] & 0x7f); |
| 864 | t->time.tm_hour = bcd2bin(regs[5] & 0x3f); |
| 865 | t->time.tm_wday = bcd2bin(regs[6] & 0x7) - 1; |
| 866 | t->time.tm_mday = bcd2bin(regs[7] & 0x3f); |
| 867 | t->time.tm_mon = bcd2bin(regs[8] & 0x1f) - 1; |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 868 | t->time.tm_year = -1; |
| 869 | t->time.tm_yday = -1; |
| 870 | t->time.tm_isdst = -1; |
| 871 | |
| 872 | dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d " |
Alexandre Belloni | eb4fd19 | 2017-09-04 22:46:05 +0200 | [diff] [blame] | 873 | "enabled=%d polarity=%d irq=%d match=%lu\n", __func__, |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 874 | t->time.tm_sec, t->time.tm_min, t->time.tm_hour, |
| 875 | t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled, |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 876 | !!(regs[6] & MCP794XX_BIT_ALMX_POL), |
| 877 | !!(regs[6] & MCP794XX_BIT_ALMX_IF), |
| 878 | (regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4); |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 879 | |
| 880 | return 0; |
| 881 | } |
| 882 | |
Heiner Kallweit | 584ce30 | 2017-08-29 21:52:56 +0200 | [diff] [blame] | 883 | /* |
| 884 | * We may have a random RTC weekday, therefore calculate alarm weekday based |
| 885 | * on current weekday we read from the RTC timekeeping regs |
| 886 | */ |
| 887 | static int mcp794xx_alm_weekday(struct device *dev, struct rtc_time *tm_alarm) |
| 888 | { |
| 889 | struct rtc_time tm_now; |
| 890 | int days_now, days_alarm, ret; |
| 891 | |
| 892 | ret = ds1307_get_time(dev, &tm_now); |
| 893 | if (ret) |
| 894 | return ret; |
| 895 | |
| 896 | days_now = div_s64(rtc_tm_to_time64(&tm_now), 24 * 60 * 60); |
| 897 | days_alarm = div_s64(rtc_tm_to_time64(tm_alarm), 24 * 60 * 60); |
| 898 | |
| 899 | return (tm_now.tm_wday + days_alarm - days_now) % 7 + 1; |
| 900 | } |
| 901 | |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 902 | static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t) |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 903 | { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 904 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 905 | unsigned char regs[10]; |
Heiner Kallweit | 584ce30 | 2017-08-29 21:52:56 +0200 | [diff] [blame] | 906 | int wday, ret; |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 907 | |
| 908 | if (!test_bit(HAS_ALARM, &ds1307->flags)) |
| 909 | return -EINVAL; |
| 910 | |
Heiner Kallweit | 584ce30 | 2017-08-29 21:52:56 +0200 | [diff] [blame] | 911 | wday = mcp794xx_alm_weekday(dev, &t->time); |
| 912 | if (wday < 0) |
| 913 | return wday; |
| 914 | |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 915 | dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d " |
| 916 | "enabled=%d pending=%d\n", __func__, |
| 917 | t->time.tm_sec, t->time.tm_min, t->time.tm_hour, |
| 918 | t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, |
| 919 | t->enabled, t->pending); |
| 920 | |
| 921 | /* Read control and alarm 0 registers. */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 922 | ret = regmap_bulk_read(ds1307->regmap, MCP794XX_REG_CONTROL, regs, |
| 923 | sizeof(regs)); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 924 | if (ret) |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 925 | return ret; |
| 926 | |
| 927 | /* Set alarm 0, using 24-hour and day-of-month modes. */ |
| 928 | regs[3] = bin2bcd(t->time.tm_sec); |
| 929 | regs[4] = bin2bcd(t->time.tm_min); |
| 930 | regs[5] = bin2bcd(t->time.tm_hour); |
Heiner Kallweit | 584ce30 | 2017-08-29 21:52:56 +0200 | [diff] [blame] | 931 | regs[6] = wday; |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 932 | regs[7] = bin2bcd(t->time.tm_mday); |
Tero Kristo | 62c8c20 | 2015-10-23 09:29:57 +0300 | [diff] [blame] | 933 | regs[8] = bin2bcd(t->time.tm_mon + 1); |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 934 | |
| 935 | /* Clear the alarm 0 interrupt flag. */ |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 936 | regs[6] &= ~MCP794XX_BIT_ALMX_IF; |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 937 | /* Set alarm match: second, minute, hour, day, date, month. */ |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 938 | regs[6] |= MCP794XX_MSK_ALMX_MATCH; |
Nishanth Menon | e3edd67 | 2015-04-20 19:51:34 -0500 | [diff] [blame] | 939 | /* Disable interrupt. We will not enable until completely programmed */ |
| 940 | regs[0] &= ~MCP794XX_BIT_ALM0_EN; |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 941 | |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 942 | ret = regmap_bulk_write(ds1307->regmap, MCP794XX_REG_CONTROL, regs, |
| 943 | sizeof(regs)); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 944 | if (ret) |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 945 | return ret; |
| 946 | |
Nishanth Menon | e3edd67 | 2015-04-20 19:51:34 -0500 | [diff] [blame] | 947 | if (!t->enabled) |
| 948 | return 0; |
| 949 | regs[0] |= MCP794XX_BIT_ALM0_EN; |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 950 | return regmap_write(ds1307->regmap, MCP794XX_REG_CONTROL, regs[0]); |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 951 | } |
| 952 | |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 953 | static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled) |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 954 | { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 955 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 956 | |
| 957 | if (!test_bit(HAS_ALARM, &ds1307->flags)) |
| 958 | return -EINVAL; |
| 959 | |
Heiner Kallweit | 078f3f6 | 2017-06-05 17:57:29 +0200 | [diff] [blame] | 960 | return regmap_update_bits(ds1307->regmap, MCP794XX_REG_CONTROL, |
| 961 | MCP794XX_BIT_ALM0_EN, |
| 962 | enabled ? MCP794XX_BIT_ALM0_EN : 0); |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 963 | } |
| 964 | |
Simon Guinot | 1d1945d | 2014-04-03 14:49:55 -0700 | [diff] [blame] | 965 | /*----------------------------------------------------------------------*/ |
| 966 | |
Alexandre Belloni | abc925f | 2017-07-06 11:42:07 +0200 | [diff] [blame] | 967 | static int ds1307_nvram_read(void *priv, unsigned int offset, void *val, |
| 968 | size_t bytes) |
David Brownell | 682d73f | 2007-11-14 16:58:32 -0800 | [diff] [blame] | 969 | { |
Alexandre Belloni | abc925f | 2017-07-06 11:42:07 +0200 | [diff] [blame] | 970 | struct ds1307 *ds1307 = priv; |
Heiner Kallweit | 969fa07 | 2017-07-12 07:49:54 +0200 | [diff] [blame] | 971 | const struct chip_desc *chip = &chips[ds1307->type]; |
David Brownell | 682d73f | 2007-11-14 16:58:32 -0800 | [diff] [blame] | 972 | |
Heiner Kallweit | 969fa07 | 2017-07-12 07:49:54 +0200 | [diff] [blame] | 973 | return regmap_bulk_read(ds1307->regmap, chip->nvram_offset + offset, |
Alexandre Belloni | abc925f | 2017-07-06 11:42:07 +0200 | [diff] [blame] | 974 | val, bytes); |
David Brownell | 682d73f | 2007-11-14 16:58:32 -0800 | [diff] [blame] | 975 | } |
| 976 | |
Alexandre Belloni | abc925f | 2017-07-06 11:42:07 +0200 | [diff] [blame] | 977 | static int ds1307_nvram_write(void *priv, unsigned int offset, void *val, |
| 978 | size_t bytes) |
David Brownell | 682d73f | 2007-11-14 16:58:32 -0800 | [diff] [blame] | 979 | { |
Alexandre Belloni | abc925f | 2017-07-06 11:42:07 +0200 | [diff] [blame] | 980 | struct ds1307 *ds1307 = priv; |
Heiner Kallweit | 969fa07 | 2017-07-12 07:49:54 +0200 | [diff] [blame] | 981 | const struct chip_desc *chip = &chips[ds1307->type]; |
David Brownell | 682d73f | 2007-11-14 16:58:32 -0800 | [diff] [blame] | 982 | |
Heiner Kallweit | 969fa07 | 2017-07-12 07:49:54 +0200 | [diff] [blame] | 983 | return regmap_bulk_write(ds1307->regmap, chip->nvram_offset + offset, |
Alexandre Belloni | abc925f | 2017-07-06 11:42:07 +0200 | [diff] [blame] | 984 | val, bytes); |
David Brownell | 682d73f | 2007-11-14 16:58:32 -0800 | [diff] [blame] | 985 | } |
| 986 | |
David Brownell | 682d73f | 2007-11-14 16:58:32 -0800 | [diff] [blame] | 987 | /*----------------------------------------------------------------------*/ |
| 988 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 989 | static u8 do_trickle_setup_ds1339(struct ds1307 *ds1307, |
Alexandre Belloni | 57ec2d9 | 2017-09-04 22:46:04 +0200 | [diff] [blame] | 990 | u32 ohms, bool diode) |
Matti Vaittinen | 33b04b7 | 2014-10-13 15:52:48 -0700 | [diff] [blame] | 991 | { |
| 992 | u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE : |
| 993 | DS1307_TRICKLE_CHARGER_NO_DIODE; |
| 994 | |
| 995 | switch (ohms) { |
| 996 | case 250: |
| 997 | setup |= DS1307_TRICKLE_CHARGER_250_OHM; |
| 998 | break; |
| 999 | case 2000: |
| 1000 | setup |= DS1307_TRICKLE_CHARGER_2K_OHM; |
| 1001 | break; |
| 1002 | case 4000: |
| 1003 | setup |= DS1307_TRICKLE_CHARGER_4K_OHM; |
| 1004 | break; |
| 1005 | default: |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1006 | dev_warn(ds1307->dev, |
Matti Vaittinen | 33b04b7 | 2014-10-13 15:52:48 -0700 | [diff] [blame] | 1007 | "Unsupported ohm value %u in dt\n", ohms); |
| 1008 | return 0; |
| 1009 | } |
| 1010 | return setup; |
| 1011 | } |
| 1012 | |
Heiner Kallweit | d8490fd | 2017-07-12 07:49:28 +0200 | [diff] [blame] | 1013 | static u8 ds1307_trickle_init(struct ds1307 *ds1307, |
Heiner Kallweit | 7624df4 | 2017-07-12 07:49:33 +0200 | [diff] [blame] | 1014 | const struct chip_desc *chip) |
Matti Vaittinen | 33b04b7 | 2014-10-13 15:52:48 -0700 | [diff] [blame] | 1015 | { |
Alexandre Belloni | 57ec2d9 | 2017-09-04 22:46:04 +0200 | [diff] [blame] | 1016 | u32 ohms; |
Matti Vaittinen | 33b04b7 | 2014-10-13 15:52:48 -0700 | [diff] [blame] | 1017 | bool diode = true; |
| 1018 | |
| 1019 | if (!chip->do_trickle_setup) |
Heiner Kallweit | d8490fd | 2017-07-12 07:49:28 +0200 | [diff] [blame] | 1020 | return 0; |
| 1021 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1022 | if (device_property_read_u32(ds1307->dev, "trickle-resistor-ohms", |
| 1023 | &ohms)) |
Heiner Kallweit | d8490fd | 2017-07-12 07:49:28 +0200 | [diff] [blame] | 1024 | return 0; |
| 1025 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1026 | if (device_property_read_bool(ds1307->dev, "trickle-diode-disable")) |
Matti Vaittinen | 33b04b7 | 2014-10-13 15:52:48 -0700 | [diff] [blame] | 1027 | diode = false; |
Heiner Kallweit | d8490fd | 2017-07-12 07:49:28 +0200 | [diff] [blame] | 1028 | |
| 1029 | return chip->do_trickle_setup(ds1307, ohms, diode); |
Matti Vaittinen | 33b04b7 | 2014-10-13 15:52:48 -0700 | [diff] [blame] | 1030 | } |
| 1031 | |
Akinobu Mita | 445c020 | 2016-01-25 00:22:16 +0900 | [diff] [blame] | 1032 | /*----------------------------------------------------------------------*/ |
| 1033 | |
| 1034 | #ifdef CONFIG_RTC_DRV_DS1307_HWMON |
| 1035 | |
| 1036 | /* |
| 1037 | * Temperature sensor support for ds3231 devices. |
| 1038 | */ |
| 1039 | |
| 1040 | #define DS3231_REG_TEMPERATURE 0x11 |
| 1041 | |
| 1042 | /* |
| 1043 | * A user-initiated temperature conversion is not started by this function, |
| 1044 | * so the temperature is updated once every 64 seconds. |
| 1045 | */ |
Zhuang Yuyao | 9a3dce6 | 2016-04-18 09:21:42 +0900 | [diff] [blame] | 1046 | static int ds3231_hwmon_read_temp(struct device *dev, s32 *mC) |
Akinobu Mita | 445c020 | 2016-01-25 00:22:16 +0900 | [diff] [blame] | 1047 | { |
| 1048 | struct ds1307 *ds1307 = dev_get_drvdata(dev); |
| 1049 | u8 temp_buf[2]; |
| 1050 | s16 temp; |
| 1051 | int ret; |
| 1052 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1053 | ret = regmap_bulk_read(ds1307->regmap, DS3231_REG_TEMPERATURE, |
| 1054 | temp_buf, sizeof(temp_buf)); |
| 1055 | if (ret) |
Akinobu Mita | 445c020 | 2016-01-25 00:22:16 +0900 | [diff] [blame] | 1056 | return ret; |
Akinobu Mita | 445c020 | 2016-01-25 00:22:16 +0900 | [diff] [blame] | 1057 | /* |
| 1058 | * Temperature is represented as a 10-bit code with a resolution of |
| 1059 | * 0.25 degree celsius and encoded in two's complement format. |
| 1060 | */ |
| 1061 | temp = (temp_buf[0] << 8) | temp_buf[1]; |
| 1062 | temp >>= 6; |
| 1063 | *mC = temp * 250; |
| 1064 | |
| 1065 | return 0; |
| 1066 | } |
| 1067 | |
| 1068 | static ssize_t ds3231_hwmon_show_temp(struct device *dev, |
Alexandre Belloni | 4057a66 | 2017-09-04 22:46:06 +0200 | [diff] [blame] | 1069 | struct device_attribute *attr, char *buf) |
Akinobu Mita | 445c020 | 2016-01-25 00:22:16 +0900 | [diff] [blame] | 1070 | { |
| 1071 | int ret; |
Zhuang Yuyao | 9a3dce6 | 2016-04-18 09:21:42 +0900 | [diff] [blame] | 1072 | s32 temp; |
Akinobu Mita | 445c020 | 2016-01-25 00:22:16 +0900 | [diff] [blame] | 1073 | |
| 1074 | ret = ds3231_hwmon_read_temp(dev, &temp); |
| 1075 | if (ret) |
| 1076 | return ret; |
| 1077 | |
| 1078 | return sprintf(buf, "%d\n", temp); |
| 1079 | } |
Alexandre Belloni | b4be271 | 2017-09-04 22:46:08 +0200 | [diff] [blame] | 1080 | static SENSOR_DEVICE_ATTR(temp1_input, 0444, ds3231_hwmon_show_temp, |
Alexandre Belloni | 4057a66 | 2017-09-04 22:46:06 +0200 | [diff] [blame] | 1081 | NULL, 0); |
Akinobu Mita | 445c020 | 2016-01-25 00:22:16 +0900 | [diff] [blame] | 1082 | |
| 1083 | static struct attribute *ds3231_hwmon_attrs[] = { |
| 1084 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
| 1085 | NULL, |
| 1086 | }; |
| 1087 | ATTRIBUTE_GROUPS(ds3231_hwmon); |
| 1088 | |
| 1089 | static void ds1307_hwmon_register(struct ds1307 *ds1307) |
| 1090 | { |
| 1091 | struct device *dev; |
| 1092 | |
| 1093 | if (ds1307->type != ds_3231) |
| 1094 | return; |
| 1095 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1096 | dev = devm_hwmon_device_register_with_groups(ds1307->dev, ds1307->name, |
Alexandre Belloni | 4057a66 | 2017-09-04 22:46:06 +0200 | [diff] [blame] | 1097 | ds1307, |
| 1098 | ds3231_hwmon_groups); |
Akinobu Mita | 445c020 | 2016-01-25 00:22:16 +0900 | [diff] [blame] | 1099 | if (IS_ERR(dev)) { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1100 | dev_warn(ds1307->dev, "unable to register hwmon device %ld\n", |
| 1101 | PTR_ERR(dev)); |
Akinobu Mita | 445c020 | 2016-01-25 00:22:16 +0900 | [diff] [blame] | 1102 | } |
| 1103 | } |
| 1104 | |
| 1105 | #else |
| 1106 | |
| 1107 | static void ds1307_hwmon_register(struct ds1307 *ds1307) |
| 1108 | { |
| 1109 | } |
| 1110 | |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1111 | #endif /* CONFIG_RTC_DRV_DS1307_HWMON */ |
| 1112 | |
| 1113 | /*----------------------------------------------------------------------*/ |
| 1114 | |
| 1115 | /* |
| 1116 | * Square-wave output support for DS3231 |
| 1117 | * Datasheet: https://datasheets.maximintegrated.com/en/ds/DS3231.pdf |
| 1118 | */ |
| 1119 | #ifdef CONFIG_COMMON_CLK |
| 1120 | |
| 1121 | enum { |
| 1122 | DS3231_CLK_SQW = 0, |
| 1123 | DS3231_CLK_32KHZ, |
| 1124 | }; |
| 1125 | |
| 1126 | #define clk_sqw_to_ds1307(clk) \ |
| 1127 | container_of(clk, struct ds1307, clks[DS3231_CLK_SQW]) |
| 1128 | #define clk_32khz_to_ds1307(clk) \ |
| 1129 | container_of(clk, struct ds1307, clks[DS3231_CLK_32KHZ]) |
| 1130 | |
| 1131 | static int ds3231_clk_sqw_rates[] = { |
| 1132 | 1, |
| 1133 | 1024, |
| 1134 | 4096, |
| 1135 | 8192, |
| 1136 | }; |
| 1137 | |
| 1138 | static int ds1337_write_control(struct ds1307 *ds1307, u8 mask, u8 value) |
| 1139 | { |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1140 | struct mutex *lock = &ds1307->rtc->ops_lock; |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1141 | int ret; |
| 1142 | |
| 1143 | mutex_lock(lock); |
Heiner Kallweit | 078f3f6 | 2017-06-05 17:57:29 +0200 | [diff] [blame] | 1144 | ret = regmap_update_bits(ds1307->regmap, DS1337_REG_CONTROL, |
| 1145 | mask, value); |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1146 | mutex_unlock(lock); |
| 1147 | |
| 1148 | return ret; |
| 1149 | } |
| 1150 | |
| 1151 | static unsigned long ds3231_clk_sqw_recalc_rate(struct clk_hw *hw, |
| 1152 | unsigned long parent_rate) |
| 1153 | { |
| 1154 | struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1155 | int control, ret; |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1156 | int rate_sel = 0; |
| 1157 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1158 | ret = regmap_read(ds1307->regmap, DS1337_REG_CONTROL, &control); |
| 1159 | if (ret) |
| 1160 | return ret; |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1161 | if (control & DS1337_BIT_RS1) |
| 1162 | rate_sel += 1; |
| 1163 | if (control & DS1337_BIT_RS2) |
| 1164 | rate_sel += 2; |
| 1165 | |
| 1166 | return ds3231_clk_sqw_rates[rate_sel]; |
| 1167 | } |
| 1168 | |
| 1169 | static long ds3231_clk_sqw_round_rate(struct clk_hw *hw, unsigned long rate, |
Alexandre Belloni | 4057a66 | 2017-09-04 22:46:06 +0200 | [diff] [blame] | 1170 | unsigned long *prate) |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1171 | { |
| 1172 | int i; |
| 1173 | |
| 1174 | for (i = ARRAY_SIZE(ds3231_clk_sqw_rates) - 1; i >= 0; i--) { |
| 1175 | if (ds3231_clk_sqw_rates[i] <= rate) |
| 1176 | return ds3231_clk_sqw_rates[i]; |
| 1177 | } |
| 1178 | |
| 1179 | return 0; |
| 1180 | } |
| 1181 | |
| 1182 | static int ds3231_clk_sqw_set_rate(struct clk_hw *hw, unsigned long rate, |
Alexandre Belloni | 4057a66 | 2017-09-04 22:46:06 +0200 | [diff] [blame] | 1183 | unsigned long parent_rate) |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1184 | { |
| 1185 | struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw); |
| 1186 | int control = 0; |
| 1187 | int rate_sel; |
| 1188 | |
| 1189 | for (rate_sel = 0; rate_sel < ARRAY_SIZE(ds3231_clk_sqw_rates); |
| 1190 | rate_sel++) { |
| 1191 | if (ds3231_clk_sqw_rates[rate_sel] == rate) |
| 1192 | break; |
| 1193 | } |
| 1194 | |
| 1195 | if (rate_sel == ARRAY_SIZE(ds3231_clk_sqw_rates)) |
| 1196 | return -EINVAL; |
| 1197 | |
| 1198 | if (rate_sel & 1) |
| 1199 | control |= DS1337_BIT_RS1; |
| 1200 | if (rate_sel & 2) |
| 1201 | control |= DS1337_BIT_RS2; |
| 1202 | |
| 1203 | return ds1337_write_control(ds1307, DS1337_BIT_RS1 | DS1337_BIT_RS2, |
| 1204 | control); |
| 1205 | } |
| 1206 | |
| 1207 | static int ds3231_clk_sqw_prepare(struct clk_hw *hw) |
| 1208 | { |
| 1209 | struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw); |
| 1210 | |
| 1211 | return ds1337_write_control(ds1307, DS1337_BIT_INTCN, 0); |
| 1212 | } |
| 1213 | |
| 1214 | static void ds3231_clk_sqw_unprepare(struct clk_hw *hw) |
| 1215 | { |
| 1216 | struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw); |
| 1217 | |
| 1218 | ds1337_write_control(ds1307, DS1337_BIT_INTCN, DS1337_BIT_INTCN); |
| 1219 | } |
| 1220 | |
| 1221 | static int ds3231_clk_sqw_is_prepared(struct clk_hw *hw) |
| 1222 | { |
| 1223 | struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1224 | int control, ret; |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1225 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1226 | ret = regmap_read(ds1307->regmap, DS1337_REG_CONTROL, &control); |
| 1227 | if (ret) |
| 1228 | return ret; |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1229 | |
| 1230 | return !(control & DS1337_BIT_INTCN); |
| 1231 | } |
| 1232 | |
| 1233 | static const struct clk_ops ds3231_clk_sqw_ops = { |
| 1234 | .prepare = ds3231_clk_sqw_prepare, |
| 1235 | .unprepare = ds3231_clk_sqw_unprepare, |
| 1236 | .is_prepared = ds3231_clk_sqw_is_prepared, |
| 1237 | .recalc_rate = ds3231_clk_sqw_recalc_rate, |
| 1238 | .round_rate = ds3231_clk_sqw_round_rate, |
| 1239 | .set_rate = ds3231_clk_sqw_set_rate, |
| 1240 | }; |
| 1241 | |
| 1242 | static unsigned long ds3231_clk_32khz_recalc_rate(struct clk_hw *hw, |
Alexandre Belloni | 4057a66 | 2017-09-04 22:46:06 +0200 | [diff] [blame] | 1243 | unsigned long parent_rate) |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1244 | { |
| 1245 | return 32768; |
| 1246 | } |
| 1247 | |
| 1248 | static int ds3231_clk_32khz_control(struct ds1307 *ds1307, bool enable) |
| 1249 | { |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1250 | struct mutex *lock = &ds1307->rtc->ops_lock; |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1251 | int ret; |
| 1252 | |
| 1253 | mutex_lock(lock); |
Heiner Kallweit | 078f3f6 | 2017-06-05 17:57:29 +0200 | [diff] [blame] | 1254 | ret = regmap_update_bits(ds1307->regmap, DS1337_REG_STATUS, |
| 1255 | DS3231_BIT_EN32KHZ, |
| 1256 | enable ? DS3231_BIT_EN32KHZ : 0); |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1257 | mutex_unlock(lock); |
| 1258 | |
| 1259 | return ret; |
| 1260 | } |
| 1261 | |
| 1262 | static int ds3231_clk_32khz_prepare(struct clk_hw *hw) |
| 1263 | { |
| 1264 | struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw); |
| 1265 | |
| 1266 | return ds3231_clk_32khz_control(ds1307, true); |
| 1267 | } |
| 1268 | |
| 1269 | static void ds3231_clk_32khz_unprepare(struct clk_hw *hw) |
| 1270 | { |
| 1271 | struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw); |
| 1272 | |
| 1273 | ds3231_clk_32khz_control(ds1307, false); |
| 1274 | } |
| 1275 | |
| 1276 | static int ds3231_clk_32khz_is_prepared(struct clk_hw *hw) |
| 1277 | { |
| 1278 | struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1279 | int status, ret; |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1280 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1281 | ret = regmap_read(ds1307->regmap, DS1337_REG_STATUS, &status); |
| 1282 | if (ret) |
| 1283 | return ret; |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1284 | |
| 1285 | return !!(status & DS3231_BIT_EN32KHZ); |
| 1286 | } |
| 1287 | |
| 1288 | static const struct clk_ops ds3231_clk_32khz_ops = { |
| 1289 | .prepare = ds3231_clk_32khz_prepare, |
| 1290 | .unprepare = ds3231_clk_32khz_unprepare, |
| 1291 | .is_prepared = ds3231_clk_32khz_is_prepared, |
| 1292 | .recalc_rate = ds3231_clk_32khz_recalc_rate, |
| 1293 | }; |
| 1294 | |
| 1295 | static struct clk_init_data ds3231_clks_init[] = { |
| 1296 | [DS3231_CLK_SQW] = { |
| 1297 | .name = "ds3231_clk_sqw", |
| 1298 | .ops = &ds3231_clk_sqw_ops, |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1299 | }, |
| 1300 | [DS3231_CLK_32KHZ] = { |
| 1301 | .name = "ds3231_clk_32khz", |
| 1302 | .ops = &ds3231_clk_32khz_ops, |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1303 | }, |
| 1304 | }; |
| 1305 | |
| 1306 | static int ds3231_clks_register(struct ds1307 *ds1307) |
| 1307 | { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1308 | struct device_node *node = ds1307->dev->of_node; |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1309 | struct clk_onecell_data *onecell; |
| 1310 | int i; |
| 1311 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1312 | onecell = devm_kzalloc(ds1307->dev, sizeof(*onecell), GFP_KERNEL); |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1313 | if (!onecell) |
| 1314 | return -ENOMEM; |
| 1315 | |
| 1316 | onecell->clk_num = ARRAY_SIZE(ds3231_clks_init); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1317 | onecell->clks = devm_kcalloc(ds1307->dev, onecell->clk_num, |
| 1318 | sizeof(onecell->clks[0]), GFP_KERNEL); |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1319 | if (!onecell->clks) |
| 1320 | return -ENOMEM; |
| 1321 | |
| 1322 | for (i = 0; i < ARRAY_SIZE(ds3231_clks_init); i++) { |
| 1323 | struct clk_init_data init = ds3231_clks_init[i]; |
| 1324 | |
| 1325 | /* |
| 1326 | * Interrupt signal due to alarm conditions and square-wave |
| 1327 | * output share same pin, so don't initialize both. |
| 1328 | */ |
| 1329 | if (i == DS3231_CLK_SQW && test_bit(HAS_ALARM, &ds1307->flags)) |
| 1330 | continue; |
| 1331 | |
| 1332 | /* optional override of the clockname */ |
| 1333 | of_property_read_string_index(node, "clock-output-names", i, |
Alexandre Belloni | 4057a66 | 2017-09-04 22:46:06 +0200 | [diff] [blame] | 1334 | &init.name); |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1335 | ds1307->clks[i].init = &init; |
| 1336 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1337 | onecell->clks[i] = devm_clk_register(ds1307->dev, |
| 1338 | &ds1307->clks[i]); |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1339 | if (IS_ERR(onecell->clks[i])) |
| 1340 | return PTR_ERR(onecell->clks[i]); |
| 1341 | } |
| 1342 | |
| 1343 | if (!node) |
| 1344 | return 0; |
| 1345 | |
| 1346 | of_clk_add_provider(node, of_clk_src_onecell_get, onecell); |
| 1347 | |
| 1348 | return 0; |
| 1349 | } |
| 1350 | |
| 1351 | static void ds1307_clks_register(struct ds1307 *ds1307) |
| 1352 | { |
| 1353 | int ret; |
| 1354 | |
| 1355 | if (ds1307->type != ds_3231) |
| 1356 | return; |
| 1357 | |
| 1358 | ret = ds3231_clks_register(ds1307); |
| 1359 | if (ret) { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1360 | dev_warn(ds1307->dev, "unable to register clock device %d\n", |
| 1361 | ret); |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1362 | } |
| 1363 | } |
| 1364 | |
| 1365 | #else |
| 1366 | |
| 1367 | static void ds1307_clks_register(struct ds1307 *ds1307) |
| 1368 | { |
| 1369 | } |
| 1370 | |
| 1371 | #endif /* CONFIG_COMMON_CLK */ |
Akinobu Mita | 445c020 | 2016-01-25 00:22:16 +0900 | [diff] [blame] | 1372 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1373 | static const struct regmap_config regmap_config = { |
| 1374 | .reg_bits = 8, |
| 1375 | .val_bits = 8, |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1376 | }; |
| 1377 | |
Greg Kroah-Hartman | 5a167f4 | 2012-12-21 13:09:38 -0800 | [diff] [blame] | 1378 | static int ds1307_probe(struct i2c_client *client, |
| 1379 | const struct i2c_device_id *id) |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1380 | { |
| 1381 | struct ds1307 *ds1307; |
| 1382 | int err = -ENODEV; |
Heiner Kallweit | 584ce30 | 2017-08-29 21:52:56 +0200 | [diff] [blame] | 1383 | int tmp; |
Heiner Kallweit | 7624df4 | 2017-07-12 07:49:33 +0200 | [diff] [blame] | 1384 | const struct chip_desc *chip; |
Heiner Kallweit | 82e2d43 | 2017-07-12 07:49:37 +0200 | [diff] [blame] | 1385 | bool want_irq; |
Michael Lange | 8bc2a40 | 2016-01-21 18:10:16 +0100 | [diff] [blame] | 1386 | bool ds1307_can_wakeup_device = false; |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1387 | unsigned char regs[8]; |
Jingoo Han | 01ce893 | 2013-11-12 15:10:41 -0800 | [diff] [blame] | 1388 | struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev); |
Heiner Kallweit | d8490fd | 2017-07-12 07:49:28 +0200 | [diff] [blame] | 1389 | u8 trickle_charger_setup = 0; |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1390 | |
Jingoo Han | edca66d | 2013-07-03 15:07:05 -0700 | [diff] [blame] | 1391 | ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL); |
David Anders | 40ce972 | 2012-03-23 15:02:37 -0700 | [diff] [blame] | 1392 | if (!ds1307) |
David Brownell | c065f35 | 2007-07-17 04:05:10 -0700 | [diff] [blame] | 1393 | return -ENOMEM; |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 1394 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1395 | dev_set_drvdata(&client->dev, ds1307); |
| 1396 | ds1307->dev = &client->dev; |
| 1397 | ds1307->name = client->name; |
Joakim Tjernlund | 33df2ee | 2009-06-17 16:26:08 -0700 | [diff] [blame] | 1398 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1399 | ds1307->regmap = devm_regmap_init_i2c(client, ®map_config); |
| 1400 | if (IS_ERR(ds1307->regmap)) { |
| 1401 | dev_err(ds1307->dev, "regmap allocation failed\n"); |
| 1402 | return PTR_ERR(ds1307->regmap); |
| 1403 | } |
| 1404 | |
| 1405 | i2c_set_clientdata(client, ds1307); |
Javier Martinez Canillas | 7ef6d2c | 2017-03-03 11:29:15 -0300 | [diff] [blame] | 1406 | |
| 1407 | if (client->dev.of_node) { |
| 1408 | ds1307->type = (enum ds_type) |
| 1409 | of_device_get_match_data(&client->dev); |
| 1410 | chip = &chips[ds1307->type]; |
| 1411 | } else if (id) { |
Tin Huynh | 9c19b89 | 2016-11-30 09:57:31 +0700 | [diff] [blame] | 1412 | chip = &chips[id->driver_data]; |
| 1413 | ds1307->type = id->driver_data; |
| 1414 | } else { |
| 1415 | const struct acpi_device_id *acpi_id; |
Joakim Tjernlund | 33df2ee | 2009-06-17 16:26:08 -0700 | [diff] [blame] | 1416 | |
Tin Huynh | 9c19b89 | 2016-11-30 09:57:31 +0700 | [diff] [blame] | 1417 | acpi_id = acpi_match_device(ACPI_PTR(ds1307_acpi_ids), |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1418 | ds1307->dev); |
Tin Huynh | 9c19b89 | 2016-11-30 09:57:31 +0700 | [diff] [blame] | 1419 | if (!acpi_id) |
| 1420 | return -ENODEV; |
| 1421 | chip = &chips[acpi_id->driver_data]; |
| 1422 | ds1307->type = acpi_id->driver_data; |
| 1423 | } |
| 1424 | |
Heiner Kallweit | 82e2d43 | 2017-07-12 07:49:37 +0200 | [diff] [blame] | 1425 | want_irq = client->irq > 0 && chip->alarm; |
Matti Vaittinen | 33b04b7 | 2014-10-13 15:52:48 -0700 | [diff] [blame] | 1426 | |
Matti Vaittinen | 33b04b7 | 2014-10-13 15:52:48 -0700 | [diff] [blame] | 1427 | if (!pdata) |
Heiner Kallweit | d8490fd | 2017-07-12 07:49:28 +0200 | [diff] [blame] | 1428 | trickle_charger_setup = ds1307_trickle_init(ds1307, chip); |
Matti Vaittinen | 33b04b7 | 2014-10-13 15:52:48 -0700 | [diff] [blame] | 1429 | else if (pdata->trickle_charger_setup) |
Heiner Kallweit | d8490fd | 2017-07-12 07:49:28 +0200 | [diff] [blame] | 1430 | trickle_charger_setup = pdata->trickle_charger_setup; |
Matti Vaittinen | 33b04b7 | 2014-10-13 15:52:48 -0700 | [diff] [blame] | 1431 | |
Heiner Kallweit | d8490fd | 2017-07-12 07:49:28 +0200 | [diff] [blame] | 1432 | if (trickle_charger_setup && chip->trickle_charger_reg) { |
| 1433 | trickle_charger_setup |= DS13XX_TRICKLE_CHARGER_MAGIC; |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1434 | dev_dbg(ds1307->dev, |
| 1435 | "writing trickle charger info 0x%x to 0x%x\n", |
Heiner Kallweit | d8490fd | 2017-07-12 07:49:28 +0200 | [diff] [blame] | 1436 | trickle_charger_setup, chip->trickle_charger_reg); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1437 | regmap_write(ds1307->regmap, chip->trickle_charger_reg, |
Heiner Kallweit | d8490fd | 2017-07-12 07:49:28 +0200 | [diff] [blame] | 1438 | trickle_charger_setup); |
Matti Vaittinen | 33b04b7 | 2014-10-13 15:52:48 -0700 | [diff] [blame] | 1439 | } |
Wolfram Sang | eb86c30 | 2012-05-29 15:07:38 -0700 | [diff] [blame] | 1440 | |
Michael Lange | 8bc2a40 | 2016-01-21 18:10:16 +0100 | [diff] [blame] | 1441 | #ifdef CONFIG_OF |
| 1442 | /* |
| 1443 | * For devices with no IRQ directly connected to the SoC, the RTC chip |
| 1444 | * can be forced as a wakeup source by stating that explicitly in |
| 1445 | * the device's .dts file using the "wakeup-source" boolean property. |
| 1446 | * If the "wakeup-source" property is set, don't request an IRQ. |
| 1447 | * This will guarantee the 'wakealarm' sysfs entry is available on the device, |
| 1448 | * if supported by the RTC. |
| 1449 | */ |
Heiner Kallweit | 82e2d43 | 2017-07-12 07:49:37 +0200 | [diff] [blame] | 1450 | if (chip->alarm && of_property_read_bool(client->dev.of_node, |
| 1451 | "wakeup-source")) |
Michael Lange | 8bc2a40 | 2016-01-21 18:10:16 +0100 | [diff] [blame] | 1452 | ds1307_can_wakeup_device = true; |
Michael Lange | 8bc2a40 | 2016-01-21 18:10:16 +0100 | [diff] [blame] | 1453 | #endif |
| 1454 | |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 1455 | switch (ds1307->type) { |
| 1456 | case ds_1337: |
| 1457 | case ds_1339: |
Nikita Yushchenko | 0759c88 | 2017-08-24 09:32:11 +0300 | [diff] [blame] | 1458 | case ds_1341: |
Wolfram Sang | 97f902b | 2009-06-17 16:26:10 -0700 | [diff] [blame] | 1459 | case ds_3231: |
Rodolfo Giometti | be5f59f | 2007-07-17 04:05:06 -0700 | [diff] [blame] | 1460 | /* get registers that the "rtc" read below won't read... */ |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1461 | err = regmap_bulk_read(ds1307->regmap, DS1337_REG_CONTROL, |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1462 | regs, 2); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1463 | if (err) { |
| 1464 | dev_dbg(ds1307->dev, "read error %d\n", err); |
Jingoo Han | edca66d | 2013-07-03 15:07:05 -0700 | [diff] [blame] | 1465 | goto exit; |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1466 | } |
| 1467 | |
Rodolfo Giometti | be5f59f | 2007-07-17 04:05:06 -0700 | [diff] [blame] | 1468 | /* oscillator off? turn it on, so clock can tick. */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1469 | if (regs[0] & DS1337_BIT_nEOSC) |
| 1470 | regs[0] &= ~DS1337_BIT_nEOSC; |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 1471 | |
David Anders | 40ce972 | 2012-03-23 15:02:37 -0700 | [diff] [blame] | 1472 | /* |
Michael Lange | 8bc2a40 | 2016-01-21 18:10:16 +0100 | [diff] [blame] | 1473 | * Using IRQ or defined as wakeup-source? |
| 1474 | * Disable the square wave and both alarms. |
Wolfram Sang | 97f902b | 2009-06-17 16:26:10 -0700 | [diff] [blame] | 1475 | * For some variants, be sure alarms can trigger when we're |
| 1476 | * running on Vbackup (BBSQI/BBSQW) |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 1477 | */ |
Heiner Kallweit | 82e2d43 | 2017-07-12 07:49:37 +0200 | [diff] [blame] | 1478 | if (want_irq || ds1307_can_wakeup_device) { |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1479 | regs[0] |= DS1337_BIT_INTCN | chip->bbsqi_bit; |
| 1480 | regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE); |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 1481 | } |
| 1482 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1483 | regmap_write(ds1307->regmap, DS1337_REG_CONTROL, |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1484 | regs[0]); |
Rodolfo Giometti | be5f59f | 2007-07-17 04:05:06 -0700 | [diff] [blame] | 1485 | |
| 1486 | /* oscillator fault? clear flag, and warn */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1487 | if (regs[1] & DS1337_BIT_OSF) { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1488 | regmap_write(ds1307->regmap, DS1337_REG_STATUS, |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1489 | regs[1] & ~DS1337_BIT_OSF); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1490 | dev_warn(ds1307->dev, "SET TIME!\n"); |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1491 | } |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 1492 | break; |
Matthias Fuchs | a216685 | 2009-03-31 15:24:58 -0700 | [diff] [blame] | 1493 | |
| 1494 | case rx_8025: |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1495 | err = regmap_bulk_read(ds1307->regmap, |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1496 | RX8025_REG_CTRL1 << 4 | 0x08, regs, 2); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1497 | if (err) { |
| 1498 | dev_dbg(ds1307->dev, "read error %d\n", err); |
Jingoo Han | edca66d | 2013-07-03 15:07:05 -0700 | [diff] [blame] | 1499 | goto exit; |
Matthias Fuchs | a216685 | 2009-03-31 15:24:58 -0700 | [diff] [blame] | 1500 | } |
| 1501 | |
| 1502 | /* oscillator off? turn it on, so clock can tick. */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1503 | if (!(regs[1] & RX8025_BIT_XST)) { |
| 1504 | regs[1] |= RX8025_BIT_XST; |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1505 | regmap_write(ds1307->regmap, |
| 1506 | RX8025_REG_CTRL2 << 4 | 0x08, |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1507 | regs[1]); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1508 | dev_warn(ds1307->dev, |
Matthias Fuchs | a216685 | 2009-03-31 15:24:58 -0700 | [diff] [blame] | 1509 | "oscillator stop detected - SET TIME!\n"); |
| 1510 | } |
| 1511 | |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1512 | if (regs[1] & RX8025_BIT_PON) { |
| 1513 | regs[1] &= ~RX8025_BIT_PON; |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1514 | regmap_write(ds1307->regmap, |
| 1515 | RX8025_REG_CTRL2 << 4 | 0x08, |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1516 | regs[1]); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1517 | dev_warn(ds1307->dev, "power-on detected\n"); |
Matthias Fuchs | a216685 | 2009-03-31 15:24:58 -0700 | [diff] [blame] | 1518 | } |
| 1519 | |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1520 | if (regs[1] & RX8025_BIT_VDET) { |
| 1521 | regs[1] &= ~RX8025_BIT_VDET; |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1522 | regmap_write(ds1307->regmap, |
| 1523 | RX8025_REG_CTRL2 << 4 | 0x08, |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1524 | regs[1]); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1525 | dev_warn(ds1307->dev, "voltage drop detected\n"); |
Matthias Fuchs | a216685 | 2009-03-31 15:24:58 -0700 | [diff] [blame] | 1526 | } |
| 1527 | |
| 1528 | /* make sure we are running in 24hour mode */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1529 | if (!(regs[0] & RX8025_BIT_2412)) { |
Matthias Fuchs | a216685 | 2009-03-31 15:24:58 -0700 | [diff] [blame] | 1530 | u8 hour; |
| 1531 | |
| 1532 | /* switch to 24 hour mode */ |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1533 | regmap_write(ds1307->regmap, |
| 1534 | RX8025_REG_CTRL1 << 4 | 0x08, |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1535 | regs[0] | RX8025_BIT_2412); |
Matthias Fuchs | a216685 | 2009-03-31 15:24:58 -0700 | [diff] [blame] | 1536 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1537 | err = regmap_bulk_read(ds1307->regmap, |
| 1538 | RX8025_REG_CTRL1 << 4 | 0x08, |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1539 | regs, 2); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1540 | if (err) { |
| 1541 | dev_dbg(ds1307->dev, "read error %d\n", err); |
Jingoo Han | edca66d | 2013-07-03 15:07:05 -0700 | [diff] [blame] | 1542 | goto exit; |
Matthias Fuchs | a216685 | 2009-03-31 15:24:58 -0700 | [diff] [blame] | 1543 | } |
| 1544 | |
| 1545 | /* correct hour */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1546 | hour = bcd2bin(regs[DS1307_REG_HOUR]); |
Matthias Fuchs | a216685 | 2009-03-31 15:24:58 -0700 | [diff] [blame] | 1547 | if (hour == 12) |
| 1548 | hour = 0; |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1549 | if (regs[DS1307_REG_HOUR] & DS1307_BIT_PM) |
Matthias Fuchs | a216685 | 2009-03-31 15:24:58 -0700 | [diff] [blame] | 1550 | hour += 12; |
| 1551 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1552 | regmap_write(ds1307->regmap, |
| 1553 | DS1307_REG_HOUR << 4 | 0x08, hour); |
Matthias Fuchs | a216685 | 2009-03-31 15:24:58 -0700 | [diff] [blame] | 1554 | } |
| 1555 | break; |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 1556 | default: |
| 1557 | break; |
| 1558 | } |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1559 | |
| 1560 | read_rtc: |
| 1561 | /* read RTC registers */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1562 | err = regmap_bulk_read(ds1307->regmap, chip->offset, regs, |
| 1563 | sizeof(regs)); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1564 | if (err) { |
| 1565 | dev_dbg(ds1307->dev, "read error %d\n", err); |
Jingoo Han | edca66d | 2013-07-03 15:07:05 -0700 | [diff] [blame] | 1566 | goto exit; |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1567 | } |
| 1568 | |
David Anders | 40ce972 | 2012-03-23 15:02:37 -0700 | [diff] [blame] | 1569 | /* |
| 1570 | * minimal sanity checking; some chips (like DS1340) don't |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1571 | * specify the extra bits as must-be-zero, but there are |
| 1572 | * still a few values that are clearly out-of-range. |
| 1573 | */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1574 | tmp = regs[DS1307_REG_SECS]; |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 1575 | switch (ds1307->type) { |
| 1576 | case ds_1307: |
Stefan Agner | 8566f70 | 2017-03-23 16:54:57 -0700 | [diff] [blame] | 1577 | case m41t0: |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 1578 | case m41t00: |
Rodolfo Giometti | be5f59f | 2007-07-17 04:05:06 -0700 | [diff] [blame] | 1579 | /* clock halted? turn it on, so clock can tick. */ |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 1580 | if (tmp & DS1307_BIT_CH) { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1581 | regmap_write(ds1307->regmap, DS1307_REG_SECS, 0); |
| 1582 | dev_warn(ds1307->dev, "SET TIME!\n"); |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 1583 | goto read_rtc; |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1584 | } |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 1585 | break; |
Sean Nyekjaer | 300a773 | 2017-06-08 12:36:54 +0200 | [diff] [blame] | 1586 | case ds_1308: |
Rodolfo Giometti | be5f59f | 2007-07-17 04:05:06 -0700 | [diff] [blame] | 1587 | case ds_1338: |
| 1588 | /* clock halted? turn it on, so clock can tick. */ |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 1589 | if (tmp & DS1307_BIT_CH) |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1590 | regmap_write(ds1307->regmap, DS1307_REG_SECS, 0); |
Rodolfo Giometti | be5f59f | 2007-07-17 04:05:06 -0700 | [diff] [blame] | 1591 | |
| 1592 | /* oscillator fault? clear flag, and warn */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1593 | if (regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1594 | regmap_write(ds1307->regmap, DS1307_REG_CONTROL, |
Alexandre Belloni | 4057a66 | 2017-09-04 22:46:06 +0200 | [diff] [blame] | 1595 | regs[DS1307_REG_CONTROL] & |
| 1596 | ~DS1338_BIT_OSF); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1597 | dev_warn(ds1307->dev, "SET TIME!\n"); |
Rodolfo Giometti | be5f59f | 2007-07-17 04:05:06 -0700 | [diff] [blame] | 1598 | goto read_rtc; |
| 1599 | } |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 1600 | break; |
frederic Rodo | fcd8db0 | 2008-02-06 01:38:55 -0800 | [diff] [blame] | 1601 | case ds_1340: |
| 1602 | /* clock halted? turn it on, so clock can tick. */ |
| 1603 | if (tmp & DS1340_BIT_nEOSC) |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1604 | regmap_write(ds1307->regmap, DS1307_REG_SECS, 0); |
frederic Rodo | fcd8db0 | 2008-02-06 01:38:55 -0800 | [diff] [blame] | 1605 | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1606 | err = regmap_read(ds1307->regmap, DS1340_REG_FLAG, &tmp); |
| 1607 | if (err) { |
| 1608 | dev_dbg(ds1307->dev, "read error %d\n", err); |
Jingoo Han | edca66d | 2013-07-03 15:07:05 -0700 | [diff] [blame] | 1609 | goto exit; |
frederic Rodo | fcd8db0 | 2008-02-06 01:38:55 -0800 | [diff] [blame] | 1610 | } |
| 1611 | |
| 1612 | /* oscillator fault? clear flag, and warn */ |
| 1613 | if (tmp & DS1340_BIT_OSF) { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1614 | regmap_write(ds1307->regmap, DS1340_REG_FLAG, 0); |
| 1615 | dev_warn(ds1307->dev, "SET TIME!\n"); |
frederic Rodo | fcd8db0 | 2008-02-06 01:38:55 -0800 | [diff] [blame] | 1616 | } |
| 1617 | break; |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 1618 | case mcp794xx: |
David Anders | 43fcb81 | 2011-11-02 13:37:53 -0700 | [diff] [blame] | 1619 | /* make sure that the backup battery is enabled */ |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1620 | if (!(regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1621 | regmap_write(ds1307->regmap, DS1307_REG_WDAY, |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1622 | regs[DS1307_REG_WDAY] | |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1623 | MCP794XX_BIT_VBATEN); |
David Anders | 43fcb81 | 2011-11-02 13:37:53 -0700 | [diff] [blame] | 1624 | } |
| 1625 | |
| 1626 | /* clock halted? turn it on, so clock can tick. */ |
Tomas Novotny | f4199f8 | 2014-12-10 15:53:57 -0800 | [diff] [blame] | 1627 | if (!(tmp & MCP794XX_BIT_ST)) { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1628 | regmap_write(ds1307->regmap, DS1307_REG_SECS, |
| 1629 | MCP794XX_BIT_ST); |
| 1630 | dev_warn(ds1307->dev, "SET TIME!\n"); |
David Anders | 43fcb81 | 2011-11-02 13:37:53 -0700 | [diff] [blame] | 1631 | goto read_rtc; |
| 1632 | } |
| 1633 | |
| 1634 | break; |
Wolfram Sang | 32d322b | 2012-03-23 15:02:36 -0700 | [diff] [blame] | 1635 | default: |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 1636 | break; |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1637 | } |
David Brownell | 045e0e8 | 2007-07-17 04:04:55 -0700 | [diff] [blame] | 1638 | |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1639 | tmp = regs[DS1307_REG_HOUR]; |
David Brownell | c065f35 | 2007-07-17 04:05:10 -0700 | [diff] [blame] | 1640 | switch (ds1307->type) { |
| 1641 | case ds_1340: |
Stefan Agner | 8566f70 | 2017-03-23 16:54:57 -0700 | [diff] [blame] | 1642 | case m41t0: |
David Brownell | c065f35 | 2007-07-17 04:05:10 -0700 | [diff] [blame] | 1643 | case m41t00: |
David Anders | 40ce972 | 2012-03-23 15:02:37 -0700 | [diff] [blame] | 1644 | /* |
| 1645 | * NOTE: ignores century bits; fix before deploying |
David Brownell | c065f35 | 2007-07-17 04:05:10 -0700 | [diff] [blame] | 1646 | * systems that will run through year 2100. |
| 1647 | */ |
| 1648 | break; |
Matthias Fuchs | a216685 | 2009-03-31 15:24:58 -0700 | [diff] [blame] | 1649 | case rx_8025: |
| 1650 | break; |
David Brownell | c065f35 | 2007-07-17 04:05:10 -0700 | [diff] [blame] | 1651 | default: |
| 1652 | if (!(tmp & DS1307_BIT_12HR)) |
| 1653 | break; |
| 1654 | |
David Anders | 40ce972 | 2012-03-23 15:02:37 -0700 | [diff] [blame] | 1655 | /* |
| 1656 | * Be sure we're in 24 hour mode. Multi-master systems |
David Brownell | c065f35 | 2007-07-17 04:05:10 -0700 | [diff] [blame] | 1657 | * take note... |
| 1658 | */ |
Adrian Bunk | fe20ba7 | 2008-10-18 20:28:41 -0700 | [diff] [blame] | 1659 | tmp = bcd2bin(tmp & 0x1f); |
David Brownell | c065f35 | 2007-07-17 04:05:10 -0700 | [diff] [blame] | 1660 | if (tmp == 12) |
| 1661 | tmp = 0; |
Alexandre Belloni | 042fa8c | 2017-09-04 22:46:02 +0200 | [diff] [blame] | 1662 | if (regs[DS1307_REG_HOUR] & DS1307_BIT_PM) |
David Brownell | c065f35 | 2007-07-17 04:05:10 -0700 | [diff] [blame] | 1663 | tmp += 12; |
Heiner Kallweit | e553170 | 2017-07-12 07:49:47 +0200 | [diff] [blame] | 1664 | regmap_write(ds1307->regmap, chip->offset + DS1307_REG_HOUR, |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1665 | bin2bcd(tmp)); |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1666 | } |
| 1667 | |
Heiner Kallweit | 82e2d43 | 2017-07-12 07:49:37 +0200 | [diff] [blame] | 1668 | if (want_irq || ds1307_can_wakeup_device) { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1669 | device_set_wakeup_capable(ds1307->dev, true); |
Simon Guinot | 3abb1ad | 2015-11-26 15:37:13 +0100 | [diff] [blame] | 1670 | set_bit(HAS_ALARM, &ds1307->flags); |
| 1671 | } |
Alexandre Belloni | 69b119a | 2017-07-06 11:42:06 +0200 | [diff] [blame] | 1672 | |
| 1673 | ds1307->rtc = devm_rtc_allocate_device(ds1307->dev); |
Alexandre Belloni | e69c056 | 2017-09-04 22:46:07 +0200 | [diff] [blame] | 1674 | if (IS_ERR(ds1307->rtc)) |
Alessandro Zummo | 4071ea2 | 2014-04-03 14:49:36 -0700 | [diff] [blame] | 1675 | return PTR_ERR(ds1307->rtc); |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1676 | |
Heiner Kallweit | 82e2d43 | 2017-07-12 07:49:37 +0200 | [diff] [blame] | 1677 | if (ds1307_can_wakeup_device && !want_irq) { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1678 | dev_info(ds1307->dev, |
| 1679 | "'wakeup-source' is set, request for an IRQ is disabled!\n"); |
Michael Lange | 8bc2a40 | 2016-01-21 18:10:16 +0100 | [diff] [blame] | 1680 | /* We cannot support UIE mode if we do not have an IRQ line */ |
| 1681 | ds1307->rtc->uie_unsupported = 1; |
| 1682 | } |
| 1683 | |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 1684 | if (want_irq) { |
Heiner Kallweit | 4594712 | 2017-07-12 07:49:41 +0200 | [diff] [blame] | 1685 | err = devm_request_threaded_irq(ds1307->dev, client->irq, NULL, |
| 1686 | chip->irq_handler ?: ds1307_irq, |
Nishanth Menon | c598319 | 2015-06-23 11:15:11 -0500 | [diff] [blame] | 1687 | IRQF_SHARED | IRQF_ONESHOT, |
Alexandre Belloni | 4b9e2a0 | 2017-06-02 14:13:21 +0200 | [diff] [blame] | 1688 | ds1307->name, ds1307); |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 1689 | if (err) { |
Alessandro Zummo | 4071ea2 | 2014-04-03 14:49:36 -0700 | [diff] [blame] | 1690 | client->irq = 0; |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1691 | device_set_wakeup_capable(ds1307->dev, false); |
Simon Guinot | 3abb1ad | 2015-11-26 15:37:13 +0100 | [diff] [blame] | 1692 | clear_bit(HAS_ALARM, &ds1307->flags); |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1693 | dev_err(ds1307->dev, "unable to request IRQ!\n"); |
Alexandre Belloni | e69c056 | 2017-09-04 22:46:07 +0200 | [diff] [blame] | 1694 | } else { |
Heiner Kallweit | 11e5890 | 2017-03-10 18:52:34 +0100 | [diff] [blame] | 1695 | dev_dbg(ds1307->dev, "got IRQ %d\n", client->irq); |
Alexandre Belloni | e69c056 | 2017-09-04 22:46:07 +0200 | [diff] [blame] | 1696 | } |
Rodolfo Giometti | cb49a5e | 2008-10-15 22:02:58 -0700 | [diff] [blame] | 1697 | } |
| 1698 | |
Austin Boyle | 9eab0a7 | 2012-03-23 15:02:38 -0700 | [diff] [blame] | 1699 | if (chip->nvram_size) { |
Alexandre Belloni | abc925f | 2017-07-06 11:42:07 +0200 | [diff] [blame] | 1700 | ds1307->nvmem_cfg.name = "ds1307_nvram"; |
| 1701 | ds1307->nvmem_cfg.word_size = 1; |
| 1702 | ds1307->nvmem_cfg.stride = 1; |
| 1703 | ds1307->nvmem_cfg.size = chip->nvram_size; |
| 1704 | ds1307->nvmem_cfg.reg_read = ds1307_nvram_read; |
| 1705 | ds1307->nvmem_cfg.reg_write = ds1307_nvram_write; |
| 1706 | ds1307->nvmem_cfg.priv = ds1307; |
Alessandro Zummo | 4071ea2 | 2014-04-03 14:49:36 -0700 | [diff] [blame] | 1707 | |
Alexandre Belloni | abc925f | 2017-07-06 11:42:07 +0200 | [diff] [blame] | 1708 | ds1307->rtc->nvmem_config = &ds1307->nvmem_cfg; |
| 1709 | ds1307->rtc->nvram_old_abi = true; |
David Brownell | 682d73f | 2007-11-14 16:58:32 -0800 | [diff] [blame] | 1710 | } |
| 1711 | |
Heiner Kallweit | 1efb98b | 2017-07-12 07:49:44 +0200 | [diff] [blame] | 1712 | ds1307->rtc->ops = chip->rtc_ops ?: &ds13xx_rtc_ops; |
Alexandre Belloni | 69b119a | 2017-07-06 11:42:06 +0200 | [diff] [blame] | 1713 | err = rtc_register_device(ds1307->rtc); |
| 1714 | if (err) |
| 1715 | return err; |
| 1716 | |
Akinobu Mita | 445c020 | 2016-01-25 00:22:16 +0900 | [diff] [blame] | 1717 | ds1307_hwmon_register(ds1307); |
Akinobu Mita | 6c6ff14 | 2016-01-31 23:10:10 +0900 | [diff] [blame] | 1718 | ds1307_clks_register(ds1307); |
Akinobu Mita | 445c020 | 2016-01-25 00:22:16 +0900 | [diff] [blame] | 1719 | |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1720 | return 0; |
| 1721 | |
Jingoo Han | edca66d | 2013-07-03 15:07:05 -0700 | [diff] [blame] | 1722 | exit: |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1723 | return err; |
| 1724 | } |
| 1725 | |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1726 | static struct i2c_driver ds1307_driver = { |
| 1727 | .driver = { |
David Brownell | c065f35 | 2007-07-17 04:05:10 -0700 | [diff] [blame] | 1728 | .name = "rtc-ds1307", |
Javier Martinez Canillas | 7ef6d2c | 2017-03-03 11:29:15 -0300 | [diff] [blame] | 1729 | .of_match_table = of_match_ptr(ds1307_of_match), |
Tin Huynh | 9c19b89 | 2016-11-30 09:57:31 +0700 | [diff] [blame] | 1730 | .acpi_match_table = ACPI_PTR(ds1307_acpi_ids), |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1731 | }, |
David Brownell | c065f35 | 2007-07-17 04:05:10 -0700 | [diff] [blame] | 1732 | .probe = ds1307_probe, |
Jean Delvare | 3760f73 | 2008-04-29 23:11:40 +0200 | [diff] [blame] | 1733 | .id_table = ds1307_id, |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1734 | }; |
| 1735 | |
Axel Lin | 0abc920 | 2012-03-23 15:02:31 -0700 | [diff] [blame] | 1736 | module_i2c_driver(ds1307_driver); |
David Brownell | 1abb0dc | 2006-06-25 05:48:17 -0700 | [diff] [blame] | 1737 | |
| 1738 | MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips"); |
| 1739 | MODULE_LICENSE("GPL"); |