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David Brownell1abb0dc2006-06-25 05:48:17 -07001/*
2 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
3 *
4 * Copyright (C) 2005 James Chapman (ds1337 core)
5 * Copyright (C) 2006 David Brownell
Matthias Fuchsa2166852009-03-31 15:24:58 -07006 * Copyright (C) 2009 Matthias Fuchs (rx8025 support)
Bertrand Achardbc48b902013-04-29 16:19:26 -07007 * Copyright (C) 2012 Bertrand Achard (nvram access fixes)
David Brownell1abb0dc2006-06-25 05:48:17 -07008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
Tin Huynh9c19b892016-11-30 09:57:31 +070014#include <linux/acpi.h>
David Brownell1abb0dc2006-06-25 05:48:17 -070015#include <linux/bcd.h>
Nishanth Menoneac72372015-06-23 11:15:12 -050016#include <linux/i2c.h>
17#include <linux/init.h>
18#include <linux/module.h>
Javier Martinez Canillas7ef6d2c2017-03-03 11:29:15 -030019#include <linux/of_device.h>
Wolfram Sangeb86c302012-05-29 15:07:38 -070020#include <linux/rtc/ds1307.h>
Nishanth Menoneac72372015-06-23 11:15:12 -050021#include <linux/rtc.h>
22#include <linux/slab.h>
23#include <linux/string.h>
Akinobu Mita445c0202016-01-25 00:22:16 +090024#include <linux/hwmon.h>
25#include <linux/hwmon-sysfs.h>
Akinobu Mita6c6ff142016-01-31 23:10:10 +090026#include <linux/clk-provider.h>
Heiner Kallweit11e58902017-03-10 18:52:34 +010027#include <linux/regmap.h>
David Brownell1abb0dc2006-06-25 05:48:17 -070028
David Anders40ce9722012-03-23 15:02:37 -070029/*
30 * We can't determine type by probing, but if we expect pre-Linux code
David Brownell1abb0dc2006-06-25 05:48:17 -070031 * to have set the chip up as a clock (turning on the oscillator and
32 * setting the date and time), Linux can ignore the non-clock features.
33 * That's a natural job for a factory or repair bench.
David Brownell1abb0dc2006-06-25 05:48:17 -070034 */
35enum ds_type {
David Brownell045e0e82007-07-17 04:04:55 -070036 ds_1307,
Sean Nyekjaer300a7732017-06-08 12:36:54 +020037 ds_1308,
David Brownell045e0e82007-07-17 04:04:55 -070038 ds_1337,
39 ds_1338,
40 ds_1339,
41 ds_1340,
Nikita Yushchenko0759c882017-08-24 09:32:11 +030042 ds_1341,
Joakim Tjernlund33df2ee2009-06-17 16:26:08 -070043 ds_1388,
Wolfram Sang97f902b2009-06-17 16:26:10 -070044 ds_3231,
Stefan Agner8566f702017-03-23 16:54:57 -070045 m41t0,
David Brownell045e0e82007-07-17 04:04:55 -070046 m41t00,
Tomas Novotnyf4199f82014-12-10 15:53:57 -080047 mcp794xx,
Matthias Fuchsa2166852009-03-31 15:24:58 -070048 rx_8025,
Marek Vasutee0981b2017-06-18 22:55:28 +020049 rx_8130,
Wolfram Sang32d322b2012-03-23 15:02:36 -070050 last_ds_type /* always last */
David Anders40ce9722012-03-23 15:02:37 -070051 /* rs5c372 too? different address... */
David Brownell1abb0dc2006-06-25 05:48:17 -070052};
53
David Brownell1abb0dc2006-06-25 05:48:17 -070054/* RTC registers don't differ much, except for the century flag */
55#define DS1307_REG_SECS 0x00 /* 00-59 */
56# define DS1307_BIT_CH 0x80
Rodolfo Giomettibe5f59f2007-07-17 04:05:06 -070057# define DS1340_BIT_nEOSC 0x80
Tomas Novotnyf4199f82014-12-10 15:53:57 -080058# define MCP794XX_BIT_ST 0x80
David Brownell1abb0dc2006-06-25 05:48:17 -070059#define DS1307_REG_MIN 0x01 /* 00-59 */
Stefan Agner8566f702017-03-23 16:54:57 -070060# define M41T0_BIT_OF 0x80
David Brownell1abb0dc2006-06-25 05:48:17 -070061#define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
David Brownellc065f352007-07-17 04:05:10 -070062# define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
63# define DS1307_BIT_PM 0x20 /* in REG_HOUR */
David Brownell1abb0dc2006-06-25 05:48:17 -070064# define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
65# define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
66#define DS1307_REG_WDAY 0x03 /* 01-07 */
Tomas Novotnyf4199f82014-12-10 15:53:57 -080067# define MCP794XX_BIT_VBATEN 0x08
David Brownell1abb0dc2006-06-25 05:48:17 -070068#define DS1307_REG_MDAY 0x04 /* 01-31 */
69#define DS1307_REG_MONTH 0x05 /* 01-12 */
70# define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
71#define DS1307_REG_YEAR 0x06 /* 00-99 */
72
David Anders40ce9722012-03-23 15:02:37 -070073/*
74 * Other registers (control, status, alarms, trickle charge, NVRAM, etc)
David Brownell045e0e82007-07-17 04:04:55 -070075 * start at 7, and they differ a LOT. Only control and status matter for
76 * basic RTC date and time functionality; be careful using them.
David Brownell1abb0dc2006-06-25 05:48:17 -070077 */
David Brownell045e0e82007-07-17 04:04:55 -070078#define DS1307_REG_CONTROL 0x07 /* or ds1338 */
David Brownell1abb0dc2006-06-25 05:48:17 -070079# define DS1307_BIT_OUT 0x80
Rodolfo Giomettibe5f59f2007-07-17 04:05:06 -070080# define DS1338_BIT_OSF 0x20
David Brownell1abb0dc2006-06-25 05:48:17 -070081# define DS1307_BIT_SQWE 0x10
82# define DS1307_BIT_RS1 0x02
83# define DS1307_BIT_RS0 0x01
84#define DS1337_REG_CONTROL 0x0e
85# define DS1337_BIT_nEOSC 0x80
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -070086# define DS1339_BIT_BBSQI 0x20
Wolfram Sang97f902b2009-06-17 16:26:10 -070087# define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */
David Brownell1abb0dc2006-06-25 05:48:17 -070088# define DS1337_BIT_RS2 0x10
89# define DS1337_BIT_RS1 0x08
90# define DS1337_BIT_INTCN 0x04
91# define DS1337_BIT_A2IE 0x02
92# define DS1337_BIT_A1IE 0x01
David Brownell045e0e82007-07-17 04:04:55 -070093#define DS1340_REG_CONTROL 0x07
94# define DS1340_BIT_OUT 0x80
95# define DS1340_BIT_FT 0x40
96# define DS1340_BIT_CALIB_SIGN 0x20
97# define DS1340_M_CALIBRATION 0x1f
Rodolfo Giomettibe5f59f2007-07-17 04:05:06 -070098#define DS1340_REG_FLAG 0x09
99# define DS1340_BIT_OSF 0x80
David Brownell1abb0dc2006-06-25 05:48:17 -0700100#define DS1337_REG_STATUS 0x0f
101# define DS1337_BIT_OSF 0x80
Akinobu Mita6c6ff142016-01-31 23:10:10 +0900102# define DS3231_BIT_EN32KHZ 0x08
David Brownell1abb0dc2006-06-25 05:48:17 -0700103# define DS1337_BIT_A2I 0x02
104# define DS1337_BIT_A1I 0x01
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700105#define DS1339_REG_ALARM1_SECS 0x07
Wolfram Sangeb86c302012-05-29 15:07:38 -0700106
107#define DS13XX_TRICKLE_CHARGER_MAGIC 0xa0
David Brownell1abb0dc2006-06-25 05:48:17 -0700108
Matthias Fuchsa2166852009-03-31 15:24:58 -0700109#define RX8025_REG_CTRL1 0x0e
110# define RX8025_BIT_2412 0x20
111#define RX8025_REG_CTRL2 0x0f
112# define RX8025_BIT_PON 0x10
113# define RX8025_BIT_VDET 0x40
114# define RX8025_BIT_XST 0x20
David Brownell1abb0dc2006-06-25 05:48:17 -0700115
David Brownell1abb0dc2006-06-25 05:48:17 -0700116struct ds1307 {
Alexandre Belloniabc925f2017-07-06 11:42:07 +0200117 struct nvmem_config nvmem_cfg;
David Brownell1abb0dc2006-06-25 05:48:17 -0700118 enum ds_type type;
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700119 unsigned long flags;
120#define HAS_NVRAM 0 /* bit 0 == sysfs file active */
121#define HAS_ALARM 1 /* bit 1 == irq claimed */
Heiner Kallweit11e58902017-03-10 18:52:34 +0100122 struct device *dev;
123 struct regmap *regmap;
124 const char *name;
David Brownell1abb0dc2006-06-25 05:48:17 -0700125 struct rtc_device *rtc;
Akinobu Mita6c6ff142016-01-31 23:10:10 +0900126#ifdef CONFIG_COMMON_CLK
127 struct clk_hw clks[2];
128#endif
David Brownell1abb0dc2006-06-25 05:48:17 -0700129};
130
David Brownell045e0e82007-07-17 04:04:55 -0700131struct chip_desc {
David Brownell045e0e82007-07-17 04:04:55 -0700132 unsigned alarm:1;
Austin Boyle9eab0a72012-03-23 15:02:38 -0700133 u16 nvram_offset;
134 u16 nvram_size;
Heiner Kallweite5531702017-07-12 07:49:47 +0200135 u8 offset; /* register's offset */
Heiner Kallweite48585d2017-06-05 17:57:33 +0200136 u8 century_reg;
137 u8 century_enable_bit;
138 u8 century_bit;
Heiner Kallweit0b6ee802017-07-12 07:49:22 +0200139 u8 bbsqi_bit;
Heiner Kallweit45947122017-07-12 07:49:41 +0200140 irq_handler_t irq_handler;
Heiner Kallweit1efb98b2017-07-12 07:49:44 +0200141 const struct rtc_class_ops *rtc_ops;
Wolfram Sangeb86c302012-05-29 15:07:38 -0700142 u16 trickle_charger_reg;
Alexandre Belloni57ec2d92017-09-04 22:46:04 +0200143 u8 (*do_trickle_setup)(struct ds1307 *, u32,
Heiner Kallweit11e58902017-03-10 18:52:34 +0100144 bool);
David Brownell045e0e82007-07-17 04:04:55 -0700145};
146
Heiner Kallweit1efb98b2017-07-12 07:49:44 +0200147static int ds1307_get_time(struct device *dev, struct rtc_time *t);
148static int ds1307_set_time(struct device *dev, struct rtc_time *t);
Alexandre Belloni57ec2d92017-09-04 22:46:04 +0200149static u8 do_trickle_setup_ds1339(struct ds1307 *, u32 ohms, bool diode);
Heiner Kallweit45947122017-07-12 07:49:41 +0200150static irqreturn_t rx8130_irq(int irq, void *dev_id);
Heiner Kallweit1efb98b2017-07-12 07:49:44 +0200151static int rx8130_read_alarm(struct device *dev, struct rtc_wkalrm *t);
152static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t);
153static int rx8130_alarm_irq_enable(struct device *dev, unsigned int enabled);
Heiner Kallweit45947122017-07-12 07:49:41 +0200154static irqreturn_t mcp794xx_irq(int irq, void *dev_id);
Heiner Kallweit1efb98b2017-07-12 07:49:44 +0200155static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t);
156static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t);
157static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled);
Matti Vaittinen33b04b72014-10-13 15:52:48 -0700158
Heiner Kallweit1efb98b2017-07-12 07:49:44 +0200159static const struct rtc_class_ops rx8130_rtc_ops = {
160 .read_time = ds1307_get_time,
161 .set_time = ds1307_set_time,
162 .read_alarm = rx8130_read_alarm,
163 .set_alarm = rx8130_set_alarm,
164 .alarm_irq_enable = rx8130_alarm_irq_enable,
165};
166
167static const struct rtc_class_ops mcp794xx_rtc_ops = {
168 .read_time = ds1307_get_time,
169 .set_time = ds1307_set_time,
170 .read_alarm = mcp794xx_read_alarm,
171 .set_alarm = mcp794xx_set_alarm,
172 .alarm_irq_enable = mcp794xx_alarm_irq_enable,
173};
Matti Vaittinen33b04b72014-10-13 15:52:48 -0700174
Heiner Kallweit7624df42017-07-12 07:49:33 +0200175static const struct chip_desc chips[last_ds_type] = {
Wolfram Sang32d322b2012-03-23 15:02:36 -0700176 [ds_1307] = {
Austin Boyle9eab0a72012-03-23 15:02:38 -0700177 .nvram_offset = 8,
178 .nvram_size = 56,
Wolfram Sang32d322b2012-03-23 15:02:36 -0700179 },
Sean Nyekjaer300a7732017-06-08 12:36:54 +0200180 [ds_1308] = {
181 .nvram_offset = 8,
182 .nvram_size = 56,
183 },
Wolfram Sang32d322b2012-03-23 15:02:36 -0700184 [ds_1337] = {
185 .alarm = 1,
Heiner Kallweite48585d2017-06-05 17:57:33 +0200186 .century_reg = DS1307_REG_MONTH,
187 .century_bit = DS1337_BIT_CENTURY,
Wolfram Sang32d322b2012-03-23 15:02:36 -0700188 },
189 [ds_1338] = {
Austin Boyle9eab0a72012-03-23 15:02:38 -0700190 .nvram_offset = 8,
191 .nvram_size = 56,
Wolfram Sang32d322b2012-03-23 15:02:36 -0700192 },
193 [ds_1339] = {
194 .alarm = 1,
Heiner Kallweite48585d2017-06-05 17:57:33 +0200195 .century_reg = DS1307_REG_MONTH,
196 .century_bit = DS1337_BIT_CENTURY,
Heiner Kallweit0b6ee802017-07-12 07:49:22 +0200197 .bbsqi_bit = DS1339_BIT_BBSQI,
Wolfram Sangeb86c302012-05-29 15:07:38 -0700198 .trickle_charger_reg = 0x10,
Matti Vaittinen33b04b72014-10-13 15:52:48 -0700199 .do_trickle_setup = &do_trickle_setup_ds1339,
Wolfram Sangeb86c302012-05-29 15:07:38 -0700200 },
201 [ds_1340] = {
Heiner Kallweite48585d2017-06-05 17:57:33 +0200202 .century_reg = DS1307_REG_HOUR,
203 .century_enable_bit = DS1340_BIT_CENTURY_EN,
204 .century_bit = DS1340_BIT_CENTURY,
Wolfram Sangeb86c302012-05-29 15:07:38 -0700205 .trickle_charger_reg = 0x08,
206 },
Nikita Yushchenko0759c882017-08-24 09:32:11 +0300207 [ds_1341] = {
208 .century_reg = DS1307_REG_MONTH,
209 .century_bit = DS1337_BIT_CENTURY,
210 },
Wolfram Sangeb86c302012-05-29 15:07:38 -0700211 [ds_1388] = {
Heiner Kallweite5531702017-07-12 07:49:47 +0200212 .offset = 1,
Wolfram Sangeb86c302012-05-29 15:07:38 -0700213 .trickle_charger_reg = 0x0a,
Wolfram Sang32d322b2012-03-23 15:02:36 -0700214 },
215 [ds_3231] = {
216 .alarm = 1,
Heiner Kallweite48585d2017-06-05 17:57:33 +0200217 .century_reg = DS1307_REG_MONTH,
218 .century_bit = DS1337_BIT_CENTURY,
Heiner Kallweit0b6ee802017-07-12 07:49:22 +0200219 .bbsqi_bit = DS3231_BIT_BBSQW,
Wolfram Sang32d322b2012-03-23 15:02:36 -0700220 },
Marek Vasutee0981b2017-06-18 22:55:28 +0200221 [rx_8130] = {
222 .alarm = 1,
223 /* this is battery backed SRAM */
224 .nvram_offset = 0x20,
225 .nvram_size = 4, /* 32bit (4 word x 8 bit) */
Heiner Kallweite5531702017-07-12 07:49:47 +0200226 .offset = 0x10,
Heiner Kallweit45947122017-07-12 07:49:41 +0200227 .irq_handler = rx8130_irq,
Heiner Kallweit1efb98b2017-07-12 07:49:44 +0200228 .rtc_ops = &rx8130_rtc_ops,
Marek Vasutee0981b2017-06-18 22:55:28 +0200229 },
Tomas Novotnyf4199f82014-12-10 15:53:57 -0800230 [mcp794xx] = {
Simon Guinot1d1945d2014-04-03 14:49:55 -0700231 .alarm = 1,
Austin Boyle9eab0a72012-03-23 15:02:38 -0700232 /* this is battery backed SRAM */
233 .nvram_offset = 0x20,
234 .nvram_size = 0x40,
Heiner Kallweit45947122017-07-12 07:49:41 +0200235 .irq_handler = mcp794xx_irq,
Heiner Kallweit1efb98b2017-07-12 07:49:44 +0200236 .rtc_ops = &mcp794xx_rtc_ops,
Austin Boyle9eab0a72012-03-23 15:02:38 -0700237 },
Wolfram Sang32d322b2012-03-23 15:02:36 -0700238};
David Brownell045e0e82007-07-17 04:04:55 -0700239
Jean Delvare3760f732008-04-29 23:11:40 +0200240static const struct i2c_device_id ds1307_id[] = {
241 { "ds1307", ds_1307 },
Sean Nyekjaer300a7732017-06-08 12:36:54 +0200242 { "ds1308", ds_1308 },
Jean Delvare3760f732008-04-29 23:11:40 +0200243 { "ds1337", ds_1337 },
244 { "ds1338", ds_1338 },
245 { "ds1339", ds_1339 },
Joakim Tjernlund33df2ee2009-06-17 16:26:08 -0700246 { "ds1388", ds_1388 },
Jean Delvare3760f732008-04-29 23:11:40 +0200247 { "ds1340", ds_1340 },
Nikita Yushchenko0759c882017-08-24 09:32:11 +0300248 { "ds1341", ds_1341 },
Wolfram Sang97f902b2009-06-17 16:26:10 -0700249 { "ds3231", ds_3231 },
Stefan Agner8566f702017-03-23 16:54:57 -0700250 { "m41t0", m41t0 },
Jean Delvare3760f732008-04-29 23:11:40 +0200251 { "m41t00", m41t00 },
Tomas Novotnyf4199f82014-12-10 15:53:57 -0800252 { "mcp7940x", mcp794xx },
253 { "mcp7941x", mcp794xx },
Priyanka Jain31c17712011-06-27 16:18:04 -0700254 { "pt7c4338", ds_1307 },
Matthias Fuchsa2166852009-03-31 15:24:58 -0700255 { "rx8025", rx_8025 },
Alexandre Belloni78aaa062016-07-13 02:36:41 +0200256 { "isl12057", ds_1337 },
Marek Vasutee0981b2017-06-18 22:55:28 +0200257 { "rx8130", rx_8130 },
Jean Delvare3760f732008-04-29 23:11:40 +0200258 { }
259};
260MODULE_DEVICE_TABLE(i2c, ds1307_id);
David Brownell1abb0dc2006-06-25 05:48:17 -0700261
Javier Martinez Canillas7ef6d2c2017-03-03 11:29:15 -0300262#ifdef CONFIG_OF
263static const struct of_device_id ds1307_of_match[] = {
264 {
265 .compatible = "dallas,ds1307",
266 .data = (void *)ds_1307
267 },
268 {
Sean Nyekjaer300a7732017-06-08 12:36:54 +0200269 .compatible = "dallas,ds1308",
270 .data = (void *)ds_1308
271 },
272 {
Javier Martinez Canillas7ef6d2c2017-03-03 11:29:15 -0300273 .compatible = "dallas,ds1337",
274 .data = (void *)ds_1337
275 },
276 {
277 .compatible = "dallas,ds1338",
278 .data = (void *)ds_1338
279 },
280 {
281 .compatible = "dallas,ds1339",
282 .data = (void *)ds_1339
283 },
284 {
285 .compatible = "dallas,ds1388",
286 .data = (void *)ds_1388
287 },
288 {
289 .compatible = "dallas,ds1340",
290 .data = (void *)ds_1340
291 },
292 {
Nikita Yushchenko0759c882017-08-24 09:32:11 +0300293 .compatible = "dallas,ds1341",
294 .data = (void *)ds_1341
295 },
296 {
Javier Martinez Canillas7ef6d2c2017-03-03 11:29:15 -0300297 .compatible = "maxim,ds3231",
298 .data = (void *)ds_3231
299 },
300 {
Alexandre Bellonidb2f8142017-04-08 17:22:02 +0200301 .compatible = "st,m41t0",
302 .data = (void *)m41t00
303 },
304 {
Javier Martinez Canillas7ef6d2c2017-03-03 11:29:15 -0300305 .compatible = "st,m41t00",
306 .data = (void *)m41t00
307 },
308 {
309 .compatible = "microchip,mcp7940x",
310 .data = (void *)mcp794xx
311 },
312 {
313 .compatible = "microchip,mcp7941x",
314 .data = (void *)mcp794xx
315 },
316 {
317 .compatible = "pericom,pt7c4338",
318 .data = (void *)ds_1307
319 },
320 {
321 .compatible = "epson,rx8025",
322 .data = (void *)rx_8025
323 },
324 {
325 .compatible = "isil,isl12057",
326 .data = (void *)ds_1337
327 },
Bastian Stender47dd4722017-10-17 14:46:07 +0200328 {
329 .compatible = "epson,rx8130",
330 .data = (void *)rx_8130
331 },
Javier Martinez Canillas7ef6d2c2017-03-03 11:29:15 -0300332 { }
333};
334MODULE_DEVICE_TABLE(of, ds1307_of_match);
335#endif
336
Tin Huynh9c19b892016-11-30 09:57:31 +0700337#ifdef CONFIG_ACPI
338static const struct acpi_device_id ds1307_acpi_ids[] = {
339 { .id = "DS1307", .driver_data = ds_1307 },
Sean Nyekjaer300a7732017-06-08 12:36:54 +0200340 { .id = "DS1308", .driver_data = ds_1308 },
Tin Huynh9c19b892016-11-30 09:57:31 +0700341 { .id = "DS1337", .driver_data = ds_1337 },
342 { .id = "DS1338", .driver_data = ds_1338 },
343 { .id = "DS1339", .driver_data = ds_1339 },
344 { .id = "DS1388", .driver_data = ds_1388 },
345 { .id = "DS1340", .driver_data = ds_1340 },
Nikita Yushchenko0759c882017-08-24 09:32:11 +0300346 { .id = "DS1341", .driver_data = ds_1341 },
Tin Huynh9c19b892016-11-30 09:57:31 +0700347 { .id = "DS3231", .driver_data = ds_3231 },
Stefan Agner8566f702017-03-23 16:54:57 -0700348 { .id = "M41T0", .driver_data = m41t0 },
Tin Huynh9c19b892016-11-30 09:57:31 +0700349 { .id = "M41T00", .driver_data = m41t00 },
350 { .id = "MCP7940X", .driver_data = mcp794xx },
351 { .id = "MCP7941X", .driver_data = mcp794xx },
352 { .id = "PT7C4338", .driver_data = ds_1307 },
353 { .id = "RX8025", .driver_data = rx_8025 },
354 { .id = "ISL12057", .driver_data = ds_1337 },
Bastian Stender47dd4722017-10-17 14:46:07 +0200355 { .id = "RX8130", .driver_data = rx_8130 },
Tin Huynh9c19b892016-11-30 09:57:31 +0700356 { }
357};
358MODULE_DEVICE_TABLE(acpi, ds1307_acpi_ids);
359#endif
360
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700361/*
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700362 * The ds1337 and ds1339 both have two alarms, but we only use the first
363 * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
364 * signal; ds1339 chips have only one alarm signal.
365 */
Felipe Balbi2fb07a12015-06-23 11:15:10 -0500366static irqreturn_t ds1307_irq(int irq, void *dev_id)
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700367{
Heiner Kallweit11e58902017-03-10 18:52:34 +0100368 struct ds1307 *ds1307 = dev_id;
Felipe Balbi2fb07a12015-06-23 11:15:10 -0500369 struct mutex *lock = &ds1307->rtc->ops_lock;
Heiner Kallweit078f3f62017-06-05 17:57:29 +0200370 int stat, ret;
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700371
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700372 mutex_lock(lock);
Heiner Kallweit11e58902017-03-10 18:52:34 +0100373 ret = regmap_read(ds1307->regmap, DS1337_REG_STATUS, &stat);
374 if (ret)
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700375 goto out;
376
377 if (stat & DS1337_BIT_A1I) {
378 stat &= ~DS1337_BIT_A1I;
Heiner Kallweit11e58902017-03-10 18:52:34 +0100379 regmap_write(ds1307->regmap, DS1337_REG_STATUS, stat);
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700380
Heiner Kallweit078f3f62017-06-05 17:57:29 +0200381 ret = regmap_update_bits(ds1307->regmap, DS1337_REG_CONTROL,
382 DS1337_BIT_A1IE, 0);
Heiner Kallweit11e58902017-03-10 18:52:34 +0100383 if (ret)
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700384 goto out;
385
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700386 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700387 }
388
389out:
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700390 mutex_unlock(lock);
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700391
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700392 return IRQ_HANDLED;
393}
394
395/*----------------------------------------------------------------------*/
396
David Brownell1abb0dc2006-06-25 05:48:17 -0700397static int ds1307_get_time(struct device *dev, struct rtc_time *t)
398{
399 struct ds1307 *ds1307 = dev_get_drvdata(dev);
Heiner Kallweit11e58902017-03-10 18:52:34 +0100400 int tmp, ret;
Heiner Kallweite48585d2017-06-05 17:57:33 +0200401 const struct chip_desc *chip = &chips[ds1307->type];
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200402 u8 regs[7];
David Brownell1abb0dc2006-06-25 05:48:17 -0700403
David Brownell045e0e82007-07-17 04:04:55 -0700404 /* read the RTC date and time registers all at once */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200405 ret = regmap_bulk_read(ds1307->regmap, chip->offset, regs,
406 sizeof(regs));
Heiner Kallweit11e58902017-03-10 18:52:34 +0100407 if (ret) {
408 dev_err(dev, "%s error %d\n", "read", ret);
409 return ret;
David Brownell1abb0dc2006-06-25 05:48:17 -0700410 }
411
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200412 dev_dbg(dev, "%s: %7ph\n", "read", regs);
David Brownell1abb0dc2006-06-25 05:48:17 -0700413
Stefan Agner8566f702017-03-23 16:54:57 -0700414 /* if oscillator fail bit is set, no data can be trusted */
415 if (ds1307->type == m41t0 &&
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200416 regs[DS1307_REG_MIN] & M41T0_BIT_OF) {
Stefan Agner8566f702017-03-23 16:54:57 -0700417 dev_warn_once(dev, "oscillator failed, set time!\n");
418 return -EINVAL;
419 }
420
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200421 t->tm_sec = bcd2bin(regs[DS1307_REG_SECS] & 0x7f);
422 t->tm_min = bcd2bin(regs[DS1307_REG_MIN] & 0x7f);
423 tmp = regs[DS1307_REG_HOUR] & 0x3f;
Adrian Bunkfe20ba72008-10-18 20:28:41 -0700424 t->tm_hour = bcd2bin(tmp);
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200425 t->tm_wday = bcd2bin(regs[DS1307_REG_WDAY] & 0x07) - 1;
426 t->tm_mday = bcd2bin(regs[DS1307_REG_MDAY] & 0x3f);
427 tmp = regs[DS1307_REG_MONTH] & 0x1f;
Adrian Bunkfe20ba72008-10-18 20:28:41 -0700428 t->tm_mon = bcd2bin(tmp) - 1;
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200429 t->tm_year = bcd2bin(regs[DS1307_REG_YEAR]) + 100;
David Brownell1abb0dc2006-06-25 05:48:17 -0700430
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200431 if (regs[chip->century_reg] & chip->century_bit &&
Heiner Kallweite48585d2017-06-05 17:57:33 +0200432 IS_ENABLED(CONFIG_RTC_DRV_DS1307_CENTURY))
433 t->tm_year += 100;
Alexandre Belloni50d6c0e2016-07-13 02:26:08 +0200434
David Brownell1abb0dc2006-06-25 05:48:17 -0700435 dev_dbg(dev, "%s secs=%d, mins=%d, "
436 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
437 "read", t->tm_sec, t->tm_min,
438 t->tm_hour, t->tm_mday,
439 t->tm_mon, t->tm_year, t->tm_wday);
440
David Brownell045e0e82007-07-17 04:04:55 -0700441 /* initial clock setting can be undefined */
442 return rtc_valid_tm(t);
David Brownell1abb0dc2006-06-25 05:48:17 -0700443}
444
445static int ds1307_set_time(struct device *dev, struct rtc_time *t)
446{
447 struct ds1307 *ds1307 = dev_get_drvdata(dev);
Heiner Kallweite48585d2017-06-05 17:57:33 +0200448 const struct chip_desc *chip = &chips[ds1307->type];
David Brownell1abb0dc2006-06-25 05:48:17 -0700449 int result;
450 int tmp;
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200451 u8 regs[7];
David Brownell1abb0dc2006-06-25 05:48:17 -0700452
453 dev_dbg(dev, "%s secs=%d, mins=%d, "
454 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
Jeff Garzik11966ad2006-10-04 04:41:53 -0400455 "write", t->tm_sec, t->tm_min,
456 t->tm_hour, t->tm_mday,
457 t->tm_mon, t->tm_year, t->tm_wday);
David Brownell1abb0dc2006-06-25 05:48:17 -0700458
Alexandre Belloni50d6c0e2016-07-13 02:26:08 +0200459 if (t->tm_year < 100)
460 return -EINVAL;
461
Heiner Kallweite48585d2017-06-05 17:57:33 +0200462#ifdef CONFIG_RTC_DRV_DS1307_CENTURY
463 if (t->tm_year > (chip->century_bit ? 299 : 199))
464 return -EINVAL;
Alexandre Belloni50d6c0e2016-07-13 02:26:08 +0200465#else
Heiner Kallweite48585d2017-06-05 17:57:33 +0200466 if (t->tm_year > 199)
Alexandre Belloni50d6c0e2016-07-13 02:26:08 +0200467 return -EINVAL;
468#endif
469
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200470 regs[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
471 regs[DS1307_REG_MIN] = bin2bcd(t->tm_min);
472 regs[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
473 regs[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
474 regs[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
475 regs[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
David Brownell1abb0dc2006-06-25 05:48:17 -0700476
477 /* assume 20YY not 19YY */
478 tmp = t->tm_year - 100;
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200479 regs[DS1307_REG_YEAR] = bin2bcd(tmp);
David Brownell1abb0dc2006-06-25 05:48:17 -0700480
Heiner Kallweite48585d2017-06-05 17:57:33 +0200481 if (chip->century_enable_bit)
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200482 regs[chip->century_reg] |= chip->century_enable_bit;
Heiner Kallweite48585d2017-06-05 17:57:33 +0200483 if (t->tm_year > 199 && chip->century_bit)
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200484 regs[chip->century_reg] |= chip->century_bit;
Heiner Kallweite48585d2017-06-05 17:57:33 +0200485
486 if (ds1307->type == mcp794xx) {
David Anders40ce9722012-03-23 15:02:37 -0700487 /*
488 * these bits were cleared when preparing the date/time
489 * values and need to be set again before writing the
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200490 * regsfer out to the device.
David Anders40ce9722012-03-23 15:02:37 -0700491 */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200492 regs[DS1307_REG_SECS] |= MCP794XX_BIT_ST;
493 regs[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN;
Rodolfo Giomettibe5f59f2007-07-17 04:05:06 -0700494 }
David Brownell1abb0dc2006-06-25 05:48:17 -0700495
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200496 dev_dbg(dev, "%s: %7ph\n", "write", regs);
David Brownell1abb0dc2006-06-25 05:48:17 -0700497
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200498 result = regmap_bulk_write(ds1307->regmap, chip->offset, regs,
499 sizeof(regs));
Heiner Kallweit11e58902017-03-10 18:52:34 +0100500 if (result) {
BARRE Sebastienfed40b72009-01-07 18:07:13 -0800501 dev_err(dev, "%s error %d\n", "write", result);
502 return result;
David Brownell1abb0dc2006-06-25 05:48:17 -0700503 }
504 return 0;
505}
506
Jüri Reitel74d88eb2009-01-07 18:07:16 -0800507static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700508{
Heiner Kallweit11e58902017-03-10 18:52:34 +0100509 struct ds1307 *ds1307 = dev_get_drvdata(dev);
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700510 int ret;
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200511 u8 regs[9];
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700512
513 if (!test_bit(HAS_ALARM, &ds1307->flags))
514 return -EINVAL;
515
516 /* read all ALARM1, ALARM2, and status registers at once */
Heiner Kallweit11e58902017-03-10 18:52:34 +0100517 ret = regmap_bulk_read(ds1307->regmap, DS1339_REG_ALARM1_SECS,
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200518 regs, sizeof(regs));
Heiner Kallweit11e58902017-03-10 18:52:34 +0100519 if (ret) {
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700520 dev_err(dev, "%s error %d\n", "alarm read", ret);
Heiner Kallweit11e58902017-03-10 18:52:34 +0100521 return ret;
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700522 }
523
Rasmus Villemoesff67abd2015-11-24 14:51:23 +0100524 dev_dbg(dev, "%s: %4ph, %3ph, %2ph\n", "alarm read",
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200525 &regs[0], &regs[4], &regs[7]);
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700526
David Anders40ce9722012-03-23 15:02:37 -0700527 /*
528 * report alarm time (ALARM1); assume 24 hour and day-of-month modes,
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700529 * and that all four fields are checked matches
530 */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200531 t->time.tm_sec = bcd2bin(regs[0] & 0x7f);
532 t->time.tm_min = bcd2bin(regs[1] & 0x7f);
533 t->time.tm_hour = bcd2bin(regs[2] & 0x3f);
534 t->time.tm_mday = bcd2bin(regs[3] & 0x3f);
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700535
536 /* ... and status */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200537 t->enabled = !!(regs[7] & DS1337_BIT_A1IE);
538 t->pending = !!(regs[8] & DS1337_BIT_A1I);
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700539
540 dev_dbg(dev, "%s secs=%d, mins=%d, "
541 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
542 "alarm read", t->time.tm_sec, t->time.tm_min,
543 t->time.tm_hour, t->time.tm_mday,
544 t->enabled, t->pending);
545
546 return 0;
547}
548
Jüri Reitel74d88eb2009-01-07 18:07:16 -0800549static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700550{
Heiner Kallweit11e58902017-03-10 18:52:34 +0100551 struct ds1307 *ds1307 = dev_get_drvdata(dev);
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200552 unsigned char regs[9];
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700553 u8 control, status;
554 int ret;
555
556 if (!test_bit(HAS_ALARM, &ds1307->flags))
557 return -EINVAL;
558
559 dev_dbg(dev, "%s secs=%d, mins=%d, "
560 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
561 "alarm set", t->time.tm_sec, t->time.tm_min,
562 t->time.tm_hour, t->time.tm_mday,
563 t->enabled, t->pending);
564
565 /* read current status of both alarms and the chip */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200566 ret = regmap_bulk_read(ds1307->regmap, DS1339_REG_ALARM1_SECS, regs,
567 sizeof(regs));
Heiner Kallweit11e58902017-03-10 18:52:34 +0100568 if (ret) {
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700569 dev_err(dev, "%s error %d\n", "alarm write", ret);
Heiner Kallweit11e58902017-03-10 18:52:34 +0100570 return ret;
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700571 }
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200572 control = regs[7];
573 status = regs[8];
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700574
Rasmus Villemoesff67abd2015-11-24 14:51:23 +0100575 dev_dbg(dev, "%s: %4ph, %3ph, %02x %02x\n", "alarm set (old status)",
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200576 &regs[0], &regs[4], control, status);
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700577
578 /* set ALARM1, using 24 hour and day-of-month modes */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200579 regs[0] = bin2bcd(t->time.tm_sec);
580 regs[1] = bin2bcd(t->time.tm_min);
581 regs[2] = bin2bcd(t->time.tm_hour);
582 regs[3] = bin2bcd(t->time.tm_mday);
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700583
584 /* set ALARM2 to non-garbage */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200585 regs[4] = 0;
586 regs[5] = 0;
587 regs[6] = 0;
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700588
Nicolas Boullis5919fb92016-04-10 13:23:05 +0200589 /* disable alarms */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200590 regs[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
591 regs[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700592
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200593 ret = regmap_bulk_write(ds1307->regmap, DS1339_REG_ALARM1_SECS, regs,
594 sizeof(regs));
Heiner Kallweit11e58902017-03-10 18:52:34 +0100595 if (ret) {
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700596 dev_err(dev, "can't set alarm time\n");
BARRE Sebastienfed40b72009-01-07 18:07:13 -0800597 return ret;
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700598 }
599
Nicolas Boullis5919fb92016-04-10 13:23:05 +0200600 /* optionally enable ALARM1 */
601 if (t->enabled) {
602 dev_dbg(dev, "alarm IRQ armed\n");
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200603 regs[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
604 regmap_write(ds1307->regmap, DS1337_REG_CONTROL, regs[7]);
Nicolas Boullis5919fb92016-04-10 13:23:05 +0200605 }
606
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700607 return 0;
608}
609
John Stultz16380c12011-02-02 17:02:41 -0800610static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700611{
Heiner Kallweit11e58902017-03-10 18:52:34 +0100612 struct ds1307 *ds1307 = dev_get_drvdata(dev);
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700613
John Stultz16380c12011-02-02 17:02:41 -0800614 if (!test_bit(HAS_ALARM, &ds1307->flags))
615 return -ENOTTY;
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700616
Heiner Kallweit078f3f62017-06-05 17:57:29 +0200617 return regmap_update_bits(ds1307->regmap, DS1337_REG_CONTROL,
618 DS1337_BIT_A1IE,
619 enabled ? DS1337_BIT_A1IE : 0);
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -0700620}
621
David Brownellff8371a2006-09-30 23:28:17 -0700622static const struct rtc_class_ops ds13xx_rtc_ops = {
David Brownell1abb0dc2006-06-25 05:48:17 -0700623 .read_time = ds1307_get_time,
624 .set_time = ds1307_set_time,
Jüri Reitel74d88eb2009-01-07 18:07:16 -0800625 .read_alarm = ds1337_read_alarm,
626 .set_alarm = ds1337_set_alarm,
John Stultz16380c12011-02-02 17:02:41 -0800627 .alarm_irq_enable = ds1307_alarm_irq_enable,
David Brownell1abb0dc2006-06-25 05:48:17 -0700628};
629
David Brownell682d73f2007-11-14 16:58:32 -0800630/*----------------------------------------------------------------------*/
631
Simon Guinot1d1945d2014-04-03 14:49:55 -0700632/*
Marek Vasutee0981b2017-06-18 22:55:28 +0200633 * Alarm support for rx8130 devices.
634 */
635
636#define RX8130_REG_ALARM_MIN 0x07
637#define RX8130_REG_ALARM_HOUR 0x08
638#define RX8130_REG_ALARM_WEEK_OR_DAY 0x09
639#define RX8130_REG_EXTENSION 0x0c
Alexandre Bellonieb4fd192017-09-04 22:46:05 +0200640#define RX8130_REG_EXTENSION_WADA BIT(3)
Marek Vasutee0981b2017-06-18 22:55:28 +0200641#define RX8130_REG_FLAG 0x0d
Alexandre Bellonieb4fd192017-09-04 22:46:05 +0200642#define RX8130_REG_FLAG_AF BIT(3)
Marek Vasutee0981b2017-06-18 22:55:28 +0200643#define RX8130_REG_CONTROL0 0x0e
Alexandre Bellonieb4fd192017-09-04 22:46:05 +0200644#define RX8130_REG_CONTROL0_AIE BIT(3)
Marek Vasutee0981b2017-06-18 22:55:28 +0200645
646static irqreturn_t rx8130_irq(int irq, void *dev_id)
647{
648 struct ds1307 *ds1307 = dev_id;
649 struct mutex *lock = &ds1307->rtc->ops_lock;
650 u8 ctl[3];
651 int ret;
652
653 mutex_lock(lock);
654
655 /* Read control registers. */
Alexandre Bellonif2b48012017-09-04 22:46:03 +0200656 ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl,
657 sizeof(ctl));
Marek Vasutee0981b2017-06-18 22:55:28 +0200658 if (ret < 0)
659 goto out;
660 if (!(ctl[1] & RX8130_REG_FLAG_AF))
661 goto out;
662 ctl[1] &= ~RX8130_REG_FLAG_AF;
663 ctl[2] &= ~RX8130_REG_CONTROL0_AIE;
664
Alexandre Bellonif2b48012017-09-04 22:46:03 +0200665 ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl,
666 sizeof(ctl));
Marek Vasutee0981b2017-06-18 22:55:28 +0200667 if (ret < 0)
668 goto out;
669
670 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
671
672out:
673 mutex_unlock(lock);
674
675 return IRQ_HANDLED;
676}
677
678static int rx8130_read_alarm(struct device *dev, struct rtc_wkalrm *t)
679{
680 struct ds1307 *ds1307 = dev_get_drvdata(dev);
681 u8 ald[3], ctl[3];
682 int ret;
683
684 if (!test_bit(HAS_ALARM, &ds1307->flags))
685 return -EINVAL;
686
687 /* Read alarm registers. */
Alexandre Bellonif2b48012017-09-04 22:46:03 +0200688 ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_ALARM_MIN, ald,
689 sizeof(ald));
Marek Vasutee0981b2017-06-18 22:55:28 +0200690 if (ret < 0)
691 return ret;
692
693 /* Read control registers. */
Alexandre Bellonif2b48012017-09-04 22:46:03 +0200694 ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl,
695 sizeof(ctl));
Marek Vasutee0981b2017-06-18 22:55:28 +0200696 if (ret < 0)
697 return ret;
698
699 t->enabled = !!(ctl[2] & RX8130_REG_CONTROL0_AIE);
700 t->pending = !!(ctl[1] & RX8130_REG_FLAG_AF);
701
702 /* Report alarm 0 time assuming 24-hour and day-of-month modes. */
703 t->time.tm_sec = -1;
704 t->time.tm_min = bcd2bin(ald[0] & 0x7f);
705 t->time.tm_hour = bcd2bin(ald[1] & 0x7f);
706 t->time.tm_wday = -1;
707 t->time.tm_mday = bcd2bin(ald[2] & 0x7f);
708 t->time.tm_mon = -1;
709 t->time.tm_year = -1;
710 t->time.tm_yday = -1;
711 t->time.tm_isdst = -1;
712
713 dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d enabled=%d\n",
714 __func__, t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
715 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled);
716
717 return 0;
718}
719
720static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t)
721{
722 struct ds1307 *ds1307 = dev_get_drvdata(dev);
723 u8 ald[3], ctl[3];
724 int ret;
725
726 if (!test_bit(HAS_ALARM, &ds1307->flags))
727 return -EINVAL;
728
729 dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
730 "enabled=%d pending=%d\n", __func__,
731 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
732 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon,
733 t->enabled, t->pending);
734
735 /* Read control registers. */
Alexandre Bellonif2b48012017-09-04 22:46:03 +0200736 ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl,
737 sizeof(ctl));
Marek Vasutee0981b2017-06-18 22:55:28 +0200738 if (ret < 0)
739 return ret;
740
741 ctl[0] &= ~RX8130_REG_EXTENSION_WADA;
742 ctl[1] |= RX8130_REG_FLAG_AF;
743 ctl[2] &= ~RX8130_REG_CONTROL0_AIE;
744
Alexandre Bellonif2b48012017-09-04 22:46:03 +0200745 ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl,
746 sizeof(ctl));
Marek Vasutee0981b2017-06-18 22:55:28 +0200747 if (ret < 0)
748 return ret;
749
750 /* Hardware alarm precision is 1 minute! */
751 ald[0] = bin2bcd(t->time.tm_min);
752 ald[1] = bin2bcd(t->time.tm_hour);
753 ald[2] = bin2bcd(t->time.tm_mday);
754
Alexandre Bellonif2b48012017-09-04 22:46:03 +0200755 ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_ALARM_MIN, ald,
756 sizeof(ald));
Marek Vasutee0981b2017-06-18 22:55:28 +0200757 if (ret < 0)
758 return ret;
759
760 if (!t->enabled)
761 return 0;
762
763 ctl[2] |= RX8130_REG_CONTROL0_AIE;
764
Alexandre Bellonif2b48012017-09-04 22:46:03 +0200765 return regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl,
766 sizeof(ctl));
Marek Vasutee0981b2017-06-18 22:55:28 +0200767}
768
769static int rx8130_alarm_irq_enable(struct device *dev, unsigned int enabled)
770{
771 struct ds1307 *ds1307 = dev_get_drvdata(dev);
772 int ret, reg;
773
774 if (!test_bit(HAS_ALARM, &ds1307->flags))
775 return -EINVAL;
776
777 ret = regmap_read(ds1307->regmap, RX8130_REG_CONTROL0, &reg);
778 if (ret < 0)
779 return ret;
780
781 if (enabled)
782 reg |= RX8130_REG_CONTROL0_AIE;
783 else
784 reg &= ~RX8130_REG_CONTROL0_AIE;
785
786 return regmap_write(ds1307->regmap, RX8130_REG_CONTROL0, reg);
787}
788
Marek Vasutee0981b2017-06-18 22:55:28 +0200789/*----------------------------------------------------------------------*/
790
791/*
Tomas Novotnyf4199f82014-12-10 15:53:57 -0800792 * Alarm support for mcp794xx devices.
Simon Guinot1d1945d2014-04-03 14:49:55 -0700793 */
794
Tomas Novotnyf4199f82014-12-10 15:53:57 -0800795#define MCP794XX_REG_CONTROL 0x07
796# define MCP794XX_BIT_ALM0_EN 0x10
797# define MCP794XX_BIT_ALM1_EN 0x20
798#define MCP794XX_REG_ALARM0_BASE 0x0a
799#define MCP794XX_REG_ALARM0_CTRL 0x0d
800#define MCP794XX_REG_ALARM1_BASE 0x11
801#define MCP794XX_REG_ALARM1_CTRL 0x14
Alexandre Bellonieb4fd192017-09-04 22:46:05 +0200802# define MCP794XX_BIT_ALMX_IF BIT(3)
803# define MCP794XX_BIT_ALMX_C0 BIT(4)
804# define MCP794XX_BIT_ALMX_C1 BIT(5)
805# define MCP794XX_BIT_ALMX_C2 BIT(6)
806# define MCP794XX_BIT_ALMX_POL BIT(7)
Tomas Novotnyf4199f82014-12-10 15:53:57 -0800807# define MCP794XX_MSK_ALMX_MATCH (MCP794XX_BIT_ALMX_C0 | \
808 MCP794XX_BIT_ALMX_C1 | \
809 MCP794XX_BIT_ALMX_C2)
Simon Guinot1d1945d2014-04-03 14:49:55 -0700810
Felipe Balbi2fb07a12015-06-23 11:15:10 -0500811static irqreturn_t mcp794xx_irq(int irq, void *dev_id)
Simon Guinot1d1945d2014-04-03 14:49:55 -0700812{
Heiner Kallweit11e58902017-03-10 18:52:34 +0100813 struct ds1307 *ds1307 = dev_id;
Felipe Balbi2fb07a12015-06-23 11:15:10 -0500814 struct mutex *lock = &ds1307->rtc->ops_lock;
Simon Guinot1d1945d2014-04-03 14:49:55 -0700815 int reg, ret;
816
Felipe Balbi2fb07a12015-06-23 11:15:10 -0500817 mutex_lock(lock);
Simon Guinot1d1945d2014-04-03 14:49:55 -0700818
819 /* Check and clear alarm 0 interrupt flag. */
Heiner Kallweit11e58902017-03-10 18:52:34 +0100820 ret = regmap_read(ds1307->regmap, MCP794XX_REG_ALARM0_CTRL, &reg);
821 if (ret)
Simon Guinot1d1945d2014-04-03 14:49:55 -0700822 goto out;
Tomas Novotnyf4199f82014-12-10 15:53:57 -0800823 if (!(reg & MCP794XX_BIT_ALMX_IF))
Simon Guinot1d1945d2014-04-03 14:49:55 -0700824 goto out;
Tomas Novotnyf4199f82014-12-10 15:53:57 -0800825 reg &= ~MCP794XX_BIT_ALMX_IF;
Heiner Kallweit11e58902017-03-10 18:52:34 +0100826 ret = regmap_write(ds1307->regmap, MCP794XX_REG_ALARM0_CTRL, reg);
827 if (ret)
Simon Guinot1d1945d2014-04-03 14:49:55 -0700828 goto out;
829
830 /* Disable alarm 0. */
Heiner Kallweit078f3f62017-06-05 17:57:29 +0200831 ret = regmap_update_bits(ds1307->regmap, MCP794XX_REG_CONTROL,
832 MCP794XX_BIT_ALM0_EN, 0);
Heiner Kallweit11e58902017-03-10 18:52:34 +0100833 if (ret)
Simon Guinot1d1945d2014-04-03 14:49:55 -0700834 goto out;
835
836 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
837
838out:
Felipe Balbi2fb07a12015-06-23 11:15:10 -0500839 mutex_unlock(lock);
840
841 return IRQ_HANDLED;
Simon Guinot1d1945d2014-04-03 14:49:55 -0700842}
843
Tomas Novotnyf4199f82014-12-10 15:53:57 -0800844static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t)
Simon Guinot1d1945d2014-04-03 14:49:55 -0700845{
Heiner Kallweit11e58902017-03-10 18:52:34 +0100846 struct ds1307 *ds1307 = dev_get_drvdata(dev);
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200847 u8 regs[10];
Simon Guinot1d1945d2014-04-03 14:49:55 -0700848 int ret;
849
850 if (!test_bit(HAS_ALARM, &ds1307->flags))
851 return -EINVAL;
852
853 /* Read control and alarm 0 registers. */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200854 ret = regmap_bulk_read(ds1307->regmap, MCP794XX_REG_CONTROL, regs,
855 sizeof(regs));
Heiner Kallweit11e58902017-03-10 18:52:34 +0100856 if (ret)
Simon Guinot1d1945d2014-04-03 14:49:55 -0700857 return ret;
858
Tomas Novotnyf4199f82014-12-10 15:53:57 -0800859 t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN);
Simon Guinot1d1945d2014-04-03 14:49:55 -0700860
861 /* Report alarm 0 time assuming 24-hour and day-of-month modes. */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200862 t->time.tm_sec = bcd2bin(regs[3] & 0x7f);
863 t->time.tm_min = bcd2bin(regs[4] & 0x7f);
864 t->time.tm_hour = bcd2bin(regs[5] & 0x3f);
865 t->time.tm_wday = bcd2bin(regs[6] & 0x7) - 1;
866 t->time.tm_mday = bcd2bin(regs[7] & 0x3f);
867 t->time.tm_mon = bcd2bin(regs[8] & 0x1f) - 1;
Simon Guinot1d1945d2014-04-03 14:49:55 -0700868 t->time.tm_year = -1;
869 t->time.tm_yday = -1;
870 t->time.tm_isdst = -1;
871
872 dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
Alexandre Bellonieb4fd192017-09-04 22:46:05 +0200873 "enabled=%d polarity=%d irq=%d match=%lu\n", __func__,
Simon Guinot1d1945d2014-04-03 14:49:55 -0700874 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
875 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled,
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200876 !!(regs[6] & MCP794XX_BIT_ALMX_POL),
877 !!(regs[6] & MCP794XX_BIT_ALMX_IF),
878 (regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4);
Simon Guinot1d1945d2014-04-03 14:49:55 -0700879
880 return 0;
881}
882
Heiner Kallweit584ce302017-08-29 21:52:56 +0200883/*
884 * We may have a random RTC weekday, therefore calculate alarm weekday based
885 * on current weekday we read from the RTC timekeeping regs
886 */
887static int mcp794xx_alm_weekday(struct device *dev, struct rtc_time *tm_alarm)
888{
889 struct rtc_time tm_now;
890 int days_now, days_alarm, ret;
891
892 ret = ds1307_get_time(dev, &tm_now);
893 if (ret)
894 return ret;
895
896 days_now = div_s64(rtc_tm_to_time64(&tm_now), 24 * 60 * 60);
897 days_alarm = div_s64(rtc_tm_to_time64(tm_alarm), 24 * 60 * 60);
898
899 return (tm_now.tm_wday + days_alarm - days_now) % 7 + 1;
900}
901
Tomas Novotnyf4199f82014-12-10 15:53:57 -0800902static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t)
Simon Guinot1d1945d2014-04-03 14:49:55 -0700903{
Heiner Kallweit11e58902017-03-10 18:52:34 +0100904 struct ds1307 *ds1307 = dev_get_drvdata(dev);
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200905 unsigned char regs[10];
Heiner Kallweit584ce302017-08-29 21:52:56 +0200906 int wday, ret;
Simon Guinot1d1945d2014-04-03 14:49:55 -0700907
908 if (!test_bit(HAS_ALARM, &ds1307->flags))
909 return -EINVAL;
910
Heiner Kallweit584ce302017-08-29 21:52:56 +0200911 wday = mcp794xx_alm_weekday(dev, &t->time);
912 if (wday < 0)
913 return wday;
914
Simon Guinot1d1945d2014-04-03 14:49:55 -0700915 dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
916 "enabled=%d pending=%d\n", __func__,
917 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
918 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon,
919 t->enabled, t->pending);
920
921 /* Read control and alarm 0 registers. */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200922 ret = regmap_bulk_read(ds1307->regmap, MCP794XX_REG_CONTROL, regs,
923 sizeof(regs));
Heiner Kallweit11e58902017-03-10 18:52:34 +0100924 if (ret)
Simon Guinot1d1945d2014-04-03 14:49:55 -0700925 return ret;
926
927 /* Set alarm 0, using 24-hour and day-of-month modes. */
928 regs[3] = bin2bcd(t->time.tm_sec);
929 regs[4] = bin2bcd(t->time.tm_min);
930 regs[5] = bin2bcd(t->time.tm_hour);
Heiner Kallweit584ce302017-08-29 21:52:56 +0200931 regs[6] = wday;
Simon Guinot1d1945d2014-04-03 14:49:55 -0700932 regs[7] = bin2bcd(t->time.tm_mday);
Tero Kristo62c8c202015-10-23 09:29:57 +0300933 regs[8] = bin2bcd(t->time.tm_mon + 1);
Simon Guinot1d1945d2014-04-03 14:49:55 -0700934
935 /* Clear the alarm 0 interrupt flag. */
Tomas Novotnyf4199f82014-12-10 15:53:57 -0800936 regs[6] &= ~MCP794XX_BIT_ALMX_IF;
Simon Guinot1d1945d2014-04-03 14:49:55 -0700937 /* Set alarm match: second, minute, hour, day, date, month. */
Tomas Novotnyf4199f82014-12-10 15:53:57 -0800938 regs[6] |= MCP794XX_MSK_ALMX_MATCH;
Nishanth Menone3edd672015-04-20 19:51:34 -0500939 /* Disable interrupt. We will not enable until completely programmed */
940 regs[0] &= ~MCP794XX_BIT_ALM0_EN;
Simon Guinot1d1945d2014-04-03 14:49:55 -0700941
Alexandre Belloni042fa8c2017-09-04 22:46:02 +0200942 ret = regmap_bulk_write(ds1307->regmap, MCP794XX_REG_CONTROL, regs,
943 sizeof(regs));
Heiner Kallweit11e58902017-03-10 18:52:34 +0100944 if (ret)
Simon Guinot1d1945d2014-04-03 14:49:55 -0700945 return ret;
946
Nishanth Menone3edd672015-04-20 19:51:34 -0500947 if (!t->enabled)
948 return 0;
949 regs[0] |= MCP794XX_BIT_ALM0_EN;
Heiner Kallweit11e58902017-03-10 18:52:34 +0100950 return regmap_write(ds1307->regmap, MCP794XX_REG_CONTROL, regs[0]);
Simon Guinot1d1945d2014-04-03 14:49:55 -0700951}
952
Tomas Novotnyf4199f82014-12-10 15:53:57 -0800953static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled)
Simon Guinot1d1945d2014-04-03 14:49:55 -0700954{
Heiner Kallweit11e58902017-03-10 18:52:34 +0100955 struct ds1307 *ds1307 = dev_get_drvdata(dev);
Simon Guinot1d1945d2014-04-03 14:49:55 -0700956
957 if (!test_bit(HAS_ALARM, &ds1307->flags))
958 return -EINVAL;
959
Heiner Kallweit078f3f62017-06-05 17:57:29 +0200960 return regmap_update_bits(ds1307->regmap, MCP794XX_REG_CONTROL,
961 MCP794XX_BIT_ALM0_EN,
962 enabled ? MCP794XX_BIT_ALM0_EN : 0);
Simon Guinot1d1945d2014-04-03 14:49:55 -0700963}
964
Simon Guinot1d1945d2014-04-03 14:49:55 -0700965/*----------------------------------------------------------------------*/
966
Alexandre Belloniabc925f2017-07-06 11:42:07 +0200967static int ds1307_nvram_read(void *priv, unsigned int offset, void *val,
968 size_t bytes)
David Brownell682d73f2007-11-14 16:58:32 -0800969{
Alexandre Belloniabc925f2017-07-06 11:42:07 +0200970 struct ds1307 *ds1307 = priv;
Heiner Kallweit969fa072017-07-12 07:49:54 +0200971 const struct chip_desc *chip = &chips[ds1307->type];
David Brownell682d73f2007-11-14 16:58:32 -0800972
Heiner Kallweit969fa072017-07-12 07:49:54 +0200973 return regmap_bulk_read(ds1307->regmap, chip->nvram_offset + offset,
Alexandre Belloniabc925f2017-07-06 11:42:07 +0200974 val, bytes);
David Brownell682d73f2007-11-14 16:58:32 -0800975}
976
Alexandre Belloniabc925f2017-07-06 11:42:07 +0200977static int ds1307_nvram_write(void *priv, unsigned int offset, void *val,
978 size_t bytes)
David Brownell682d73f2007-11-14 16:58:32 -0800979{
Alexandre Belloniabc925f2017-07-06 11:42:07 +0200980 struct ds1307 *ds1307 = priv;
Heiner Kallweit969fa072017-07-12 07:49:54 +0200981 const struct chip_desc *chip = &chips[ds1307->type];
David Brownell682d73f2007-11-14 16:58:32 -0800982
Heiner Kallweit969fa072017-07-12 07:49:54 +0200983 return regmap_bulk_write(ds1307->regmap, chip->nvram_offset + offset,
Alexandre Belloniabc925f2017-07-06 11:42:07 +0200984 val, bytes);
David Brownell682d73f2007-11-14 16:58:32 -0800985}
986
David Brownell682d73f2007-11-14 16:58:32 -0800987/*----------------------------------------------------------------------*/
988
Heiner Kallweit11e58902017-03-10 18:52:34 +0100989static u8 do_trickle_setup_ds1339(struct ds1307 *ds1307,
Alexandre Belloni57ec2d92017-09-04 22:46:04 +0200990 u32 ohms, bool diode)
Matti Vaittinen33b04b72014-10-13 15:52:48 -0700991{
992 u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE :
993 DS1307_TRICKLE_CHARGER_NO_DIODE;
994
995 switch (ohms) {
996 case 250:
997 setup |= DS1307_TRICKLE_CHARGER_250_OHM;
998 break;
999 case 2000:
1000 setup |= DS1307_TRICKLE_CHARGER_2K_OHM;
1001 break;
1002 case 4000:
1003 setup |= DS1307_TRICKLE_CHARGER_4K_OHM;
1004 break;
1005 default:
Heiner Kallweit11e58902017-03-10 18:52:34 +01001006 dev_warn(ds1307->dev,
Matti Vaittinen33b04b72014-10-13 15:52:48 -07001007 "Unsupported ohm value %u in dt\n", ohms);
1008 return 0;
1009 }
1010 return setup;
1011}
1012
Heiner Kallweitd8490fd2017-07-12 07:49:28 +02001013static u8 ds1307_trickle_init(struct ds1307 *ds1307,
Heiner Kallweit7624df42017-07-12 07:49:33 +02001014 const struct chip_desc *chip)
Matti Vaittinen33b04b72014-10-13 15:52:48 -07001015{
Alexandre Belloni57ec2d92017-09-04 22:46:04 +02001016 u32 ohms;
Matti Vaittinen33b04b72014-10-13 15:52:48 -07001017 bool diode = true;
1018
1019 if (!chip->do_trickle_setup)
Heiner Kallweitd8490fd2017-07-12 07:49:28 +02001020 return 0;
1021
Heiner Kallweit11e58902017-03-10 18:52:34 +01001022 if (device_property_read_u32(ds1307->dev, "trickle-resistor-ohms",
1023 &ohms))
Heiner Kallweitd8490fd2017-07-12 07:49:28 +02001024 return 0;
1025
Heiner Kallweit11e58902017-03-10 18:52:34 +01001026 if (device_property_read_bool(ds1307->dev, "trickle-diode-disable"))
Matti Vaittinen33b04b72014-10-13 15:52:48 -07001027 diode = false;
Heiner Kallweitd8490fd2017-07-12 07:49:28 +02001028
1029 return chip->do_trickle_setup(ds1307, ohms, diode);
Matti Vaittinen33b04b72014-10-13 15:52:48 -07001030}
1031
Akinobu Mita445c0202016-01-25 00:22:16 +09001032/*----------------------------------------------------------------------*/
1033
1034#ifdef CONFIG_RTC_DRV_DS1307_HWMON
1035
1036/*
1037 * Temperature sensor support for ds3231 devices.
1038 */
1039
1040#define DS3231_REG_TEMPERATURE 0x11
1041
1042/*
1043 * A user-initiated temperature conversion is not started by this function,
1044 * so the temperature is updated once every 64 seconds.
1045 */
Zhuang Yuyao9a3dce62016-04-18 09:21:42 +09001046static int ds3231_hwmon_read_temp(struct device *dev, s32 *mC)
Akinobu Mita445c0202016-01-25 00:22:16 +09001047{
1048 struct ds1307 *ds1307 = dev_get_drvdata(dev);
1049 u8 temp_buf[2];
1050 s16 temp;
1051 int ret;
1052
Heiner Kallweit11e58902017-03-10 18:52:34 +01001053 ret = regmap_bulk_read(ds1307->regmap, DS3231_REG_TEMPERATURE,
1054 temp_buf, sizeof(temp_buf));
1055 if (ret)
Akinobu Mita445c0202016-01-25 00:22:16 +09001056 return ret;
Akinobu Mita445c0202016-01-25 00:22:16 +09001057 /*
1058 * Temperature is represented as a 10-bit code with a resolution of
1059 * 0.25 degree celsius and encoded in two's complement format.
1060 */
1061 temp = (temp_buf[0] << 8) | temp_buf[1];
1062 temp >>= 6;
1063 *mC = temp * 250;
1064
1065 return 0;
1066}
1067
1068static ssize_t ds3231_hwmon_show_temp(struct device *dev,
Alexandre Belloni4057a662017-09-04 22:46:06 +02001069 struct device_attribute *attr, char *buf)
Akinobu Mita445c0202016-01-25 00:22:16 +09001070{
1071 int ret;
Zhuang Yuyao9a3dce62016-04-18 09:21:42 +09001072 s32 temp;
Akinobu Mita445c0202016-01-25 00:22:16 +09001073
1074 ret = ds3231_hwmon_read_temp(dev, &temp);
1075 if (ret)
1076 return ret;
1077
1078 return sprintf(buf, "%d\n", temp);
1079}
Alexandre Bellonib4be2712017-09-04 22:46:08 +02001080static SENSOR_DEVICE_ATTR(temp1_input, 0444, ds3231_hwmon_show_temp,
Alexandre Belloni4057a662017-09-04 22:46:06 +02001081 NULL, 0);
Akinobu Mita445c0202016-01-25 00:22:16 +09001082
1083static struct attribute *ds3231_hwmon_attrs[] = {
1084 &sensor_dev_attr_temp1_input.dev_attr.attr,
1085 NULL,
1086};
1087ATTRIBUTE_GROUPS(ds3231_hwmon);
1088
1089static void ds1307_hwmon_register(struct ds1307 *ds1307)
1090{
1091 struct device *dev;
1092
1093 if (ds1307->type != ds_3231)
1094 return;
1095
Heiner Kallweit11e58902017-03-10 18:52:34 +01001096 dev = devm_hwmon_device_register_with_groups(ds1307->dev, ds1307->name,
Alexandre Belloni4057a662017-09-04 22:46:06 +02001097 ds1307,
1098 ds3231_hwmon_groups);
Akinobu Mita445c0202016-01-25 00:22:16 +09001099 if (IS_ERR(dev)) {
Heiner Kallweit11e58902017-03-10 18:52:34 +01001100 dev_warn(ds1307->dev, "unable to register hwmon device %ld\n",
1101 PTR_ERR(dev));
Akinobu Mita445c0202016-01-25 00:22:16 +09001102 }
1103}
1104
1105#else
1106
1107static void ds1307_hwmon_register(struct ds1307 *ds1307)
1108{
1109}
1110
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001111#endif /* CONFIG_RTC_DRV_DS1307_HWMON */
1112
1113/*----------------------------------------------------------------------*/
1114
1115/*
1116 * Square-wave output support for DS3231
1117 * Datasheet: https://datasheets.maximintegrated.com/en/ds/DS3231.pdf
1118 */
1119#ifdef CONFIG_COMMON_CLK
1120
1121enum {
1122 DS3231_CLK_SQW = 0,
1123 DS3231_CLK_32KHZ,
1124};
1125
1126#define clk_sqw_to_ds1307(clk) \
1127 container_of(clk, struct ds1307, clks[DS3231_CLK_SQW])
1128#define clk_32khz_to_ds1307(clk) \
1129 container_of(clk, struct ds1307, clks[DS3231_CLK_32KHZ])
1130
1131static int ds3231_clk_sqw_rates[] = {
1132 1,
1133 1024,
1134 4096,
1135 8192,
1136};
1137
1138static int ds1337_write_control(struct ds1307 *ds1307, u8 mask, u8 value)
1139{
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001140 struct mutex *lock = &ds1307->rtc->ops_lock;
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001141 int ret;
1142
1143 mutex_lock(lock);
Heiner Kallweit078f3f62017-06-05 17:57:29 +02001144 ret = regmap_update_bits(ds1307->regmap, DS1337_REG_CONTROL,
1145 mask, value);
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001146 mutex_unlock(lock);
1147
1148 return ret;
1149}
1150
1151static unsigned long ds3231_clk_sqw_recalc_rate(struct clk_hw *hw,
1152 unsigned long parent_rate)
1153{
1154 struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
Heiner Kallweit11e58902017-03-10 18:52:34 +01001155 int control, ret;
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001156 int rate_sel = 0;
1157
Heiner Kallweit11e58902017-03-10 18:52:34 +01001158 ret = regmap_read(ds1307->regmap, DS1337_REG_CONTROL, &control);
1159 if (ret)
1160 return ret;
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001161 if (control & DS1337_BIT_RS1)
1162 rate_sel += 1;
1163 if (control & DS1337_BIT_RS2)
1164 rate_sel += 2;
1165
1166 return ds3231_clk_sqw_rates[rate_sel];
1167}
1168
1169static long ds3231_clk_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
Alexandre Belloni4057a662017-09-04 22:46:06 +02001170 unsigned long *prate)
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001171{
1172 int i;
1173
1174 for (i = ARRAY_SIZE(ds3231_clk_sqw_rates) - 1; i >= 0; i--) {
1175 if (ds3231_clk_sqw_rates[i] <= rate)
1176 return ds3231_clk_sqw_rates[i];
1177 }
1178
1179 return 0;
1180}
1181
1182static int ds3231_clk_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
Alexandre Belloni4057a662017-09-04 22:46:06 +02001183 unsigned long parent_rate)
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001184{
1185 struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1186 int control = 0;
1187 int rate_sel;
1188
1189 for (rate_sel = 0; rate_sel < ARRAY_SIZE(ds3231_clk_sqw_rates);
1190 rate_sel++) {
1191 if (ds3231_clk_sqw_rates[rate_sel] == rate)
1192 break;
1193 }
1194
1195 if (rate_sel == ARRAY_SIZE(ds3231_clk_sqw_rates))
1196 return -EINVAL;
1197
1198 if (rate_sel & 1)
1199 control |= DS1337_BIT_RS1;
1200 if (rate_sel & 2)
1201 control |= DS1337_BIT_RS2;
1202
1203 return ds1337_write_control(ds1307, DS1337_BIT_RS1 | DS1337_BIT_RS2,
1204 control);
1205}
1206
1207static int ds3231_clk_sqw_prepare(struct clk_hw *hw)
1208{
1209 struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1210
1211 return ds1337_write_control(ds1307, DS1337_BIT_INTCN, 0);
1212}
1213
1214static void ds3231_clk_sqw_unprepare(struct clk_hw *hw)
1215{
1216 struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1217
1218 ds1337_write_control(ds1307, DS1337_BIT_INTCN, DS1337_BIT_INTCN);
1219}
1220
1221static int ds3231_clk_sqw_is_prepared(struct clk_hw *hw)
1222{
1223 struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
Heiner Kallweit11e58902017-03-10 18:52:34 +01001224 int control, ret;
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001225
Heiner Kallweit11e58902017-03-10 18:52:34 +01001226 ret = regmap_read(ds1307->regmap, DS1337_REG_CONTROL, &control);
1227 if (ret)
1228 return ret;
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001229
1230 return !(control & DS1337_BIT_INTCN);
1231}
1232
1233static const struct clk_ops ds3231_clk_sqw_ops = {
1234 .prepare = ds3231_clk_sqw_prepare,
1235 .unprepare = ds3231_clk_sqw_unprepare,
1236 .is_prepared = ds3231_clk_sqw_is_prepared,
1237 .recalc_rate = ds3231_clk_sqw_recalc_rate,
1238 .round_rate = ds3231_clk_sqw_round_rate,
1239 .set_rate = ds3231_clk_sqw_set_rate,
1240};
1241
1242static unsigned long ds3231_clk_32khz_recalc_rate(struct clk_hw *hw,
Alexandre Belloni4057a662017-09-04 22:46:06 +02001243 unsigned long parent_rate)
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001244{
1245 return 32768;
1246}
1247
1248static int ds3231_clk_32khz_control(struct ds1307 *ds1307, bool enable)
1249{
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001250 struct mutex *lock = &ds1307->rtc->ops_lock;
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001251 int ret;
1252
1253 mutex_lock(lock);
Heiner Kallweit078f3f62017-06-05 17:57:29 +02001254 ret = regmap_update_bits(ds1307->regmap, DS1337_REG_STATUS,
1255 DS3231_BIT_EN32KHZ,
1256 enable ? DS3231_BIT_EN32KHZ : 0);
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001257 mutex_unlock(lock);
1258
1259 return ret;
1260}
1261
1262static int ds3231_clk_32khz_prepare(struct clk_hw *hw)
1263{
1264 struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1265
1266 return ds3231_clk_32khz_control(ds1307, true);
1267}
1268
1269static void ds3231_clk_32khz_unprepare(struct clk_hw *hw)
1270{
1271 struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1272
1273 ds3231_clk_32khz_control(ds1307, false);
1274}
1275
1276static int ds3231_clk_32khz_is_prepared(struct clk_hw *hw)
1277{
1278 struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
Heiner Kallweit11e58902017-03-10 18:52:34 +01001279 int status, ret;
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001280
Heiner Kallweit11e58902017-03-10 18:52:34 +01001281 ret = regmap_read(ds1307->regmap, DS1337_REG_STATUS, &status);
1282 if (ret)
1283 return ret;
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001284
1285 return !!(status & DS3231_BIT_EN32KHZ);
1286}
1287
1288static const struct clk_ops ds3231_clk_32khz_ops = {
1289 .prepare = ds3231_clk_32khz_prepare,
1290 .unprepare = ds3231_clk_32khz_unprepare,
1291 .is_prepared = ds3231_clk_32khz_is_prepared,
1292 .recalc_rate = ds3231_clk_32khz_recalc_rate,
1293};
1294
1295static struct clk_init_data ds3231_clks_init[] = {
1296 [DS3231_CLK_SQW] = {
1297 .name = "ds3231_clk_sqw",
1298 .ops = &ds3231_clk_sqw_ops,
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001299 },
1300 [DS3231_CLK_32KHZ] = {
1301 .name = "ds3231_clk_32khz",
1302 .ops = &ds3231_clk_32khz_ops,
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001303 },
1304};
1305
1306static int ds3231_clks_register(struct ds1307 *ds1307)
1307{
Heiner Kallweit11e58902017-03-10 18:52:34 +01001308 struct device_node *node = ds1307->dev->of_node;
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001309 struct clk_onecell_data *onecell;
1310 int i;
1311
Heiner Kallweit11e58902017-03-10 18:52:34 +01001312 onecell = devm_kzalloc(ds1307->dev, sizeof(*onecell), GFP_KERNEL);
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001313 if (!onecell)
1314 return -ENOMEM;
1315
1316 onecell->clk_num = ARRAY_SIZE(ds3231_clks_init);
Heiner Kallweit11e58902017-03-10 18:52:34 +01001317 onecell->clks = devm_kcalloc(ds1307->dev, onecell->clk_num,
1318 sizeof(onecell->clks[0]), GFP_KERNEL);
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001319 if (!onecell->clks)
1320 return -ENOMEM;
1321
1322 for (i = 0; i < ARRAY_SIZE(ds3231_clks_init); i++) {
1323 struct clk_init_data init = ds3231_clks_init[i];
1324
1325 /*
1326 * Interrupt signal due to alarm conditions and square-wave
1327 * output share same pin, so don't initialize both.
1328 */
1329 if (i == DS3231_CLK_SQW && test_bit(HAS_ALARM, &ds1307->flags))
1330 continue;
1331
1332 /* optional override of the clockname */
1333 of_property_read_string_index(node, "clock-output-names", i,
Alexandre Belloni4057a662017-09-04 22:46:06 +02001334 &init.name);
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001335 ds1307->clks[i].init = &init;
1336
Heiner Kallweit11e58902017-03-10 18:52:34 +01001337 onecell->clks[i] = devm_clk_register(ds1307->dev,
1338 &ds1307->clks[i]);
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001339 if (IS_ERR(onecell->clks[i]))
1340 return PTR_ERR(onecell->clks[i]);
1341 }
1342
1343 if (!node)
1344 return 0;
1345
1346 of_clk_add_provider(node, of_clk_src_onecell_get, onecell);
1347
1348 return 0;
1349}
1350
1351static void ds1307_clks_register(struct ds1307 *ds1307)
1352{
1353 int ret;
1354
1355 if (ds1307->type != ds_3231)
1356 return;
1357
1358 ret = ds3231_clks_register(ds1307);
1359 if (ret) {
Heiner Kallweit11e58902017-03-10 18:52:34 +01001360 dev_warn(ds1307->dev, "unable to register clock device %d\n",
1361 ret);
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001362 }
1363}
1364
1365#else
1366
1367static void ds1307_clks_register(struct ds1307 *ds1307)
1368{
1369}
1370
1371#endif /* CONFIG_COMMON_CLK */
Akinobu Mita445c0202016-01-25 00:22:16 +09001372
Heiner Kallweit11e58902017-03-10 18:52:34 +01001373static const struct regmap_config regmap_config = {
1374 .reg_bits = 8,
1375 .val_bits = 8,
Heiner Kallweit11e58902017-03-10 18:52:34 +01001376};
1377
Greg Kroah-Hartman5a167f42012-12-21 13:09:38 -08001378static int ds1307_probe(struct i2c_client *client,
1379 const struct i2c_device_id *id)
David Brownell1abb0dc2006-06-25 05:48:17 -07001380{
1381 struct ds1307 *ds1307;
1382 int err = -ENODEV;
Heiner Kallweit584ce302017-08-29 21:52:56 +02001383 int tmp;
Heiner Kallweit7624df42017-07-12 07:49:33 +02001384 const struct chip_desc *chip;
Heiner Kallweit82e2d432017-07-12 07:49:37 +02001385 bool want_irq;
Michael Lange8bc2a402016-01-21 18:10:16 +01001386 bool ds1307_can_wakeup_device = false;
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001387 unsigned char regs[8];
Jingoo Han01ce8932013-11-12 15:10:41 -08001388 struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);
Heiner Kallweitd8490fd2017-07-12 07:49:28 +02001389 u8 trickle_charger_setup = 0;
David Brownell1abb0dc2006-06-25 05:48:17 -07001390
Jingoo Hanedca66d2013-07-03 15:07:05 -07001391 ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL);
David Anders40ce9722012-03-23 15:02:37 -07001392 if (!ds1307)
David Brownellc065f352007-07-17 04:05:10 -07001393 return -ENOMEM;
David Brownell045e0e82007-07-17 04:04:55 -07001394
Heiner Kallweit11e58902017-03-10 18:52:34 +01001395 dev_set_drvdata(&client->dev, ds1307);
1396 ds1307->dev = &client->dev;
1397 ds1307->name = client->name;
Joakim Tjernlund33df2ee2009-06-17 16:26:08 -07001398
Heiner Kallweit11e58902017-03-10 18:52:34 +01001399 ds1307->regmap = devm_regmap_init_i2c(client, &regmap_config);
1400 if (IS_ERR(ds1307->regmap)) {
1401 dev_err(ds1307->dev, "regmap allocation failed\n");
1402 return PTR_ERR(ds1307->regmap);
1403 }
1404
1405 i2c_set_clientdata(client, ds1307);
Javier Martinez Canillas7ef6d2c2017-03-03 11:29:15 -03001406
1407 if (client->dev.of_node) {
1408 ds1307->type = (enum ds_type)
1409 of_device_get_match_data(&client->dev);
1410 chip = &chips[ds1307->type];
1411 } else if (id) {
Tin Huynh9c19b892016-11-30 09:57:31 +07001412 chip = &chips[id->driver_data];
1413 ds1307->type = id->driver_data;
1414 } else {
1415 const struct acpi_device_id *acpi_id;
Joakim Tjernlund33df2ee2009-06-17 16:26:08 -07001416
Tin Huynh9c19b892016-11-30 09:57:31 +07001417 acpi_id = acpi_match_device(ACPI_PTR(ds1307_acpi_ids),
Heiner Kallweit11e58902017-03-10 18:52:34 +01001418 ds1307->dev);
Tin Huynh9c19b892016-11-30 09:57:31 +07001419 if (!acpi_id)
1420 return -ENODEV;
1421 chip = &chips[acpi_id->driver_data];
1422 ds1307->type = acpi_id->driver_data;
1423 }
1424
Heiner Kallweit82e2d432017-07-12 07:49:37 +02001425 want_irq = client->irq > 0 && chip->alarm;
Matti Vaittinen33b04b72014-10-13 15:52:48 -07001426
Matti Vaittinen33b04b72014-10-13 15:52:48 -07001427 if (!pdata)
Heiner Kallweitd8490fd2017-07-12 07:49:28 +02001428 trickle_charger_setup = ds1307_trickle_init(ds1307, chip);
Matti Vaittinen33b04b72014-10-13 15:52:48 -07001429 else if (pdata->trickle_charger_setup)
Heiner Kallweitd8490fd2017-07-12 07:49:28 +02001430 trickle_charger_setup = pdata->trickle_charger_setup;
Matti Vaittinen33b04b72014-10-13 15:52:48 -07001431
Heiner Kallweitd8490fd2017-07-12 07:49:28 +02001432 if (trickle_charger_setup && chip->trickle_charger_reg) {
1433 trickle_charger_setup |= DS13XX_TRICKLE_CHARGER_MAGIC;
Heiner Kallweit11e58902017-03-10 18:52:34 +01001434 dev_dbg(ds1307->dev,
1435 "writing trickle charger info 0x%x to 0x%x\n",
Heiner Kallweitd8490fd2017-07-12 07:49:28 +02001436 trickle_charger_setup, chip->trickle_charger_reg);
Heiner Kallweit11e58902017-03-10 18:52:34 +01001437 regmap_write(ds1307->regmap, chip->trickle_charger_reg,
Heiner Kallweitd8490fd2017-07-12 07:49:28 +02001438 trickle_charger_setup);
Matti Vaittinen33b04b72014-10-13 15:52:48 -07001439 }
Wolfram Sangeb86c302012-05-29 15:07:38 -07001440
Michael Lange8bc2a402016-01-21 18:10:16 +01001441#ifdef CONFIG_OF
1442/*
1443 * For devices with no IRQ directly connected to the SoC, the RTC chip
1444 * can be forced as a wakeup source by stating that explicitly in
1445 * the device's .dts file using the "wakeup-source" boolean property.
1446 * If the "wakeup-source" property is set, don't request an IRQ.
1447 * This will guarantee the 'wakealarm' sysfs entry is available on the device,
1448 * if supported by the RTC.
1449 */
Heiner Kallweit82e2d432017-07-12 07:49:37 +02001450 if (chip->alarm && of_property_read_bool(client->dev.of_node,
1451 "wakeup-source"))
Michael Lange8bc2a402016-01-21 18:10:16 +01001452 ds1307_can_wakeup_device = true;
Michael Lange8bc2a402016-01-21 18:10:16 +01001453#endif
1454
David Brownell045e0e82007-07-17 04:04:55 -07001455 switch (ds1307->type) {
1456 case ds_1337:
1457 case ds_1339:
Nikita Yushchenko0759c882017-08-24 09:32:11 +03001458 case ds_1341:
Wolfram Sang97f902b2009-06-17 16:26:10 -07001459 case ds_3231:
Rodolfo Giomettibe5f59f2007-07-17 04:05:06 -07001460 /* get registers that the "rtc" read below won't read... */
Heiner Kallweit11e58902017-03-10 18:52:34 +01001461 err = regmap_bulk_read(ds1307->regmap, DS1337_REG_CONTROL,
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001462 regs, 2);
Heiner Kallweit11e58902017-03-10 18:52:34 +01001463 if (err) {
1464 dev_dbg(ds1307->dev, "read error %d\n", err);
Jingoo Hanedca66d2013-07-03 15:07:05 -07001465 goto exit;
David Brownell1abb0dc2006-06-25 05:48:17 -07001466 }
1467
Rodolfo Giomettibe5f59f2007-07-17 04:05:06 -07001468 /* oscillator off? turn it on, so clock can tick. */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001469 if (regs[0] & DS1337_BIT_nEOSC)
1470 regs[0] &= ~DS1337_BIT_nEOSC;
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -07001471
David Anders40ce9722012-03-23 15:02:37 -07001472 /*
Michael Lange8bc2a402016-01-21 18:10:16 +01001473 * Using IRQ or defined as wakeup-source?
1474 * Disable the square wave and both alarms.
Wolfram Sang97f902b2009-06-17 16:26:10 -07001475 * For some variants, be sure alarms can trigger when we're
1476 * running on Vbackup (BBSQI/BBSQW)
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -07001477 */
Heiner Kallweit82e2d432017-07-12 07:49:37 +02001478 if (want_irq || ds1307_can_wakeup_device) {
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001479 regs[0] |= DS1337_BIT_INTCN | chip->bbsqi_bit;
1480 regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -07001481 }
1482
Heiner Kallweit11e58902017-03-10 18:52:34 +01001483 regmap_write(ds1307->regmap, DS1337_REG_CONTROL,
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001484 regs[0]);
Rodolfo Giomettibe5f59f2007-07-17 04:05:06 -07001485
1486 /* oscillator fault? clear flag, and warn */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001487 if (regs[1] & DS1337_BIT_OSF) {
Heiner Kallweit11e58902017-03-10 18:52:34 +01001488 regmap_write(ds1307->regmap, DS1337_REG_STATUS,
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001489 regs[1] & ~DS1337_BIT_OSF);
Heiner Kallweit11e58902017-03-10 18:52:34 +01001490 dev_warn(ds1307->dev, "SET TIME!\n");
David Brownell1abb0dc2006-06-25 05:48:17 -07001491 }
David Brownell045e0e82007-07-17 04:04:55 -07001492 break;
Matthias Fuchsa2166852009-03-31 15:24:58 -07001493
1494 case rx_8025:
Heiner Kallweit11e58902017-03-10 18:52:34 +01001495 err = regmap_bulk_read(ds1307->regmap,
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001496 RX8025_REG_CTRL1 << 4 | 0x08, regs, 2);
Heiner Kallweit11e58902017-03-10 18:52:34 +01001497 if (err) {
1498 dev_dbg(ds1307->dev, "read error %d\n", err);
Jingoo Hanedca66d2013-07-03 15:07:05 -07001499 goto exit;
Matthias Fuchsa2166852009-03-31 15:24:58 -07001500 }
1501
1502 /* oscillator off? turn it on, so clock can tick. */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001503 if (!(regs[1] & RX8025_BIT_XST)) {
1504 regs[1] |= RX8025_BIT_XST;
Heiner Kallweit11e58902017-03-10 18:52:34 +01001505 regmap_write(ds1307->regmap,
1506 RX8025_REG_CTRL2 << 4 | 0x08,
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001507 regs[1]);
Heiner Kallweit11e58902017-03-10 18:52:34 +01001508 dev_warn(ds1307->dev,
Matthias Fuchsa2166852009-03-31 15:24:58 -07001509 "oscillator stop detected - SET TIME!\n");
1510 }
1511
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001512 if (regs[1] & RX8025_BIT_PON) {
1513 regs[1] &= ~RX8025_BIT_PON;
Heiner Kallweit11e58902017-03-10 18:52:34 +01001514 regmap_write(ds1307->regmap,
1515 RX8025_REG_CTRL2 << 4 | 0x08,
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001516 regs[1]);
Heiner Kallweit11e58902017-03-10 18:52:34 +01001517 dev_warn(ds1307->dev, "power-on detected\n");
Matthias Fuchsa2166852009-03-31 15:24:58 -07001518 }
1519
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001520 if (regs[1] & RX8025_BIT_VDET) {
1521 regs[1] &= ~RX8025_BIT_VDET;
Heiner Kallweit11e58902017-03-10 18:52:34 +01001522 regmap_write(ds1307->regmap,
1523 RX8025_REG_CTRL2 << 4 | 0x08,
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001524 regs[1]);
Heiner Kallweit11e58902017-03-10 18:52:34 +01001525 dev_warn(ds1307->dev, "voltage drop detected\n");
Matthias Fuchsa2166852009-03-31 15:24:58 -07001526 }
1527
1528 /* make sure we are running in 24hour mode */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001529 if (!(regs[0] & RX8025_BIT_2412)) {
Matthias Fuchsa2166852009-03-31 15:24:58 -07001530 u8 hour;
1531
1532 /* switch to 24 hour mode */
Heiner Kallweit11e58902017-03-10 18:52:34 +01001533 regmap_write(ds1307->regmap,
1534 RX8025_REG_CTRL1 << 4 | 0x08,
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001535 regs[0] | RX8025_BIT_2412);
Matthias Fuchsa2166852009-03-31 15:24:58 -07001536
Heiner Kallweit11e58902017-03-10 18:52:34 +01001537 err = regmap_bulk_read(ds1307->regmap,
1538 RX8025_REG_CTRL1 << 4 | 0x08,
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001539 regs, 2);
Heiner Kallweit11e58902017-03-10 18:52:34 +01001540 if (err) {
1541 dev_dbg(ds1307->dev, "read error %d\n", err);
Jingoo Hanedca66d2013-07-03 15:07:05 -07001542 goto exit;
Matthias Fuchsa2166852009-03-31 15:24:58 -07001543 }
1544
1545 /* correct hour */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001546 hour = bcd2bin(regs[DS1307_REG_HOUR]);
Matthias Fuchsa2166852009-03-31 15:24:58 -07001547 if (hour == 12)
1548 hour = 0;
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001549 if (regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
Matthias Fuchsa2166852009-03-31 15:24:58 -07001550 hour += 12;
1551
Heiner Kallweit11e58902017-03-10 18:52:34 +01001552 regmap_write(ds1307->regmap,
1553 DS1307_REG_HOUR << 4 | 0x08, hour);
Matthias Fuchsa2166852009-03-31 15:24:58 -07001554 }
1555 break;
David Brownell045e0e82007-07-17 04:04:55 -07001556 default:
1557 break;
1558 }
David Brownell1abb0dc2006-06-25 05:48:17 -07001559
1560read_rtc:
1561 /* read RTC registers */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001562 err = regmap_bulk_read(ds1307->regmap, chip->offset, regs,
1563 sizeof(regs));
Heiner Kallweit11e58902017-03-10 18:52:34 +01001564 if (err) {
1565 dev_dbg(ds1307->dev, "read error %d\n", err);
Jingoo Hanedca66d2013-07-03 15:07:05 -07001566 goto exit;
David Brownell1abb0dc2006-06-25 05:48:17 -07001567 }
1568
David Anders40ce9722012-03-23 15:02:37 -07001569 /*
1570 * minimal sanity checking; some chips (like DS1340) don't
David Brownell1abb0dc2006-06-25 05:48:17 -07001571 * specify the extra bits as must-be-zero, but there are
1572 * still a few values that are clearly out-of-range.
1573 */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001574 tmp = regs[DS1307_REG_SECS];
David Brownell045e0e82007-07-17 04:04:55 -07001575 switch (ds1307->type) {
1576 case ds_1307:
Stefan Agner8566f702017-03-23 16:54:57 -07001577 case m41t0:
David Brownell045e0e82007-07-17 04:04:55 -07001578 case m41t00:
Rodolfo Giomettibe5f59f2007-07-17 04:05:06 -07001579 /* clock halted? turn it on, so clock can tick. */
David Brownell045e0e82007-07-17 04:04:55 -07001580 if (tmp & DS1307_BIT_CH) {
Heiner Kallweit11e58902017-03-10 18:52:34 +01001581 regmap_write(ds1307->regmap, DS1307_REG_SECS, 0);
1582 dev_warn(ds1307->dev, "SET TIME!\n");
David Brownell045e0e82007-07-17 04:04:55 -07001583 goto read_rtc;
David Brownell1abb0dc2006-06-25 05:48:17 -07001584 }
David Brownell045e0e82007-07-17 04:04:55 -07001585 break;
Sean Nyekjaer300a7732017-06-08 12:36:54 +02001586 case ds_1308:
Rodolfo Giomettibe5f59f2007-07-17 04:05:06 -07001587 case ds_1338:
1588 /* clock halted? turn it on, so clock can tick. */
David Brownell045e0e82007-07-17 04:04:55 -07001589 if (tmp & DS1307_BIT_CH)
Heiner Kallweit11e58902017-03-10 18:52:34 +01001590 regmap_write(ds1307->regmap, DS1307_REG_SECS, 0);
Rodolfo Giomettibe5f59f2007-07-17 04:05:06 -07001591
1592 /* oscillator fault? clear flag, and warn */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001593 if (regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
Heiner Kallweit11e58902017-03-10 18:52:34 +01001594 regmap_write(ds1307->regmap, DS1307_REG_CONTROL,
Alexandre Belloni4057a662017-09-04 22:46:06 +02001595 regs[DS1307_REG_CONTROL] &
1596 ~DS1338_BIT_OSF);
Heiner Kallweit11e58902017-03-10 18:52:34 +01001597 dev_warn(ds1307->dev, "SET TIME!\n");
Rodolfo Giomettibe5f59f2007-07-17 04:05:06 -07001598 goto read_rtc;
1599 }
David Brownell045e0e82007-07-17 04:04:55 -07001600 break;
frederic Rodofcd8db02008-02-06 01:38:55 -08001601 case ds_1340:
1602 /* clock halted? turn it on, so clock can tick. */
1603 if (tmp & DS1340_BIT_nEOSC)
Heiner Kallweit11e58902017-03-10 18:52:34 +01001604 regmap_write(ds1307->regmap, DS1307_REG_SECS, 0);
frederic Rodofcd8db02008-02-06 01:38:55 -08001605
Heiner Kallweit11e58902017-03-10 18:52:34 +01001606 err = regmap_read(ds1307->regmap, DS1340_REG_FLAG, &tmp);
1607 if (err) {
1608 dev_dbg(ds1307->dev, "read error %d\n", err);
Jingoo Hanedca66d2013-07-03 15:07:05 -07001609 goto exit;
frederic Rodofcd8db02008-02-06 01:38:55 -08001610 }
1611
1612 /* oscillator fault? clear flag, and warn */
1613 if (tmp & DS1340_BIT_OSF) {
Heiner Kallweit11e58902017-03-10 18:52:34 +01001614 regmap_write(ds1307->regmap, DS1340_REG_FLAG, 0);
1615 dev_warn(ds1307->dev, "SET TIME!\n");
frederic Rodofcd8db02008-02-06 01:38:55 -08001616 }
1617 break;
Tomas Novotnyf4199f82014-12-10 15:53:57 -08001618 case mcp794xx:
David Anders43fcb812011-11-02 13:37:53 -07001619 /* make sure that the backup battery is enabled */
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001620 if (!(regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) {
Heiner Kallweit11e58902017-03-10 18:52:34 +01001621 regmap_write(ds1307->regmap, DS1307_REG_WDAY,
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001622 regs[DS1307_REG_WDAY] |
Heiner Kallweit11e58902017-03-10 18:52:34 +01001623 MCP794XX_BIT_VBATEN);
David Anders43fcb812011-11-02 13:37:53 -07001624 }
1625
1626 /* clock halted? turn it on, so clock can tick. */
Tomas Novotnyf4199f82014-12-10 15:53:57 -08001627 if (!(tmp & MCP794XX_BIT_ST)) {
Heiner Kallweit11e58902017-03-10 18:52:34 +01001628 regmap_write(ds1307->regmap, DS1307_REG_SECS,
1629 MCP794XX_BIT_ST);
1630 dev_warn(ds1307->dev, "SET TIME!\n");
David Anders43fcb812011-11-02 13:37:53 -07001631 goto read_rtc;
1632 }
1633
1634 break;
Wolfram Sang32d322b2012-03-23 15:02:36 -07001635 default:
David Brownell045e0e82007-07-17 04:04:55 -07001636 break;
David Brownell1abb0dc2006-06-25 05:48:17 -07001637 }
David Brownell045e0e82007-07-17 04:04:55 -07001638
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001639 tmp = regs[DS1307_REG_HOUR];
David Brownellc065f352007-07-17 04:05:10 -07001640 switch (ds1307->type) {
1641 case ds_1340:
Stefan Agner8566f702017-03-23 16:54:57 -07001642 case m41t0:
David Brownellc065f352007-07-17 04:05:10 -07001643 case m41t00:
David Anders40ce9722012-03-23 15:02:37 -07001644 /*
1645 * NOTE: ignores century bits; fix before deploying
David Brownellc065f352007-07-17 04:05:10 -07001646 * systems that will run through year 2100.
1647 */
1648 break;
Matthias Fuchsa2166852009-03-31 15:24:58 -07001649 case rx_8025:
1650 break;
David Brownellc065f352007-07-17 04:05:10 -07001651 default:
1652 if (!(tmp & DS1307_BIT_12HR))
1653 break;
1654
David Anders40ce9722012-03-23 15:02:37 -07001655 /*
1656 * Be sure we're in 24 hour mode. Multi-master systems
David Brownellc065f352007-07-17 04:05:10 -07001657 * take note...
1658 */
Adrian Bunkfe20ba72008-10-18 20:28:41 -07001659 tmp = bcd2bin(tmp & 0x1f);
David Brownellc065f352007-07-17 04:05:10 -07001660 if (tmp == 12)
1661 tmp = 0;
Alexandre Belloni042fa8c2017-09-04 22:46:02 +02001662 if (regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
David Brownellc065f352007-07-17 04:05:10 -07001663 tmp += 12;
Heiner Kallweite5531702017-07-12 07:49:47 +02001664 regmap_write(ds1307->regmap, chip->offset + DS1307_REG_HOUR,
Heiner Kallweit11e58902017-03-10 18:52:34 +01001665 bin2bcd(tmp));
David Brownell1abb0dc2006-06-25 05:48:17 -07001666 }
1667
Heiner Kallweit82e2d432017-07-12 07:49:37 +02001668 if (want_irq || ds1307_can_wakeup_device) {
Heiner Kallweit11e58902017-03-10 18:52:34 +01001669 device_set_wakeup_capable(ds1307->dev, true);
Simon Guinot3abb1ad2015-11-26 15:37:13 +01001670 set_bit(HAS_ALARM, &ds1307->flags);
1671 }
Alexandre Belloni69b119a2017-07-06 11:42:06 +02001672
1673 ds1307->rtc = devm_rtc_allocate_device(ds1307->dev);
Alexandre Bellonie69c0562017-09-04 22:46:07 +02001674 if (IS_ERR(ds1307->rtc))
Alessandro Zummo4071ea22014-04-03 14:49:36 -07001675 return PTR_ERR(ds1307->rtc);
David Brownell1abb0dc2006-06-25 05:48:17 -07001676
Heiner Kallweit82e2d432017-07-12 07:49:37 +02001677 if (ds1307_can_wakeup_device && !want_irq) {
Heiner Kallweit11e58902017-03-10 18:52:34 +01001678 dev_info(ds1307->dev,
1679 "'wakeup-source' is set, request for an IRQ is disabled!\n");
Michael Lange8bc2a402016-01-21 18:10:16 +01001680 /* We cannot support UIE mode if we do not have an IRQ line */
1681 ds1307->rtc->uie_unsupported = 1;
1682 }
1683
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -07001684 if (want_irq) {
Heiner Kallweit45947122017-07-12 07:49:41 +02001685 err = devm_request_threaded_irq(ds1307->dev, client->irq, NULL,
1686 chip->irq_handler ?: ds1307_irq,
Nishanth Menonc5983192015-06-23 11:15:11 -05001687 IRQF_SHARED | IRQF_ONESHOT,
Alexandre Belloni4b9e2a02017-06-02 14:13:21 +02001688 ds1307->name, ds1307);
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -07001689 if (err) {
Alessandro Zummo4071ea22014-04-03 14:49:36 -07001690 client->irq = 0;
Heiner Kallweit11e58902017-03-10 18:52:34 +01001691 device_set_wakeup_capable(ds1307->dev, false);
Simon Guinot3abb1ad2015-11-26 15:37:13 +01001692 clear_bit(HAS_ALARM, &ds1307->flags);
Heiner Kallweit11e58902017-03-10 18:52:34 +01001693 dev_err(ds1307->dev, "unable to request IRQ!\n");
Alexandre Bellonie69c0562017-09-04 22:46:07 +02001694 } else {
Heiner Kallweit11e58902017-03-10 18:52:34 +01001695 dev_dbg(ds1307->dev, "got IRQ %d\n", client->irq);
Alexandre Bellonie69c0562017-09-04 22:46:07 +02001696 }
Rodolfo Giometticb49a5e2008-10-15 22:02:58 -07001697 }
1698
Austin Boyle9eab0a72012-03-23 15:02:38 -07001699 if (chip->nvram_size) {
Alexandre Belloniabc925f2017-07-06 11:42:07 +02001700 ds1307->nvmem_cfg.name = "ds1307_nvram";
1701 ds1307->nvmem_cfg.word_size = 1;
1702 ds1307->nvmem_cfg.stride = 1;
1703 ds1307->nvmem_cfg.size = chip->nvram_size;
1704 ds1307->nvmem_cfg.reg_read = ds1307_nvram_read;
1705 ds1307->nvmem_cfg.reg_write = ds1307_nvram_write;
1706 ds1307->nvmem_cfg.priv = ds1307;
Alessandro Zummo4071ea22014-04-03 14:49:36 -07001707
Alexandre Belloniabc925f2017-07-06 11:42:07 +02001708 ds1307->rtc->nvmem_config = &ds1307->nvmem_cfg;
1709 ds1307->rtc->nvram_old_abi = true;
David Brownell682d73f2007-11-14 16:58:32 -08001710 }
1711
Heiner Kallweit1efb98b2017-07-12 07:49:44 +02001712 ds1307->rtc->ops = chip->rtc_ops ?: &ds13xx_rtc_ops;
Alexandre Belloni69b119a2017-07-06 11:42:06 +02001713 err = rtc_register_device(ds1307->rtc);
1714 if (err)
1715 return err;
1716
Akinobu Mita445c0202016-01-25 00:22:16 +09001717 ds1307_hwmon_register(ds1307);
Akinobu Mita6c6ff142016-01-31 23:10:10 +09001718 ds1307_clks_register(ds1307);
Akinobu Mita445c0202016-01-25 00:22:16 +09001719
David Brownell1abb0dc2006-06-25 05:48:17 -07001720 return 0;
1721
Jingoo Hanedca66d2013-07-03 15:07:05 -07001722exit:
David Brownell1abb0dc2006-06-25 05:48:17 -07001723 return err;
1724}
1725
David Brownell1abb0dc2006-06-25 05:48:17 -07001726static struct i2c_driver ds1307_driver = {
1727 .driver = {
David Brownellc065f352007-07-17 04:05:10 -07001728 .name = "rtc-ds1307",
Javier Martinez Canillas7ef6d2c2017-03-03 11:29:15 -03001729 .of_match_table = of_match_ptr(ds1307_of_match),
Tin Huynh9c19b892016-11-30 09:57:31 +07001730 .acpi_match_table = ACPI_PTR(ds1307_acpi_ids),
David Brownell1abb0dc2006-06-25 05:48:17 -07001731 },
David Brownellc065f352007-07-17 04:05:10 -07001732 .probe = ds1307_probe,
Jean Delvare3760f732008-04-29 23:11:40 +02001733 .id_table = ds1307_id,
David Brownell1abb0dc2006-06-25 05:48:17 -07001734};
1735
Axel Lin0abc9202012-03-23 15:02:31 -07001736module_i2c_driver(ds1307_driver);
David Brownell1abb0dc2006-06-25 05:48:17 -07001737
1738MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
1739MODULE_LICENSE("GPL");