Thomas Gleixner | b886d83c | 2019-06-01 10:08:55 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 2 | /* |
| 3 | * CPPC (Collaborative Processor Performance Control) methods used |
| 4 | * by CPUfreq drivers. |
| 5 | * |
| 6 | * (C) Copyright 2014, 2015 Linaro Ltd. |
| 7 | * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org> |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef _CPPC_ACPI_H |
| 11 | #define _CPPC_ACPI_H |
| 12 | |
| 13 | #include <linux/acpi.h> |
Rafael J. Wysocki | 8a02d99 | 2021-03-16 16:54:03 +0100 | [diff] [blame] | 14 | #include <linux/cpufreq.h> |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 15 | #include <linux/types.h> |
| 16 | |
Hoan Tran | 866ae69 | 2016-06-16 14:09:38 -0700 | [diff] [blame] | 17 | #include <acpi/pcc.h> |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 18 | #include <acpi/processor.h> |
| 19 | |
Prashanth Prakash | 4773e77 | 2018-04-04 12:14:50 -0600 | [diff] [blame] | 20 | /* Support CPPCv2 and CPPCv3 */ |
| 21 | #define CPPC_V2_REV 2 |
| 22 | #define CPPC_V3_REV 3 |
| 23 | #define CPPC_V2_NUM_ENT 21 |
| 24 | #define CPPC_V3_NUM_ENT 23 |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 25 | |
Prakash, Prashanth | 139aee7 | 2016-08-16 14:39:44 -0600 | [diff] [blame] | 26 | #define PCC_CMD_COMPLETE_MASK (1 << 0) |
| 27 | #define PCC_ERROR_MASK (1 << 2) |
| 28 | |
Prashanth Prakash | 4773e77 | 2018-04-04 12:14:50 -0600 | [diff] [blame] | 29 | #define MAX_CPC_REG_ENT 21 |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 30 | |
| 31 | /* CPPC specific PCC commands. */ |
| 32 | #define CMD_READ 0 |
| 33 | #define CMD_WRITE 1 |
| 34 | |
| 35 | /* Each register has the folowing format. */ |
| 36 | struct cpc_reg { |
| 37 | u8 descriptor; |
| 38 | u16 length; |
| 39 | u8 space_id; |
| 40 | u8 bit_width; |
| 41 | u8 bit_offset; |
| 42 | u8 access_width; |
Ionela Voinescu | d8f85cc | 2021-01-07 11:17:15 +0000 | [diff] [blame] | 43 | u64 address; |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 44 | } __packed; |
| 45 | |
| 46 | /* |
| 47 | * Each entry in the CPC table is either |
| 48 | * of type ACPI_TYPE_BUFFER or |
| 49 | * ACPI_TYPE_INTEGER. |
| 50 | */ |
| 51 | struct cpc_register_resource { |
| 52 | acpi_object_type type; |
Ashwin Chaugule | 5bbb86a | 2016-08-16 14:39:38 -0600 | [diff] [blame] | 53 | u64 __iomem *sys_mem_vaddr; |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 54 | union { |
| 55 | struct cpc_reg reg; |
| 56 | u64 int_value; |
| 57 | } cpc_entry; |
| 58 | }; |
| 59 | |
| 60 | /* Container to hold the CPC details for each CPU */ |
| 61 | struct cpc_desc { |
| 62 | int num_entries; |
| 63 | int version; |
| 64 | int cpu_id; |
Prakash, Prashanth | 80b8286 | 2016-08-16 14:39:40 -0600 | [diff] [blame] | 65 | int write_cmd_status; |
| 66 | int write_cmd_id; |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 67 | struct cpc_register_resource cpc_regs[MAX_CPC_REG_ENT]; |
| 68 | struct acpi_psd_package domain_info; |
Ashwin Chaugule | 158c998 | 2016-08-16 14:39:42 -0600 | [diff] [blame] | 69 | struct kobject kobj; |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 70 | }; |
| 71 | |
| 72 | /* These are indexes into the per-cpu cpc_regs[]. Order is important. */ |
| 73 | enum cppc_regs { |
| 74 | HIGHEST_PERF, |
| 75 | NOMINAL_PERF, |
| 76 | LOW_NON_LINEAR_PERF, |
| 77 | LOWEST_PERF, |
| 78 | GUARANTEED_PERF, |
| 79 | DESIRED_PERF, |
| 80 | MIN_PERF, |
| 81 | MAX_PERF, |
| 82 | PERF_REDUC_TOLERANCE, |
| 83 | TIME_WINDOW, |
| 84 | CTR_WRAP_TIME, |
| 85 | REFERENCE_CTR, |
| 86 | DELIVERED_CTR, |
| 87 | PERF_LIMITED, |
| 88 | ENABLE, |
| 89 | AUTO_SEL_ENABLE, |
| 90 | AUTO_ACT_WINDOW, |
| 91 | ENERGY_PERF, |
| 92 | REFERENCE_PERF, |
Prashanth Prakash | 4773e77 | 2018-04-04 12:14:50 -0600 | [diff] [blame] | 93 | LOWEST_FREQ, |
| 94 | NOMINAL_FREQ, |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 95 | }; |
| 96 | |
| 97 | /* |
| 98 | * Categorization of registers as described |
| 99 | * in the ACPI v.5.1 spec. |
| 100 | * XXX: Only filling up ones which are used by governors |
| 101 | * today. |
| 102 | */ |
| 103 | struct cppc_perf_caps { |
Srinivas Pandruvada | 29523f0 | 2018-10-15 10:37:19 -0700 | [diff] [blame] | 104 | u32 guaranteed_perf; |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 105 | u32 highest_perf; |
| 106 | u32 nominal_perf; |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 107 | u32 lowest_perf; |
Prakash, Prashanth | 368520a | 2017-03-29 13:49:59 -0600 | [diff] [blame] | 108 | u32 lowest_nonlinear_perf; |
Prashanth Prakash | 4773e77 | 2018-04-04 12:14:50 -0600 | [diff] [blame] | 109 | u32 lowest_freq; |
| 110 | u32 nominal_freq; |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 111 | }; |
| 112 | |
| 113 | struct cppc_perf_ctrls { |
| 114 | u32 max_perf; |
| 115 | u32 min_perf; |
| 116 | u32 desired_perf; |
| 117 | }; |
| 118 | |
| 119 | struct cppc_perf_fb_ctrs { |
| 120 | u64 reference; |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 121 | u64 delivered; |
Ashwin Chaugule | 158c998 | 2016-08-16 14:39:42 -0600 | [diff] [blame] | 122 | u64 reference_perf; |
Prakash, Prashanth | 2c74d84 | 2017-03-29 13:50:00 -0600 | [diff] [blame] | 123 | u64 wraparound_time; |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 124 | }; |
| 125 | |
| 126 | /* Per CPU container for runtime CPPC management. */ |
Srinivas Pandruvada | 41dd640 | 2016-09-01 13:37:11 -0700 | [diff] [blame] | 127 | struct cppc_cpudata { |
Ionela Voinescu | a28b2bf | 2020-12-14 12:38:23 +0000 | [diff] [blame] | 128 | struct list_head node; |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 129 | struct cppc_perf_caps perf_caps; |
| 130 | struct cppc_perf_ctrls perf_ctrls; |
| 131 | struct cppc_perf_fb_ctrs perf_fb_ctrs; |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 132 | unsigned int shared_type; |
| 133 | cpumask_var_t shared_cpu_map; |
| 134 | }; |
| 135 | |
Rafael J. Wysocki | 8a02d99 | 2021-03-16 16:54:03 +0100 | [diff] [blame] | 136 | #ifdef CONFIG_ACPI_CPPC_LIB |
Xiongfeng Wang | 1757d05 | 2019-02-17 11:54:14 +0800 | [diff] [blame] | 137 | extern int cppc_get_desired_perf(int cpunum, u64 *desired_perf); |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 138 | extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs); |
| 139 | extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls); |
| 140 | extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps); |
Ionela Voinescu | a28b2bf | 2020-12-14 12:38:23 +0000 | [diff] [blame] | 141 | extern bool acpi_cpc_valid(void); |
| 142 | extern int acpi_get_psd_map(unsigned int cpu, struct cppc_cpudata *cpu_data); |
Prakash, Prashanth | be8b88d | 2016-08-16 14:39:41 -0600 | [diff] [blame] | 143 | extern unsigned int cppc_get_transition_latency(int cpu); |
Borislav Petkov | ad3bc25 | 2018-12-05 00:34:56 +0100 | [diff] [blame] | 144 | extern bool cpc_ffh_supported(void); |
| 145 | extern int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val); |
| 146 | extern int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val); |
Rafael J. Wysocki | 8a02d99 | 2021-03-16 16:54:03 +0100 | [diff] [blame] | 147 | #else /* !CONFIG_ACPI_CPPC_LIB */ |
| 148 | static inline int cppc_get_desired_perf(int cpunum, u64 *desired_perf) |
| 149 | { |
| 150 | return -ENOTSUPP; |
| 151 | } |
| 152 | static inline int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs) |
| 153 | { |
| 154 | return -ENOTSUPP; |
| 155 | } |
| 156 | static inline int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls) |
| 157 | { |
| 158 | return -ENOTSUPP; |
| 159 | } |
| 160 | static inline int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps) |
| 161 | { |
| 162 | return -ENOTSUPP; |
| 163 | } |
| 164 | static inline bool acpi_cpc_valid(void) |
| 165 | { |
| 166 | return false; |
| 167 | } |
| 168 | static inline unsigned int cppc_get_transition_latency(int cpu) |
| 169 | { |
| 170 | return CPUFREQ_ETERNAL; |
| 171 | } |
| 172 | static inline bool cpc_ffh_supported(void) |
| 173 | { |
| 174 | return false; |
| 175 | } |
| 176 | static inline int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val) |
| 177 | { |
| 178 | return -ENOTSUPP; |
| 179 | } |
| 180 | static inline int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val) |
| 181 | { |
| 182 | return -ENOTSUPP; |
| 183 | } |
| 184 | #endif /* !CONFIG_ACPI_CPPC_LIB */ |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 185 | |
Ashwin Chaugule | 337aadf | 2015-10-02 10:01:19 -0400 | [diff] [blame] | 186 | #endif /* _CPPC_ACPI_H*/ |