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Tim Harveye3946fe2014-02-07 15:24:56 +08001/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
Tim Harvey326cdb12014-09-08 23:07:28 -070012#include <dt-bindings/gpio/gpio.h>
13
Tim Harveye3946fe2014-02-07 15:24:56 +080014/ {
15 /* these are used by bootloader for disabling nodes */
16 aliases {
Tim Harveye3946fe2014-02-07 15:24:56 +080017 ethernet1 = &eth1;
18 led0 = &led0;
19 led1 = &led1;
20 led2 = &led2;
21 nand = &gpmi;
Tim Harveye3946fe2014-02-07 15:24:56 +080022 ssi0 = &ssi1;
23 usb0 = &usbh1;
24 usb1 = &usbotg;
Tim Harveye3946fe2014-02-07 15:24:56 +080025 };
26
27 chosen {
28 bootargs = "console=ttymxc1,115200";
29 };
30
Tim Harveyb3253242014-04-30 23:32:30 -070031 backlight {
32 compatible = "pwm-backlight";
33 pwms = <&pwm4 0 5000000>;
34 brightness-levels = <0 4 8 16 32 64 128 255>;
35 default-brightness-level = <7>;
36 };
37
Tim Harveye3946fe2014-02-07 15:24:56 +080038 leds {
39 compatible = "gpio-leds";
40
41 led0: user1 {
42 label = "user1";
Tim Harvey326cdb12014-09-08 23:07:28 -070043 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
Tim Harveye3946fe2014-02-07 15:24:56 +080044 default-state = "on";
45 linux,default-trigger = "heartbeat";
46 };
47
48 led1: user2 {
49 label = "user2";
Tim Harvey326cdb12014-09-08 23:07:28 -070050 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
Tim Harveye3946fe2014-02-07 15:24:56 +080051 default-state = "off";
52 };
53
54 led2: user3 {
55 label = "user3";
Tim Harvey326cdb12014-09-08 23:07:28 -070056 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
Tim Harveye3946fe2014-02-07 15:24:56 +080057 default-state = "off";
58 };
59 };
60
61 memory {
62 reg = <0x10000000 0x40000000>;
63 };
64
65 pps {
66 compatible = "pps-gpio";
Tim Harvey326cdb12014-09-08 23:07:28 -070067 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
Tim Harveye3946fe2014-02-07 15:24:56 +080068 status = "okay";
69 };
70
71 regulators {
72 compatible = "simple-bus";
73 #address-cells = <1>;
74 #size-cells = <0>;
75
76 reg_1p0v: regulator@0 {
77 compatible = "regulator-fixed";
78 reg = <0>;
79 regulator-name = "1P0V";
80 regulator-min-microvolt = <1000000>;
81 regulator-max-microvolt = <1000000>;
82 regulator-always-on;
83 };
84
85 /* remove when pmic 1p8 regulator available */
86 reg_1p8v: regulator@1 {
87 compatible = "regulator-fixed";
88 reg = <1>;
89 regulator-name = "1P8V";
90 regulator-min-microvolt = <1800000>;
91 regulator-max-microvolt = <1800000>;
92 regulator-always-on;
93 };
94
95 reg_3p3v: regulator@2 {
96 compatible = "regulator-fixed";
97 reg = <2>;
98 regulator-name = "3P3V";
99 regulator-min-microvolt = <3300000>;
100 regulator-max-microvolt = <3300000>;
101 regulator-always-on;
102 };
103
104 reg_usb_h1_vbus: regulator@3 {
105 compatible = "regulator-fixed";
106 reg = <3>;
107 regulator-name = "usb_h1_vbus";
108 regulator-min-microvolt = <5000000>;
109 regulator-max-microvolt = <5000000>;
110 regulator-always-on;
111 };
112
113 reg_usb_otg_vbus: regulator@4 {
114 compatible = "regulator-fixed";
115 reg = <4>;
116 regulator-name = "usb_otg_vbus";
117 regulator-min-microvolt = <5000000>;
118 regulator-max-microvolt = <5000000>;
Tim Harvey326cdb12014-09-08 23:07:28 -0700119 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
Tim Harveye3946fe2014-02-07 15:24:56 +0800120 enable-active-high;
121 };
122 };
123
124 sound {
Tim Harveyb12d1e92014-05-21 23:04:54 -0700125 compatible = "fsl,imx6q-ventana-sgtl5000",
Tim Harveye3946fe2014-02-07 15:24:56 +0800126 "fsl,imx-audio-sgtl5000";
Tim Harveyb12d1e92014-05-21 23:04:54 -0700127 model = "sgtl5000-audio";
Tim Harveye3946fe2014-02-07 15:24:56 +0800128 ssi-controller = <&ssi1>;
129 audio-codec = <&codec>;
130 audio-routing =
131 "MIC_IN", "Mic Jack",
132 "Mic Jack", "Mic Bias",
133 "Headphone Jack", "HP_OUT";
134 mux-int-port = <1>;
135 mux-ext-port = <4>;
136 };
137};
138
139&audmux {
140 pinctrl-names = "default";
141 pinctrl-0 = <&pinctrl_audmux>;
142 status = "okay";
143};
144
145&can1 {
146 pinctrl-names = "default";
147 pinctrl-0 = <&pinctrl_flexcan1>;
148 status = "okay";
149};
150
151&fec {
152 pinctrl-names = "default";
153 pinctrl-0 = <&pinctrl_enet>;
154 phy-mode = "rgmii";
Tim Harvey326cdb12014-09-08 23:07:28 -0700155 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
Tim Harveye3946fe2014-02-07 15:24:56 +0800156 status = "okay";
157};
158
159&gpmi {
160 pinctrl-names = "default";
161 pinctrl-0 = <&pinctrl_gpmi_nand>;
162 status = "okay";
163};
164
Tim Harveyaef15db2014-04-23 00:47:51 -0700165&hdmi {
166 ddc-i2c-bus = <&i2c3>;
167 status = "okay";
168};
169
Tim Harveye3946fe2014-02-07 15:24:56 +0800170&i2c1 {
171 clock-frequency = <100000>;
172 pinctrl-names = "default";
173 pinctrl-0 = <&pinctrl_i2c1>;
174 status = "okay";
175
176 eeprom1: eeprom@50 {
177 compatible = "atmel,24c02";
178 reg = <0x50>;
179 pagesize = <16>;
180 };
181
182 eeprom2: eeprom@51 {
183 compatible = "atmel,24c02";
184 reg = <0x51>;
185 pagesize = <16>;
186 };
187
188 eeprom3: eeprom@52 {
189 compatible = "atmel,24c02";
190 reg = <0x52>;
191 pagesize = <16>;
192 };
193
194 eeprom4: eeprom@53 {
195 compatible = "atmel,24c02";
196 reg = <0x53>;
197 pagesize = <16>;
198 };
199
200 gpio: pca9555@23 {
201 compatible = "nxp,pca9555";
202 reg = <0x23>;
203 gpio-controller;
204 #gpio-cells = <2>;
205 };
206
Tim Harveye3946fe2014-02-07 15:24:56 +0800207 rtc: ds1672@68 {
208 compatible = "dallas,ds1672";
209 reg = <0x68>;
210 };
211};
212
213&i2c2 {
214 clock-frequency = <100000>;
215 pinctrl-names = "default";
216 pinctrl-0 = <&pinctrl_i2c2>;
217 status = "okay";
Tim Harveye3946fe2014-02-07 15:24:56 +0800218};
219
220&i2c3 {
221 clock-frequency = <100000>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&pinctrl_i2c3>;
224 status = "okay";
225
Tim Harveye3946fe2014-02-07 15:24:56 +0800226 codec: sgtl5000@0a {
227 compatible = "fsl,sgtl5000";
228 reg = <0x0a>;
229 clocks = <&clks 201>;
230 VDDA-supply = <&reg_1p8v>;
231 VDDIO-supply = <&reg_3p3v>;
232 };
233
Tim Harveye3946fe2014-02-07 15:24:56 +0800234 touchscreen: egalax_ts@04 {
235 compatible = "eeti,egalax_ts";
236 reg = <0x04>;
237 interrupt-parent = <&gpio1>;
Tim Harvey326cdb12014-09-08 23:07:28 -0700238 interrupts = <11 2>;
239 wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
Tim Harveye3946fe2014-02-07 15:24:56 +0800240 };
Tim Harveye3946fe2014-02-07 15:24:56 +0800241};
242
243&iomuxc {
244 pinctrl-names = "default";
245 pinctrl-0 = <&pinctrl_hog>;
246
247 imx6qdl-gw53xx {
248 pinctrl_hog: hoggrp {
249 fsl,pins = <
250 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* PCIE6EXP_DIO0 */
251 MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* PCIE6EXP_DIO1 */
252 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
253 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_SHDN */
254 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
255 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
256 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
257 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
258 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */
259 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x80000000 /* PMIC_IRQ# */
260 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* HUB_RST# */
261 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* PCIE_WDIS# */
262 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 /* ACCEL_IRQ# */
263 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
264 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x80000000 /* USBOTG_OC# */
265 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
266 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
267 MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* TOUCH_IRQ# */
268 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_DET# */
269 >;
270 };
271
272 pinctrl_audmux: audmuxgrp {
273 fsl,pins = <
274 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
275 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
276 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
277 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
278 >;
279 };
280
281 pinctrl_enet: enetgrp {
282 fsl,pins = <
283 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
284 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
285 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
286 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
287 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
288 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
289 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
290 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
291 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
292 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
293 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
294 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
295 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
296 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
297 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
298 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
299 >;
300 };
301
302 pinctrl_flexcan1: flexcan1grp {
303 fsl,pins = <
304 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
305 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000
306 >;
307 };
308
309 pinctrl_gpmi_nand: gpminandgrp {
310 fsl,pins = <
311 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
312 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
313 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
314 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
315 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
316 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
317 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
318 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
319 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
320 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
321 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
322 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
323 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
324 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
325 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
326 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
327 >;
328 };
329
330 pinctrl_i2c1: i2c1grp {
331 fsl,pins = <
332 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
333 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
334 >;
335 };
336
337 pinctrl_i2c2: i2c2grp {
338 fsl,pins = <
339 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
340 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
341 >;
342 };
343
344 pinctrl_i2c3: i2c3grp {
345 fsl,pins = <
346 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
347 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
348 >;
349 };
350
Tim Harveyb3253242014-04-30 23:32:30 -0700351 pinctrl_pwm4: pwm4grp {
352 fsl,pins = <
353 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
354 >;
355 };
356
Tim Harveye3946fe2014-02-07 15:24:56 +0800357 pinctrl_uart1: uart1grp {
358 fsl,pins = <
359 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
360 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
361 >;
362 };
363
364 pinctrl_uart2: uart2grp {
365 fsl,pins = <
366 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
367 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
368 >;
369 };
370
371 pinctrl_uart5: uart5grp {
372 fsl,pins = <
373 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
374 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
375 >;
376 };
377
378 pinctrl_usbotg: usbotggrp {
379 fsl,pins = <
380 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
381 >;
382 };
383
384 pinctrl_usdhc3: usdhc3grp {
385 fsl,pins = <
386 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
387 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
388 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
389 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
390 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
391 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
392 >;
393 };
394 };
395};
396
397&ldb {
398 status = "okay";
399
400 lvds-channel@1 {
401 fsl,data-mapping = "spwg";
402 fsl,data-width = <18>;
403 status = "okay";
404
405 display-timings {
406 native-mode = <&timing0>;
407 timing0: hsd100pxn1 {
408 clock-frequency = <65000000>;
409 hactive = <1024>;
410 vactive = <768>;
411 hback-porch = <220>;
412 hfront-porch = <40>;
413 vback-porch = <21>;
414 vfront-porch = <7>;
415 hsync-len = <60>;
416 vsync-len = <10>;
417 };
418 };
419 };
420};
421
422&pcie {
Tim Harvey326cdb12014-09-08 23:07:28 -0700423 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
Tim Harveye3946fe2014-02-07 15:24:56 +0800424 status = "okay";
425
426 eth1: sky2@8 { /* MAC/PHY on bus 8 */
427 compatible = "marvell,sky2";
428 };
429};
430
Tim Harveyb3253242014-04-30 23:32:30 -0700431&pwm4 {
432 pinctrl-names = "default";
433 pinctrl-0 = <&pinctrl_pwm4>;
434 status = "okay";
435};
436
Tim Harveye3946fe2014-02-07 15:24:56 +0800437&ssi1 {
Tim Harveye3946fe2014-02-07 15:24:56 +0800438 status = "okay";
439};
440
441&uart1 {
442 pinctrl-names = "default";
443 pinctrl-0 = <&pinctrl_uart1>;
444 status = "okay";
445};
446
447&uart2 {
448 pinctrl-names = "default";
449 pinctrl-0 = <&pinctrl_uart2>;
450 status = "okay";
451};
452
453&uart5 {
454 pinctrl-names = "default";
455 pinctrl-0 = <&pinctrl_uart5>;
456 status = "okay";
457};
458
459&usbotg {
460 vbus-supply = <&reg_usb_otg_vbus>;
461 pinctrl-names = "default";
462 pinctrl-0 = <&pinctrl_usbotg>;
463 disable-over-current;
464 status = "okay";
465};
466
467&usbh1 {
468 vbus-supply = <&reg_usb_h1_vbus>;
469 status = "okay";
470};
471
472&usdhc3 {
473 pinctrl-names = "default";
474 pinctrl-0 = <&pinctrl_usdhc3>;
Tim Harvey326cdb12014-09-08 23:07:28 -0700475 cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
Tim Harveye3946fe2014-02-07 15:24:56 +0800476 vmmc-supply = <&reg_3p3v>;
477 status = "okay";
478};