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Greg Kroah-Hartman5fd54ac2017-11-03 11:28:30 +01001// SPDX-License-Identifier: GPL-2.0
Felipe Balbi550a7372008-07-24 12:27:36 +03002/*
3 * MUSB OTG driver DMA controller abstraction
4 *
5 * Copyright 2005 Mentor Graphics Corporation
6 * Copyright (C) 2005-2006 by Texas Instruments
7 * Copyright (C) 2006-2007 Nokia Corporation
Felipe Balbi550a7372008-07-24 12:27:36 +03008 */
9
10#ifndef __MUSB_DMA_H__
11#define __MUSB_DMA_H__
12
13struct musb_hw_ep;
14
15/*
16 * DMA Controller Abstraction
17 *
18 * DMA Controllers are abstracted to allow use of a variety of different
19 * implementations of DMA, as allowed by the Inventra USB cores. On the
20 * host side, usbcore sets up the DMA mappings and flushes caches; on the
21 * peripheral side, the gadget controller driver does. Responsibilities
22 * of a DMA controller driver include:
23 *
24 * - Handling the details of moving multiple USB packets
25 * in cooperation with the Inventra USB core, including especially
26 * the correct RX side treatment of short packets and buffer-full
27 * states (both of which terminate transfers).
28 *
29 * - Knowing the correlation between dma channels and the
30 * Inventra core's local endpoint resources and data direction.
31 *
32 * - Maintaining a list of allocated/available channels.
33 *
34 * - Updating channel status on interrupts,
35 * whether shared with the Inventra core or separate.
36 */
37
38#define DMA_ADDR_INVALID (~(dma_addr_t)0)
39
Sebastian Andrzej Siewior260eba32013-06-19 17:38:09 +020040#ifdef CONFIG_MUSB_PIO_ONLY
Felipe Balbi550a7372008-07-24 12:27:36 +030041#define is_dma_capable() (0)
Sebastian Andrzej Siewior260eba32013-06-19 17:38:09 +020042#else
43#define is_dma_capable() (1)
Felipe Balbi550a7372008-07-24 12:27:36 +030044#endif
45
Tony Lindgrenf8e9f34f2015-05-01 12:29:27 -070046#ifdef CONFIG_USB_UX500_DMA
Bin Liudc8fca62018-05-21 08:42:13 -050047#define musb_dma_ux500(musb) (musb->ops->quirks & MUSB_DMA_UX500)
Felipe Balbi550a7372008-07-24 12:27:36 +030048#else
Tony Lindgrenf8e9f34f2015-05-01 12:29:27 -070049#define musb_dma_ux500(musb) 0
50#endif
51
52#ifdef CONFIG_USB_TI_CPPI41_DMA
Bin Liudc8fca62018-05-21 08:42:13 -050053#define musb_dma_cppi41(musb) (musb->ops->quirks & MUSB_DMA_CPPI41)
Tony Lindgrenf8e9f34f2015-05-01 12:29:27 -070054#else
55#define musb_dma_cppi41(musb) 0
56#endif
57
58#ifdef CONFIG_USB_TI_CPPI_DMA
Bin Liudc8fca62018-05-21 08:42:13 -050059#define musb_dma_cppi(musb) (musb->ops->quirks & MUSB_DMA_CPPI)
Tony Lindgrenf8e9f34f2015-05-01 12:29:27 -070060#else
61#define musb_dma_cppi(musb) 0
Felipe Balbi550a7372008-07-24 12:27:36 +030062#endif
63
64#ifdef CONFIG_USB_TUSB_OMAP_DMA
Bin Liudc8fca62018-05-21 08:42:13 -050065#define tusb_dma_omap(musb) (musb->ops->quirks & MUSB_DMA_TUSB_OMAP)
Felipe Balbi550a7372008-07-24 12:27:36 +030066#else
Tony Lindgrenf8e9f34f2015-05-01 12:29:27 -070067#define tusb_dma_omap(musb) 0
68#endif
69
70#ifdef CONFIG_USB_INVENTRA_DMA
Bin Liudc8fca62018-05-21 08:42:13 -050071#define musb_dma_inventra(musb) (musb->ops->quirks & MUSB_DMA_INVENTRA)
Tony Lindgrenf8e9f34f2015-05-01 12:29:27 -070072#else
73#define musb_dma_inventra(musb) 0
74#endif
75
76#if defined(CONFIG_USB_TI_CPPI_DMA) || defined(CONFIG_USB_TI_CPPI41_DMA)
77#define is_cppi_enabled(musb) \
78 (musb_dma_cppi(musb) || musb_dma_cppi41(musb))
79#else
80#define is_cppi_enabled(musb) 0
Felipe Balbi550a7372008-07-24 12:27:36 +030081#endif
82
Felipe Balbi550a7372008-07-24 12:27:36 +030083/*
84 * DMA channel status ... updated by the dma controller driver whenever that
85 * status changes, and protected by the overall controller spinlock.
86 */
87enum dma_channel_status {
88 /* unallocated */
89 MUSB_DMA_STATUS_UNKNOWN,
90 /* allocated ... but not busy, no errors */
91 MUSB_DMA_STATUS_FREE,
92 /* busy ... transactions are active */
93 MUSB_DMA_STATUS_BUSY,
94 /* transaction(s) aborted due to ... dma or memory bus error */
95 MUSB_DMA_STATUS_BUS_ABORT,
96 /* transaction(s) aborted due to ... core error or USB fault */
97 MUSB_DMA_STATUS_CORE_ABORT
98};
99
100struct dma_controller;
101
102/**
103 * struct dma_channel - A DMA channel.
104 * @private_data: channel-private data
105 * @max_len: the maximum number of bytes the channel can move in one
106 * transaction (typically representing many USB maximum-sized packets)
107 * @actual_len: how many bytes have been transferred
108 * @status: current channel status (updated e.g. on interrupt)
109 * @desired_mode: true if mode 1 is desired; false if mode 0 is desired
110 *
111 * channels are associated with an endpoint for the duration of at least
112 * one usb transfer.
113 */
114struct dma_channel {
115 void *private_data;
116 /* FIXME not void* private_data, but a dma_controller * */
117 size_t max_len;
118 size_t actual_len;
119 enum dma_channel_status status;
120 bool desired_mode;
Daniel Mackff3fcac2014-05-26 14:52:38 +0200121 bool rx_packet_done;
Felipe Balbi550a7372008-07-24 12:27:36 +0300122};
123
124/*
125 * dma_channel_status - return status of dma channel
126 * @c: the channel
127 *
128 * Returns the software's view of the channel status. If that status is BUSY
129 * then it's possible that the hardware has completed (or aborted) a transfer,
130 * so the driver needs to update that status.
131 */
132static inline enum dma_channel_status
133dma_channel_status(struct dma_channel *c)
134{
135 return (is_dma_capable() && c) ? c->status : MUSB_DMA_STATUS_UNKNOWN;
136}
137
138/**
139 * struct dma_controller - A DMA Controller.
Alexandre Bailon050dc902017-02-06 22:53:51 -0600140 * @musb: the usb controller
Felipe Balbi550a7372008-07-24 12:27:36 +0300141 * @start: call this to start a DMA controller;
142 * return 0 on success, else negative errno
143 * @stop: call this to stop a DMA controller
144 * return 0 on success, else negative errno
145 * @channel_alloc: call this to allocate a DMA channel
146 * @channel_release: call this to release a DMA channel
147 * @channel_abort: call this to abort a pending DMA transaction,
148 * returning it to FREE (but allocated) state
Alexandre Bailon050dc902017-02-06 22:53:51 -0600149 * @dma_callback: invoked on DMA completion, useful to run platform
150 * code such IRQ acknowledgment.
Felipe Balbi550a7372008-07-24 12:27:36 +0300151 *
152 * Controllers manage dma channels.
153 */
154struct dma_controller {
Alexandre Bailon050dc902017-02-06 22:53:51 -0600155 struct musb *musb;
Felipe Balbi550a7372008-07-24 12:27:36 +0300156 struct dma_channel *(*channel_alloc)(struct dma_controller *,
157 struct musb_hw_ep *, u8 is_tx);
158 void (*channel_release)(struct dma_channel *);
159 int (*channel_program)(struct dma_channel *channel,
160 u16 maxpacket, u8 mode,
161 dma_addr_t dma_addr,
162 u32 length);
163 int (*channel_abort)(struct dma_channel *);
Mian Yousaf Kaukab5f5761c2011-01-04 12:47:03 +0100164 int (*is_compatible)(struct dma_channel *channel,
165 u16 maxpacket,
166 void *buf, u32 length);
Alexandre Bailon050dc902017-02-06 22:53:51 -0600167 void (*dma_callback)(struct dma_controller *);
Felipe Balbi550a7372008-07-24 12:27:36 +0300168};
169
170/* called after channel_program(), may indicate a fault */
171extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit);
172
Sebastian Andrzej Siewiora6a20882013-06-19 17:38:12 +0200173#ifdef CONFIG_MUSB_PIO_ONLY
Tony Lindgren7f6283e2015-05-01 12:29:28 -0700174static inline struct dma_controller *
175musb_dma_controller_create(struct musb *m, void __iomem *io)
Sebastian Andrzej Siewiora6a20882013-06-19 17:38:12 +0200176{
177 return NULL;
178}
179
Tony Lindgren7f6283e2015-05-01 12:29:28 -0700180static inline void musb_dma_controller_destroy(struct dma_controller *d) { }
Sebastian Andrzej Siewiora6a20882013-06-19 17:38:12 +0200181
182#else
Felipe Balbi550a7372008-07-24 12:27:36 +0300183
Tony Lindgren7f6283e2015-05-01 12:29:28 -0700184extern struct dma_controller *
185(*musb_dma_controller_create)(struct musb *, void __iomem *);
Felipe Balbi550a7372008-07-24 12:27:36 +0300186
Tony Lindgren7f6283e2015-05-01 12:29:28 -0700187extern void (*musb_dma_controller_destroy)(struct dma_controller *);
Sebastian Andrzej Siewiora6a20882013-06-19 17:38:12 +0200188#endif
Felipe Balbi550a7372008-07-24 12:27:36 +0300189
Tony Lindgren7f6283e2015-05-01 12:29:28 -0700190/* Platform specific DMA functions */
191extern struct dma_controller *
192musbhs_dma_controller_create(struct musb *musb, void __iomem *base);
193extern void musbhs_dma_controller_destroy(struct dma_controller *c);
194
195extern struct dma_controller *
196tusb_dma_controller_create(struct musb *musb, void __iomem *base);
197extern void tusb_dma_controller_destroy(struct dma_controller *c);
198
199extern struct dma_controller *
200cppi_dma_controller_create(struct musb *musb, void __iomem *base);
201extern void cppi_dma_controller_destroy(struct dma_controller *c);
202
203extern struct dma_controller *
204cppi41_dma_controller_create(struct musb *musb, void __iomem *base);
205extern void cppi41_dma_controller_destroy(struct dma_controller *c);
206
207extern struct dma_controller *
208ux500_dma_controller_create(struct musb *musb, void __iomem *base);
209extern void ux500_dma_controller_destroy(struct dma_controller *c);
210
Felipe Balbi550a7372008-07-24 12:27:36 +0300211#endif /* __MUSB_DMA_H__ */