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Greg Kroah-Hartman5fd54ac2017-11-03 11:28:30 +01001// SPDX-License-Identifier: GPL-2.0
Felipe Balbi550a7372008-07-24 12:27:36 +03002/*
3 * MUSB OTG driver DMA controller abstraction
4 *
5 * Copyright 2005 Mentor Graphics Corporation
6 * Copyright (C) 2005-2006 by Texas Instruments
7 * Copyright (C) 2006-2007 Nokia Corporation
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
26 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
29 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
30 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 */
35
36#ifndef __MUSB_DMA_H__
37#define __MUSB_DMA_H__
38
39struct musb_hw_ep;
40
41/*
42 * DMA Controller Abstraction
43 *
44 * DMA Controllers are abstracted to allow use of a variety of different
45 * implementations of DMA, as allowed by the Inventra USB cores. On the
46 * host side, usbcore sets up the DMA mappings and flushes caches; on the
47 * peripheral side, the gadget controller driver does. Responsibilities
48 * of a DMA controller driver include:
49 *
50 * - Handling the details of moving multiple USB packets
51 * in cooperation with the Inventra USB core, including especially
52 * the correct RX side treatment of short packets and buffer-full
53 * states (both of which terminate transfers).
54 *
55 * - Knowing the correlation between dma channels and the
56 * Inventra core's local endpoint resources and data direction.
57 *
58 * - Maintaining a list of allocated/available channels.
59 *
60 * - Updating channel status on interrupts,
61 * whether shared with the Inventra core or separate.
62 */
63
64#define DMA_ADDR_INVALID (~(dma_addr_t)0)
65
Sebastian Andrzej Siewior260eba32013-06-19 17:38:09 +020066#ifdef CONFIG_MUSB_PIO_ONLY
Felipe Balbi550a7372008-07-24 12:27:36 +030067#define is_dma_capable() (0)
Sebastian Andrzej Siewior260eba32013-06-19 17:38:09 +020068#else
69#define is_dma_capable() (1)
Felipe Balbi550a7372008-07-24 12:27:36 +030070#endif
71
Tony Lindgrenf8e9f34f2015-05-01 12:29:27 -070072#ifdef CONFIG_USB_UX500_DMA
73#define musb_dma_ux500(musb) (musb->io.quirks & MUSB_DMA_UX500)
Felipe Balbi550a7372008-07-24 12:27:36 +030074#else
Tony Lindgrenf8e9f34f2015-05-01 12:29:27 -070075#define musb_dma_ux500(musb) 0
76#endif
77
78#ifdef CONFIG_USB_TI_CPPI41_DMA
79#define musb_dma_cppi41(musb) (musb->io.quirks & MUSB_DMA_CPPI41)
80#else
81#define musb_dma_cppi41(musb) 0
82#endif
83
84#ifdef CONFIG_USB_TI_CPPI_DMA
85#define musb_dma_cppi(musb) (musb->io.quirks & MUSB_DMA_CPPI)
86#else
87#define musb_dma_cppi(musb) 0
Felipe Balbi550a7372008-07-24 12:27:36 +030088#endif
89
90#ifdef CONFIG_USB_TUSB_OMAP_DMA
Tony Lindgrenf8e9f34f2015-05-01 12:29:27 -070091#define tusb_dma_omap(musb) (musb->io.quirks & MUSB_DMA_TUSB_OMAP)
Felipe Balbi550a7372008-07-24 12:27:36 +030092#else
Tony Lindgrenf8e9f34f2015-05-01 12:29:27 -070093#define tusb_dma_omap(musb) 0
94#endif
95
96#ifdef CONFIG_USB_INVENTRA_DMA
97#define musb_dma_inventra(musb) (musb->io.quirks & MUSB_DMA_INVENTRA)
98#else
99#define musb_dma_inventra(musb) 0
100#endif
101
102#if defined(CONFIG_USB_TI_CPPI_DMA) || defined(CONFIG_USB_TI_CPPI41_DMA)
103#define is_cppi_enabled(musb) \
104 (musb_dma_cppi(musb) || musb_dma_cppi41(musb))
105#else
106#define is_cppi_enabled(musb) 0
Felipe Balbi550a7372008-07-24 12:27:36 +0300107#endif
108
Sonic Zhang9720fae2009-11-16 16:19:24 +0530109/* Anomaly 05000456 - USB Receive Interrupt Is Not Generated in DMA Mode 1
110 * Only allow DMA mode 1 to be used when the USB will actually generate the
111 * interrupts we expect.
112 */
113#ifdef CONFIG_BLACKFIN
114# undef USE_MODE1
115# if !ANOMALY_05000456
116# define USE_MODE1
117# endif
118#endif
119
Felipe Balbi550a7372008-07-24 12:27:36 +0300120/*
121 * DMA channel status ... updated by the dma controller driver whenever that
122 * status changes, and protected by the overall controller spinlock.
123 */
124enum dma_channel_status {
125 /* unallocated */
126 MUSB_DMA_STATUS_UNKNOWN,
127 /* allocated ... but not busy, no errors */
128 MUSB_DMA_STATUS_FREE,
129 /* busy ... transactions are active */
130 MUSB_DMA_STATUS_BUSY,
131 /* transaction(s) aborted due to ... dma or memory bus error */
132 MUSB_DMA_STATUS_BUS_ABORT,
133 /* transaction(s) aborted due to ... core error or USB fault */
134 MUSB_DMA_STATUS_CORE_ABORT
135};
136
137struct dma_controller;
138
139/**
140 * struct dma_channel - A DMA channel.
141 * @private_data: channel-private data
142 * @max_len: the maximum number of bytes the channel can move in one
143 * transaction (typically representing many USB maximum-sized packets)
144 * @actual_len: how many bytes have been transferred
145 * @status: current channel status (updated e.g. on interrupt)
146 * @desired_mode: true if mode 1 is desired; false if mode 0 is desired
147 *
148 * channels are associated with an endpoint for the duration of at least
149 * one usb transfer.
150 */
151struct dma_channel {
152 void *private_data;
153 /* FIXME not void* private_data, but a dma_controller * */
154 size_t max_len;
155 size_t actual_len;
156 enum dma_channel_status status;
157 bool desired_mode;
Daniel Mackff3fcac2014-05-26 14:52:38 +0200158 bool rx_packet_done;
Felipe Balbi550a7372008-07-24 12:27:36 +0300159};
160
161/*
162 * dma_channel_status - return status of dma channel
163 * @c: the channel
164 *
165 * Returns the software's view of the channel status. If that status is BUSY
166 * then it's possible that the hardware has completed (or aborted) a transfer,
167 * so the driver needs to update that status.
168 */
169static inline enum dma_channel_status
170dma_channel_status(struct dma_channel *c)
171{
172 return (is_dma_capable() && c) ? c->status : MUSB_DMA_STATUS_UNKNOWN;
173}
174
175/**
176 * struct dma_controller - A DMA Controller.
Alexandre Bailon050dc902017-02-06 22:53:51 -0600177 * @musb: the usb controller
Felipe Balbi550a7372008-07-24 12:27:36 +0300178 * @start: call this to start a DMA controller;
179 * return 0 on success, else negative errno
180 * @stop: call this to stop a DMA controller
181 * return 0 on success, else negative errno
182 * @channel_alloc: call this to allocate a DMA channel
183 * @channel_release: call this to release a DMA channel
184 * @channel_abort: call this to abort a pending DMA transaction,
185 * returning it to FREE (but allocated) state
Alexandre Bailon050dc902017-02-06 22:53:51 -0600186 * @dma_callback: invoked on DMA completion, useful to run platform
187 * code such IRQ acknowledgment.
Felipe Balbi550a7372008-07-24 12:27:36 +0300188 *
189 * Controllers manage dma channels.
190 */
191struct dma_controller {
Alexandre Bailon050dc902017-02-06 22:53:51 -0600192 struct musb *musb;
Felipe Balbi550a7372008-07-24 12:27:36 +0300193 struct dma_channel *(*channel_alloc)(struct dma_controller *,
194 struct musb_hw_ep *, u8 is_tx);
195 void (*channel_release)(struct dma_channel *);
196 int (*channel_program)(struct dma_channel *channel,
197 u16 maxpacket, u8 mode,
198 dma_addr_t dma_addr,
199 u32 length);
200 int (*channel_abort)(struct dma_channel *);
Mian Yousaf Kaukab5f5761c2011-01-04 12:47:03 +0100201 int (*is_compatible)(struct dma_channel *channel,
202 u16 maxpacket,
203 void *buf, u32 length);
Alexandre Bailon050dc902017-02-06 22:53:51 -0600204 void (*dma_callback)(struct dma_controller *);
Felipe Balbi550a7372008-07-24 12:27:36 +0300205};
206
207/* called after channel_program(), may indicate a fault */
208extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit);
209
Sebastian Andrzej Siewiora6a20882013-06-19 17:38:12 +0200210#ifdef CONFIG_MUSB_PIO_ONLY
Tony Lindgren7f6283e2015-05-01 12:29:28 -0700211static inline struct dma_controller *
212musb_dma_controller_create(struct musb *m, void __iomem *io)
Sebastian Andrzej Siewiora6a20882013-06-19 17:38:12 +0200213{
214 return NULL;
215}
216
Tony Lindgren7f6283e2015-05-01 12:29:28 -0700217static inline void musb_dma_controller_destroy(struct dma_controller *d) { }
Sebastian Andrzej Siewiora6a20882013-06-19 17:38:12 +0200218
219#else
Felipe Balbi550a7372008-07-24 12:27:36 +0300220
Tony Lindgren7f6283e2015-05-01 12:29:28 -0700221extern struct dma_controller *
222(*musb_dma_controller_create)(struct musb *, void __iomem *);
Felipe Balbi550a7372008-07-24 12:27:36 +0300223
Tony Lindgren7f6283e2015-05-01 12:29:28 -0700224extern void (*musb_dma_controller_destroy)(struct dma_controller *);
Sebastian Andrzej Siewiora6a20882013-06-19 17:38:12 +0200225#endif
Felipe Balbi550a7372008-07-24 12:27:36 +0300226
Tony Lindgren7f6283e2015-05-01 12:29:28 -0700227/* Platform specific DMA functions */
228extern struct dma_controller *
229musbhs_dma_controller_create(struct musb *musb, void __iomem *base);
230extern void musbhs_dma_controller_destroy(struct dma_controller *c);
231
232extern struct dma_controller *
233tusb_dma_controller_create(struct musb *musb, void __iomem *base);
234extern void tusb_dma_controller_destroy(struct dma_controller *c);
235
236extern struct dma_controller *
237cppi_dma_controller_create(struct musb *musb, void __iomem *base);
238extern void cppi_dma_controller_destroy(struct dma_controller *c);
239
240extern struct dma_controller *
241cppi41_dma_controller_create(struct musb *musb, void __iomem *base);
242extern void cppi41_dma_controller_destroy(struct dma_controller *c);
243
244extern struct dma_controller *
245ux500_dma_controller_create(struct musb *musb, void __iomem *base);
246extern void ux500_dma_controller_destroy(struct dma_controller *c);
247
Felipe Balbi550a7372008-07-24 12:27:36 +0300248#endif /* __MUSB_DMA_H__ */