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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001/* SPDX-License-Identifier: GPL-2.0 */
Andreas Noeverd6cc51c2014-06-03 22:04:00 +02002/*
Mika Westerberg15c67842018-10-01 12:31:22 +03003 * Thunderbolt driver - bus logic (NHI independent)
Andreas Noeverd6cc51c2014-06-03 22:04:00 +02004 *
5 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
Mika Westerberg15c67842018-10-01 12:31:22 +03006 * Copyright (C) 2018, Intel Corporation
Andreas Noeverd6cc51c2014-06-03 22:04:00 +02007 */
8
9#ifndef TB_H_
10#define TB_H_
11
Mika Westerberge6b245c2017-06-06 15:25:17 +030012#include <linux/nvmem-provider.h>
Andreas Noevera25c8b22014-06-03 22:04:02 +020013#include <linux/pci.h>
Mika Westerbergd1ff7022017-10-02 13:38:34 +030014#include <linux/thunderbolt.h>
Mika Westerbergbfe778a2017-06-06 15:25:01 +030015#include <linux/uuid.h>
Andreas Noevera25c8b22014-06-03 22:04:02 +020016
17#include "tb_regs.h"
Andreas Noeverd6cc51c2014-06-03 22:04:00 +020018#include "ctl.h"
Mika Westerberg3e136762017-06-06 15:25:14 +030019#include "dma_port.h"
Andreas Noeverd6cc51c2014-06-03 22:04:00 +020020
Mika Westerberg719a5fe2020-03-05 11:37:15 +020021#define NVM_MIN_SIZE SZ_32K
22#define NVM_MAX_SIZE SZ_512K
Mika Westerberg9b383032021-04-01 16:54:15 +030023#define NVM_DATA_DWORDS 16
Mika Westerberg719a5fe2020-03-05 11:37:15 +020024
25/* Intel specific NVM offsets */
26#define NVM_DEVID 0x05
27#define NVM_VERSION 0x08
28#define NVM_FLASH_SIZE 0x45
29
Andreas Noeverd6cc51c2014-06-03 22:04:00 +020030/**
Mika Westerberg719a5fe2020-03-05 11:37:15 +020031 * struct tb_nvm - Structure holding NVM information
32 * @dev: Owner of the NVM
Mika Westerberge6b245c2017-06-06 15:25:17 +030033 * @major: Major version number of the active NVM portion
34 * @minor: Minor version number of the active NVM portion
35 * @id: Identifier used with both NVM portions
36 * @active: Active portion NVMem device
37 * @non_active: Non-active portion NVMem device
38 * @buf: Buffer where the NVM image is stored before it is written to
39 * the actual NVM flash device
40 * @buf_data_size: Number of bytes actually consumed by the new NVM
41 * image
Mika Westerberg719a5fe2020-03-05 11:37:15 +020042 * @authenticating: The device is authenticating the new NVM
Mario Limonciello4b794f82020-06-23 11:14:28 -050043 * @flushed: The image has been flushed to the storage area
Mika Westerberg719a5fe2020-03-05 11:37:15 +020044 *
45 * The user of this structure needs to handle serialization of possible
46 * concurrent access.
Mika Westerberge6b245c2017-06-06 15:25:17 +030047 */
Mika Westerberg719a5fe2020-03-05 11:37:15 +020048struct tb_nvm {
49 struct device *dev;
Mika Westerberge6b245c2017-06-06 15:25:17 +030050 u8 major;
51 u8 minor;
52 int id;
53 struct nvmem_device *active;
54 struct nvmem_device *non_active;
55 void *buf;
56 size_t buf_data_size;
57 bool authenticating;
Mario Limonciello4b794f82020-06-23 11:14:28 -050058 bool flushed;
Mika Westerberge6b245c2017-06-06 15:25:17 +030059};
60
Rajmohan Maniff3a8302021-04-12 14:01:46 +030061enum tb_nvm_write_ops {
62 WRITE_AND_AUTHENTICATE = 1,
63 WRITE_ONLY = 2,
Mika Westerberg1cbf6802021-04-12 15:25:08 +030064 AUTHENTICATE_ONLY = 3,
Rajmohan Maniff3a8302021-04-12 14:01:46 +030065};
66
Mika Westerbergf67cf492017-06-06 15:25:16 +030067#define TB_SWITCH_KEY_SIZE 32
Mika Westerbergf0342e72018-12-30 12:14:46 +020068#define TB_SWITCH_MAX_DEPTH 6
Mika Westerbergb0407982019-12-17 15:33:40 +030069#define USB4_SWITCH_MAX_DEPTH 5
Mika Westerbergf67cf492017-06-06 15:25:16 +030070
71/**
Rajmohan Manicf29b9af2019-12-17 15:33:43 +030072 * enum tb_switch_tmu_rate - TMU refresh rate
73 * @TB_SWITCH_TMU_RATE_OFF: %0 (Disable Time Sync handshake)
74 * @TB_SWITCH_TMU_RATE_HIFI: %16 us time interval between successive
75 * transmission of the Delay Request TSNOS
76 * (Time Sync Notification Ordered Set) on a Link
77 * @TB_SWITCH_TMU_RATE_NORMAL: %1 ms time interval between successive
78 * transmission of the Delay Request TSNOS on
79 * a Link
80 */
81enum tb_switch_tmu_rate {
82 TB_SWITCH_TMU_RATE_OFF = 0,
83 TB_SWITCH_TMU_RATE_HIFI = 16,
84 TB_SWITCH_TMU_RATE_NORMAL = 1000,
85};
86
87/**
88 * struct tb_switch_tmu - Structure holding switch TMU configuration
89 * @cap: Offset to the TMU capability (%0 if not found)
90 * @has_ucap: Does the switch support uni-directional mode
91 * @rate: TMU refresh rate related to upstream switch. In case of root
Gil Finea28ec0e2021-12-17 03:16:38 +020092 * switch this holds the domain rate. Reflects the HW setting.
Rajmohan Manicf29b9af2019-12-17 15:33:43 +030093 * @unidirectional: Is the TMU in uni-directional or bi-directional mode
Gil Finea28ec0e2021-12-17 03:16:38 +020094 * related to upstream switch. Don't care for root switch.
95 * Reflects the HW setting.
96 * @unidirectional_request: Is the new TMU mode: uni-directional or bi-directional
97 * that is requested to be set. Related to upstream switch.
98 * Don't care for root switch.
99 * @rate_request: TMU new refresh rate related to upstream switch that is
100 * requested to be set. In case of root switch, this holds
101 * the new domain rate that is requested to be set.
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300102 */
103struct tb_switch_tmu {
104 int cap;
105 bool has_ucap;
106 enum tb_switch_tmu_rate rate;
107 bool unidirectional;
Gil Finea28ec0e2021-12-17 03:16:38 +0200108 bool unidirectional_request;
109 enum tb_switch_tmu_rate rate_request;
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300110};
111
Gil Fine8a90e4f2021-12-17 03:16:39 +0200112enum tb_clx {
113 TB_CLX_DISABLE,
114 TB_CL0S,
115 TB_CL1,
116 TB_CL2,
117};
118
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300119/**
Andreas Noevera25c8b22014-06-03 22:04:02 +0200120 * struct tb_switch - a thunderbolt switch
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300121 * @dev: Device for the switch
122 * @config: Switch configuration
123 * @ports: Ports in this switch
Mika Westerberg3e136762017-06-06 15:25:14 +0300124 * @dma_port: If the switch has port supporting DMA configuration based
125 * mailbox this will hold the pointer to that (%NULL
Mika Westerberge6b245c2017-06-06 15:25:17 +0300126 * otherwise). If set it also means the switch has
127 * upgradeable NVM.
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300128 * @tmu: The switch TMU configuration
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300129 * @tb: Pointer to the domain the switch belongs to
130 * @uid: Unique ID of the switch
131 * @uuid: UUID of the switch (or %NULL if not supported)
132 * @vendor: Vendor ID of the switch
133 * @device: Device ID of the switch
Mika Westerberg72ee3392017-06-06 15:25:05 +0300134 * @vendor_name: Name of the vendor (or %NULL if not known)
135 * @device_name: Name of the device (or %NULL if not known)
Mika Westerberg91c0c122019-03-21 19:03:00 +0200136 * @link_speed: Speed of the link in Gb/s
137 * @link_width: Width of the link (1 or 2)
Mika Westerbergbbcf40b2020-03-04 17:09:14 +0200138 * @link_usb4: Upstream link is USB4
Mika Westerberg2c3c4192017-06-06 15:25:13 +0300139 * @generation: Switch Thunderbolt generation
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300140 * @cap_plug_events: Offset to the plug events capability (%0 if not found)
Gil Fine23ccd212021-12-17 03:16:41 +0200141 * @cap_vsec_tmu: Offset to the TMU vendor specific capability (%0 if not found)
Mika Westerberga9be5582019-01-09 16:42:12 +0200142 * @cap_lc: Offset to the link controller capability (%0 if not found)
Gil Fine43f977b2021-12-17 03:16:43 +0200143 * @cap_lp: Offset to the low power (CLx for TBT) capability (%0 if not found)
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300144 * @is_unplugged: The switch is going away
145 * @drom: DROM of the switch (%NULL if not found)
Mika Westerberge6b245c2017-06-06 15:25:17 +0300146 * @nvm: Pointer to the NVM if the switch has one (%NULL otherwise)
147 * @no_nvm_upgrade: Prevent NVM upgrade of this switch
148 * @safe_mode: The switch is in safe-mode
Yehezkel Bernat14862ee2018-01-22 12:50:09 +0200149 * @boot: Whether the switch was already authorized on boot or not
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300150 * @rpm: The switch supports runtime PM
Mika Westerbergf67cf492017-06-06 15:25:16 +0300151 * @authorized: Whether the switch is authorized by user or policy
Mika Westerbergf67cf492017-06-06 15:25:16 +0300152 * @security_level: Switch supported security level
Gil Fine54e41812020-06-29 20:30:52 +0300153 * @debugfs_dir: Pointer to the debugfs structure
Mika Westerbergf67cf492017-06-06 15:25:16 +0300154 * @key: Contains the key used to challenge the device or %NULL if not
155 * supported. Size of the key is %TB_SWITCH_KEY_SIZE.
156 * @connection_id: Connection ID used with ICM messaging
157 * @connection_key: Connection key used with ICM messaging
158 * @link: Root switch link this switch is connected (ICM only)
159 * @depth: Depth in the chain this switch is connected (ICM only)
Mika Westerberg4f7c2e02019-05-28 18:56:20 +0300160 * @rpm_complete: Completion used to wait for runtime resume to
161 * complete (ICM only)
Mario Limonciello1cb36292020-06-23 11:14:29 -0500162 * @quirks: Quirks used for this Thunderbolt switch
Mika Westerberg56ad3ae2021-03-10 13:34:12 +0200163 * @credit_allocation: Are the below buffer allocation parameters valid
164 * @max_usb3_credits: Router preferred number of buffers for USB 3.x
165 * @min_dp_aux_credits: Router preferred minimum number of buffers for DP AUX
166 * @min_dp_main_credits: Router preferred minimum number of buffers for DP MAIN
167 * @max_pcie_credits: Router preferred number of buffers for PCIe
168 * @max_dma_credits: Router preferred number of buffers for DMA/P2P
Gil Fine8a90e4f2021-12-17 03:16:39 +0200169 * @clx: CLx state on the upstream link of the router
Mika Westerbergf67cf492017-06-06 15:25:16 +0300170 *
171 * When the switch is being added or removed to the domain (other
Mika Westerberg09f11b62019-03-19 16:48:41 +0200172 * switches) you need to have domain lock held.
Mika Westerbergc3963a52021-02-01 15:03:00 +0300173 *
174 * In USB4 terminology this structure represents a router.
Andreas Noevera25c8b22014-06-03 22:04:02 +0200175 */
176struct tb_switch {
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300177 struct device dev;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200178 struct tb_regs_switch_header config;
179 struct tb_port *ports;
Mika Westerberg3e136762017-06-06 15:25:14 +0300180 struct tb_dma_port *dma_port;
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300181 struct tb_switch_tmu tmu;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200182 struct tb *tb;
Andreas Noeverc90553b2014-06-03 22:04:11 +0200183 u64 uid;
Christoph Hellwig7c39ffe2017-07-18 15:30:05 +0200184 uuid_t *uuid;
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300185 u16 vendor;
186 u16 device;
Mika Westerberg72ee3392017-06-06 15:25:05 +0300187 const char *vendor_name;
188 const char *device_name;
Mika Westerberg91c0c122019-03-21 19:03:00 +0200189 unsigned int link_speed;
190 unsigned int link_width;
Mika Westerbergbbcf40b2020-03-04 17:09:14 +0200191 bool link_usb4;
Mika Westerberg2c3c4192017-06-06 15:25:13 +0300192 unsigned int generation;
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300193 int cap_plug_events;
Gil Fine23ccd212021-12-17 03:16:41 +0200194 int cap_vsec_tmu;
Mika Westerberga9be5582019-01-09 16:42:12 +0200195 int cap_lc;
Gil Fine43f977b2021-12-17 03:16:43 +0200196 int cap_lp;
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300197 bool is_unplugged;
Andreas Noevercd22e732014-06-12 23:11:46 +0200198 u8 *drom;
Mika Westerberg719a5fe2020-03-05 11:37:15 +0200199 struct tb_nvm *nvm;
Mika Westerberge6b245c2017-06-06 15:25:17 +0300200 bool no_nvm_upgrade;
201 bool safe_mode;
Yehezkel Bernat14862ee2018-01-22 12:50:09 +0200202 bool boot;
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300203 bool rpm;
Mika Westerbergf67cf492017-06-06 15:25:16 +0300204 unsigned int authorized;
Mika Westerbergf67cf492017-06-06 15:25:16 +0300205 enum tb_security_level security_level;
Gil Fine54e41812020-06-29 20:30:52 +0300206 struct dentry *debugfs_dir;
Mika Westerbergf67cf492017-06-06 15:25:16 +0300207 u8 *key;
208 u8 connection_id;
209 u8 connection_key;
210 u8 link;
211 u8 depth;
Mika Westerberg4f7c2e02019-05-28 18:56:20 +0300212 struct completion rpm_complete;
Mario Limonciello1cb36292020-06-23 11:14:29 -0500213 unsigned long quirks;
Mika Westerberg56ad3ae2021-03-10 13:34:12 +0200214 bool credit_allocation;
215 unsigned int max_usb3_credits;
216 unsigned int min_dp_aux_credits;
217 unsigned int min_dp_main_credits;
218 unsigned int max_pcie_credits;
219 unsigned int max_dma_credits;
Gil Fine8a90e4f2021-12-17 03:16:39 +0200220 enum tb_clx clx;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200221};
222
223/**
224 * struct tb_port - a thunderbolt port, part of a tb_switch
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300225 * @config: Cached port configuration read from registers
226 * @sw: Switch the port belongs to
227 * @remote: Remote port (%NULL if not connected)
228 * @xdomain: Remote host (%NULL if not connected)
229 * @cap_phy: Offset, zero if not found
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300230 * @cap_tmu: Offset of the adapter specific TMU capability (%0 if not present)
Mika Westerberg56183c82017-02-19 10:39:34 +0200231 * @cap_adap: Offset of the adapter specific capability (%0 if not present)
Mika Westerbergb0407982019-12-17 15:33:40 +0300232 * @cap_usb4: Offset to the USB4 port capability (%0 if not present)
Mika Westerbergcae5f512021-04-01 17:34:20 +0300233 * @usb4: Pointer to the USB4 port structure (only if @cap_usb4 is != %0)
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300234 * @port: Port number on switch
Nikunj A. Dadhania8824d192020-07-21 17:05:23 +0530235 * @disabled: Disabled by eeprom or enabled but not implemented
Mika Westerberg91c0c122019-03-21 19:03:00 +0200236 * @bonded: true if the port is bonded (two lanes combined as one)
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300237 * @dual_link_port: If the switch is connected using two ports, points
238 * to the other port.
239 * @link_nr: Is this primary or secondary port on the dual_link.
Mika Westerberg0b2863a2017-02-19 16:57:27 +0200240 * @in_hopids: Currently allocated input HopIDs
241 * @out_hopids: Currently allocated output HopIDs
Mika Westerberg8afe9092019-03-26 15:52:30 +0300242 * @list: Used to link ports to DP resources list
Mika Westerberg56ad3ae2021-03-10 13:34:12 +0200243 * @total_credits: Total number of buffers available for this port
244 * @ctl_credits: Buffers reserved for control path
Mika Westerberg6ed541c2021-03-22 18:09:35 +0200245 * @dma_credits: Number of credits allocated for DMA tunneling for all
246 * DMA paths through this port.
Mika Westerbergc3963a52021-02-01 15:03:00 +0300247 *
248 * In USB4 terminology this structure represents an adapter (protocol or
249 * lane adapter).
Andreas Noevera25c8b22014-06-03 22:04:02 +0200250 */
251struct tb_port {
252 struct tb_regs_port_header config;
253 struct tb_switch *sw;
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300254 struct tb_port *remote;
255 struct tb_xdomain *xdomain;
256 int cap_phy;
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300257 int cap_tmu;
Mika Westerberg56183c82017-02-19 10:39:34 +0200258 int cap_adap;
Mika Westerbergb0407982019-12-17 15:33:40 +0300259 int cap_usb4;
Mika Westerbergcae5f512021-04-01 17:34:20 +0300260 struct usb4_port *usb4;
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300261 u8 port;
262 bool disabled;
Mika Westerberg91c0c122019-03-21 19:03:00 +0200263 bool bonded;
Andreas Noevercd22e732014-06-12 23:11:46 +0200264 struct tb_port *dual_link_port;
265 u8 link_nr:1;
Mika Westerberg0b2863a2017-02-19 16:57:27 +0200266 struct ida in_hopids;
267 struct ida out_hopids;
Mika Westerberg8afe9092019-03-26 15:52:30 +0300268 struct list_head list;
Mika Westerberg56ad3ae2021-03-10 13:34:12 +0200269 unsigned int total_credits;
270 unsigned int ctl_credits;
Mika Westerberg6ed541c2021-03-22 18:09:35 +0200271 unsigned int dma_credits;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200272};
273
274/**
Mika Westerbergcae5f512021-04-01 17:34:20 +0300275 * struct usb4_port - USB4 port device
276 * @dev: Device for the port
277 * @port: Pointer to the lane 0 adapter
Rajmohan Maniccc5cb82021-04-01 18:20:17 +0300278 * @can_offline: Does the port have necessary platform support to moved
279 * it into offline mode and back
Rajmohan Mani3fb10ea2021-04-01 18:42:38 +0300280 * @offline: The port is currently in offline mode
Mika Westerbergcae5f512021-04-01 17:34:20 +0300281 */
282struct usb4_port {
283 struct device dev;
284 struct tb_port *port;
Rajmohan Maniccc5cb82021-04-01 18:20:17 +0300285 bool can_offline;
Rajmohan Mani3fb10ea2021-04-01 18:42:38 +0300286 bool offline;
Mika Westerbergcae5f512021-04-01 17:34:20 +0300287};
288
289/**
Kranthi Kuntaladacb1282020-03-05 16:39:58 +0200290 * tb_retimer: Thunderbolt retimer
291 * @dev: Device for the retimer
292 * @tb: Pointer to the domain the retimer belongs to
293 * @index: Retimer index facing the router USB4 port
294 * @vendor: Vendor ID of the retimer
295 * @device: Device ID of the retimer
296 * @port: Pointer to the lane 0 adapter
297 * @nvm: Pointer to the NVM if the retimer has one (%NULL otherwise)
298 * @auth_status: Status of last NVM authentication
299 */
300struct tb_retimer {
301 struct device dev;
302 struct tb *tb;
303 u8 index;
304 u32 vendor;
305 u32 device;
306 struct tb_port *port;
307 struct tb_nvm *nvm;
308 u32 auth_status;
309};
310
311/**
Andreas Noever520b6702014-06-03 22:04:07 +0200312 * struct tb_path_hop - routing information for a tb_path
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200313 * @in_port: Ingress port of a switch
314 * @out_port: Egress port of a switch where the packet is routed out
315 * (must be on the same switch than @in_port)
316 * @in_hop_index: HopID where the path configuration entry is placed in
317 * the path config space of @in_port.
318 * @in_counter_index: Used counter index (not used in the driver
319 * currently, %-1 to disable)
320 * @next_hop_index: HopID of the packet when it is routed out from @out_port
Mika Westerberg0414bec2017-02-19 23:43:26 +0200321 * @initial_credits: Number of initial flow control credits allocated for
322 * the path
Mika Westerberg02c5e7c2020-12-10 16:07:59 +0200323 * @nfc_credits: Number of non-flow controlled buffers allocated for the
324 * @in_port.
Andreas Noever520b6702014-06-03 22:04:07 +0200325 *
326 * Hop configuration is always done on the IN port of a switch.
327 * in_port and out_port have to be on the same switch. Packets arriving on
328 * in_port with "hop" = in_hop_index will get routed to through out_port. The
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200329 * next hop to take (on out_port->remote) is determined by
330 * next_hop_index. When routing packet to another switch (out->remote is
331 * set) the @next_hop_index must match the @in_hop_index of that next
332 * hop to make routing possible.
Andreas Noever520b6702014-06-03 22:04:07 +0200333 *
334 * in_counter_index is the index of a counter (in TB_CFG_COUNTERS) on the in
335 * port.
336 */
337struct tb_path_hop {
338 struct tb_port *in_port;
339 struct tb_port *out_port;
340 int in_hop_index;
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200341 int in_counter_index;
Andreas Noever520b6702014-06-03 22:04:07 +0200342 int next_hop_index;
Mika Westerberg0414bec2017-02-19 23:43:26 +0200343 unsigned int initial_credits;
Mika Westerberg02c5e7c2020-12-10 16:07:59 +0200344 unsigned int nfc_credits;
Andreas Noever520b6702014-06-03 22:04:07 +0200345};
346
347/**
348 * enum tb_path_port - path options mask
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200349 * @TB_PATH_NONE: Do not activate on any hop on path
350 * @TB_PATH_SOURCE: Activate on the first hop (out of src)
351 * @TB_PATH_INTERNAL: Activate on the intermediate hops (not the first/last)
352 * @TB_PATH_DESTINATION: Activate on the last hop (into dst)
353 * @TB_PATH_ALL: Activate on all hops on the path
Andreas Noever520b6702014-06-03 22:04:07 +0200354 */
355enum tb_path_port {
356 TB_PATH_NONE = 0,
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200357 TB_PATH_SOURCE = 1,
358 TB_PATH_INTERNAL = 2,
359 TB_PATH_DESTINATION = 4,
Andreas Noever520b6702014-06-03 22:04:07 +0200360 TB_PATH_ALL = 7,
361};
362
363/**
364 * struct tb_path - a unidirectional path between two ports
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200365 * @tb: Pointer to the domain structure
366 * @name: Name of the path (used for debugging)
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200367 * @ingress_shared_buffer: Shared buffering used for ingress ports on the path
368 * @egress_shared_buffer: Shared buffering used for egress ports on the path
369 * @ingress_fc_enable: Flow control for ingress ports on the path
370 * @egress_fc_enable: Flow control for egress ports on the path
371 * @priority: Priority group if the path
372 * @weight: Weight of the path inside the priority group
373 * @drop_packages: Drop packages from queue tail or head
374 * @activated: Is the path active
Mika Westerberg44242d62018-09-28 16:35:32 +0300375 * @clear_fc: Clear all flow control from the path config space entries
376 * when deactivating this path
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200377 * @hops: Path hops
378 * @path_length: How many hops the path uses
Mika Westerberg43bddb22021-11-14 17:20:59 +0200379 * @alloc_hopid: Does this path consume port HopID
Andreas Noever520b6702014-06-03 22:04:07 +0200380 *
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200381 * A path consists of a number of hops (see &struct tb_path_hop). To
382 * establish a PCIe tunnel two paths have to be created between the two
383 * PCIe ports.
Andreas Noever520b6702014-06-03 22:04:07 +0200384 */
385struct tb_path {
386 struct tb *tb;
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200387 const char *name;
Andreas Noever520b6702014-06-03 22:04:07 +0200388 enum tb_path_port ingress_shared_buffer;
389 enum tb_path_port egress_shared_buffer;
390 enum tb_path_port ingress_fc_enable;
391 enum tb_path_port egress_fc_enable;
392
Nathan Chancellor37209782019-04-24 11:34:13 -0700393 unsigned int priority:3;
Andreas Noever520b6702014-06-03 22:04:07 +0200394 int weight:4;
395 bool drop_packages;
396 bool activated;
Mika Westerberg44242d62018-09-28 16:35:32 +0300397 bool clear_fc;
Andreas Noever520b6702014-06-03 22:04:07 +0200398 struct tb_path_hop *hops;
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200399 int path_length;
Mika Westerberg43bddb22021-11-14 17:20:59 +0200400 bool alloc_hopid;
Andreas Noever520b6702014-06-03 22:04:07 +0200401};
402
Mika Westerberg0b2863a2017-02-19 16:57:27 +0200403/* HopIDs 0-7 are reserved by the Thunderbolt protocol */
404#define TB_PATH_MIN_HOPID 8
Mika Westerbergc738a792020-05-08 11:47:00 +0300405/*
406 * Support paths from the farthest (depth 6) router to the host and back
407 * to the same level (not necessarily to the same router).
408 */
409#define TB_PATH_MAX_HOPS (7 * 2)
Mika Westerberg0b2863a2017-02-19 16:57:27 +0200410
Mika Westerbergb2911a52019-12-06 18:36:07 +0200411/* Possible wake types */
412#define TB_WAKE_ON_CONNECT BIT(0)
413#define TB_WAKE_ON_DISCONNECT BIT(1)
414#define TB_WAKE_ON_USB4 BIT(2)
415#define TB_WAKE_ON_USB3 BIT(3)
416#define TB_WAKE_ON_PCIE BIT(4)
Mika Westerberg6026b702021-01-14 16:44:17 +0200417#define TB_WAKE_ON_DP BIT(5)
Mika Westerbergb2911a52019-12-06 18:36:07 +0200418
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300419/**
420 * struct tb_cm_ops - Connection manager specific operations vector
Mika Westerbergf67cf492017-06-06 15:25:16 +0300421 * @driver_ready: Called right after control channel is started. Used by
422 * ICM to send driver ready message to the firmware.
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300423 * @start: Starts the domain
424 * @stop: Stops the domain
425 * @suspend_noirq: Connection manager specific suspend_noirq
426 * @resume_noirq: Connection manager specific resume_noirq
Mika Westerbergf67cf492017-06-06 15:25:16 +0300427 * @suspend: Connection manager specific suspend
Mika Westerberg884e4d52020-08-31 13:05:14 +0300428 * @freeze_noirq: Connection manager specific freeze_noirq
429 * @thaw_noirq: Connection manager specific thaw_noirq
Mika Westerbergf67cf492017-06-06 15:25:16 +0300430 * @complete: Connection manager specific complete
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300431 * @runtime_suspend: Connection manager specific runtime_suspend
432 * @runtime_resume: Connection manager specific runtime_resume
Mika Westerberg4f7c2e02019-05-28 18:56:20 +0300433 * @runtime_suspend_switch: Runtime suspend a switch
434 * @runtime_resume_switch: Runtime resume a switch
Mika Westerberg81a54b52017-06-06 15:25:09 +0300435 * @handle_event: Handle thunderbolt event
Mika Westerberg9aaa3b82018-01-21 12:08:04 +0200436 * @get_boot_acl: Get boot ACL list
437 * @set_boot_acl: Set boot ACL list
Mika Westerberg3da88be2020-11-10 11:47:14 +0300438 * @disapprove_switch: Disapprove switch (disconnect PCIe tunnel)
Mika Westerbergf67cf492017-06-06 15:25:16 +0300439 * @approve_switch: Approve switch
440 * @add_switch_key: Add key to switch
441 * @challenge_switch_key: Challenge switch using key
Mika Westerberge6b245c2017-06-06 15:25:17 +0300442 * @disconnect_pcie_paths: Disconnects PCIe paths before NVM update
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300443 * @approve_xdomain_paths: Approve (establish) XDomain DMA paths
444 * @disconnect_xdomain_paths: Disconnect XDomain DMA paths
Mika Westerberg9490f712020-11-03 13:58:00 +0200445 * @usb4_switch_op: Optional proxy for USB4 router operations. If set
446 * this will be called whenever USB4 router operation is
447 * performed. If this returns %-EOPNOTSUPP then the
448 * native USB4 router operation is called.
449 * @usb4_switch_nvm_authenticate_status: Optional callback that the CM
450 * implementation can be used to
451 * return status of USB4 NVM_AUTH
452 * router operation.
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300453 */
454struct tb_cm_ops {
Mika Westerbergf67cf492017-06-06 15:25:16 +0300455 int (*driver_ready)(struct tb *tb);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300456 int (*start)(struct tb *tb);
457 void (*stop)(struct tb *tb);
458 int (*suspend_noirq)(struct tb *tb);
459 int (*resume_noirq)(struct tb *tb);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300460 int (*suspend)(struct tb *tb);
Mika Westerberg884e4d52020-08-31 13:05:14 +0300461 int (*freeze_noirq)(struct tb *tb);
462 int (*thaw_noirq)(struct tb *tb);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300463 void (*complete)(struct tb *tb);
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300464 int (*runtime_suspend)(struct tb *tb);
465 int (*runtime_resume)(struct tb *tb);
Mika Westerberg4f7c2e02019-05-28 18:56:20 +0300466 int (*runtime_suspend_switch)(struct tb_switch *sw);
467 int (*runtime_resume_switch)(struct tb_switch *sw);
Mika Westerberg81a54b52017-06-06 15:25:09 +0300468 void (*handle_event)(struct tb *tb, enum tb_cfg_pkg_type,
469 const void *buf, size_t size);
Mika Westerberg9aaa3b82018-01-21 12:08:04 +0200470 int (*get_boot_acl)(struct tb *tb, uuid_t *uuids, size_t nuuids);
471 int (*set_boot_acl)(struct tb *tb, const uuid_t *uuids, size_t nuuids);
Mika Westerberg3da88be2020-11-10 11:47:14 +0300472 int (*disapprove_switch)(struct tb *tb, struct tb_switch *sw);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300473 int (*approve_switch)(struct tb *tb, struct tb_switch *sw);
474 int (*add_switch_key)(struct tb *tb, struct tb_switch *sw);
475 int (*challenge_switch_key)(struct tb *tb, struct tb_switch *sw,
476 const u8 *challenge, u8 *response);
Mika Westerberge6b245c2017-06-06 15:25:17 +0300477 int (*disconnect_pcie_paths)(struct tb *tb);
Mika Westerberg180b0682021-01-08 16:25:39 +0200478 int (*approve_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd,
479 int transmit_path, int transmit_ring,
480 int receive_path, int receive_ring);
481 int (*disconnect_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd,
482 int transmit_path, int transmit_ring,
483 int receive_path, int receive_ring);
Mika Westerberg9490f712020-11-03 13:58:00 +0200484 int (*usb4_switch_op)(struct tb_switch *sw, u16 opcode, u32 *metadata,
485 u8 *status, const void *tx_data, size_t tx_data_len,
486 void *rx_data, size_t rx_data_len);
487 int (*usb4_switch_nvm_authenticate_status)(struct tb_switch *sw,
488 u32 *status);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300489};
Andreas Noever520b6702014-06-03 22:04:07 +0200490
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300491static inline void *tb_priv(struct tb *tb)
492{
493 return (void *)tb->privdata;
494}
495
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300496#define TB_AUTOSUSPEND_DELAY 15000 /* ms */
497
Andreas Noevera25c8b22014-06-03 22:04:02 +0200498/* helper functions & macros */
499
500/**
501 * tb_upstream_port() - return the upstream port of a switch
502 *
503 * Every switch has an upstream port (for the root switch it is the NHI).
504 *
505 * During switch alloc/init tb_upstream_port()->remote may be NULL, even for
506 * non root switches (on the NHI port remote is always NULL).
507 *
508 * Return: Returns the upstream port of the switch.
509 */
510static inline struct tb_port *tb_upstream_port(struct tb_switch *sw)
511{
512 return &sw->ports[sw->config.upstream_port_number];
513}
514
Mika Westerbergdfe40ca2019-03-07 15:26:45 +0200515/**
516 * tb_is_upstream_port() - Is the port upstream facing
517 * @port: Port to check
518 *
519 * Returns true if @port is upstream facing port. In case of dual link
520 * ports both return true.
521 */
522static inline bool tb_is_upstream_port(const struct tb_port *port)
523{
524 const struct tb_port *upstream_port = tb_upstream_port(port->sw);
525 return port == upstream_port || port->dual_link_port == upstream_port;
526}
527
Mika Westerbergb323a982019-03-06 19:23:38 +0200528static inline u64 tb_route(const struct tb_switch *sw)
Andreas Noevera25c8b22014-06-03 22:04:02 +0200529{
530 return ((u64) sw->config.route_hi) << 32 | sw->config.route_lo;
531}
532
Mika Westerbergf67cf492017-06-06 15:25:16 +0300533static inline struct tb_port *tb_port_at(u64 route, struct tb_switch *sw)
534{
535 u8 port;
536
537 port = route >> (sw->config.depth * 8);
538 if (WARN_ON(port > sw->config.max_port_number))
539 return NULL;
540 return &sw->ports[port];
541}
542
Mika Westerbergdfe40ca2019-03-07 15:26:45 +0200543/**
544 * tb_port_has_remote() - Does the port have switch connected downstream
545 * @port: Port to check
546 *
547 * Returns true only when the port is primary port and has remote set.
548 */
549static inline bool tb_port_has_remote(const struct tb_port *port)
550{
551 if (tb_is_upstream_port(port))
552 return false;
553 if (!port->remote)
554 return false;
555 if (port->dual_link_port && port->link_nr)
556 return false;
557
558 return true;
559}
560
Mika Westerberg344e0642017-10-11 17:19:54 +0300561static inline bool tb_port_is_null(const struct tb_port *port)
562{
563 return port && port->port && port->config.type == TB_TYPE_PORT;
564}
565
Mika Westerberga3cfebd2020-07-25 10:32:46 +0300566static inline bool tb_port_is_nhi(const struct tb_port *port)
567{
568 return port && port->config.type == TB_TYPE_NHI;
569}
570
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200571static inline bool tb_port_is_pcie_down(const struct tb_port *port)
572{
573 return port && port->config.type == TB_TYPE_PCIE_DOWN;
574}
575
Mika Westerberg0414bec2017-02-19 23:43:26 +0200576static inline bool tb_port_is_pcie_up(const struct tb_port *port)
577{
578 return port && port->config.type == TB_TYPE_PCIE_UP;
579}
580
Mika Westerberg4f807e42018-09-17 16:30:49 +0300581static inline bool tb_port_is_dpin(const struct tb_port *port)
582{
583 return port && port->config.type == TB_TYPE_DP_HDMI_IN;
584}
585
586static inline bool tb_port_is_dpout(const struct tb_port *port)
587{
588 return port && port->config.type == TB_TYPE_DP_HDMI_OUT;
589}
590
Rajmohan Manie6f81852019-12-17 15:33:44 +0300591static inline bool tb_port_is_usb3_down(const struct tb_port *port)
592{
593 return port && port->config.type == TB_TYPE_USB3_DOWN;
594}
595
596static inline bool tb_port_is_usb3_up(const struct tb_port *port)
597{
598 return port && port->config.type == TB_TYPE_USB3_UP;
599}
600
Andreas Noevera25c8b22014-06-03 22:04:02 +0200601static inline int tb_sw_read(struct tb_switch *sw, void *buffer,
602 enum tb_cfg_space space, u32 offset, u32 length)
603{
Mika Westerberg47083842019-03-19 17:07:37 +0200604 if (sw->is_unplugged)
605 return -ENODEV;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200606 return tb_cfg_read(sw->tb->ctl,
607 buffer,
608 tb_route(sw),
609 0,
610 space,
611 offset,
612 length);
613}
614
Mika Westerberg826c6a12019-07-01 18:41:51 +0300615static inline int tb_sw_write(struct tb_switch *sw, const void *buffer,
Andreas Noevera25c8b22014-06-03 22:04:02 +0200616 enum tb_cfg_space space, u32 offset, u32 length)
617{
Mika Westerberg47083842019-03-19 17:07:37 +0200618 if (sw->is_unplugged)
619 return -ENODEV;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200620 return tb_cfg_write(sw->tb->ctl,
621 buffer,
622 tb_route(sw),
623 0,
624 space,
625 offset,
626 length);
627}
628
629static inline int tb_port_read(struct tb_port *port, void *buffer,
630 enum tb_cfg_space space, u32 offset, u32 length)
631{
Mika Westerberg47083842019-03-19 17:07:37 +0200632 if (port->sw->is_unplugged)
633 return -ENODEV;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200634 return tb_cfg_read(port->sw->tb->ctl,
635 buffer,
636 tb_route(port->sw),
637 port->port,
638 space,
639 offset,
640 length);
641}
642
Mika Westerberg16a12582017-06-06 15:24:53 +0300643static inline int tb_port_write(struct tb_port *port, const void *buffer,
Andreas Noevera25c8b22014-06-03 22:04:02 +0200644 enum tb_cfg_space space, u32 offset, u32 length)
645{
Mika Westerberg47083842019-03-19 17:07:37 +0200646 if (port->sw->is_unplugged)
647 return -ENODEV;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200648 return tb_cfg_write(port->sw->tb->ctl,
649 buffer,
650 tb_route(port->sw),
651 port->port,
652 space,
653 offset,
654 length);
655}
656
657#define tb_err(tb, fmt, arg...) dev_err(&(tb)->nhi->pdev->dev, fmt, ## arg)
658#define tb_WARN(tb, fmt, arg...) dev_WARN(&(tb)->nhi->pdev->dev, fmt, ## arg)
659#define tb_warn(tb, fmt, arg...) dev_warn(&(tb)->nhi->pdev->dev, fmt, ## arg)
660#define tb_info(tb, fmt, arg...) dev_info(&(tb)->nhi->pdev->dev, fmt, ## arg)
Mika Westerbergdaa51402018-10-01 12:31:19 +0300661#define tb_dbg(tb, fmt, arg...) dev_dbg(&(tb)->nhi->pdev->dev, fmt, ## arg)
Andreas Noevera25c8b22014-06-03 22:04:02 +0200662
663#define __TB_SW_PRINT(level, sw, fmt, arg...) \
664 do { \
Mika Westerbergb323a982019-03-06 19:23:38 +0200665 const struct tb_switch *__sw = (sw); \
Andreas Noevera25c8b22014-06-03 22:04:02 +0200666 level(__sw->tb, "%llx: " fmt, \
667 tb_route(__sw), ## arg); \
668 } while (0)
669#define tb_sw_WARN(sw, fmt, arg...) __TB_SW_PRINT(tb_WARN, sw, fmt, ##arg)
670#define tb_sw_warn(sw, fmt, arg...) __TB_SW_PRINT(tb_warn, sw, fmt, ##arg)
671#define tb_sw_info(sw, fmt, arg...) __TB_SW_PRINT(tb_info, sw, fmt, ##arg)
Mika Westerbergdaa51402018-10-01 12:31:19 +0300672#define tb_sw_dbg(sw, fmt, arg...) __TB_SW_PRINT(tb_dbg, sw, fmt, ##arg)
Andreas Noevera25c8b22014-06-03 22:04:02 +0200673
674#define __TB_PORT_PRINT(level, _port, fmt, arg...) \
675 do { \
Mika Westerbergb323a982019-03-06 19:23:38 +0200676 const struct tb_port *__port = (_port); \
Andreas Noevera25c8b22014-06-03 22:04:02 +0200677 level(__port->sw->tb, "%llx:%x: " fmt, \
678 tb_route(__port->sw), __port->port, ## arg); \
679 } while (0)
680#define tb_port_WARN(port, fmt, arg...) \
681 __TB_PORT_PRINT(tb_WARN, port, fmt, ##arg)
682#define tb_port_warn(port, fmt, arg...) \
683 __TB_PORT_PRINT(tb_warn, port, fmt, ##arg)
684#define tb_port_info(port, fmt, arg...) \
685 __TB_PORT_PRINT(tb_info, port, fmt, ##arg)
Mika Westerbergdaa51402018-10-01 12:31:19 +0300686#define tb_port_dbg(port, fmt, arg...) \
687 __TB_PORT_PRINT(tb_dbg, port, fmt, ##arg)
Andreas Noevera25c8b22014-06-03 22:04:02 +0200688
Mika Westerbergf67cf492017-06-06 15:25:16 +0300689struct tb *icm_probe(struct tb_nhi *nhi);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300690struct tb *tb_probe(struct tb_nhi *nhi);
Andreas Noevera25c8b22014-06-03 22:04:02 +0200691
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300692extern struct device_type tb_domain_type;
Kranthi Kuntaladacb1282020-03-05 16:39:58 +0200693extern struct device_type tb_retimer_type;
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300694extern struct device_type tb_switch_type;
Mika Westerbergcae5f512021-04-01 17:34:20 +0300695extern struct device_type usb4_port_device_type;
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300696
697int tb_domain_init(void);
698void tb_domain_exit(void);
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300699int tb_xdomain_init(void);
700void tb_xdomain_exit(void);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300701
Mika Westerberg7f0a34d2020-12-29 13:44:57 +0200702struct tb *tb_domain_alloc(struct tb_nhi *nhi, int timeout_msec, size_t privsize);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300703int tb_domain_add(struct tb *tb);
704void tb_domain_remove(struct tb *tb);
705int tb_domain_suspend_noirq(struct tb *tb);
706int tb_domain_resume_noirq(struct tb *tb);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300707int tb_domain_suspend(struct tb *tb);
Mika Westerberg884e4d52020-08-31 13:05:14 +0300708int tb_domain_freeze_noirq(struct tb *tb);
709int tb_domain_thaw_noirq(struct tb *tb);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300710void tb_domain_complete(struct tb *tb);
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300711int tb_domain_runtime_suspend(struct tb *tb);
712int tb_domain_runtime_resume(struct tb *tb);
Mika Westerberg3da88be2020-11-10 11:47:14 +0300713int tb_domain_disapprove_switch(struct tb *tb, struct tb_switch *sw);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300714int tb_domain_approve_switch(struct tb *tb, struct tb_switch *sw);
715int tb_domain_approve_switch_key(struct tb *tb, struct tb_switch *sw);
716int tb_domain_challenge_switch_key(struct tb *tb, struct tb_switch *sw);
Mika Westerberge6b245c2017-06-06 15:25:17 +0300717int tb_domain_disconnect_pcie_paths(struct tb *tb);
Mika Westerberg180b0682021-01-08 16:25:39 +0200718int tb_domain_approve_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
719 int transmit_path, int transmit_ring,
720 int receive_path, int receive_ring);
721int tb_domain_disconnect_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
722 int transmit_path, int transmit_ring,
723 int receive_path, int receive_ring);
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300724int tb_domain_disconnect_all_paths(struct tb *tb);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300725
Mika Westerberg559c1e12018-10-22 14:47:01 +0300726static inline struct tb *tb_domain_get(struct tb *tb)
727{
728 if (tb)
729 get_device(&tb->dev);
730 return tb;
731}
732
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300733static inline void tb_domain_put(struct tb *tb)
734{
735 put_device(&tb->dev);
736}
Andreas Noeverd6cc51c2014-06-03 22:04:00 +0200737
Mika Westerberg719a5fe2020-03-05 11:37:15 +0200738struct tb_nvm *tb_nvm_alloc(struct device *dev);
739int tb_nvm_add_active(struct tb_nvm *nvm, size_t size, nvmem_reg_read_t reg_read);
740int tb_nvm_write_buf(struct tb_nvm *nvm, unsigned int offset, void *val,
741 size_t bytes);
742int tb_nvm_add_non_active(struct tb_nvm *nvm, size_t size,
743 nvmem_reg_write_t reg_write);
744void tb_nvm_free(struct tb_nvm *nvm);
745void tb_nvm_exit(void);
746
Mika Westerberg9b383032021-04-01 16:54:15 +0300747typedef int (*read_block_fn)(void *, unsigned int, void *, size_t);
748typedef int (*write_block_fn)(void *, unsigned int, const void *, size_t);
749
750int tb_nvm_read_data(unsigned int address, void *buf, size_t size,
751 unsigned int retries, read_block_fn read_block,
752 void *read_block_data);
753int tb_nvm_write_data(unsigned int address, const void *buf, size_t size,
754 unsigned int retries, write_block_fn write_next_block,
755 void *write_block_data);
756
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300757struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent,
758 u64 route);
Mika Westerberge6b245c2017-06-06 15:25:17 +0300759struct tb_switch *tb_switch_alloc_safe_mode(struct tb *tb,
760 struct device *parent, u64 route);
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300761int tb_switch_configure(struct tb_switch *sw);
762int tb_switch_add(struct tb_switch *sw);
763void tb_switch_remove(struct tb_switch *sw);
Mika Westerberg6ac6fae2020-06-05 14:25:02 +0300764void tb_switch_suspend(struct tb_switch *sw, bool runtime);
Andreas Noever23dd5bb2014-06-03 22:04:12 +0200765int tb_switch_resume(struct tb_switch *sw);
Mika Westerberg356b6c42019-09-19 15:25:30 +0300766int tb_switch_reset(struct tb_switch *sw);
Gil Fine16396642021-12-17 03:16:40 +0200767int tb_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit,
768 u32 value, int timeout_msec);
Lukas Wunneraae20bb2016-03-20 13:57:20 +0100769void tb_sw_set_unplugged(struct tb_switch *sw);
Mika Westerberg386e5e22019-12-17 15:33:37 +0300770struct tb_port *tb_switch_find_port(struct tb_switch *sw,
771 enum tb_port_type type);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300772struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link,
773 u8 depth);
Christoph Hellwig7c39ffe2017-07-18 15:30:05 +0200774struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid);
Radion Mirchevsky8e9267b2017-10-04 15:24:14 +0300775struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300776
Mika Westerbergb433d012019-09-30 14:07:22 +0300777/**
778 * tb_switch_for_each_port() - Iterate over each switch port
779 * @sw: Switch whose ports to iterate
780 * @p: Port used as iterator
781 *
782 * Iterates over each switch port skipping the control port (port %0).
783 */
784#define tb_switch_for_each_port(sw, p) \
785 for ((p) = &(sw)->ports[1]; \
786 (p) <= &(sw)->ports[(sw)->config.max_port_number]; (p)++)
787
Mika Westerbergb6b0ea72017-10-04 15:19:20 +0300788static inline struct tb_switch *tb_switch_get(struct tb_switch *sw)
789{
790 if (sw)
791 get_device(&sw->dev);
792 return sw;
793}
794
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300795static inline void tb_switch_put(struct tb_switch *sw)
796{
797 put_device(&sw->dev);
798}
799
800static inline bool tb_is_switch(const struct device *dev)
801{
802 return dev->type == &tb_switch_type;
803}
804
805static inline struct tb_switch *tb_to_switch(struct device *dev)
806{
807 if (tb_is_switch(dev))
808 return container_of(dev, struct tb_switch, dev);
809 return NULL;
810}
811
Mika Westerberg0414bec2017-02-19 23:43:26 +0200812static inline struct tb_switch *tb_switch_parent(struct tb_switch *sw)
813{
814 return tb_to_switch(sw->dev.parent);
815}
816
Mika Westerberg17a8f812019-10-08 16:42:47 +0300817static inline bool tb_switch_is_light_ridge(const struct tb_switch *sw)
Mika Westerberg8b0110d2019-01-08 18:55:09 +0200818{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300819 return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
820 sw->config.device_id == PCI_DEVICE_ID_INTEL_LIGHT_RIDGE;
Mika Westerberg8b0110d2019-01-08 18:55:09 +0200821}
822
Mika Westerberg17a8f812019-10-08 16:42:47 +0300823static inline bool tb_switch_is_eagle_ridge(const struct tb_switch *sw)
Mika Westerberg8b0110d2019-01-08 18:55:09 +0200824{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300825 return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
826 sw->config.device_id == PCI_DEVICE_ID_INTEL_EAGLE_RIDGE;
Mika Westerberg8b0110d2019-01-08 18:55:09 +0200827}
828
Mika Westerberg17a8f812019-10-08 16:42:47 +0300829static inline bool tb_switch_is_cactus_ridge(const struct tb_switch *sw)
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200830{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300831 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
832 switch (sw->config.device_id) {
833 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C:
834 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C:
835 return true;
836 }
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200837 }
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300838 return false;
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200839}
840
Mika Westerberg17a8f812019-10-08 16:42:47 +0300841static inline bool tb_switch_is_falcon_ridge(const struct tb_switch *sw)
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200842{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300843 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
844 switch (sw->config.device_id) {
845 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE:
846 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE:
847 return true;
848 }
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200849 }
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300850 return false;
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200851}
852
Mika Westerberg7bffd97e2019-03-22 15:16:53 +0200853static inline bool tb_switch_is_alpine_ridge(const struct tb_switch *sw)
854{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300855 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
856 switch (sw->config.device_id) {
857 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE:
858 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE:
859 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE:
860 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE:
861 return true;
862 }
Mika Westerberg7bffd97e2019-03-22 15:16:53 +0200863 }
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300864 return false;
Mika Westerberg7bffd97e2019-03-22 15:16:53 +0200865}
866
867static inline bool tb_switch_is_titan_ridge(const struct tb_switch *sw)
868{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300869 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
870 switch (sw->config.device_id) {
871 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE:
872 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE:
873 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE:
874 return true;
875 }
Mika Westerberg7bffd97e2019-03-22 15:16:53 +0200876 }
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300877 return false;
Mika Westerberg7bffd97e2019-03-22 15:16:53 +0200878}
879
Gil Fine8a90e4f2021-12-17 03:16:39 +0200880static inline bool tb_switch_is_tiger_lake(const struct tb_switch *sw)
881{
882 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
883 switch (sw->config.device_id) {
884 case PCI_DEVICE_ID_INTEL_TGL_NHI0:
885 case PCI_DEVICE_ID_INTEL_TGL_NHI1:
886 case PCI_DEVICE_ID_INTEL_TGL_H_NHI0:
887 case PCI_DEVICE_ID_INTEL_TGL_H_NHI1:
888 return true;
889 }
890 }
891 return false;
892}
893
Mika Westerbergf07a3602019-06-25 15:10:01 +0300894/**
Mika Westerbergb0407982019-12-17 15:33:40 +0300895 * tb_switch_is_usb4() - Is the switch USB4 compliant
896 * @sw: Switch to check
897 *
898 * Returns true if the @sw is USB4 compliant router, false otherwise.
899 */
900static inline bool tb_switch_is_usb4(const struct tb_switch *sw)
901{
902 return sw->config.thunderbolt_version == USB4_VERSION_1_0;
903}
904
905/**
Mika Westerbergf07a3602019-06-25 15:10:01 +0300906 * tb_switch_is_icm() - Is the switch handled by ICM firmware
907 * @sw: Switch to check
908 *
909 * In case there is a need to differentiate whether ICM firmware or SW CM
910 * is handling @sw this function can be called. It is valid to call this
911 * after tb_switch_alloc() and tb_switch_configure() has been called
912 * (latter only for SW CM case).
913 */
914static inline bool tb_switch_is_icm(const struct tb_switch *sw)
915{
916 return !sw->config.enabled;
917}
918
Mika Westerberg91c0c122019-03-21 19:03:00 +0200919int tb_switch_lane_bonding_enable(struct tb_switch *sw);
920void tb_switch_lane_bonding_disable(struct tb_switch *sw);
Mika Westerbergde462032020-04-02 14:50:52 +0300921int tb_switch_configure_link(struct tb_switch *sw);
922void tb_switch_unconfigure_link(struct tb_switch *sw);
Mika Westerberg91c0c122019-03-21 19:03:00 +0200923
Mika Westerberg8afe9092019-03-26 15:52:30 +0300924bool tb_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
925int tb_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
926void tb_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
927
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300928int tb_switch_tmu_init(struct tb_switch *sw);
929int tb_switch_tmu_post_time(struct tb_switch *sw);
930int tb_switch_tmu_disable(struct tb_switch *sw);
931int tb_switch_tmu_enable(struct tb_switch *sw);
Gil Finea28ec0e2021-12-17 03:16:38 +0200932void tb_switch_tmu_configure(struct tb_switch *sw,
933 enum tb_switch_tmu_rate rate,
934 bool unidirectional);
935/**
936 * tb_switch_tmu_hifi_is_enabled() - Checks if the specified TMU mode is enabled
937 * @sw: Router whose TMU mode to check
938 * @unidirectional: If uni-directional (bi-directional otherwise)
939 *
940 * Return true if hardware TMU configuration matches the one passed in
941 * as parameter. That is HiFi and either uni-directional or bi-directional.
942 */
943static inline bool tb_switch_tmu_hifi_is_enabled(const struct tb_switch *sw,
944 bool unidirectional)
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300945{
946 return sw->tmu.rate == TB_SWITCH_TMU_RATE_HIFI &&
Gil Finea28ec0e2021-12-17 03:16:38 +0200947 sw->tmu.unidirectional == unidirectional;
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300948}
949
Gil Fine8a90e4f2021-12-17 03:16:39 +0200950int tb_switch_enable_clx(struct tb_switch *sw, enum tb_clx clx);
951int tb_switch_disable_clx(struct tb_switch *sw, enum tb_clx clx);
952
953/**
954 * tb_switch_is_clx_enabled() - Checks if the CLx is enabled
955 * @sw: Router to check the CLx state for
956 *
957 * Checks if the CLx is enabled on the router upstream link.
958 * Not applicable for a host router.
959 */
960static inline bool tb_switch_is_clx_enabled(const struct tb_switch *sw)
961{
962 return sw->clx != TB_CLX_DISABLE;
963}
964
965/**
966 * tb_switch_is_cl0s_enabled() - Checks if the CL0s is enabled
967 * @sw: Router to check for the CL0s
968 *
969 * Checks if the CL0s is enabled on the router upstream link.
970 * Not applicable for a host router.
971 */
972static inline bool tb_switch_is_cl0s_enabled(const struct tb_switch *sw)
973{
974 return sw->clx == TB_CL0S;
975}
976
Gil Fine43f977b2021-12-17 03:16:43 +0200977/**
978 * tb_switch_is_clx_supported() - Is CLx supported on this type of router
979 * @sw: The router to check CLx support for
980 */
981static inline bool tb_switch_is_clx_supported(const struct tb_switch *sw)
982{
983 return tb_switch_is_usb4(sw) || tb_switch_is_titan_ridge(sw);
984}
985
986int tb_switch_mask_clx_objections(struct tb_switch *sw);
987
988int tb_switch_pcie_l1_enable(struct tb_switch *sw);
989
Andreas Noever9da672a2014-06-03 22:04:05 +0200990int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged);
Andreas Noever520b6702014-06-03 22:04:07 +0200991int tb_port_add_nfc_credits(struct tb_port *port, int credits);
992int tb_port_clear_counter(struct tb_port *port, int counter);
Mika Westerbergb0407982019-12-17 15:33:40 +0300993int tb_port_unlock(struct tb_port *port);
Mika Westerberg341d4512020-02-21 12:11:54 +0200994int tb_port_enable(struct tb_port *port);
995int tb_port_disable(struct tb_port *port);
Mika Westerberg0b2863a2017-02-19 16:57:27 +0200996int tb_port_alloc_in_hopid(struct tb_port *port, int hopid, int max_hopid);
997void tb_port_release_in_hopid(struct tb_port *port, int hopid);
998int tb_port_alloc_out_hopid(struct tb_port *port, int hopid, int max_hopid);
999void tb_port_release_out_hopid(struct tb_port *port, int hopid);
Mika Westerbergfb19fac2017-02-19 21:51:30 +02001000struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end,
1001 struct tb_port *prev);
Andreas Noever9da672a2014-06-03 22:04:05 +02001002
Mika Westerberg56ad3ae2021-03-10 13:34:12 +02001003static inline bool tb_port_use_credit_allocation(const struct tb_port *port)
1004{
1005 return tb_port_is_null(port) && port->sw->credit_allocation;
1006}
1007
Mika Westerbergc64c3f32020-04-29 17:07:59 +03001008/**
1009 * tb_for_each_port_on_path() - Iterate over each port on path
1010 * @src: Source port
1011 * @dst: Destination port
1012 * @p: Port used as iterator
1013 *
1014 * Walks over each port on path from @src to @dst.
1015 */
1016#define tb_for_each_port_on_path(src, dst, p) \
1017 for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \
1018 (p) = tb_next_port_on_path((src), (dst), (p)))
1019
Mika Westerberg5b7b8c02020-05-08 12:41:34 +03001020int tb_port_get_link_speed(struct tb_port *port);
Isaac Hazan4210d502020-09-24 11:43:58 +03001021int tb_port_get_link_width(struct tb_port *port);
Isaac Hazan5cc0df92020-09-24 11:44:01 +03001022int tb_port_state(struct tb_port *port);
1023int tb_port_lane_bonding_enable(struct tb_port *port);
1024void tb_port_lane_bonding_disable(struct tb_port *port);
Mika Westerberge7051be2021-03-22 16:54:54 +02001025int tb_port_wait_for_link_width(struct tb_port *port, int width,
1026 int timeout_msec);
Mika Westerberg69fea372021-03-22 17:01:59 +02001027int tb_port_update_credits(struct tb_port *port);
Mika Westerberg5b7b8c02020-05-08 12:41:34 +03001028
Mika Westerbergda2da042017-06-06 15:24:58 +03001029int tb_switch_find_vse_cap(struct tb_switch *sw, enum tb_switch_vse_cap vsec);
Rajmohan Maniaa43a9d2019-12-17 15:33:42 +03001030int tb_switch_find_cap(struct tb_switch *sw, enum tb_switch_cap cap);
Mika Westerberg6de057e2020-06-29 20:21:07 +03001031int tb_switch_next_cap(struct tb_switch *sw, unsigned int offset);
Mika Westerbergda2da042017-06-06 15:24:58 +03001032int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap);
Mika Westerberg3c8b2282020-06-29 20:15:17 +03001033int tb_port_next_cap(struct tb_port *port, unsigned int offset);
Mika Westerberge78db6f2017-10-12 16:45:50 +03001034bool tb_port_is_enabled(struct tb_port *port);
Andreas Noevere2b87852014-06-03 22:04:03 +02001035
Rajmohan Manie6f81852019-12-17 15:33:44 +03001036bool tb_usb3_port_is_enabled(struct tb_port *port);
1037int tb_usb3_port_enable(struct tb_port *port, bool enable);
1038
Mika Westerberg0414bec2017-02-19 23:43:26 +02001039bool tb_pci_port_is_enabled(struct tb_port *port);
Mika Westerberg93f36ad2017-02-19 13:48:29 +02001040int tb_pci_port_enable(struct tb_port *port, bool enable);
1041
Mika Westerberg4f807e42018-09-17 16:30:49 +03001042int tb_dp_port_hpd_is_active(struct tb_port *port);
1043int tb_dp_port_hpd_clear(struct tb_port *port);
1044int tb_dp_port_set_hops(struct tb_port *port, unsigned int video,
1045 unsigned int aux_tx, unsigned int aux_rx);
1046bool tb_dp_port_is_enabled(struct tb_port *port);
1047int tb_dp_port_enable(struct tb_port *port, bool enable);
1048
Mika Westerberg0414bec2017-02-19 23:43:26 +02001049struct tb_path *tb_path_discover(struct tb_port *src, int src_hopid,
1050 struct tb_port *dst, int dst_hopid,
Mika Westerberg43bddb22021-11-14 17:20:59 +02001051 struct tb_port **last, const char *name,
1052 bool alloc_hopid);
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +02001053struct tb_path *tb_path_alloc(struct tb *tb, struct tb_port *src, int src_hopid,
1054 struct tb_port *dst, int dst_hopid, int link_nr,
1055 const char *name);
Andreas Noever520b6702014-06-03 22:04:07 +02001056void tb_path_free(struct tb_path *path);
1057int tb_path_activate(struct tb_path *path);
1058void tb_path_deactivate(struct tb_path *path);
1059bool tb_path_is_invalid(struct tb_path *path);
Mika Westerberg0bd680c2020-03-24 14:44:13 +02001060bool tb_path_port_on_path(const struct tb_path *path,
1061 const struct tb_port *port);
Andreas Noever520b6702014-06-03 22:04:07 +02001062
Mika Westerberg6ed541c2021-03-22 18:09:35 +02001063/**
1064 * tb_path_for_each_hop() - Iterate over each hop on path
1065 * @path: Path whose hops to iterate
1066 * @hop: Hop used as iterator
1067 *
1068 * Iterates over each hop on path.
1069 */
1070#define tb_path_for_each_hop(path, hop) \
1071 for ((hop) = &(path)->hops[0]; \
1072 (hop) <= &(path)->hops[(path)->path_length - 1]; (hop)++)
1073
Andreas Noevercd22e732014-06-12 23:11:46 +02001074int tb_drom_read(struct tb_switch *sw);
1075int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid);
Andreas Noeverc90553b2014-06-03 22:04:11 +02001076
Mika Westerberga9be5582019-01-09 16:42:12 +02001077int tb_lc_read_uuid(struct tb_switch *sw, u32 *uuid);
Mika Westerberge28178b2020-04-02 12:42:44 +03001078int tb_lc_configure_port(struct tb_port *port);
1079void tb_lc_unconfigure_port(struct tb_port *port);
Mika Westerberg284652a2020-04-09 14:23:32 +03001080int tb_lc_configure_xdomain(struct tb_port *port);
1081void tb_lc_unconfigure_xdomain(struct tb_port *port);
Mika Westerbergfdb08872020-11-26 12:52:43 +03001082int tb_lc_start_lane_initialization(struct tb_port *port);
Gil Fine43f977b2021-12-17 03:16:43 +02001083bool tb_lc_is_clx_supported(struct tb_port *port);
Mika Westerbergb2911a52019-12-06 18:36:07 +02001084int tb_lc_set_wake(struct tb_switch *sw, unsigned int flags);
Mika Westerberg5480dfc2019-01-09 17:25:43 +02001085int tb_lc_set_sleep(struct tb_switch *sw);
Mika Westerberg91c0c122019-03-21 19:03:00 +02001086bool tb_lc_lane_bonding_possible(struct tb_switch *sw);
Mika Westerberg8afe9092019-03-26 15:52:30 +03001087bool tb_lc_dp_sink_query(struct tb_switch *sw, struct tb_port *in);
1088int tb_lc_dp_sink_alloc(struct tb_switch *sw, struct tb_port *in);
1089int tb_lc_dp_sink_dealloc(struct tb_switch *sw, struct tb_port *in);
Mario Limonciello1cb36292020-06-23 11:14:29 -05001090int tb_lc_force_power(struct tb_switch *sw);
Andreas Noevera25c8b22014-06-03 22:04:02 +02001091
1092static inline int tb_route_length(u64 route)
1093{
1094 return (fls64(route) + TB_ROUTE_SHIFT - 1) / TB_ROUTE_SHIFT;
1095}
1096
Andreas Noever9da672a2014-06-03 22:04:05 +02001097/**
1098 * tb_downstream_route() - get route to downstream switch
1099 *
1100 * Port must not be the upstream port (otherwise a loop is created).
1101 *
1102 * Return: Returns a route to the switch behind @port.
1103 */
1104static inline u64 tb_downstream_route(struct tb_port *port)
1105{
1106 return tb_route(port->sw)
1107 | ((u64) port->port << (port->sw->config.depth * 8));
1108}
1109
Mika Westerberg5ca67682020-10-22 13:22:06 +03001110bool tb_is_xdomain_enabled(void);
Mika Westerbergd1ff7022017-10-02 13:38:34 +03001111bool tb_xdomain_handle_request(struct tb *tb, enum tb_cfg_pkg_type type,
1112 const void *buf, size_t size);
1113struct tb_xdomain *tb_xdomain_alloc(struct tb *tb, struct device *parent,
1114 u64 route, const uuid_t *local_uuid,
1115 const uuid_t *remote_uuid);
1116void tb_xdomain_add(struct tb_xdomain *xd);
1117void tb_xdomain_remove(struct tb_xdomain *xd);
1118struct tb_xdomain *tb_xdomain_find_by_link_depth(struct tb *tb, u8 link,
1119 u8 depth);
1120
Rajmohan Mani3fb10ea2021-04-01 18:42:38 +03001121int tb_retimer_scan(struct tb_port *port, bool add);
Kranthi Kuntaladacb1282020-03-05 16:39:58 +02001122void tb_retimer_remove_all(struct tb_port *port);
1123
1124static inline bool tb_is_retimer(const struct device *dev)
1125{
1126 return dev->type == &tb_retimer_type;
1127}
1128
1129static inline struct tb_retimer *tb_to_retimer(struct device *dev)
1130{
1131 if (tb_is_retimer(dev))
1132 return container_of(dev, struct tb_retimer, dev);
1133 return NULL;
1134}
1135
Mika Westerbergb0407982019-12-17 15:33:40 +03001136int usb4_switch_setup(struct tb_switch *sw);
1137int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid);
1138int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
1139 size_t size);
Mika Westerbergb0407982019-12-17 15:33:40 +03001140bool usb4_switch_lane_bonding_possible(struct tb_switch *sw);
Mika Westerbergb2911a52019-12-06 18:36:07 +02001141int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags);
Mika Westerbergb0407982019-12-17 15:33:40 +03001142int usb4_switch_set_sleep(struct tb_switch *sw);
1143int usb4_switch_nvm_sector_size(struct tb_switch *sw);
1144int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
1145 size_t size);
Mika Westerberg1cbf6802021-04-12 15:25:08 +03001146int usb4_switch_nvm_set_offset(struct tb_switch *sw, unsigned int address);
Mika Westerbergb0407982019-12-17 15:33:40 +03001147int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
1148 const void *buf, size_t size);
1149int usb4_switch_nvm_authenticate(struct tb_switch *sw);
Mika Westerberg661b1942020-11-10 11:34:07 +03001150int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status);
Mika Westerberg56ad3ae2021-03-10 13:34:12 +02001151int usb4_switch_credits_init(struct tb_switch *sw);
Mika Westerbergb0407982019-12-17 15:33:40 +03001152bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
1153int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1154int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1155struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
1156 const struct tb_port *port);
Rajmohan Manie6f81852019-12-17 15:33:44 +03001157struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
1158 const struct tb_port *port);
Mika Westerbergcae5f512021-04-01 17:34:20 +03001159int usb4_switch_add_ports(struct tb_switch *sw);
1160void usb4_switch_remove_ports(struct tb_switch *sw);
Mika Westerbergb0407982019-12-17 15:33:40 +03001161
1162int usb4_port_unlock(struct tb_port *port);
Mika Westerberge28178b2020-04-02 12:42:44 +03001163int usb4_port_configure(struct tb_port *port);
1164void usb4_port_unconfigure(struct tb_port *port);
Mika Westerberg284652a2020-04-09 14:23:32 +03001165int usb4_port_configure_xdomain(struct tb_port *port);
1166void usb4_port_unconfigure_xdomain(struct tb_port *port);
Rajmohan Mani3406de72021-04-01 18:38:05 +03001167int usb4_port_router_offline(struct tb_port *port);
1168int usb4_port_router_online(struct tb_port *port);
Rajmohan Mani02d12852020-03-05 16:33:46 +02001169int usb4_port_enumerate_retimers(struct tb_port *port);
Gil Fine8a90e4f2021-12-17 03:16:39 +02001170bool usb4_port_clx_supported(struct tb_port *port);
Rajmohan Mani02d12852020-03-05 16:33:46 +02001171
Rajmohan Mani3406de72021-04-01 18:38:05 +03001172int usb4_port_retimer_set_inbound_sbtx(struct tb_port *port, u8 index);
Rajmohan Mani02d12852020-03-05 16:33:46 +02001173int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1174 u8 size);
1175int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
1176 const void *buf, u8 size);
1177int usb4_port_retimer_is_last(struct tb_port *port, u8 index);
1178int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index);
Rajmohan Manifaa1c612021-04-12 15:29:16 +03001179int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index,
1180 unsigned int address);
Rajmohan Mani02d12852020-03-05 16:33:46 +02001181int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index,
1182 unsigned int address, const void *buf,
1183 size_t size);
1184int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index);
1185int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1186 u32 *status);
1187int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1188 unsigned int address, void *buf, size_t size);
Mika Westerberg3b1d8d52020-02-21 23:14:41 +02001189
1190int usb4_usb3_port_max_link_rate(struct tb_port *port);
1191int usb4_usb3_port_actual_link_rate(struct tb_port *port);
1192int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
1193 int *downstream_bw);
1194int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
1195 int *downstream_bw);
1196int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
1197 int *downstream_bw);
Mario Limonciello1cb36292020-06-23 11:14:29 -05001198
Mika Westerbergcae5f512021-04-01 17:34:20 +03001199static inline bool tb_is_usb4_port_device(const struct device *dev)
1200{
1201 return dev->type == &usb4_port_device_type;
1202}
1203
1204static inline struct usb4_port *tb_to_usb4_port_device(struct device *dev)
1205{
1206 if (tb_is_usb4_port_device(dev))
1207 return container_of(dev, struct usb4_port, dev);
1208 return NULL;
1209}
1210
1211struct usb4_port *usb4_port_device_add(struct tb_port *port);
1212void usb4_port_device_remove(struct usb4_port *usb4);
Rajmohan Mani3fb10ea2021-04-01 18:42:38 +03001213int usb4_port_device_resume(struct usb4_port *usb4);
Mika Westerbergcae5f512021-04-01 17:34:20 +03001214
Mika Westerberg810278d2020-08-26 08:58:29 +03001215/* Keep link controller awake during update */
Mario Limonciello1cb36292020-06-23 11:14:29 -05001216#define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0)
1217
1218void tb_check_quirks(struct tb_switch *sw);
1219
Mika Westerbergb2be2b02019-04-02 15:26:00 +03001220#ifdef CONFIG_ACPI
1221void tb_acpi_add_links(struct tb_nhi *nhi);
Mika Westerbergc6da62a2020-02-18 16:14:42 +02001222
1223bool tb_acpi_is_native(void);
1224bool tb_acpi_may_tunnel_usb3(void);
1225bool tb_acpi_may_tunnel_dp(void);
1226bool tb_acpi_may_tunnel_pcie(void);
1227bool tb_acpi_is_xdomain_allowed(void);
Rajmohan Maniccc5cb82021-04-01 18:20:17 +03001228
1229int tb_acpi_init(void);
1230void tb_acpi_exit(void);
1231int tb_acpi_power_on_retimers(struct tb_port *port);
1232int tb_acpi_power_off_retimers(struct tb_port *port);
Mika Westerbergb2be2b02019-04-02 15:26:00 +03001233#else
1234static inline void tb_acpi_add_links(struct tb_nhi *nhi) { }
Mika Westerbergc6da62a2020-02-18 16:14:42 +02001235
1236static inline bool tb_acpi_is_native(void) { return true; }
1237static inline bool tb_acpi_may_tunnel_usb3(void) { return true; }
1238static inline bool tb_acpi_may_tunnel_dp(void) { return true; }
1239static inline bool tb_acpi_may_tunnel_pcie(void) { return true; }
1240static inline bool tb_acpi_is_xdomain_allowed(void) { return true; }
Rajmohan Maniccc5cb82021-04-01 18:20:17 +03001241
1242static inline int tb_acpi_init(void) { return 0; }
1243static inline void tb_acpi_exit(void) { }
1244static inline int tb_acpi_power_on_retimers(struct tb_port *port) { return 0; }
1245static inline int tb_acpi_power_off_retimers(struct tb_port *port) { return 0; }
Mika Westerbergb2be2b02019-04-02 15:26:00 +03001246#endif
1247
Gil Fine54e41812020-06-29 20:30:52 +03001248#ifdef CONFIG_DEBUG_FS
1249void tb_debugfs_init(void);
1250void tb_debugfs_exit(void);
1251void tb_switch_debugfs_init(struct tb_switch *sw);
1252void tb_switch_debugfs_remove(struct tb_switch *sw);
Mika Westerberg407ac932020-10-07 17:53:44 +03001253void tb_service_debugfs_init(struct tb_service *svc);
1254void tb_service_debugfs_remove(struct tb_service *svc);
Gil Fine54e41812020-06-29 20:30:52 +03001255#else
1256static inline void tb_debugfs_init(void) { }
1257static inline void tb_debugfs_exit(void) { }
1258static inline void tb_switch_debugfs_init(struct tb_switch *sw) { }
1259static inline void tb_switch_debugfs_remove(struct tb_switch *sw) { }
Mika Westerberg407ac932020-10-07 17:53:44 +03001260static inline void tb_service_debugfs_init(struct tb_service *svc) { }
1261static inline void tb_service_debugfs_remove(struct tb_service *svc) { }
Gil Fine54e41812020-06-29 20:30:52 +03001262#endif
1263
Mika Westerberg2c6ea4e2020-08-24 12:46:52 +03001264#ifdef CONFIG_USB4_KUNIT_TEST
1265int tb_test_init(void);
1266void tb_test_exit(void);
1267#else
1268static inline int tb_test_init(void) { return 0; }
1269static inline void tb_test_exit(void) { }
1270#endif
1271
Andreas Noeverd6cc51c2014-06-03 22:04:00 +02001272#endif