blob: c5704f495afa94daab792d958e131d0b85ca5949 [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001/* SPDX-License-Identifier: GPL-2.0 */
Andreas Noeverd6cc51c2014-06-03 22:04:00 +02002/*
Mika Westerberg15c67842018-10-01 12:31:22 +03003 * Thunderbolt driver - bus logic (NHI independent)
Andreas Noeverd6cc51c2014-06-03 22:04:00 +02004 *
5 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
Mika Westerberg15c67842018-10-01 12:31:22 +03006 * Copyright (C) 2018, Intel Corporation
Andreas Noeverd6cc51c2014-06-03 22:04:00 +02007 */
8
9#ifndef TB_H_
10#define TB_H_
11
Mika Westerberge6b245c2017-06-06 15:25:17 +030012#include <linux/nvmem-provider.h>
Andreas Noevera25c8b22014-06-03 22:04:02 +020013#include <linux/pci.h>
Mika Westerbergd1ff7022017-10-02 13:38:34 +030014#include <linux/thunderbolt.h>
Mika Westerbergbfe778a2017-06-06 15:25:01 +030015#include <linux/uuid.h>
Andreas Noevera25c8b22014-06-03 22:04:02 +020016
17#include "tb_regs.h"
Andreas Noeverd6cc51c2014-06-03 22:04:00 +020018#include "ctl.h"
Mika Westerberg3e136762017-06-06 15:25:14 +030019#include "dma_port.h"
Andreas Noeverd6cc51c2014-06-03 22:04:00 +020020
Mika Westerberg719a5fe2020-03-05 11:37:15 +020021#define NVM_MIN_SIZE SZ_32K
22#define NVM_MAX_SIZE SZ_512K
Mika Westerberg9b383032021-04-01 16:54:15 +030023#define NVM_DATA_DWORDS 16
Mika Westerberg719a5fe2020-03-05 11:37:15 +020024
25/* Intel specific NVM offsets */
26#define NVM_DEVID 0x05
27#define NVM_VERSION 0x08
28#define NVM_FLASH_SIZE 0x45
29
Andreas Noeverd6cc51c2014-06-03 22:04:00 +020030/**
Mika Westerberg719a5fe2020-03-05 11:37:15 +020031 * struct tb_nvm - Structure holding NVM information
32 * @dev: Owner of the NVM
Mika Westerberge6b245c2017-06-06 15:25:17 +030033 * @major: Major version number of the active NVM portion
34 * @minor: Minor version number of the active NVM portion
35 * @id: Identifier used with both NVM portions
36 * @active: Active portion NVMem device
37 * @non_active: Non-active portion NVMem device
38 * @buf: Buffer where the NVM image is stored before it is written to
39 * the actual NVM flash device
40 * @buf_data_size: Number of bytes actually consumed by the new NVM
41 * image
Mika Westerberg719a5fe2020-03-05 11:37:15 +020042 * @authenticating: The device is authenticating the new NVM
Mario Limonciello4b794f82020-06-23 11:14:28 -050043 * @flushed: The image has been flushed to the storage area
Mika Westerberg719a5fe2020-03-05 11:37:15 +020044 *
45 * The user of this structure needs to handle serialization of possible
46 * concurrent access.
Mika Westerberge6b245c2017-06-06 15:25:17 +030047 */
Mika Westerberg719a5fe2020-03-05 11:37:15 +020048struct tb_nvm {
49 struct device *dev;
Mika Westerberge6b245c2017-06-06 15:25:17 +030050 u8 major;
51 u8 minor;
52 int id;
53 struct nvmem_device *active;
54 struct nvmem_device *non_active;
55 void *buf;
56 size_t buf_data_size;
57 bool authenticating;
Mario Limonciello4b794f82020-06-23 11:14:28 -050058 bool flushed;
Mika Westerberge6b245c2017-06-06 15:25:17 +030059};
60
Mika Westerbergf67cf492017-06-06 15:25:16 +030061#define TB_SWITCH_KEY_SIZE 32
Mika Westerbergf0342e72018-12-30 12:14:46 +020062#define TB_SWITCH_MAX_DEPTH 6
Mika Westerbergb0407982019-12-17 15:33:40 +030063#define USB4_SWITCH_MAX_DEPTH 5
Mika Westerbergf67cf492017-06-06 15:25:16 +030064
65/**
Rajmohan Manicf29b9af2019-12-17 15:33:43 +030066 * enum tb_switch_tmu_rate - TMU refresh rate
67 * @TB_SWITCH_TMU_RATE_OFF: %0 (Disable Time Sync handshake)
68 * @TB_SWITCH_TMU_RATE_HIFI: %16 us time interval between successive
69 * transmission of the Delay Request TSNOS
70 * (Time Sync Notification Ordered Set) on a Link
71 * @TB_SWITCH_TMU_RATE_NORMAL: %1 ms time interval between successive
72 * transmission of the Delay Request TSNOS on
73 * a Link
74 */
75enum tb_switch_tmu_rate {
76 TB_SWITCH_TMU_RATE_OFF = 0,
77 TB_SWITCH_TMU_RATE_HIFI = 16,
78 TB_SWITCH_TMU_RATE_NORMAL = 1000,
79};
80
81/**
82 * struct tb_switch_tmu - Structure holding switch TMU configuration
83 * @cap: Offset to the TMU capability (%0 if not found)
84 * @has_ucap: Does the switch support uni-directional mode
85 * @rate: TMU refresh rate related to upstream switch. In case of root
86 * switch this holds the domain rate.
87 * @unidirectional: Is the TMU in uni-directional or bi-directional mode
88 * related to upstream switch. Don't case for root switch.
89 */
90struct tb_switch_tmu {
91 int cap;
92 bool has_ucap;
93 enum tb_switch_tmu_rate rate;
94 bool unidirectional;
95};
96
97/**
Andreas Noevera25c8b22014-06-03 22:04:02 +020098 * struct tb_switch - a thunderbolt switch
Mika Westerbergbfe778a2017-06-06 15:25:01 +030099 * @dev: Device for the switch
100 * @config: Switch configuration
101 * @ports: Ports in this switch
Mika Westerberg3e136762017-06-06 15:25:14 +0300102 * @dma_port: If the switch has port supporting DMA configuration based
103 * mailbox this will hold the pointer to that (%NULL
Mika Westerberge6b245c2017-06-06 15:25:17 +0300104 * otherwise). If set it also means the switch has
105 * upgradeable NVM.
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300106 * @tmu: The switch TMU configuration
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300107 * @tb: Pointer to the domain the switch belongs to
108 * @uid: Unique ID of the switch
109 * @uuid: UUID of the switch (or %NULL if not supported)
110 * @vendor: Vendor ID of the switch
111 * @device: Device ID of the switch
Mika Westerberg72ee3392017-06-06 15:25:05 +0300112 * @vendor_name: Name of the vendor (or %NULL if not known)
113 * @device_name: Name of the device (or %NULL if not known)
Mika Westerberg91c0c122019-03-21 19:03:00 +0200114 * @link_speed: Speed of the link in Gb/s
115 * @link_width: Width of the link (1 or 2)
Mika Westerbergbbcf40b2020-03-04 17:09:14 +0200116 * @link_usb4: Upstream link is USB4
Mika Westerberg2c3c4192017-06-06 15:25:13 +0300117 * @generation: Switch Thunderbolt generation
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300118 * @cap_plug_events: Offset to the plug events capability (%0 if not found)
Mika Westerberga9be5582019-01-09 16:42:12 +0200119 * @cap_lc: Offset to the link controller capability (%0 if not found)
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300120 * @is_unplugged: The switch is going away
121 * @drom: DROM of the switch (%NULL if not found)
Mika Westerberge6b245c2017-06-06 15:25:17 +0300122 * @nvm: Pointer to the NVM if the switch has one (%NULL otherwise)
123 * @no_nvm_upgrade: Prevent NVM upgrade of this switch
124 * @safe_mode: The switch is in safe-mode
Yehezkel Bernat14862ee2018-01-22 12:50:09 +0200125 * @boot: Whether the switch was already authorized on boot or not
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300126 * @rpm: The switch supports runtime PM
Mika Westerbergf67cf492017-06-06 15:25:16 +0300127 * @authorized: Whether the switch is authorized by user or policy
Mika Westerbergf67cf492017-06-06 15:25:16 +0300128 * @security_level: Switch supported security level
Gil Fine54e41812020-06-29 20:30:52 +0300129 * @debugfs_dir: Pointer to the debugfs structure
Mika Westerbergf67cf492017-06-06 15:25:16 +0300130 * @key: Contains the key used to challenge the device or %NULL if not
131 * supported. Size of the key is %TB_SWITCH_KEY_SIZE.
132 * @connection_id: Connection ID used with ICM messaging
133 * @connection_key: Connection key used with ICM messaging
134 * @link: Root switch link this switch is connected (ICM only)
135 * @depth: Depth in the chain this switch is connected (ICM only)
Mika Westerberg4f7c2e02019-05-28 18:56:20 +0300136 * @rpm_complete: Completion used to wait for runtime resume to
137 * complete (ICM only)
Mario Limonciello1cb36292020-06-23 11:14:29 -0500138 * @quirks: Quirks used for this Thunderbolt switch
Mika Westerberg56ad3ae2021-03-10 13:34:12 +0200139 * @credit_allocation: Are the below buffer allocation parameters valid
140 * @max_usb3_credits: Router preferred number of buffers for USB 3.x
141 * @min_dp_aux_credits: Router preferred minimum number of buffers for DP AUX
142 * @min_dp_main_credits: Router preferred minimum number of buffers for DP MAIN
143 * @max_pcie_credits: Router preferred number of buffers for PCIe
144 * @max_dma_credits: Router preferred number of buffers for DMA/P2P
Mika Westerbergf67cf492017-06-06 15:25:16 +0300145 *
146 * When the switch is being added or removed to the domain (other
Mika Westerberg09f11b62019-03-19 16:48:41 +0200147 * switches) you need to have domain lock held.
Mika Westerbergc3963a52021-02-01 15:03:00 +0300148 *
149 * In USB4 terminology this structure represents a router.
Andreas Noevera25c8b22014-06-03 22:04:02 +0200150 */
151struct tb_switch {
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300152 struct device dev;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200153 struct tb_regs_switch_header config;
154 struct tb_port *ports;
Mika Westerberg3e136762017-06-06 15:25:14 +0300155 struct tb_dma_port *dma_port;
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300156 struct tb_switch_tmu tmu;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200157 struct tb *tb;
Andreas Noeverc90553b2014-06-03 22:04:11 +0200158 u64 uid;
Christoph Hellwig7c39ffe2017-07-18 15:30:05 +0200159 uuid_t *uuid;
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300160 u16 vendor;
161 u16 device;
Mika Westerberg72ee3392017-06-06 15:25:05 +0300162 const char *vendor_name;
163 const char *device_name;
Mika Westerberg91c0c122019-03-21 19:03:00 +0200164 unsigned int link_speed;
165 unsigned int link_width;
Mika Westerbergbbcf40b2020-03-04 17:09:14 +0200166 bool link_usb4;
Mika Westerberg2c3c4192017-06-06 15:25:13 +0300167 unsigned int generation;
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300168 int cap_plug_events;
Mika Westerberga9be5582019-01-09 16:42:12 +0200169 int cap_lc;
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300170 bool is_unplugged;
Andreas Noevercd22e732014-06-12 23:11:46 +0200171 u8 *drom;
Mika Westerberg719a5fe2020-03-05 11:37:15 +0200172 struct tb_nvm *nvm;
Mika Westerberge6b245c2017-06-06 15:25:17 +0300173 bool no_nvm_upgrade;
174 bool safe_mode;
Yehezkel Bernat14862ee2018-01-22 12:50:09 +0200175 bool boot;
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300176 bool rpm;
Mika Westerbergf67cf492017-06-06 15:25:16 +0300177 unsigned int authorized;
Mika Westerbergf67cf492017-06-06 15:25:16 +0300178 enum tb_security_level security_level;
Gil Fine54e41812020-06-29 20:30:52 +0300179 struct dentry *debugfs_dir;
Mika Westerbergf67cf492017-06-06 15:25:16 +0300180 u8 *key;
181 u8 connection_id;
182 u8 connection_key;
183 u8 link;
184 u8 depth;
Mika Westerberg4f7c2e02019-05-28 18:56:20 +0300185 struct completion rpm_complete;
Mario Limonciello1cb36292020-06-23 11:14:29 -0500186 unsigned long quirks;
Mika Westerberg56ad3ae2021-03-10 13:34:12 +0200187 bool credit_allocation;
188 unsigned int max_usb3_credits;
189 unsigned int min_dp_aux_credits;
190 unsigned int min_dp_main_credits;
191 unsigned int max_pcie_credits;
192 unsigned int max_dma_credits;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200193};
194
195/**
196 * struct tb_port - a thunderbolt port, part of a tb_switch
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300197 * @config: Cached port configuration read from registers
198 * @sw: Switch the port belongs to
199 * @remote: Remote port (%NULL if not connected)
200 * @xdomain: Remote host (%NULL if not connected)
201 * @cap_phy: Offset, zero if not found
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300202 * @cap_tmu: Offset of the adapter specific TMU capability (%0 if not present)
Mika Westerberg56183c82017-02-19 10:39:34 +0200203 * @cap_adap: Offset of the adapter specific capability (%0 if not present)
Mika Westerbergb0407982019-12-17 15:33:40 +0300204 * @cap_usb4: Offset to the USB4 port capability (%0 if not present)
Mika Westerbergcae5f512021-04-01 17:34:20 +0300205 * @usb4: Pointer to the USB4 port structure (only if @cap_usb4 is != %0)
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300206 * @port: Port number on switch
Nikunj A. Dadhania8824d192020-07-21 17:05:23 +0530207 * @disabled: Disabled by eeprom or enabled but not implemented
Mika Westerberg91c0c122019-03-21 19:03:00 +0200208 * @bonded: true if the port is bonded (two lanes combined as one)
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300209 * @dual_link_port: If the switch is connected using two ports, points
210 * to the other port.
211 * @link_nr: Is this primary or secondary port on the dual_link.
Mika Westerberg0b2863a2017-02-19 16:57:27 +0200212 * @in_hopids: Currently allocated input HopIDs
213 * @out_hopids: Currently allocated output HopIDs
Mika Westerberg8afe9092019-03-26 15:52:30 +0300214 * @list: Used to link ports to DP resources list
Mika Westerberg56ad3ae2021-03-10 13:34:12 +0200215 * @total_credits: Total number of buffers available for this port
216 * @ctl_credits: Buffers reserved for control path
Mika Westerberg6ed541c2021-03-22 18:09:35 +0200217 * @dma_credits: Number of credits allocated for DMA tunneling for all
218 * DMA paths through this port.
Mika Westerbergc3963a52021-02-01 15:03:00 +0300219 *
220 * In USB4 terminology this structure represents an adapter (protocol or
221 * lane adapter).
Andreas Noevera25c8b22014-06-03 22:04:02 +0200222 */
223struct tb_port {
224 struct tb_regs_port_header config;
225 struct tb_switch *sw;
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300226 struct tb_port *remote;
227 struct tb_xdomain *xdomain;
228 int cap_phy;
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300229 int cap_tmu;
Mika Westerberg56183c82017-02-19 10:39:34 +0200230 int cap_adap;
Mika Westerbergb0407982019-12-17 15:33:40 +0300231 int cap_usb4;
Mika Westerbergcae5f512021-04-01 17:34:20 +0300232 struct usb4_port *usb4;
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300233 u8 port;
234 bool disabled;
Mika Westerberg91c0c122019-03-21 19:03:00 +0200235 bool bonded;
Andreas Noevercd22e732014-06-12 23:11:46 +0200236 struct tb_port *dual_link_port;
237 u8 link_nr:1;
Mika Westerberg0b2863a2017-02-19 16:57:27 +0200238 struct ida in_hopids;
239 struct ida out_hopids;
Mika Westerberg8afe9092019-03-26 15:52:30 +0300240 struct list_head list;
Mika Westerberg56ad3ae2021-03-10 13:34:12 +0200241 unsigned int total_credits;
242 unsigned int ctl_credits;
Mika Westerberg6ed541c2021-03-22 18:09:35 +0200243 unsigned int dma_credits;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200244};
245
246/**
Mika Westerbergcae5f512021-04-01 17:34:20 +0300247 * struct usb4_port - USB4 port device
248 * @dev: Device for the port
249 * @port: Pointer to the lane 0 adapter
Rajmohan Maniccc5cb82021-04-01 18:20:17 +0300250 * @can_offline: Does the port have necessary platform support to moved
251 * it into offline mode and back
Mika Westerbergcae5f512021-04-01 17:34:20 +0300252 */
253struct usb4_port {
254 struct device dev;
255 struct tb_port *port;
Rajmohan Maniccc5cb82021-04-01 18:20:17 +0300256 bool can_offline;
Mika Westerbergcae5f512021-04-01 17:34:20 +0300257};
258
259/**
Kranthi Kuntaladacb1282020-03-05 16:39:58 +0200260 * tb_retimer: Thunderbolt retimer
261 * @dev: Device for the retimer
262 * @tb: Pointer to the domain the retimer belongs to
263 * @index: Retimer index facing the router USB4 port
264 * @vendor: Vendor ID of the retimer
265 * @device: Device ID of the retimer
266 * @port: Pointer to the lane 0 adapter
267 * @nvm: Pointer to the NVM if the retimer has one (%NULL otherwise)
268 * @auth_status: Status of last NVM authentication
269 */
270struct tb_retimer {
271 struct device dev;
272 struct tb *tb;
273 u8 index;
274 u32 vendor;
275 u32 device;
276 struct tb_port *port;
277 struct tb_nvm *nvm;
278 u32 auth_status;
279};
280
281/**
Andreas Noever520b6702014-06-03 22:04:07 +0200282 * struct tb_path_hop - routing information for a tb_path
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200283 * @in_port: Ingress port of a switch
284 * @out_port: Egress port of a switch where the packet is routed out
285 * (must be on the same switch than @in_port)
286 * @in_hop_index: HopID where the path configuration entry is placed in
287 * the path config space of @in_port.
288 * @in_counter_index: Used counter index (not used in the driver
289 * currently, %-1 to disable)
290 * @next_hop_index: HopID of the packet when it is routed out from @out_port
Mika Westerberg0414bec2017-02-19 23:43:26 +0200291 * @initial_credits: Number of initial flow control credits allocated for
292 * the path
Mika Westerberg02c5e7c2020-12-10 16:07:59 +0200293 * @nfc_credits: Number of non-flow controlled buffers allocated for the
294 * @in_port.
Andreas Noever520b6702014-06-03 22:04:07 +0200295 *
296 * Hop configuration is always done on the IN port of a switch.
297 * in_port and out_port have to be on the same switch. Packets arriving on
298 * in_port with "hop" = in_hop_index will get routed to through out_port. The
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200299 * next hop to take (on out_port->remote) is determined by
300 * next_hop_index. When routing packet to another switch (out->remote is
301 * set) the @next_hop_index must match the @in_hop_index of that next
302 * hop to make routing possible.
Andreas Noever520b6702014-06-03 22:04:07 +0200303 *
304 * in_counter_index is the index of a counter (in TB_CFG_COUNTERS) on the in
305 * port.
306 */
307struct tb_path_hop {
308 struct tb_port *in_port;
309 struct tb_port *out_port;
310 int in_hop_index;
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200311 int in_counter_index;
Andreas Noever520b6702014-06-03 22:04:07 +0200312 int next_hop_index;
Mika Westerberg0414bec2017-02-19 23:43:26 +0200313 unsigned int initial_credits;
Mika Westerberg02c5e7c2020-12-10 16:07:59 +0200314 unsigned int nfc_credits;
Andreas Noever520b6702014-06-03 22:04:07 +0200315};
316
317/**
318 * enum tb_path_port - path options mask
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200319 * @TB_PATH_NONE: Do not activate on any hop on path
320 * @TB_PATH_SOURCE: Activate on the first hop (out of src)
321 * @TB_PATH_INTERNAL: Activate on the intermediate hops (not the first/last)
322 * @TB_PATH_DESTINATION: Activate on the last hop (into dst)
323 * @TB_PATH_ALL: Activate on all hops on the path
Andreas Noever520b6702014-06-03 22:04:07 +0200324 */
325enum tb_path_port {
326 TB_PATH_NONE = 0,
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200327 TB_PATH_SOURCE = 1,
328 TB_PATH_INTERNAL = 2,
329 TB_PATH_DESTINATION = 4,
Andreas Noever520b6702014-06-03 22:04:07 +0200330 TB_PATH_ALL = 7,
331};
332
333/**
334 * struct tb_path - a unidirectional path between two ports
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200335 * @tb: Pointer to the domain structure
336 * @name: Name of the path (used for debugging)
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200337 * @ingress_shared_buffer: Shared buffering used for ingress ports on the path
338 * @egress_shared_buffer: Shared buffering used for egress ports on the path
339 * @ingress_fc_enable: Flow control for ingress ports on the path
340 * @egress_fc_enable: Flow control for egress ports on the path
341 * @priority: Priority group if the path
342 * @weight: Weight of the path inside the priority group
343 * @drop_packages: Drop packages from queue tail or head
344 * @activated: Is the path active
Mika Westerberg44242d62018-09-28 16:35:32 +0300345 * @clear_fc: Clear all flow control from the path config space entries
346 * when deactivating this path
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200347 * @hops: Path hops
348 * @path_length: How many hops the path uses
Andreas Noever520b6702014-06-03 22:04:07 +0200349 *
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200350 * A path consists of a number of hops (see &struct tb_path_hop). To
351 * establish a PCIe tunnel two paths have to be created between the two
352 * PCIe ports.
Andreas Noever520b6702014-06-03 22:04:07 +0200353 */
354struct tb_path {
355 struct tb *tb;
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200356 const char *name;
Andreas Noever520b6702014-06-03 22:04:07 +0200357 enum tb_path_port ingress_shared_buffer;
358 enum tb_path_port egress_shared_buffer;
359 enum tb_path_port ingress_fc_enable;
360 enum tb_path_port egress_fc_enable;
361
Nathan Chancellor37209782019-04-24 11:34:13 -0700362 unsigned int priority:3;
Andreas Noever520b6702014-06-03 22:04:07 +0200363 int weight:4;
364 bool drop_packages;
365 bool activated;
Mika Westerberg44242d62018-09-28 16:35:32 +0300366 bool clear_fc;
Andreas Noever520b6702014-06-03 22:04:07 +0200367 struct tb_path_hop *hops;
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200368 int path_length;
Andreas Noever520b6702014-06-03 22:04:07 +0200369};
370
Mika Westerberg0b2863a2017-02-19 16:57:27 +0200371/* HopIDs 0-7 are reserved by the Thunderbolt protocol */
372#define TB_PATH_MIN_HOPID 8
Mika Westerbergc738a792020-05-08 11:47:00 +0300373/*
374 * Support paths from the farthest (depth 6) router to the host and back
375 * to the same level (not necessarily to the same router).
376 */
377#define TB_PATH_MAX_HOPS (7 * 2)
Mika Westerberg0b2863a2017-02-19 16:57:27 +0200378
Mika Westerbergb2911a52019-12-06 18:36:07 +0200379/* Possible wake types */
380#define TB_WAKE_ON_CONNECT BIT(0)
381#define TB_WAKE_ON_DISCONNECT BIT(1)
382#define TB_WAKE_ON_USB4 BIT(2)
383#define TB_WAKE_ON_USB3 BIT(3)
384#define TB_WAKE_ON_PCIE BIT(4)
Mika Westerberg6026b702021-01-14 16:44:17 +0200385#define TB_WAKE_ON_DP BIT(5)
Mika Westerbergb2911a52019-12-06 18:36:07 +0200386
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300387/**
388 * struct tb_cm_ops - Connection manager specific operations vector
Mika Westerbergf67cf492017-06-06 15:25:16 +0300389 * @driver_ready: Called right after control channel is started. Used by
390 * ICM to send driver ready message to the firmware.
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300391 * @start: Starts the domain
392 * @stop: Stops the domain
393 * @suspend_noirq: Connection manager specific suspend_noirq
394 * @resume_noirq: Connection manager specific resume_noirq
Mika Westerbergf67cf492017-06-06 15:25:16 +0300395 * @suspend: Connection manager specific suspend
Mika Westerberg884e4d52020-08-31 13:05:14 +0300396 * @freeze_noirq: Connection manager specific freeze_noirq
397 * @thaw_noirq: Connection manager specific thaw_noirq
Mika Westerbergf67cf492017-06-06 15:25:16 +0300398 * @complete: Connection manager specific complete
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300399 * @runtime_suspend: Connection manager specific runtime_suspend
400 * @runtime_resume: Connection manager specific runtime_resume
Mika Westerberg4f7c2e02019-05-28 18:56:20 +0300401 * @runtime_suspend_switch: Runtime suspend a switch
402 * @runtime_resume_switch: Runtime resume a switch
Mika Westerberg81a54b52017-06-06 15:25:09 +0300403 * @handle_event: Handle thunderbolt event
Mika Westerberg9aaa3b82018-01-21 12:08:04 +0200404 * @get_boot_acl: Get boot ACL list
405 * @set_boot_acl: Set boot ACL list
Mika Westerberg3da88be2020-11-10 11:47:14 +0300406 * @disapprove_switch: Disapprove switch (disconnect PCIe tunnel)
Mika Westerbergf67cf492017-06-06 15:25:16 +0300407 * @approve_switch: Approve switch
408 * @add_switch_key: Add key to switch
409 * @challenge_switch_key: Challenge switch using key
Mika Westerberge6b245c2017-06-06 15:25:17 +0300410 * @disconnect_pcie_paths: Disconnects PCIe paths before NVM update
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300411 * @approve_xdomain_paths: Approve (establish) XDomain DMA paths
412 * @disconnect_xdomain_paths: Disconnect XDomain DMA paths
Mika Westerberg9490f712020-11-03 13:58:00 +0200413 * @usb4_switch_op: Optional proxy for USB4 router operations. If set
414 * this will be called whenever USB4 router operation is
415 * performed. If this returns %-EOPNOTSUPP then the
416 * native USB4 router operation is called.
417 * @usb4_switch_nvm_authenticate_status: Optional callback that the CM
418 * implementation can be used to
419 * return status of USB4 NVM_AUTH
420 * router operation.
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300421 */
422struct tb_cm_ops {
Mika Westerbergf67cf492017-06-06 15:25:16 +0300423 int (*driver_ready)(struct tb *tb);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300424 int (*start)(struct tb *tb);
425 void (*stop)(struct tb *tb);
426 int (*suspend_noirq)(struct tb *tb);
427 int (*resume_noirq)(struct tb *tb);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300428 int (*suspend)(struct tb *tb);
Mika Westerberg884e4d52020-08-31 13:05:14 +0300429 int (*freeze_noirq)(struct tb *tb);
430 int (*thaw_noirq)(struct tb *tb);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300431 void (*complete)(struct tb *tb);
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300432 int (*runtime_suspend)(struct tb *tb);
433 int (*runtime_resume)(struct tb *tb);
Mika Westerberg4f7c2e02019-05-28 18:56:20 +0300434 int (*runtime_suspend_switch)(struct tb_switch *sw);
435 int (*runtime_resume_switch)(struct tb_switch *sw);
Mika Westerberg81a54b52017-06-06 15:25:09 +0300436 void (*handle_event)(struct tb *tb, enum tb_cfg_pkg_type,
437 const void *buf, size_t size);
Mika Westerberg9aaa3b82018-01-21 12:08:04 +0200438 int (*get_boot_acl)(struct tb *tb, uuid_t *uuids, size_t nuuids);
439 int (*set_boot_acl)(struct tb *tb, const uuid_t *uuids, size_t nuuids);
Mika Westerberg3da88be2020-11-10 11:47:14 +0300440 int (*disapprove_switch)(struct tb *tb, struct tb_switch *sw);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300441 int (*approve_switch)(struct tb *tb, struct tb_switch *sw);
442 int (*add_switch_key)(struct tb *tb, struct tb_switch *sw);
443 int (*challenge_switch_key)(struct tb *tb, struct tb_switch *sw,
444 const u8 *challenge, u8 *response);
Mika Westerberge6b245c2017-06-06 15:25:17 +0300445 int (*disconnect_pcie_paths)(struct tb *tb);
Mika Westerberg180b0682021-01-08 16:25:39 +0200446 int (*approve_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd,
447 int transmit_path, int transmit_ring,
448 int receive_path, int receive_ring);
449 int (*disconnect_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd,
450 int transmit_path, int transmit_ring,
451 int receive_path, int receive_ring);
Mika Westerberg9490f712020-11-03 13:58:00 +0200452 int (*usb4_switch_op)(struct tb_switch *sw, u16 opcode, u32 *metadata,
453 u8 *status, const void *tx_data, size_t tx_data_len,
454 void *rx_data, size_t rx_data_len);
455 int (*usb4_switch_nvm_authenticate_status)(struct tb_switch *sw,
456 u32 *status);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300457};
Andreas Noever520b6702014-06-03 22:04:07 +0200458
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300459static inline void *tb_priv(struct tb *tb)
460{
461 return (void *)tb->privdata;
462}
463
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300464#define TB_AUTOSUSPEND_DELAY 15000 /* ms */
465
Andreas Noevera25c8b22014-06-03 22:04:02 +0200466/* helper functions & macros */
467
468/**
469 * tb_upstream_port() - return the upstream port of a switch
470 *
471 * Every switch has an upstream port (for the root switch it is the NHI).
472 *
473 * During switch alloc/init tb_upstream_port()->remote may be NULL, even for
474 * non root switches (on the NHI port remote is always NULL).
475 *
476 * Return: Returns the upstream port of the switch.
477 */
478static inline struct tb_port *tb_upstream_port(struct tb_switch *sw)
479{
480 return &sw->ports[sw->config.upstream_port_number];
481}
482
Mika Westerbergdfe40ca2019-03-07 15:26:45 +0200483/**
484 * tb_is_upstream_port() - Is the port upstream facing
485 * @port: Port to check
486 *
487 * Returns true if @port is upstream facing port. In case of dual link
488 * ports both return true.
489 */
490static inline bool tb_is_upstream_port(const struct tb_port *port)
491{
492 const struct tb_port *upstream_port = tb_upstream_port(port->sw);
493 return port == upstream_port || port->dual_link_port == upstream_port;
494}
495
Mika Westerbergb323a982019-03-06 19:23:38 +0200496static inline u64 tb_route(const struct tb_switch *sw)
Andreas Noevera25c8b22014-06-03 22:04:02 +0200497{
498 return ((u64) sw->config.route_hi) << 32 | sw->config.route_lo;
499}
500
Mika Westerbergf67cf492017-06-06 15:25:16 +0300501static inline struct tb_port *tb_port_at(u64 route, struct tb_switch *sw)
502{
503 u8 port;
504
505 port = route >> (sw->config.depth * 8);
506 if (WARN_ON(port > sw->config.max_port_number))
507 return NULL;
508 return &sw->ports[port];
509}
510
Mika Westerbergdfe40ca2019-03-07 15:26:45 +0200511/**
512 * tb_port_has_remote() - Does the port have switch connected downstream
513 * @port: Port to check
514 *
515 * Returns true only when the port is primary port and has remote set.
516 */
517static inline bool tb_port_has_remote(const struct tb_port *port)
518{
519 if (tb_is_upstream_port(port))
520 return false;
521 if (!port->remote)
522 return false;
523 if (port->dual_link_port && port->link_nr)
524 return false;
525
526 return true;
527}
528
Mika Westerberg344e0642017-10-11 17:19:54 +0300529static inline bool tb_port_is_null(const struct tb_port *port)
530{
531 return port && port->port && port->config.type == TB_TYPE_PORT;
532}
533
Mika Westerberga3cfebd2020-07-25 10:32:46 +0300534static inline bool tb_port_is_nhi(const struct tb_port *port)
535{
536 return port && port->config.type == TB_TYPE_NHI;
537}
538
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200539static inline bool tb_port_is_pcie_down(const struct tb_port *port)
540{
541 return port && port->config.type == TB_TYPE_PCIE_DOWN;
542}
543
Mika Westerberg0414bec2017-02-19 23:43:26 +0200544static inline bool tb_port_is_pcie_up(const struct tb_port *port)
545{
546 return port && port->config.type == TB_TYPE_PCIE_UP;
547}
548
Mika Westerberg4f807e42018-09-17 16:30:49 +0300549static inline bool tb_port_is_dpin(const struct tb_port *port)
550{
551 return port && port->config.type == TB_TYPE_DP_HDMI_IN;
552}
553
554static inline bool tb_port_is_dpout(const struct tb_port *port)
555{
556 return port && port->config.type == TB_TYPE_DP_HDMI_OUT;
557}
558
Rajmohan Manie6f81852019-12-17 15:33:44 +0300559static inline bool tb_port_is_usb3_down(const struct tb_port *port)
560{
561 return port && port->config.type == TB_TYPE_USB3_DOWN;
562}
563
564static inline bool tb_port_is_usb3_up(const struct tb_port *port)
565{
566 return port && port->config.type == TB_TYPE_USB3_UP;
567}
568
Andreas Noevera25c8b22014-06-03 22:04:02 +0200569static inline int tb_sw_read(struct tb_switch *sw, void *buffer,
570 enum tb_cfg_space space, u32 offset, u32 length)
571{
Mika Westerberg47083842019-03-19 17:07:37 +0200572 if (sw->is_unplugged)
573 return -ENODEV;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200574 return tb_cfg_read(sw->tb->ctl,
575 buffer,
576 tb_route(sw),
577 0,
578 space,
579 offset,
580 length);
581}
582
Mika Westerberg826c6a12019-07-01 18:41:51 +0300583static inline int tb_sw_write(struct tb_switch *sw, const void *buffer,
Andreas Noevera25c8b22014-06-03 22:04:02 +0200584 enum tb_cfg_space space, u32 offset, u32 length)
585{
Mika Westerberg47083842019-03-19 17:07:37 +0200586 if (sw->is_unplugged)
587 return -ENODEV;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200588 return tb_cfg_write(sw->tb->ctl,
589 buffer,
590 tb_route(sw),
591 0,
592 space,
593 offset,
594 length);
595}
596
597static inline int tb_port_read(struct tb_port *port, void *buffer,
598 enum tb_cfg_space space, u32 offset, u32 length)
599{
Mika Westerberg47083842019-03-19 17:07:37 +0200600 if (port->sw->is_unplugged)
601 return -ENODEV;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200602 return tb_cfg_read(port->sw->tb->ctl,
603 buffer,
604 tb_route(port->sw),
605 port->port,
606 space,
607 offset,
608 length);
609}
610
Mika Westerberg16a12582017-06-06 15:24:53 +0300611static inline int tb_port_write(struct tb_port *port, const void *buffer,
Andreas Noevera25c8b22014-06-03 22:04:02 +0200612 enum tb_cfg_space space, u32 offset, u32 length)
613{
Mika Westerberg47083842019-03-19 17:07:37 +0200614 if (port->sw->is_unplugged)
615 return -ENODEV;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200616 return tb_cfg_write(port->sw->tb->ctl,
617 buffer,
618 tb_route(port->sw),
619 port->port,
620 space,
621 offset,
622 length);
623}
624
625#define tb_err(tb, fmt, arg...) dev_err(&(tb)->nhi->pdev->dev, fmt, ## arg)
626#define tb_WARN(tb, fmt, arg...) dev_WARN(&(tb)->nhi->pdev->dev, fmt, ## arg)
627#define tb_warn(tb, fmt, arg...) dev_warn(&(tb)->nhi->pdev->dev, fmt, ## arg)
628#define tb_info(tb, fmt, arg...) dev_info(&(tb)->nhi->pdev->dev, fmt, ## arg)
Mika Westerbergdaa51402018-10-01 12:31:19 +0300629#define tb_dbg(tb, fmt, arg...) dev_dbg(&(tb)->nhi->pdev->dev, fmt, ## arg)
Andreas Noevera25c8b22014-06-03 22:04:02 +0200630
631#define __TB_SW_PRINT(level, sw, fmt, arg...) \
632 do { \
Mika Westerbergb323a982019-03-06 19:23:38 +0200633 const struct tb_switch *__sw = (sw); \
Andreas Noevera25c8b22014-06-03 22:04:02 +0200634 level(__sw->tb, "%llx: " fmt, \
635 tb_route(__sw), ## arg); \
636 } while (0)
637#define tb_sw_WARN(sw, fmt, arg...) __TB_SW_PRINT(tb_WARN, sw, fmt, ##arg)
638#define tb_sw_warn(sw, fmt, arg...) __TB_SW_PRINT(tb_warn, sw, fmt, ##arg)
639#define tb_sw_info(sw, fmt, arg...) __TB_SW_PRINT(tb_info, sw, fmt, ##arg)
Mika Westerbergdaa51402018-10-01 12:31:19 +0300640#define tb_sw_dbg(sw, fmt, arg...) __TB_SW_PRINT(tb_dbg, sw, fmt, ##arg)
Andreas Noevera25c8b22014-06-03 22:04:02 +0200641
642#define __TB_PORT_PRINT(level, _port, fmt, arg...) \
643 do { \
Mika Westerbergb323a982019-03-06 19:23:38 +0200644 const struct tb_port *__port = (_port); \
Andreas Noevera25c8b22014-06-03 22:04:02 +0200645 level(__port->sw->tb, "%llx:%x: " fmt, \
646 tb_route(__port->sw), __port->port, ## arg); \
647 } while (0)
648#define tb_port_WARN(port, fmt, arg...) \
649 __TB_PORT_PRINT(tb_WARN, port, fmt, ##arg)
650#define tb_port_warn(port, fmt, arg...) \
651 __TB_PORT_PRINT(tb_warn, port, fmt, ##arg)
652#define tb_port_info(port, fmt, arg...) \
653 __TB_PORT_PRINT(tb_info, port, fmt, ##arg)
Mika Westerbergdaa51402018-10-01 12:31:19 +0300654#define tb_port_dbg(port, fmt, arg...) \
655 __TB_PORT_PRINT(tb_dbg, port, fmt, ##arg)
Andreas Noevera25c8b22014-06-03 22:04:02 +0200656
Mika Westerbergf67cf492017-06-06 15:25:16 +0300657struct tb *icm_probe(struct tb_nhi *nhi);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300658struct tb *tb_probe(struct tb_nhi *nhi);
Andreas Noevera25c8b22014-06-03 22:04:02 +0200659
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300660extern struct device_type tb_domain_type;
Kranthi Kuntaladacb1282020-03-05 16:39:58 +0200661extern struct device_type tb_retimer_type;
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300662extern struct device_type tb_switch_type;
Mika Westerbergcae5f512021-04-01 17:34:20 +0300663extern struct device_type usb4_port_device_type;
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300664
665int tb_domain_init(void);
666void tb_domain_exit(void);
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300667int tb_xdomain_init(void);
668void tb_xdomain_exit(void);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300669
Mika Westerberg7f0a34d2020-12-29 13:44:57 +0200670struct tb *tb_domain_alloc(struct tb_nhi *nhi, int timeout_msec, size_t privsize);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300671int tb_domain_add(struct tb *tb);
672void tb_domain_remove(struct tb *tb);
673int tb_domain_suspend_noirq(struct tb *tb);
674int tb_domain_resume_noirq(struct tb *tb);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300675int tb_domain_suspend(struct tb *tb);
Mika Westerberg884e4d52020-08-31 13:05:14 +0300676int tb_domain_freeze_noirq(struct tb *tb);
677int tb_domain_thaw_noirq(struct tb *tb);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300678void tb_domain_complete(struct tb *tb);
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300679int tb_domain_runtime_suspend(struct tb *tb);
680int tb_domain_runtime_resume(struct tb *tb);
Mika Westerberg3da88be2020-11-10 11:47:14 +0300681int tb_domain_disapprove_switch(struct tb *tb, struct tb_switch *sw);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300682int tb_domain_approve_switch(struct tb *tb, struct tb_switch *sw);
683int tb_domain_approve_switch_key(struct tb *tb, struct tb_switch *sw);
684int tb_domain_challenge_switch_key(struct tb *tb, struct tb_switch *sw);
Mika Westerberge6b245c2017-06-06 15:25:17 +0300685int tb_domain_disconnect_pcie_paths(struct tb *tb);
Mika Westerberg180b0682021-01-08 16:25:39 +0200686int tb_domain_approve_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
687 int transmit_path, int transmit_ring,
688 int receive_path, int receive_ring);
689int tb_domain_disconnect_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
690 int transmit_path, int transmit_ring,
691 int receive_path, int receive_ring);
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300692int tb_domain_disconnect_all_paths(struct tb *tb);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300693
Mika Westerberg559c1e12018-10-22 14:47:01 +0300694static inline struct tb *tb_domain_get(struct tb *tb)
695{
696 if (tb)
697 get_device(&tb->dev);
698 return tb;
699}
700
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300701static inline void tb_domain_put(struct tb *tb)
702{
703 put_device(&tb->dev);
704}
Andreas Noeverd6cc51c2014-06-03 22:04:00 +0200705
Mika Westerberg719a5fe2020-03-05 11:37:15 +0200706struct tb_nvm *tb_nvm_alloc(struct device *dev);
707int tb_nvm_add_active(struct tb_nvm *nvm, size_t size, nvmem_reg_read_t reg_read);
708int tb_nvm_write_buf(struct tb_nvm *nvm, unsigned int offset, void *val,
709 size_t bytes);
710int tb_nvm_add_non_active(struct tb_nvm *nvm, size_t size,
711 nvmem_reg_write_t reg_write);
712void tb_nvm_free(struct tb_nvm *nvm);
713void tb_nvm_exit(void);
714
Mika Westerberg9b383032021-04-01 16:54:15 +0300715typedef int (*read_block_fn)(void *, unsigned int, void *, size_t);
716typedef int (*write_block_fn)(void *, unsigned int, const void *, size_t);
717
718int tb_nvm_read_data(unsigned int address, void *buf, size_t size,
719 unsigned int retries, read_block_fn read_block,
720 void *read_block_data);
721int tb_nvm_write_data(unsigned int address, const void *buf, size_t size,
722 unsigned int retries, write_block_fn write_next_block,
723 void *write_block_data);
724
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300725struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent,
726 u64 route);
Mika Westerberge6b245c2017-06-06 15:25:17 +0300727struct tb_switch *tb_switch_alloc_safe_mode(struct tb *tb,
728 struct device *parent, u64 route);
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300729int tb_switch_configure(struct tb_switch *sw);
730int tb_switch_add(struct tb_switch *sw);
731void tb_switch_remove(struct tb_switch *sw);
Mika Westerberg6ac6fae2020-06-05 14:25:02 +0300732void tb_switch_suspend(struct tb_switch *sw, bool runtime);
Andreas Noever23dd5bb2014-06-03 22:04:12 +0200733int tb_switch_resume(struct tb_switch *sw);
Mika Westerberg356b6c42019-09-19 15:25:30 +0300734int tb_switch_reset(struct tb_switch *sw);
Lukas Wunneraae20bb2016-03-20 13:57:20 +0100735void tb_sw_set_unplugged(struct tb_switch *sw);
Mika Westerberg386e5e22019-12-17 15:33:37 +0300736struct tb_port *tb_switch_find_port(struct tb_switch *sw,
737 enum tb_port_type type);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300738struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link,
739 u8 depth);
Christoph Hellwig7c39ffe2017-07-18 15:30:05 +0200740struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid);
Radion Mirchevsky8e9267b2017-10-04 15:24:14 +0300741struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300742
Mika Westerbergb433d012019-09-30 14:07:22 +0300743/**
744 * tb_switch_for_each_port() - Iterate over each switch port
745 * @sw: Switch whose ports to iterate
746 * @p: Port used as iterator
747 *
748 * Iterates over each switch port skipping the control port (port %0).
749 */
750#define tb_switch_for_each_port(sw, p) \
751 for ((p) = &(sw)->ports[1]; \
752 (p) <= &(sw)->ports[(sw)->config.max_port_number]; (p)++)
753
Mika Westerbergb6b0ea72017-10-04 15:19:20 +0300754static inline struct tb_switch *tb_switch_get(struct tb_switch *sw)
755{
756 if (sw)
757 get_device(&sw->dev);
758 return sw;
759}
760
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300761static inline void tb_switch_put(struct tb_switch *sw)
762{
763 put_device(&sw->dev);
764}
765
766static inline bool tb_is_switch(const struct device *dev)
767{
768 return dev->type == &tb_switch_type;
769}
770
771static inline struct tb_switch *tb_to_switch(struct device *dev)
772{
773 if (tb_is_switch(dev))
774 return container_of(dev, struct tb_switch, dev);
775 return NULL;
776}
777
Mika Westerberg0414bec2017-02-19 23:43:26 +0200778static inline struct tb_switch *tb_switch_parent(struct tb_switch *sw)
779{
780 return tb_to_switch(sw->dev.parent);
781}
782
Mika Westerberg17a8f812019-10-08 16:42:47 +0300783static inline bool tb_switch_is_light_ridge(const struct tb_switch *sw)
Mika Westerberg8b0110d2019-01-08 18:55:09 +0200784{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300785 return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
786 sw->config.device_id == PCI_DEVICE_ID_INTEL_LIGHT_RIDGE;
Mika Westerberg8b0110d2019-01-08 18:55:09 +0200787}
788
Mika Westerberg17a8f812019-10-08 16:42:47 +0300789static inline bool tb_switch_is_eagle_ridge(const struct tb_switch *sw)
Mika Westerberg8b0110d2019-01-08 18:55:09 +0200790{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300791 return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
792 sw->config.device_id == PCI_DEVICE_ID_INTEL_EAGLE_RIDGE;
Mika Westerberg8b0110d2019-01-08 18:55:09 +0200793}
794
Mika Westerberg17a8f812019-10-08 16:42:47 +0300795static inline bool tb_switch_is_cactus_ridge(const struct tb_switch *sw)
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200796{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300797 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
798 switch (sw->config.device_id) {
799 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C:
800 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C:
801 return true;
802 }
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200803 }
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300804 return false;
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200805}
806
Mika Westerberg17a8f812019-10-08 16:42:47 +0300807static inline bool tb_switch_is_falcon_ridge(const struct tb_switch *sw)
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200808{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300809 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
810 switch (sw->config.device_id) {
811 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE:
812 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE:
813 return true;
814 }
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200815 }
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300816 return false;
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200817}
818
Mika Westerberg7bffd97e2019-03-22 15:16:53 +0200819static inline bool tb_switch_is_alpine_ridge(const struct tb_switch *sw)
820{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300821 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
822 switch (sw->config.device_id) {
823 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE:
824 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE:
825 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE:
826 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE:
827 return true;
828 }
Mika Westerberg7bffd97e2019-03-22 15:16:53 +0200829 }
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300830 return false;
Mika Westerberg7bffd97e2019-03-22 15:16:53 +0200831}
832
833static inline bool tb_switch_is_titan_ridge(const struct tb_switch *sw)
834{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300835 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
836 switch (sw->config.device_id) {
837 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE:
838 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE:
839 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE:
840 return true;
841 }
Mika Westerberg7bffd97e2019-03-22 15:16:53 +0200842 }
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300843 return false;
Mika Westerberg7bffd97e2019-03-22 15:16:53 +0200844}
845
Mika Westerbergf07a3602019-06-25 15:10:01 +0300846/**
Mika Westerbergb0407982019-12-17 15:33:40 +0300847 * tb_switch_is_usb4() - Is the switch USB4 compliant
848 * @sw: Switch to check
849 *
850 * Returns true if the @sw is USB4 compliant router, false otherwise.
851 */
852static inline bool tb_switch_is_usb4(const struct tb_switch *sw)
853{
854 return sw->config.thunderbolt_version == USB4_VERSION_1_0;
855}
856
857/**
Mika Westerbergf07a3602019-06-25 15:10:01 +0300858 * tb_switch_is_icm() - Is the switch handled by ICM firmware
859 * @sw: Switch to check
860 *
861 * In case there is a need to differentiate whether ICM firmware or SW CM
862 * is handling @sw this function can be called. It is valid to call this
863 * after tb_switch_alloc() and tb_switch_configure() has been called
864 * (latter only for SW CM case).
865 */
866static inline bool tb_switch_is_icm(const struct tb_switch *sw)
867{
868 return !sw->config.enabled;
869}
870
Mika Westerberg91c0c122019-03-21 19:03:00 +0200871int tb_switch_lane_bonding_enable(struct tb_switch *sw);
872void tb_switch_lane_bonding_disable(struct tb_switch *sw);
Mika Westerbergde462032020-04-02 14:50:52 +0300873int tb_switch_configure_link(struct tb_switch *sw);
874void tb_switch_unconfigure_link(struct tb_switch *sw);
Mika Westerberg91c0c122019-03-21 19:03:00 +0200875
Mika Westerberg8afe9092019-03-26 15:52:30 +0300876bool tb_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
877int tb_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
878void tb_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
879
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300880int tb_switch_tmu_init(struct tb_switch *sw);
881int tb_switch_tmu_post_time(struct tb_switch *sw);
882int tb_switch_tmu_disable(struct tb_switch *sw);
883int tb_switch_tmu_enable(struct tb_switch *sw);
884
885static inline bool tb_switch_tmu_is_enabled(const struct tb_switch *sw)
886{
887 return sw->tmu.rate == TB_SWITCH_TMU_RATE_HIFI &&
888 !sw->tmu.unidirectional;
889}
890
Andreas Noever9da672a2014-06-03 22:04:05 +0200891int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged);
Andreas Noever520b6702014-06-03 22:04:07 +0200892int tb_port_add_nfc_credits(struct tb_port *port, int credits);
893int tb_port_clear_counter(struct tb_port *port, int counter);
Mika Westerbergb0407982019-12-17 15:33:40 +0300894int tb_port_unlock(struct tb_port *port);
Mika Westerberg341d4512020-02-21 12:11:54 +0200895int tb_port_enable(struct tb_port *port);
896int tb_port_disable(struct tb_port *port);
Mika Westerberg0b2863a2017-02-19 16:57:27 +0200897int tb_port_alloc_in_hopid(struct tb_port *port, int hopid, int max_hopid);
898void tb_port_release_in_hopid(struct tb_port *port, int hopid);
899int tb_port_alloc_out_hopid(struct tb_port *port, int hopid, int max_hopid);
900void tb_port_release_out_hopid(struct tb_port *port, int hopid);
Mika Westerbergfb19fac2017-02-19 21:51:30 +0200901struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end,
902 struct tb_port *prev);
Andreas Noever9da672a2014-06-03 22:04:05 +0200903
Mika Westerberg56ad3ae2021-03-10 13:34:12 +0200904static inline bool tb_port_use_credit_allocation(const struct tb_port *port)
905{
906 return tb_port_is_null(port) && port->sw->credit_allocation;
907}
908
Mika Westerbergc64c3f32020-04-29 17:07:59 +0300909/**
910 * tb_for_each_port_on_path() - Iterate over each port on path
911 * @src: Source port
912 * @dst: Destination port
913 * @p: Port used as iterator
914 *
915 * Walks over each port on path from @src to @dst.
916 */
917#define tb_for_each_port_on_path(src, dst, p) \
918 for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \
919 (p) = tb_next_port_on_path((src), (dst), (p)))
920
Mika Westerberg5b7b8c02020-05-08 12:41:34 +0300921int tb_port_get_link_speed(struct tb_port *port);
Isaac Hazan4210d502020-09-24 11:43:58 +0300922int tb_port_get_link_width(struct tb_port *port);
Isaac Hazan5cc0df92020-09-24 11:44:01 +0300923int tb_port_state(struct tb_port *port);
924int tb_port_lane_bonding_enable(struct tb_port *port);
925void tb_port_lane_bonding_disable(struct tb_port *port);
Mika Westerberge7051be2021-03-22 16:54:54 +0200926int tb_port_wait_for_link_width(struct tb_port *port, int width,
927 int timeout_msec);
Mika Westerberg69fea372021-03-22 17:01:59 +0200928int tb_port_update_credits(struct tb_port *port);
Mika Westerberg5b7b8c02020-05-08 12:41:34 +0300929
Mika Westerbergda2da042017-06-06 15:24:58 +0300930int tb_switch_find_vse_cap(struct tb_switch *sw, enum tb_switch_vse_cap vsec);
Rajmohan Maniaa43a9d2019-12-17 15:33:42 +0300931int tb_switch_find_cap(struct tb_switch *sw, enum tb_switch_cap cap);
Mika Westerberg6de057e2020-06-29 20:21:07 +0300932int tb_switch_next_cap(struct tb_switch *sw, unsigned int offset);
Mika Westerbergda2da042017-06-06 15:24:58 +0300933int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap);
Mika Westerberg3c8b2282020-06-29 20:15:17 +0300934int tb_port_next_cap(struct tb_port *port, unsigned int offset);
Mika Westerberge78db6f2017-10-12 16:45:50 +0300935bool tb_port_is_enabled(struct tb_port *port);
Andreas Noevere2b87852014-06-03 22:04:03 +0200936
Rajmohan Manie6f81852019-12-17 15:33:44 +0300937bool tb_usb3_port_is_enabled(struct tb_port *port);
938int tb_usb3_port_enable(struct tb_port *port, bool enable);
939
Mika Westerberg0414bec2017-02-19 23:43:26 +0200940bool tb_pci_port_is_enabled(struct tb_port *port);
Mika Westerberg93f36ad2017-02-19 13:48:29 +0200941int tb_pci_port_enable(struct tb_port *port, bool enable);
942
Mika Westerberg4f807e42018-09-17 16:30:49 +0300943int tb_dp_port_hpd_is_active(struct tb_port *port);
944int tb_dp_port_hpd_clear(struct tb_port *port);
945int tb_dp_port_set_hops(struct tb_port *port, unsigned int video,
946 unsigned int aux_tx, unsigned int aux_rx);
947bool tb_dp_port_is_enabled(struct tb_port *port);
948int tb_dp_port_enable(struct tb_port *port, bool enable);
949
Mika Westerberg0414bec2017-02-19 23:43:26 +0200950struct tb_path *tb_path_discover(struct tb_port *src, int src_hopid,
951 struct tb_port *dst, int dst_hopid,
952 struct tb_port **last, const char *name);
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200953struct tb_path *tb_path_alloc(struct tb *tb, struct tb_port *src, int src_hopid,
954 struct tb_port *dst, int dst_hopid, int link_nr,
955 const char *name);
Andreas Noever520b6702014-06-03 22:04:07 +0200956void tb_path_free(struct tb_path *path);
957int tb_path_activate(struct tb_path *path);
958void tb_path_deactivate(struct tb_path *path);
959bool tb_path_is_invalid(struct tb_path *path);
Mika Westerberg0bd680c2020-03-24 14:44:13 +0200960bool tb_path_port_on_path(const struct tb_path *path,
961 const struct tb_port *port);
Andreas Noever520b6702014-06-03 22:04:07 +0200962
Mika Westerberg6ed541c2021-03-22 18:09:35 +0200963/**
964 * tb_path_for_each_hop() - Iterate over each hop on path
965 * @path: Path whose hops to iterate
966 * @hop: Hop used as iterator
967 *
968 * Iterates over each hop on path.
969 */
970#define tb_path_for_each_hop(path, hop) \
971 for ((hop) = &(path)->hops[0]; \
972 (hop) <= &(path)->hops[(path)->path_length - 1]; (hop)++)
973
Andreas Noevercd22e732014-06-12 23:11:46 +0200974int tb_drom_read(struct tb_switch *sw);
975int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid);
Andreas Noeverc90553b2014-06-03 22:04:11 +0200976
Mika Westerberga9be5582019-01-09 16:42:12 +0200977int tb_lc_read_uuid(struct tb_switch *sw, u32 *uuid);
Mika Westerberge28178b2020-04-02 12:42:44 +0300978int tb_lc_configure_port(struct tb_port *port);
979void tb_lc_unconfigure_port(struct tb_port *port);
Mika Westerberg284652a2020-04-09 14:23:32 +0300980int tb_lc_configure_xdomain(struct tb_port *port);
981void tb_lc_unconfigure_xdomain(struct tb_port *port);
Mika Westerbergfdb08872020-11-26 12:52:43 +0300982int tb_lc_start_lane_initialization(struct tb_port *port);
Mika Westerbergb2911a52019-12-06 18:36:07 +0200983int tb_lc_set_wake(struct tb_switch *sw, unsigned int flags);
Mika Westerberg5480dfc2019-01-09 17:25:43 +0200984int tb_lc_set_sleep(struct tb_switch *sw);
Mika Westerberg91c0c122019-03-21 19:03:00 +0200985bool tb_lc_lane_bonding_possible(struct tb_switch *sw);
Mika Westerberg8afe9092019-03-26 15:52:30 +0300986bool tb_lc_dp_sink_query(struct tb_switch *sw, struct tb_port *in);
987int tb_lc_dp_sink_alloc(struct tb_switch *sw, struct tb_port *in);
988int tb_lc_dp_sink_dealloc(struct tb_switch *sw, struct tb_port *in);
Mario Limonciello1cb36292020-06-23 11:14:29 -0500989int tb_lc_force_power(struct tb_switch *sw);
Andreas Noevera25c8b22014-06-03 22:04:02 +0200990
991static inline int tb_route_length(u64 route)
992{
993 return (fls64(route) + TB_ROUTE_SHIFT - 1) / TB_ROUTE_SHIFT;
994}
995
Andreas Noever9da672a2014-06-03 22:04:05 +0200996/**
997 * tb_downstream_route() - get route to downstream switch
998 *
999 * Port must not be the upstream port (otherwise a loop is created).
1000 *
1001 * Return: Returns a route to the switch behind @port.
1002 */
1003static inline u64 tb_downstream_route(struct tb_port *port)
1004{
1005 return tb_route(port->sw)
1006 | ((u64) port->port << (port->sw->config.depth * 8));
1007}
1008
Mika Westerberg5ca67682020-10-22 13:22:06 +03001009bool tb_is_xdomain_enabled(void);
Mika Westerbergd1ff7022017-10-02 13:38:34 +03001010bool tb_xdomain_handle_request(struct tb *tb, enum tb_cfg_pkg_type type,
1011 const void *buf, size_t size);
1012struct tb_xdomain *tb_xdomain_alloc(struct tb *tb, struct device *parent,
1013 u64 route, const uuid_t *local_uuid,
1014 const uuid_t *remote_uuid);
1015void tb_xdomain_add(struct tb_xdomain *xd);
1016void tb_xdomain_remove(struct tb_xdomain *xd);
1017struct tb_xdomain *tb_xdomain_find_by_link_depth(struct tb *tb, u8 link,
1018 u8 depth);
1019
Kranthi Kuntaladacb1282020-03-05 16:39:58 +02001020int tb_retimer_scan(struct tb_port *port);
1021void tb_retimer_remove_all(struct tb_port *port);
1022
1023static inline bool tb_is_retimer(const struct device *dev)
1024{
1025 return dev->type == &tb_retimer_type;
1026}
1027
1028static inline struct tb_retimer *tb_to_retimer(struct device *dev)
1029{
1030 if (tb_is_retimer(dev))
1031 return container_of(dev, struct tb_retimer, dev);
1032 return NULL;
1033}
1034
Mika Westerbergb0407982019-12-17 15:33:40 +03001035int usb4_switch_setup(struct tb_switch *sw);
1036int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid);
1037int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
1038 size_t size);
Mika Westerbergb0407982019-12-17 15:33:40 +03001039bool usb4_switch_lane_bonding_possible(struct tb_switch *sw);
Mika Westerbergb2911a52019-12-06 18:36:07 +02001040int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags);
Mika Westerbergb0407982019-12-17 15:33:40 +03001041int usb4_switch_set_sleep(struct tb_switch *sw);
1042int usb4_switch_nvm_sector_size(struct tb_switch *sw);
1043int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
1044 size_t size);
1045int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
1046 const void *buf, size_t size);
1047int usb4_switch_nvm_authenticate(struct tb_switch *sw);
Mika Westerberg661b1942020-11-10 11:34:07 +03001048int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status);
Mika Westerberg56ad3ae2021-03-10 13:34:12 +02001049int usb4_switch_credits_init(struct tb_switch *sw);
Mika Westerbergb0407982019-12-17 15:33:40 +03001050bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
1051int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1052int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1053struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
1054 const struct tb_port *port);
Rajmohan Manie6f81852019-12-17 15:33:44 +03001055struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
1056 const struct tb_port *port);
Mika Westerbergcae5f512021-04-01 17:34:20 +03001057int usb4_switch_add_ports(struct tb_switch *sw);
1058void usb4_switch_remove_ports(struct tb_switch *sw);
Mika Westerbergb0407982019-12-17 15:33:40 +03001059
1060int usb4_port_unlock(struct tb_port *port);
Mika Westerberge28178b2020-04-02 12:42:44 +03001061int usb4_port_configure(struct tb_port *port);
1062void usb4_port_unconfigure(struct tb_port *port);
Mika Westerberg284652a2020-04-09 14:23:32 +03001063int usb4_port_configure_xdomain(struct tb_port *port);
1064void usb4_port_unconfigure_xdomain(struct tb_port *port);
Rajmohan Mani02d12852020-03-05 16:33:46 +02001065int usb4_port_enumerate_retimers(struct tb_port *port);
1066
1067int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1068 u8 size);
1069int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
1070 const void *buf, u8 size);
1071int usb4_port_retimer_is_last(struct tb_port *port, u8 index);
1072int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index);
1073int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index,
1074 unsigned int address, const void *buf,
1075 size_t size);
1076int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index);
1077int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1078 u32 *status);
1079int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1080 unsigned int address, void *buf, size_t size);
Mika Westerberg3b1d8d52020-02-21 23:14:41 +02001081
1082int usb4_usb3_port_max_link_rate(struct tb_port *port);
1083int usb4_usb3_port_actual_link_rate(struct tb_port *port);
1084int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
1085 int *downstream_bw);
1086int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
1087 int *downstream_bw);
1088int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
1089 int *downstream_bw);
Mario Limonciello1cb36292020-06-23 11:14:29 -05001090
Mika Westerbergcae5f512021-04-01 17:34:20 +03001091static inline bool tb_is_usb4_port_device(const struct device *dev)
1092{
1093 return dev->type == &usb4_port_device_type;
1094}
1095
1096static inline struct usb4_port *tb_to_usb4_port_device(struct device *dev)
1097{
1098 if (tb_is_usb4_port_device(dev))
1099 return container_of(dev, struct usb4_port, dev);
1100 return NULL;
1101}
1102
1103struct usb4_port *usb4_port_device_add(struct tb_port *port);
1104void usb4_port_device_remove(struct usb4_port *usb4);
1105
Mika Westerberg810278d2020-08-26 08:58:29 +03001106/* Keep link controller awake during update */
Mario Limonciello1cb36292020-06-23 11:14:29 -05001107#define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0)
1108
1109void tb_check_quirks(struct tb_switch *sw);
1110
Mika Westerbergb2be2b02019-04-02 15:26:00 +03001111#ifdef CONFIG_ACPI
1112void tb_acpi_add_links(struct tb_nhi *nhi);
Mika Westerbergc6da62a2020-02-18 16:14:42 +02001113
1114bool tb_acpi_is_native(void);
1115bool tb_acpi_may_tunnel_usb3(void);
1116bool tb_acpi_may_tunnel_dp(void);
1117bool tb_acpi_may_tunnel_pcie(void);
1118bool tb_acpi_is_xdomain_allowed(void);
Rajmohan Maniccc5cb82021-04-01 18:20:17 +03001119
1120int tb_acpi_init(void);
1121void tb_acpi_exit(void);
1122int tb_acpi_power_on_retimers(struct tb_port *port);
1123int tb_acpi_power_off_retimers(struct tb_port *port);
Mika Westerbergb2be2b02019-04-02 15:26:00 +03001124#else
1125static inline void tb_acpi_add_links(struct tb_nhi *nhi) { }
Mika Westerbergc6da62a2020-02-18 16:14:42 +02001126
1127static inline bool tb_acpi_is_native(void) { return true; }
1128static inline bool tb_acpi_may_tunnel_usb3(void) { return true; }
1129static inline bool tb_acpi_may_tunnel_dp(void) { return true; }
1130static inline bool tb_acpi_may_tunnel_pcie(void) { return true; }
1131static inline bool tb_acpi_is_xdomain_allowed(void) { return true; }
Rajmohan Maniccc5cb82021-04-01 18:20:17 +03001132
1133static inline int tb_acpi_init(void) { return 0; }
1134static inline void tb_acpi_exit(void) { }
1135static inline int tb_acpi_power_on_retimers(struct tb_port *port) { return 0; }
1136static inline int tb_acpi_power_off_retimers(struct tb_port *port) { return 0; }
Mika Westerbergb2be2b02019-04-02 15:26:00 +03001137#endif
1138
Gil Fine54e41812020-06-29 20:30:52 +03001139#ifdef CONFIG_DEBUG_FS
1140void tb_debugfs_init(void);
1141void tb_debugfs_exit(void);
1142void tb_switch_debugfs_init(struct tb_switch *sw);
1143void tb_switch_debugfs_remove(struct tb_switch *sw);
Mika Westerberg407ac932020-10-07 17:53:44 +03001144void tb_service_debugfs_init(struct tb_service *svc);
1145void tb_service_debugfs_remove(struct tb_service *svc);
Gil Fine54e41812020-06-29 20:30:52 +03001146#else
1147static inline void tb_debugfs_init(void) { }
1148static inline void tb_debugfs_exit(void) { }
1149static inline void tb_switch_debugfs_init(struct tb_switch *sw) { }
1150static inline void tb_switch_debugfs_remove(struct tb_switch *sw) { }
Mika Westerberg407ac932020-10-07 17:53:44 +03001151static inline void tb_service_debugfs_init(struct tb_service *svc) { }
1152static inline void tb_service_debugfs_remove(struct tb_service *svc) { }
Gil Fine54e41812020-06-29 20:30:52 +03001153#endif
1154
Mika Westerberg2c6ea4e2020-08-24 12:46:52 +03001155#ifdef CONFIG_USB4_KUNIT_TEST
1156int tb_test_init(void);
1157void tb_test_exit(void);
1158#else
1159static inline int tb_test_init(void) { return 0; }
1160static inline void tb_test_exit(void) { }
1161#endif
1162
Andreas Noeverd6cc51c2014-06-03 22:04:00 +02001163#endif