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Stephen Boyde1bd55e2018-12-11 09:57:48 -08001// SPDX-License-Identifier: GPL-2.0
Mike Turquette9d9f78e2012-03-15 23:11:20 -07002/*
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
5 *
Mike Turquette9d9f78e2012-03-15 23:11:20 -07006 * Fixed rate clock implementation
7 */
8
9#include <linux/clk-provider.h>
10#include <linux/module.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/err.h>
Grant Likely015ba402012-04-07 21:39:39 -050014#include <linux/of.h>
Ricardo Ribalda Delgado435779f2016-07-05 18:23:34 +020015#include <linux/platform_device.h>
Mike Turquette9d9f78e2012-03-15 23:11:20 -070016
17/*
18 * DOC: basic fixed-rate clock that cannot gate
19 *
20 * Traits of this clock:
21 * prepare - clk_(un)prepare only ensures parents are prepared
22 * enable - clk_enable only ensures parents are enabled
23 * rate - rate is always a fixed value. No clk_set_rate support
24 * parent - fixed parent. No clk_set_parent support
25 */
26
Stephen Boyd38d1e382019-08-30 08:09:15 -070027#define to_clk_fixed_rate(_hw) container_of(_hw, struct clk_fixed_rate, hw)
28
Mike Turquette9d9f78e2012-03-15 23:11:20 -070029static unsigned long clk_fixed_rate_recalc_rate(struct clk_hw *hw,
30 unsigned long parent_rate)
31{
32 return to_clk_fixed_rate(hw)->fixed_rate;
33}
Mike Turquette9d9f78e2012-03-15 23:11:20 -070034
Boris BREZILLON0903ea62013-12-21 10:34:48 +010035static unsigned long clk_fixed_rate_recalc_accuracy(struct clk_hw *hw,
36 unsigned long parent_accuracy)
37{
Stephen Boyd58f0c4b2019-08-30 08:09:18 -070038 struct clk_fixed_rate *fixed = to_clk_fixed_rate(hw);
39
40 if (fixed->flags & CLK_FIXED_RATE_PARENT_ACCURACY)
41 return parent_accuracy;
42
43 return fixed->fixed_accuracy;
Boris BREZILLON0903ea62013-12-21 10:34:48 +010044}
45
Shawn Guo822c2502012-03-27 15:23:22 +080046const struct clk_ops clk_fixed_rate_ops = {
Mike Turquette9d9f78e2012-03-15 23:11:20 -070047 .recalc_rate = clk_fixed_rate_recalc_rate,
Boris BREZILLON0903ea62013-12-21 10:34:48 +010048 .recalc_accuracy = clk_fixed_rate_recalc_accuracy,
Mike Turquette9d9f78e2012-03-15 23:11:20 -070049};
50EXPORT_SYMBOL_GPL(clk_fixed_rate_ops);
51
Stephen Boyd2d34f092019-08-30 08:09:17 -070052struct clk_hw *__clk_hw_register_fixed_rate(struct device *dev,
53 struct device_node *np, const char *name,
54 const char *parent_name, const struct clk_hw *parent_hw,
55 const struct clk_parent_data *parent_data, unsigned long flags,
56 unsigned long fixed_rate, unsigned long fixed_accuracy,
57 unsigned long clk_fixed_flags)
Mike Turquette9d9f78e2012-03-15 23:11:20 -070058{
59 struct clk_fixed_rate *fixed;
Stephen Boyd26ef56b2016-02-07 00:34:13 -080060 struct clk_hw *hw;
Manivannan Sadhasivamcc819cf2019-11-15 21:58:55 +053061 struct clk_init_data init = {};
Stephen Boyd2d34f092019-08-30 08:09:17 -070062 int ret = -EINVAL;
Mike Turquette9d9f78e2012-03-15 23:11:20 -070063
Mike Turquette27d54592012-03-26 17:51:03 -070064 /* allocate fixed-rate clock */
Stephen Boydd122db72015-05-14 16:47:10 -070065 fixed = kzalloc(sizeof(*fixed), GFP_KERNEL);
66 if (!fixed)
Mike Turquette9d9f78e2012-03-15 23:11:20 -070067 return ERR_PTR(-ENOMEM);
Mike Turquette9d9f78e2012-03-15 23:11:20 -070068
Saravana Kannan0197b3e2012-04-25 22:58:56 -070069 init.name = name;
70 init.ops = &clk_fixed_rate_ops;
Stephen Boyd90b6c5c2019-04-25 10:57:37 -070071 init.flags = flags;
Stephen Boyd2d34f092019-08-30 08:09:17 -070072 init.parent_names = parent_name ? &parent_name : NULL;
73 init.parent_hws = parent_hw ? &parent_hw : NULL;
74 init.parent_data = parent_data;
75 if (parent_name || parent_hw || parent_data)
76 init.num_parents = 1;
77 else
78 init.num_parents = 0;
Saravana Kannan0197b3e2012-04-25 22:58:56 -070079
Mike Turquette9d9f78e2012-03-15 23:11:20 -070080 /* struct clk_fixed_rate assignments */
Stephen Boyd2d34f092019-08-30 08:09:17 -070081 fixed->flags = clk_fixed_flags;
Mike Turquette9d9f78e2012-03-15 23:11:20 -070082 fixed->fixed_rate = fixed_rate;
Boris BREZILLON0903ea62013-12-21 10:34:48 +010083 fixed->fixed_accuracy = fixed_accuracy;
Saravana Kannan0197b3e2012-04-25 22:58:56 -070084 fixed->hw.init = &init;
Mike Turquette9d9f78e2012-03-15 23:11:20 -070085
Mike Turquette27d54592012-03-26 17:51:03 -070086 /* register the clock */
Stephen Boyd26ef56b2016-02-07 00:34:13 -080087 hw = &fixed->hw;
Stephen Boyd2d34f092019-08-30 08:09:17 -070088 if (dev || !np)
89 ret = clk_hw_register(dev, hw);
90 else if (np)
91 ret = of_clk_hw_register(np, hw);
Stephen Boyd26ef56b2016-02-07 00:34:13 -080092 if (ret) {
Mike Turquette27d54592012-03-26 17:51:03 -070093 kfree(fixed);
Stephen Boyd26ef56b2016-02-07 00:34:13 -080094 hw = ERR_PTR(ret);
95 }
Mike Turquette27d54592012-03-26 17:51:03 -070096
Stephen Boyd26ef56b2016-02-07 00:34:13 -080097 return hw;
98}
Stephen Boyd2d34f092019-08-30 08:09:17 -070099EXPORT_SYMBOL_GPL(__clk_hw_register_fixed_rate);
Stephen Boyd26ef56b2016-02-07 00:34:13 -0800100
Boris BREZILLON0903ea62013-12-21 10:34:48 +0100101struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
102 const char *parent_name, unsigned long flags,
103 unsigned long fixed_rate)
104{
Stephen Boyd576859d2019-08-30 08:09:14 -0700105 struct clk_hw *hw;
106
107 hw = clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name,
108 flags, fixed_rate, 0);
109 if (IS_ERR(hw))
110 return ERR_CAST(hw);
111 return hw->clk;
Boris BREZILLON0903ea62013-12-21 10:34:48 +0100112}
Stephen Boyd389ae052013-07-24 17:43:29 -0700113EXPORT_SYMBOL_GPL(clk_register_fixed_rate);
Grant Likely015ba402012-04-07 21:39:39 -0500114
Masahiro Yamada0b225e42016-01-06 13:25:10 +0900115void clk_unregister_fixed_rate(struct clk *clk)
116{
117 struct clk_hw *hw;
118
119 hw = __clk_get_hw(clk);
120 if (!hw)
121 return;
122
123 clk_unregister(clk);
124 kfree(to_clk_fixed_rate(hw));
125}
126EXPORT_SYMBOL_GPL(clk_unregister_fixed_rate);
127
Masahiro Yamada52445632016-05-22 14:33:35 +0900128void clk_hw_unregister_fixed_rate(struct clk_hw *hw)
129{
130 struct clk_fixed_rate *fixed;
131
132 fixed = to_clk_fixed_rate(hw);
133
134 clk_hw_unregister(hw);
135 kfree(fixed);
136}
137EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_rate);
138
Grant Likely015ba402012-04-07 21:39:39 -0500139#ifdef CONFIG_OF
Stephen Boyd34e01832019-08-30 08:09:13 -0700140static struct clk_hw *_of_fixed_clk_setup(struct device_node *node)
Grant Likely015ba402012-04-07 21:39:39 -0500141{
Stephen Boyd34e01832019-08-30 08:09:13 -0700142 struct clk_hw *hw;
Grant Likely015ba402012-04-07 21:39:39 -0500143 const char *clk_name = node->name;
144 u32 rate;
Boris BREZILLON0903ea62013-12-21 10:34:48 +0100145 u32 accuracy = 0;
Ricardo Ribalda Delgado435779f2016-07-05 18:23:34 +0200146 int ret;
Grant Likely015ba402012-04-07 21:39:39 -0500147
148 if (of_property_read_u32(node, "clock-frequency", &rate))
Ricardo Ribalda Delgado435779f2016-07-05 18:23:34 +0200149 return ERR_PTR(-EIO);
Grant Likely015ba402012-04-07 21:39:39 -0500150
Boris BREZILLON0903ea62013-12-21 10:34:48 +0100151 of_property_read_u32(node, "clock-accuracy", &accuracy);
152
Grant Likely015ba402012-04-07 21:39:39 -0500153 of_property_read_string(node, "clock-output-names", &clk_name);
154
Stephen Boyd34e01832019-08-30 08:09:13 -0700155 hw = clk_hw_register_fixed_rate_with_accuracy(NULL, clk_name, NULL,
Stephen Boydd3781a72016-03-01 11:00:12 -0800156 0, rate, accuracy);
Stephen Boyd34e01832019-08-30 08:09:13 -0700157 if (IS_ERR(hw))
158 return hw;
Ricardo Ribalda Delgado435779f2016-07-05 18:23:34 +0200159
Stephen Boyd34e01832019-08-30 08:09:13 -0700160 ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
Ricardo Ribalda Delgado435779f2016-07-05 18:23:34 +0200161 if (ret) {
Stephen Boyd34e01832019-08-30 08:09:13 -0700162 clk_hw_unregister_fixed_rate(hw);
Ricardo Ribalda Delgado435779f2016-07-05 18:23:34 +0200163 return ERR_PTR(ret);
164 }
165
Stephen Boyd34e01832019-08-30 08:09:13 -0700166 return hw;
Ricardo Ribalda Delgado435779f2016-07-05 18:23:34 +0200167}
168
169/**
170 * of_fixed_clk_setup() - Setup function for simple fixed rate clock
Krzysztof Kozlowski52ba4fa2020-09-16 18:17:36 +0200171 * @node: device node for the clock
Ricardo Ribalda Delgado435779f2016-07-05 18:23:34 +0200172 */
Stephen Boydd336e9a2016-08-12 18:50:23 -0700173void __init of_fixed_clk_setup(struct device_node *node)
Ricardo Ribalda Delgado435779f2016-07-05 18:23:34 +0200174{
175 _of_fixed_clk_setup(node);
Grant Likely015ba402012-04-07 21:39:39 -0500176}
Prashant Gaikwadf2f6c252013-01-04 12:30:52 +0530177CLK_OF_DECLARE(fixed_clk, "fixed-clock", of_fixed_clk_setup);
Ricardo Ribalda Delgado435779f2016-07-05 18:23:34 +0200178
179static int of_fixed_clk_remove(struct platform_device *pdev)
180{
Stephen Boyd34e01832019-08-30 08:09:13 -0700181 struct clk_hw *hw = platform_get_drvdata(pdev);
Ricardo Ribalda Delgado435779f2016-07-05 18:23:34 +0200182
Alan Tull52091c22018-10-18 14:54:11 -0500183 of_clk_del_provider(pdev->dev.of_node);
Stephen Boyd34e01832019-08-30 08:09:13 -0700184 clk_hw_unregister_fixed_rate(hw);
Ricardo Ribalda Delgado435779f2016-07-05 18:23:34 +0200185
186 return 0;
187}
188
189static int of_fixed_clk_probe(struct platform_device *pdev)
190{
Stephen Boyd34e01832019-08-30 08:09:13 -0700191 struct clk_hw *hw;
Ricardo Ribalda Delgado435779f2016-07-05 18:23:34 +0200192
193 /*
194 * This function is not executed when of_fixed_clk_setup
195 * succeeded.
196 */
Stephen Boyd34e01832019-08-30 08:09:13 -0700197 hw = _of_fixed_clk_setup(pdev->dev.of_node);
198 if (IS_ERR(hw))
199 return PTR_ERR(hw);
Ricardo Ribalda Delgado435779f2016-07-05 18:23:34 +0200200
Stephen Boyd34e01832019-08-30 08:09:13 -0700201 platform_set_drvdata(pdev, hw);
Ricardo Ribalda Delgado435779f2016-07-05 18:23:34 +0200202
203 return 0;
204}
205
206static const struct of_device_id of_fixed_clk_ids[] = {
207 { .compatible = "fixed-clock" },
208 { }
209};
Ricardo Ribalda Delgado435779f2016-07-05 18:23:34 +0200210
211static struct platform_driver of_fixed_clk_driver = {
212 .driver = {
213 .name = "of_fixed_clk",
214 .of_match_table = of_fixed_clk_ids,
215 },
216 .probe = of_fixed_clk_probe,
217 .remove = of_fixed_clk_remove,
218};
219builtin_platform_driver(of_fixed_clk_driver);
Grant Likely015ba402012-04-07 21:39:39 -0500220#endif