blob: 329671e66fe43ed0d754513b42aec74e49a20ac5 [file] [log] [blame]
Grygorii Strashko68cf0272019-04-26 20:12:23 +03001// SPDX-License-Identifier: GPL-2.0
Mugunthan V Ndf828592012-03-18 20:17:54 +00002/*
3 * Texas Instruments Ethernet Switch Driver
4 *
5 * Copyright (C) 2012 Texas Instruments
6 *
Mugunthan V Ndf828592012-03-18 20:17:54 +00007 */
8
9#include <linux/kernel.h>
10#include <linux/io.h>
11#include <linux/clk.h>
12#include <linux/timer.h>
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/irqreturn.h>
16#include <linux/interrupt.h>
17#include <linux/if_ether.h>
18#include <linux/etherdevice.h>
19#include <linux/netdevice.h>
Richard Cochran2e5b38a2012-10-29 08:45:20 +000020#include <linux/net_tstamp.h>
Mugunthan V Ndf828592012-03-18 20:17:54 +000021#include <linux/phy.h>
Grygorii Strashko3ff18842018-11-25 18:15:25 -060022#include <linux/phy/phy.h>
Mugunthan V Ndf828592012-03-18 20:17:54 +000023#include <linux/workqueue.h>
24#include <linux/delay.h>
Mugunthan V Nf150bd72012-07-17 08:09:50 +000025#include <linux/pm_runtime.h>
Arnd Bergmanne2b3e492018-05-30 23:51:54 +020026#include <linux/gpio/consumer.h>
Mugunthan V N2eb32b02012-07-30 10:17:14 +000027#include <linux/of.h>
Heiko Schocher9e42f712015-10-17 06:04:35 +020028#include <linux/of_mdio.h>
Mugunthan V N2eb32b02012-07-30 10:17:14 +000029#include <linux/of_net.h>
30#include <linux/of_device.h>
Mugunthan V N3b72c2f2013-02-05 08:26:48 +000031#include <linux/if_vlan.h>
Randy Dunlap514c6032018-04-05 16:25:34 -070032#include <linux/kmemleak.h>
Ivan Khoronzhuk9611d6d2018-05-17 01:21:45 +030033#include <linux/sys_soc.h>
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +030034#include <net/page_pool.h>
35#include <linux/bpf.h>
36#include <linux/bpf_trace.h>
37#include <linux/filter.h>
Mugunthan V Ndf828592012-03-18 20:17:54 +000038
Mugunthan V N739683b2013-06-06 23:45:14 +053039#include <linux/pinctrl/consumer.h>
Ivan Khoronzhuk7929a662018-07-24 00:26:31 +030040#include <net/pkt_cls.h>
Mugunthan V Ndf828592012-03-18 20:17:54 +000041
Mugunthan V Ndbe34722013-08-19 17:47:40 +053042#include "cpsw.h"
Mugunthan V Ndf828592012-03-18 20:17:54 +000043#include "cpsw_ale.h"
Grygorii Strashko814b4a62019-04-26 20:12:37 +030044#include "cpsw_priv.h"
Grygorii Strashkocfc08342019-04-26 20:12:41 +030045#include "cpsw_sl.h"
Richard Cochran2e5b38a2012-10-29 08:45:20 +000046#include "cpts.h"
Mugunthan V Ndf828592012-03-18 20:17:54 +000047#include "davinci_cpdma.h"
48
Ivan Khoronzhuk57d90142018-07-24 00:26:32 +030049#include <net/pkt_sched.h>
50
Mugunthan V Ndf828592012-03-18 20:17:54 +000051static int debug_level;
52module_param(debug_level, int, 0);
53MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)");
54
55static int ale_ageout = 10;
56module_param(ale_ageout, int, 0);
57MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)");
58
59static int rx_packet_max = CPSW_MAX_PACKET_SIZE;
60module_param(rx_packet_max, int, 0);
61MODULE_PARM_DESC(rx_packet_max, "maximum receive packet size (bytes)");
62
Grygorii Strashko90225bf2017-01-06 14:07:33 -060063static int descs_pool_size = CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT;
64module_param(descs_pool_size, int, 0444);
65MODULE_PARM_DESC(descs_pool_size, "Number of CPDMA CPPI descriptors in pool");
66
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +030067/* The buf includes headroom compatible with both skb and xdpf */
68#define CPSW_HEADROOM_NA (max(XDP_PACKET_HEADROOM, NET_SKB_PAD) + NET_IP_ALIGN)
69#define CPSW_HEADROOM ALIGN(CPSW_HEADROOM_NA, sizeof(long))
70
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +000071#define for_each_slave(priv, func, arg...) \
72 do { \
Sebastian Siewior6e6ceae2013-04-24 08:48:24 +000073 struct cpsw_slave *slave; \
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +030074 struct cpsw_common *cpsw = (priv)->cpsw; \
Sebastian Siewior6e6ceae2013-04-24 08:48:24 +000075 int n; \
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +030076 if (cpsw->data.dual_emac) \
77 (func)((cpsw)->slaves + priv->emac_port, ##arg);\
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +000078 else \
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +030079 for (n = cpsw->data.slaves, \
80 slave = cpsw->slaves; \
Sebastian Siewior6e6ceae2013-04-24 08:48:24 +000081 n; n--) \
82 (func)(slave++, ##arg); \
Mugunthan V Ndf828592012-03-18 20:17:54 +000083 } while (0)
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +000084
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +030085#define CPSW_XMETA_OFFSET ALIGN(sizeof(struct xdp_frame), sizeof(long))
86
87#define CPSW_XDP_CONSUMED 1
88#define CPSW_XDP_PASS 0
89
Ivan Khoronzhuk00fe4712018-11-08 22:27:57 +020090static int cpsw_ndo_vlan_rx_add_vid(struct net_device *ndev,
91 __be16 proto, u16 vid);
92
Mugunthan V N0cd8f9c2014-01-23 00:03:12 +053093static void cpsw_set_promiscious(struct net_device *ndev, bool enable)
94{
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +030095 struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
96 struct cpsw_ale *ale = cpsw->ale;
Mugunthan V N0cd8f9c2014-01-23 00:03:12 +053097 int i;
98
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +030099 if (cpsw->data.dual_emac) {
Mugunthan V N0cd8f9c2014-01-23 00:03:12 +0530100 bool flag = false;
101
102 /* Enabling promiscuous mode for one interface will be
103 * common for both the interface as the interface shares
104 * the same hardware resource.
105 */
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +0300106 for (i = 0; i < cpsw->data.slaves; i++)
107 if (cpsw->slaves[i].ndev->flags & IFF_PROMISC)
Mugunthan V N0cd8f9c2014-01-23 00:03:12 +0530108 flag = true;
109
110 if (!enable && flag) {
111 enable = true;
112 dev_err(&ndev->dev, "promiscuity not disabled as the other interface is still in promiscuity mode\n");
113 }
114
115 if (enable) {
116 /* Enable Bypass */
117 cpsw_ale_control_set(ale, 0, ALE_BYPASS, 1);
118
119 dev_dbg(&ndev->dev, "promiscuity enabled\n");
120 } else {
121 /* Disable Bypass */
122 cpsw_ale_control_set(ale, 0, ALE_BYPASS, 0);
123 dev_dbg(&ndev->dev, "promiscuity disabled\n");
124 }
125 } else {
126 if (enable) {
127 unsigned long timeout = jiffies + HZ;
128
Lennart Sorensen6f979eb2014-10-31 13:28:54 -0400129 /* Disable Learn for all ports (host is port 0 and slaves are port 1 and up */
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +0300130 for (i = 0; i <= cpsw->data.slaves; i++) {
Mugunthan V N0cd8f9c2014-01-23 00:03:12 +0530131 cpsw_ale_control_set(ale, i,
132 ALE_PORT_NOLEARN, 1);
133 cpsw_ale_control_set(ale, i,
134 ALE_PORT_NO_SA_UPDATE, 1);
135 }
136
137 /* Clear All Untouched entries */
138 cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1);
139 do {
140 cpu_relax();
141 if (cpsw_ale_control_get(ale, 0, ALE_AGEOUT))
142 break;
143 } while (time_after(timeout, jiffies));
144 cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1);
145
146 /* Clear all mcast from ALE */
Grygorii Strashko61f1cef2016-04-07 15:16:43 +0300147 cpsw_ale_flush_multicast(ale, ALE_ALL_PORTS, -1);
Ivan Khoronzhuk15180ec2018-11-08 22:27:56 +0200148 __hw_addr_ref_unsync_dev(&ndev->mc, ndev, NULL);
Mugunthan V N0cd8f9c2014-01-23 00:03:12 +0530149
150 /* Flood All Unicast Packets to Host port */
151 cpsw_ale_control_set(ale, 0, ALE_P0_UNI_FLOOD, 1);
152 dev_dbg(&ndev->dev, "promiscuity enabled\n");
153 } else {
Lennart Sorensen6f979eb2014-10-31 13:28:54 -0400154 /* Don't Flood All Unicast Packets to Host port */
Mugunthan V N0cd8f9c2014-01-23 00:03:12 +0530155 cpsw_ale_control_set(ale, 0, ALE_P0_UNI_FLOOD, 0);
156
Lennart Sorensen6f979eb2014-10-31 13:28:54 -0400157 /* Enable Learn for all ports (host is port 0 and slaves are port 1 and up */
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +0300158 for (i = 0; i <= cpsw->data.slaves; i++) {
Mugunthan V N0cd8f9c2014-01-23 00:03:12 +0530159 cpsw_ale_control_set(ale, i,
160 ALE_PORT_NOLEARN, 0);
161 cpsw_ale_control_set(ale, i,
162 ALE_PORT_NO_SA_UPDATE, 0);
163 }
164 dev_dbg(&ndev->dev, "promiscuity disabled\n");
165 }
166 }
167}
168
Ivan Khoronzhuk15180ec2018-11-08 22:27:56 +0200169/**
170 * cpsw_set_mc - adds multicast entry to the table if it's not added or deletes
171 * if it's not deleted
172 * @ndev: device to sync
173 * @addr: address to be added or deleted
174 * @vid: vlan id, if vid < 0 set/unset address for real device
175 * @add: add address if the flag is set or remove otherwise
176 */
177static int cpsw_set_mc(struct net_device *ndev, const u8 *addr,
178 int vid, int add)
Mugunthan V N5c50a852012-10-29 08:45:11 +0000179{
180 struct cpsw_priv *priv = netdev_priv(ndev);
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +0300181 struct cpsw_common *cpsw = priv->cpsw;
Ivan Khoronzhuk15180ec2018-11-08 22:27:56 +0200182 int mask, flags, ret;
Mugunthan V N25906052015-01-13 17:35:49 +0530183
Ivan Khoronzhuk15180ec2018-11-08 22:27:56 +0200184 if (vid < 0) {
185 if (cpsw->data.dual_emac)
186 vid = cpsw->slaves[priv->emac_port].port_vlan;
187 else
188 vid = 0;
Ivan Khoronzhuk5da19482018-10-12 18:28:15 +0300189 }
190
Ivan Khoronzhuk15180ec2018-11-08 22:27:56 +0200191 mask = cpsw->data.dual_emac ? ALE_PORT_HOST : ALE_ALL_PORTS;
192 flags = vid ? ALE_VLAN : 0;
193
194 if (add)
195 ret = cpsw_ale_add_mcast(cpsw->ale, addr, mask, flags, vid, 0);
196 else
197 ret = cpsw_ale_del_mcast(cpsw->ale, addr, 0, flags, vid);
198
199 return ret;
200}
201
202static int cpsw_update_vlan_mc(struct net_device *vdev, int vid, void *ctx)
203{
204 struct addr_sync_ctx *sync_ctx = ctx;
205 struct netdev_hw_addr *ha;
206 int found = 0, ret = 0;
207
208 if (!vdev || !(vdev->flags & IFF_UP))
209 return 0;
210
211 /* vlan address is relevant if its sync_cnt != 0 */
212 netdev_for_each_mc_addr(ha, vdev) {
213 if (ether_addr_equal(ha->addr, sync_ctx->addr)) {
214 found = ha->sync_cnt;
215 break;
216 }
217 }
218
219 if (found)
220 sync_ctx->consumed++;
221
222 if (sync_ctx->flush) {
223 if (!found)
224 cpsw_set_mc(sync_ctx->ndev, sync_ctx->addr, vid, 0);
225 return 0;
226 }
227
228 if (found)
229 ret = cpsw_set_mc(sync_ctx->ndev, sync_ctx->addr, vid, 1);
230
231 return ret;
232}
233
234static int cpsw_add_mc_addr(struct net_device *ndev, const u8 *addr, int num)
235{
236 struct addr_sync_ctx sync_ctx;
237 int ret;
238
239 sync_ctx.consumed = 0;
240 sync_ctx.addr = addr;
241 sync_ctx.ndev = ndev;
242 sync_ctx.flush = 0;
243
244 ret = vlan_for_each(ndev, cpsw_update_vlan_mc, &sync_ctx);
245 if (sync_ctx.consumed < num && !ret)
246 ret = cpsw_set_mc(ndev, addr, -1, 1);
247
248 return ret;
249}
250
251static int cpsw_del_mc_addr(struct net_device *ndev, const u8 *addr, int num)
252{
253 struct addr_sync_ctx sync_ctx;
254
255 sync_ctx.consumed = 0;
256 sync_ctx.addr = addr;
257 sync_ctx.ndev = ndev;
258 sync_ctx.flush = 1;
259
260 vlan_for_each(ndev, cpsw_update_vlan_mc, &sync_ctx);
261 if (sync_ctx.consumed == num)
262 cpsw_set_mc(ndev, addr, -1, 0);
263
264 return 0;
265}
266
267static int cpsw_purge_vlan_mc(struct net_device *vdev, int vid, void *ctx)
268{
269 struct addr_sync_ctx *sync_ctx = ctx;
270 struct netdev_hw_addr *ha;
271 int found = 0;
272
273 if (!vdev || !(vdev->flags & IFF_UP))
274 return 0;
275
276 /* vlan address is relevant if its sync_cnt != 0 */
277 netdev_for_each_mc_addr(ha, vdev) {
278 if (ether_addr_equal(ha->addr, sync_ctx->addr)) {
279 found = ha->sync_cnt;
280 break;
281 }
282 }
283
284 if (!found)
285 return 0;
286
287 sync_ctx->consumed++;
288 cpsw_set_mc(sync_ctx->ndev, sync_ctx->addr, vid, 0);
289 return 0;
290}
291
292static int cpsw_purge_all_mc(struct net_device *ndev, const u8 *addr, int num)
293{
294 struct addr_sync_ctx sync_ctx;
295
296 sync_ctx.addr = addr;
297 sync_ctx.ndev = ndev;
298 sync_ctx.consumed = 0;
299
300 vlan_for_each(ndev, cpsw_purge_vlan_mc, &sync_ctx);
301 if (sync_ctx.consumed < num)
302 cpsw_set_mc(ndev, addr, -1, 0);
303
Ivan Khoronzhuk5da19482018-10-12 18:28:15 +0300304 return 0;
305}
306
307static void cpsw_ndo_set_rx_mode(struct net_device *ndev)
308{
Grygorii Strashko06095f32019-04-26 20:12:33 +0300309 struct cpsw_priv *priv = netdev_priv(ndev);
310 struct cpsw_common *cpsw = priv->cpsw;
311 int slave_port = -1;
312
313 if (cpsw->data.dual_emac)
314 slave_port = priv->emac_port + 1;
Mugunthan V N5c50a852012-10-29 08:45:11 +0000315
316 if (ndev->flags & IFF_PROMISC) {
317 /* Enable promiscuous mode */
Mugunthan V N0cd8f9c2014-01-23 00:03:12 +0530318 cpsw_set_promiscious(ndev, true);
Grygorii Strashko06095f32019-04-26 20:12:33 +0300319 cpsw_ale_set_allmulti(cpsw->ale, IFF_ALLMULTI, slave_port);
Mugunthan V N5c50a852012-10-29 08:45:11 +0000320 return;
Mugunthan V N0cd8f9c2014-01-23 00:03:12 +0530321 } else {
322 /* Disable promiscuous mode */
323 cpsw_set_promiscious(ndev, false);
Mugunthan V N5c50a852012-10-29 08:45:11 +0000324 }
325
Lennart Sorensen1e5c4bc2014-10-31 13:38:52 -0400326 /* Restore allmulti on vlans if necessary */
Grygorii Strashko06095f32019-04-26 20:12:33 +0300327 cpsw_ale_set_allmulti(cpsw->ale,
328 ndev->flags & IFF_ALLMULTI, slave_port);
Lennart Sorensen1e5c4bc2014-10-31 13:38:52 -0400329
Ivan Khoronzhuk15180ec2018-11-08 22:27:56 +0200330 /* add/remove mcast address either for real netdev or for vlan */
331 __hw_addr_ref_sync_dev(&ndev->mc, ndev, cpsw_add_mc_addr,
332 cpsw_del_mc_addr);
Mugunthan V N5c50a852012-10-29 08:45:11 +0000333}
334
Grygorii Strashkoc24eef22019-04-26 20:12:42 +0300335void cpsw_intr_enable(struct cpsw_common *cpsw)
Mugunthan V Ndf828592012-03-18 20:17:54 +0000336{
Grygorii Strashkodda5f5fe2017-11-30 18:21:11 -0600337 writel_relaxed(0xFF, &cpsw->wr_regs->tx_en);
338 writel_relaxed(0xFF, &cpsw->wr_regs->rx_en);
Mugunthan V Ndf828592012-03-18 20:17:54 +0000339
Ivan Khoronzhuk2c836bd2016-08-10 02:22:40 +0300340 cpdma_ctlr_int_ctrl(cpsw->dma, true);
Mugunthan V Ndf828592012-03-18 20:17:54 +0000341 return;
342}
343
Grygorii Strashkoc24eef22019-04-26 20:12:42 +0300344void cpsw_intr_disable(struct cpsw_common *cpsw)
Mugunthan V Ndf828592012-03-18 20:17:54 +0000345{
Grygorii Strashkodda5f5fe2017-11-30 18:21:11 -0600346 writel_relaxed(0, &cpsw->wr_regs->tx_en);
347 writel_relaxed(0, &cpsw->wr_regs->rx_en);
Mugunthan V Ndf828592012-03-18 20:17:54 +0000348
Ivan Khoronzhuk2c836bd2016-08-10 02:22:40 +0300349 cpdma_ctlr_int_ctrl(cpsw->dma, false);
Mugunthan V Ndf828592012-03-18 20:17:54 +0000350 return;
351}
352
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +0300353static int cpsw_is_xdpf_handle(void *handle)
354{
355 return (unsigned long)handle & BIT(0);
356}
357
358static void *cpsw_xdpf_to_handle(struct xdp_frame *xdpf)
359{
360 return (void *)((unsigned long)xdpf | BIT(0));
361}
362
363static struct xdp_frame *cpsw_handle_to_xdpf(void *handle)
364{
365 return (struct xdp_frame *)((unsigned long)handle & ~BIT(0));
366}
367
368struct __aligned(sizeof(long)) cpsw_meta_xdp {
369 struct net_device *ndev;
370 int ch;
371};
372
Grygorii Strashkoc24eef22019-04-26 20:12:42 +0300373void cpsw_tx_handler(void *token, int len, int status)
Mugunthan V Ndf828592012-03-18 20:17:54 +0000374{
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +0300375 struct cpsw_meta_xdp *xmeta;
376 struct xdp_frame *xdpf;
377 struct net_device *ndev;
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +0300378 struct netdev_queue *txq;
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +0300379 struct sk_buff *skb;
380 int ch;
381
382 if (cpsw_is_xdpf_handle(token)) {
383 xdpf = cpsw_handle_to_xdpf(token);
384 xmeta = (void *)xdpf + CPSW_XMETA_OFFSET;
385 ndev = xmeta->ndev;
386 ch = xmeta->ch;
387 xdp_return_frame(xdpf);
388 } else {
389 skb = token;
390 ndev = skb->dev;
391 ch = skb_get_queue_mapping(skb);
392 cpts_tx_timestamp(ndev_to_cpsw(ndev)->cpts, skb);
393 dev_kfree_skb_any(skb);
394 }
Mugunthan V Ndf828592012-03-18 20:17:54 +0000395
Mugunthan V Nfae50822013-01-17 06:31:34 +0000396 /* Check whether the queue is stopped due to stalled tx dma, if the
397 * queue is stopped then start the queue as we have free desc for tx
398 */
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +0300399 txq = netdev_get_tx_queue(ndev, ch);
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +0300400 if (unlikely(netif_tx_queue_stopped(txq)))
401 netif_tx_wake_queue(txq);
402
Tobias Klauser8dc43dd2014-03-10 13:12:23 +0100403 ndev->stats.tx_packets++;
404 ndev->stats.tx_bytes += len;
Mugunthan V Ndf828592012-03-18 20:17:54 +0000405}
406
Grygorii Strashkoa3a41d22018-03-15 15:15:50 -0500407static void cpsw_rx_vlan_encap(struct sk_buff *skb)
408{
409 struct cpsw_priv *priv = netdev_priv(skb->dev);
410 struct cpsw_common *cpsw = priv->cpsw;
411 u32 rx_vlan_encap_hdr = *((u32 *)skb->data);
412 u16 vtag, vid, prio, pkt_type;
413
414 /* Remove VLAN header encapsulation word */
415 skb_pull(skb, CPSW_RX_VLAN_ENCAP_HDR_SIZE);
416
417 pkt_type = (rx_vlan_encap_hdr >>
418 CPSW_RX_VLAN_ENCAP_HDR_PKT_TYPE_SHIFT) &
419 CPSW_RX_VLAN_ENCAP_HDR_PKT_TYPE_MSK;
420 /* Ignore unknown & Priority-tagged packets*/
421 if (pkt_type == CPSW_RX_VLAN_ENCAP_HDR_PKT_RESERV ||
422 pkt_type == CPSW_RX_VLAN_ENCAP_HDR_PKT_PRIO_TAG)
423 return;
424
425 vid = (rx_vlan_encap_hdr >>
426 CPSW_RX_VLAN_ENCAP_HDR_VID_SHIFT) &
427 VLAN_VID_MASK;
428 /* Ignore vid 0 and pass packet as is */
429 if (!vid)
430 return;
431 /* Ignore default vlans in dual mac mode */
432 if (cpsw->data.dual_emac &&
433 vid == cpsw->slaves[priv->emac_port].port_vlan)
434 return;
435
436 prio = (rx_vlan_encap_hdr >>
437 CPSW_RX_VLAN_ENCAP_HDR_PRIO_SHIFT) &
438 CPSW_RX_VLAN_ENCAP_HDR_PRIO_MSK;
439
440 vtag = (prio << VLAN_PRIO_SHIFT) | vid;
441 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vtag);
442
443 /* strip vlan tag for VLAN-tagged packet */
444 if (pkt_type == CPSW_RX_VLAN_ENCAP_HDR_PKT_VLAN_TAG) {
445 memmove(skb->data + VLAN_HLEN, skb->data, 2 * ETH_ALEN);
446 skb_pull(skb, VLAN_HLEN);
447 }
448}
449
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +0300450static int cpsw_xdp_tx_frame(struct cpsw_priv *priv, struct xdp_frame *xdpf,
451 struct page *page)
Mugunthan V Ndf828592012-03-18 20:17:54 +0000452{
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +0300453 struct cpsw_common *cpsw = priv->cpsw;
454 struct cpsw_meta_xdp *xmeta;
455 struct cpdma_chan *txch;
456 dma_addr_t dma;
457 int ret, port;
Mugunthan V Ndf828592012-03-18 20:17:54 +0000458
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +0300459 xmeta = (void *)xdpf + CPSW_XMETA_OFFSET;
460 xmeta->ndev = priv->ndev;
461 xmeta->ch = 0;
462 txch = cpsw->txv[0].ch;
463
464 port = priv->emac_port + cpsw->data.dual_emac;
465 if (page) {
466 dma = page_pool_get_dma_addr(page);
467 dma += xdpf->headroom + sizeof(struct xdp_frame);
468 ret = cpdma_chan_submit_mapped(txch, cpsw_xdpf_to_handle(xdpf),
469 dma, xdpf->len, port);
470 } else {
471 if (sizeof(*xmeta) > xdpf->headroom) {
472 xdp_return_frame_rx_napi(xdpf);
473 return -EINVAL;
474 }
475
476 ret = cpdma_chan_submit(txch, cpsw_xdpf_to_handle(xdpf),
477 xdpf->data, xdpf->len, port);
478 }
479
480 if (ret) {
481 priv->ndev->stats.tx_dropped++;
482 xdp_return_frame_rx_napi(xdpf);
483 }
484
485 return ret;
486}
487
488static int cpsw_run_xdp(struct cpsw_priv *priv, int ch, struct xdp_buff *xdp,
489 struct page *page)
490{
491 struct cpsw_common *cpsw = priv->cpsw;
492 struct net_device *ndev = priv->ndev;
493 int ret = CPSW_XDP_CONSUMED;
494 struct xdp_frame *xdpf;
495 struct bpf_prog *prog;
496 u32 act;
497
498 rcu_read_lock();
499
500 prog = READ_ONCE(priv->xdp_prog);
501 if (!prog) {
502 ret = CPSW_XDP_PASS;
503 goto out;
504 }
505
506 act = bpf_prog_run_xdp(prog, xdp);
507 switch (act) {
508 case XDP_PASS:
509 ret = CPSW_XDP_PASS;
510 break;
511 case XDP_TX:
512 xdpf = convert_to_xdp_frame(xdp);
513 if (unlikely(!xdpf))
514 goto drop;
515
516 cpsw_xdp_tx_frame(priv, xdpf, page);
517 break;
518 case XDP_REDIRECT:
519 if (xdp_do_redirect(ndev, xdp, prog))
520 goto drop;
521
522 /* Have to flush here, per packet, instead of doing it in bulk
523 * at the end of the napi handler. The RX devices on this
524 * particular hardware is sharing a common queue, so the
525 * incoming device might change per packet.
526 */
527 xdp_do_flush_map();
528 break;
529 default:
530 bpf_warn_invalid_xdp_action(act);
531 /* fall through */
532 case XDP_ABORTED:
533 trace_xdp_exception(ndev, prog, act);
534 /* fall through -- handle aborts by dropping packet */
535 case XDP_DROP:
536 goto drop;
537 }
538out:
539 rcu_read_unlock();
540 return ret;
541drop:
542 rcu_read_unlock();
543 page_pool_recycle_direct(cpsw->page_pool[ch], page);
544 return ret;
545}
546
547static unsigned int cpsw_rxbuf_total_len(unsigned int len)
548{
549 len += CPSW_HEADROOM;
550 len += SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
551
552 return SKB_DATA_ALIGN(len);
553}
554
555static struct page_pool *cpsw_create_page_pool(struct cpsw_common *cpsw,
556 int size)
557{
558 struct page_pool_params pp_params;
559 struct page_pool *pool;
560
561 pp_params.order = 0;
562 pp_params.flags = PP_FLAG_DMA_MAP;
563 pp_params.pool_size = size;
564 pp_params.nid = NUMA_NO_NODE;
565 pp_params.dma_dir = DMA_BIDIRECTIONAL;
566 pp_params.dev = cpsw->dev;
567
568 pool = page_pool_create(&pp_params);
569 if (IS_ERR(pool))
570 dev_err(cpsw->dev, "cannot create rx page pool\n");
571
572 return pool;
573}
574
575static int cpsw_ndev_create_xdp_rxq(struct cpsw_priv *priv, int ch)
576{
577 struct cpsw_common *cpsw = priv->cpsw;
578 struct xdp_rxq_info *rxq;
579 struct page_pool *pool;
580 int ret;
581
582 pool = cpsw->page_pool[ch];
583 rxq = &priv->xdp_rxq[ch];
584
585 ret = xdp_rxq_info_reg(rxq, priv->ndev, ch);
586 if (ret)
587 return ret;
588
589 ret = xdp_rxq_info_reg_mem_model(rxq, MEM_TYPE_PAGE_POOL, pool);
590 if (ret)
591 xdp_rxq_info_unreg(rxq);
592
593 return ret;
594}
595
596static void cpsw_ndev_destroy_xdp_rxq(struct cpsw_priv *priv, int ch)
597{
598 struct xdp_rxq_info *rxq = &priv->xdp_rxq[ch];
599
600 if (!xdp_rxq_info_is_reg(rxq))
601 return;
602
603 xdp_rxq_info_unreg(rxq);
604}
605
606static int cpsw_create_rx_pool(struct cpsw_common *cpsw, int ch)
607{
608 struct page_pool *pool;
609 int ret = 0, pool_size;
610
611 pool_size = cpdma_chan_get_rx_buf_num(cpsw->rxv[ch].ch);
612 pool = cpsw_create_page_pool(cpsw, pool_size);
613 if (IS_ERR(pool))
614 ret = PTR_ERR(pool);
615 else
616 cpsw->page_pool[ch] = pool;
617
618 return ret;
619}
620
621void cpsw_destroy_xdp_rxqs(struct cpsw_common *cpsw)
622{
623 struct net_device *ndev;
624 int i, ch;
625
626 for (ch = 0; ch < cpsw->rx_ch_num; ch++) {
627 for (i = 0; i < cpsw->data.slaves; i++) {
628 ndev = cpsw->slaves[i].ndev;
629 if (!ndev)
630 continue;
631
632 cpsw_ndev_destroy_xdp_rxq(netdev_priv(ndev), ch);
633 }
634
635 page_pool_destroy(cpsw->page_pool[ch]);
636 cpsw->page_pool[ch] = NULL;
637 }
638}
639
640int cpsw_create_xdp_rxqs(struct cpsw_common *cpsw)
641{
642 struct net_device *ndev;
643 int i, ch, ret;
644
645 for (ch = 0; ch < cpsw->rx_ch_num; ch++) {
646 ret = cpsw_create_rx_pool(cpsw, ch);
647 if (ret)
648 goto err_cleanup;
649
650 /* using same page pool is allowed as no running rx handlers
651 * simultaneously for both ndevs
652 */
653 for (i = 0; i < cpsw->data.slaves; i++) {
654 ndev = cpsw->slaves[i].ndev;
655 if (!ndev)
656 continue;
657
658 ret = cpsw_ndev_create_xdp_rxq(netdev_priv(ndev), ch);
659 if (ret)
660 goto err_cleanup;
Ivan Khoronzhukfea49f62018-07-31 01:05:39 +0300661 }
662 }
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +0000663
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +0300664 return 0;
665
666err_cleanup:
667 cpsw_destroy_xdp_rxqs(cpsw);
668
669 return ret;
670}
671
672static void cpsw_rx_handler(void *token, int len, int status)
673{
674 struct page *new_page, *page = token;
675 void *pa = page_address(page);
676 struct cpsw_meta_xdp *xmeta = pa + CPSW_XMETA_OFFSET;
677 struct cpsw_common *cpsw = ndev_to_cpsw(xmeta->ndev);
678 int pkt_size = cpsw->rx_packet_max;
679 int ret = 0, port, ch = xmeta->ch;
680 int headroom = CPSW_HEADROOM;
681 struct net_device *ndev = xmeta->ndev;
682 struct cpsw_priv *priv;
683 struct page_pool *pool;
684 struct sk_buff *skb;
685 struct xdp_buff xdp;
686 dma_addr_t dma;
687
688 if (cpsw->data.dual_emac && status >= 0) {
689 port = CPDMA_RX_SOURCE_PORT(status);
690 if (port)
691 ndev = cpsw->slaves[--port].ndev;
692 }
693
694 priv = netdev_priv(ndev);
695 pool = cpsw->page_pool[ch];
Mugunthan V N16e5c572014-04-10 14:23:23 +0530696 if (unlikely(status < 0) || unlikely(!netif_running(ndev))) {
Ivan Khoronzhukfe734d02017-01-19 18:58:26 +0200697 /* In dual emac mode check for all interfaces */
Ivan Khoronzhukd5bc1612017-02-14 16:02:36 +0200698 if (cpsw->data.dual_emac && cpsw->usage_count &&
Ivan Khoronzhukfe734d02017-01-19 18:58:26 +0200699 (status >= 0)) {
Mugunthan V Na0e2c822014-09-10 16:38:09 +0530700 /* The packet received is for the interface which
701 * is already down and the other interface is up
Joe Perchesdbedd442015-03-06 20:49:12 -0800702 * and running, instead of freeing which results
Mugunthan V Na0e2c822014-09-10 16:38:09 +0530703 * in reducing of the number of rx descriptor in
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +0300704 * DMA engine, requeue page back to cpdma.
Mugunthan V Na0e2c822014-09-10 16:38:09 +0530705 */
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +0300706 new_page = page;
Mugunthan V Na0e2c822014-09-10 16:38:09 +0530707 goto requeue;
708 }
709
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +0300710 /* the interface is going down, pages are purged */
711 page_pool_recycle_direct(pool, page);
Mugunthan V Ndf828592012-03-18 20:17:54 +0000712 return;
713 }
Sebastian Siewiorb4727e62013-04-23 07:31:39 +0000714
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +0300715 new_page = page_pool_dev_alloc_pages(pool);
716 if (unlikely(!new_page)) {
717 new_page = page;
Tobias Klauser8dc43dd2014-03-10 13:12:23 +0100718 ndev->stats.rx_dropped++;
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +0300719 goto requeue;
Mugunthan V Ndf828592012-03-18 20:17:54 +0000720 }
721
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +0300722 if (priv->xdp_prog) {
723 if (status & CPDMA_RX_VLAN_ENCAP) {
724 xdp.data = pa + CPSW_HEADROOM +
725 CPSW_RX_VLAN_ENCAP_HDR_SIZE;
726 xdp.data_end = xdp.data + len -
727 CPSW_RX_VLAN_ENCAP_HDR_SIZE;
728 } else {
729 xdp.data = pa + CPSW_HEADROOM;
730 xdp.data_end = xdp.data + len;
731 }
732
733 xdp_set_data_meta_invalid(&xdp);
734
735 xdp.data_hard_start = pa;
736 xdp.rxq = &priv->xdp_rxq[ch];
737
738 ret = cpsw_run_xdp(priv, ch, &xdp, page);
739 if (ret != CPSW_XDP_PASS)
740 goto requeue;
741
742 /* XDP prog might have changed packet data and boundaries */
743 len = xdp.data_end - xdp.data;
744 headroom = xdp.data - xdp.data_hard_start;
745
746 /* XDP prog can modify vlan tag, so can't use encap header */
747 status &= ~CPDMA_RX_VLAN_ENCAP;
748 }
749
750 /* pass skb to netstack if no XDP prog or returned XDP_PASS */
751 skb = build_skb(pa, cpsw_rxbuf_total_len(pkt_size));
752 if (!skb) {
753 ndev->stats.rx_dropped++;
754 page_pool_recycle_direct(pool, page);
755 goto requeue;
756 }
757
758 skb_reserve(skb, headroom);
759 skb_put(skb, len);
760 skb->dev = ndev;
761 if (status & CPDMA_RX_VLAN_ENCAP)
762 cpsw_rx_vlan_encap(skb);
763 if (priv->rx_ts_enabled)
764 cpts_rx_timestamp(cpsw->cpts, skb);
765 skb->protocol = eth_type_trans(skb, ndev);
766
767 /* unmap page as no netstack skb page recycling */
768 page_pool_release_page(pool, page);
769 netif_receive_skb(skb);
770
771 ndev->stats.rx_bytes += len;
772 ndev->stats.rx_packets++;
773
Mugunthan V Na0e2c822014-09-10 16:38:09 +0530774requeue:
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +0300775 xmeta = page_address(new_page) + CPSW_XMETA_OFFSET;
776 xmeta->ndev = ndev;
777 xmeta->ch = ch;
778
779 dma = page_pool_get_dma_addr(new_page) + CPSW_HEADROOM;
780 ret = cpdma_chan_submit_mapped(cpsw->rxv[ch].ch, new_page, dma,
781 pkt_size, 0);
Ivan Khoronzhuk871e8462019-06-15 14:01:32 +0300782 if (ret < 0) {
783 WARN_ON(ret == -ENOMEM);
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +0300784 page_pool_recycle_direct(pool, new_page);
Ivan Khoronzhuk871e8462019-06-15 14:01:32 +0300785 }
Mugunthan V Ndf828592012-03-18 20:17:54 +0000786}
787
Grygorii Strashkoc24eef22019-04-26 20:12:42 +0300788void cpsw_split_res(struct cpsw_common *cpsw)
Ivan Khoronzhuk48e0a832016-12-06 03:45:00 +0200789{
Ivan Khoronzhuk32b78d82016-12-10 14:23:48 +0200790 u32 consumed_rate = 0, bigest_rate = 0;
Ivan Khoronzhuk48e0a832016-12-06 03:45:00 +0200791 struct cpsw_vector *txv = cpsw->txv;
Ivan Khoronzhuk32b78d82016-12-10 14:23:48 +0200792 int i, ch_weight, rlim_ch_num = 0;
Ivan Khoronzhuk48e0a832016-12-06 03:45:00 +0200793 int budget, bigest_rate_ch = 0;
Ivan Khoronzhuk48e0a832016-12-06 03:45:00 +0200794 u32 ch_rate, max_rate;
795 int ch_budget = 0;
796
Ivan Khoronzhuk48e0a832016-12-06 03:45:00 +0200797 for (i = 0; i < cpsw->tx_ch_num; i++) {
798 ch_rate = cpdma_chan_get_rate(txv[i].ch);
799 if (!ch_rate)
800 continue;
801
802 rlim_ch_num++;
803 consumed_rate += ch_rate;
804 }
805
806 if (cpsw->tx_ch_num == rlim_ch_num) {
807 max_rate = consumed_rate;
Ivan Khoronzhuk32b78d82016-12-10 14:23:48 +0200808 } else if (!rlim_ch_num) {
809 ch_budget = CPSW_POLL_WEIGHT / cpsw->tx_ch_num;
810 bigest_rate = 0;
811 max_rate = consumed_rate;
Ivan Khoronzhuk48e0a832016-12-06 03:45:00 +0200812 } else {
Ivan Khoronzhuk0be01b82016-12-10 14:23:49 +0200813 max_rate = cpsw->speed * 1000;
814
815 /* if max_rate is less then expected due to reduced link speed,
816 * split proportionally according next potential max speed
817 */
818 if (max_rate < consumed_rate)
819 max_rate *= 10;
820
821 if (max_rate < consumed_rate)
822 max_rate *= 10;
Ivan Khoronzhuk32b78d82016-12-10 14:23:48 +0200823
Ivan Khoronzhuk48e0a832016-12-06 03:45:00 +0200824 ch_budget = (consumed_rate * CPSW_POLL_WEIGHT) / max_rate;
825 ch_budget = (CPSW_POLL_WEIGHT - ch_budget) /
826 (cpsw->tx_ch_num - rlim_ch_num);
827 bigest_rate = (max_rate - consumed_rate) /
828 (cpsw->tx_ch_num - rlim_ch_num);
829 }
830
Ivan Khoronzhuk32b78d82016-12-10 14:23:48 +0200831 /* split tx weight/budget */
Ivan Khoronzhuk48e0a832016-12-06 03:45:00 +0200832 budget = CPSW_POLL_WEIGHT;
833 for (i = 0; i < cpsw->tx_ch_num; i++) {
834 ch_rate = cpdma_chan_get_rate(txv[i].ch);
835 if (ch_rate) {
836 txv[i].budget = (ch_rate * CPSW_POLL_WEIGHT) / max_rate;
837 if (!txv[i].budget)
Ivan Khoronzhuk32b78d82016-12-10 14:23:48 +0200838 txv[i].budget++;
Ivan Khoronzhuk48e0a832016-12-06 03:45:00 +0200839 if (ch_rate > bigest_rate) {
840 bigest_rate_ch = i;
841 bigest_rate = ch_rate;
842 }
Ivan Khoronzhuk32b78d82016-12-10 14:23:48 +0200843
844 ch_weight = (ch_rate * 100) / max_rate;
845 if (!ch_weight)
846 ch_weight++;
847 cpdma_chan_set_weight(cpsw->txv[i].ch, ch_weight);
Ivan Khoronzhuk48e0a832016-12-06 03:45:00 +0200848 } else {
849 txv[i].budget = ch_budget;
850 if (!bigest_rate_ch)
851 bigest_rate_ch = i;
Ivan Khoronzhuk32b78d82016-12-10 14:23:48 +0200852 cpdma_chan_set_weight(cpsw->txv[i].ch, 0);
Ivan Khoronzhuk48e0a832016-12-06 03:45:00 +0200853 }
854
855 budget -= txv[i].budget;
856 }
857
858 if (budget)
859 txv[bigest_rate_ch].budget += budget;
860
861 /* split rx budget */
862 budget = CPSW_POLL_WEIGHT;
863 ch_budget = budget / cpsw->rx_ch_num;
864 for (i = 0; i < cpsw->rx_ch_num; i++) {
865 cpsw->rxv[i].budget = ch_budget;
866 budget -= ch_budget;
867 }
868
869 if (budget)
870 cpsw->rxv[0].budget += budget;
871}
872
Felipe Balbic03abd82015-01-16 10:11:12 -0600873static irqreturn_t cpsw_tx_interrupt(int irq, void *dev_id)
Mugunthan V Ndf828592012-03-18 20:17:54 +0000874{
Ivan Khoronzhukdbc4ec52016-08-10 02:22:43 +0300875 struct cpsw_common *cpsw = dev_id;
Felipe Balbi7ce67a32015-01-02 16:15:59 -0600876
Ivan Khoronzhuk5d8d0d42016-08-10 02:22:39 +0300877 writel(0, &cpsw->wr_regs->tx_en);
Ivan Khoronzhuk2c836bd2016-08-10 02:22:40 +0300878 cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_TX);
Felipe Balbic03abd82015-01-16 10:11:12 -0600879
Ivan Khoronzhuke38b5a32016-08-10 02:22:41 +0300880 if (cpsw->quirk_irq) {
881 disable_irq_nosync(cpsw->irqs_table[1]);
882 cpsw->tx_irq_disabled = true;
Mugunthan V N7da11602015-08-12 15:22:53 +0530883 }
884
Ivan Khoronzhukdbc4ec52016-08-10 02:22:43 +0300885 napi_schedule(&cpsw->napi_tx);
Felipe Balbic03abd82015-01-16 10:11:12 -0600886 return IRQ_HANDLED;
887}
888
889static irqreturn_t cpsw_rx_interrupt(int irq, void *dev_id)
890{
Ivan Khoronzhukdbc4ec52016-08-10 02:22:43 +0300891 struct cpsw_common *cpsw = dev_id;
Felipe Balbic03abd82015-01-16 10:11:12 -0600892
Ivan Khoronzhuk2c836bd2016-08-10 02:22:40 +0300893 cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_RX);
Ivan Khoronzhuk5d8d0d42016-08-10 02:22:39 +0300894 writel(0, &cpsw->wr_regs->rx_en);
Sebastian Siewiorfd51cf12013-04-23 07:31:37 +0000895
Ivan Khoronzhuke38b5a32016-08-10 02:22:41 +0300896 if (cpsw->quirk_irq) {
897 disable_irq_nosync(cpsw->irqs_table[0]);
898 cpsw->rx_irq_disabled = true;
Mugunthan V N7da11602015-08-12 15:22:53 +0530899 }
900
Ivan Khoronzhukdbc4ec52016-08-10 02:22:43 +0300901 napi_schedule(&cpsw->napi_rx);
Mugunthan V Nd354eb82015-08-04 16:06:19 +0530902 return IRQ_HANDLED;
Mugunthan V Ndf828592012-03-18 20:17:54 +0000903}
904
Ivan Khoronzhuk9611d6d2018-05-17 01:21:45 +0300905static int cpsw_tx_mq_poll(struct napi_struct *napi_tx, int budget)
Mugunthan V Ndf828592012-03-18 20:17:54 +0000906{
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +0300907 u32 ch_map;
Ivan Khoronzhuk8feb0a12016-11-29 17:00:51 +0200908 int num_tx, cur_budget, ch;
Ivan Khoronzhukdbc4ec52016-08-10 02:22:43 +0300909 struct cpsw_common *cpsw = napi_to_cpsw(napi_tx);
Ivan Khoronzhuk8feb0a12016-11-29 17:00:51 +0200910 struct cpsw_vector *txv;
Mugunthan V N32a74322015-08-04 16:06:20 +0530911
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +0300912 /* process every unprocessed channel */
913 ch_map = cpdma_ctrl_txchs_state(cpsw->dma);
Ivan Khoronzhuk79b33252018-07-24 00:26:29 +0300914 for (ch = 0, num_tx = 0; ch_map & 0xff; ch_map <<= 1, ch++) {
915 if (!(ch_map & 0x80))
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +0300916 continue;
917
Ivan Khoronzhuk8feb0a12016-11-29 17:00:51 +0200918 txv = &cpsw->txv[ch];
919 if (unlikely(txv->budget > budget - num_tx))
920 cur_budget = budget - num_tx;
921 else
922 cur_budget = txv->budget;
923
924 num_tx += cpdma_chan_process(txv->ch, cur_budget);
Ivan Khoronzhuk342934a2016-11-29 17:00:50 +0200925 if (num_tx >= budget)
926 break;
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +0300927 }
928
Mugunthan V N32a74322015-08-04 16:06:20 +0530929 if (num_tx < budget) {
930 napi_complete(napi_tx);
Ivan Khoronzhuk5d8d0d42016-08-10 02:22:39 +0300931 writel(0xff, &cpsw->wr_regs->tx_en);
Ivan Khoronzhuk9611d6d2018-05-17 01:21:45 +0300932 }
933
934 return num_tx;
935}
936
937static int cpsw_tx_poll(struct napi_struct *napi_tx, int budget)
938{
939 struct cpsw_common *cpsw = napi_to_cpsw(napi_tx);
940 int num_tx;
941
942 num_tx = cpdma_chan_process(cpsw->txv[0].ch, budget);
943 if (num_tx < budget) {
944 napi_complete(napi_tx);
945 writel(0xff, &cpsw->wr_regs->tx_en);
946 if (cpsw->tx_irq_disabled) {
Ivan Khoronzhuke38b5a32016-08-10 02:22:41 +0300947 cpsw->tx_irq_disabled = false;
948 enable_irq(cpsw->irqs_table[1]);
Mugunthan V N7da11602015-08-12 15:22:53 +0530949 }
Mugunthan V N32a74322015-08-04 16:06:20 +0530950 }
951
Mugunthan V N32a74322015-08-04 16:06:20 +0530952 return num_tx;
953}
954
Ivan Khoronzhuk9611d6d2018-05-17 01:21:45 +0300955static int cpsw_rx_mq_poll(struct napi_struct *napi_rx, int budget)
Mugunthan V N32a74322015-08-04 16:06:20 +0530956{
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +0300957 u32 ch_map;
Ivan Khoronzhuk8feb0a12016-11-29 17:00:51 +0200958 int num_rx, cur_budget, ch;
Ivan Khoronzhukdbc4ec52016-08-10 02:22:43 +0300959 struct cpsw_common *cpsw = napi_to_cpsw(napi_rx);
Ivan Khoronzhuk8feb0a12016-11-29 17:00:51 +0200960 struct cpsw_vector *rxv;
Mugunthan V N510a1e722013-02-17 22:19:20 +0000961
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +0300962 /* process every unprocessed channel */
963 ch_map = cpdma_ctrl_rxchs_state(cpsw->dma);
Ivan Khoronzhuk342934a2016-11-29 17:00:50 +0200964 for (ch = 0, num_rx = 0; ch_map; ch_map >>= 1, ch++) {
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +0300965 if (!(ch_map & 0x01))
966 continue;
967
Ivan Khoronzhuk8feb0a12016-11-29 17:00:51 +0200968 rxv = &cpsw->rxv[ch];
969 if (unlikely(rxv->budget > budget - num_rx))
970 cur_budget = budget - num_rx;
971 else
972 cur_budget = rxv->budget;
973
974 num_rx += cpdma_chan_process(rxv->ch, cur_budget);
Ivan Khoronzhuk342934a2016-11-29 17:00:50 +0200975 if (num_rx >= budget)
976 break;
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +0300977 }
978
Mugunthan V N510a1e722013-02-17 22:19:20 +0000979 if (num_rx < budget) {
Eric Dumazet6ad20162017-01-30 08:22:01 -0800980 napi_complete_done(napi_rx, num_rx);
Ivan Khoronzhuk5d8d0d42016-08-10 02:22:39 +0300981 writel(0xff, &cpsw->wr_regs->rx_en);
Ivan Khoronzhuk9611d6d2018-05-17 01:21:45 +0300982 }
983
984 return num_rx;
985}
986
987static int cpsw_rx_poll(struct napi_struct *napi_rx, int budget)
988{
989 struct cpsw_common *cpsw = napi_to_cpsw(napi_rx);
990 int num_rx;
991
992 num_rx = cpdma_chan_process(cpsw->rxv[0].ch, budget);
993 if (num_rx < budget) {
994 napi_complete_done(napi_rx, num_rx);
995 writel(0xff, &cpsw->wr_regs->rx_en);
996 if (cpsw->rx_irq_disabled) {
Ivan Khoronzhuke38b5a32016-08-10 02:22:41 +0300997 cpsw->rx_irq_disabled = false;
998 enable_irq(cpsw->irqs_table[0]);
Mugunthan V N7da11602015-08-12 15:22:53 +0530999 }
Mugunthan V N510a1e722013-02-17 22:19:20 +00001000 }
Mugunthan V Ndf828592012-03-18 20:17:54 +00001001
Mugunthan V Ndf828592012-03-18 20:17:54 +00001002 return num_rx;
1003}
1004
1005static inline void soft_reset(const char *module, void __iomem *reg)
1006{
1007 unsigned long timeout = jiffies + HZ;
1008
Grygorii Strashkodda5f5fe2017-11-30 18:21:11 -06001009 writel_relaxed(1, reg);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001010 do {
1011 cpu_relax();
Grygorii Strashkodda5f5fe2017-11-30 18:21:11 -06001012 } while ((readl_relaxed(reg) & 1) && time_after(timeout, jiffies));
Mugunthan V Ndf828592012-03-18 20:17:54 +00001013
Grygorii Strashkodda5f5fe2017-11-30 18:21:11 -06001014 WARN(readl_relaxed(reg) & 1, "failed to soft-reset %s\n", module);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001015}
1016
Mugunthan V Ndf828592012-03-18 20:17:54 +00001017static void cpsw_set_slave_mac(struct cpsw_slave *slave,
1018 struct cpsw_priv *priv)
1019{
Richard Cochran9750a3a2012-10-29 08:45:15 +00001020 slave_write(slave, mac_hi(priv->mac_addr), SA_HI);
1021 slave_write(slave, mac_lo(priv->mac_addr), SA_LO);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001022}
1023
Ivan Khoronzhuk57d90142018-07-24 00:26:32 +03001024static bool cpsw_shp_is_off(struct cpsw_priv *priv)
1025{
1026 struct cpsw_common *cpsw = priv->cpsw;
1027 struct cpsw_slave *slave;
1028 u32 shift, mask, val;
1029
1030 val = readl_relaxed(&cpsw->regs->ptype);
1031
1032 slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)];
1033 shift = CPSW_FIFO_SHAPE_EN_SHIFT + 3 * slave->slave_num;
1034 mask = 7 << shift;
1035 val = val & mask;
1036
1037 return !val;
1038}
1039
1040static void cpsw_fifo_shp_on(struct cpsw_priv *priv, int fifo, int on)
1041{
1042 struct cpsw_common *cpsw = priv->cpsw;
1043 struct cpsw_slave *slave;
1044 u32 shift, mask, val;
1045
1046 val = readl_relaxed(&cpsw->regs->ptype);
1047
1048 slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)];
1049 shift = CPSW_FIFO_SHAPE_EN_SHIFT + 3 * slave->slave_num;
1050 mask = (1 << --fifo) << shift;
1051 val = on ? val | mask : val & ~mask;
1052
1053 writel_relaxed(val, &cpsw->regs->ptype);
1054}
1055
Mugunthan V Ndf828592012-03-18 20:17:54 +00001056static void _cpsw_adjust_link(struct cpsw_slave *slave,
1057 struct cpsw_priv *priv, bool *link)
1058{
1059 struct phy_device *phy = slave->phy;
1060 u32 mac_control = 0;
1061 u32 slave_port;
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03001062 struct cpsw_common *cpsw = priv->cpsw;
Mugunthan V Ndf828592012-03-18 20:17:54 +00001063
1064 if (!phy)
1065 return;
1066
Ivan Khoronzhuk6f1f5832016-08-10 02:22:34 +03001067 slave_port = cpsw_get_slave_port(slave->slave_num);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001068
1069 if (phy->link) {
Grygorii Strashkocfc08342019-04-26 20:12:41 +03001070 mac_control = CPSW_SL_CTL_GMII_EN;
1071
1072 if (phy->speed == 1000)
1073 mac_control |= CPSW_SL_CTL_GIG;
1074 if (phy->duplex)
1075 mac_control |= CPSW_SL_CTL_FULLDUPLEX;
1076
1077 /* set speed_in input in case RMII mode is used in 100Mbps */
1078 if (phy->speed == 100)
1079 mac_control |= CPSW_SL_CTL_IFCTL_A;
1080 /* in band mode only works in 10Mbps RGMII mode */
1081 else if ((phy->speed == 10) && phy_interface_is_rgmii(phy))
1082 mac_control |= CPSW_SL_CTL_EXT_EN; /* In Band mode */
1083
1084 if (priv->rx_pause)
1085 mac_control |= CPSW_SL_CTL_RX_FLOW_EN;
1086
1087 if (priv->tx_pause)
1088 mac_control |= CPSW_SL_CTL_TX_FLOW_EN;
1089
1090 if (mac_control != slave->mac_control)
1091 cpsw_sl_ctl_set(slave->mac_sl, mac_control);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001092
1093 /* enable forwarding */
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001094 cpsw_ale_control_set(cpsw->ale, slave_port,
Mugunthan V Ndf828592012-03-18 20:17:54 +00001095 ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
1096
Mugunthan V Ndf828592012-03-18 20:17:54 +00001097 *link = true;
Ivan Khoronzhuk57d90142018-07-24 00:26:32 +03001098
1099 if (priv->shp_cfg_speed &&
1100 priv->shp_cfg_speed != slave->phy->speed &&
1101 !cpsw_shp_is_off(priv))
1102 dev_warn(priv->dev,
1103 "Speed was changed, CBS shaper speeds are changed!");
Mugunthan V Ndf828592012-03-18 20:17:54 +00001104 } else {
1105 mac_control = 0;
1106 /* disable forwarding */
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001107 cpsw_ale_control_set(cpsw->ale, slave_port,
Mugunthan V Ndf828592012-03-18 20:17:54 +00001108 ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
Grygorii Strashkocfc08342019-04-26 20:12:41 +03001109
1110 cpsw_sl_wait_for_idle(slave->mac_sl, 100);
1111
1112 cpsw_sl_ctl_reset(slave->mac_sl);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001113 }
1114
Grygorii Strashkocfc08342019-04-26 20:12:41 +03001115 if (mac_control != slave->mac_control)
Mugunthan V Ndf828592012-03-18 20:17:54 +00001116 phy_print_status(phy);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001117
1118 slave->mac_control = mac_control;
1119}
1120
Ivan Khoronzhuk0be01b82016-12-10 14:23:49 +02001121static int cpsw_get_common_speed(struct cpsw_common *cpsw)
1122{
1123 int i, speed;
1124
1125 for (i = 0, speed = 0; i < cpsw->data.slaves; i++)
1126 if (cpsw->slaves[i].phy && cpsw->slaves[i].phy->link)
1127 speed += cpsw->slaves[i].phy->speed;
1128
1129 return speed;
1130}
1131
1132static int cpsw_need_resplit(struct cpsw_common *cpsw)
1133{
1134 int i, rlim_ch_num;
1135 int speed, ch_rate;
1136
1137 /* re-split resources only in case speed was changed */
1138 speed = cpsw_get_common_speed(cpsw);
1139 if (speed == cpsw->speed || !speed)
1140 return 0;
1141
1142 cpsw->speed = speed;
1143
1144 for (i = 0, rlim_ch_num = 0; i < cpsw->tx_ch_num; i++) {
1145 ch_rate = cpdma_chan_get_rate(cpsw->txv[i].ch);
1146 if (!ch_rate)
1147 break;
1148
1149 rlim_ch_num++;
1150 }
1151
1152 /* cases not dependent on speed */
1153 if (!rlim_ch_num || rlim_ch_num == cpsw->tx_ch_num)
1154 return 0;
1155
1156 return 1;
1157}
1158
Mugunthan V Ndf828592012-03-18 20:17:54 +00001159static void cpsw_adjust_link(struct net_device *ndev)
1160{
1161 struct cpsw_priv *priv = netdev_priv(ndev);
Ivan Khoronzhuk0be01b82016-12-10 14:23:49 +02001162 struct cpsw_common *cpsw = priv->cpsw;
Mugunthan V Ndf828592012-03-18 20:17:54 +00001163 bool link = false;
1164
1165 for_each_slave(priv, _cpsw_adjust_link, priv, &link);
1166
1167 if (link) {
Ivan Khoronzhuk0be01b82016-12-10 14:23:49 +02001168 if (cpsw_need_resplit(cpsw))
Grygorii Strashko9763a892019-04-26 20:12:26 +03001169 cpsw_split_res(cpsw);
Ivan Khoronzhuk0be01b82016-12-10 14:23:49 +02001170
Mugunthan V Ndf828592012-03-18 20:17:54 +00001171 netif_carrier_on(ndev);
1172 if (netif_running(ndev))
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001173 netif_tx_wake_all_queues(ndev);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001174 } else {
1175 netif_carrier_off(ndev);
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001176 netif_tx_stop_all_queues(ndev);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001177 }
1178}
1179
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001180static inline void cpsw_add_dual_emac_def_ale_entries(
1181 struct cpsw_priv *priv, struct cpsw_slave *slave,
1182 u32 slave_port)
1183{
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001184 struct cpsw_common *cpsw = priv->cpsw;
Grygorii Strashko71a2cbb2016-04-07 15:16:44 +03001185 u32 port_mask = 1 << slave_port | ALE_PORT_HOST;
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001186
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001187 if (cpsw->version == CPSW_VERSION_1)
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001188 slave_write(slave, slave->port_vlan, CPSW1_PORT_VLAN);
1189 else
1190 slave_write(slave, slave->port_vlan, CPSW2_PORT_VLAN);
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001191 cpsw_ale_add_vlan(cpsw->ale, slave->port_vlan, port_mask,
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001192 port_mask, port_mask, 0);
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001193 cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast,
Ivan Khoronzhuk5b3a5a12018-10-12 19:06:29 +03001194 ALE_PORT_HOST, ALE_VLAN, slave->port_vlan, 0);
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001195 cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr,
1196 HOST_PORT_NUM, ALE_VLAN |
1197 ALE_SECURE, slave->port_vlan);
Grygorii Strashko5e5add12018-05-01 12:41:22 -05001198 cpsw_ale_control_set(cpsw->ale, slave_port,
1199 ALE_PORT_DROP_UNKNOWN_VLAN, 1);
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001200}
1201
Daniel Mack1e7a2e22013-11-15 08:29:16 +01001202static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv)
1203{
Mugunthan V Ndf828592012-03-18 20:17:54 +00001204 u32 slave_port;
Sekhar Nori30c57f02017-04-03 17:34:28 +05301205 struct phy_device *phy;
Ivan Khoronzhuk649a1682016-08-10 02:22:37 +03001206 struct cpsw_common *cpsw = priv->cpsw;
Mugunthan V Ndf828592012-03-18 20:17:54 +00001207
Grygorii Strashkocfc08342019-04-26 20:12:41 +03001208 cpsw_sl_reset(slave->mac_sl, 100);
1209 cpsw_sl_ctl_reset(slave->mac_sl);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001210
1211 /* setup priority mapping */
Grygorii Strashkocfc08342019-04-26 20:12:41 +03001212 cpsw_sl_reg_write(slave->mac_sl, CPSW_SL_RX_PRI_MAP,
1213 RX_PRIORITY_MAPPING);
Richard Cochran9750a3a2012-10-29 08:45:15 +00001214
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001215 switch (cpsw->version) {
Richard Cochran9750a3a2012-10-29 08:45:15 +00001216 case CPSW_VERSION_1:
1217 slave_write(slave, TX_PRIORITY_MAPPING, CPSW1_TX_PRI_MAP);
Grygorii Strashko48f5bcc2017-05-08 14:21:21 -05001218 /* Increase RX FIFO size to 5 for supporting fullduplex
1219 * flow control mode
1220 */
1221 slave_write(slave,
1222 (CPSW_MAX_BLKS_TX << CPSW_MAX_BLKS_TX_SHIFT) |
1223 CPSW_MAX_BLKS_RX, CPSW1_MAX_BLKS);
Richard Cochran9750a3a2012-10-29 08:45:15 +00001224 break;
1225 case CPSW_VERSION_2:
Mugunthan V Nc193f362013-08-05 17:30:05 +05301226 case CPSW_VERSION_3:
Mugunthan V N926489b2013-08-12 17:11:15 +05301227 case CPSW_VERSION_4:
Richard Cochran9750a3a2012-10-29 08:45:15 +00001228 slave_write(slave, TX_PRIORITY_MAPPING, CPSW2_TX_PRI_MAP);
Grygorii Strashko48f5bcc2017-05-08 14:21:21 -05001229 /* Increase RX FIFO size to 5 for supporting fullduplex
1230 * flow control mode
1231 */
1232 slave_write(slave,
1233 (CPSW_MAX_BLKS_TX << CPSW_MAX_BLKS_TX_SHIFT) |
1234 CPSW_MAX_BLKS_RX, CPSW2_MAX_BLKS);
Richard Cochran9750a3a2012-10-29 08:45:15 +00001235 break;
1236 }
Mugunthan V Ndf828592012-03-18 20:17:54 +00001237
1238 /* setup max packet size, and mac address */
Grygorii Strashkocfc08342019-04-26 20:12:41 +03001239 cpsw_sl_reg_write(slave->mac_sl, CPSW_SL_RX_MAXLEN,
1240 cpsw->rx_packet_max);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001241 cpsw_set_slave_mac(slave, priv);
1242
1243 slave->mac_control = 0; /* no link yet */
1244
Ivan Khoronzhuk6f1f5832016-08-10 02:22:34 +03001245 slave_port = cpsw_get_slave_port(slave->slave_num);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001246
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03001247 if (cpsw->data.dual_emac)
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001248 cpsw_add_dual_emac_def_ale_entries(priv, slave, slave_port);
1249 else
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001250 cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast,
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001251 1 << slave_port, 0, 0, ALE_MCAST_FWD_2);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001252
David Rivshind733f7542016-04-27 21:32:31 -04001253 if (slave->data->phy_node) {
Sekhar Nori30c57f02017-04-03 17:34:28 +05301254 phy = of_phy_connect(priv->ndev, slave->data->phy_node,
Heiko Schocher9e42f712015-10-17 06:04:35 +02001255 &cpsw_adjust_link, 0, slave->data->phy_if);
Sekhar Nori30c57f02017-04-03 17:34:28 +05301256 if (!phy) {
Rob Herringf7ce9102017-07-18 16:43:19 -05001257 dev_err(priv->dev, "phy \"%pOF\" not found on slave %d\n",
1258 slave->data->phy_node,
David Rivshind733f7542016-04-27 21:32:31 -04001259 slave->slave_num);
1260 return;
1261 }
1262 } else {
Sekhar Nori30c57f02017-04-03 17:34:28 +05301263 phy = phy_connect(priv->ndev, slave->data->phy_id,
Florian Fainellif9a8f832013-01-14 00:52:52 +00001264 &cpsw_adjust_link, slave->data->phy_if);
Sekhar Nori30c57f02017-04-03 17:34:28 +05301265 if (IS_ERR(phy)) {
David Rivshind733f7542016-04-27 21:32:31 -04001266 dev_err(priv->dev,
1267 "phy \"%s\" not found on slave %d, err %ld\n",
1268 slave->data->phy_id, slave->slave_num,
Sekhar Nori30c57f02017-04-03 17:34:28 +05301269 PTR_ERR(phy));
David Rivshind733f7542016-04-27 21:32:31 -04001270 return;
1271 }
Mugunthan V Ndf828592012-03-18 20:17:54 +00001272 }
David Rivshind733f7542016-04-27 21:32:31 -04001273
Sekhar Nori30c57f02017-04-03 17:34:28 +05301274 slave->phy = phy;
1275
David Rivshind733f7542016-04-27 21:32:31 -04001276 phy_attached_info(slave->phy);
1277
1278 phy_start(slave->phy);
1279
1280 /* Configure GMII_SEL register */
Grygorii Strashko3ff18842018-11-25 18:15:25 -06001281 if (!IS_ERR(slave->data->ifphy))
1282 phy_set_mode_ext(slave->data->ifphy, PHY_MODE_ETHERNET,
1283 slave->data->phy_if);
1284 else
1285 cpsw_phy_sel(cpsw->dev, slave->phy->interface,
1286 slave->slave_num);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001287}
1288
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00001289static inline void cpsw_add_default_vlan(struct cpsw_priv *priv)
1290{
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03001291 struct cpsw_common *cpsw = priv->cpsw;
1292 const int vlan = cpsw->data.default_vlan;
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00001293 u32 reg;
1294 int i;
Lennart Sorensen1e5c4bc2014-10-31 13:38:52 -04001295 int unreg_mcast_mask;
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00001296
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001297 reg = (cpsw->version == CPSW_VERSION_1) ? CPSW1_PORT_VLAN :
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00001298 CPSW2_PORT_VLAN;
1299
Ivan Khoronzhuk5d8d0d42016-08-10 02:22:39 +03001300 writel(vlan, &cpsw->host_port_regs->port_vlan);
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00001301
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03001302 for (i = 0; i < cpsw->data.slaves; i++)
1303 slave_write(cpsw->slaves + i, vlan, reg);
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00001304
Lennart Sorensen1e5c4bc2014-10-31 13:38:52 -04001305 if (priv->ndev->flags & IFF_ALLMULTI)
1306 unreg_mcast_mask = ALE_ALL_PORTS;
1307 else
1308 unreg_mcast_mask = ALE_PORT_1 | ALE_PORT_2;
1309
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001310 cpsw_ale_add_vlan(cpsw->ale, vlan, ALE_ALL_PORTS,
Grygorii Strashko61f1cef2016-04-07 15:16:43 +03001311 ALE_ALL_PORTS, ALE_ALL_PORTS,
1312 unreg_mcast_mask);
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00001313}
1314
Mugunthan V Ndf828592012-03-18 20:17:54 +00001315static void cpsw_init_host_port(struct cpsw_priv *priv)
1316{
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001317 u32 fifo_mode;
Ivan Khoronzhuk5d8d0d42016-08-10 02:22:39 +03001318 u32 control_reg;
1319 struct cpsw_common *cpsw = priv->cpsw;
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00001320
Mugunthan V Ndf828592012-03-18 20:17:54 +00001321 /* soft reset the controller and initialize ale */
Ivan Khoronzhuk5d8d0d42016-08-10 02:22:39 +03001322 soft_reset("cpsw", &cpsw->regs->soft_reset);
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001323 cpsw_ale_start(cpsw->ale);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001324
1325 /* switch to vlan unaware mode */
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001326 cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, ALE_VLAN_AWARE,
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00001327 CPSW_ALE_VLAN_AWARE);
Ivan Khoronzhuk5d8d0d42016-08-10 02:22:39 +03001328 control_reg = readl(&cpsw->regs->control);
Grygorii Strashkoa3a41d22018-03-15 15:15:50 -05001329 control_reg |= CPSW_VLAN_AWARE | CPSW_RX_VLAN_ENCAP;
Ivan Khoronzhuk5d8d0d42016-08-10 02:22:39 +03001330 writel(control_reg, &cpsw->regs->control);
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03001331 fifo_mode = (cpsw->data.dual_emac) ? CPSW_FIFO_DUAL_MAC_MODE :
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001332 CPSW_FIFO_NORMAL_MODE;
Ivan Khoronzhuk5d8d0d42016-08-10 02:22:39 +03001333 writel(fifo_mode, &cpsw->host_port_regs->tx_in_ctl);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001334
1335 /* setup host port priority mapping */
Grygorii Strashkodda5f5fe2017-11-30 18:21:11 -06001336 writel_relaxed(CPDMA_TX_PRIORITY_MAP,
1337 &cpsw->host_port_regs->cpdma_tx_pri_map);
1338 writel_relaxed(0, &cpsw->host_port_regs->cpdma_rx_chan_map);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001339
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001340 cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM,
Mugunthan V Ndf828592012-03-18 20:17:54 +00001341 ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
1342
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03001343 if (!cpsw->data.dual_emac) {
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001344 cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM,
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001345 0, 0);
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001346 cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast,
Grygorii Strashko71a2cbb2016-04-07 15:16:44 +03001347 ALE_PORT_HOST, 0, 0, ALE_MCAST_FWD_2);
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001348 }
Mugunthan V Ndf828592012-03-18 20:17:54 +00001349}
1350
Grygorii Strashkoc24eef22019-04-26 20:12:42 +03001351int cpsw_fill_rx_channels(struct cpsw_priv *priv)
Ivan Khoronzhuk3802dce12016-08-22 21:18:24 +03001352{
1353 struct cpsw_common *cpsw = priv->cpsw;
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +03001354 struct cpsw_meta_xdp *xmeta;
1355 struct page_pool *pool;
1356 struct page *page;
Ivan Khoronzhuk3802dce12016-08-22 21:18:24 +03001357 int ch_buf_num;
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001358 int ch, i, ret;
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +03001359 dma_addr_t dma;
Ivan Khoronzhuk3802dce12016-08-22 21:18:24 +03001360
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001361 for (ch = 0; ch < cpsw->rx_ch_num; ch++) {
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +03001362 pool = cpsw->page_pool[ch];
Ivan Khoronzhuk8feb0a12016-11-29 17:00:51 +02001363 ch_buf_num = cpdma_chan_get_rx_buf_num(cpsw->rxv[ch].ch);
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001364 for (i = 0; i < ch_buf_num; i++) {
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +03001365 page = page_pool_dev_alloc_pages(pool);
1366 if (!page) {
1367 cpsw_err(priv, ifup, "allocate rx page err\n");
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001368 return -ENOMEM;
1369 }
1370
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +03001371 xmeta = page_address(page) + CPSW_XMETA_OFFSET;
1372 xmeta->ndev = priv->ndev;
1373 xmeta->ch = ch;
1374
1375 dma = page_pool_get_dma_addr(page) + CPSW_HEADROOM;
1376 ret = cpdma_chan_idle_submit_mapped(cpsw->rxv[ch].ch,
1377 page, dma,
1378 cpsw->rx_packet_max,
1379 0);
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001380 if (ret < 0) {
1381 cpsw_err(priv, ifup,
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +03001382 "cannot submit page to channel %d rx, error %d\n",
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001383 ch, ret);
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +03001384 page_pool_recycle_direct(pool, page);
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001385 return ret;
1386 }
Ivan Khoronzhuk3802dce12016-08-22 21:18:24 +03001387 }
1388
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001389 cpsw_info(priv, ifup, "ch %d rx, submitted %d descriptors\n",
1390 ch, ch_buf_num);
Ivan Khoronzhuk3802dce12016-08-22 21:18:24 +03001391 }
1392
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001393 return 0;
Ivan Khoronzhuk3802dce12016-08-22 21:18:24 +03001394}
1395
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001396static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_common *cpsw)
Sebastian Siewioraacebbf2013-04-23 07:31:36 +00001397{
Schuyler Patton3995d262014-03-03 16:19:06 +05301398 u32 slave_port;
1399
Ivan Khoronzhuk6f1f5832016-08-10 02:22:34 +03001400 slave_port = cpsw_get_slave_port(slave->slave_num);
Schuyler Patton3995d262014-03-03 16:19:06 +05301401
Sebastian Siewioraacebbf2013-04-23 07:31:36 +00001402 if (!slave->phy)
1403 return;
1404 phy_stop(slave->phy);
1405 phy_disconnect(slave->phy);
1406 slave->phy = NULL;
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001407 cpsw_ale_control_set(cpsw->ale, slave_port,
Schuyler Patton3995d262014-03-03 16:19:06 +05301408 ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
Grygorii Strashkocfc08342019-04-26 20:12:41 +03001409 cpsw_sl_reset(slave->mac_sl, 100);
1410 cpsw_sl_ctl_reset(slave->mac_sl);
Sebastian Siewioraacebbf2013-04-23 07:31:36 +00001411}
1412
Ivan Khoronzhuk7929a662018-07-24 00:26:31 +03001413static int cpsw_tc_to_fifo(int tc, int num_tc)
1414{
1415 if (tc == num_tc - 1)
1416 return 0;
1417
1418 return CPSW_FIFO_SHAPERS_NUM - tc;
1419}
1420
Ivan Khoronzhuk57d90142018-07-24 00:26:32 +03001421static int cpsw_set_fifo_bw(struct cpsw_priv *priv, int fifo, int bw)
1422{
1423 struct cpsw_common *cpsw = priv->cpsw;
1424 u32 val = 0, send_pct, shift;
1425 struct cpsw_slave *slave;
1426 int pct = 0, i;
1427
1428 if (bw > priv->shp_cfg_speed * 1000)
1429 goto err;
1430
1431 /* shaping has to stay enabled for highest fifos linearly
1432 * and fifo bw no more then interface can allow
1433 */
1434 slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)];
1435 send_pct = slave_read(slave, SEND_PERCENT);
1436 for (i = CPSW_FIFO_SHAPERS_NUM; i > 0; i--) {
1437 if (!bw) {
1438 if (i >= fifo || !priv->fifo_bw[i])
1439 continue;
1440
1441 dev_warn(priv->dev, "Prev FIFO%d is shaped", i);
1442 continue;
1443 }
1444
1445 if (!priv->fifo_bw[i] && i > fifo) {
1446 dev_err(priv->dev, "Upper FIFO%d is not shaped", i);
1447 return -EINVAL;
1448 }
1449
1450 shift = (i - 1) * 8;
1451 if (i == fifo) {
1452 send_pct &= ~(CPSW_PCT_MASK << shift);
1453 val = DIV_ROUND_UP(bw, priv->shp_cfg_speed * 10);
1454 if (!val)
1455 val = 1;
1456
1457 send_pct |= val << shift;
1458 pct += val;
1459 continue;
1460 }
1461
1462 if (priv->fifo_bw[i])
1463 pct += (send_pct >> shift) & CPSW_PCT_MASK;
1464 }
1465
1466 if (pct >= 100)
1467 goto err;
1468
1469 slave_write(slave, send_pct, SEND_PERCENT);
1470 priv->fifo_bw[fifo] = bw;
1471
1472 dev_warn(priv->dev, "set FIFO%d bw = %d\n", fifo,
1473 DIV_ROUND_CLOSEST(val * priv->shp_cfg_speed, 100));
1474
1475 return 0;
1476err:
1477 dev_err(priv->dev, "Bandwidth doesn't fit in tc configuration");
1478 return -EINVAL;
1479}
1480
1481static int cpsw_set_fifo_rlimit(struct cpsw_priv *priv, int fifo, int bw)
1482{
1483 struct cpsw_common *cpsw = priv->cpsw;
1484 struct cpsw_slave *slave;
1485 u32 tx_in_ctl_rg, val;
1486 int ret;
1487
1488 ret = cpsw_set_fifo_bw(priv, fifo, bw);
1489 if (ret)
1490 return ret;
1491
1492 slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)];
1493 tx_in_ctl_rg = cpsw->version == CPSW_VERSION_1 ?
1494 CPSW1_TX_IN_CTL : CPSW2_TX_IN_CTL;
1495
1496 if (!bw)
1497 cpsw_fifo_shp_on(priv, fifo, bw);
1498
1499 val = slave_read(slave, tx_in_ctl_rg);
1500 if (cpsw_shp_is_off(priv)) {
1501 /* disable FIFOs rate limited queues */
1502 val &= ~(0xf << CPSW_FIFO_RATE_EN_SHIFT);
1503
1504 /* set type of FIFO queues to normal priority mode */
1505 val &= ~(3 << CPSW_FIFO_QUEUE_TYPE_SHIFT);
1506
1507 /* set type of FIFO queues to be rate limited */
1508 if (bw)
1509 val |= 2 << CPSW_FIFO_QUEUE_TYPE_SHIFT;
1510 else
1511 priv->shp_cfg_speed = 0;
1512 }
1513
1514 /* toggle a FIFO rate limited queue */
1515 if (bw)
1516 val |= BIT(fifo + CPSW_FIFO_RATE_EN_SHIFT);
1517 else
1518 val &= ~BIT(fifo + CPSW_FIFO_RATE_EN_SHIFT);
1519 slave_write(slave, val, tx_in_ctl_rg);
1520
1521 /* FIFO transmit shape enable */
1522 cpsw_fifo_shp_on(priv, fifo, bw);
1523 return 0;
1524}
1525
1526/* Defaults:
1527 * class A - prio 3
1528 * class B - prio 2
1529 * shaping for class A should be set first
1530 */
1531static int cpsw_set_cbs(struct net_device *ndev,
1532 struct tc_cbs_qopt_offload *qopt)
1533{
1534 struct cpsw_priv *priv = netdev_priv(ndev);
1535 struct cpsw_common *cpsw = priv->cpsw;
1536 struct cpsw_slave *slave;
1537 int prev_speed = 0;
1538 int tc, ret, fifo;
1539 u32 bw = 0;
1540
1541 tc = netdev_txq_to_tc(priv->ndev, qopt->queue);
1542
1543 /* enable channels in backward order, as highest FIFOs must be rate
1544 * limited first and for compliance with CPDMA rate limited channels
1545 * that also used in bacward order. FIFO0 cannot be rate limited.
1546 */
1547 fifo = cpsw_tc_to_fifo(tc, ndev->num_tc);
1548 if (!fifo) {
1549 dev_err(priv->dev, "Last tc%d can't be rate limited", tc);
1550 return -EINVAL;
1551 }
1552
1553 /* do nothing, it's disabled anyway */
1554 if (!qopt->enable && !priv->fifo_bw[fifo])
1555 return 0;
1556
1557 /* shapers can be set if link speed is known */
1558 slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)];
1559 if (slave->phy && slave->phy->link) {
1560 if (priv->shp_cfg_speed &&
1561 priv->shp_cfg_speed != slave->phy->speed)
1562 prev_speed = priv->shp_cfg_speed;
1563
1564 priv->shp_cfg_speed = slave->phy->speed;
1565 }
1566
1567 if (!priv->shp_cfg_speed) {
1568 dev_err(priv->dev, "Link speed is not known");
1569 return -1;
1570 }
1571
1572 ret = pm_runtime_get_sync(cpsw->dev);
1573 if (ret < 0) {
1574 pm_runtime_put_noidle(cpsw->dev);
1575 return ret;
1576 }
1577
1578 bw = qopt->enable ? qopt->idleslope : 0;
1579 ret = cpsw_set_fifo_rlimit(priv, fifo, bw);
1580 if (ret) {
1581 priv->shp_cfg_speed = prev_speed;
1582 prev_speed = 0;
1583 }
1584
1585 if (bw && prev_speed)
1586 dev_warn(priv->dev,
1587 "Speed was changed, CBS shaper speeds are changed!");
1588
1589 pm_runtime_put_sync(cpsw->dev);
1590 return ret;
1591}
1592
Ivan Khoronzhuk4b4255e2018-07-24 00:26:33 +03001593static void cpsw_cbs_resume(struct cpsw_slave *slave, struct cpsw_priv *priv)
1594{
1595 int fifo, bw;
1596
1597 for (fifo = CPSW_FIFO_SHAPERS_NUM; fifo > 0; fifo--) {
1598 bw = priv->fifo_bw[fifo];
1599 if (!bw)
1600 continue;
1601
1602 cpsw_set_fifo_rlimit(priv, fifo, bw);
1603 }
1604}
1605
1606static void cpsw_mqprio_resume(struct cpsw_slave *slave, struct cpsw_priv *priv)
1607{
1608 struct cpsw_common *cpsw = priv->cpsw;
1609 u32 tx_prio_map = 0;
1610 int i, tc, fifo;
1611 u32 tx_prio_rg;
1612
1613 if (!priv->mqprio_hw)
1614 return;
1615
1616 for (i = 0; i < 8; i++) {
1617 tc = netdev_get_prio_tc_map(priv->ndev, i);
1618 fifo = CPSW_FIFO_SHAPERS_NUM - tc;
1619 tx_prio_map |= fifo << (4 * i);
1620 }
1621
1622 tx_prio_rg = cpsw->version == CPSW_VERSION_1 ?
1623 CPSW1_TX_PRI_MAP : CPSW2_TX_PRI_MAP;
1624
1625 slave_write(slave, tx_prio_map, tx_prio_rg);
1626}
1627
Ivan Khoronzhuk00fe4712018-11-08 22:27:57 +02001628static int cpsw_restore_vlans(struct net_device *vdev, int vid, void *arg)
1629{
1630 struct cpsw_priv *priv = arg;
1631
1632 if (!vdev)
1633 return 0;
1634
1635 cpsw_ndo_vlan_rx_add_vid(priv->ndev, 0, vid);
1636 return 0;
1637}
1638
Ivan Khoronzhuk4b4255e2018-07-24 00:26:33 +03001639/* restore resources after port reset */
1640static void cpsw_restore(struct cpsw_priv *priv)
1641{
Ivan Khoronzhuk00fe4712018-11-08 22:27:57 +02001642 /* restore vlan configurations */
1643 vlan_for_each(priv->ndev, cpsw_restore_vlans, priv);
1644
Ivan Khoronzhuk4b4255e2018-07-24 00:26:33 +03001645 /* restore MQPRIO offload */
1646 for_each_slave(priv, cpsw_mqprio_resume, priv);
1647
1648 /* restore CBS offload */
1649 for_each_slave(priv, cpsw_cbs_resume, priv);
1650}
1651
Mugunthan V Ndf828592012-03-18 20:17:54 +00001652static int cpsw_ndo_open(struct net_device *ndev)
1653{
1654 struct cpsw_priv *priv = netdev_priv(ndev);
Ivan Khoronzhuk649a1682016-08-10 02:22:37 +03001655 struct cpsw_common *cpsw = priv->cpsw;
Ivan Khoronzhuk3802dce12016-08-22 21:18:24 +03001656 int ret;
Mugunthan V Ndf828592012-03-18 20:17:54 +00001657 u32 reg;
1658
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03001659 ret = pm_runtime_get_sync(cpsw->dev);
Grygorii Strashko108a6532016-06-24 21:23:42 +03001660 if (ret < 0) {
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03001661 pm_runtime_put_noidle(cpsw->dev);
Grygorii Strashko108a6532016-06-24 21:23:42 +03001662 return ret;
1663 }
Grygorii Strashko3fa88c52016-04-19 21:09:49 +03001664
Mugunthan V Ndf828592012-03-18 20:17:54 +00001665 netif_carrier_off(ndev);
1666
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001667 /* Notify the stack of the actual queue counts. */
1668 ret = netif_set_real_num_tx_queues(ndev, cpsw->tx_ch_num);
1669 if (ret) {
1670 dev_err(priv->dev, "cannot set real number of tx queues\n");
1671 goto err_cleanup;
1672 }
1673
1674 ret = netif_set_real_num_rx_queues(ndev, cpsw->rx_ch_num);
1675 if (ret) {
1676 dev_err(priv->dev, "cannot set real number of rx queues\n");
1677 goto err_cleanup;
1678 }
1679
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001680 reg = cpsw->version;
Mugunthan V Ndf828592012-03-18 20:17:54 +00001681
1682 dev_info(priv->dev, "initializing cpsw version %d.%d (%d)\n",
1683 CPSW_MAJOR_VERSION(reg), CPSW_MINOR_VERSION(reg),
1684 CPSW_RTL_VERSION(reg));
1685
Ivan Khoronzhukd5bc1612017-02-14 16:02:36 +02001686 /* Initialize host and slave ports */
1687 if (!cpsw->usage_count)
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001688 cpsw_init_host_port(priv);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001689 for_each_slave(priv, cpsw_slave_open, priv);
1690
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00001691 /* Add default VLAN */
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03001692 if (!cpsw->data.dual_emac)
Mugunthan V Ne6afea02014-06-18 17:21:48 +05301693 cpsw_add_default_vlan(priv);
1694 else
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001695 cpsw_ale_add_vlan(cpsw->ale, cpsw->data.default_vlan,
Grygorii Strashko61f1cef2016-04-07 15:16:43 +03001696 ALE_ALL_PORTS, ALE_ALL_PORTS, 0, 0);
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00001697
Ivan Khoronzhukd5bc1612017-02-14 16:02:36 +02001698 /* initialize shared resources for every ndev */
1699 if (!cpsw->usage_count) {
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001700 /* disable priority elevation */
Grygorii Strashkodda5f5fe2017-11-30 18:21:11 -06001701 writel_relaxed(0, &cpsw->regs->ptype);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001702
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001703 /* enable statistics collection only on all ports */
Grygorii Strashkodda5f5fe2017-11-30 18:21:11 -06001704 writel_relaxed(0x7, &cpsw->regs->stat_port_en);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001705
Mugunthan V N1923d6e2014-09-08 22:54:02 +05301706 /* Enable internal fifo flow control */
Ivan Khoronzhuk5d8d0d42016-08-10 02:22:39 +03001707 writel(0x7, &cpsw->regs->flow_control);
Mugunthan V N1923d6e2014-09-08 22:54:02 +05301708
Ivan Khoronzhukdbc4ec52016-08-10 02:22:43 +03001709 napi_enable(&cpsw->napi_rx);
1710 napi_enable(&cpsw->napi_tx);
Mugunthan V Nd354eb82015-08-04 16:06:19 +05301711
Ivan Khoronzhuke38b5a32016-08-10 02:22:41 +03001712 if (cpsw->tx_irq_disabled) {
1713 cpsw->tx_irq_disabled = false;
1714 enable_irq(cpsw->irqs_table[1]);
Mugunthan V N7da11602015-08-12 15:22:53 +05301715 }
1716
Ivan Khoronzhuke38b5a32016-08-10 02:22:41 +03001717 if (cpsw->rx_irq_disabled) {
1718 cpsw->rx_irq_disabled = false;
1719 enable_irq(cpsw->irqs_table[0]);
Mugunthan V N7da11602015-08-12 15:22:53 +05301720 }
1721
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +03001722 /* create rxqs for both infs in dual mac as they use same pool
1723 * and must be destroyed together when no users.
1724 */
1725 ret = cpsw_create_xdp_rxqs(cpsw);
1726 if (ret < 0)
1727 goto err_cleanup;
1728
Ivan Khoronzhuk3802dce12016-08-22 21:18:24 +03001729 ret = cpsw_fill_rx_channels(priv);
1730 if (ret < 0)
1731 goto err_cleanup;
Mugunthan V Nf280e892013-12-11 22:09:05 -06001732
Grygorii Strashko8a2c9a52016-12-06 18:00:41 -06001733 if (cpts_register(cpsw->cpts))
Mugunthan V Nf280e892013-12-11 22:09:05 -06001734 dev_err(priv->dev, "error registering cpts device\n");
1735
Mugunthan V Ndf828592012-03-18 20:17:54 +00001736 }
Mugunthan V Ndf828592012-03-18 20:17:54 +00001737
Ivan Khoronzhuk4b4255e2018-07-24 00:26:33 +03001738 cpsw_restore(priv);
1739
Mugunthan V Nff5b8ef2013-03-11 23:16:37 +00001740 /* Enable Interrupt pacing if configured */
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001741 if (cpsw->coal_intvl != 0) {
Mugunthan V Nff5b8ef2013-03-11 23:16:37 +00001742 struct ethtool_coalesce coal;
1743
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001744 coal.rx_coalesce_usecs = cpsw->coal_intvl;
Mugunthan V Nff5b8ef2013-03-11 23:16:37 +00001745 cpsw_set_coalesce(ndev, &coal);
1746 }
1747
Ivan Khoronzhuk2c836bd2016-08-10 02:22:40 +03001748 cpdma_ctlr_start(cpsw->dma);
1749 cpsw_intr_enable(cpsw);
Ivan Khoronzhukd5bc1612017-02-14 16:02:36 +02001750 cpsw->usage_count++;
Mugunthan V Nf63a9752014-04-10 14:23:24 +05301751
Mugunthan V Ndf828592012-03-18 20:17:54 +00001752 return 0;
Mugunthan V Ndf828592012-03-18 20:17:54 +00001753
Sebastian Siewioraacebbf2013-04-23 07:31:36 +00001754err_cleanup:
Ivan Khoronzhuk02caced2019-05-28 20:45:19 +03001755 if (!cpsw->usage_count) {
1756 cpdma_ctlr_stop(cpsw->dma);
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +03001757 cpsw_destroy_xdp_rxqs(cpsw);
Ivan Khoronzhuk02caced2019-05-28 20:45:19 +03001758 }
1759
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +03001760 for_each_slave(priv, cpsw_slave_stop, cpsw);
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03001761 pm_runtime_put_sync(cpsw->dev);
Sebastian Siewioraacebbf2013-04-23 07:31:36 +00001762 netif_carrier_off(priv->ndev);
1763 return ret;
Mugunthan V Ndf828592012-03-18 20:17:54 +00001764}
1765
1766static int cpsw_ndo_stop(struct net_device *ndev)
1767{
1768 struct cpsw_priv *priv = netdev_priv(ndev);
Ivan Khoronzhuk649a1682016-08-10 02:22:37 +03001769 struct cpsw_common *cpsw = priv->cpsw;
Mugunthan V Ndf828592012-03-18 20:17:54 +00001770
1771 cpsw_info(priv, ifdown, "shutting down cpsw device\n");
Ivan Khoronzhuk15180ec2018-11-08 22:27:56 +02001772 __hw_addr_ref_unsync_dev(&ndev->mc, ndev, cpsw_purge_all_mc);
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001773 netif_tx_stop_all_queues(priv->ndev);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001774 netif_carrier_off(priv->ndev);
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001775
Ivan Khoronzhukd5bc1612017-02-14 16:02:36 +02001776 if (cpsw->usage_count <= 1) {
Ivan Khoronzhukdbc4ec52016-08-10 02:22:43 +03001777 napi_disable(&cpsw->napi_rx);
1778 napi_disable(&cpsw->napi_tx);
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001779 cpts_unregister(cpsw->cpts);
Ivan Khoronzhuk2c836bd2016-08-10 02:22:40 +03001780 cpsw_intr_disable(cpsw);
1781 cpdma_ctlr_stop(cpsw->dma);
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001782 cpsw_ale_stop(cpsw->ale);
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +03001783 cpsw_destroy_xdp_rxqs(cpsw);
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001784 }
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001785 for_each_slave(priv, cpsw_slave_stop, cpsw);
Ivan Khoronzhuk0be01b82016-12-10 14:23:49 +02001786
1787 if (cpsw_need_resplit(cpsw))
Grygorii Strashko9763a892019-04-26 20:12:26 +03001788 cpsw_split_res(cpsw);
Ivan Khoronzhuk0be01b82016-12-10 14:23:49 +02001789
Ivan Khoronzhukd5bc1612017-02-14 16:02:36 +02001790 cpsw->usage_count--;
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03001791 pm_runtime_put_sync(cpsw->dev);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001792 return 0;
1793}
1794
1795static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb,
1796 struct net_device *ndev)
1797{
1798 struct cpsw_priv *priv = netdev_priv(ndev);
Ivan Khoronzhuk2c836bd2016-08-10 02:22:40 +03001799 struct cpsw_common *cpsw = priv->cpsw;
Ivan Khoronzhukf44f8412017-06-27 16:58:52 +03001800 struct cpts *cpts = cpsw->cpts;
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001801 struct netdev_queue *txq;
1802 struct cpdma_chan *txch;
1803 int ret, q_idx;
Mugunthan V Ndf828592012-03-18 20:17:54 +00001804
Mugunthan V Ndf828592012-03-18 20:17:54 +00001805 if (skb_padto(skb, CPSW_MIN_PACKET_SIZE)) {
1806 cpsw_err(priv, tx_err, "packet pad failed\n");
Tobias Klauser8dc43dd2014-03-10 13:12:23 +01001807 ndev->stats.tx_dropped++;
Ivan Khoronzhuk1bf96052017-02-11 03:49:57 +02001808 return NET_XMIT_DROP;
Mugunthan V Ndf828592012-03-18 20:17:54 +00001809 }
1810
Mugunthan V N9232b162013-02-11 09:52:19 +00001811 if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02001812 priv->tx_ts_enabled && cpts_can_timestamp(cpts, skb))
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001813 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1814
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001815 q_idx = skb_get_queue_mapping(skb);
1816 if (q_idx >= cpsw->tx_ch_num)
1817 q_idx = q_idx % cpsw->tx_ch_num;
1818
Ivan Khoronzhuk8feb0a12016-11-29 17:00:51 +02001819 txch = cpsw->txv[q_idx].ch;
Grygorii Strashko62f94c22018-02-06 19:17:06 -06001820 txq = netdev_get_tx_queue(ndev, q_idx);
Grygorii Strashko10ae8052019-04-26 20:12:30 +03001821 skb_tx_timestamp(skb);
1822 ret = cpdma_chan_submit(txch, skb, skb->data, skb->len,
1823 priv->emac_port + cpsw->data.dual_emac);
Mugunthan V Ndf828592012-03-18 20:17:54 +00001824 if (unlikely(ret != 0)) {
1825 cpsw_err(priv, tx_err, "desc submit failed\n");
1826 goto fail;
1827 }
1828
Mugunthan V Nfae50822013-01-17 06:31:34 +00001829 /* If there is no more tx desc left free then we need to
1830 * tell the kernel to stop sending us tx frames.
1831 */
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001832 if (unlikely(!cpdma_check_free_tx_desc(txch))) {
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001833 netif_tx_stop_queue(txq);
Grygorii Strashko62f94c22018-02-06 19:17:06 -06001834
1835 /* Barrier, so that stop_queue visible to other cpus */
1836 smp_mb__after_atomic();
1837
1838 if (cpdma_check_free_tx_desc(txch))
1839 netif_tx_wake_queue(txq);
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001840 }
Mugunthan V Nfae50822013-01-17 06:31:34 +00001841
Mugunthan V Ndf828592012-03-18 20:17:54 +00001842 return NETDEV_TX_OK;
1843fail:
Tobias Klauser8dc43dd2014-03-10 13:12:23 +01001844 ndev->stats.tx_dropped++;
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03001845 netif_tx_stop_queue(txq);
Grygorii Strashko62f94c22018-02-06 19:17:06 -06001846
1847 /* Barrier, so that stop_queue visible to other cpus */
1848 smp_mb__after_atomic();
1849
1850 if (cpdma_check_free_tx_desc(txch))
1851 netif_tx_wake_queue(txq);
1852
Mugunthan V Ndf828592012-03-18 20:17:54 +00001853 return NETDEV_TX_BUSY;
1854}
1855
Grygorii Strashkoc8395d42016-12-06 18:00:34 -06001856#if IS_ENABLED(CONFIG_TI_CPTS)
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001857
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02001858static void cpsw_hwtstamp_v1(struct cpsw_priv *priv)
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001859{
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02001860 struct cpsw_common *cpsw = priv->cpsw;
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03001861 struct cpsw_slave *slave = &cpsw->slaves[cpsw->data.active_slave];
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001862 u32 ts_en, seq_id;
1863
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02001864 if (!priv->tx_ts_enabled && !priv->rx_ts_enabled) {
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001865 slave_write(slave, 0, CPSW1_TS_CTL);
1866 return;
1867 }
1868
1869 seq_id = (30 << CPSW_V1_SEQ_ID_OFS_SHIFT) | ETH_P_1588;
1870 ts_en = EVENT_MSG_BITS << CPSW_V1_MSG_TYPE_OFS;
1871
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02001872 if (priv->tx_ts_enabled)
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001873 ts_en |= CPSW_V1_TS_TX_EN;
1874
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02001875 if (priv->rx_ts_enabled)
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001876 ts_en |= CPSW_V1_TS_RX_EN;
1877
1878 slave_write(slave, ts_en, CPSW1_TS_CTL);
1879 slave_write(slave, seq_id, CPSW1_TS_SEQ_LTYPE);
1880}
1881
1882static void cpsw_hwtstamp_v2(struct cpsw_priv *priv)
1883{
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001884 struct cpsw_slave *slave;
Ivan Khoronzhuk5d8d0d42016-08-10 02:22:39 +03001885 struct cpsw_common *cpsw = priv->cpsw;
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001886 u32 ctrl, mtype;
1887
Ivan Khoronzhukcb7d78d02016-12-10 14:23:46 +02001888 slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)];
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00001889
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001890 ctrl = slave_read(slave, CPSW2_CONTROL);
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001891 switch (cpsw->version) {
George Cherian09c55372014-05-02 12:02:02 +05301892 case CPSW_VERSION_2:
1893 ctrl &= ~CTRL_V2_ALL_TS_MASK;
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001894
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02001895 if (priv->tx_ts_enabled)
George Cherian09c55372014-05-02 12:02:02 +05301896 ctrl |= CTRL_V2_TX_TS_BITS;
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001897
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02001898 if (priv->rx_ts_enabled)
George Cherian09c55372014-05-02 12:02:02 +05301899 ctrl |= CTRL_V2_RX_TS_BITS;
Richard Cochran26fe7eb2015-05-25 11:02:13 +02001900 break;
George Cherian09c55372014-05-02 12:02:02 +05301901 case CPSW_VERSION_3:
1902 default:
1903 ctrl &= ~CTRL_V3_ALL_TS_MASK;
1904
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02001905 if (priv->tx_ts_enabled)
George Cherian09c55372014-05-02 12:02:02 +05301906 ctrl |= CTRL_V3_TX_TS_BITS;
1907
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02001908 if (priv->rx_ts_enabled)
George Cherian09c55372014-05-02 12:02:02 +05301909 ctrl |= CTRL_V3_RX_TS_BITS;
Richard Cochran26fe7eb2015-05-25 11:02:13 +02001910 break;
George Cherian09c55372014-05-02 12:02:02 +05301911 }
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001912
1913 mtype = (30 << TS_SEQ_ID_OFFSET_SHIFT) | EVENT_MSG_BITS;
1914
1915 slave_write(slave, mtype, CPSW2_TS_SEQ_MTYPE);
1916 slave_write(slave, ctrl, CPSW2_CONTROL);
Grygorii Strashkodda5f5fe2017-11-30 18:21:11 -06001917 writel_relaxed(ETH_P_1588, &cpsw->regs->ts_ltype);
Ivan Khoronzhuk1ebb2442018-11-12 16:00:23 +02001918 writel_relaxed(ETH_P_8021Q, &cpsw->regs->vlan_ltype);
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001919}
1920
Ben Hutchingsa5b41452013-11-18 23:23:40 +00001921static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001922{
Mugunthan V N3177bf62012-11-27 07:53:40 +00001923 struct cpsw_priv *priv = netdev_priv(dev);
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001924 struct hwtstamp_config cfg;
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001925 struct cpsw_common *cpsw = priv->cpsw;
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001926
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001927 if (cpsw->version != CPSW_VERSION_1 &&
1928 cpsw->version != CPSW_VERSION_2 &&
1929 cpsw->version != CPSW_VERSION_3)
Ben Hutchings2ee91e52013-11-14 00:47:36 +00001930 return -EOPNOTSUPP;
1931
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001932 if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg)))
1933 return -EFAULT;
1934
1935 /* reserved for future extensions */
1936 if (cfg.flags)
1937 return -EINVAL;
1938
Ben Hutchings2ee91e52013-11-14 00:47:36 +00001939 if (cfg.tx_type != HWTSTAMP_TX_OFF && cfg.tx_type != HWTSTAMP_TX_ON)
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001940 return -ERANGE;
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001941
1942 switch (cfg.rx_filter) {
1943 case HWTSTAMP_FILTER_NONE:
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02001944 priv->rx_ts_enabled = 0;
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001945 break;
1946 case HWTSTAMP_FILTER_ALL:
Grygorii Strashkoe9523a52017-06-08 13:51:31 -05001947 case HWTSTAMP_FILTER_NTP_ALL:
1948 return -ERANGE;
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001949 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1950 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1951 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02001952 priv->rx_ts_enabled = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
Grygorii Strashkoe9523a52017-06-08 13:51:31 -05001953 cfg.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
1954 break;
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001955 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1956 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1957 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1958 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1959 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1960 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1961 case HWTSTAMP_FILTER_PTP_V2_EVENT:
1962 case HWTSTAMP_FILTER_PTP_V2_SYNC:
1963 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02001964 priv->rx_ts_enabled = HWTSTAMP_FILTER_PTP_V2_EVENT;
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001965 cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
1966 break;
1967 default:
1968 return -ERANGE;
1969 }
1970
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02001971 priv->tx_ts_enabled = cfg.tx_type == HWTSTAMP_TX_ON;
Ben Hutchings2ee91e52013-11-14 00:47:36 +00001972
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001973 switch (cpsw->version) {
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001974 case CPSW_VERSION_1:
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02001975 cpsw_hwtstamp_v1(priv);
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001976 break;
1977 case CPSW_VERSION_2:
George Cherianf7d403c2014-05-02 12:02:01 +05301978 case CPSW_VERSION_3:
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001979 cpsw_hwtstamp_v2(priv);
1980 break;
1981 default:
Ben Hutchings2ee91e52013-11-14 00:47:36 +00001982 WARN_ON(1);
Richard Cochran2e5b38a2012-10-29 08:45:20 +00001983 }
1984
1985 return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
1986}
1987
Ben Hutchingsa5b41452013-11-18 23:23:40 +00001988static int cpsw_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
1989{
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001990 struct cpsw_common *cpsw = ndev_to_cpsw(dev);
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02001991 struct cpsw_priv *priv = netdev_priv(dev);
Ben Hutchingsa5b41452013-11-18 23:23:40 +00001992 struct hwtstamp_config cfg;
1993
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03001994 if (cpsw->version != CPSW_VERSION_1 &&
1995 cpsw->version != CPSW_VERSION_2 &&
1996 cpsw->version != CPSW_VERSION_3)
Ben Hutchingsa5b41452013-11-18 23:23:40 +00001997 return -EOPNOTSUPP;
1998
1999 cfg.flags = 0;
Ivan Khoronzhuka9423122018-11-12 16:00:22 +02002000 cfg.tx_type = priv->tx_ts_enabled ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;
2001 cfg.rx_filter = priv->rx_ts_enabled;
Ben Hutchingsa5b41452013-11-18 23:23:40 +00002002
2003 return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
2004}
Grygorii Strashkoc8395d42016-12-06 18:00:34 -06002005#else
2006static int cpsw_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
2007{
2008 return -EOPNOTSUPP;
2009}
Ben Hutchingsa5b41452013-11-18 23:23:40 +00002010
Grygorii Strashkoc8395d42016-12-06 18:00:34 -06002011static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
2012{
2013 return -EOPNOTSUPP;
2014}
Richard Cochran2e5b38a2012-10-29 08:45:20 +00002015#endif /*CONFIG_TI_CPTS*/
2016
2017static int cpsw_ndo_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
2018{
Mugunthan V N11f2c982013-03-11 23:16:38 +00002019 struct cpsw_priv *priv = netdev_priv(dev);
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002020 struct cpsw_common *cpsw = priv->cpsw;
2021 int slave_no = cpsw_slave_index(cpsw, priv);
Mugunthan V N11f2c982013-03-11 23:16:38 +00002022
Richard Cochran2e5b38a2012-10-29 08:45:20 +00002023 if (!netif_running(dev))
2024 return -EINVAL;
2025
Mugunthan V N11f2c982013-03-11 23:16:38 +00002026 switch (cmd) {
Mugunthan V N11f2c982013-03-11 23:16:38 +00002027 case SIOCSHWTSTAMP:
Ben Hutchingsa5b41452013-11-18 23:23:40 +00002028 return cpsw_hwtstamp_set(dev, req);
2029 case SIOCGHWTSTAMP:
2030 return cpsw_hwtstamp_get(dev, req);
Mugunthan V N11f2c982013-03-11 23:16:38 +00002031 }
2032
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002033 if (!cpsw->slaves[slave_no].phy)
Stefan Sørensenc1b59942014-02-16 14:54:25 +01002034 return -EOPNOTSUPP;
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002035 return phy_mii_ioctl(cpsw->slaves[slave_no].phy, req, cmd);
Richard Cochran2e5b38a2012-10-29 08:45:20 +00002036}
2037
Mugunthan V Ndf828592012-03-18 20:17:54 +00002038static void cpsw_ndo_tx_timeout(struct net_device *ndev)
2039{
2040 struct cpsw_priv *priv = netdev_priv(ndev);
Ivan Khoronzhuk2c836bd2016-08-10 02:22:40 +03002041 struct cpsw_common *cpsw = priv->cpsw;
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03002042 int ch;
Mugunthan V Ndf828592012-03-18 20:17:54 +00002043
2044 cpsw_err(priv, tx_err, "transmit timeout, restarting dma\n");
Tobias Klauser8dc43dd2014-03-10 13:12:23 +01002045 ndev->stats.tx_errors++;
Ivan Khoronzhuk2c836bd2016-08-10 02:22:40 +03002046 cpsw_intr_disable(cpsw);
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03002047 for (ch = 0; ch < cpsw->tx_ch_num; ch++) {
Ivan Khoronzhuk8feb0a12016-11-29 17:00:51 +02002048 cpdma_chan_stop(cpsw->txv[ch].ch);
2049 cpdma_chan_start(cpsw->txv[ch].ch);
Ivan Khoronzhuke05107e2016-08-22 21:18:26 +03002050 }
2051
Ivan Khoronzhuk2c836bd2016-08-10 02:22:40 +03002052 cpsw_intr_enable(cpsw);
Grygorii Strashko75514b62017-03-31 18:41:23 -05002053 netif_trans_update(ndev);
2054 netif_tx_wake_all_queues(ndev);
Mugunthan V Ndf828592012-03-18 20:17:54 +00002055}
2056
Mugunthan V Ndcfd8d52013-07-25 23:44:01 +05302057static int cpsw_ndo_set_mac_address(struct net_device *ndev, void *p)
2058{
2059 struct cpsw_priv *priv = netdev_priv(ndev);
2060 struct sockaddr *addr = (struct sockaddr *)p;
Ivan Khoronzhuk649a1682016-08-10 02:22:37 +03002061 struct cpsw_common *cpsw = priv->cpsw;
Mugunthan V Ndcfd8d52013-07-25 23:44:01 +05302062 int flags = 0;
2063 u16 vid = 0;
Grygorii Strashkoa6c5d142016-06-24 21:23:45 +03002064 int ret;
Mugunthan V Ndcfd8d52013-07-25 23:44:01 +05302065
2066 if (!is_valid_ether_addr(addr->sa_data))
2067 return -EADDRNOTAVAIL;
2068
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002069 ret = pm_runtime_get_sync(cpsw->dev);
Grygorii Strashkoa6c5d142016-06-24 21:23:45 +03002070 if (ret < 0) {
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002071 pm_runtime_put_noidle(cpsw->dev);
Grygorii Strashkoa6c5d142016-06-24 21:23:45 +03002072 return ret;
2073 }
2074
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002075 if (cpsw->data.dual_emac) {
2076 vid = cpsw->slaves[priv->emac_port].port_vlan;
Mugunthan V Ndcfd8d52013-07-25 23:44:01 +05302077 flags = ALE_VLAN;
2078 }
2079
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03002080 cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM,
Mugunthan V Ndcfd8d52013-07-25 23:44:01 +05302081 flags, vid);
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03002082 cpsw_ale_add_ucast(cpsw->ale, addr->sa_data, HOST_PORT_NUM,
Mugunthan V Ndcfd8d52013-07-25 23:44:01 +05302083 flags, vid);
2084
2085 memcpy(priv->mac_addr, addr->sa_data, ETH_ALEN);
2086 memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN);
2087 for_each_slave(priv, cpsw_set_slave_mac, priv);
2088
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002089 pm_runtime_put(cpsw->dev);
Grygorii Strashkoa6c5d142016-06-24 21:23:45 +03002090
Mugunthan V Ndcfd8d52013-07-25 23:44:01 +05302091 return 0;
2092}
2093
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002094static inline int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv,
2095 unsigned short vid)
2096{
2097 int ret;
Mugunthan V N9f6bd8f2015-01-15 14:59:28 +05302098 int unreg_mcast_mask = 0;
Ivan Khoronzhuk5b3a5a12018-10-12 19:06:29 +03002099 int mcast_mask;
Mugunthan V N9f6bd8f2015-01-15 14:59:28 +05302100 u32 port_mask;
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002101 struct cpsw_common *cpsw = priv->cpsw;
Lennart Sorensen1e5c4bc2014-10-31 13:38:52 -04002102
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002103 if (cpsw->data.dual_emac) {
Mugunthan V N9f6bd8f2015-01-15 14:59:28 +05302104 port_mask = (1 << (priv->emac_port + 1)) | ALE_PORT_HOST;
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002105
Ivan Khoronzhuk5b3a5a12018-10-12 19:06:29 +03002106 mcast_mask = ALE_PORT_HOST;
Mugunthan V N9f6bd8f2015-01-15 14:59:28 +05302107 if (priv->ndev->flags & IFF_ALLMULTI)
Ivan Khoronzhuk5b3a5a12018-10-12 19:06:29 +03002108 unreg_mcast_mask = mcast_mask;
Mugunthan V N9f6bd8f2015-01-15 14:59:28 +05302109 } else {
2110 port_mask = ALE_ALL_PORTS;
Ivan Khoronzhuk5b3a5a12018-10-12 19:06:29 +03002111 mcast_mask = port_mask;
Mugunthan V N9f6bd8f2015-01-15 14:59:28 +05302112
2113 if (priv->ndev->flags & IFF_ALLMULTI)
2114 unreg_mcast_mask = ALE_ALL_PORTS;
2115 else
2116 unreg_mcast_mask = ALE_PORT_1 | ALE_PORT_2;
2117 }
2118
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03002119 ret = cpsw_ale_add_vlan(cpsw->ale, vid, port_mask, 0, port_mask,
Grygorii Strashko61f1cef2016-04-07 15:16:43 +03002120 unreg_mcast_mask);
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002121 if (ret != 0)
2122 return ret;
2123
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03002124 ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr,
Grygorii Strashko71a2cbb2016-04-07 15:16:44 +03002125 HOST_PORT_NUM, ALE_VLAN, vid);
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002126 if (ret != 0)
2127 goto clean_vid;
2128
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03002129 ret = cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast,
Ivan Khoronzhuk5b3a5a12018-10-12 19:06:29 +03002130 mcast_mask, ALE_VLAN, vid, 0);
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002131 if (ret != 0)
2132 goto clean_vlan_ucast;
2133 return 0;
2134
2135clean_vlan_ucast:
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03002136 cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr,
Grygorii Strashko71a2cbb2016-04-07 15:16:44 +03002137 HOST_PORT_NUM, ALE_VLAN, vid);
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002138clean_vid:
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03002139 cpsw_ale_del_vlan(cpsw->ale, vid, 0);
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002140 return ret;
2141}
2142
2143static int cpsw_ndo_vlan_rx_add_vid(struct net_device *ndev,
Patrick McHardy80d5c362013-04-19 02:04:28 +00002144 __be16 proto, u16 vid)
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002145{
2146 struct cpsw_priv *priv = netdev_priv(ndev);
Ivan Khoronzhuk649a1682016-08-10 02:22:37 +03002147 struct cpsw_common *cpsw = priv->cpsw;
Grygorii Strashkoa6c5d142016-06-24 21:23:45 +03002148 int ret;
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002149
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002150 if (vid == cpsw->data.default_vlan)
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002151 return 0;
2152
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002153 ret = pm_runtime_get_sync(cpsw->dev);
Grygorii Strashkoa6c5d142016-06-24 21:23:45 +03002154 if (ret < 0) {
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002155 pm_runtime_put_noidle(cpsw->dev);
Grygorii Strashkoa6c5d142016-06-24 21:23:45 +03002156 return ret;
2157 }
2158
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002159 if (cpsw->data.dual_emac) {
Mugunthan V N02a54162015-01-22 15:19:22 +05302160 /* In dual EMAC, reserved VLAN id should not be used for
2161 * creating VLAN interfaces as this can break the dual
2162 * EMAC port separation
2163 */
2164 int i;
2165
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002166 for (i = 0; i < cpsw->data.slaves; i++) {
Ivan Khoronzhuk803c4f62018-08-10 15:47:09 +03002167 if (vid == cpsw->slaves[i].port_vlan) {
2168 ret = -EINVAL;
2169 goto err;
2170 }
Mugunthan V N02a54162015-01-22 15:19:22 +05302171 }
2172 }
2173
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002174 dev_info(priv->dev, "Adding vlanid %d to vlan filter\n", vid);
Grygorii Strashkoa6c5d142016-06-24 21:23:45 +03002175 ret = cpsw_add_vlan_ale_entry(priv, vid);
Ivan Khoronzhuk803c4f62018-08-10 15:47:09 +03002176err:
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002177 pm_runtime_put(cpsw->dev);
Grygorii Strashkoa6c5d142016-06-24 21:23:45 +03002178 return ret;
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002179}
2180
2181static int cpsw_ndo_vlan_rx_kill_vid(struct net_device *ndev,
Patrick McHardy80d5c362013-04-19 02:04:28 +00002182 __be16 proto, u16 vid)
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002183{
2184 struct cpsw_priv *priv = netdev_priv(ndev);
Ivan Khoronzhuk649a1682016-08-10 02:22:37 +03002185 struct cpsw_common *cpsw = priv->cpsw;
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002186 int ret;
2187
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002188 if (vid == cpsw->data.default_vlan)
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002189 return 0;
2190
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002191 ret = pm_runtime_get_sync(cpsw->dev);
Grygorii Strashkoa6c5d142016-06-24 21:23:45 +03002192 if (ret < 0) {
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002193 pm_runtime_put_noidle(cpsw->dev);
Grygorii Strashkoa6c5d142016-06-24 21:23:45 +03002194 return ret;
2195 }
2196
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002197 if (cpsw->data.dual_emac) {
Mugunthan V N02a54162015-01-22 15:19:22 +05302198 int i;
2199
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002200 for (i = 0; i < cpsw->data.slaves; i++) {
2201 if (vid == cpsw->slaves[i].port_vlan)
Ivan Khoronzhuk803c4f62018-08-10 15:47:09 +03002202 goto err;
Mugunthan V N02a54162015-01-22 15:19:22 +05302203 }
2204 }
2205
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002206 dev_info(priv->dev, "removing vlanid %d from vlan filter\n", vid);
Ivan Khoronzhuk2a05a622016-08-10 02:22:44 +03002207 ret = cpsw_ale_del_vlan(cpsw->ale, vid, 0);
Ivan Khoronzhukbe35b982018-08-10 15:47:08 +03002208 ret |= cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr,
2209 HOST_PORT_NUM, ALE_VLAN, vid);
2210 ret |= cpsw_ale_del_mcast(cpsw->ale, priv->ndev->broadcast,
2211 0, ALE_VLAN, vid);
Ivan Khoronzhuk15180ec2018-11-08 22:27:56 +02002212 ret |= cpsw_ale_flush_multicast(cpsw->ale, 0, vid);
Ivan Khoronzhuk803c4f62018-08-10 15:47:09 +03002213err:
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002214 pm_runtime_put(cpsw->dev);
Grygorii Strashkoa6c5d142016-06-24 21:23:45 +03002215 return ret;
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002216}
2217
Ivan Khoronzhuk83fcad02016-11-29 17:00:49 +02002218static int cpsw_ndo_set_tx_maxrate(struct net_device *ndev, int queue, u32 rate)
2219{
2220 struct cpsw_priv *priv = netdev_priv(ndev);
Ivan Khoronzhuk83fcad02016-11-29 17:00:49 +02002221 struct cpsw_common *cpsw = priv->cpsw;
Ivan Khoronzhuk52986a22016-12-10 14:23:50 +02002222 struct cpsw_slave *slave;
Ivan Khoronzhuk32b78d82016-12-10 14:23:48 +02002223 u32 min_rate;
Ivan Khoronzhuk83fcad02016-11-29 17:00:49 +02002224 u32 ch_rate;
Ivan Khoronzhuk52986a22016-12-10 14:23:50 +02002225 int i, ret;
Ivan Khoronzhuk83fcad02016-11-29 17:00:49 +02002226
2227 ch_rate = netdev_get_tx_queue(ndev, queue)->tx_maxrate;
2228 if (ch_rate == rate)
2229 return 0;
2230
Ivan Khoronzhuk32b78d82016-12-10 14:23:48 +02002231 ch_rate = rate * 1000;
2232 min_rate = cpdma_chan_get_min_rate(cpsw->dma);
2233 if ((ch_rate < min_rate && ch_rate)) {
2234 dev_err(priv->dev, "The channel rate cannot be less than %dMbps",
2235 min_rate);
Ivan Khoronzhuk83fcad02016-11-29 17:00:49 +02002236 return -EINVAL;
2237 }
2238
Ivan Khoronzhuk0be01b82016-12-10 14:23:49 +02002239 if (rate > cpsw->speed) {
Ivan Khoronzhuk32b78d82016-12-10 14:23:48 +02002240 dev_err(priv->dev, "The channel rate cannot be more than 2Gbps");
Ivan Khoronzhuk83fcad02016-11-29 17:00:49 +02002241 return -EINVAL;
2242 }
2243
2244 ret = pm_runtime_get_sync(cpsw->dev);
2245 if (ret < 0) {
2246 pm_runtime_put_noidle(cpsw->dev);
2247 return ret;
2248 }
2249
Ivan Khoronzhuk32b78d82016-12-10 14:23:48 +02002250 ret = cpdma_chan_set_rate(cpsw->txv[queue].ch, ch_rate);
Ivan Khoronzhuk83fcad02016-11-29 17:00:49 +02002251 pm_runtime_put(cpsw->dev);
Ivan Khoronzhuk32b78d82016-12-10 14:23:48 +02002252
2253 if (ret)
2254 return ret;
2255
Ivan Khoronzhuk52986a22016-12-10 14:23:50 +02002256 /* update rates for slaves tx queues */
2257 for (i = 0; i < cpsw->data.slaves; i++) {
2258 slave = &cpsw->slaves[i];
2259 if (!slave->ndev)
2260 continue;
2261
2262 netdev_get_tx_queue(slave->ndev, queue)->tx_maxrate = rate;
2263 }
2264
Grygorii Strashko9763a892019-04-26 20:12:26 +03002265 cpsw_split_res(cpsw);
Ivan Khoronzhuk83fcad02016-11-29 17:00:49 +02002266 return ret;
2267}
2268
Ivan Khoronzhuk7929a662018-07-24 00:26:31 +03002269static int cpsw_set_mqprio(struct net_device *ndev, void *type_data)
2270{
2271 struct tc_mqprio_qopt_offload *mqprio = type_data;
2272 struct cpsw_priv *priv = netdev_priv(ndev);
2273 struct cpsw_common *cpsw = priv->cpsw;
2274 int fifo, num_tc, count, offset;
2275 struct cpsw_slave *slave;
2276 u32 tx_prio_map = 0;
2277 int i, tc, ret;
2278
2279 num_tc = mqprio->qopt.num_tc;
2280 if (num_tc > CPSW_TC_NUM)
2281 return -EINVAL;
2282
2283 if (mqprio->mode != TC_MQPRIO_MODE_DCB)
2284 return -EINVAL;
2285
2286 ret = pm_runtime_get_sync(cpsw->dev);
2287 if (ret < 0) {
2288 pm_runtime_put_noidle(cpsw->dev);
2289 return ret;
2290 }
2291
2292 if (num_tc) {
2293 for (i = 0; i < 8; i++) {
2294 tc = mqprio->qopt.prio_tc_map[i];
2295 fifo = cpsw_tc_to_fifo(tc, num_tc);
2296 tx_prio_map |= fifo << (4 * i);
2297 }
2298
2299 netdev_set_num_tc(ndev, num_tc);
2300 for (i = 0; i < num_tc; i++) {
2301 count = mqprio->qopt.count[i];
2302 offset = mqprio->qopt.offset[i];
2303 netdev_set_tc_queue(ndev, i, count, offset);
2304 }
2305 }
2306
2307 if (!mqprio->qopt.hw) {
2308 /* restore default configuration */
2309 netdev_reset_tc(ndev);
2310 tx_prio_map = TX_PRIORITY_MAPPING;
2311 }
2312
2313 priv->mqprio_hw = mqprio->qopt.hw;
2314
2315 offset = cpsw->version == CPSW_VERSION_1 ?
2316 CPSW1_TX_PRI_MAP : CPSW2_TX_PRI_MAP;
2317
2318 slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)];
2319 slave_write(slave, tx_prio_map, offset);
2320
2321 pm_runtime_put_sync(cpsw->dev);
2322
2323 return 0;
2324}
2325
2326static int cpsw_ndo_setup_tc(struct net_device *ndev, enum tc_setup_type type,
2327 void *type_data)
2328{
2329 switch (type) {
Ivan Khoronzhuk57d90142018-07-24 00:26:32 +03002330 case TC_SETUP_QDISC_CBS:
2331 return cpsw_set_cbs(ndev, type_data);
2332
Ivan Khoronzhuk7929a662018-07-24 00:26:31 +03002333 case TC_SETUP_QDISC_MQPRIO:
2334 return cpsw_set_mqprio(ndev, type_data);
2335
2336 default:
2337 return -EOPNOTSUPP;
2338 }
2339}
2340
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +03002341static int cpsw_xdp_prog_setup(struct cpsw_priv *priv, struct netdev_bpf *bpf)
2342{
2343 struct bpf_prog *prog = bpf->prog;
2344
2345 if (!priv->xdpi.prog && !prog)
2346 return 0;
2347
2348 if (!xdp_attachment_flags_ok(&priv->xdpi, bpf))
2349 return -EBUSY;
2350
2351 WRITE_ONCE(priv->xdp_prog, prog);
2352
2353 xdp_attachment_setup(&priv->xdpi, bpf);
2354
2355 return 0;
2356}
2357
2358static int cpsw_ndo_bpf(struct net_device *ndev, struct netdev_bpf *bpf)
2359{
2360 struct cpsw_priv *priv = netdev_priv(ndev);
2361
2362 switch (bpf->command) {
2363 case XDP_SETUP_PROG:
2364 return cpsw_xdp_prog_setup(priv, bpf);
2365
2366 case XDP_QUERY_PROG:
2367 return xdp_attachment_query(&priv->xdpi, bpf);
2368
2369 default:
2370 return -EINVAL;
2371 }
2372}
2373
2374static int cpsw_ndo_xdp_xmit(struct net_device *ndev, int n,
2375 struct xdp_frame **frames, u32 flags)
2376{
2377 struct cpsw_priv *priv = netdev_priv(ndev);
2378 struct xdp_frame *xdpf;
2379 int i, drops = 0;
2380
2381 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
2382 return -EINVAL;
2383
2384 for (i = 0; i < n; i++) {
2385 xdpf = frames[i];
2386 if (xdpf->len < CPSW_MIN_PACKET_SIZE) {
2387 xdp_return_frame_rx_napi(xdpf);
2388 drops++;
2389 continue;
2390 }
2391
2392 if (cpsw_xdp_tx_frame(priv, xdpf, NULL))
2393 drops++;
2394 }
2395
2396 return n - drops;
2397}
2398
David S. Miller026cc9c2019-04-27 20:08:25 -04002399#ifdef CONFIG_NET_POLL_CONTROLLER
2400static void cpsw_ndo_poll_controller(struct net_device *ndev)
2401{
2402 struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
2403
2404 cpsw_intr_disable(cpsw);
2405 cpsw_rx_interrupt(cpsw->irqs_table[0], cpsw);
2406 cpsw_tx_interrupt(cpsw->irqs_table[1], cpsw);
2407 cpsw_intr_enable(cpsw);
2408}
2409#endif
2410
Mugunthan V Ndf828592012-03-18 20:17:54 +00002411static const struct net_device_ops cpsw_netdev_ops = {
2412 .ndo_open = cpsw_ndo_open,
2413 .ndo_stop = cpsw_ndo_stop,
2414 .ndo_start_xmit = cpsw_ndo_start_xmit,
Mugunthan V Ndcfd8d52013-07-25 23:44:01 +05302415 .ndo_set_mac_address = cpsw_ndo_set_mac_address,
Richard Cochran2e5b38a2012-10-29 08:45:20 +00002416 .ndo_do_ioctl = cpsw_ndo_ioctl,
Mugunthan V Ndf828592012-03-18 20:17:54 +00002417 .ndo_validate_addr = eth_validate_addr,
Mugunthan V Ndf828592012-03-18 20:17:54 +00002418 .ndo_tx_timeout = cpsw_ndo_tx_timeout,
Mugunthan V N5c50a852012-10-29 08:45:11 +00002419 .ndo_set_rx_mode = cpsw_ndo_set_rx_mode,
Ivan Khoronzhuk83fcad02016-11-29 17:00:49 +02002420 .ndo_set_tx_maxrate = cpsw_ndo_set_tx_maxrate,
Mugunthan V Ndf828592012-03-18 20:17:54 +00002421#ifdef CONFIG_NET_POLL_CONTROLLER
2422 .ndo_poll_controller = cpsw_ndo_poll_controller,
2423#endif
Mugunthan V N3b72c2f2013-02-05 08:26:48 +00002424 .ndo_vlan_rx_add_vid = cpsw_ndo_vlan_rx_add_vid,
2425 .ndo_vlan_rx_kill_vid = cpsw_ndo_vlan_rx_kill_vid,
Ivan Khoronzhuk7929a662018-07-24 00:26:31 +03002426 .ndo_setup_tc = cpsw_ndo_setup_tc,
Ivan Khoronzhuk9ed40502019-07-09 00:34:32 +03002427 .ndo_bpf = cpsw_ndo_bpf,
2428 .ndo_xdp_xmit = cpsw_ndo_xdp_xmit,
Mugunthan V Ndf828592012-03-18 20:17:54 +00002429};
2430
2431static void cpsw_get_drvinfo(struct net_device *ndev,
2432 struct ethtool_drvinfo *info)
2433{
Ivan Khoronzhuk649a1682016-08-10 02:22:37 +03002434 struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002435 struct platform_device *pdev = to_platform_device(cpsw->dev);
Jiri Pirko7826d432013-01-06 00:44:26 +00002436
Mugunthan V N52c4f0e2014-07-22 23:25:07 +05302437 strlcpy(info->driver, "cpsw", sizeof(info->driver));
Jiri Pirko7826d432013-01-06 00:44:26 +00002438 strlcpy(info->version, "1.0", sizeof(info->version));
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002439 strlcpy(info->bus_info, pdev->name, sizeof(info->bus_info));
Mugunthan V Ndf828592012-03-18 20:17:54 +00002440}
2441
Mugunthan V N1923d6e2014-09-08 22:54:02 +05302442static int cpsw_set_pauseparam(struct net_device *ndev,
2443 struct ethtool_pauseparam *pause)
2444{
2445 struct cpsw_priv *priv = netdev_priv(ndev);
2446 bool link;
2447
2448 priv->rx_pause = pause->rx_pause ? true : false;
2449 priv->tx_pause = pause->tx_pause ? true : false;
2450
2451 for_each_slave(priv, _cpsw_adjust_link, priv, &link);
Mugunthan V N1923d6e2014-09-08 22:54:02 +05302452 return 0;
2453}
2454
Ivan Khoronzhuk022d7ad2017-01-19 18:58:27 +02002455static int cpsw_set_channels(struct net_device *ndev,
2456 struct ethtool_channels *chs)
2457{
Grygorii Strashkoc24eef22019-04-26 20:12:42 +03002458 return cpsw_set_channels_common(ndev, chs, cpsw_rx_handler);
Grygorii Strashkobe034fc2017-01-06 14:07:34 -06002459}
2460
Mugunthan V Ndf828592012-03-18 20:17:54 +00002461static const struct ethtool_ops cpsw_ethtool_ops = {
2462 .get_drvinfo = cpsw_get_drvinfo,
2463 .get_msglevel = cpsw_get_msglevel,
2464 .set_msglevel = cpsw_set_msglevel,
2465 .get_link = ethtool_op_get_link,
Richard Cochran2e5b38a2012-10-29 08:45:20 +00002466 .get_ts_info = cpsw_get_ts_info,
Mugunthan V Nff5b8ef2013-03-11 23:16:37 +00002467 .get_coalesce = cpsw_get_coalesce,
2468 .set_coalesce = cpsw_set_coalesce,
Mugunthan V Nd9718542013-07-23 15:38:17 +05302469 .get_sset_count = cpsw_get_sset_count,
2470 .get_strings = cpsw_get_strings,
2471 .get_ethtool_stats = cpsw_get_ethtool_stats,
Mugunthan V N1923d6e2014-09-08 22:54:02 +05302472 .get_pauseparam = cpsw_get_pauseparam,
2473 .set_pauseparam = cpsw_set_pauseparam,
Matus Ujhelyid8a64422013-08-20 07:59:38 +02002474 .get_wol = cpsw_get_wol,
2475 .set_wol = cpsw_set_wol,
Mugunthan V N52c4f0e2014-07-22 23:25:07 +05302476 .get_regs_len = cpsw_get_regs_len,
2477 .get_regs = cpsw_get_regs,
Grygorii Strashko7898b1d2016-06-24 21:23:44 +03002478 .begin = cpsw_ethtool_op_begin,
2479 .complete = cpsw_ethtool_op_complete,
Ivan Khoronzhukce52c742016-08-22 21:18:28 +03002480 .get_channels = cpsw_get_channels,
2481 .set_channels = cpsw_set_channels,
Philippe Reynes24798762016-10-08 17:46:15 +02002482 .get_link_ksettings = cpsw_get_link_ksettings,
2483 .set_link_ksettings = cpsw_set_link_ksettings,
Yegor Yefremova0909942016-11-28 09:41:33 +01002484 .get_eee = cpsw_get_eee,
2485 .set_eee = cpsw_set_eee,
Yegor Yefremov6bb10c22016-11-28 10:47:52 +01002486 .nway_reset = cpsw_nway_reset,
Grygorii Strashkobe034fc2017-01-06 14:07:34 -06002487 .get_ringparam = cpsw_get_ringparam,
2488 .set_ringparam = cpsw_set_ringparam,
Mugunthan V Ndf828592012-03-18 20:17:54 +00002489};
2490
David Rivshin552165b2016-04-27 21:25:25 -04002491static int cpsw_probe_dt(struct cpsw_platform_data *data,
Mugunthan V N2eb32b02012-07-30 10:17:14 +00002492 struct platform_device *pdev)
2493{
2494 struct device_node *node = pdev->dev.of_node;
2495 struct device_node *slave_node;
2496 int i = 0, ret;
2497 u32 prop;
2498
2499 if (!node)
2500 return -EINVAL;
2501
2502 if (of_property_read_u32(node, "slaves", &prop)) {
George Cherian88c99ff2014-05-12 10:21:19 +05302503 dev_err(&pdev->dev, "Missing slaves property in the DT.\n");
Mugunthan V N2eb32b02012-07-30 10:17:14 +00002504 return -EINVAL;
2505 }
2506 data->slaves = prop;
2507
Mugunthan V Ne86ac132013-03-11 23:16:35 +00002508 if (of_property_read_u32(node, "active_slave", &prop)) {
George Cherian88c99ff2014-05-12 10:21:19 +05302509 dev_err(&pdev->dev, "Missing active_slave property in the DT.\n");
Daniel Mackaa1a15e2013-09-21 00:50:38 +05302510 return -EINVAL;
Richard Cochran78ca0b22012-10-29 08:45:18 +00002511 }
Mugunthan V Ne86ac132013-03-11 23:16:35 +00002512 data->active_slave = prop;
Richard Cochran78ca0b22012-10-29 08:45:18 +00002513
Kees Cooka86854d2018-06-12 14:07:58 -07002514 data->slave_data = devm_kcalloc(&pdev->dev,
2515 data->slaves,
2516 sizeof(struct cpsw_slave_data),
Daniel Mackaa1a15e2013-09-21 00:50:38 +05302517 GFP_KERNEL);
Joe Perchesb2adaca2013-02-03 17:43:58 +00002518 if (!data->slave_data)
Daniel Mackaa1a15e2013-09-21 00:50:38 +05302519 return -ENOMEM;
Mugunthan V N2eb32b02012-07-30 10:17:14 +00002520
Mugunthan V N2eb32b02012-07-30 10:17:14 +00002521 if (of_property_read_u32(node, "cpdma_channels", &prop)) {
George Cherian88c99ff2014-05-12 10:21:19 +05302522 dev_err(&pdev->dev, "Missing cpdma_channels property in the DT.\n");
Daniel Mackaa1a15e2013-09-21 00:50:38 +05302523 return -EINVAL;
Mugunthan V N2eb32b02012-07-30 10:17:14 +00002524 }
2525 data->channels = prop;
2526
Mugunthan V N2eb32b02012-07-30 10:17:14 +00002527 if (of_property_read_u32(node, "ale_entries", &prop)) {
George Cherian88c99ff2014-05-12 10:21:19 +05302528 dev_err(&pdev->dev, "Missing ale_entries property in the DT.\n");
Daniel Mackaa1a15e2013-09-21 00:50:38 +05302529 return -EINVAL;
Mugunthan V N2eb32b02012-07-30 10:17:14 +00002530 }
2531 data->ale_entries = prop;
2532
Mugunthan V N2eb32b02012-07-30 10:17:14 +00002533 if (of_property_read_u32(node, "bd_ram_size", &prop)) {
George Cherian88c99ff2014-05-12 10:21:19 +05302534 dev_err(&pdev->dev, "Missing bd_ram_size property in the DT.\n");
Daniel Mackaa1a15e2013-09-21 00:50:38 +05302535 return -EINVAL;
Mugunthan V N2eb32b02012-07-30 10:17:14 +00002536 }
2537 data->bd_ram_size = prop;
2538
Mugunthan V N2eb32b02012-07-30 10:17:14 +00002539 if (of_property_read_u32(node, "mac_control", &prop)) {
George Cherian88c99ff2014-05-12 10:21:19 +05302540 dev_err(&pdev->dev, "Missing mac_control property in the DT.\n");
Daniel Mackaa1a15e2013-09-21 00:50:38 +05302541 return -EINVAL;
Mugunthan V N2eb32b02012-07-30 10:17:14 +00002542 }
2543 data->mac_control = prop;
2544
Markus Pargmann281abd92013-10-04 14:44:40 +02002545 if (of_property_read_bool(node, "dual_emac"))
2546 data->dual_emac = 1;
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002547
Vaibhav Hiremath1fb19aa2012-11-14 09:07:55 +00002548 /*
2549 * Populate all the child nodes here...
2550 */
2551 ret = of_platform_populate(node, NULL, NULL, &pdev->dev);
2552 /* We do not want to force this, as in some cases may not have child */
2553 if (ret)
George Cherian88c99ff2014-05-12 10:21:19 +05302554 dev_warn(&pdev->dev, "Doesn't have any child node\n");
Vaibhav Hiremath1fb19aa2012-11-14 09:07:55 +00002555
Ben Hutchings8658aaf2016-06-21 01:16:31 +01002556 for_each_available_child_of_node(node, slave_node) {
Richard Cochran549985e2012-11-14 09:07:56 +00002557 struct cpsw_slave_data *slave_data = data->slave_data + i;
2558 const void *mac_addr = NULL;
Richard Cochran549985e2012-11-14 09:07:56 +00002559 int lenp;
2560 const __be32 *parp;
Richard Cochran549985e2012-11-14 09:07:56 +00002561
Markus Pargmannf468b102013-10-04 14:44:39 +02002562 /* This is no slave child node, continue */
Rob Herringbf5849f2018-12-05 13:50:32 -06002563 if (!of_node_name_eq(slave_node, "slave"))
Markus Pargmannf468b102013-10-04 14:44:39 +02002564 continue;
2565
Grygorii Strashko3ff18842018-11-25 18:15:25 -06002566 slave_data->ifphy = devm_of_phy_get(&pdev->dev, slave_node,
2567 NULL);
2568 if (!IS_ENABLED(CONFIG_TI_CPSW_PHY_SEL) &&
2569 IS_ERR(slave_data->ifphy)) {
2570 ret = PTR_ERR(slave_data->ifphy);
2571 dev_err(&pdev->dev,
2572 "%d: Error retrieving port phy: %d\n", i, ret);
Nishka Dasgupta3cd6e202019-07-16 11:18:43 +05302573 goto err_node_put;
Grygorii Strashko3ff18842018-11-25 18:15:25 -06002574 }
2575
Marek Vasut337d1722019-06-23 14:11:43 +02002576 slave_data->slave_node = slave_node;
David Rivshin552165b2016-04-27 21:25:25 -04002577 slave_data->phy_node = of_parse_phandle(slave_node,
2578 "phy-handle", 0);
David Rivshinf1eea5c2015-12-16 23:02:10 -05002579 parp = of_get_property(slave_node, "phy_id", &lenp);
David Rivshinae092b52016-04-27 21:38:26 -04002580 if (slave_data->phy_node) {
2581 dev_dbg(&pdev->dev,
Rob Herringf7ce9102017-07-18 16:43:19 -05002582 "slave[%d] using phy-handle=\"%pOF\"\n",
2583 i, slave_data->phy_node);
David Rivshinae092b52016-04-27 21:38:26 -04002584 } else if (of_phy_is_fixed_link(slave_node)) {
David Rivshindfc0a6d2015-12-16 23:02:11 -05002585 /* In the case of a fixed PHY, the DT node associated
2586 * to the PHY is the Ethernet MAC DT node.
2587 */
Markus Brunner1f71e8c2015-11-03 22:09:51 +01002588 ret = of_phy_register_fixed_link(slave_node);
Johan Hovold23a09872016-11-17 17:40:04 +01002589 if (ret) {
2590 if (ret != -EPROBE_DEFER)
2591 dev_err(&pdev->dev, "failed to register fixed-link phy: %d\n", ret);
Nishka Dasgupta3cd6e202019-07-16 11:18:43 +05302592 goto err_node_put;
Johan Hovold23a09872016-11-17 17:40:04 +01002593 }
David Rivshin06cd6d62016-04-27 21:45:45 -04002594 slave_data->phy_node = of_node_get(slave_node);
David Rivshinf1eea5c2015-12-16 23:02:10 -05002595 } else if (parp) {
2596 u32 phyid;
2597 struct device_node *mdio_node;
2598 struct platform_device *mdio;
2599
2600 if (lenp != (sizeof(__be32) * 2)) {
2601 dev_err(&pdev->dev, "Invalid slave[%d] phy_id property\n", i);
2602 goto no_phy_slave;
2603 }
2604 mdio_node = of_find_node_by_phandle(be32_to_cpup(parp));
2605 phyid = be32_to_cpup(parp+1);
2606 mdio = of_find_device_by_node(mdio_node);
2607 of_node_put(mdio_node);
2608 if (!mdio) {
2609 dev_err(&pdev->dev, "Missing mdio platform device\n");
Nishka Dasgupta3cd6e202019-07-16 11:18:43 +05302610 ret = -EINVAL;
2611 goto err_node_put;
David Rivshinf1eea5c2015-12-16 23:02:10 -05002612 }
2613 snprintf(slave_data->phy_id, sizeof(slave_data->phy_id),
2614 PHY_ID_FMT, mdio->name, phyid);
Johan Hovold86e1d5a2016-11-17 17:39:59 +01002615 put_device(&mdio->dev);
David Rivshinf1eea5c2015-12-16 23:02:10 -05002616 } else {
David Rivshinae092b52016-04-27 21:38:26 -04002617 dev_err(&pdev->dev,
2618 "No slave[%d] phy_id, phy-handle, or fixed-link property\n",
2619 i);
Markus Brunner1f71e8c2015-11-03 22:09:51 +01002620 goto no_phy_slave;
2621 }
Andrew Lunn0c65b2b2019-11-04 02:40:33 +01002622 ret = of_get_phy_mode(slave_node, &slave_data->phy_if);
2623 if (ret) {
Mugunthan V N47276fc2014-10-24 18:51:33 +05302624 dev_err(&pdev->dev, "Missing or malformed slave[%d] phy-mode property\n",
2625 i);
Nishka Dasgupta3cd6e202019-07-16 11:18:43 +05302626 goto err_node_put;
Mugunthan V N47276fc2014-10-24 18:51:33 +05302627 }
2628
2629no_phy_slave:
Richard Cochran549985e2012-11-14 09:07:56 +00002630 mac_addr = of_get_mac_address(slave_node);
Petr Å tetiara51645f2019-05-06 23:27:04 +02002631 if (!IS_ERR(mac_addr)) {
Petr Å tetiar2d2924a2019-05-10 11:35:17 +02002632 ether_addr_copy(slave_data->mac_addr, mac_addr);
Markus Pargmann0ba517b2014-09-29 08:53:17 +02002633 } else {
Mugunthan V Nb6745f62015-09-21 15:56:50 +05302634 ret = ti_cm_get_macid(&pdev->dev, i,
2635 slave_data->mac_addr);
2636 if (ret)
Nishka Dasgupta3cd6e202019-07-16 11:18:43 +05302637 goto err_node_put;
Markus Pargmann0ba517b2014-09-29 08:53:17 +02002638 }
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002639 if (data->dual_emac) {
Mugunthan V N91c41662013-04-15 07:31:28 +00002640 if (of_property_read_u32(slave_node, "dual_emac_res_vlan",
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002641 &prop)) {
George Cherian88c99ff2014-05-12 10:21:19 +05302642 dev_err(&pdev->dev, "Missing dual_emac_res_vlan in DT.\n");
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002643 slave_data->dual_emac_res_vlan = i+1;
George Cherian88c99ff2014-05-12 10:21:19 +05302644 dev_err(&pdev->dev, "Using %d as Reserved VLAN for %d slave\n",
2645 slave_data->dual_emac_res_vlan, i);
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002646 } else {
2647 slave_data->dual_emac_res_vlan = prop;
2648 }
2649 }
2650
Richard Cochran549985e2012-11-14 09:07:56 +00002651 i++;
Nishka Dasgupta3cd6e202019-07-16 11:18:43 +05302652 if (i == data->slaves) {
2653 ret = 0;
2654 goto err_node_put;
2655 }
Richard Cochran549985e2012-11-14 09:07:56 +00002656 }
2657
Mugunthan V N2eb32b02012-07-30 10:17:14 +00002658 return 0;
Nishka Dasgupta3cd6e202019-07-16 11:18:43 +05302659
2660err_node_put:
2661 of_node_put(slave_node);
2662 return ret;
Mugunthan V N2eb32b02012-07-30 10:17:14 +00002663}
2664
Johan Hovolda4e32b02016-11-17 17:40:00 +01002665static void cpsw_remove_dt(struct platform_device *pdev)
2666{
Ivan Khoronzhukbfe59032019-06-12 00:49:03 +03002667 struct cpsw_common *cpsw = platform_get_drvdata(pdev);
Johan Hovold8cbcc462016-11-17 17:40:01 +01002668 struct cpsw_platform_data *data = &cpsw->data;
2669 struct device_node *node = pdev->dev.of_node;
2670 struct device_node *slave_node;
2671 int i = 0;
2672
2673 for_each_available_child_of_node(node, slave_node) {
2674 struct cpsw_slave_data *slave_data = &data->slave_data[i];
2675
Rob Herringbf5849f2018-12-05 13:50:32 -06002676 if (!of_node_name_eq(slave_node, "slave"))
Johan Hovold8cbcc462016-11-17 17:40:01 +01002677 continue;
2678
Johan Hovold3f650472016-11-28 19:24:55 +01002679 if (of_phy_is_fixed_link(slave_node))
2680 of_phy_deregister_fixed_link(slave_node);
Johan Hovold8cbcc462016-11-17 17:40:01 +01002681
2682 of_node_put(slave_data->phy_node);
2683
2684 i++;
Nishka Dasgupta3cd6e202019-07-16 11:18:43 +05302685 if (i == data->slaves) {
2686 of_node_put(slave_node);
Johan Hovold8cbcc462016-11-17 17:40:01 +01002687 break;
Nishka Dasgupta3cd6e202019-07-16 11:18:43 +05302688 }
Johan Hovold8cbcc462016-11-17 17:40:01 +01002689 }
2690
Johan Hovolda4e32b02016-11-17 17:40:00 +01002691 of_platform_depopulate(&pdev->dev);
2692}
2693
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002694static int cpsw_probe_dual_emac(struct cpsw_priv *priv)
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002695{
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002696 struct cpsw_common *cpsw = priv->cpsw;
2697 struct cpsw_platform_data *data = &cpsw->data;
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002698 struct net_device *ndev;
2699 struct cpsw_priv *priv_sl2;
Ivan Khoronzhuke38b5a32016-08-10 02:22:41 +03002700 int ret = 0;
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002701
Grygorii Strashkod183a942019-04-26 20:12:29 +03002702 ndev = devm_alloc_etherdev_mqs(cpsw->dev, sizeof(struct cpsw_priv),
2703 CPSW_MAX_QUEUES, CPSW_MAX_QUEUES);
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002704 if (!ndev) {
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002705 dev_err(cpsw->dev, "cpsw: error allocating net_device\n");
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002706 return -ENOMEM;
2707 }
2708
2709 priv_sl2 = netdev_priv(ndev);
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002710 priv_sl2->cpsw = cpsw;
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002711 priv_sl2->ndev = ndev;
2712 priv_sl2->dev = &ndev->dev;
2713 priv_sl2->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG);
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002714
2715 if (is_valid_ether_addr(data->slave_data[1].mac_addr)) {
2716 memcpy(priv_sl2->mac_addr, data->slave_data[1].mac_addr,
2717 ETH_ALEN);
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002718 dev_info(cpsw->dev, "cpsw: Detected MACID = %pM\n",
2719 priv_sl2->mac_addr);
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002720 } else {
Joe Perches6c1f0a12018-06-22 10:51:00 -07002721 eth_random_addr(priv_sl2->mac_addr);
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002722 dev_info(cpsw->dev, "cpsw: Random MACID = %pM\n",
2723 priv_sl2->mac_addr);
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002724 }
2725 memcpy(ndev->dev_addr, priv_sl2->mac_addr, ETH_ALEN);
2726
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002727 priv_sl2->emac_port = 1;
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002728 cpsw->slaves[1].ndev = ndev;
Ivan Khoronzhuk193736c2018-07-27 19:54:39 +03002729 ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_RX;
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002730
2731 ndev->netdev_ops = &cpsw_netdev_ops;
Wilfried Klaebe7ad24ea2014-05-11 00:12:32 +00002732 ndev->ethtool_ops = &cpsw_ethtool_ops;
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002733
2734 /* register the network device */
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002735 SET_NETDEV_DEV(ndev, cpsw->dev);
Marek Vasut337d1722019-06-23 14:11:43 +02002736 ndev->dev.of_node = cpsw->slaves[1].data->slave_node;
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002737 ret = register_netdev(ndev);
Grygorii Strashkod183a942019-04-26 20:12:29 +03002738 if (ret)
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03002739 dev_err(cpsw->dev, "cpsw: error registering net device\n");
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002740
2741 return ret;
2742}
2743
Mugunthan V N7da11602015-08-12 15:22:53 +05302744static const struct of_device_id cpsw_of_mtable[] = {
Ivan Khoronzhuk9611d6d2018-05-17 01:21:45 +03002745 { .compatible = "ti,cpsw"},
2746 { .compatible = "ti,am335x-cpsw"},
2747 { .compatible = "ti,am4372-cpsw"},
2748 { .compatible = "ti,dra7-cpsw"},
Mugunthan V N7da11602015-08-12 15:22:53 +05302749 { /* sentinel */ },
2750};
2751MODULE_DEVICE_TABLE(of, cpsw_of_mtable);
2752
Ivan Khoronzhuk9611d6d2018-05-17 01:21:45 +03002753static const struct soc_device_attribute cpsw_soc_devices[] = {
2754 { .family = "AM33xx", .revision = "ES1.0"},
2755 { /* sentinel */ }
2756};
2757
Bill Pemberton663e12e2012-12-03 09:23:45 -05002758static int cpsw_probe(struct platform_device *pdev)
Mugunthan V Ndf828592012-03-18 20:17:54 +00002759{
Grygorii Strashkoc8fb5662019-04-26 20:12:27 +03002760 struct device *dev = &pdev->dev;
Ivan Khoronzhukef4183a2016-08-10 02:22:35 +03002761 struct clk *clk;
Sebastian Siewiord1bd9ac2013-04-24 08:48:23 +00002762 struct cpsw_platform_data *data;
Mugunthan V Ndf828592012-03-18 20:17:54 +00002763 struct net_device *ndev;
2764 struct cpsw_priv *priv;
Daniel Mackaa1a15e2013-09-21 00:50:38 +05302765 void __iomem *ss_regs;
YueHaibingc8ace622019-08-21 20:48:50 +08002766 struct resource *ss_res;
Mugunthan V N1d147cc2015-09-07 15:16:44 +05302767 struct gpio_descs *mode;
Ivan Khoronzhuk9611d6d2018-05-17 01:21:45 +03002768 const struct soc_device_attribute *soc;
Ivan Khoronzhuk649a1682016-08-10 02:22:37 +03002769 struct cpsw_common *cpsw;
Grygorii Strashkoe6a84622019-04-26 20:12:39 +03002770 int ret = 0, ch;
Felipe Balbi5087b912015-01-16 10:11:11 -06002771 int irq;
Mugunthan V Ndf828592012-03-18 20:17:54 +00002772
Grygorii Strashkoc8fb5662019-04-26 20:12:27 +03002773 cpsw = devm_kzalloc(dev, sizeof(struct cpsw_common), GFP_KERNEL);
Johan Hovold3420ea82016-11-17 17:40:03 +01002774 if (!cpsw)
2775 return -ENOMEM;
2776
Antoine Tenart2d683ea2019-08-21 16:41:23 +02002777 platform_set_drvdata(pdev, cpsw);
Grygorii Strashkoc8fb5662019-04-26 20:12:27 +03002778 cpsw->dev = dev;
Ivan Khoronzhuk649a1682016-08-10 02:22:37 +03002779
Grygorii Strashkoc8fb5662019-04-26 20:12:27 +03002780 mode = devm_gpiod_get_array_optional(dev, "mode", GPIOD_OUT_LOW);
Mugunthan V N1d147cc2015-09-07 15:16:44 +05302781 if (IS_ERR(mode)) {
2782 ret = PTR_ERR(mode);
Grygorii Strashkoc8fb5662019-04-26 20:12:27 +03002783 dev_err(dev, "gpio request failed, ret %d\n", ret);
Grygorii Strashkod183a942019-04-26 20:12:29 +03002784 return ret;
Mugunthan V N1d147cc2015-09-07 15:16:44 +05302785 }
2786
Grygorii Strashko83a84712019-04-26 20:12:36 +03002787 clk = devm_clk_get(dev, "fck");
2788 if (IS_ERR(clk)) {
YueHaibingac97a352019-04-30 01:55:24 +00002789 ret = PTR_ERR(clk);
Grygorii Strashko83a84712019-04-26 20:12:36 +03002790 dev_err(dev, "fck is not found %d\n", ret);
2791 return ret;
2792 }
2793 cpsw->bus_freq_mhz = clk_get_rate(clk) / 1000000;
2794
2795 ss_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2796 ss_regs = devm_ioremap_resource(dev, ss_res);
2797 if (IS_ERR(ss_regs))
2798 return PTR_ERR(ss_regs);
2799 cpsw->regs = ss_regs;
2800
YueHaibingc8ace622019-08-21 20:48:50 +08002801 cpsw->wr_regs = devm_platform_ioremap_resource(pdev, 1);
Grygorii Strashko83a84712019-04-26 20:12:36 +03002802 if (IS_ERR(cpsw->wr_regs))
2803 return PTR_ERR(cpsw->wr_regs);
2804
2805 /* RX IRQ */
2806 irq = platform_get_irq(pdev, 1);
2807 if (irq < 0)
2808 return irq;
2809 cpsw->irqs_table[0] = irq;
2810
2811 /* TX IRQ */
2812 irq = platform_get_irq(pdev, 2);
2813 if (irq < 0)
2814 return irq;
2815 cpsw->irqs_table[1] = irq;
2816
Vaibhav Hiremath1fb19aa2012-11-14 09:07:55 +00002817 /*
2818 * This may be required here for child devices.
2819 */
Grygorii Strashkoc8fb5662019-04-26 20:12:27 +03002820 pm_runtime_enable(dev);
Vaibhav Hiremath1fb19aa2012-11-14 09:07:55 +00002821
Johan Hovolda4e32b02016-11-17 17:40:00 +01002822 /* Need to enable clocks with runtime PM api to access module
2823 * registers
2824 */
Grygorii Strashkoc8fb5662019-04-26 20:12:27 +03002825 ret = pm_runtime_get_sync(dev);
Johan Hovolda4e32b02016-11-17 17:40:00 +01002826 if (ret < 0) {
Grygorii Strashkoc8fb5662019-04-26 20:12:27 +03002827 pm_runtime_put_noidle(dev);
Daniel Mackaa1a15e2013-09-21 00:50:38 +05302828 goto clean_runtime_disable_ret;
Mugunthan V N2eb32b02012-07-30 10:17:14 +00002829 }
Johan Hovolda4e32b02016-11-17 17:40:00 +01002830
Johan Hovold23a09872016-11-17 17:40:04 +01002831 ret = cpsw_probe_dt(&cpsw->data, pdev);
2832 if (ret)
Johan Hovolda4e32b02016-11-17 17:40:00 +01002833 goto clean_dt_ret;
Johan Hovold23a09872016-11-17 17:40:04 +01002834
Grygorii Strashko83a84712019-04-26 20:12:36 +03002835 soc = soc_device_match(cpsw_soc_devices);
2836 if (soc)
2837 cpsw->quirk_irq = 1;
2838
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002839 data = &cpsw->data;
Grygorii Strashkoc8fb5662019-04-26 20:12:27 +03002840 cpsw->slaves = devm_kcalloc(dev,
Kees Cooka86854d2018-06-12 14:07:58 -07002841 data->slaves, sizeof(struct cpsw_slave),
Daniel Mackaa1a15e2013-09-21 00:50:38 +05302842 GFP_KERNEL);
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03002843 if (!cpsw->slaves) {
Daniel Mackaa1a15e2013-09-21 00:50:38 +05302844 ret = -ENOMEM;
Johan Hovolda4e32b02016-11-17 17:40:00 +01002845 goto clean_dt_ret;
Mugunthan V Ndf828592012-03-18 20:17:54 +00002846 }
Mugunthan V Ndf828592012-03-18 20:17:54 +00002847
Grygorii Strashko83a84712019-04-26 20:12:36 +03002848 cpsw->rx_packet_max = max(rx_packet_max, CPSW_MAX_PACKET_SIZE);
Grygorii Strashkoc24eef22019-04-26 20:12:42 +03002849 cpsw->descs_pool_size = descs_pool_size;
Mugunthan V Ndf828592012-03-18 20:17:54 +00002850
Grygorii Strashkoe6a84622019-04-26 20:12:39 +03002851 ret = cpsw_init_common(cpsw, ss_regs, ale_ageout,
2852 ss_res->start + CPSW2_BD_OFFSET,
2853 descs_pool_size);
2854 if (ret)
Johan Hovolda4e32b02016-11-17 17:40:00 +01002855 goto clean_dt_ret;
Grygorii Strashko8a2c9a52016-12-06 18:00:41 -06002856
Grygorii Strashko83a84712019-04-26 20:12:36 +03002857 ch = cpsw->quirk_irq ? 0 : 7;
2858 cpsw->txv[0].ch = cpdma_chan_create(cpsw->dma, ch, cpsw_tx_handler, 0);
2859 if (IS_ERR(cpsw->txv[0].ch)) {
2860 dev_err(dev, "error initializing tx dma channel\n");
2861 ret = PTR_ERR(cpsw->txv[0].ch);
2862 goto clean_cpts;
Mugunthan V Ndf828592012-03-18 20:17:54 +00002863 }
2864
Grygorii Strashko83a84712019-04-26 20:12:36 +03002865 cpsw->rxv[0].ch = cpdma_chan_create(cpsw->dma, 0, cpsw_rx_handler, 1);
2866 if (IS_ERR(cpsw->rxv[0].ch)) {
2867 dev_err(dev, "error initializing rx dma channel\n");
2868 ret = PTR_ERR(cpsw->rxv[0].ch);
2869 goto clean_cpts;
2870 }
2871 cpsw_split_res(cpsw);
2872
2873 /* setup netdev */
2874 ndev = devm_alloc_etherdev_mqs(dev, sizeof(struct cpsw_priv),
2875 CPSW_MAX_QUEUES, CPSW_MAX_QUEUES);
2876 if (!ndev) {
2877 dev_err(dev, "error allocating net_device\n");
2878 goto clean_cpts;
2879 }
2880
Grygorii Strashko83a84712019-04-26 20:12:36 +03002881 priv = netdev_priv(ndev);
2882 priv->cpsw = cpsw;
2883 priv->ndev = ndev;
2884 priv->dev = dev;
2885 priv->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG);
2886 priv->emac_port = 0;
2887
2888 if (is_valid_ether_addr(data->slave_data[0].mac_addr)) {
2889 memcpy(priv->mac_addr, data->slave_data[0].mac_addr, ETH_ALEN);
2890 dev_info(dev, "Detected MACID = %pM\n", priv->mac_addr);
2891 } else {
2892 eth_random_addr(priv->mac_addr);
2893 dev_info(dev, "Random MACID = %pM\n", priv->mac_addr);
2894 }
2895
2896 memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN);
2897
2898 cpsw->slaves[0].ndev = ndev;
2899
Grygorii Strashkoa3a41d22018-03-15 15:15:50 -05002900 ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_RX;
Keerthy070f9c62017-07-20 16:59:52 +05302901
2902 ndev->netdev_ops = &cpsw_netdev_ops;
2903 ndev->ethtool_ops = &cpsw_ethtool_ops;
Ivan Khoronzhuk9611d6d2018-05-17 01:21:45 +03002904 netif_napi_add(ndev, &cpsw->napi_rx,
2905 cpsw->quirk_irq ? cpsw_rx_poll : cpsw_rx_mq_poll,
2906 CPSW_POLL_WEIGHT);
2907 netif_tx_napi_add(ndev, &cpsw->napi_tx,
2908 cpsw->quirk_irq ? cpsw_tx_poll : cpsw_tx_mq_poll,
2909 CPSW_POLL_WEIGHT);
Keerthy070f9c62017-07-20 16:59:52 +05302910
2911 /* register the network device */
Grygorii Strashkoc8fb5662019-04-26 20:12:27 +03002912 SET_NETDEV_DEV(ndev, dev);
Marek Vasut337d1722019-06-23 14:11:43 +02002913 ndev->dev.of_node = cpsw->slaves[0].data->slave_node;
Keerthy070f9c62017-07-20 16:59:52 +05302914 ret = register_netdev(ndev);
2915 if (ret) {
Grygorii Strashkoc8fb5662019-04-26 20:12:27 +03002916 dev_err(dev, "error registering net device\n");
Keerthy070f9c62017-07-20 16:59:52 +05302917 ret = -ENODEV;
Grygorii Strashko83a84712019-04-26 20:12:36 +03002918 goto clean_cpts;
Keerthy070f9c62017-07-20 16:59:52 +05302919 }
2920
2921 if (cpsw->data.dual_emac) {
2922 ret = cpsw_probe_dual_emac(priv);
2923 if (ret) {
2924 cpsw_err(priv, probe, "error probe slave 2 emac interface\n");
2925 goto clean_unregister_netdev_ret;
2926 }
2927 }
2928
Felipe Balbic03abd82015-01-16 10:11:12 -06002929 /* Grab RX and TX IRQs. Note that we also have RX_THRESHOLD and
2930 * MISC IRQs which are always kept disabled with this driver so
2931 * we will not request them.
2932 *
2933 * If anyone wants to implement support for those, make sure to
2934 * first request and append them to irqs_table array.
2935 */
Grygorii Strashko83a84712019-04-26 20:12:36 +03002936 ret = devm_request_irq(dev, cpsw->irqs_table[0], cpsw_rx_interrupt,
Grygorii Strashkoc8fb5662019-04-26 20:12:27 +03002937 0, dev_name(dev), cpsw);
Felipe Balbi5087b912015-01-16 10:11:11 -06002938 if (ret < 0) {
Grygorii Strashkoc8fb5662019-04-26 20:12:27 +03002939 dev_err(dev, "error attaching irq (%d)\n", ret);
Grygorii Strashko83a84712019-04-26 20:12:36 +03002940 goto clean_unregister_netdev_ret;
Felipe Balbi5087b912015-01-16 10:11:11 -06002941 }
2942
Felipe Balbi5087b912015-01-16 10:11:11 -06002943
Grygorii Strashko83a84712019-04-26 20:12:36 +03002944 ret = devm_request_irq(dev, cpsw->irqs_table[1], cpsw_tx_interrupt,
Ivan Khoronzhukdbc4ec52016-08-10 02:22:43 +03002945 0, dev_name(&pdev->dev), cpsw);
Felipe Balbi5087b912015-01-16 10:11:11 -06002946 if (ret < 0) {
Grygorii Strashkoc8fb5662019-04-26 20:12:27 +03002947 dev_err(dev, "error attaching irq (%d)\n", ret);
Grygorii Strashko83a84712019-04-26 20:12:36 +03002948 goto clean_unregister_netdev_ret;
Felipe Balbi5087b912015-01-16 10:11:11 -06002949 }
Daniel Mackc2b32e52014-09-04 09:00:23 +02002950
Grygorii Strashko90225bf2017-01-06 14:07:33 -06002951 cpsw_notice(priv, probe,
2952 "initialized device (regs %pa, irq %d, pool size %d)\n",
Grygorii Strashko83a84712019-04-26 20:12:36 +03002953 &ss_res->start, cpsw->irqs_table[0], descs_pool_size);
Mugunthan V Nd9ba8f92013-02-11 09:52:20 +00002954
Johan Hovoldc46ab7e2016-11-17 17:39:58 +01002955 pm_runtime_put(&pdev->dev);
2956
Mugunthan V Ndf828592012-03-18 20:17:54 +00002957 return 0;
2958
Johan Hovolda7fe9d42016-11-17 17:40:02 +01002959clean_unregister_netdev_ret:
2960 unregister_netdev(ndev);
Grygorii Strashko83a84712019-04-26 20:12:36 +03002961clean_cpts:
2962 cpts_release(cpsw->cpts);
Ivan Khoronzhuk2c836bd2016-08-10 02:22:40 +03002963 cpdma_ctlr_destroy(cpsw->dma);
Johan Hovolda4e32b02016-11-17 17:40:00 +01002964clean_dt_ret:
2965 cpsw_remove_dt(pdev);
Johan Hovoldc46ab7e2016-11-17 17:39:58 +01002966 pm_runtime_put_sync(&pdev->dev);
Daniel Mackaa1a15e2013-09-21 00:50:38 +05302967clean_runtime_disable_ret:
Mugunthan V Nf150bd72012-07-17 08:09:50 +00002968 pm_runtime_disable(&pdev->dev);
Mugunthan V Ndf828592012-03-18 20:17:54 +00002969 return ret;
2970}
2971
Bill Pemberton663e12e2012-12-03 09:23:45 -05002972static int cpsw_remove(struct platform_device *pdev)
Mugunthan V Ndf828592012-03-18 20:17:54 +00002973{
Ivan Khoronzhukbfe59032019-06-12 00:49:03 +03002974 struct cpsw_common *cpsw = platform_get_drvdata(pdev);
2975 int i, ret;
Grygorii Strashko8a0b6dc2016-07-28 20:50:35 +03002976
2977 ret = pm_runtime_get_sync(&pdev->dev);
2978 if (ret < 0) {
2979 pm_runtime_put_noidle(&pdev->dev);
2980 return ret;
2981 }
Mugunthan V Ndf828592012-03-18 20:17:54 +00002982
Ivan Khoronzhukbfe59032019-06-12 00:49:03 +03002983 for (i = 0; i < cpsw->data.slaves; i++)
2984 if (cpsw->slaves[i].ndev)
2985 unregister_netdev(cpsw->slaves[i].ndev);
Mugunthan V Ndf828592012-03-18 20:17:54 +00002986
Grygorii Strashko8a2c9a52016-12-06 18:00:41 -06002987 cpts_release(cpsw->cpts);
Ivan Khoronzhuk2c836bd2016-08-10 02:22:40 +03002988 cpdma_ctlr_destroy(cpsw->dma);
Johan Hovolda4e32b02016-11-17 17:40:00 +01002989 cpsw_remove_dt(pdev);
Grygorii Strashko8a0b6dc2016-07-28 20:50:35 +03002990 pm_runtime_put_sync(&pdev->dev);
2991 pm_runtime_disable(&pdev->dev);
Mugunthan V Ndf828592012-03-18 20:17:54 +00002992 return 0;
2993}
2994
Grygorii Strashko8963a502015-02-27 13:19:45 +02002995#ifdef CONFIG_PM_SLEEP
Mugunthan V Ndf828592012-03-18 20:17:54 +00002996static int cpsw_suspend(struct device *dev)
2997{
Keerthy2f9b0d92019-06-24 10:46:19 +05302998 struct cpsw_common *cpsw = dev_get_drvdata(dev);
2999 int i;
Mugunthan V Ndf828592012-03-18 20:17:54 +00003000
Keerthy2f9b0d92019-06-24 10:46:19 +05303001 for (i = 0; i < cpsw->data.slaves; i++)
3002 if (cpsw->slaves[i].ndev)
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03003003 if (netif_running(cpsw->slaves[i].ndev))
3004 cpsw_ndo_stop(cpsw->slaves[i].ndev);
Daniel Mack1e7a2e22013-11-15 08:29:16 +01003005
Mugunthan V N739683b2013-06-06 23:45:14 +05303006 /* Select sleep pin state */
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03003007 pinctrl_pm_select_sleep_state(dev);
Mugunthan V N739683b2013-06-06 23:45:14 +05303008
Mugunthan V Ndf828592012-03-18 20:17:54 +00003009 return 0;
3010}
3011
3012static int cpsw_resume(struct device *dev)
3013{
Keerthy2f9b0d92019-06-24 10:46:19 +05303014 struct cpsw_common *cpsw = dev_get_drvdata(dev);
3015 int i;
Mugunthan V Ndf828592012-03-18 20:17:54 +00003016
Mugunthan V N739683b2013-06-06 23:45:14 +05303017 /* Select default pin state */
Ivan Khoronzhuk56e31bd2016-08-10 02:22:38 +03003018 pinctrl_pm_select_default_state(dev);
Mugunthan V N739683b2013-06-06 23:45:14 +05303019
Grygorii Strashko4ccfd632016-11-29 16:27:03 -06003020 /* shut up ASSERT_RTNL() warning in netif_set_real_num_tx/rx_queues */
3021 rtnl_lock();
Mugunthan V N618073e2014-09-11 22:52:38 +05303022
Keerthy2f9b0d92019-06-24 10:46:19 +05303023 for (i = 0; i < cpsw->data.slaves; i++)
3024 if (cpsw->slaves[i].ndev)
Ivan Khoronzhuk606f3992016-08-10 02:22:42 +03003025 if (netif_running(cpsw->slaves[i].ndev))
3026 cpsw_ndo_open(cpsw->slaves[i].ndev);
Keerthy2f9b0d92019-06-24 10:46:19 +05303027
Grygorii Strashko4ccfd632016-11-29 16:27:03 -06003028 rtnl_unlock();
3029
Mugunthan V Ndf828592012-03-18 20:17:54 +00003030 return 0;
3031}
Grygorii Strashko8963a502015-02-27 13:19:45 +02003032#endif
Mugunthan V Ndf828592012-03-18 20:17:54 +00003033
Grygorii Strashko8963a502015-02-27 13:19:45 +02003034static SIMPLE_DEV_PM_OPS(cpsw_pm_ops, cpsw_suspend, cpsw_resume);
Mugunthan V Ndf828592012-03-18 20:17:54 +00003035
3036static struct platform_driver cpsw_driver = {
3037 .driver = {
3038 .name = "cpsw",
Mugunthan V Ndf828592012-03-18 20:17:54 +00003039 .pm = &cpsw_pm_ops,
Sachin Kamat1e5c76d2013-09-30 09:55:12 +05303040 .of_match_table = cpsw_of_mtable,
Mugunthan V Ndf828592012-03-18 20:17:54 +00003041 },
3042 .probe = cpsw_probe,
Bill Pemberton663e12e2012-12-03 09:23:45 -05003043 .remove = cpsw_remove,
Mugunthan V Ndf828592012-03-18 20:17:54 +00003044};
3045
Grygorii Strashko6fb3b6b52015-10-23 14:41:12 +03003046module_platform_driver(cpsw_driver);
Mugunthan V Ndf828592012-03-18 20:17:54 +00003047
3048MODULE_LICENSE("GPL");
3049MODULE_AUTHOR("Cyril Chemparathy <cyril@ti.com>");
3050MODULE_AUTHOR("Mugunthan V N <mugunthanvnm@ti.com>");
3051MODULE_DESCRIPTION("TI CPSW Ethernet driver");