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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Saeed Mahameed74862162016-06-09 15:11:34 +0300150 MLX5_CMD_OP_SET_RATE_LIMIT = 0x780,
151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300203 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300204 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
205 MLX5_CMD_OP_QUERY_RQ = 0x90b,
206 MLX5_CMD_OP_CREATE_RMP = 0x90c,
207 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
208 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
209 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300210 MLX5_CMD_OP_CREATE_TIS = 0x912,
211 MLX5_CMD_OP_MODIFY_TIS = 0x913,
212 MLX5_CMD_OP_DESTROY_TIS = 0x914,
213 MLX5_CMD_OP_QUERY_TIS = 0x915,
214 MLX5_CMD_OP_CREATE_RQT = 0x916,
215 MLX5_CMD_OP_MODIFY_RQT = 0x917,
216 MLX5_CMD_OP_DESTROY_RQT = 0x918,
217 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200218 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300219 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
220 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
221 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
222 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
223 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
224 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
225 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
226 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200227 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000228 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
229 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
230 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300231 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300232 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
233 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200234 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
235 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300236 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
237 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
238 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
239 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
240 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300241 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300242};
243
244struct mlx5_ifc_flow_table_fields_supported_bits {
245 u8 outer_dmac[0x1];
246 u8 outer_smac[0x1];
247 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300248 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300249 u8 outer_first_prio[0x1];
250 u8 outer_first_cfi[0x1];
251 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300252 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300253 u8 outer_second_prio[0x1];
254 u8 outer_second_cfi[0x1];
255 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200256 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300257 u8 outer_sip[0x1];
258 u8 outer_dip[0x1];
259 u8 outer_frag[0x1];
260 u8 outer_ip_protocol[0x1];
261 u8 outer_ip_ecn[0x1];
262 u8 outer_ip_dscp[0x1];
263 u8 outer_udp_sport[0x1];
264 u8 outer_udp_dport[0x1];
265 u8 outer_tcp_sport[0x1];
266 u8 outer_tcp_dport[0x1];
267 u8 outer_tcp_flags[0x1];
268 u8 outer_gre_protocol[0x1];
269 u8 outer_gre_key[0x1];
270 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200271 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300272 u8 source_eswitch_port[0x1];
273
274 u8 inner_dmac[0x1];
275 u8 inner_smac[0x1];
276 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300277 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300278 u8 inner_first_prio[0x1];
279 u8 inner_first_cfi[0x1];
280 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200281 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300282 u8 inner_second_prio[0x1];
283 u8 inner_second_cfi[0x1];
284 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200285 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300286 u8 inner_sip[0x1];
287 u8 inner_dip[0x1];
288 u8 inner_frag[0x1];
289 u8 inner_ip_protocol[0x1];
290 u8 inner_ip_ecn[0x1];
291 u8 inner_ip_dscp[0x1];
292 u8 inner_udp_sport[0x1];
293 u8 inner_udp_dport[0x1];
294 u8 inner_tcp_sport[0x1];
295 u8 inner_tcp_dport[0x1];
296 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200297 u8 reserved_at_37[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +0300298
Matan Barakb4ff3a32016-02-09 14:57:42 +0200299 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300300};
301
302struct mlx5_ifc_flow_table_prop_layout_bits {
303 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000304 u8 reserved_at_1[0x1];
305 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200306 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200307 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200308 u8 identified_miss_table_mode[0x1];
309 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300310 u8 encap[0x1];
311 u8 decap[0x1];
312 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300313
Matan Barakb4ff3a32016-02-09 14:57:42 +0200314 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300315 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200316 u8 log_max_modify_header_context[0x8];
317 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300318 u8 max_ft_level[0x8];
319
Matan Barakb4ff3a32016-02-09 14:57:42 +0200320 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300321
Matan Barakb4ff3a32016-02-09 14:57:42 +0200322 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200323 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300324
Matan Barakb4ff3a32016-02-09 14:57:42 +0200325 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200326 u8 log_max_destination[0x8];
327
Matan Barakb4ff3a32016-02-09 14:57:42 +0200328 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300329 u8 log_max_flow[0x8];
330
Matan Barakb4ff3a32016-02-09 14:57:42 +0200331 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300332
333 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
334
335 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
336};
337
338struct mlx5_ifc_odp_per_transport_service_cap_bits {
339 u8 send[0x1];
340 u8 receive[0x1];
341 u8 write[0x1];
342 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200343 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300344 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200345 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300346};
347
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200348struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200349 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200350
351 u8 ipv4[0x20];
352};
353
354struct mlx5_ifc_ipv6_layout_bits {
355 u8 ipv6[16][0x8];
356};
357
358union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
359 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
360 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200361 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200362};
363
Saeed Mahameede2816822015-05-28 22:28:40 +0300364struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
365 u8 smac_47_16[0x20];
366
367 u8 smac_15_0[0x10];
368 u8 ethertype[0x10];
369
370 u8 dmac_47_16[0x20];
371
372 u8 dmac_15_0[0x10];
373 u8 first_prio[0x3];
374 u8 first_cfi[0x1];
375 u8 first_vid[0xc];
376
377 u8 ip_protocol[0x8];
378 u8 ip_dscp[0x6];
379 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300380 u8 cvlan_tag[0x1];
381 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300382 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300383 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300384 u8 tcp_flags[0x9];
385
386 u8 tcp_sport[0x10];
387 u8 tcp_dport[0x10];
388
Or Gerlitza8ade552017-06-07 17:49:56 +0300389 u8 reserved_at_c0[0x18];
390 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300391
392 u8 udp_sport[0x10];
393 u8 udp_dport[0x10];
394
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200395 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300396
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200397 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300398};
399
400struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300401 u8 reserved_at_0[0x8];
402 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300403
Matan Barakb4ff3a32016-02-09 14:57:42 +0200404 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300405 u8 source_port[0x10];
406
407 u8 outer_second_prio[0x3];
408 u8 outer_second_cfi[0x1];
409 u8 outer_second_vid[0xc];
410 u8 inner_second_prio[0x3];
411 u8 inner_second_cfi[0x1];
412 u8 inner_second_vid[0xc];
413
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300414 u8 outer_second_cvlan_tag[0x1];
415 u8 inner_second_cvlan_tag[0x1];
416 u8 outer_second_svlan_tag[0x1];
417 u8 inner_second_svlan_tag[0x1];
418 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300419 u8 gre_protocol[0x10];
420
421 u8 gre_key_h[0x18];
422 u8 gre_key_l[0x8];
423
424 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200425 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300426
Matan Barakb4ff3a32016-02-09 14:57:42 +0200427 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300428
Matan Barakb4ff3a32016-02-09 14:57:42 +0200429 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300430 u8 outer_ipv6_flow_label[0x14];
431
Matan Barakb4ff3a32016-02-09 14:57:42 +0200432 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300433 u8 inner_ipv6_flow_label[0x14];
434
Matan Barakb4ff3a32016-02-09 14:57:42 +0200435 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300436};
437
438struct mlx5_ifc_cmd_pas_bits {
439 u8 pa_h[0x20];
440
441 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200442 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300443};
444
445struct mlx5_ifc_uint64_bits {
446 u8 hi[0x20];
447
448 u8 lo[0x20];
449};
450
451enum {
452 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
453 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
454 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
455 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
456 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
457 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
458 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
459 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
460 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
461 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
462};
463
464struct mlx5_ifc_ads_bits {
465 u8 fl[0x1];
466 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200467 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300468 u8 pkey_index[0x10];
469
Matan Barakb4ff3a32016-02-09 14:57:42 +0200470 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300471 u8 grh[0x1];
472 u8 mlid[0x7];
473 u8 rlid[0x10];
474
475 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200476 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300477 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200478 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300479 u8 stat_rate[0x4];
480 u8 hop_limit[0x8];
481
Matan Barakb4ff3a32016-02-09 14:57:42 +0200482 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300483 u8 tclass[0x8];
484 u8 flow_label[0x14];
485
486 u8 rgid_rip[16][0x8];
487
Matan Barakb4ff3a32016-02-09 14:57:42 +0200488 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300489 u8 f_dscp[0x1];
490 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200491 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300492 u8 f_eth_prio[0x1];
493 u8 ecn[0x2];
494 u8 dscp[0x6];
495 u8 udp_sport[0x10];
496
497 u8 dei_cfi[0x1];
498 u8 eth_prio[0x3];
499 u8 sl[0x4];
500 u8 port[0x8];
501 u8 rmac_47_32[0x10];
502
503 u8 rmac_31_0[0x20];
504};
505
506struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200507 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300508 u8 nic_rx_multi_path_tirs_fts[0x1];
509 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
510 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300511
512 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
513
Matan Barakb4ff3a32016-02-09 14:57:42 +0200514 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300515
516 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
517
518 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
519
Matan Barakb4ff3a32016-02-09 14:57:42 +0200520 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300521
522 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
523
Matan Barakb4ff3a32016-02-09 14:57:42 +0200524 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300525};
526
Saeed Mahameed495716b2015-12-01 18:03:19 +0200527struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200528 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200529
530 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
531
532 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
533
534 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
535
Matan Barakb4ff3a32016-02-09 14:57:42 +0200536 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200537};
538
Saeed Mahameedd6666752015-12-01 18:03:22 +0200539struct mlx5_ifc_e_switch_cap_bits {
540 u8 vport_svlan_strip[0x1];
541 u8 vport_cvlan_strip[0x1];
542 u8 vport_svlan_insert[0x1];
543 u8 vport_cvlan_insert_if_not_exist[0x1];
544 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300545 u8 reserved_at_5[0x19];
546 u8 nic_vport_node_guid_modify[0x1];
547 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200548
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300549 u8 vxlan_encap_decap[0x1];
550 u8 nvgre_encap_decap[0x1];
551 u8 reserved_at_22[0x9];
552 u8 log_max_encap_headers[0x5];
553 u8 reserved_2b[0x6];
554 u8 max_encap_header_size[0xa];
555
556 u8 reserved_40[0x7c0];
557
Saeed Mahameedd6666752015-12-01 18:03:22 +0200558};
559
Saeed Mahameed74862162016-06-09 15:11:34 +0300560struct mlx5_ifc_qos_cap_bits {
561 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300562 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200563 u8 esw_bw_share[0x1];
564 u8 esw_rate_limit[0x1];
565 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300566
567 u8 reserved_at_20[0x20];
568
Saeed Mahameed74862162016-06-09 15:11:34 +0300569 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300570
Saeed Mahameed74862162016-06-09 15:11:34 +0300571 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300572
573 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300574 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300575
576 u8 esw_element_type[0x10];
577 u8 esw_tsar_type[0x10];
578
579 u8 reserved_at_c0[0x10];
580 u8 max_qos_para_vport[0x10];
581
582 u8 max_tsar_bw_share[0x20];
583
584 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300585};
586
Saeed Mahameede2816822015-05-28 22:28:40 +0300587struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
588 u8 csum_cap[0x1];
589 u8 vlan_cap[0x1];
590 u8 lro_cap[0x1];
591 u8 lro_psh_flag[0x1];
592 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200593 u8 reserved_at_5[0x2];
594 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200595 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200596 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300597 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200598 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300599 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300600 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300601 u8 reg_umr_sq[0x1];
602 u8 scatter_fcs[0x1];
603 u8 reserved_at_1a[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300604 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200605 u8 reserved_at_1c[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300606 u8 tunnel_statless_gre[0x1];
607 u8 tunnel_stateless_vxlan[0x1];
608
Ilan Tayari547eede2017-04-18 16:04:28 +0300609 u8 swp[0x1];
610 u8 swp_csum[0x1];
611 u8 swp_lso[0x1];
612 u8 reserved_at_23[0x1d];
Saeed Mahameede2816822015-05-28 22:28:40 +0300613
Matan Barakb4ff3a32016-02-09 14:57:42 +0200614 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300615 u8 lro_min_mss_size[0x10];
616
Matan Barakb4ff3a32016-02-09 14:57:42 +0200617 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300618
619 u8 lro_timer_supported_periods[4][0x20];
620
Matan Barakb4ff3a32016-02-09 14:57:42 +0200621 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300622};
623
624struct mlx5_ifc_roce_cap_bits {
625 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200626 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300627
Matan Barakb4ff3a32016-02-09 14:57:42 +0200628 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300629
Matan Barakb4ff3a32016-02-09 14:57:42 +0200630 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300631 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200632 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300633 u8 roce_version[0x8];
634
Matan Barakb4ff3a32016-02-09 14:57:42 +0200635 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300636 u8 r_roce_dest_udp_port[0x10];
637
638 u8 r_roce_max_src_udp_port[0x10];
639 u8 r_roce_min_src_udp_port[0x10];
640
Matan Barakb4ff3a32016-02-09 14:57:42 +0200641 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300642 u8 roce_address_table_size[0x10];
643
Matan Barakb4ff3a32016-02-09 14:57:42 +0200644 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300645};
646
647enum {
648 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
649 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
650 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
651 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
652 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
653 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
654 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
656 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
657};
658
659enum {
660 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
661 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
662 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
663 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
664 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
665 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
666 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
667 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
668 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
669};
670
671struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200672 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300673
Or Gerlitzbd108382017-05-28 15:24:17 +0300674 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200675 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300676 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300677
Matan Barakb4ff3a32016-02-09 14:57:42 +0200678 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300679
Matan Barakb4ff3a32016-02-09 14:57:42 +0200680 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300681
Matan Barakb4ff3a32016-02-09 14:57:42 +0200682 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200683 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300684
Matan Barakb4ff3a32016-02-09 14:57:42 +0200685 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200686 u8 atomic_size_qp[0x10];
687
Matan Barakb4ff3a32016-02-09 14:57:42 +0200688 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300689 u8 atomic_size_dc[0x10];
690
Matan Barakb4ff3a32016-02-09 14:57:42 +0200691 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300692};
693
694struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200695 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300696
697 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200698 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300699
Matan Barakb4ff3a32016-02-09 14:57:42 +0200700 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300701
702 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
703
704 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
705
706 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
707
Matan Barakb4ff3a32016-02-09 14:57:42 +0200708 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300709};
710
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200711struct mlx5_ifc_calc_op {
712 u8 reserved_at_0[0x10];
713 u8 reserved_at_10[0x9];
714 u8 op_swap_endianness[0x1];
715 u8 op_min[0x1];
716 u8 op_xor[0x1];
717 u8 op_or[0x1];
718 u8 op_and[0x1];
719 u8 op_max[0x1];
720 u8 op_add[0x1];
721};
722
723struct mlx5_ifc_vector_calc_cap_bits {
724 u8 calc_matrix[0x1];
725 u8 reserved_at_1[0x1f];
726 u8 reserved_at_20[0x8];
727 u8 max_vec_count[0x8];
728 u8 reserved_at_30[0xd];
729 u8 max_chunk_size[0x3];
730 struct mlx5_ifc_calc_op calc0;
731 struct mlx5_ifc_calc_op calc1;
732 struct mlx5_ifc_calc_op calc2;
733 struct mlx5_ifc_calc_op calc3;
734
735 u8 reserved_at_e0[0x720];
736};
737
Saeed Mahameede2816822015-05-28 22:28:40 +0300738enum {
739 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
740 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300741 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +0300742};
743
744enum {
745 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
746 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
747};
748
749enum {
750 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
751 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
752 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
753 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
754 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
755};
756
757enum {
758 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
759 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
760 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
761 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
762 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
763 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
764};
765
766enum {
767 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
768 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
769};
770
771enum {
772 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
773 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
774 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
775};
776
777enum {
778 MLX5_CAP_PORT_TYPE_IB = 0x0,
779 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300780};
781
Max Gurtovoy1410a902017-05-28 10:53:10 +0300782enum {
783 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
784 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
785 MLX5_CAP_UMR_FENCE_NONE = 0x2,
786};
787
Eli Cohenb7755162014-10-02 12:19:44 +0300788struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200789 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300790
791 u8 log_max_srq_sz[0x8];
792 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200793 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300794 u8 log_max_qp[0x5];
795
Matan Barakb4ff3a32016-02-09 14:57:42 +0200796 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300797 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200798 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300799
Matan Barakb4ff3a32016-02-09 14:57:42 +0200800 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300801 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200802 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300803 u8 log_max_cq[0x5];
804
805 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200806 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300807 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200808 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300809 u8 log_max_eq[0x4];
810
811 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200812 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300813 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200814 u8 force_teardown[0x1];
815 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300816 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200817 u8 umr_extended_translation_offset[0x1];
818 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300819 u8 log_max_klm_list_size[0x6];
820
Matan Barakb4ff3a32016-02-09 14:57:42 +0200821 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300822 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200823 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300824 u8 log_max_ra_res_dc[0x6];
825
Matan Barakb4ff3a32016-02-09 14:57:42 +0200826 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300827 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200828 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300829 u8 log_max_ra_res_qp[0x6];
830
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200831 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300832 u8 cc_query_allowed[0x1];
833 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200834 u8 start_pad[0x1];
835 u8 cache_line_128byte[0x1];
Or Gerlitz137ffd12017-06-13 18:12:13 +0300836 u8 reserved_at_165[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300837 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300838
Saeed Mahameede2816822015-05-28 22:28:40 +0300839 u8 out_of_seq_cnt[0x1];
840 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300841 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300842 u8 reserved_at_183[0x1];
843 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300844 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300845 u8 max_qp_cnt[0xa];
846 u8 pkey_table_size[0x10];
847
Saeed Mahameede2816822015-05-28 22:28:40 +0300848 u8 vport_group_manager[0x1];
849 u8 vhca_group_manager[0x1];
850 u8 ib_virt[0x1];
851 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200852 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300853 u8 ets[0x1];
854 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200855 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300856 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200857 u8 mcam_reg[0x1];
858 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300859 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200860 u8 port_module_event[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200861 u8 reserved_at_1b1[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300862 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200863 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300864 u8 disable_link_up[0x1];
865 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300866 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300867 u8 num_ports[0x8];
868
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300869 u8 reserved_at_1c0[0x1];
870 u8 pps[0x1];
871 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300872 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300873 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200874 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300875 u8 reserved_at_1d0[0x1];
876 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300877 u8 general_notification_event[0x1];
878 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200879 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200880 u8 rol_s[0x1];
881 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300882 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200883 u8 wol_s[0x1];
884 u8 wol_g[0x1];
885 u8 wol_a[0x1];
886 u8 wol_b[0x1];
887 u8 wol_m[0x1];
888 u8 wol_u[0x1];
889 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300890
891 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300892 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300893 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300894
Saeed Mahameede2816822015-05-28 22:28:40 +0300895 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300896 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300897 u8 reserved_at_202[0x1];
898 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200899 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300900 u8 reserved_at_205[0x5];
901 u8 umr_fence[0x2];
902 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300903 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300904 u8 cmdif_checksum[0x2];
905 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300906 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300907 u8 wq_signature[0x1];
908 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300909 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300910 u8 sho[0x1];
911 u8 tph[0x1];
912 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300913 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300914 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300915 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300916 u8 roce[0x1];
917 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300918 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300919
920 u8 cq_oi[0x1];
921 u8 cq_resize[0x1];
922 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300923 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300924 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300925 u8 pg[0x1];
926 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300927 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300928 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300929 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300930 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300931 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300932 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200933 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300934 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200935 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300936 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300937 u8 qkv[0x1];
938 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200939 u8 set_deth_sqpn[0x1];
940 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300941 u8 xrc[0x1];
942 u8 ud[0x1];
943 u8 uc[0x1];
944 u8 rc[0x1];
945
Eli Cohena6d51b62017-01-03 23:55:23 +0200946 u8 uar_4k[0x1];
947 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300948 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300949 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300950 u8 log_pg_sz[0x8];
951
952 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200953 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300954 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300955 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300956 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300957
958 u8 reserved_at_270[0xb];
959 u8 lag_master[0x1];
960 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300961
Tariq Toukane1c9c622016-04-11 23:10:21 +0300962 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300963 u8 max_wqe_sz_sq[0x10];
964
Tariq Toukane1c9c622016-04-11 23:10:21 +0300965 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300966 u8 max_wqe_sz_rq[0x10];
967
Tariq Toukane1c9c622016-04-11 23:10:21 +0300968 u8 reserved_at_2c0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300969 u8 max_wqe_sz_sq_dc[0x10];
970
Tariq Toukane1c9c622016-04-11 23:10:21 +0300971 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300972 u8 max_qp_mcg[0x19];
973
Tariq Toukane1c9c622016-04-11 23:10:21 +0300974 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300975 u8 log_max_mcg[0x8];
976
Tariq Toukane1c9c622016-04-11 23:10:21 +0300977 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300978 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300979 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300980 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300981 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300982 u8 log_max_xrcd[0x5];
983
Amir Vadaia351a1b02016-07-14 10:32:38 +0300984 u8 reserved_at_340[0x8];
985 u8 log_max_flow_counter_bulk[0x8];
986 u8 max_flow_counter[0x10];
987
Eli Cohenb7755162014-10-02 12:19:44 +0300988
Tariq Toukane1c9c622016-04-11 23:10:21 +0300989 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300990 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300991 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300992 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300993 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300994 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300995 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300996 u8 log_max_tis[0x5];
997
Saeed Mahameede2816822015-05-28 22:28:40 +0300998 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300999 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001000 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001001 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001002 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001003 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001004 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001005 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001006 u8 log_max_tis_per_sq[0x5];
1007
Tariq Toukane1c9c622016-04-11 23:10:21 +03001008 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001009 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001010 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001011 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001012 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001013 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001014 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001015 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001016
Tariq Toukane1c9c622016-04-11 23:10:21 +03001017 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03001018 u8 log_max_wq_sz[0x5];
1019
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001020 u8 nic_vport_change_event[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03001021 u8 disable_local_lb[0x1];
1022 u8 reserved_at_3e2[0x9];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001023 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001024 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001025 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001026 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001027 u8 log_max_current_uc_list[0x5];
1028
Tariq Toukane1c9c622016-04-11 23:10:21 +03001029 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001030
Tariq Toukane1c9c622016-04-11 23:10:21 +03001031 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001032 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001033 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001034 u8 log_uar_page_sz[0x10];
1035
Tariq Toukane1c9c622016-04-11 23:10:21 +03001036 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001037 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001038 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001039
Eli Cohena6d51b62017-01-03 23:55:23 +02001040 u8 reserved_at_500[0x20];
1041 u8 num_of_uars_per_page[0x20];
1042 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001043
1044 u8 reserved_at_580[0x3f];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001045 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001046
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001047 u8 cqe_compression_timeout[0x10];
1048 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001049
Saeed Mahameed74862162016-06-09 15:11:34 +03001050 u8 reserved_at_5e0[0x10];
1051 u8 tag_matching[0x1];
1052 u8 rndv_offload_rc[0x1];
1053 u8 rndv_offload_dc[0x1];
1054 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001055 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001056 u8 log_max_xrq[0x5];
1057
Max Gurtovoy7b135582017-01-02 11:37:38 +02001058 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001059};
1060
Saeed Mahameed81848732015-12-01 18:03:20 +02001061enum mlx5_flow_destination_type {
1062 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1063 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1064 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001065
1066 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001067};
1068
1069struct mlx5_ifc_dest_format_struct_bits {
1070 u8 destination_type[0x8];
1071 u8 destination_id[0x18];
1072
Matan Barakb4ff3a32016-02-09 14:57:42 +02001073 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001074};
1075
Amir Vadai9dc0b282016-05-13 12:55:39 +00001076struct mlx5_ifc_flow_counter_list_bits {
Amir Vadaia351a1b02016-07-14 10:32:38 +03001077 u8 clear[0x1];
1078 u8 num_of_counters[0xf];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001079 u8 flow_counter_id[0x10];
1080
1081 u8 reserved_at_20[0x20];
1082};
1083
1084union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1085 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1086 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1087 u8 reserved_at_0[0x40];
1088};
1089
Saeed Mahameede2816822015-05-28 22:28:40 +03001090struct mlx5_ifc_fte_match_param_bits {
1091 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1092
1093 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1094
1095 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1096
Matan Barakb4ff3a32016-02-09 14:57:42 +02001097 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001098};
1099
1100enum {
1101 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1102 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1103 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1104 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1105 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1106};
1107
1108struct mlx5_ifc_rx_hash_field_select_bits {
1109 u8 l3_prot_type[0x1];
1110 u8 l4_prot_type[0x1];
1111 u8 selected_fields[0x1e];
1112};
1113
1114enum {
1115 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1116 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1117};
1118
1119enum {
1120 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1121 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1122};
1123
1124struct mlx5_ifc_wq_bits {
1125 u8 wq_type[0x4];
1126 u8 wq_signature[0x1];
1127 u8 end_padding_mode[0x2];
1128 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001129 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001130
1131 u8 hds_skip_first_sge[0x1];
1132 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001133 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001134 u8 page_offset[0x5];
1135 u8 lwm[0x10];
1136
Matan Barakb4ff3a32016-02-09 14:57:42 +02001137 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001138 u8 pd[0x18];
1139
Matan Barakb4ff3a32016-02-09 14:57:42 +02001140 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001141 u8 uar_page[0x18];
1142
1143 u8 dbr_addr[0x40];
1144
1145 u8 hw_counter[0x20];
1146
1147 u8 sw_counter[0x20];
1148
Matan Barakb4ff3a32016-02-09 14:57:42 +02001149 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001150 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001151 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001152 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001153 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001154 u8 log_wq_sz[0x5];
1155
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001156 u8 reserved_at_120[0x15];
1157 u8 log_wqe_num_of_strides[0x3];
1158 u8 two_byte_shift_en[0x1];
1159 u8 reserved_at_139[0x4];
1160 u8 log_wqe_stride_size[0x3];
1161
1162 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001163
1164 struct mlx5_ifc_cmd_pas_bits pas[0];
1165};
1166
1167struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001168 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001169 u8 rq_num[0x18];
1170};
1171
1172struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001173 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001174 u8 mac_addr_47_32[0x10];
1175
1176 u8 mac_addr_31_0[0x20];
1177};
1178
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001179struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001180 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001181 u8 vlan[0x0c];
1182
Matan Barakb4ff3a32016-02-09 14:57:42 +02001183 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001184};
1185
Saeed Mahameede2816822015-05-28 22:28:40 +03001186struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001187 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001188
1189 u8 min_time_between_cnps[0x20];
1190
Matan Barakb4ff3a32016-02-09 14:57:42 +02001191 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001192 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001193 u8 reserved_at_d8[0x4];
1194 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001195 u8 cnp_802p_prio[0x3];
1196
Matan Barakb4ff3a32016-02-09 14:57:42 +02001197 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001198};
1199
1200struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001201 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001202
Matan Barakb4ff3a32016-02-09 14:57:42 +02001203 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001204 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001205 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001206 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001207 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001208
Matan Barakb4ff3a32016-02-09 14:57:42 +02001209 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001210
1211 u8 rpg_time_reset[0x20];
1212
1213 u8 rpg_byte_reset[0x20];
1214
1215 u8 rpg_threshold[0x20];
1216
1217 u8 rpg_max_rate[0x20];
1218
1219 u8 rpg_ai_rate[0x20];
1220
1221 u8 rpg_hai_rate[0x20];
1222
1223 u8 rpg_gd[0x20];
1224
1225 u8 rpg_min_dec_fac[0x20];
1226
1227 u8 rpg_min_rate[0x20];
1228
Matan Barakb4ff3a32016-02-09 14:57:42 +02001229 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001230
1231 u8 rate_to_set_on_first_cnp[0x20];
1232
1233 u8 dce_tcp_g[0x20];
1234
1235 u8 dce_tcp_rtt[0x20];
1236
1237 u8 rate_reduce_monitor_period[0x20];
1238
Matan Barakb4ff3a32016-02-09 14:57:42 +02001239 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001240
1241 u8 initial_alpha_value[0x20];
1242
Matan Barakb4ff3a32016-02-09 14:57:42 +02001243 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001244};
1245
1246struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001247 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001248
1249 u8 rppp_max_rps[0x20];
1250
1251 u8 rpg_time_reset[0x20];
1252
1253 u8 rpg_byte_reset[0x20];
1254
1255 u8 rpg_threshold[0x20];
1256
1257 u8 rpg_max_rate[0x20];
1258
1259 u8 rpg_ai_rate[0x20];
1260
1261 u8 rpg_hai_rate[0x20];
1262
1263 u8 rpg_gd[0x20];
1264
1265 u8 rpg_min_dec_fac[0x20];
1266
1267 u8 rpg_min_rate[0x20];
1268
Matan Barakb4ff3a32016-02-09 14:57:42 +02001269 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001270};
1271
1272enum {
1273 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1274 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1275 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1276};
1277
1278struct mlx5_ifc_resize_field_select_bits {
1279 u8 resize_field_select[0x20];
1280};
1281
1282enum {
1283 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1284 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1285 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1286 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1287};
1288
1289struct mlx5_ifc_modify_field_select_bits {
1290 u8 modify_field_select[0x20];
1291};
1292
1293struct mlx5_ifc_field_select_r_roce_np_bits {
1294 u8 field_select_r_roce_np[0x20];
1295};
1296
1297struct mlx5_ifc_field_select_r_roce_rp_bits {
1298 u8 field_select_r_roce_rp[0x20];
1299};
1300
1301enum {
1302 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1303 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1304 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1305 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1306 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1307 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1308 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1309 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1310 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1311 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1312};
1313
1314struct mlx5_ifc_field_select_802_1qau_rp_bits {
1315 u8 field_select_8021qaurp[0x20];
1316};
1317
1318struct mlx5_ifc_phys_layer_cntrs_bits {
1319 u8 time_since_last_clear_high[0x20];
1320
1321 u8 time_since_last_clear_low[0x20];
1322
1323 u8 symbol_errors_high[0x20];
1324
1325 u8 symbol_errors_low[0x20];
1326
1327 u8 sync_headers_errors_high[0x20];
1328
1329 u8 sync_headers_errors_low[0x20];
1330
1331 u8 edpl_bip_errors_lane0_high[0x20];
1332
1333 u8 edpl_bip_errors_lane0_low[0x20];
1334
1335 u8 edpl_bip_errors_lane1_high[0x20];
1336
1337 u8 edpl_bip_errors_lane1_low[0x20];
1338
1339 u8 edpl_bip_errors_lane2_high[0x20];
1340
1341 u8 edpl_bip_errors_lane2_low[0x20];
1342
1343 u8 edpl_bip_errors_lane3_high[0x20];
1344
1345 u8 edpl_bip_errors_lane3_low[0x20];
1346
1347 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1348
1349 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1350
1351 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1352
1353 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1354
1355 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1356
1357 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1358
1359 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1360
1361 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1362
1363 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1364
1365 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1366
1367 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1368
1369 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1370
1371 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1372
1373 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1374
1375 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1376
1377 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1378
1379 u8 rs_fec_corrected_blocks_high[0x20];
1380
1381 u8 rs_fec_corrected_blocks_low[0x20];
1382
1383 u8 rs_fec_uncorrectable_blocks_high[0x20];
1384
1385 u8 rs_fec_uncorrectable_blocks_low[0x20];
1386
1387 u8 rs_fec_no_errors_blocks_high[0x20];
1388
1389 u8 rs_fec_no_errors_blocks_low[0x20];
1390
1391 u8 rs_fec_single_error_blocks_high[0x20];
1392
1393 u8 rs_fec_single_error_blocks_low[0x20];
1394
1395 u8 rs_fec_corrected_symbols_total_high[0x20];
1396
1397 u8 rs_fec_corrected_symbols_total_low[0x20];
1398
1399 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1400
1401 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1402
1403 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1404
1405 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1406
1407 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1408
1409 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1410
1411 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1412
1413 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1414
1415 u8 link_down_events[0x20];
1416
1417 u8 successful_recovery_events[0x20];
1418
Matan Barakb4ff3a32016-02-09 14:57:42 +02001419 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001420};
1421
Gal Pressmand8dc0502016-09-27 17:04:51 +03001422struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1423 u8 time_since_last_clear_high[0x20];
1424
1425 u8 time_since_last_clear_low[0x20];
1426
1427 u8 phy_received_bits_high[0x20];
1428
1429 u8 phy_received_bits_low[0x20];
1430
1431 u8 phy_symbol_errors_high[0x20];
1432
1433 u8 phy_symbol_errors_low[0x20];
1434
1435 u8 phy_corrected_bits_high[0x20];
1436
1437 u8 phy_corrected_bits_low[0x20];
1438
1439 u8 phy_corrected_bits_lane0_high[0x20];
1440
1441 u8 phy_corrected_bits_lane0_low[0x20];
1442
1443 u8 phy_corrected_bits_lane1_high[0x20];
1444
1445 u8 phy_corrected_bits_lane1_low[0x20];
1446
1447 u8 phy_corrected_bits_lane2_high[0x20];
1448
1449 u8 phy_corrected_bits_lane2_low[0x20];
1450
1451 u8 phy_corrected_bits_lane3_high[0x20];
1452
1453 u8 phy_corrected_bits_lane3_low[0x20];
1454
1455 u8 reserved_at_200[0x5c0];
1456};
1457
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001458struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1459 u8 symbol_error_counter[0x10];
1460
1461 u8 link_error_recovery_counter[0x8];
1462
1463 u8 link_downed_counter[0x8];
1464
1465 u8 port_rcv_errors[0x10];
1466
1467 u8 port_rcv_remote_physical_errors[0x10];
1468
1469 u8 port_rcv_switch_relay_errors[0x10];
1470
1471 u8 port_xmit_discards[0x10];
1472
1473 u8 port_xmit_constraint_errors[0x8];
1474
1475 u8 port_rcv_constraint_errors[0x8];
1476
1477 u8 reserved_at_70[0x8];
1478
1479 u8 link_overrun_errors[0x8];
1480
1481 u8 reserved_at_80[0x10];
1482
1483 u8 vl_15_dropped[0x10];
1484
Tim Wright133bea02017-05-01 17:30:08 +01001485 u8 reserved_at_a0[0x80];
1486
1487 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001488};
1489
Saeed Mahameede2816822015-05-28 22:28:40 +03001490struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1491 u8 transmit_queue_high[0x20];
1492
1493 u8 transmit_queue_low[0x20];
1494
Matan Barakb4ff3a32016-02-09 14:57:42 +02001495 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001496};
1497
1498struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1499 u8 rx_octets_high[0x20];
1500
1501 u8 rx_octets_low[0x20];
1502
Matan Barakb4ff3a32016-02-09 14:57:42 +02001503 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001504
1505 u8 rx_frames_high[0x20];
1506
1507 u8 rx_frames_low[0x20];
1508
1509 u8 tx_octets_high[0x20];
1510
1511 u8 tx_octets_low[0x20];
1512
Matan Barakb4ff3a32016-02-09 14:57:42 +02001513 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001514
1515 u8 tx_frames_high[0x20];
1516
1517 u8 tx_frames_low[0x20];
1518
1519 u8 rx_pause_high[0x20];
1520
1521 u8 rx_pause_low[0x20];
1522
1523 u8 rx_pause_duration_high[0x20];
1524
1525 u8 rx_pause_duration_low[0x20];
1526
1527 u8 tx_pause_high[0x20];
1528
1529 u8 tx_pause_low[0x20];
1530
1531 u8 tx_pause_duration_high[0x20];
1532
1533 u8 tx_pause_duration_low[0x20];
1534
1535 u8 rx_pause_transition_high[0x20];
1536
1537 u8 rx_pause_transition_low[0x20];
1538
Matan Barakb4ff3a32016-02-09 14:57:42 +02001539 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001540};
1541
1542struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1543 u8 port_transmit_wait_high[0x20];
1544
1545 u8 port_transmit_wait_low[0x20];
1546
Matan Barakb4ff3a32016-02-09 14:57:42 +02001547 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001548};
1549
1550struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1551 u8 dot3stats_alignment_errors_high[0x20];
1552
1553 u8 dot3stats_alignment_errors_low[0x20];
1554
1555 u8 dot3stats_fcs_errors_high[0x20];
1556
1557 u8 dot3stats_fcs_errors_low[0x20];
1558
1559 u8 dot3stats_single_collision_frames_high[0x20];
1560
1561 u8 dot3stats_single_collision_frames_low[0x20];
1562
1563 u8 dot3stats_multiple_collision_frames_high[0x20];
1564
1565 u8 dot3stats_multiple_collision_frames_low[0x20];
1566
1567 u8 dot3stats_sqe_test_errors_high[0x20];
1568
1569 u8 dot3stats_sqe_test_errors_low[0x20];
1570
1571 u8 dot3stats_deferred_transmissions_high[0x20];
1572
1573 u8 dot3stats_deferred_transmissions_low[0x20];
1574
1575 u8 dot3stats_late_collisions_high[0x20];
1576
1577 u8 dot3stats_late_collisions_low[0x20];
1578
1579 u8 dot3stats_excessive_collisions_high[0x20];
1580
1581 u8 dot3stats_excessive_collisions_low[0x20];
1582
1583 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1584
1585 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1586
1587 u8 dot3stats_carrier_sense_errors_high[0x20];
1588
1589 u8 dot3stats_carrier_sense_errors_low[0x20];
1590
1591 u8 dot3stats_frame_too_longs_high[0x20];
1592
1593 u8 dot3stats_frame_too_longs_low[0x20];
1594
1595 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1596
1597 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1598
1599 u8 dot3stats_symbol_errors_high[0x20];
1600
1601 u8 dot3stats_symbol_errors_low[0x20];
1602
1603 u8 dot3control_in_unknown_opcodes_high[0x20];
1604
1605 u8 dot3control_in_unknown_opcodes_low[0x20];
1606
1607 u8 dot3in_pause_frames_high[0x20];
1608
1609 u8 dot3in_pause_frames_low[0x20];
1610
1611 u8 dot3out_pause_frames_high[0x20];
1612
1613 u8 dot3out_pause_frames_low[0x20];
1614
Matan Barakb4ff3a32016-02-09 14:57:42 +02001615 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001616};
1617
1618struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1619 u8 ether_stats_drop_events_high[0x20];
1620
1621 u8 ether_stats_drop_events_low[0x20];
1622
1623 u8 ether_stats_octets_high[0x20];
1624
1625 u8 ether_stats_octets_low[0x20];
1626
1627 u8 ether_stats_pkts_high[0x20];
1628
1629 u8 ether_stats_pkts_low[0x20];
1630
1631 u8 ether_stats_broadcast_pkts_high[0x20];
1632
1633 u8 ether_stats_broadcast_pkts_low[0x20];
1634
1635 u8 ether_stats_multicast_pkts_high[0x20];
1636
1637 u8 ether_stats_multicast_pkts_low[0x20];
1638
1639 u8 ether_stats_crc_align_errors_high[0x20];
1640
1641 u8 ether_stats_crc_align_errors_low[0x20];
1642
1643 u8 ether_stats_undersize_pkts_high[0x20];
1644
1645 u8 ether_stats_undersize_pkts_low[0x20];
1646
1647 u8 ether_stats_oversize_pkts_high[0x20];
1648
1649 u8 ether_stats_oversize_pkts_low[0x20];
1650
1651 u8 ether_stats_fragments_high[0x20];
1652
1653 u8 ether_stats_fragments_low[0x20];
1654
1655 u8 ether_stats_jabbers_high[0x20];
1656
1657 u8 ether_stats_jabbers_low[0x20];
1658
1659 u8 ether_stats_collisions_high[0x20];
1660
1661 u8 ether_stats_collisions_low[0x20];
1662
1663 u8 ether_stats_pkts64octets_high[0x20];
1664
1665 u8 ether_stats_pkts64octets_low[0x20];
1666
1667 u8 ether_stats_pkts65to127octets_high[0x20];
1668
1669 u8 ether_stats_pkts65to127octets_low[0x20];
1670
1671 u8 ether_stats_pkts128to255octets_high[0x20];
1672
1673 u8 ether_stats_pkts128to255octets_low[0x20];
1674
1675 u8 ether_stats_pkts256to511octets_high[0x20];
1676
1677 u8 ether_stats_pkts256to511octets_low[0x20];
1678
1679 u8 ether_stats_pkts512to1023octets_high[0x20];
1680
1681 u8 ether_stats_pkts512to1023octets_low[0x20];
1682
1683 u8 ether_stats_pkts1024to1518octets_high[0x20];
1684
1685 u8 ether_stats_pkts1024to1518octets_low[0x20];
1686
1687 u8 ether_stats_pkts1519to2047octets_high[0x20];
1688
1689 u8 ether_stats_pkts1519to2047octets_low[0x20];
1690
1691 u8 ether_stats_pkts2048to4095octets_high[0x20];
1692
1693 u8 ether_stats_pkts2048to4095octets_low[0x20];
1694
1695 u8 ether_stats_pkts4096to8191octets_high[0x20];
1696
1697 u8 ether_stats_pkts4096to8191octets_low[0x20];
1698
1699 u8 ether_stats_pkts8192to10239octets_high[0x20];
1700
1701 u8 ether_stats_pkts8192to10239octets_low[0x20];
1702
Matan Barakb4ff3a32016-02-09 14:57:42 +02001703 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001704};
1705
1706struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1707 u8 if_in_octets_high[0x20];
1708
1709 u8 if_in_octets_low[0x20];
1710
1711 u8 if_in_ucast_pkts_high[0x20];
1712
1713 u8 if_in_ucast_pkts_low[0x20];
1714
1715 u8 if_in_discards_high[0x20];
1716
1717 u8 if_in_discards_low[0x20];
1718
1719 u8 if_in_errors_high[0x20];
1720
1721 u8 if_in_errors_low[0x20];
1722
1723 u8 if_in_unknown_protos_high[0x20];
1724
1725 u8 if_in_unknown_protos_low[0x20];
1726
1727 u8 if_out_octets_high[0x20];
1728
1729 u8 if_out_octets_low[0x20];
1730
1731 u8 if_out_ucast_pkts_high[0x20];
1732
1733 u8 if_out_ucast_pkts_low[0x20];
1734
1735 u8 if_out_discards_high[0x20];
1736
1737 u8 if_out_discards_low[0x20];
1738
1739 u8 if_out_errors_high[0x20];
1740
1741 u8 if_out_errors_low[0x20];
1742
1743 u8 if_in_multicast_pkts_high[0x20];
1744
1745 u8 if_in_multicast_pkts_low[0x20];
1746
1747 u8 if_in_broadcast_pkts_high[0x20];
1748
1749 u8 if_in_broadcast_pkts_low[0x20];
1750
1751 u8 if_out_multicast_pkts_high[0x20];
1752
1753 u8 if_out_multicast_pkts_low[0x20];
1754
1755 u8 if_out_broadcast_pkts_high[0x20];
1756
1757 u8 if_out_broadcast_pkts_low[0x20];
1758
Matan Barakb4ff3a32016-02-09 14:57:42 +02001759 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001760};
1761
1762struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1763 u8 a_frames_transmitted_ok_high[0x20];
1764
1765 u8 a_frames_transmitted_ok_low[0x20];
1766
1767 u8 a_frames_received_ok_high[0x20];
1768
1769 u8 a_frames_received_ok_low[0x20];
1770
1771 u8 a_frame_check_sequence_errors_high[0x20];
1772
1773 u8 a_frame_check_sequence_errors_low[0x20];
1774
1775 u8 a_alignment_errors_high[0x20];
1776
1777 u8 a_alignment_errors_low[0x20];
1778
1779 u8 a_octets_transmitted_ok_high[0x20];
1780
1781 u8 a_octets_transmitted_ok_low[0x20];
1782
1783 u8 a_octets_received_ok_high[0x20];
1784
1785 u8 a_octets_received_ok_low[0x20];
1786
1787 u8 a_multicast_frames_xmitted_ok_high[0x20];
1788
1789 u8 a_multicast_frames_xmitted_ok_low[0x20];
1790
1791 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1792
1793 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1794
1795 u8 a_multicast_frames_received_ok_high[0x20];
1796
1797 u8 a_multicast_frames_received_ok_low[0x20];
1798
1799 u8 a_broadcast_frames_received_ok_high[0x20];
1800
1801 u8 a_broadcast_frames_received_ok_low[0x20];
1802
1803 u8 a_in_range_length_errors_high[0x20];
1804
1805 u8 a_in_range_length_errors_low[0x20];
1806
1807 u8 a_out_of_range_length_field_high[0x20];
1808
1809 u8 a_out_of_range_length_field_low[0x20];
1810
1811 u8 a_frame_too_long_errors_high[0x20];
1812
1813 u8 a_frame_too_long_errors_low[0x20];
1814
1815 u8 a_symbol_error_during_carrier_high[0x20];
1816
1817 u8 a_symbol_error_during_carrier_low[0x20];
1818
1819 u8 a_mac_control_frames_transmitted_high[0x20];
1820
1821 u8 a_mac_control_frames_transmitted_low[0x20];
1822
1823 u8 a_mac_control_frames_received_high[0x20];
1824
1825 u8 a_mac_control_frames_received_low[0x20];
1826
1827 u8 a_unsupported_opcodes_received_high[0x20];
1828
1829 u8 a_unsupported_opcodes_received_low[0x20];
1830
1831 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1832
1833 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1834
1835 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1836
1837 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1838
Matan Barakb4ff3a32016-02-09 14:57:42 +02001839 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001840};
1841
Gal Pressman8ed1a632016-11-17 13:46:01 +02001842struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1843 u8 life_time_counter_high[0x20];
1844
1845 u8 life_time_counter_low[0x20];
1846
1847 u8 rx_errors[0x20];
1848
1849 u8 tx_errors[0x20];
1850
1851 u8 l0_to_recovery_eieos[0x20];
1852
1853 u8 l0_to_recovery_ts[0x20];
1854
1855 u8 l0_to_recovery_framing[0x20];
1856
1857 u8 l0_to_recovery_retrain[0x20];
1858
1859 u8 crc_error_dllp[0x20];
1860
1861 u8 crc_error_tlp[0x20];
1862
1863 u8 reserved_at_140[0x680];
1864};
1865
Saeed Mahameede2816822015-05-28 22:28:40 +03001866struct mlx5_ifc_cmd_inter_comp_event_bits {
1867 u8 command_completion_vector[0x20];
1868
Matan Barakb4ff3a32016-02-09 14:57:42 +02001869 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001870};
1871
1872struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001873 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001874 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001875 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001876 u8 vl[0x4];
1877
Matan Barakb4ff3a32016-02-09 14:57:42 +02001878 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001879};
1880
1881struct mlx5_ifc_db_bf_congestion_event_bits {
1882 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001883 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001884 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001885 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001886
Matan Barakb4ff3a32016-02-09 14:57:42 +02001887 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001888};
1889
1890struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001891 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001892
1893 u8 gpio_event_hi[0x20];
1894
1895 u8 gpio_event_lo[0x20];
1896
Matan Barakb4ff3a32016-02-09 14:57:42 +02001897 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001898};
1899
1900struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001901 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001902
1903 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001904 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001905
Matan Barakb4ff3a32016-02-09 14:57:42 +02001906 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001907};
1908
1909struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001910 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001911};
1912
1913enum {
1914 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1915 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1916};
1917
1918struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001919 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001920 u8 cqn[0x18];
1921
Matan Barakb4ff3a32016-02-09 14:57:42 +02001922 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001923
Matan Barakb4ff3a32016-02-09 14:57:42 +02001924 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001925 u8 syndrome[0x8];
1926
Matan Barakb4ff3a32016-02-09 14:57:42 +02001927 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001928};
1929
1930struct mlx5_ifc_rdma_page_fault_event_bits {
1931 u8 bytes_committed[0x20];
1932
1933 u8 r_key[0x20];
1934
Matan Barakb4ff3a32016-02-09 14:57:42 +02001935 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001936 u8 packet_len[0x10];
1937
1938 u8 rdma_op_len[0x20];
1939
1940 u8 rdma_va[0x40];
1941
Matan Barakb4ff3a32016-02-09 14:57:42 +02001942 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001943 u8 rdma[0x1];
1944 u8 write[0x1];
1945 u8 requestor[0x1];
1946 u8 qp_number[0x18];
1947};
1948
1949struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1950 u8 bytes_committed[0x20];
1951
Matan Barakb4ff3a32016-02-09 14:57:42 +02001952 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001953 u8 wqe_index[0x10];
1954
Matan Barakb4ff3a32016-02-09 14:57:42 +02001955 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001956 u8 len[0x10];
1957
Matan Barakb4ff3a32016-02-09 14:57:42 +02001958 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001959
Matan Barakb4ff3a32016-02-09 14:57:42 +02001960 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001961 u8 rdma[0x1];
1962 u8 write_read[0x1];
1963 u8 requestor[0x1];
1964 u8 qpn[0x18];
1965};
1966
1967struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001968 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001969
1970 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001971 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001972
Matan Barakb4ff3a32016-02-09 14:57:42 +02001973 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001974 u8 qpn_rqn_sqn[0x18];
1975};
1976
1977struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001978 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001979
Matan Barakb4ff3a32016-02-09 14:57:42 +02001980 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001981 u8 dct_number[0x18];
1982};
1983
1984struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001985 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001986
Matan Barakb4ff3a32016-02-09 14:57:42 +02001987 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001988 u8 cq_number[0x18];
1989};
1990
1991enum {
1992 MLX5_QPC_STATE_RST = 0x0,
1993 MLX5_QPC_STATE_INIT = 0x1,
1994 MLX5_QPC_STATE_RTR = 0x2,
1995 MLX5_QPC_STATE_RTS = 0x3,
1996 MLX5_QPC_STATE_SQER = 0x4,
1997 MLX5_QPC_STATE_ERR = 0x6,
1998 MLX5_QPC_STATE_SQD = 0x7,
1999 MLX5_QPC_STATE_SUSPENDED = 0x9,
2000};
2001
2002enum {
2003 MLX5_QPC_ST_RC = 0x0,
2004 MLX5_QPC_ST_UC = 0x1,
2005 MLX5_QPC_ST_UD = 0x2,
2006 MLX5_QPC_ST_XRC = 0x3,
2007 MLX5_QPC_ST_DCI = 0x5,
2008 MLX5_QPC_ST_QP0 = 0x7,
2009 MLX5_QPC_ST_QP1 = 0x8,
2010 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2011 MLX5_QPC_ST_REG_UMR = 0xc,
2012};
2013
2014enum {
2015 MLX5_QPC_PM_STATE_ARMED = 0x0,
2016 MLX5_QPC_PM_STATE_REARM = 0x1,
2017 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2018 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2019};
2020
2021enum {
2022 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2023 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2024};
2025
2026enum {
2027 MLX5_QPC_MTU_256_BYTES = 0x1,
2028 MLX5_QPC_MTU_512_BYTES = 0x2,
2029 MLX5_QPC_MTU_1K_BYTES = 0x3,
2030 MLX5_QPC_MTU_2K_BYTES = 0x4,
2031 MLX5_QPC_MTU_4K_BYTES = 0x5,
2032 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2033};
2034
2035enum {
2036 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2037 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2038 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2039 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2040 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2041 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2042 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2043 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2044};
2045
2046enum {
2047 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2048 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2049 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2050};
2051
2052enum {
2053 MLX5_QPC_CS_RES_DISABLE = 0x0,
2054 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2055 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2056};
2057
2058struct mlx5_ifc_qpc_bits {
2059 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002060 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002061 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002062 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002063 u8 pm_state[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002064 u8 reserved_at_15[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03002065 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002066 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002067
2068 u8 wq_signature[0x1];
2069 u8 block_lb_mc[0x1];
2070 u8 atomic_like_write_en[0x1];
2071 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002072 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002073 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002074 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002075 u8 pd[0x18];
2076
2077 u8 mtu[0x3];
2078 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002079 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002080 u8 log_rq_size[0x4];
2081 u8 log_rq_stride[0x3];
2082 u8 no_sq[0x1];
2083 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002084 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002085 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002086 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002087
2088 u8 counter_set_id[0x8];
2089 u8 uar_page[0x18];
2090
Matan Barakb4ff3a32016-02-09 14:57:42 +02002091 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002092 u8 user_index[0x18];
2093
Matan Barakb4ff3a32016-02-09 14:57:42 +02002094 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002095 u8 log_page_size[0x5];
2096 u8 remote_qpn[0x18];
2097
2098 struct mlx5_ifc_ads_bits primary_address_path;
2099
2100 struct mlx5_ifc_ads_bits secondary_address_path;
2101
2102 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002103 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002104 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002105 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002106 u8 retry_count[0x3];
2107 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002108 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002109 u8 fre[0x1];
2110 u8 cur_rnr_retry[0x3];
2111 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002112 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002113
Matan Barakb4ff3a32016-02-09 14:57:42 +02002114 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002115
Matan Barakb4ff3a32016-02-09 14:57:42 +02002116 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002117 u8 next_send_psn[0x18];
2118
Matan Barakb4ff3a32016-02-09 14:57:42 +02002119 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002120 u8 cqn_snd[0x18];
2121
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002122 u8 reserved_at_400[0x8];
2123 u8 deth_sqpn[0x18];
2124
2125 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002126
Matan Barakb4ff3a32016-02-09 14:57:42 +02002127 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002128 u8 last_acked_psn[0x18];
2129
Matan Barakb4ff3a32016-02-09 14:57:42 +02002130 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002131 u8 ssn[0x18];
2132
Matan Barakb4ff3a32016-02-09 14:57:42 +02002133 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002134 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002135 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002136 u8 atomic_mode[0x4];
2137 u8 rre[0x1];
2138 u8 rwe[0x1];
2139 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002140 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002141 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002142 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002143 u8 cd_slave_receive[0x1];
2144 u8 cd_slave_send[0x1];
2145 u8 cd_master[0x1];
2146
Matan Barakb4ff3a32016-02-09 14:57:42 +02002147 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002148 u8 min_rnr_nak[0x5];
2149 u8 next_rcv_psn[0x18];
2150
Matan Barakb4ff3a32016-02-09 14:57:42 +02002151 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002152 u8 xrcd[0x18];
2153
Matan Barakb4ff3a32016-02-09 14:57:42 +02002154 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002155 u8 cqn_rcv[0x18];
2156
2157 u8 dbr_addr[0x40];
2158
2159 u8 q_key[0x20];
2160
Matan Barakb4ff3a32016-02-09 14:57:42 +02002161 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002162 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002163 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002164
Matan Barakb4ff3a32016-02-09 14:57:42 +02002165 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002166 u8 rmsn[0x18];
2167
2168 u8 hw_sq_wqebb_counter[0x10];
2169 u8 sw_sq_wqebb_counter[0x10];
2170
2171 u8 hw_rq_counter[0x20];
2172
2173 u8 sw_rq_counter[0x20];
2174
Matan Barakb4ff3a32016-02-09 14:57:42 +02002175 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002176
Matan Barakb4ff3a32016-02-09 14:57:42 +02002177 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002178 u8 cgs[0x1];
2179 u8 cs_req[0x8];
2180 u8 cs_res[0x8];
2181
2182 u8 dc_access_key[0x40];
2183
Matan Barakb4ff3a32016-02-09 14:57:42 +02002184 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002185};
2186
2187struct mlx5_ifc_roce_addr_layout_bits {
2188 u8 source_l3_address[16][0x8];
2189
Matan Barakb4ff3a32016-02-09 14:57:42 +02002190 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002191 u8 vlan_valid[0x1];
2192 u8 vlan_id[0xc];
2193 u8 source_mac_47_32[0x10];
2194
2195 u8 source_mac_31_0[0x20];
2196
Matan Barakb4ff3a32016-02-09 14:57:42 +02002197 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002198 u8 roce_l3_type[0x4];
2199 u8 roce_version[0x8];
2200
Matan Barakb4ff3a32016-02-09 14:57:42 +02002201 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002202};
2203
2204union mlx5_ifc_hca_cap_union_bits {
2205 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2206 struct mlx5_ifc_odp_cap_bits odp_cap;
2207 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2208 struct mlx5_ifc_roce_cap_bits roce_cap;
2209 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2210 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002211 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002212 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002213 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002214 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002215 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002216 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002217};
2218
2219enum {
2220 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2221 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2222 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002223 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002224 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2225 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002226 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002227};
2228
2229struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002230 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002231
2232 u8 group_id[0x20];
2233
Matan Barakb4ff3a32016-02-09 14:57:42 +02002234 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002235 u8 flow_tag[0x18];
2236
Matan Barakb4ff3a32016-02-09 14:57:42 +02002237 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002238 u8 action[0x10];
2239
Matan Barakb4ff3a32016-02-09 14:57:42 +02002240 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002241 u8 destination_list_size[0x18];
2242
Amir Vadai9dc0b282016-05-13 12:55:39 +00002243 u8 reserved_at_a0[0x8];
2244 u8 flow_counter_list_size[0x18];
2245
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002246 u8 encap_id[0x20];
2247
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002248 u8 modify_header_id[0x20];
2249
2250 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002251
2252 struct mlx5_ifc_fte_match_param_bits match_value;
2253
Matan Barakb4ff3a32016-02-09 14:57:42 +02002254 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002255
Amir Vadai9dc0b282016-05-13 12:55:39 +00002256 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002257};
2258
2259enum {
2260 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2261 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2262};
2263
2264struct mlx5_ifc_xrc_srqc_bits {
2265 u8 state[0x4];
2266 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002267 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002268
2269 u8 wq_signature[0x1];
2270 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002271 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002272 u8 rlky[0x1];
2273 u8 basic_cyclic_rcv_wqe[0x1];
2274 u8 log_rq_stride[0x3];
2275 u8 xrcd[0x18];
2276
2277 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002278 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002279 u8 cqn[0x18];
2280
Matan Barakb4ff3a32016-02-09 14:57:42 +02002281 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002282
2283 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002284 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002285 u8 log_page_size[0x6];
2286 u8 user_index[0x18];
2287
Matan Barakb4ff3a32016-02-09 14:57:42 +02002288 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002289
Matan Barakb4ff3a32016-02-09 14:57:42 +02002290 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002291 u8 pd[0x18];
2292
2293 u8 lwm[0x10];
2294 u8 wqe_cnt[0x10];
2295
Matan Barakb4ff3a32016-02-09 14:57:42 +02002296 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002297
2298 u8 db_record_addr_h[0x20];
2299
2300 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002301 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002302
Matan Barakb4ff3a32016-02-09 14:57:42 +02002303 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002304};
2305
2306struct mlx5_ifc_traffic_counter_bits {
2307 u8 packets[0x40];
2308
2309 u8 octets[0x40];
2310};
2311
2312struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002313 u8 strict_lag_tx_port_affinity[0x1];
2314 u8 reserved_at_1[0x3];
2315 u8 lag_tx_port_affinity[0x04];
2316
2317 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002318 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002319 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002320
Matan Barakb4ff3a32016-02-09 14:57:42 +02002321 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002322
Matan Barakb4ff3a32016-02-09 14:57:42 +02002323 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002324 u8 transport_domain[0x18];
2325
Erez Shitrit500a3d02017-04-13 06:36:51 +03002326 u8 reserved_at_140[0x8];
2327 u8 underlay_qpn[0x18];
2328 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002329};
2330
2331enum {
2332 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2333 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2334};
2335
2336enum {
2337 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2338 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2339};
2340
2341enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002342 MLX5_RX_HASH_FN_NONE = 0x0,
2343 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2344 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002345};
2346
2347enum {
2348 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2349 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2350};
2351
2352struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002353 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002354
2355 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002356 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002357
Matan Barakb4ff3a32016-02-09 14:57:42 +02002358 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002359
Matan Barakb4ff3a32016-02-09 14:57:42 +02002360 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002361 u8 lro_timeout_period_usecs[0x10];
2362 u8 lro_enable_mask[0x4];
2363 u8 lro_max_ip_payload_size[0x8];
2364
Matan Barakb4ff3a32016-02-09 14:57:42 +02002365 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002366
Matan Barakb4ff3a32016-02-09 14:57:42 +02002367 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002368 u8 inline_rqn[0x18];
2369
2370 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002371 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002372 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002373 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002374 u8 indirect_table[0x18];
2375
2376 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002377 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002378 u8 self_lb_block[0x2];
2379 u8 transport_domain[0x18];
2380
2381 u8 rx_hash_toeplitz_key[10][0x20];
2382
2383 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2384
2385 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2386
Matan Barakb4ff3a32016-02-09 14:57:42 +02002387 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002388};
2389
2390enum {
2391 MLX5_SRQC_STATE_GOOD = 0x0,
2392 MLX5_SRQC_STATE_ERROR = 0x1,
2393};
2394
2395struct mlx5_ifc_srqc_bits {
2396 u8 state[0x4];
2397 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002398 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002399
2400 u8 wq_signature[0x1];
2401 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002402 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002403 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002404 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002405 u8 log_rq_stride[0x3];
2406 u8 xrcd[0x18];
2407
2408 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002409 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002410 u8 cqn[0x18];
2411
Matan Barakb4ff3a32016-02-09 14:57:42 +02002412 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002413
Matan Barakb4ff3a32016-02-09 14:57:42 +02002414 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002415 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002416 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002417
Matan Barakb4ff3a32016-02-09 14:57:42 +02002418 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002419
Matan Barakb4ff3a32016-02-09 14:57:42 +02002420 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002421 u8 pd[0x18];
2422
2423 u8 lwm[0x10];
2424 u8 wqe_cnt[0x10];
2425
Matan Barakb4ff3a32016-02-09 14:57:42 +02002426 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002427
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002428 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002429
Matan Barakb4ff3a32016-02-09 14:57:42 +02002430 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002431};
2432
2433enum {
2434 MLX5_SQC_STATE_RST = 0x0,
2435 MLX5_SQC_STATE_RDY = 0x1,
2436 MLX5_SQC_STATE_ERR = 0x3,
2437};
2438
2439struct mlx5_ifc_sqc_bits {
2440 u8 rlky[0x1];
2441 u8 cd_master[0x1];
2442 u8 fre[0x1];
2443 u8 flush_in_error_en[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002444 u8 reserved_at_4[0x1];
2445 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002446 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002447 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002448 u8 allow_swp[0x1];
2449 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002450
Matan Barakb4ff3a32016-02-09 14:57:42 +02002451 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002452 u8 user_index[0x18];
2453
Matan Barakb4ff3a32016-02-09 14:57:42 +02002454 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002455 u8 cqn[0x18];
2456
Saeed Mahameed74862162016-06-09 15:11:34 +03002457 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002458
Saeed Mahameed74862162016-06-09 15:11:34 +03002459 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002460 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002461 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002462
Matan Barakb4ff3a32016-02-09 14:57:42 +02002463 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002464
Matan Barakb4ff3a32016-02-09 14:57:42 +02002465 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002466 u8 tis_num_0[0x18];
2467
2468 struct mlx5_ifc_wq_bits wq;
2469};
2470
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002471enum {
2472 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2473 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2474 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2475 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2476};
2477
2478struct mlx5_ifc_scheduling_context_bits {
2479 u8 element_type[0x8];
2480 u8 reserved_at_8[0x18];
2481
2482 u8 element_attributes[0x20];
2483
2484 u8 parent_element_id[0x20];
2485
2486 u8 reserved_at_60[0x40];
2487
2488 u8 bw_share[0x20];
2489
2490 u8 max_average_bw[0x20];
2491
2492 u8 reserved_at_e0[0x120];
2493};
2494
Saeed Mahameede2816822015-05-28 22:28:40 +03002495struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002496 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002497
Matan Barakb4ff3a32016-02-09 14:57:42 +02002498 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002499 u8 rqt_max_size[0x10];
2500
Matan Barakb4ff3a32016-02-09 14:57:42 +02002501 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002502 u8 rqt_actual_size[0x10];
2503
Matan Barakb4ff3a32016-02-09 14:57:42 +02002504 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002505
2506 struct mlx5_ifc_rq_num_bits rq_num[0];
2507};
2508
2509enum {
2510 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2511 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2512};
2513
2514enum {
2515 MLX5_RQC_STATE_RST = 0x0,
2516 MLX5_RQC_STATE_RDY = 0x1,
2517 MLX5_RQC_STATE_ERR = 0x3,
2518};
2519
2520struct mlx5_ifc_rqc_bits {
2521 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002522 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002523 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002524 u8 vsd[0x1];
2525 u8 mem_rq_type[0x4];
2526 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002527 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002528 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002529 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002530
Matan Barakb4ff3a32016-02-09 14:57:42 +02002531 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002532 u8 user_index[0x18];
2533
Matan Barakb4ff3a32016-02-09 14:57:42 +02002534 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002535 u8 cqn[0x18];
2536
2537 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002538 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002539
Matan Barakb4ff3a32016-02-09 14:57:42 +02002540 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002541 u8 rmpn[0x18];
2542
Matan Barakb4ff3a32016-02-09 14:57:42 +02002543 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002544
2545 struct mlx5_ifc_wq_bits wq;
2546};
2547
2548enum {
2549 MLX5_RMPC_STATE_RDY = 0x1,
2550 MLX5_RMPC_STATE_ERR = 0x3,
2551};
2552
2553struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002554 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002555 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002556 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002557
2558 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002559 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002560
Matan Barakb4ff3a32016-02-09 14:57:42 +02002561 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002562
2563 struct mlx5_ifc_wq_bits wq;
2564};
2565
Saeed Mahameede2816822015-05-28 22:28:40 +03002566struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002567 u8 reserved_at_0[0x5];
2568 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002569 u8 reserved_at_8[0x15];
2570 u8 disable_mc_local_lb[0x1];
2571 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002572 u8 roce_en[0x1];
2573
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002574 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002575 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002576 u8 event_on_mtu[0x1];
2577 u8 event_on_promisc_change[0x1];
2578 u8 event_on_vlan_change[0x1];
2579 u8 event_on_mc_address_change[0x1];
2580 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002581
Matan Barakb4ff3a32016-02-09 14:57:42 +02002582 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002583
2584 u8 mtu[0x10];
2585
Achiad Shochat9efa7522015-12-23 18:47:20 +02002586 u8 system_image_guid[0x40];
2587 u8 port_guid[0x40];
2588 u8 node_guid[0x40];
2589
Matan Barakb4ff3a32016-02-09 14:57:42 +02002590 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002591 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002592 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002593
2594 u8 promisc_uc[0x1];
2595 u8 promisc_mc[0x1];
2596 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002597 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002598 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002599 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002600 u8 allowed_list_size[0xc];
2601
2602 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2603
Matan Barakb4ff3a32016-02-09 14:57:42 +02002604 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002605
2606 u8 current_uc_mac_address[0][0x40];
2607};
2608
2609enum {
2610 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2611 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2612 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002613 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002614};
2615
2616struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002617 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002618 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002619 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002620 u8 small_fence_on_rdma_read_response[0x1];
2621 u8 umr_en[0x1];
2622 u8 a[0x1];
2623 u8 rw[0x1];
2624 u8 rr[0x1];
2625 u8 lw[0x1];
2626 u8 lr[0x1];
2627 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002628 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002629
2630 u8 qpn[0x18];
2631 u8 mkey_7_0[0x8];
2632
Matan Barakb4ff3a32016-02-09 14:57:42 +02002633 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002634
2635 u8 length64[0x1];
2636 u8 bsf_en[0x1];
2637 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002638 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002639 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002640 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002641 u8 en_rinval[0x1];
2642 u8 pd[0x18];
2643
2644 u8 start_addr[0x40];
2645
2646 u8 len[0x40];
2647
2648 u8 bsf_octword_size[0x20];
2649
Matan Barakb4ff3a32016-02-09 14:57:42 +02002650 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002651
2652 u8 translations_octword_size[0x20];
2653
Matan Barakb4ff3a32016-02-09 14:57:42 +02002654 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002655 u8 log_page_size[0x5];
2656
Matan Barakb4ff3a32016-02-09 14:57:42 +02002657 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002658};
2659
2660struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002661 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002662 u8 pkey[0x10];
2663};
2664
2665struct mlx5_ifc_array128_auto_bits {
2666 u8 array128_auto[16][0x8];
2667};
2668
2669struct mlx5_ifc_hca_vport_context_bits {
2670 u8 field_select[0x20];
2671
Matan Barakb4ff3a32016-02-09 14:57:42 +02002672 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002673
2674 u8 sm_virt_aware[0x1];
2675 u8 has_smi[0x1];
2676 u8 has_raw[0x1];
2677 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002678 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002679 u8 port_physical_state[0x4];
2680 u8 vport_state_policy[0x4];
2681 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002682 u8 vport_state[0x4];
2683
Matan Barakb4ff3a32016-02-09 14:57:42 +02002684 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002685
2686 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002687
2688 u8 port_guid[0x40];
2689
2690 u8 node_guid[0x40];
2691
2692 u8 cap_mask1[0x20];
2693
2694 u8 cap_mask1_field_select[0x20];
2695
2696 u8 cap_mask2[0x20];
2697
2698 u8 cap_mask2_field_select[0x20];
2699
Matan Barakb4ff3a32016-02-09 14:57:42 +02002700 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002701
2702 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002703 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002704 u8 init_type_reply[0x4];
2705 u8 lmc[0x3];
2706 u8 subnet_timeout[0x5];
2707
2708 u8 sm_lid[0x10];
2709 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002710 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002711
2712 u8 qkey_violation_counter[0x10];
2713 u8 pkey_violation_counter[0x10];
2714
Matan Barakb4ff3a32016-02-09 14:57:42 +02002715 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002716};
2717
Saeed Mahameedd6666752015-12-01 18:03:22 +02002718struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002719 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002720 u8 vport_svlan_strip[0x1];
2721 u8 vport_cvlan_strip[0x1];
2722 u8 vport_svlan_insert[0x1];
2723 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002724 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002725
Matan Barakb4ff3a32016-02-09 14:57:42 +02002726 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002727
2728 u8 svlan_cfi[0x1];
2729 u8 svlan_pcp[0x3];
2730 u8 svlan_id[0xc];
2731 u8 cvlan_cfi[0x1];
2732 u8 cvlan_pcp[0x3];
2733 u8 cvlan_id[0xc];
2734
Matan Barakb4ff3a32016-02-09 14:57:42 +02002735 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002736};
2737
Saeed Mahameede2816822015-05-28 22:28:40 +03002738enum {
2739 MLX5_EQC_STATUS_OK = 0x0,
2740 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2741};
2742
2743enum {
2744 MLX5_EQC_ST_ARMED = 0x9,
2745 MLX5_EQC_ST_FIRED = 0xa,
2746};
2747
2748struct mlx5_ifc_eqc_bits {
2749 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002750 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002751 u8 ec[0x1];
2752 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002753 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002754 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002755 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002756
Matan Barakb4ff3a32016-02-09 14:57:42 +02002757 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002758
Matan Barakb4ff3a32016-02-09 14:57:42 +02002759 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002760 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002761 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002762
Matan Barakb4ff3a32016-02-09 14:57:42 +02002763 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002764 u8 log_eq_size[0x5];
2765 u8 uar_page[0x18];
2766
Matan Barakb4ff3a32016-02-09 14:57:42 +02002767 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002768
Matan Barakb4ff3a32016-02-09 14:57:42 +02002769 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002770 u8 intr[0x8];
2771
Matan Barakb4ff3a32016-02-09 14:57:42 +02002772 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002773 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002774 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002775
Matan Barakb4ff3a32016-02-09 14:57:42 +02002776 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002777
Matan Barakb4ff3a32016-02-09 14:57:42 +02002778 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002779 u8 consumer_counter[0x18];
2780
Matan Barakb4ff3a32016-02-09 14:57:42 +02002781 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002782 u8 producer_counter[0x18];
2783
Matan Barakb4ff3a32016-02-09 14:57:42 +02002784 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002785};
2786
2787enum {
2788 MLX5_DCTC_STATE_ACTIVE = 0x0,
2789 MLX5_DCTC_STATE_DRAINING = 0x1,
2790 MLX5_DCTC_STATE_DRAINED = 0x2,
2791};
2792
2793enum {
2794 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2795 MLX5_DCTC_CS_RES_NA = 0x1,
2796 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2797};
2798
2799enum {
2800 MLX5_DCTC_MTU_256_BYTES = 0x1,
2801 MLX5_DCTC_MTU_512_BYTES = 0x2,
2802 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2803 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2804 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2805};
2806
2807struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002808 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002809 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002810 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002811
Matan Barakb4ff3a32016-02-09 14:57:42 +02002812 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002813 u8 user_index[0x18];
2814
Matan Barakb4ff3a32016-02-09 14:57:42 +02002815 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002816 u8 cqn[0x18];
2817
2818 u8 counter_set_id[0x8];
2819 u8 atomic_mode[0x4];
2820 u8 rre[0x1];
2821 u8 rwe[0x1];
2822 u8 rae[0x1];
2823 u8 atomic_like_write_en[0x1];
2824 u8 latency_sensitive[0x1];
2825 u8 rlky[0x1];
2826 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002827 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002828
Matan Barakb4ff3a32016-02-09 14:57:42 +02002829 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002830 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002831 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002832 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002833 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002834
Matan Barakb4ff3a32016-02-09 14:57:42 +02002835 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002836 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002837
Matan Barakb4ff3a32016-02-09 14:57:42 +02002838 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002839 u8 pd[0x18];
2840
2841 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002842 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002843 u8 flow_label[0x14];
2844
2845 u8 dc_access_key[0x40];
2846
Matan Barakb4ff3a32016-02-09 14:57:42 +02002847 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002848 u8 mtu[0x3];
2849 u8 port[0x8];
2850 u8 pkey_index[0x10];
2851
Matan Barakb4ff3a32016-02-09 14:57:42 +02002852 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002853 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002854 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002855 u8 hop_limit[0x8];
2856
2857 u8 dc_access_key_violation_count[0x20];
2858
Matan Barakb4ff3a32016-02-09 14:57:42 +02002859 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002860 u8 dei_cfi[0x1];
2861 u8 eth_prio[0x3];
2862 u8 ecn[0x2];
2863 u8 dscp[0x6];
2864
Matan Barakb4ff3a32016-02-09 14:57:42 +02002865 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002866};
2867
2868enum {
2869 MLX5_CQC_STATUS_OK = 0x0,
2870 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2871 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2872};
2873
2874enum {
2875 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2876 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2877};
2878
2879enum {
2880 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2881 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2882 MLX5_CQC_ST_FIRED = 0xa,
2883};
2884
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002885enum {
2886 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2887 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002888 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002889};
2890
Saeed Mahameede2816822015-05-28 22:28:40 +03002891struct mlx5_ifc_cqc_bits {
2892 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002893 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002894 u8 cqe_sz[0x3];
2895 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002896 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002897 u8 scqe_break_moderation_en[0x1];
2898 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002899 u8 cq_period_mode[0x2];
2900 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002901 u8 mini_cqe_res_format[0x2];
2902 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002903 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002904
Matan Barakb4ff3a32016-02-09 14:57:42 +02002905 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002906
Matan Barakb4ff3a32016-02-09 14:57:42 +02002907 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002908 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002909 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002910
Matan Barakb4ff3a32016-02-09 14:57:42 +02002911 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002912 u8 log_cq_size[0x5];
2913 u8 uar_page[0x18];
2914
Matan Barakb4ff3a32016-02-09 14:57:42 +02002915 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002916 u8 cq_period[0xc];
2917 u8 cq_max_count[0x10];
2918
Matan Barakb4ff3a32016-02-09 14:57:42 +02002919 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002920 u8 c_eqn[0x8];
2921
Matan Barakb4ff3a32016-02-09 14:57:42 +02002922 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002923 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002924 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002925
Matan Barakb4ff3a32016-02-09 14:57:42 +02002926 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002927
Matan Barakb4ff3a32016-02-09 14:57:42 +02002928 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002929 u8 last_notified_index[0x18];
2930
Matan Barakb4ff3a32016-02-09 14:57:42 +02002931 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002932 u8 last_solicit_index[0x18];
2933
Matan Barakb4ff3a32016-02-09 14:57:42 +02002934 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002935 u8 consumer_counter[0x18];
2936
Matan Barakb4ff3a32016-02-09 14:57:42 +02002937 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002938 u8 producer_counter[0x18];
2939
Matan Barakb4ff3a32016-02-09 14:57:42 +02002940 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002941
2942 u8 dbr_addr[0x40];
2943};
2944
2945union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2946 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2947 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2948 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002949 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002950};
2951
2952struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002953 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002954
Matan Barakb4ff3a32016-02-09 14:57:42 +02002955 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002956 u8 ieee_vendor_id[0x18];
2957
Matan Barakb4ff3a32016-02-09 14:57:42 +02002958 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002959 u8 vsd_vendor_id[0x10];
2960
2961 u8 vsd[208][0x8];
2962
2963 u8 vsd_contd_psid[16][0x8];
2964};
2965
Saeed Mahameed74862162016-06-09 15:11:34 +03002966enum {
2967 MLX5_XRQC_STATE_GOOD = 0x0,
2968 MLX5_XRQC_STATE_ERROR = 0x1,
2969};
2970
2971enum {
2972 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
2973 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
2974};
2975
2976enum {
2977 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
2978};
2979
2980struct mlx5_ifc_tag_matching_topology_context_bits {
2981 u8 log_matching_list_sz[0x4];
2982 u8 reserved_at_4[0xc];
2983 u8 append_next_index[0x10];
2984
2985 u8 sw_phase_cnt[0x10];
2986 u8 hw_phase_cnt[0x10];
2987
2988 u8 reserved_at_40[0x40];
2989};
2990
2991struct mlx5_ifc_xrqc_bits {
2992 u8 state[0x4];
2993 u8 rlkey[0x1];
2994 u8 reserved_at_5[0xf];
2995 u8 topology[0x4];
2996 u8 reserved_at_18[0x4];
2997 u8 offload[0x4];
2998
2999 u8 reserved_at_20[0x8];
3000 u8 user_index[0x18];
3001
3002 u8 reserved_at_40[0x8];
3003 u8 cqn[0x18];
3004
3005 u8 reserved_at_60[0xa0];
3006
3007 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3008
Artemy Kovalyov5579e152016-08-31 05:17:54 +00003009 u8 reserved_at_180[0x880];
Saeed Mahameed74862162016-06-09 15:11:34 +03003010
3011 struct mlx5_ifc_wq_bits wq;
3012};
3013
Saeed Mahameede2816822015-05-28 22:28:40 +03003014union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3015 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3016 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003017 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003018};
3019
3020union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3021 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3022 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3023 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003024 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003025};
3026
3027union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3028 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3029 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3030 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3031 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3032 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3033 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3034 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003035 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003036 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003037 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003038 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003039};
3040
Gal Pressman8ed1a632016-11-17 13:46:01 +02003041union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3042 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3043 u8 reserved_at_0[0x7c0];
3044};
3045
Saeed Mahameede2816822015-05-28 22:28:40 +03003046union mlx5_ifc_event_auto_bits {
3047 struct mlx5_ifc_comp_event_bits comp_event;
3048 struct mlx5_ifc_dct_events_bits dct_events;
3049 struct mlx5_ifc_qp_events_bits qp_events;
3050 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3051 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3052 struct mlx5_ifc_cq_error_bits cq_error;
3053 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3054 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3055 struct mlx5_ifc_gpio_event_bits gpio_event;
3056 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3057 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3058 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003059 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003060};
3061
3062struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003063 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003064
3065 u8 assert_existptr[0x20];
3066
3067 u8 assert_callra[0x20];
3068
Matan Barakb4ff3a32016-02-09 14:57:42 +02003069 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003070
3071 u8 fw_version[0x20];
3072
3073 u8 hw_id[0x20];
3074
Matan Barakb4ff3a32016-02-09 14:57:42 +02003075 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003076
3077 u8 irisc_index[0x8];
3078 u8 synd[0x8];
3079 u8 ext_synd[0x10];
3080};
3081
3082struct mlx5_ifc_register_loopback_control_bits {
3083 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003084 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003085 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003086 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003087
Matan Barakb4ff3a32016-02-09 14:57:42 +02003088 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003089};
3090
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003091struct mlx5_ifc_vport_tc_element_bits {
3092 u8 traffic_class[0x4];
3093 u8 reserved_at_4[0xc];
3094 u8 vport_number[0x10];
3095};
3096
3097struct mlx5_ifc_vport_element_bits {
3098 u8 reserved_at_0[0x10];
3099 u8 vport_number[0x10];
3100};
3101
3102enum {
3103 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3104 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3105 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3106};
3107
3108struct mlx5_ifc_tsar_element_bits {
3109 u8 reserved_at_0[0x8];
3110 u8 tsar_type[0x8];
3111 u8 reserved_at_10[0x10];
3112};
3113
Majd Dibbiny8812c242017-02-09 14:20:12 +02003114enum {
3115 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3116 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3117};
3118
Saeed Mahameede2816822015-05-28 22:28:40 +03003119struct mlx5_ifc_teardown_hca_out_bits {
3120 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003121 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003122
3123 u8 syndrome[0x20];
3124
Majd Dibbiny8812c242017-02-09 14:20:12 +02003125 u8 reserved_at_40[0x3f];
3126
3127 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003128};
3129
3130enum {
3131 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003132 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003133};
3134
3135struct mlx5_ifc_teardown_hca_in_bits {
3136 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003137 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003138
Matan Barakb4ff3a32016-02-09 14:57:42 +02003139 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003140 u8 op_mod[0x10];
3141
Matan Barakb4ff3a32016-02-09 14:57:42 +02003142 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003143 u8 profile[0x10];
3144
Matan Barakb4ff3a32016-02-09 14:57:42 +02003145 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003146};
3147
3148struct mlx5_ifc_sqerr2rts_qp_out_bits {
3149 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003150 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003151
3152 u8 syndrome[0x20];
3153
Matan Barakb4ff3a32016-02-09 14:57:42 +02003154 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003155};
3156
3157struct mlx5_ifc_sqerr2rts_qp_in_bits {
3158 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003159 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003160
Matan Barakb4ff3a32016-02-09 14:57:42 +02003161 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003162 u8 op_mod[0x10];
3163
Matan Barakb4ff3a32016-02-09 14:57:42 +02003164 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003165 u8 qpn[0x18];
3166
Matan Barakb4ff3a32016-02-09 14:57:42 +02003167 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003168
3169 u8 opt_param_mask[0x20];
3170
Matan Barakb4ff3a32016-02-09 14:57:42 +02003171 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003172
3173 struct mlx5_ifc_qpc_bits qpc;
3174
Matan Barakb4ff3a32016-02-09 14:57:42 +02003175 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003176};
3177
3178struct mlx5_ifc_sqd2rts_qp_out_bits {
3179 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003180 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003181
3182 u8 syndrome[0x20];
3183
Matan Barakb4ff3a32016-02-09 14:57:42 +02003184 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003185};
3186
3187struct mlx5_ifc_sqd2rts_qp_in_bits {
3188 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003189 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003190
Matan Barakb4ff3a32016-02-09 14:57:42 +02003191 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003192 u8 op_mod[0x10];
3193
Matan Barakb4ff3a32016-02-09 14:57:42 +02003194 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003195 u8 qpn[0x18];
3196
Matan Barakb4ff3a32016-02-09 14:57:42 +02003197 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003198
3199 u8 opt_param_mask[0x20];
3200
Matan Barakb4ff3a32016-02-09 14:57:42 +02003201 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003202
3203 struct mlx5_ifc_qpc_bits qpc;
3204
Matan Barakb4ff3a32016-02-09 14:57:42 +02003205 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003206};
3207
3208struct mlx5_ifc_set_roce_address_out_bits {
3209 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003210 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003211
3212 u8 syndrome[0x20];
3213
Matan Barakb4ff3a32016-02-09 14:57:42 +02003214 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003215};
3216
3217struct mlx5_ifc_set_roce_address_in_bits {
3218 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003219 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003220
Matan Barakb4ff3a32016-02-09 14:57:42 +02003221 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003222 u8 op_mod[0x10];
3223
3224 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003225 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003226
Matan Barakb4ff3a32016-02-09 14:57:42 +02003227 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003228
3229 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3230};
3231
3232struct mlx5_ifc_set_mad_demux_out_bits {
3233 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003234 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003235
3236 u8 syndrome[0x20];
3237
Matan Barakb4ff3a32016-02-09 14:57:42 +02003238 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003239};
3240
3241enum {
3242 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3243 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3244};
3245
3246struct mlx5_ifc_set_mad_demux_in_bits {
3247 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003248 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003249
Matan Barakb4ff3a32016-02-09 14:57:42 +02003250 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003251 u8 op_mod[0x10];
3252
Matan Barakb4ff3a32016-02-09 14:57:42 +02003253 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003254
Matan Barakb4ff3a32016-02-09 14:57:42 +02003255 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003256 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003257 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003258};
3259
3260struct mlx5_ifc_set_l2_table_entry_out_bits {
3261 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003262 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003263
3264 u8 syndrome[0x20];
3265
Matan Barakb4ff3a32016-02-09 14:57:42 +02003266 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003267};
3268
3269struct mlx5_ifc_set_l2_table_entry_in_bits {
3270 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003271 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003272
Matan Barakb4ff3a32016-02-09 14:57:42 +02003273 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003274 u8 op_mod[0x10];
3275
Matan Barakb4ff3a32016-02-09 14:57:42 +02003276 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003277
Matan Barakb4ff3a32016-02-09 14:57:42 +02003278 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003279 u8 table_index[0x18];
3280
Matan Barakb4ff3a32016-02-09 14:57:42 +02003281 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003282
Matan Barakb4ff3a32016-02-09 14:57:42 +02003283 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003284 u8 vlan_valid[0x1];
3285 u8 vlan[0xc];
3286
3287 struct mlx5_ifc_mac_address_layout_bits mac_address;
3288
Matan Barakb4ff3a32016-02-09 14:57:42 +02003289 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003290};
3291
3292struct mlx5_ifc_set_issi_out_bits {
3293 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003294 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003295
3296 u8 syndrome[0x20];
3297
Matan Barakb4ff3a32016-02-09 14:57:42 +02003298 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003299};
3300
3301struct mlx5_ifc_set_issi_in_bits {
3302 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003303 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003304
Matan Barakb4ff3a32016-02-09 14:57:42 +02003305 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003306 u8 op_mod[0x10];
3307
Matan Barakb4ff3a32016-02-09 14:57:42 +02003308 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003309 u8 current_issi[0x10];
3310
Matan Barakb4ff3a32016-02-09 14:57:42 +02003311 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003312};
3313
3314struct mlx5_ifc_set_hca_cap_out_bits {
3315 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003316 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003317
3318 u8 syndrome[0x20];
3319
Matan Barakb4ff3a32016-02-09 14:57:42 +02003320 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003321};
3322
3323struct mlx5_ifc_set_hca_cap_in_bits {
3324 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003325 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003326
Matan Barakb4ff3a32016-02-09 14:57:42 +02003327 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003328 u8 op_mod[0x10];
3329
Matan Barakb4ff3a32016-02-09 14:57:42 +02003330 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003331
Saeed Mahameede2816822015-05-28 22:28:40 +03003332 union mlx5_ifc_hca_cap_union_bits capability;
3333};
3334
Maor Gottlieb26a81452015-12-10 17:12:39 +02003335enum {
3336 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3337 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3338 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3339 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3340};
3341
Saeed Mahameede2816822015-05-28 22:28:40 +03003342struct mlx5_ifc_set_fte_out_bits {
3343 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003344 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003345
3346 u8 syndrome[0x20];
3347
Matan Barakb4ff3a32016-02-09 14:57:42 +02003348 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003349};
3350
3351struct mlx5_ifc_set_fte_in_bits {
3352 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003353 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003354
Matan Barakb4ff3a32016-02-09 14:57:42 +02003355 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003356 u8 op_mod[0x10];
3357
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003358 u8 other_vport[0x1];
3359 u8 reserved_at_41[0xf];
3360 u8 vport_number[0x10];
3361
3362 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003363
3364 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003365 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003366
Matan Barakb4ff3a32016-02-09 14:57:42 +02003367 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003368 u8 table_id[0x18];
3369
Matan Barakb4ff3a32016-02-09 14:57:42 +02003370 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003371 u8 modify_enable_mask[0x8];
3372
Matan Barakb4ff3a32016-02-09 14:57:42 +02003373 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003374
3375 u8 flow_index[0x20];
3376
Matan Barakb4ff3a32016-02-09 14:57:42 +02003377 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003378
3379 struct mlx5_ifc_flow_context_bits flow_context;
3380};
3381
3382struct mlx5_ifc_rts2rts_qp_out_bits {
3383 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003384 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003385
3386 u8 syndrome[0x20];
3387
Matan Barakb4ff3a32016-02-09 14:57:42 +02003388 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003389};
3390
3391struct mlx5_ifc_rts2rts_qp_in_bits {
3392 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003393 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003394
Matan Barakb4ff3a32016-02-09 14:57:42 +02003395 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003396 u8 op_mod[0x10];
3397
Matan Barakb4ff3a32016-02-09 14:57:42 +02003398 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003399 u8 qpn[0x18];
3400
Matan Barakb4ff3a32016-02-09 14:57:42 +02003401 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003402
3403 u8 opt_param_mask[0x20];
3404
Matan Barakb4ff3a32016-02-09 14:57:42 +02003405 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003406
3407 struct mlx5_ifc_qpc_bits qpc;
3408
Matan Barakb4ff3a32016-02-09 14:57:42 +02003409 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003410};
3411
3412struct mlx5_ifc_rtr2rts_qp_out_bits {
3413 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003414 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003415
3416 u8 syndrome[0x20];
3417
Matan Barakb4ff3a32016-02-09 14:57:42 +02003418 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003419};
3420
3421struct mlx5_ifc_rtr2rts_qp_in_bits {
3422 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003423 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003424
Matan Barakb4ff3a32016-02-09 14:57:42 +02003425 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003426 u8 op_mod[0x10];
3427
Matan Barakb4ff3a32016-02-09 14:57:42 +02003428 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003429 u8 qpn[0x18];
3430
Matan Barakb4ff3a32016-02-09 14:57:42 +02003431 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003432
3433 u8 opt_param_mask[0x20];
3434
Matan Barakb4ff3a32016-02-09 14:57:42 +02003435 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003436
3437 struct mlx5_ifc_qpc_bits qpc;
3438
Matan Barakb4ff3a32016-02-09 14:57:42 +02003439 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003440};
3441
3442struct mlx5_ifc_rst2init_qp_out_bits {
3443 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003444 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003445
3446 u8 syndrome[0x20];
3447
Matan Barakb4ff3a32016-02-09 14:57:42 +02003448 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003449};
3450
3451struct mlx5_ifc_rst2init_qp_in_bits {
3452 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003453 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003454
Matan Barakb4ff3a32016-02-09 14:57:42 +02003455 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003456 u8 op_mod[0x10];
3457
Matan Barakb4ff3a32016-02-09 14:57:42 +02003458 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003459 u8 qpn[0x18];
3460
Matan Barakb4ff3a32016-02-09 14:57:42 +02003461 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003462
3463 u8 opt_param_mask[0x20];
3464
Matan Barakb4ff3a32016-02-09 14:57:42 +02003465 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003466
3467 struct mlx5_ifc_qpc_bits qpc;
3468
Matan Barakb4ff3a32016-02-09 14:57:42 +02003469 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003470};
3471
Saeed Mahameed74862162016-06-09 15:11:34 +03003472struct mlx5_ifc_query_xrq_out_bits {
3473 u8 status[0x8];
3474 u8 reserved_at_8[0x18];
3475
3476 u8 syndrome[0x20];
3477
3478 u8 reserved_at_40[0x40];
3479
3480 struct mlx5_ifc_xrqc_bits xrq_context;
3481};
3482
3483struct mlx5_ifc_query_xrq_in_bits {
3484 u8 opcode[0x10];
3485 u8 reserved_at_10[0x10];
3486
3487 u8 reserved_at_20[0x10];
3488 u8 op_mod[0x10];
3489
3490 u8 reserved_at_40[0x8];
3491 u8 xrqn[0x18];
3492
3493 u8 reserved_at_60[0x20];
3494};
3495
Saeed Mahameede2816822015-05-28 22:28:40 +03003496struct mlx5_ifc_query_xrc_srq_out_bits {
3497 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003498 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003499
3500 u8 syndrome[0x20];
3501
Matan Barakb4ff3a32016-02-09 14:57:42 +02003502 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003503
3504 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3505
Matan Barakb4ff3a32016-02-09 14:57:42 +02003506 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003507
3508 u8 pas[0][0x40];
3509};
3510
3511struct mlx5_ifc_query_xrc_srq_in_bits {
3512 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003513 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003514
Matan Barakb4ff3a32016-02-09 14:57:42 +02003515 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003516 u8 op_mod[0x10];
3517
Matan Barakb4ff3a32016-02-09 14:57:42 +02003518 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003519 u8 xrc_srqn[0x18];
3520
Matan Barakb4ff3a32016-02-09 14:57:42 +02003521 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003522};
3523
3524enum {
3525 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3526 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3527};
3528
3529struct mlx5_ifc_query_vport_state_out_bits {
3530 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003531 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003532
3533 u8 syndrome[0x20];
3534
Matan Barakb4ff3a32016-02-09 14:57:42 +02003535 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003536
Matan Barakb4ff3a32016-02-09 14:57:42 +02003537 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003538 u8 admin_state[0x4];
3539 u8 state[0x4];
3540};
3541
3542enum {
3543 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003544 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003545};
3546
3547struct mlx5_ifc_query_vport_state_in_bits {
3548 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003549 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003550
Matan Barakb4ff3a32016-02-09 14:57:42 +02003551 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003552 u8 op_mod[0x10];
3553
3554 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003555 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003556 u8 vport_number[0x10];
3557
Matan Barakb4ff3a32016-02-09 14:57:42 +02003558 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003559};
3560
3561struct mlx5_ifc_query_vport_counter_out_bits {
3562 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003563 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003564
3565 u8 syndrome[0x20];
3566
Matan Barakb4ff3a32016-02-09 14:57:42 +02003567 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003568
3569 struct mlx5_ifc_traffic_counter_bits received_errors;
3570
3571 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3572
3573 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3574
3575 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3576
3577 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3578
3579 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3580
3581 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3582
3583 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3584
3585 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3586
3587 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3588
3589 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3590
3591 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3592
Matan Barakb4ff3a32016-02-09 14:57:42 +02003593 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003594};
3595
3596enum {
3597 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3598};
3599
3600struct mlx5_ifc_query_vport_counter_in_bits {
3601 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003602 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003603
Matan Barakb4ff3a32016-02-09 14:57:42 +02003604 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003605 u8 op_mod[0x10];
3606
3607 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003608 u8 reserved_at_41[0xb];
3609 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003610 u8 vport_number[0x10];
3611
Matan Barakb4ff3a32016-02-09 14:57:42 +02003612 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003613
3614 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003615 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003616
Matan Barakb4ff3a32016-02-09 14:57:42 +02003617 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003618};
3619
3620struct mlx5_ifc_query_tis_out_bits {
3621 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003622 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003623
3624 u8 syndrome[0x20];
3625
Matan Barakb4ff3a32016-02-09 14:57:42 +02003626 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003627
3628 struct mlx5_ifc_tisc_bits tis_context;
3629};
3630
3631struct mlx5_ifc_query_tis_in_bits {
3632 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003633 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003634
Matan Barakb4ff3a32016-02-09 14:57:42 +02003635 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003636 u8 op_mod[0x10];
3637
Matan Barakb4ff3a32016-02-09 14:57:42 +02003638 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003639 u8 tisn[0x18];
3640
Matan Barakb4ff3a32016-02-09 14:57:42 +02003641 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003642};
3643
3644struct mlx5_ifc_query_tir_out_bits {
3645 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003646 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003647
3648 u8 syndrome[0x20];
3649
Matan Barakb4ff3a32016-02-09 14:57:42 +02003650 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003651
3652 struct mlx5_ifc_tirc_bits tir_context;
3653};
3654
3655struct mlx5_ifc_query_tir_in_bits {
3656 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003657 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003658
Matan Barakb4ff3a32016-02-09 14:57:42 +02003659 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003660 u8 op_mod[0x10];
3661
Matan Barakb4ff3a32016-02-09 14:57:42 +02003662 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003663 u8 tirn[0x18];
3664
Matan Barakb4ff3a32016-02-09 14:57:42 +02003665 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003666};
3667
3668struct mlx5_ifc_query_srq_out_bits {
3669 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003670 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003671
3672 u8 syndrome[0x20];
3673
Matan Barakb4ff3a32016-02-09 14:57:42 +02003674 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003675
3676 struct mlx5_ifc_srqc_bits srq_context_entry;
3677
Matan Barakb4ff3a32016-02-09 14:57:42 +02003678 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003679
3680 u8 pas[0][0x40];
3681};
3682
3683struct mlx5_ifc_query_srq_in_bits {
3684 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003685 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003686
Matan Barakb4ff3a32016-02-09 14:57:42 +02003687 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003688 u8 op_mod[0x10];
3689
Matan Barakb4ff3a32016-02-09 14:57:42 +02003690 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003691 u8 srqn[0x18];
3692
Matan Barakb4ff3a32016-02-09 14:57:42 +02003693 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003694};
3695
3696struct mlx5_ifc_query_sq_out_bits {
3697 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003698 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003699
3700 u8 syndrome[0x20];
3701
Matan Barakb4ff3a32016-02-09 14:57:42 +02003702 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003703
3704 struct mlx5_ifc_sqc_bits sq_context;
3705};
3706
3707struct mlx5_ifc_query_sq_in_bits {
3708 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003709 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003710
Matan Barakb4ff3a32016-02-09 14:57:42 +02003711 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003712 u8 op_mod[0x10];
3713
Matan Barakb4ff3a32016-02-09 14:57:42 +02003714 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003715 u8 sqn[0x18];
3716
Matan Barakb4ff3a32016-02-09 14:57:42 +02003717 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003718};
3719
3720struct mlx5_ifc_query_special_contexts_out_bits {
3721 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003722 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003723
3724 u8 syndrome[0x20];
3725
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003726 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003727
3728 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003729
3730 u8 null_mkey[0x20];
3731
3732 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003733};
3734
3735struct mlx5_ifc_query_special_contexts_in_bits {
3736 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003737 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003738
Matan Barakb4ff3a32016-02-09 14:57:42 +02003739 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003740 u8 op_mod[0x10];
3741
Matan Barakb4ff3a32016-02-09 14:57:42 +02003742 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003743};
3744
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003745struct mlx5_ifc_query_scheduling_element_out_bits {
3746 u8 opcode[0x10];
3747 u8 reserved_at_10[0x10];
3748
3749 u8 reserved_at_20[0x10];
3750 u8 op_mod[0x10];
3751
3752 u8 reserved_at_40[0xc0];
3753
3754 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3755
3756 u8 reserved_at_300[0x100];
3757};
3758
3759enum {
3760 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3761};
3762
3763struct mlx5_ifc_query_scheduling_element_in_bits {
3764 u8 opcode[0x10];
3765 u8 reserved_at_10[0x10];
3766
3767 u8 reserved_at_20[0x10];
3768 u8 op_mod[0x10];
3769
3770 u8 scheduling_hierarchy[0x8];
3771 u8 reserved_at_48[0x18];
3772
3773 u8 scheduling_element_id[0x20];
3774
3775 u8 reserved_at_80[0x180];
3776};
3777
Saeed Mahameede2816822015-05-28 22:28:40 +03003778struct mlx5_ifc_query_rqt_out_bits {
3779 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003780 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003781
3782 u8 syndrome[0x20];
3783
Matan Barakb4ff3a32016-02-09 14:57:42 +02003784 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003785
3786 struct mlx5_ifc_rqtc_bits rqt_context;
3787};
3788
3789struct mlx5_ifc_query_rqt_in_bits {
3790 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003791 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003792
Matan Barakb4ff3a32016-02-09 14:57:42 +02003793 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003794 u8 op_mod[0x10];
3795
Matan Barakb4ff3a32016-02-09 14:57:42 +02003796 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003797 u8 rqtn[0x18];
3798
Matan Barakb4ff3a32016-02-09 14:57:42 +02003799 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003800};
3801
3802struct mlx5_ifc_query_rq_out_bits {
3803 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003804 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003805
3806 u8 syndrome[0x20];
3807
Matan Barakb4ff3a32016-02-09 14:57:42 +02003808 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003809
3810 struct mlx5_ifc_rqc_bits rq_context;
3811};
3812
3813struct mlx5_ifc_query_rq_in_bits {
3814 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003815 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003816
Matan Barakb4ff3a32016-02-09 14:57:42 +02003817 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003818 u8 op_mod[0x10];
3819
Matan Barakb4ff3a32016-02-09 14:57:42 +02003820 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003821 u8 rqn[0x18];
3822
Matan Barakb4ff3a32016-02-09 14:57:42 +02003823 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003824};
3825
3826struct mlx5_ifc_query_roce_address_out_bits {
3827 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003828 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003829
3830 u8 syndrome[0x20];
3831
Matan Barakb4ff3a32016-02-09 14:57:42 +02003832 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003833
3834 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3835};
3836
3837struct mlx5_ifc_query_roce_address_in_bits {
3838 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003839 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003840
Matan Barakb4ff3a32016-02-09 14:57:42 +02003841 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003842 u8 op_mod[0x10];
3843
3844 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003845 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003846
Matan Barakb4ff3a32016-02-09 14:57:42 +02003847 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003848};
3849
3850struct mlx5_ifc_query_rmp_out_bits {
3851 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003852 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003853
3854 u8 syndrome[0x20];
3855
Matan Barakb4ff3a32016-02-09 14:57:42 +02003856 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003857
3858 struct mlx5_ifc_rmpc_bits rmp_context;
3859};
3860
3861struct mlx5_ifc_query_rmp_in_bits {
3862 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003863 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003864
Matan Barakb4ff3a32016-02-09 14:57:42 +02003865 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003866 u8 op_mod[0x10];
3867
Matan Barakb4ff3a32016-02-09 14:57:42 +02003868 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003869 u8 rmpn[0x18];
3870
Matan Barakb4ff3a32016-02-09 14:57:42 +02003871 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003872};
3873
3874struct mlx5_ifc_query_qp_out_bits {
3875 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003876 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003877
3878 u8 syndrome[0x20];
3879
Matan Barakb4ff3a32016-02-09 14:57:42 +02003880 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003881
3882 u8 opt_param_mask[0x20];
3883
Matan Barakb4ff3a32016-02-09 14:57:42 +02003884 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003885
3886 struct mlx5_ifc_qpc_bits qpc;
3887
Matan Barakb4ff3a32016-02-09 14:57:42 +02003888 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003889
3890 u8 pas[0][0x40];
3891};
3892
3893struct mlx5_ifc_query_qp_in_bits {
3894 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003895 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003896
Matan Barakb4ff3a32016-02-09 14:57:42 +02003897 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003898 u8 op_mod[0x10];
3899
Matan Barakb4ff3a32016-02-09 14:57:42 +02003900 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003901 u8 qpn[0x18];
3902
Matan Barakb4ff3a32016-02-09 14:57:42 +02003903 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003904};
3905
3906struct mlx5_ifc_query_q_counter_out_bits {
3907 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003908 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003909
3910 u8 syndrome[0x20];
3911
Matan Barakb4ff3a32016-02-09 14:57:42 +02003912 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003913
3914 u8 rx_write_requests[0x20];
3915
Matan Barakb4ff3a32016-02-09 14:57:42 +02003916 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003917
3918 u8 rx_read_requests[0x20];
3919
Matan Barakb4ff3a32016-02-09 14:57:42 +02003920 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003921
3922 u8 rx_atomic_requests[0x20];
3923
Matan Barakb4ff3a32016-02-09 14:57:42 +02003924 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003925
3926 u8 rx_dct_connect[0x20];
3927
Matan Barakb4ff3a32016-02-09 14:57:42 +02003928 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003929
3930 u8 out_of_buffer[0x20];
3931
Matan Barakb4ff3a32016-02-09 14:57:42 +02003932 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003933
3934 u8 out_of_sequence[0x20];
3935
Saeed Mahameed74862162016-06-09 15:11:34 +03003936 u8 reserved_at_1e0[0x20];
3937
3938 u8 duplicate_request[0x20];
3939
3940 u8 reserved_at_220[0x20];
3941
3942 u8 rnr_nak_retry_err[0x20];
3943
3944 u8 reserved_at_260[0x20];
3945
3946 u8 packet_seq_err[0x20];
3947
3948 u8 reserved_at_2a0[0x20];
3949
3950 u8 implied_nak_seq_err[0x20];
3951
3952 u8 reserved_at_2e0[0x20];
3953
3954 u8 local_ack_timeout_err[0x20];
3955
3956 u8 reserved_at_320[0x4e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003957};
3958
3959struct mlx5_ifc_query_q_counter_in_bits {
3960 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003961 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003962
Matan Barakb4ff3a32016-02-09 14:57:42 +02003963 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003964 u8 op_mod[0x10];
3965
Matan Barakb4ff3a32016-02-09 14:57:42 +02003966 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003967
3968 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003969 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003970
Matan Barakb4ff3a32016-02-09 14:57:42 +02003971 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003972 u8 counter_set_id[0x8];
3973};
3974
3975struct mlx5_ifc_query_pages_out_bits {
3976 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003977 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003978
3979 u8 syndrome[0x20];
3980
Matan Barakb4ff3a32016-02-09 14:57:42 +02003981 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003982 u8 function_id[0x10];
3983
3984 u8 num_pages[0x20];
3985};
3986
3987enum {
3988 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
3989 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
3990 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
3991};
3992
3993struct mlx5_ifc_query_pages_in_bits {
3994 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003995 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003996
Matan Barakb4ff3a32016-02-09 14:57:42 +02003997 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003998 u8 op_mod[0x10];
3999
Matan Barakb4ff3a32016-02-09 14:57:42 +02004000 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004001 u8 function_id[0x10];
4002
Matan Barakb4ff3a32016-02-09 14:57:42 +02004003 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004004};
4005
4006struct mlx5_ifc_query_nic_vport_context_out_bits {
4007 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004008 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004009
4010 u8 syndrome[0x20];
4011
Matan Barakb4ff3a32016-02-09 14:57:42 +02004012 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004013
4014 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4015};
4016
4017struct mlx5_ifc_query_nic_vport_context_in_bits {
4018 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004019 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004020
Matan Barakb4ff3a32016-02-09 14:57:42 +02004021 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004022 u8 op_mod[0x10];
4023
4024 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004025 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004026 u8 vport_number[0x10];
4027
Matan Barakb4ff3a32016-02-09 14:57:42 +02004028 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004029 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004030 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004031};
4032
4033struct mlx5_ifc_query_mkey_out_bits {
4034 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004035 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004036
4037 u8 syndrome[0x20];
4038
Matan Barakb4ff3a32016-02-09 14:57:42 +02004039 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004040
4041 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4042
Matan Barakb4ff3a32016-02-09 14:57:42 +02004043 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004044
4045 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4046
4047 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4048};
4049
4050struct mlx5_ifc_query_mkey_in_bits {
4051 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004052 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004053
Matan Barakb4ff3a32016-02-09 14:57:42 +02004054 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004055 u8 op_mod[0x10];
4056
Matan Barakb4ff3a32016-02-09 14:57:42 +02004057 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004058 u8 mkey_index[0x18];
4059
4060 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004061 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004062};
4063
4064struct mlx5_ifc_query_mad_demux_out_bits {
4065 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004066 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004067
4068 u8 syndrome[0x20];
4069
Matan Barakb4ff3a32016-02-09 14:57:42 +02004070 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004071
4072 u8 mad_dumux_parameters_block[0x20];
4073};
4074
4075struct mlx5_ifc_query_mad_demux_in_bits {
4076 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004077 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004078
Matan Barakb4ff3a32016-02-09 14:57:42 +02004079 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004080 u8 op_mod[0x10];
4081
Matan Barakb4ff3a32016-02-09 14:57:42 +02004082 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004083};
4084
4085struct mlx5_ifc_query_l2_table_entry_out_bits {
4086 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004087 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004088
4089 u8 syndrome[0x20];
4090
Matan Barakb4ff3a32016-02-09 14:57:42 +02004091 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004092
Matan Barakb4ff3a32016-02-09 14:57:42 +02004093 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004094 u8 vlan_valid[0x1];
4095 u8 vlan[0xc];
4096
4097 struct mlx5_ifc_mac_address_layout_bits mac_address;
4098
Matan Barakb4ff3a32016-02-09 14:57:42 +02004099 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004100};
4101
4102struct mlx5_ifc_query_l2_table_entry_in_bits {
4103 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004104 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004105
Matan Barakb4ff3a32016-02-09 14:57:42 +02004106 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004107 u8 op_mod[0x10];
4108
Matan Barakb4ff3a32016-02-09 14:57:42 +02004109 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004110
Matan Barakb4ff3a32016-02-09 14:57:42 +02004111 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004112 u8 table_index[0x18];
4113
Matan Barakb4ff3a32016-02-09 14:57:42 +02004114 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004115};
4116
4117struct mlx5_ifc_query_issi_out_bits {
4118 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004119 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004120
4121 u8 syndrome[0x20];
4122
Matan Barakb4ff3a32016-02-09 14:57:42 +02004123 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004124 u8 current_issi[0x10];
4125
Matan Barakb4ff3a32016-02-09 14:57:42 +02004126 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004127
Matan Barakb4ff3a32016-02-09 14:57:42 +02004128 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004129 u8 supported_issi_dw0[0x20];
4130};
4131
4132struct mlx5_ifc_query_issi_in_bits {
4133 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004134 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004135
Matan Barakb4ff3a32016-02-09 14:57:42 +02004136 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004137 u8 op_mod[0x10];
4138
Matan Barakb4ff3a32016-02-09 14:57:42 +02004139 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004140};
4141
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004142struct mlx5_ifc_set_driver_version_out_bits {
4143 u8 status[0x8];
4144 u8 reserved_0[0x18];
4145
4146 u8 syndrome[0x20];
4147 u8 reserved_1[0x40];
4148};
4149
4150struct mlx5_ifc_set_driver_version_in_bits {
4151 u8 opcode[0x10];
4152 u8 reserved_0[0x10];
4153
4154 u8 reserved_1[0x10];
4155 u8 op_mod[0x10];
4156
4157 u8 reserved_2[0x40];
4158 u8 driver_version[64][0x8];
4159};
4160
Saeed Mahameede2816822015-05-28 22:28:40 +03004161struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4162 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004163 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004164
4165 u8 syndrome[0x20];
4166
Matan Barakb4ff3a32016-02-09 14:57:42 +02004167 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004168
4169 struct mlx5_ifc_pkey_bits pkey[0];
4170};
4171
4172struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4173 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004174 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004175
Matan Barakb4ff3a32016-02-09 14:57:42 +02004176 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004177 u8 op_mod[0x10];
4178
4179 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004180 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004181 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004182 u8 vport_number[0x10];
4183
Matan Barakb4ff3a32016-02-09 14:57:42 +02004184 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004185 u8 pkey_index[0x10];
4186};
4187
Eli Coheneff901d2016-03-11 22:58:42 +02004188enum {
4189 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4190 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4191 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4192};
4193
Saeed Mahameede2816822015-05-28 22:28:40 +03004194struct mlx5_ifc_query_hca_vport_gid_out_bits {
4195 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004196 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004197
4198 u8 syndrome[0x20];
4199
Matan Barakb4ff3a32016-02-09 14:57:42 +02004200 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004201
4202 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004203 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004204
4205 struct mlx5_ifc_array128_auto_bits gid[0];
4206};
4207
4208struct mlx5_ifc_query_hca_vport_gid_in_bits {
4209 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004210 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004211
Matan Barakb4ff3a32016-02-09 14:57:42 +02004212 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004213 u8 op_mod[0x10];
4214
4215 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004216 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004217 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004218 u8 vport_number[0x10];
4219
Matan Barakb4ff3a32016-02-09 14:57:42 +02004220 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004221 u8 gid_index[0x10];
4222};
4223
4224struct mlx5_ifc_query_hca_vport_context_out_bits {
4225 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004226 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004227
4228 u8 syndrome[0x20];
4229
Matan Barakb4ff3a32016-02-09 14:57:42 +02004230 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004231
4232 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4233};
4234
4235struct mlx5_ifc_query_hca_vport_context_in_bits {
4236 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004237 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004238
Matan Barakb4ff3a32016-02-09 14:57:42 +02004239 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004240 u8 op_mod[0x10];
4241
4242 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004243 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004244 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004245 u8 vport_number[0x10];
4246
Matan Barakb4ff3a32016-02-09 14:57:42 +02004247 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004248};
4249
4250struct mlx5_ifc_query_hca_cap_out_bits {
4251 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004252 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004253
4254 u8 syndrome[0x20];
4255
Matan Barakb4ff3a32016-02-09 14:57:42 +02004256 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004257
4258 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004259};
4260
4261struct mlx5_ifc_query_hca_cap_in_bits {
4262 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004263 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004264
Matan Barakb4ff3a32016-02-09 14:57:42 +02004265 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004266 u8 op_mod[0x10];
4267
Matan Barakb4ff3a32016-02-09 14:57:42 +02004268 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004269};
4270
Saeed Mahameede2816822015-05-28 22:28:40 +03004271struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004272 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004273 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004274
4275 u8 syndrome[0x20];
4276
Matan Barakb4ff3a32016-02-09 14:57:42 +02004277 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004278
Matan Barakb4ff3a32016-02-09 14:57:42 +02004279 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004280 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004281 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004282 u8 log_size[0x8];
4283
Matan Barakb4ff3a32016-02-09 14:57:42 +02004284 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004285};
4286
Saeed Mahameede2816822015-05-28 22:28:40 +03004287struct mlx5_ifc_query_flow_table_in_bits {
4288 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004289 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004290
Matan Barakb4ff3a32016-02-09 14:57:42 +02004291 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004292 u8 op_mod[0x10];
4293
Matan Barakb4ff3a32016-02-09 14:57:42 +02004294 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004295
4296 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004297 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004298
Matan Barakb4ff3a32016-02-09 14:57:42 +02004299 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004300 u8 table_id[0x18];
4301
Matan Barakb4ff3a32016-02-09 14:57:42 +02004302 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004303};
4304
4305struct mlx5_ifc_query_fte_out_bits {
4306 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004307 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004308
4309 u8 syndrome[0x20];
4310
Matan Barakb4ff3a32016-02-09 14:57:42 +02004311 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004312
4313 struct mlx5_ifc_flow_context_bits flow_context;
4314};
4315
4316struct mlx5_ifc_query_fte_in_bits {
4317 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004318 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004319
Matan Barakb4ff3a32016-02-09 14:57:42 +02004320 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004321 u8 op_mod[0x10];
4322
Matan Barakb4ff3a32016-02-09 14:57:42 +02004323 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004324
4325 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004326 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004327
Matan Barakb4ff3a32016-02-09 14:57:42 +02004328 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004329 u8 table_id[0x18];
4330
Matan Barakb4ff3a32016-02-09 14:57:42 +02004331 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004332
4333 u8 flow_index[0x20];
4334
Matan Barakb4ff3a32016-02-09 14:57:42 +02004335 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004336};
4337
4338enum {
4339 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4340 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4341 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4342};
4343
4344struct mlx5_ifc_query_flow_group_out_bits {
4345 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004346 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004347
4348 u8 syndrome[0x20];
4349
Matan Barakb4ff3a32016-02-09 14:57:42 +02004350 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004351
4352 u8 start_flow_index[0x20];
4353
Matan Barakb4ff3a32016-02-09 14:57:42 +02004354 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004355
4356 u8 end_flow_index[0x20];
4357
Matan Barakb4ff3a32016-02-09 14:57:42 +02004358 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004359
Matan Barakb4ff3a32016-02-09 14:57:42 +02004360 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004361 u8 match_criteria_enable[0x8];
4362
4363 struct mlx5_ifc_fte_match_param_bits match_criteria;
4364
Matan Barakb4ff3a32016-02-09 14:57:42 +02004365 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004366};
4367
4368struct mlx5_ifc_query_flow_group_in_bits {
4369 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004370 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004371
Matan Barakb4ff3a32016-02-09 14:57:42 +02004372 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004373 u8 op_mod[0x10];
4374
Matan Barakb4ff3a32016-02-09 14:57:42 +02004375 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004376
4377 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004378 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004379
Matan Barakb4ff3a32016-02-09 14:57:42 +02004380 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004381 u8 table_id[0x18];
4382
4383 u8 group_id[0x20];
4384
Matan Barakb4ff3a32016-02-09 14:57:42 +02004385 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004386};
4387
Amir Vadai9dc0b282016-05-13 12:55:39 +00004388struct mlx5_ifc_query_flow_counter_out_bits {
4389 u8 status[0x8];
4390 u8 reserved_at_8[0x18];
4391
4392 u8 syndrome[0x20];
4393
4394 u8 reserved_at_40[0x40];
4395
4396 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4397};
4398
4399struct mlx5_ifc_query_flow_counter_in_bits {
4400 u8 opcode[0x10];
4401 u8 reserved_at_10[0x10];
4402
4403 u8 reserved_at_20[0x10];
4404 u8 op_mod[0x10];
4405
4406 u8 reserved_at_40[0x80];
4407
4408 u8 clear[0x1];
4409 u8 reserved_at_c1[0xf];
4410 u8 num_of_counters[0x10];
4411
4412 u8 reserved_at_e0[0x10];
4413 u8 flow_counter_id[0x10];
4414};
4415
Saeed Mahameedd6666752015-12-01 18:03:22 +02004416struct mlx5_ifc_query_esw_vport_context_out_bits {
4417 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004418 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004419
4420 u8 syndrome[0x20];
4421
Matan Barakb4ff3a32016-02-09 14:57:42 +02004422 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004423
4424 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4425};
4426
4427struct mlx5_ifc_query_esw_vport_context_in_bits {
4428 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004429 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004430
Matan Barakb4ff3a32016-02-09 14:57:42 +02004431 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004432 u8 op_mod[0x10];
4433
4434 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004435 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004436 u8 vport_number[0x10];
4437
Matan Barakb4ff3a32016-02-09 14:57:42 +02004438 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004439};
4440
4441struct mlx5_ifc_modify_esw_vport_context_out_bits {
4442 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004443 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004444
4445 u8 syndrome[0x20];
4446
Matan Barakb4ff3a32016-02-09 14:57:42 +02004447 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004448};
4449
4450struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004451 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004452 u8 vport_cvlan_insert[0x1];
4453 u8 vport_svlan_insert[0x1];
4454 u8 vport_cvlan_strip[0x1];
4455 u8 vport_svlan_strip[0x1];
4456};
4457
4458struct mlx5_ifc_modify_esw_vport_context_in_bits {
4459 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004460 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004461
Matan Barakb4ff3a32016-02-09 14:57:42 +02004462 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004463 u8 op_mod[0x10];
4464
4465 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004466 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004467 u8 vport_number[0x10];
4468
4469 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4470
4471 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4472};
4473
Saeed Mahameede2816822015-05-28 22:28:40 +03004474struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004475 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004476 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004477
4478 u8 syndrome[0x20];
4479
Matan Barakb4ff3a32016-02-09 14:57:42 +02004480 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004481
4482 struct mlx5_ifc_eqc_bits eq_context_entry;
4483
Matan Barakb4ff3a32016-02-09 14:57:42 +02004484 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004485
4486 u8 event_bitmask[0x40];
4487
Matan Barakb4ff3a32016-02-09 14:57:42 +02004488 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004489
4490 u8 pas[0][0x40];
4491};
4492
4493struct mlx5_ifc_query_eq_in_bits {
4494 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004495 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004496
Matan Barakb4ff3a32016-02-09 14:57:42 +02004497 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004498 u8 op_mod[0x10];
4499
Matan Barakb4ff3a32016-02-09 14:57:42 +02004500 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004501 u8 eq_number[0x8];
4502
Matan Barakb4ff3a32016-02-09 14:57:42 +02004503 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004504};
4505
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004506struct mlx5_ifc_encap_header_in_bits {
4507 u8 reserved_at_0[0x5];
4508 u8 header_type[0x3];
4509 u8 reserved_at_8[0xe];
4510 u8 encap_header_size[0xa];
4511
4512 u8 reserved_at_20[0x10];
4513 u8 encap_header[2][0x8];
4514
4515 u8 more_encap_header[0][0x8];
4516};
4517
4518struct mlx5_ifc_query_encap_header_out_bits {
4519 u8 status[0x8];
4520 u8 reserved_at_8[0x18];
4521
4522 u8 syndrome[0x20];
4523
4524 u8 reserved_at_40[0xa0];
4525
4526 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4527};
4528
4529struct mlx5_ifc_query_encap_header_in_bits {
4530 u8 opcode[0x10];
4531 u8 reserved_at_10[0x10];
4532
4533 u8 reserved_at_20[0x10];
4534 u8 op_mod[0x10];
4535
4536 u8 encap_id[0x20];
4537
4538 u8 reserved_at_60[0xa0];
4539};
4540
4541struct mlx5_ifc_alloc_encap_header_out_bits {
4542 u8 status[0x8];
4543 u8 reserved_at_8[0x18];
4544
4545 u8 syndrome[0x20];
4546
4547 u8 encap_id[0x20];
4548
4549 u8 reserved_at_60[0x20];
4550};
4551
4552struct mlx5_ifc_alloc_encap_header_in_bits {
4553 u8 opcode[0x10];
4554 u8 reserved_at_10[0x10];
4555
4556 u8 reserved_at_20[0x10];
4557 u8 op_mod[0x10];
4558
4559 u8 reserved_at_40[0xa0];
4560
4561 struct mlx5_ifc_encap_header_in_bits encap_header;
4562};
4563
4564struct mlx5_ifc_dealloc_encap_header_out_bits {
4565 u8 status[0x8];
4566 u8 reserved_at_8[0x18];
4567
4568 u8 syndrome[0x20];
4569
4570 u8 reserved_at_40[0x40];
4571};
4572
4573struct mlx5_ifc_dealloc_encap_header_in_bits {
4574 u8 opcode[0x10];
4575 u8 reserved_at_10[0x10];
4576
4577 u8 reserved_20[0x10];
4578 u8 op_mod[0x10];
4579
4580 u8 encap_id[0x20];
4581
4582 u8 reserved_60[0x20];
4583};
4584
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004585struct mlx5_ifc_set_action_in_bits {
4586 u8 action_type[0x4];
4587 u8 field[0xc];
4588 u8 reserved_at_10[0x3];
4589 u8 offset[0x5];
4590 u8 reserved_at_18[0x3];
4591 u8 length[0x5];
4592
4593 u8 data[0x20];
4594};
4595
4596struct mlx5_ifc_add_action_in_bits {
4597 u8 action_type[0x4];
4598 u8 field[0xc];
4599 u8 reserved_at_10[0x10];
4600
4601 u8 data[0x20];
4602};
4603
4604union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4605 struct mlx5_ifc_set_action_in_bits set_action_in;
4606 struct mlx5_ifc_add_action_in_bits add_action_in;
4607 u8 reserved_at_0[0x40];
4608};
4609
4610enum {
4611 MLX5_ACTION_TYPE_SET = 0x1,
4612 MLX5_ACTION_TYPE_ADD = 0x2,
4613};
4614
4615enum {
4616 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4617 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4618 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4619 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4620 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4621 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4622 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4623 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4624 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4625 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4626 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4627 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4628 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4629 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4630 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4631 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4632 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4633 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4634 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4635 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4636 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4637 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004638 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004639};
4640
4641struct mlx5_ifc_alloc_modify_header_context_out_bits {
4642 u8 status[0x8];
4643 u8 reserved_at_8[0x18];
4644
4645 u8 syndrome[0x20];
4646
4647 u8 modify_header_id[0x20];
4648
4649 u8 reserved_at_60[0x20];
4650};
4651
4652struct mlx5_ifc_alloc_modify_header_context_in_bits {
4653 u8 opcode[0x10];
4654 u8 reserved_at_10[0x10];
4655
4656 u8 reserved_at_20[0x10];
4657 u8 op_mod[0x10];
4658
4659 u8 reserved_at_40[0x20];
4660
4661 u8 table_type[0x8];
4662 u8 reserved_at_68[0x10];
4663 u8 num_of_actions[0x8];
4664
4665 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4666};
4667
4668struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4669 u8 status[0x8];
4670 u8 reserved_at_8[0x18];
4671
4672 u8 syndrome[0x20];
4673
4674 u8 reserved_at_40[0x40];
4675};
4676
4677struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4678 u8 opcode[0x10];
4679 u8 reserved_at_10[0x10];
4680
4681 u8 reserved_at_20[0x10];
4682 u8 op_mod[0x10];
4683
4684 u8 modify_header_id[0x20];
4685
4686 u8 reserved_at_60[0x20];
4687};
4688
Saeed Mahameede2816822015-05-28 22:28:40 +03004689struct mlx5_ifc_query_dct_out_bits {
4690 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004691 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004692
4693 u8 syndrome[0x20];
4694
Matan Barakb4ff3a32016-02-09 14:57:42 +02004695 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004696
4697 struct mlx5_ifc_dctc_bits dct_context_entry;
4698
Matan Barakb4ff3a32016-02-09 14:57:42 +02004699 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004700};
4701
4702struct mlx5_ifc_query_dct_in_bits {
4703 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004704 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004705
Matan Barakb4ff3a32016-02-09 14:57:42 +02004706 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004707 u8 op_mod[0x10];
4708
Matan Barakb4ff3a32016-02-09 14:57:42 +02004709 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004710 u8 dctn[0x18];
4711
Matan Barakb4ff3a32016-02-09 14:57:42 +02004712 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004713};
4714
4715struct mlx5_ifc_query_cq_out_bits {
4716 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004717 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004718
4719 u8 syndrome[0x20];
4720
Matan Barakb4ff3a32016-02-09 14:57:42 +02004721 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004722
4723 struct mlx5_ifc_cqc_bits cq_context;
4724
Matan Barakb4ff3a32016-02-09 14:57:42 +02004725 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004726
4727 u8 pas[0][0x40];
4728};
4729
4730struct mlx5_ifc_query_cq_in_bits {
4731 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004732 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004733
Matan Barakb4ff3a32016-02-09 14:57:42 +02004734 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004735 u8 op_mod[0x10];
4736
Matan Barakb4ff3a32016-02-09 14:57:42 +02004737 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004738 u8 cqn[0x18];
4739
Matan Barakb4ff3a32016-02-09 14:57:42 +02004740 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004741};
4742
4743struct mlx5_ifc_query_cong_status_out_bits {
4744 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004745 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004746
4747 u8 syndrome[0x20];
4748
Matan Barakb4ff3a32016-02-09 14:57:42 +02004749 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004750
4751 u8 enable[0x1];
4752 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004753 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004754};
4755
4756struct mlx5_ifc_query_cong_status_in_bits {
4757 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004758 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004759
Matan Barakb4ff3a32016-02-09 14:57:42 +02004760 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004761 u8 op_mod[0x10];
4762
Matan Barakb4ff3a32016-02-09 14:57:42 +02004763 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004764 u8 priority[0x4];
4765 u8 cong_protocol[0x4];
4766
Matan Barakb4ff3a32016-02-09 14:57:42 +02004767 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004768};
4769
4770struct mlx5_ifc_query_cong_statistics_out_bits {
4771 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004772 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004773
4774 u8 syndrome[0x20];
4775
Matan Barakb4ff3a32016-02-09 14:57:42 +02004776 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004777
Parav Pandite1f24a72017-04-16 07:29:29 +03004778 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004779
4780 u8 sum_flows[0x20];
4781
Parav Pandite1f24a72017-04-16 07:29:29 +03004782 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004783
Parav Pandite1f24a72017-04-16 07:29:29 +03004784 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004785
Parav Pandite1f24a72017-04-16 07:29:29 +03004786 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004787
Parav Pandite1f24a72017-04-16 07:29:29 +03004788 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004789
Matan Barakb4ff3a32016-02-09 14:57:42 +02004790 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004791
4792 u8 time_stamp_high[0x20];
4793
4794 u8 time_stamp_low[0x20];
4795
4796 u8 accumulators_period[0x20];
4797
Parav Pandite1f24a72017-04-16 07:29:29 +03004798 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004799
Parav Pandite1f24a72017-04-16 07:29:29 +03004800 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004801
Parav Pandite1f24a72017-04-16 07:29:29 +03004802 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004803
Parav Pandite1f24a72017-04-16 07:29:29 +03004804 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004805
Matan Barakb4ff3a32016-02-09 14:57:42 +02004806 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004807};
4808
4809struct mlx5_ifc_query_cong_statistics_in_bits {
4810 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004811 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004812
Matan Barakb4ff3a32016-02-09 14:57:42 +02004813 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004814 u8 op_mod[0x10];
4815
4816 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004817 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004818
Matan Barakb4ff3a32016-02-09 14:57:42 +02004819 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004820};
4821
4822struct mlx5_ifc_query_cong_params_out_bits {
4823 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004824 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004825
4826 u8 syndrome[0x20];
4827
Matan Barakb4ff3a32016-02-09 14:57:42 +02004828 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004829
4830 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4831};
4832
4833struct mlx5_ifc_query_cong_params_in_bits {
4834 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004835 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004836
Matan Barakb4ff3a32016-02-09 14:57:42 +02004837 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004838 u8 op_mod[0x10];
4839
Matan Barakb4ff3a32016-02-09 14:57:42 +02004840 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004841 u8 cong_protocol[0x4];
4842
Matan Barakb4ff3a32016-02-09 14:57:42 +02004843 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004844};
4845
4846struct mlx5_ifc_query_adapter_out_bits {
4847 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004848 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004849
4850 u8 syndrome[0x20];
4851
Matan Barakb4ff3a32016-02-09 14:57:42 +02004852 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004853
4854 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4855};
4856
4857struct mlx5_ifc_query_adapter_in_bits {
4858 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004859 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004860
Matan Barakb4ff3a32016-02-09 14:57:42 +02004861 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004862 u8 op_mod[0x10];
4863
Matan Barakb4ff3a32016-02-09 14:57:42 +02004864 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004865};
4866
4867struct mlx5_ifc_qp_2rst_out_bits {
4868 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004869 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004870
4871 u8 syndrome[0x20];
4872
Matan Barakb4ff3a32016-02-09 14:57:42 +02004873 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004874};
4875
4876struct mlx5_ifc_qp_2rst_in_bits {
4877 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004878 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004879
Matan Barakb4ff3a32016-02-09 14:57:42 +02004880 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004881 u8 op_mod[0x10];
4882
Matan Barakb4ff3a32016-02-09 14:57:42 +02004883 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004884 u8 qpn[0x18];
4885
Matan Barakb4ff3a32016-02-09 14:57:42 +02004886 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004887};
4888
4889struct mlx5_ifc_qp_2err_out_bits {
4890 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004891 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004892
4893 u8 syndrome[0x20];
4894
Matan Barakb4ff3a32016-02-09 14:57:42 +02004895 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004896};
4897
4898struct mlx5_ifc_qp_2err_in_bits {
4899 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004900 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004901
Matan Barakb4ff3a32016-02-09 14:57:42 +02004902 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004903 u8 op_mod[0x10];
4904
Matan Barakb4ff3a32016-02-09 14:57:42 +02004905 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004906 u8 qpn[0x18];
4907
Matan Barakb4ff3a32016-02-09 14:57:42 +02004908 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004909};
4910
4911struct mlx5_ifc_page_fault_resume_out_bits {
4912 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004913 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004914
4915 u8 syndrome[0x20];
4916
Matan Barakb4ff3a32016-02-09 14:57:42 +02004917 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004918};
4919
4920struct mlx5_ifc_page_fault_resume_in_bits {
4921 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004922 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004923
Matan Barakb4ff3a32016-02-09 14:57:42 +02004924 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004925 u8 op_mod[0x10];
4926
4927 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004928 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004929 u8 page_fault_type[0x3];
4930 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004931
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004932 u8 reserved_at_60[0x8];
4933 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004934};
4935
4936struct mlx5_ifc_nop_out_bits {
4937 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004938 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004939
4940 u8 syndrome[0x20];
4941
Matan Barakb4ff3a32016-02-09 14:57:42 +02004942 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004943};
4944
4945struct mlx5_ifc_nop_in_bits {
4946 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004947 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004948
Matan Barakb4ff3a32016-02-09 14:57:42 +02004949 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004950 u8 op_mod[0x10];
4951
Matan Barakb4ff3a32016-02-09 14:57:42 +02004952 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004953};
4954
4955struct mlx5_ifc_modify_vport_state_out_bits {
4956 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004957 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004958
4959 u8 syndrome[0x20];
4960
Matan Barakb4ff3a32016-02-09 14:57:42 +02004961 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004962};
4963
4964struct mlx5_ifc_modify_vport_state_in_bits {
4965 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004966 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004967
Matan Barakb4ff3a32016-02-09 14:57:42 +02004968 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004969 u8 op_mod[0x10];
4970
4971 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004972 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004973 u8 vport_number[0x10];
4974
Matan Barakb4ff3a32016-02-09 14:57:42 +02004975 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004976 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004977 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004978};
4979
4980struct mlx5_ifc_modify_tis_out_bits {
4981 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004982 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004983
4984 u8 syndrome[0x20];
4985
Matan Barakb4ff3a32016-02-09 14:57:42 +02004986 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004987};
4988
majd@mellanox.com75850d02016-01-14 19:13:06 +02004989struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004990 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004991
Aviv Heller84df61e2016-05-10 13:47:50 +03004992 u8 reserved_at_20[0x1d];
4993 u8 lag_tx_port_affinity[0x1];
4994 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004995 u8 prio[0x1];
4996};
4997
Saeed Mahameede2816822015-05-28 22:28:40 +03004998struct mlx5_ifc_modify_tis_in_bits {
4999 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005000 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005001
Matan Barakb4ff3a32016-02-09 14:57:42 +02005002 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005003 u8 op_mod[0x10];
5004
Matan Barakb4ff3a32016-02-09 14:57:42 +02005005 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005006 u8 tisn[0x18];
5007
Matan Barakb4ff3a32016-02-09 14:57:42 +02005008 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005009
majd@mellanox.com75850d02016-01-14 19:13:06 +02005010 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005011
Matan Barakb4ff3a32016-02-09 14:57:42 +02005012 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005013
5014 struct mlx5_ifc_tisc_bits ctx;
5015};
5016
Achiad Shochatd9eea402015-08-04 14:05:42 +03005017struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005018 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005019
Matan Barakb4ff3a32016-02-09 14:57:42 +02005020 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005021 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005022 u8 reserved_at_3c[0x1];
5023 u8 hash[0x1];
5024 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005025 u8 lro[0x1];
5026};
5027
Saeed Mahameede2816822015-05-28 22:28:40 +03005028struct mlx5_ifc_modify_tir_out_bits {
5029 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005030 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005031
5032 u8 syndrome[0x20];
5033
Matan Barakb4ff3a32016-02-09 14:57:42 +02005034 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005035};
5036
5037struct mlx5_ifc_modify_tir_in_bits {
5038 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005039 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005040
Matan Barakb4ff3a32016-02-09 14:57:42 +02005041 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005042 u8 op_mod[0x10];
5043
Matan Barakb4ff3a32016-02-09 14:57:42 +02005044 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005045 u8 tirn[0x18];
5046
Matan Barakb4ff3a32016-02-09 14:57:42 +02005047 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005048
Achiad Shochatd9eea402015-08-04 14:05:42 +03005049 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005050
Matan Barakb4ff3a32016-02-09 14:57:42 +02005051 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005052
5053 struct mlx5_ifc_tirc_bits ctx;
5054};
5055
5056struct mlx5_ifc_modify_sq_out_bits {
5057 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005058 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005059
5060 u8 syndrome[0x20];
5061
Matan Barakb4ff3a32016-02-09 14:57:42 +02005062 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005063};
5064
5065struct mlx5_ifc_modify_sq_in_bits {
5066 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005067 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005068
Matan Barakb4ff3a32016-02-09 14:57:42 +02005069 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005070 u8 op_mod[0x10];
5071
5072 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005073 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005074 u8 sqn[0x18];
5075
Matan Barakb4ff3a32016-02-09 14:57:42 +02005076 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005077
5078 u8 modify_bitmask[0x40];
5079
Matan Barakb4ff3a32016-02-09 14:57:42 +02005080 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005081
5082 struct mlx5_ifc_sqc_bits ctx;
5083};
5084
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005085struct mlx5_ifc_modify_scheduling_element_out_bits {
5086 u8 status[0x8];
5087 u8 reserved_at_8[0x18];
5088
5089 u8 syndrome[0x20];
5090
5091 u8 reserved_at_40[0x1c0];
5092};
5093
5094enum {
5095 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5096 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5097};
5098
5099struct mlx5_ifc_modify_scheduling_element_in_bits {
5100 u8 opcode[0x10];
5101 u8 reserved_at_10[0x10];
5102
5103 u8 reserved_at_20[0x10];
5104 u8 op_mod[0x10];
5105
5106 u8 scheduling_hierarchy[0x8];
5107 u8 reserved_at_48[0x18];
5108
5109 u8 scheduling_element_id[0x20];
5110
5111 u8 reserved_at_80[0x20];
5112
5113 u8 modify_bitmask[0x20];
5114
5115 u8 reserved_at_c0[0x40];
5116
5117 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5118
5119 u8 reserved_at_300[0x100];
5120};
5121
Saeed Mahameede2816822015-05-28 22:28:40 +03005122struct mlx5_ifc_modify_rqt_out_bits {
5123 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005124 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005125
5126 u8 syndrome[0x20];
5127
Matan Barakb4ff3a32016-02-09 14:57:42 +02005128 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005129};
5130
Achiad Shochat5c503682015-08-04 14:05:43 +03005131struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005132 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005133
Matan Barakb4ff3a32016-02-09 14:57:42 +02005134 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005135 u8 rqn_list[0x1];
5136};
5137
Saeed Mahameede2816822015-05-28 22:28:40 +03005138struct mlx5_ifc_modify_rqt_in_bits {
5139 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005140 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005141
Matan Barakb4ff3a32016-02-09 14:57:42 +02005142 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005143 u8 op_mod[0x10];
5144
Matan Barakb4ff3a32016-02-09 14:57:42 +02005145 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005146 u8 rqtn[0x18];
5147
Matan Barakb4ff3a32016-02-09 14:57:42 +02005148 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005149
Achiad Shochat5c503682015-08-04 14:05:43 +03005150 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005151
Matan Barakb4ff3a32016-02-09 14:57:42 +02005152 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005153
5154 struct mlx5_ifc_rqtc_bits ctx;
5155};
5156
5157struct mlx5_ifc_modify_rq_out_bits {
5158 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005159 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005160
5161 u8 syndrome[0x20];
5162
Matan Barakb4ff3a32016-02-09 14:57:42 +02005163 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005164};
5165
Alex Vesker83b502a2016-08-04 17:32:02 +03005166enum {
5167 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005168 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005169 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005170};
5171
Saeed Mahameede2816822015-05-28 22:28:40 +03005172struct mlx5_ifc_modify_rq_in_bits {
5173 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005174 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005175
Matan Barakb4ff3a32016-02-09 14:57:42 +02005176 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005177 u8 op_mod[0x10];
5178
5179 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005180 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005181 u8 rqn[0x18];
5182
Matan Barakb4ff3a32016-02-09 14:57:42 +02005183 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005184
5185 u8 modify_bitmask[0x40];
5186
Matan Barakb4ff3a32016-02-09 14:57:42 +02005187 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005188
5189 struct mlx5_ifc_rqc_bits ctx;
5190};
5191
5192struct mlx5_ifc_modify_rmp_out_bits {
5193 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005194 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005195
5196 u8 syndrome[0x20];
5197
Matan Barakb4ff3a32016-02-09 14:57:42 +02005198 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005199};
5200
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005201struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005202 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005203
Matan Barakb4ff3a32016-02-09 14:57:42 +02005204 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005205 u8 lwm[0x1];
5206};
5207
Saeed Mahameede2816822015-05-28 22:28:40 +03005208struct mlx5_ifc_modify_rmp_in_bits {
5209 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005210 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005211
Matan Barakb4ff3a32016-02-09 14:57:42 +02005212 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005213 u8 op_mod[0x10];
5214
5215 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005216 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005217 u8 rmpn[0x18];
5218
Matan Barakb4ff3a32016-02-09 14:57:42 +02005219 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005220
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005221 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005222
Matan Barakb4ff3a32016-02-09 14:57:42 +02005223 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005224
5225 struct mlx5_ifc_rmpc_bits ctx;
5226};
5227
5228struct mlx5_ifc_modify_nic_vport_context_out_bits {
5229 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005230 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005231
5232 u8 syndrome[0x20];
5233
Matan Barakb4ff3a32016-02-09 14:57:42 +02005234 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005235};
5236
5237struct mlx5_ifc_modify_nic_vport_field_select_bits {
Huy Nguyenbded7472017-05-30 09:42:53 +03005238 u8 reserved_at_0[0x14];
5239 u8 disable_uc_local_lb[0x1];
5240 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005241 u8 node_guid[0x1];
5242 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005243 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005244 u8 mtu[0x1];
5245 u8 change_event[0x1];
5246 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005247 u8 permanent_address[0x1];
5248 u8 addresses_list[0x1];
5249 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005250 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005251};
5252
5253struct mlx5_ifc_modify_nic_vport_context_in_bits {
5254 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005255 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005256
Matan Barakb4ff3a32016-02-09 14:57:42 +02005257 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005258 u8 op_mod[0x10];
5259
5260 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005261 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005262 u8 vport_number[0x10];
5263
5264 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5265
Matan Barakb4ff3a32016-02-09 14:57:42 +02005266 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005267
5268 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5269};
5270
5271struct mlx5_ifc_modify_hca_vport_context_out_bits {
5272 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005273 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005274
5275 u8 syndrome[0x20];
5276
Matan Barakb4ff3a32016-02-09 14:57:42 +02005277 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005278};
5279
5280struct mlx5_ifc_modify_hca_vport_context_in_bits {
5281 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005282 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005283
Matan Barakb4ff3a32016-02-09 14:57:42 +02005284 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005285 u8 op_mod[0x10];
5286
5287 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005288 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005289 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005290 u8 vport_number[0x10];
5291
Matan Barakb4ff3a32016-02-09 14:57:42 +02005292 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005293
5294 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5295};
5296
5297struct mlx5_ifc_modify_cq_out_bits {
5298 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005299 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005300
5301 u8 syndrome[0x20];
5302
Matan Barakb4ff3a32016-02-09 14:57:42 +02005303 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005304};
5305
5306enum {
5307 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5308 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5309};
5310
5311struct mlx5_ifc_modify_cq_in_bits {
5312 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005313 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005314
Matan Barakb4ff3a32016-02-09 14:57:42 +02005315 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005316 u8 op_mod[0x10];
5317
Matan Barakb4ff3a32016-02-09 14:57:42 +02005318 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005319 u8 cqn[0x18];
5320
5321 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5322
5323 struct mlx5_ifc_cqc_bits cq_context;
5324
Matan Barakb4ff3a32016-02-09 14:57:42 +02005325 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005326
5327 u8 pas[0][0x40];
5328};
5329
5330struct mlx5_ifc_modify_cong_status_out_bits {
5331 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005332 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005333
5334 u8 syndrome[0x20];
5335
Matan Barakb4ff3a32016-02-09 14:57:42 +02005336 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005337};
5338
5339struct mlx5_ifc_modify_cong_status_in_bits {
5340 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005341 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005342
Matan Barakb4ff3a32016-02-09 14:57:42 +02005343 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005344 u8 op_mod[0x10];
5345
Matan Barakb4ff3a32016-02-09 14:57:42 +02005346 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005347 u8 priority[0x4];
5348 u8 cong_protocol[0x4];
5349
5350 u8 enable[0x1];
5351 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005352 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005353};
5354
5355struct mlx5_ifc_modify_cong_params_out_bits {
5356 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005357 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005358
5359 u8 syndrome[0x20];
5360
Matan Barakb4ff3a32016-02-09 14:57:42 +02005361 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005362};
5363
5364struct mlx5_ifc_modify_cong_params_in_bits {
5365 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005366 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005367
Matan Barakb4ff3a32016-02-09 14:57:42 +02005368 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005369 u8 op_mod[0x10];
5370
Matan Barakb4ff3a32016-02-09 14:57:42 +02005371 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005372 u8 cong_protocol[0x4];
5373
5374 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5375
Matan Barakb4ff3a32016-02-09 14:57:42 +02005376 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005377
5378 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5379};
5380
5381struct mlx5_ifc_manage_pages_out_bits {
5382 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005383 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005384
5385 u8 syndrome[0x20];
5386
5387 u8 output_num_entries[0x20];
5388
Matan Barakb4ff3a32016-02-09 14:57:42 +02005389 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005390
5391 u8 pas[0][0x40];
5392};
5393
5394enum {
5395 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5396 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5397 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5398};
5399
5400struct mlx5_ifc_manage_pages_in_bits {
5401 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005402 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005403
Matan Barakb4ff3a32016-02-09 14:57:42 +02005404 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005405 u8 op_mod[0x10];
5406
Matan Barakb4ff3a32016-02-09 14:57:42 +02005407 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005408 u8 function_id[0x10];
5409
5410 u8 input_num_entries[0x20];
5411
5412 u8 pas[0][0x40];
5413};
5414
5415struct mlx5_ifc_mad_ifc_out_bits {
5416 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005417 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005418
5419 u8 syndrome[0x20];
5420
Matan Barakb4ff3a32016-02-09 14:57:42 +02005421 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005422
5423 u8 response_mad_packet[256][0x8];
5424};
5425
5426struct mlx5_ifc_mad_ifc_in_bits {
5427 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005428 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005429
Matan Barakb4ff3a32016-02-09 14:57:42 +02005430 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005431 u8 op_mod[0x10];
5432
5433 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005434 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005435 u8 port[0x8];
5436
Matan Barakb4ff3a32016-02-09 14:57:42 +02005437 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005438
5439 u8 mad[256][0x8];
5440};
5441
5442struct mlx5_ifc_init_hca_out_bits {
5443 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005444 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005445
5446 u8 syndrome[0x20];
5447
Matan Barakb4ff3a32016-02-09 14:57:42 +02005448 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005449};
5450
5451struct mlx5_ifc_init_hca_in_bits {
5452 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005453 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005454
Matan Barakb4ff3a32016-02-09 14:57:42 +02005455 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005456 u8 op_mod[0x10];
5457
Matan Barakb4ff3a32016-02-09 14:57:42 +02005458 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005459};
5460
5461struct mlx5_ifc_init2rtr_qp_out_bits {
5462 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005463 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005464
5465 u8 syndrome[0x20];
5466
Matan Barakb4ff3a32016-02-09 14:57:42 +02005467 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005468};
5469
5470struct mlx5_ifc_init2rtr_qp_in_bits {
5471 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005472 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005473
Matan Barakb4ff3a32016-02-09 14:57:42 +02005474 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005475 u8 op_mod[0x10];
5476
Matan Barakb4ff3a32016-02-09 14:57:42 +02005477 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005478 u8 qpn[0x18];
5479
Matan Barakb4ff3a32016-02-09 14:57:42 +02005480 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005481
5482 u8 opt_param_mask[0x20];
5483
Matan Barakb4ff3a32016-02-09 14:57:42 +02005484 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005485
5486 struct mlx5_ifc_qpc_bits qpc;
5487
Matan Barakb4ff3a32016-02-09 14:57:42 +02005488 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005489};
5490
5491struct mlx5_ifc_init2init_qp_out_bits {
5492 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005493 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005494
5495 u8 syndrome[0x20];
5496
Matan Barakb4ff3a32016-02-09 14:57:42 +02005497 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005498};
5499
5500struct mlx5_ifc_init2init_qp_in_bits {
5501 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005502 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005503
Matan Barakb4ff3a32016-02-09 14:57:42 +02005504 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005505 u8 op_mod[0x10];
5506
Matan Barakb4ff3a32016-02-09 14:57:42 +02005507 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005508 u8 qpn[0x18];
5509
Matan Barakb4ff3a32016-02-09 14:57:42 +02005510 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005511
5512 u8 opt_param_mask[0x20];
5513
Matan Barakb4ff3a32016-02-09 14:57:42 +02005514 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005515
5516 struct mlx5_ifc_qpc_bits qpc;
5517
Matan Barakb4ff3a32016-02-09 14:57:42 +02005518 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005519};
5520
5521struct mlx5_ifc_get_dropped_packet_log_out_bits {
5522 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005523 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005524
5525 u8 syndrome[0x20];
5526
Matan Barakb4ff3a32016-02-09 14:57:42 +02005527 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005528
5529 u8 packet_headers_log[128][0x8];
5530
5531 u8 packet_syndrome[64][0x8];
5532};
5533
5534struct mlx5_ifc_get_dropped_packet_log_in_bits {
5535 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005536 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005537
Matan Barakb4ff3a32016-02-09 14:57:42 +02005538 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005539 u8 op_mod[0x10];
5540
Matan Barakb4ff3a32016-02-09 14:57:42 +02005541 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005542};
5543
5544struct mlx5_ifc_gen_eqe_in_bits {
5545 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005546 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005547
Matan Barakb4ff3a32016-02-09 14:57:42 +02005548 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005549 u8 op_mod[0x10];
5550
Matan Barakb4ff3a32016-02-09 14:57:42 +02005551 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005552 u8 eq_number[0x8];
5553
Matan Barakb4ff3a32016-02-09 14:57:42 +02005554 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005555
5556 u8 eqe[64][0x8];
5557};
5558
5559struct mlx5_ifc_gen_eq_out_bits {
5560 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005561 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005562
5563 u8 syndrome[0x20];
5564
Matan Barakb4ff3a32016-02-09 14:57:42 +02005565 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005566};
5567
5568struct mlx5_ifc_enable_hca_out_bits {
5569 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005570 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005571
5572 u8 syndrome[0x20];
5573
Matan Barakb4ff3a32016-02-09 14:57:42 +02005574 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005575};
5576
5577struct mlx5_ifc_enable_hca_in_bits {
5578 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005579 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005580
Matan Barakb4ff3a32016-02-09 14:57:42 +02005581 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005582 u8 op_mod[0x10];
5583
Matan Barakb4ff3a32016-02-09 14:57:42 +02005584 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005585 u8 function_id[0x10];
5586
Matan Barakb4ff3a32016-02-09 14:57:42 +02005587 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005588};
5589
5590struct mlx5_ifc_drain_dct_out_bits {
5591 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005592 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005593
5594 u8 syndrome[0x20];
5595
Matan Barakb4ff3a32016-02-09 14:57:42 +02005596 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005597};
5598
5599struct mlx5_ifc_drain_dct_in_bits {
5600 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005601 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005602
Matan Barakb4ff3a32016-02-09 14:57:42 +02005603 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005604 u8 op_mod[0x10];
5605
Matan Barakb4ff3a32016-02-09 14:57:42 +02005606 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005607 u8 dctn[0x18];
5608
Matan Barakb4ff3a32016-02-09 14:57:42 +02005609 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005610};
5611
5612struct mlx5_ifc_disable_hca_out_bits {
5613 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005614 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005615
5616 u8 syndrome[0x20];
5617
Matan Barakb4ff3a32016-02-09 14:57:42 +02005618 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005619};
5620
5621struct mlx5_ifc_disable_hca_in_bits {
5622 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005623 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005624
Matan Barakb4ff3a32016-02-09 14:57:42 +02005625 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005626 u8 op_mod[0x10];
5627
Matan Barakb4ff3a32016-02-09 14:57:42 +02005628 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005629 u8 function_id[0x10];
5630
Matan Barakb4ff3a32016-02-09 14:57:42 +02005631 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005632};
5633
5634struct mlx5_ifc_detach_from_mcg_out_bits {
5635 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005636 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005637
5638 u8 syndrome[0x20];
5639
Matan Barakb4ff3a32016-02-09 14:57:42 +02005640 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005641};
5642
5643struct mlx5_ifc_detach_from_mcg_in_bits {
5644 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005645 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005646
Matan Barakb4ff3a32016-02-09 14:57:42 +02005647 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005648 u8 op_mod[0x10];
5649
Matan Barakb4ff3a32016-02-09 14:57:42 +02005650 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005651 u8 qpn[0x18];
5652
Matan Barakb4ff3a32016-02-09 14:57:42 +02005653 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005654
5655 u8 multicast_gid[16][0x8];
5656};
5657
Saeed Mahameed74862162016-06-09 15:11:34 +03005658struct mlx5_ifc_destroy_xrq_out_bits {
5659 u8 status[0x8];
5660 u8 reserved_at_8[0x18];
5661
5662 u8 syndrome[0x20];
5663
5664 u8 reserved_at_40[0x40];
5665};
5666
5667struct mlx5_ifc_destroy_xrq_in_bits {
5668 u8 opcode[0x10];
5669 u8 reserved_at_10[0x10];
5670
5671 u8 reserved_at_20[0x10];
5672 u8 op_mod[0x10];
5673
5674 u8 reserved_at_40[0x8];
5675 u8 xrqn[0x18];
5676
5677 u8 reserved_at_60[0x20];
5678};
5679
Saeed Mahameede2816822015-05-28 22:28:40 +03005680struct mlx5_ifc_destroy_xrc_srq_out_bits {
5681 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005682 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005683
5684 u8 syndrome[0x20];
5685
Matan Barakb4ff3a32016-02-09 14:57:42 +02005686 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005687};
5688
5689struct mlx5_ifc_destroy_xrc_srq_in_bits {
5690 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005691 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005692
Matan Barakb4ff3a32016-02-09 14:57:42 +02005693 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005694 u8 op_mod[0x10];
5695
Matan Barakb4ff3a32016-02-09 14:57:42 +02005696 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005697 u8 xrc_srqn[0x18];
5698
Matan Barakb4ff3a32016-02-09 14:57:42 +02005699 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005700};
5701
5702struct mlx5_ifc_destroy_tis_out_bits {
5703 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005704 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005705
5706 u8 syndrome[0x20];
5707
Matan Barakb4ff3a32016-02-09 14:57:42 +02005708 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005709};
5710
5711struct mlx5_ifc_destroy_tis_in_bits {
5712 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005713 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005714
Matan Barakb4ff3a32016-02-09 14:57:42 +02005715 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005716 u8 op_mod[0x10];
5717
Matan Barakb4ff3a32016-02-09 14:57:42 +02005718 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005719 u8 tisn[0x18];
5720
Matan Barakb4ff3a32016-02-09 14:57:42 +02005721 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005722};
5723
5724struct mlx5_ifc_destroy_tir_out_bits {
5725 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005726 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005727
5728 u8 syndrome[0x20];
5729
Matan Barakb4ff3a32016-02-09 14:57:42 +02005730 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005731};
5732
5733struct mlx5_ifc_destroy_tir_in_bits {
5734 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005735 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005736
Matan Barakb4ff3a32016-02-09 14:57:42 +02005737 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005738 u8 op_mod[0x10];
5739
Matan Barakb4ff3a32016-02-09 14:57:42 +02005740 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005741 u8 tirn[0x18];
5742
Matan Barakb4ff3a32016-02-09 14:57:42 +02005743 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005744};
5745
5746struct mlx5_ifc_destroy_srq_out_bits {
5747 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005748 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005749
5750 u8 syndrome[0x20];
5751
Matan Barakb4ff3a32016-02-09 14:57:42 +02005752 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005753};
5754
5755struct mlx5_ifc_destroy_srq_in_bits {
5756 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005757 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005758
Matan Barakb4ff3a32016-02-09 14:57:42 +02005759 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005760 u8 op_mod[0x10];
5761
Matan Barakb4ff3a32016-02-09 14:57:42 +02005762 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005763 u8 srqn[0x18];
5764
Matan Barakb4ff3a32016-02-09 14:57:42 +02005765 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005766};
5767
5768struct mlx5_ifc_destroy_sq_out_bits {
5769 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005770 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005771
5772 u8 syndrome[0x20];
5773
Matan Barakb4ff3a32016-02-09 14:57:42 +02005774 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005775};
5776
5777struct mlx5_ifc_destroy_sq_in_bits {
5778 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005779 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005780
Matan Barakb4ff3a32016-02-09 14:57:42 +02005781 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005782 u8 op_mod[0x10];
5783
Matan Barakb4ff3a32016-02-09 14:57:42 +02005784 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005785 u8 sqn[0x18];
5786
Matan Barakb4ff3a32016-02-09 14:57:42 +02005787 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005788};
5789
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005790struct mlx5_ifc_destroy_scheduling_element_out_bits {
5791 u8 status[0x8];
5792 u8 reserved_at_8[0x18];
5793
5794 u8 syndrome[0x20];
5795
5796 u8 reserved_at_40[0x1c0];
5797};
5798
5799struct mlx5_ifc_destroy_scheduling_element_in_bits {
5800 u8 opcode[0x10];
5801 u8 reserved_at_10[0x10];
5802
5803 u8 reserved_at_20[0x10];
5804 u8 op_mod[0x10];
5805
5806 u8 scheduling_hierarchy[0x8];
5807 u8 reserved_at_48[0x18];
5808
5809 u8 scheduling_element_id[0x20];
5810
5811 u8 reserved_at_80[0x180];
5812};
5813
Saeed Mahameede2816822015-05-28 22:28:40 +03005814struct mlx5_ifc_destroy_rqt_out_bits {
5815 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005816 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005817
5818 u8 syndrome[0x20];
5819
Matan Barakb4ff3a32016-02-09 14:57:42 +02005820 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005821};
5822
5823struct mlx5_ifc_destroy_rqt_in_bits {
5824 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005825 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005826
Matan Barakb4ff3a32016-02-09 14:57:42 +02005827 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005828 u8 op_mod[0x10];
5829
Matan Barakb4ff3a32016-02-09 14:57:42 +02005830 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005831 u8 rqtn[0x18];
5832
Matan Barakb4ff3a32016-02-09 14:57:42 +02005833 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005834};
5835
5836struct mlx5_ifc_destroy_rq_out_bits {
5837 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005838 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005839
5840 u8 syndrome[0x20];
5841
Matan Barakb4ff3a32016-02-09 14:57:42 +02005842 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005843};
5844
5845struct mlx5_ifc_destroy_rq_in_bits {
5846 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005847 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005848
Matan Barakb4ff3a32016-02-09 14:57:42 +02005849 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005850 u8 op_mod[0x10];
5851
Matan Barakb4ff3a32016-02-09 14:57:42 +02005852 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005853 u8 rqn[0x18];
5854
Matan Barakb4ff3a32016-02-09 14:57:42 +02005855 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005856};
5857
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03005858struct mlx5_ifc_set_delay_drop_params_in_bits {
5859 u8 opcode[0x10];
5860 u8 reserved_at_10[0x10];
5861
5862 u8 reserved_at_20[0x10];
5863 u8 op_mod[0x10];
5864
5865 u8 reserved_at_40[0x20];
5866
5867 u8 reserved_at_60[0x10];
5868 u8 delay_drop_timeout[0x10];
5869};
5870
5871struct mlx5_ifc_set_delay_drop_params_out_bits {
5872 u8 status[0x8];
5873 u8 reserved_at_8[0x18];
5874
5875 u8 syndrome[0x20];
5876
5877 u8 reserved_at_40[0x40];
5878};
5879
Saeed Mahameede2816822015-05-28 22:28:40 +03005880struct mlx5_ifc_destroy_rmp_out_bits {
5881 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005882 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005883
5884 u8 syndrome[0x20];
5885
Matan Barakb4ff3a32016-02-09 14:57:42 +02005886 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005887};
5888
5889struct mlx5_ifc_destroy_rmp_in_bits {
5890 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005891 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005892
Matan Barakb4ff3a32016-02-09 14:57:42 +02005893 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005894 u8 op_mod[0x10];
5895
Matan Barakb4ff3a32016-02-09 14:57:42 +02005896 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005897 u8 rmpn[0x18];
5898
Matan Barakb4ff3a32016-02-09 14:57:42 +02005899 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005900};
5901
5902struct mlx5_ifc_destroy_qp_out_bits {
5903 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005904 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005905
5906 u8 syndrome[0x20];
5907
Matan Barakb4ff3a32016-02-09 14:57:42 +02005908 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005909};
5910
5911struct mlx5_ifc_destroy_qp_in_bits {
5912 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005913 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005914
Matan Barakb4ff3a32016-02-09 14:57:42 +02005915 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005916 u8 op_mod[0x10];
5917
Matan Barakb4ff3a32016-02-09 14:57:42 +02005918 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005919 u8 qpn[0x18];
5920
Matan Barakb4ff3a32016-02-09 14:57:42 +02005921 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005922};
5923
5924struct mlx5_ifc_destroy_psv_out_bits {
5925 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005926 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005927
5928 u8 syndrome[0x20];
5929
Matan Barakb4ff3a32016-02-09 14:57:42 +02005930 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005931};
5932
5933struct mlx5_ifc_destroy_psv_in_bits {
5934 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005935 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005936
Matan Barakb4ff3a32016-02-09 14:57:42 +02005937 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005938 u8 op_mod[0x10];
5939
Matan Barakb4ff3a32016-02-09 14:57:42 +02005940 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005941 u8 psvn[0x18];
5942
Matan Barakb4ff3a32016-02-09 14:57:42 +02005943 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005944};
5945
5946struct mlx5_ifc_destroy_mkey_out_bits {
5947 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005948 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005949
5950 u8 syndrome[0x20];
5951
Matan Barakb4ff3a32016-02-09 14:57:42 +02005952 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005953};
5954
5955struct mlx5_ifc_destroy_mkey_in_bits {
5956 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005957 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005958
Matan Barakb4ff3a32016-02-09 14:57:42 +02005959 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005960 u8 op_mod[0x10];
5961
Matan Barakb4ff3a32016-02-09 14:57:42 +02005962 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005963 u8 mkey_index[0x18];
5964
Matan Barakb4ff3a32016-02-09 14:57:42 +02005965 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005966};
5967
5968struct mlx5_ifc_destroy_flow_table_out_bits {
5969 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005970 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005971
5972 u8 syndrome[0x20];
5973
Matan Barakb4ff3a32016-02-09 14:57:42 +02005974 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005975};
5976
5977struct mlx5_ifc_destroy_flow_table_in_bits {
5978 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005979 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005980
Matan Barakb4ff3a32016-02-09 14:57:42 +02005981 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005982 u8 op_mod[0x10];
5983
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005984 u8 other_vport[0x1];
5985 u8 reserved_at_41[0xf];
5986 u8 vport_number[0x10];
5987
5988 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005989
5990 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005991 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005992
Matan Barakb4ff3a32016-02-09 14:57:42 +02005993 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005994 u8 table_id[0x18];
5995
Matan Barakb4ff3a32016-02-09 14:57:42 +02005996 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03005997};
5998
5999struct mlx5_ifc_destroy_flow_group_out_bits {
6000 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006001 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006002
6003 u8 syndrome[0x20];
6004
Matan Barakb4ff3a32016-02-09 14:57:42 +02006005 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006006};
6007
6008struct mlx5_ifc_destroy_flow_group_in_bits {
6009 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006010 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006011
Matan Barakb4ff3a32016-02-09 14:57:42 +02006012 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006013 u8 op_mod[0x10];
6014
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006015 u8 other_vport[0x1];
6016 u8 reserved_at_41[0xf];
6017 u8 vport_number[0x10];
6018
6019 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006020
6021 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006022 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006023
Matan Barakb4ff3a32016-02-09 14:57:42 +02006024 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006025 u8 table_id[0x18];
6026
6027 u8 group_id[0x20];
6028
Matan Barakb4ff3a32016-02-09 14:57:42 +02006029 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006030};
6031
6032struct mlx5_ifc_destroy_eq_out_bits {
6033 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006034 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006035
6036 u8 syndrome[0x20];
6037
Matan Barakb4ff3a32016-02-09 14:57:42 +02006038 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006039};
6040
6041struct mlx5_ifc_destroy_eq_in_bits {
6042 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006043 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006044
Matan Barakb4ff3a32016-02-09 14:57:42 +02006045 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006046 u8 op_mod[0x10];
6047
Matan Barakb4ff3a32016-02-09 14:57:42 +02006048 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006049 u8 eq_number[0x8];
6050
Matan Barakb4ff3a32016-02-09 14:57:42 +02006051 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006052};
6053
6054struct mlx5_ifc_destroy_dct_out_bits {
6055 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006056 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006057
6058 u8 syndrome[0x20];
6059
Matan Barakb4ff3a32016-02-09 14:57:42 +02006060 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006061};
6062
6063struct mlx5_ifc_destroy_dct_in_bits {
6064 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006065 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006066
Matan Barakb4ff3a32016-02-09 14:57:42 +02006067 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006068 u8 op_mod[0x10];
6069
Matan Barakb4ff3a32016-02-09 14:57:42 +02006070 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006071 u8 dctn[0x18];
6072
Matan Barakb4ff3a32016-02-09 14:57:42 +02006073 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006074};
6075
6076struct mlx5_ifc_destroy_cq_out_bits {
6077 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006078 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006079
6080 u8 syndrome[0x20];
6081
Matan Barakb4ff3a32016-02-09 14:57:42 +02006082 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006083};
6084
6085struct mlx5_ifc_destroy_cq_in_bits {
6086 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006087 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006088
Matan Barakb4ff3a32016-02-09 14:57:42 +02006089 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006090 u8 op_mod[0x10];
6091
Matan Barakb4ff3a32016-02-09 14:57:42 +02006092 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006093 u8 cqn[0x18];
6094
Matan Barakb4ff3a32016-02-09 14:57:42 +02006095 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006096};
6097
6098struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6099 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006100 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006101
6102 u8 syndrome[0x20];
6103
Matan Barakb4ff3a32016-02-09 14:57:42 +02006104 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006105};
6106
6107struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6108 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006109 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006110
Matan Barakb4ff3a32016-02-09 14:57:42 +02006111 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006112 u8 op_mod[0x10];
6113
Matan Barakb4ff3a32016-02-09 14:57:42 +02006114 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006115
Matan Barakb4ff3a32016-02-09 14:57:42 +02006116 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006117 u8 vxlan_udp_port[0x10];
6118};
6119
6120struct mlx5_ifc_delete_l2_table_entry_out_bits {
6121 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006122 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006123
6124 u8 syndrome[0x20];
6125
Matan Barakb4ff3a32016-02-09 14:57:42 +02006126 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006127};
6128
6129struct mlx5_ifc_delete_l2_table_entry_in_bits {
6130 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006131 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006132
Matan Barakb4ff3a32016-02-09 14:57:42 +02006133 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006134 u8 op_mod[0x10];
6135
Matan Barakb4ff3a32016-02-09 14:57:42 +02006136 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006137
Matan Barakb4ff3a32016-02-09 14:57:42 +02006138 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006139 u8 table_index[0x18];
6140
Matan Barakb4ff3a32016-02-09 14:57:42 +02006141 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006142};
6143
6144struct mlx5_ifc_delete_fte_out_bits {
6145 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006146 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006147
6148 u8 syndrome[0x20];
6149
Matan Barakb4ff3a32016-02-09 14:57:42 +02006150 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006151};
6152
6153struct mlx5_ifc_delete_fte_in_bits {
6154 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006155 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006156
Matan Barakb4ff3a32016-02-09 14:57:42 +02006157 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006158 u8 op_mod[0x10];
6159
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006160 u8 other_vport[0x1];
6161 u8 reserved_at_41[0xf];
6162 u8 vport_number[0x10];
6163
6164 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006165
6166 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006167 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006168
Matan Barakb4ff3a32016-02-09 14:57:42 +02006169 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006170 u8 table_id[0x18];
6171
Matan Barakb4ff3a32016-02-09 14:57:42 +02006172 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006173
6174 u8 flow_index[0x20];
6175
Matan Barakb4ff3a32016-02-09 14:57:42 +02006176 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006177};
6178
6179struct mlx5_ifc_dealloc_xrcd_out_bits {
6180 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006181 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006182
6183 u8 syndrome[0x20];
6184
Matan Barakb4ff3a32016-02-09 14:57:42 +02006185 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006186};
6187
6188struct mlx5_ifc_dealloc_xrcd_in_bits {
6189 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006190 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006191
Matan Barakb4ff3a32016-02-09 14:57:42 +02006192 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006193 u8 op_mod[0x10];
6194
Matan Barakb4ff3a32016-02-09 14:57:42 +02006195 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006196 u8 xrcd[0x18];
6197
Matan Barakb4ff3a32016-02-09 14:57:42 +02006198 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006199};
6200
6201struct mlx5_ifc_dealloc_uar_out_bits {
6202 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006203 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006204
6205 u8 syndrome[0x20];
6206
Matan Barakb4ff3a32016-02-09 14:57:42 +02006207 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006208};
6209
6210struct mlx5_ifc_dealloc_uar_in_bits {
6211 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006212 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006213
Matan Barakb4ff3a32016-02-09 14:57:42 +02006214 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006215 u8 op_mod[0x10];
6216
Matan Barakb4ff3a32016-02-09 14:57:42 +02006217 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006218 u8 uar[0x18];
6219
Matan Barakb4ff3a32016-02-09 14:57:42 +02006220 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006221};
6222
6223struct mlx5_ifc_dealloc_transport_domain_out_bits {
6224 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006225 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006226
6227 u8 syndrome[0x20];
6228
Matan Barakb4ff3a32016-02-09 14:57:42 +02006229 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006230};
6231
6232struct mlx5_ifc_dealloc_transport_domain_in_bits {
6233 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006234 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006235
Matan Barakb4ff3a32016-02-09 14:57:42 +02006236 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006237 u8 op_mod[0x10];
6238
Matan Barakb4ff3a32016-02-09 14:57:42 +02006239 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006240 u8 transport_domain[0x18];
6241
Matan Barakb4ff3a32016-02-09 14:57:42 +02006242 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006243};
6244
6245struct mlx5_ifc_dealloc_q_counter_out_bits {
6246 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006247 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006248
6249 u8 syndrome[0x20];
6250
Matan Barakb4ff3a32016-02-09 14:57:42 +02006251 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006252};
6253
6254struct mlx5_ifc_dealloc_q_counter_in_bits {
6255 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006256 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006257
Matan Barakb4ff3a32016-02-09 14:57:42 +02006258 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006259 u8 op_mod[0x10];
6260
Matan Barakb4ff3a32016-02-09 14:57:42 +02006261 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006262 u8 counter_set_id[0x8];
6263
Matan Barakb4ff3a32016-02-09 14:57:42 +02006264 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006265};
6266
6267struct mlx5_ifc_dealloc_pd_out_bits {
6268 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006269 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006270
6271 u8 syndrome[0x20];
6272
Matan Barakb4ff3a32016-02-09 14:57:42 +02006273 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006274};
6275
6276struct mlx5_ifc_dealloc_pd_in_bits {
6277 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006278 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006279
Matan Barakb4ff3a32016-02-09 14:57:42 +02006280 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006281 u8 op_mod[0x10];
6282
Matan Barakb4ff3a32016-02-09 14:57:42 +02006283 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006284 u8 pd[0x18];
6285
Matan Barakb4ff3a32016-02-09 14:57:42 +02006286 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006287};
6288
Amir Vadai9dc0b282016-05-13 12:55:39 +00006289struct mlx5_ifc_dealloc_flow_counter_out_bits {
6290 u8 status[0x8];
6291 u8 reserved_at_8[0x18];
6292
6293 u8 syndrome[0x20];
6294
6295 u8 reserved_at_40[0x40];
6296};
6297
6298struct mlx5_ifc_dealloc_flow_counter_in_bits {
6299 u8 opcode[0x10];
6300 u8 reserved_at_10[0x10];
6301
6302 u8 reserved_at_20[0x10];
6303 u8 op_mod[0x10];
6304
6305 u8 reserved_at_40[0x10];
6306 u8 flow_counter_id[0x10];
6307
6308 u8 reserved_at_60[0x20];
6309};
6310
Saeed Mahameed74862162016-06-09 15:11:34 +03006311struct mlx5_ifc_create_xrq_out_bits {
6312 u8 status[0x8];
6313 u8 reserved_at_8[0x18];
6314
6315 u8 syndrome[0x20];
6316
6317 u8 reserved_at_40[0x8];
6318 u8 xrqn[0x18];
6319
6320 u8 reserved_at_60[0x20];
6321};
6322
6323struct mlx5_ifc_create_xrq_in_bits {
6324 u8 opcode[0x10];
6325 u8 reserved_at_10[0x10];
6326
6327 u8 reserved_at_20[0x10];
6328 u8 op_mod[0x10];
6329
6330 u8 reserved_at_40[0x40];
6331
6332 struct mlx5_ifc_xrqc_bits xrq_context;
6333};
6334
Saeed Mahameede2816822015-05-28 22:28:40 +03006335struct mlx5_ifc_create_xrc_srq_out_bits {
6336 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006337 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006338
6339 u8 syndrome[0x20];
6340
Matan Barakb4ff3a32016-02-09 14:57:42 +02006341 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006342 u8 xrc_srqn[0x18];
6343
Matan Barakb4ff3a32016-02-09 14:57:42 +02006344 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006345};
6346
6347struct mlx5_ifc_create_xrc_srq_in_bits {
6348 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006349 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006350
Matan Barakb4ff3a32016-02-09 14:57:42 +02006351 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006352 u8 op_mod[0x10];
6353
Matan Barakb4ff3a32016-02-09 14:57:42 +02006354 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006355
6356 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6357
Matan Barakb4ff3a32016-02-09 14:57:42 +02006358 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006359
6360 u8 pas[0][0x40];
6361};
6362
6363struct mlx5_ifc_create_tis_out_bits {
6364 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006365 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006366
6367 u8 syndrome[0x20];
6368
Matan Barakb4ff3a32016-02-09 14:57:42 +02006369 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006370 u8 tisn[0x18];
6371
Matan Barakb4ff3a32016-02-09 14:57:42 +02006372 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006373};
6374
6375struct mlx5_ifc_create_tis_in_bits {
6376 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006377 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006378
Matan Barakb4ff3a32016-02-09 14:57:42 +02006379 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006380 u8 op_mod[0x10];
6381
Matan Barakb4ff3a32016-02-09 14:57:42 +02006382 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006383
6384 struct mlx5_ifc_tisc_bits ctx;
6385};
6386
6387struct mlx5_ifc_create_tir_out_bits {
6388 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006389 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006390
6391 u8 syndrome[0x20];
6392
Matan Barakb4ff3a32016-02-09 14:57:42 +02006393 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006394 u8 tirn[0x18];
6395
Matan Barakb4ff3a32016-02-09 14:57:42 +02006396 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006397};
6398
6399struct mlx5_ifc_create_tir_in_bits {
6400 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006401 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006402
Matan Barakb4ff3a32016-02-09 14:57:42 +02006403 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006404 u8 op_mod[0x10];
6405
Matan Barakb4ff3a32016-02-09 14:57:42 +02006406 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006407
6408 struct mlx5_ifc_tirc_bits ctx;
6409};
6410
6411struct mlx5_ifc_create_srq_out_bits {
6412 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006413 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006414
6415 u8 syndrome[0x20];
6416
Matan Barakb4ff3a32016-02-09 14:57:42 +02006417 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006418 u8 srqn[0x18];
6419
Matan Barakb4ff3a32016-02-09 14:57:42 +02006420 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006421};
6422
6423struct mlx5_ifc_create_srq_in_bits {
6424 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006425 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006426
Matan Barakb4ff3a32016-02-09 14:57:42 +02006427 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006428 u8 op_mod[0x10];
6429
Matan Barakb4ff3a32016-02-09 14:57:42 +02006430 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006431
6432 struct mlx5_ifc_srqc_bits srq_context_entry;
6433
Matan Barakb4ff3a32016-02-09 14:57:42 +02006434 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006435
6436 u8 pas[0][0x40];
6437};
6438
6439struct mlx5_ifc_create_sq_out_bits {
6440 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006441 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006442
6443 u8 syndrome[0x20];
6444
Matan Barakb4ff3a32016-02-09 14:57:42 +02006445 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006446 u8 sqn[0x18];
6447
Matan Barakb4ff3a32016-02-09 14:57:42 +02006448 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006449};
6450
6451struct mlx5_ifc_create_sq_in_bits {
6452 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006453 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006454
Matan Barakb4ff3a32016-02-09 14:57:42 +02006455 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006456 u8 op_mod[0x10];
6457
Matan Barakb4ff3a32016-02-09 14:57:42 +02006458 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006459
6460 struct mlx5_ifc_sqc_bits ctx;
6461};
6462
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006463struct mlx5_ifc_create_scheduling_element_out_bits {
6464 u8 status[0x8];
6465 u8 reserved_at_8[0x18];
6466
6467 u8 syndrome[0x20];
6468
6469 u8 reserved_at_40[0x40];
6470
6471 u8 scheduling_element_id[0x20];
6472
6473 u8 reserved_at_a0[0x160];
6474};
6475
6476struct mlx5_ifc_create_scheduling_element_in_bits {
6477 u8 opcode[0x10];
6478 u8 reserved_at_10[0x10];
6479
6480 u8 reserved_at_20[0x10];
6481 u8 op_mod[0x10];
6482
6483 u8 scheduling_hierarchy[0x8];
6484 u8 reserved_at_48[0x18];
6485
6486 u8 reserved_at_60[0xa0];
6487
6488 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6489
6490 u8 reserved_at_300[0x100];
6491};
6492
Saeed Mahameede2816822015-05-28 22:28:40 +03006493struct mlx5_ifc_create_rqt_out_bits {
6494 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006495 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006496
6497 u8 syndrome[0x20];
6498
Matan Barakb4ff3a32016-02-09 14:57:42 +02006499 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006500 u8 rqtn[0x18];
6501
Matan Barakb4ff3a32016-02-09 14:57:42 +02006502 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006503};
6504
6505struct mlx5_ifc_create_rqt_in_bits {
6506 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006507 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006508
Matan Barakb4ff3a32016-02-09 14:57:42 +02006509 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006510 u8 op_mod[0x10];
6511
Matan Barakb4ff3a32016-02-09 14:57:42 +02006512 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006513
6514 struct mlx5_ifc_rqtc_bits rqt_context;
6515};
6516
6517struct mlx5_ifc_create_rq_out_bits {
6518 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006519 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006520
6521 u8 syndrome[0x20];
6522
Matan Barakb4ff3a32016-02-09 14:57:42 +02006523 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006524 u8 rqn[0x18];
6525
Matan Barakb4ff3a32016-02-09 14:57:42 +02006526 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006527};
6528
6529struct mlx5_ifc_create_rq_in_bits {
6530 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006531 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006532
Matan Barakb4ff3a32016-02-09 14:57:42 +02006533 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006534 u8 op_mod[0x10];
6535
Matan Barakb4ff3a32016-02-09 14:57:42 +02006536 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006537
6538 struct mlx5_ifc_rqc_bits ctx;
6539};
6540
6541struct mlx5_ifc_create_rmp_out_bits {
6542 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006543 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006544
6545 u8 syndrome[0x20];
6546
Matan Barakb4ff3a32016-02-09 14:57:42 +02006547 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006548 u8 rmpn[0x18];
6549
Matan Barakb4ff3a32016-02-09 14:57:42 +02006550 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006551};
6552
6553struct mlx5_ifc_create_rmp_in_bits {
6554 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006555 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006556
Matan Barakb4ff3a32016-02-09 14:57:42 +02006557 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006558 u8 op_mod[0x10];
6559
Matan Barakb4ff3a32016-02-09 14:57:42 +02006560 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006561
6562 struct mlx5_ifc_rmpc_bits ctx;
6563};
6564
6565struct mlx5_ifc_create_qp_out_bits {
6566 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006567 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006568
6569 u8 syndrome[0x20];
6570
Matan Barakb4ff3a32016-02-09 14:57:42 +02006571 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006572 u8 qpn[0x18];
6573
Matan Barakb4ff3a32016-02-09 14:57:42 +02006574 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006575};
6576
6577struct mlx5_ifc_create_qp_in_bits {
6578 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006579 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006580
Matan Barakb4ff3a32016-02-09 14:57:42 +02006581 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006582 u8 op_mod[0x10];
6583
Matan Barakb4ff3a32016-02-09 14:57:42 +02006584 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006585
6586 u8 opt_param_mask[0x20];
6587
Matan Barakb4ff3a32016-02-09 14:57:42 +02006588 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006589
6590 struct mlx5_ifc_qpc_bits qpc;
6591
Matan Barakb4ff3a32016-02-09 14:57:42 +02006592 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006593
6594 u8 pas[0][0x40];
6595};
6596
6597struct mlx5_ifc_create_psv_out_bits {
6598 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006599 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006600
6601 u8 syndrome[0x20];
6602
Matan Barakb4ff3a32016-02-09 14:57:42 +02006603 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006604
Matan Barakb4ff3a32016-02-09 14:57:42 +02006605 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006606 u8 psv0_index[0x18];
6607
Matan Barakb4ff3a32016-02-09 14:57:42 +02006608 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006609 u8 psv1_index[0x18];
6610
Matan Barakb4ff3a32016-02-09 14:57:42 +02006611 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006612 u8 psv2_index[0x18];
6613
Matan Barakb4ff3a32016-02-09 14:57:42 +02006614 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006615 u8 psv3_index[0x18];
6616};
6617
6618struct mlx5_ifc_create_psv_in_bits {
6619 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006620 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006621
Matan Barakb4ff3a32016-02-09 14:57:42 +02006622 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006623 u8 op_mod[0x10];
6624
6625 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006626 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006627 u8 pd[0x18];
6628
Matan Barakb4ff3a32016-02-09 14:57:42 +02006629 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006630};
6631
6632struct mlx5_ifc_create_mkey_out_bits {
6633 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006634 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006635
6636 u8 syndrome[0x20];
6637
Matan Barakb4ff3a32016-02-09 14:57:42 +02006638 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006639 u8 mkey_index[0x18];
6640
Matan Barakb4ff3a32016-02-09 14:57:42 +02006641 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006642};
6643
6644struct mlx5_ifc_create_mkey_in_bits {
6645 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006646 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006647
Matan Barakb4ff3a32016-02-09 14:57:42 +02006648 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006649 u8 op_mod[0x10];
6650
Matan Barakb4ff3a32016-02-09 14:57:42 +02006651 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006652
6653 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006654 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006655
6656 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6657
Matan Barakb4ff3a32016-02-09 14:57:42 +02006658 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006659
6660 u8 translations_octword_actual_size[0x20];
6661
Matan Barakb4ff3a32016-02-09 14:57:42 +02006662 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006663
6664 u8 klm_pas_mtt[0][0x20];
6665};
6666
6667struct mlx5_ifc_create_flow_table_out_bits {
6668 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006669 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006670
6671 u8 syndrome[0x20];
6672
Matan Barakb4ff3a32016-02-09 14:57:42 +02006673 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006674 u8 table_id[0x18];
6675
Matan Barakb4ff3a32016-02-09 14:57:42 +02006676 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006677};
6678
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006679struct mlx5_ifc_flow_table_context_bits {
6680 u8 encap_en[0x1];
6681 u8 decap_en[0x1];
6682 u8 reserved_at_2[0x2];
6683 u8 table_miss_action[0x4];
6684 u8 level[0x8];
6685 u8 reserved_at_10[0x8];
6686 u8 log_size[0x8];
6687
6688 u8 reserved_at_20[0x8];
6689 u8 table_miss_id[0x18];
6690
6691 u8 reserved_at_40[0x8];
6692 u8 lag_master_next_table_id[0x18];
6693
6694 u8 reserved_at_60[0xe0];
6695};
6696
Saeed Mahameede2816822015-05-28 22:28:40 +03006697struct mlx5_ifc_create_flow_table_in_bits {
6698 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006699 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006700
Matan Barakb4ff3a32016-02-09 14:57:42 +02006701 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006702 u8 op_mod[0x10];
6703
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006704 u8 other_vport[0x1];
6705 u8 reserved_at_41[0xf];
6706 u8 vport_number[0x10];
6707
6708 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006709
6710 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006711 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006712
Matan Barakb4ff3a32016-02-09 14:57:42 +02006713 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006714
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006715 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006716};
6717
6718struct mlx5_ifc_create_flow_group_out_bits {
6719 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006720 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006721
6722 u8 syndrome[0x20];
6723
Matan Barakb4ff3a32016-02-09 14:57:42 +02006724 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006725 u8 group_id[0x18];
6726
Matan Barakb4ff3a32016-02-09 14:57:42 +02006727 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006728};
6729
6730enum {
6731 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6732 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6733 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6734};
6735
6736struct mlx5_ifc_create_flow_group_in_bits {
6737 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006738 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006739
Matan Barakb4ff3a32016-02-09 14:57:42 +02006740 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006741 u8 op_mod[0x10];
6742
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006743 u8 other_vport[0x1];
6744 u8 reserved_at_41[0xf];
6745 u8 vport_number[0x10];
6746
6747 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006748
6749 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006750 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006751
Matan Barakb4ff3a32016-02-09 14:57:42 +02006752 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006753 u8 table_id[0x18];
6754
Matan Barakb4ff3a32016-02-09 14:57:42 +02006755 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006756
6757 u8 start_flow_index[0x20];
6758
Matan Barakb4ff3a32016-02-09 14:57:42 +02006759 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006760
6761 u8 end_flow_index[0x20];
6762
Matan Barakb4ff3a32016-02-09 14:57:42 +02006763 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006764
Matan Barakb4ff3a32016-02-09 14:57:42 +02006765 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006766 u8 match_criteria_enable[0x8];
6767
6768 struct mlx5_ifc_fte_match_param_bits match_criteria;
6769
Matan Barakb4ff3a32016-02-09 14:57:42 +02006770 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006771};
6772
6773struct mlx5_ifc_create_eq_out_bits {
6774 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006775 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006776
6777 u8 syndrome[0x20];
6778
Matan Barakb4ff3a32016-02-09 14:57:42 +02006779 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006780 u8 eq_number[0x8];
6781
Matan Barakb4ff3a32016-02-09 14:57:42 +02006782 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006783};
6784
6785struct mlx5_ifc_create_eq_in_bits {
6786 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006787 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006788
Matan Barakb4ff3a32016-02-09 14:57:42 +02006789 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006790 u8 op_mod[0x10];
6791
Matan Barakb4ff3a32016-02-09 14:57:42 +02006792 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006793
6794 struct mlx5_ifc_eqc_bits eq_context_entry;
6795
Matan Barakb4ff3a32016-02-09 14:57:42 +02006796 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006797
6798 u8 event_bitmask[0x40];
6799
Matan Barakb4ff3a32016-02-09 14:57:42 +02006800 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006801
6802 u8 pas[0][0x40];
6803};
6804
6805struct mlx5_ifc_create_dct_out_bits {
6806 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006807 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006808
6809 u8 syndrome[0x20];
6810
Matan Barakb4ff3a32016-02-09 14:57:42 +02006811 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006812 u8 dctn[0x18];
6813
Matan Barakb4ff3a32016-02-09 14:57:42 +02006814 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006815};
6816
6817struct mlx5_ifc_create_dct_in_bits {
6818 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006819 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006820
Matan Barakb4ff3a32016-02-09 14:57:42 +02006821 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006822 u8 op_mod[0x10];
6823
Matan Barakb4ff3a32016-02-09 14:57:42 +02006824 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006825
6826 struct mlx5_ifc_dctc_bits dct_context_entry;
6827
Matan Barakb4ff3a32016-02-09 14:57:42 +02006828 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006829};
6830
6831struct mlx5_ifc_create_cq_out_bits {
6832 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006833 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006834
6835 u8 syndrome[0x20];
6836
Matan Barakb4ff3a32016-02-09 14:57:42 +02006837 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006838 u8 cqn[0x18];
6839
Matan Barakb4ff3a32016-02-09 14:57:42 +02006840 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006841};
6842
6843struct mlx5_ifc_create_cq_in_bits {
6844 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006845 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006846
Matan Barakb4ff3a32016-02-09 14:57:42 +02006847 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006848 u8 op_mod[0x10];
6849
Matan Barakb4ff3a32016-02-09 14:57:42 +02006850 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006851
6852 struct mlx5_ifc_cqc_bits cq_context;
6853
Matan Barakb4ff3a32016-02-09 14:57:42 +02006854 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006855
6856 u8 pas[0][0x40];
6857};
6858
6859struct mlx5_ifc_config_int_moderation_out_bits {
6860 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006861 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006862
6863 u8 syndrome[0x20];
6864
Matan Barakb4ff3a32016-02-09 14:57:42 +02006865 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006866 u8 min_delay[0xc];
6867 u8 int_vector[0x10];
6868
Matan Barakb4ff3a32016-02-09 14:57:42 +02006869 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006870};
6871
6872enum {
6873 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6874 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6875};
6876
6877struct mlx5_ifc_config_int_moderation_in_bits {
6878 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006879 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006880
Matan Barakb4ff3a32016-02-09 14:57:42 +02006881 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006882 u8 op_mod[0x10];
6883
Matan Barakb4ff3a32016-02-09 14:57:42 +02006884 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006885 u8 min_delay[0xc];
6886 u8 int_vector[0x10];
6887
Matan Barakb4ff3a32016-02-09 14:57:42 +02006888 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006889};
6890
6891struct mlx5_ifc_attach_to_mcg_out_bits {
6892 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006893 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006894
6895 u8 syndrome[0x20];
6896
Matan Barakb4ff3a32016-02-09 14:57:42 +02006897 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006898};
6899
6900struct mlx5_ifc_attach_to_mcg_in_bits {
6901 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006902 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006903
Matan Barakb4ff3a32016-02-09 14:57:42 +02006904 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006905 u8 op_mod[0x10];
6906
Matan Barakb4ff3a32016-02-09 14:57:42 +02006907 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006908 u8 qpn[0x18];
6909
Matan Barakb4ff3a32016-02-09 14:57:42 +02006910 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006911
6912 u8 multicast_gid[16][0x8];
6913};
6914
Saeed Mahameed74862162016-06-09 15:11:34 +03006915struct mlx5_ifc_arm_xrq_out_bits {
6916 u8 status[0x8];
6917 u8 reserved_at_8[0x18];
6918
6919 u8 syndrome[0x20];
6920
6921 u8 reserved_at_40[0x40];
6922};
6923
6924struct mlx5_ifc_arm_xrq_in_bits {
6925 u8 opcode[0x10];
6926 u8 reserved_at_10[0x10];
6927
6928 u8 reserved_at_20[0x10];
6929 u8 op_mod[0x10];
6930
6931 u8 reserved_at_40[0x8];
6932 u8 xrqn[0x18];
6933
6934 u8 reserved_at_60[0x10];
6935 u8 lwm[0x10];
6936};
6937
Saeed Mahameede2816822015-05-28 22:28:40 +03006938struct mlx5_ifc_arm_xrc_srq_out_bits {
6939 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006940 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006941
6942 u8 syndrome[0x20];
6943
Matan Barakb4ff3a32016-02-09 14:57:42 +02006944 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006945};
6946
6947enum {
6948 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
6949};
6950
6951struct mlx5_ifc_arm_xrc_srq_in_bits {
6952 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006953 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006954
Matan Barakb4ff3a32016-02-09 14:57:42 +02006955 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006956 u8 op_mod[0x10];
6957
Matan Barakb4ff3a32016-02-09 14:57:42 +02006958 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006959 u8 xrc_srqn[0x18];
6960
Matan Barakb4ff3a32016-02-09 14:57:42 +02006961 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006962 u8 lwm[0x10];
6963};
6964
6965struct mlx5_ifc_arm_rq_out_bits {
6966 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006967 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006968
6969 u8 syndrome[0x20];
6970
Matan Barakb4ff3a32016-02-09 14:57:42 +02006971 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006972};
6973
6974enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03006975 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
6976 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03006977};
6978
6979struct mlx5_ifc_arm_rq_in_bits {
6980 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006981 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006982
Matan Barakb4ff3a32016-02-09 14:57:42 +02006983 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006984 u8 op_mod[0x10];
6985
Matan Barakb4ff3a32016-02-09 14:57:42 +02006986 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006987 u8 srq_number[0x18];
6988
Matan Barakb4ff3a32016-02-09 14:57:42 +02006989 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006990 u8 lwm[0x10];
6991};
6992
6993struct mlx5_ifc_arm_dct_out_bits {
6994 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006995 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006996
6997 u8 syndrome[0x20];
6998
Matan Barakb4ff3a32016-02-09 14:57:42 +02006999 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007000};
7001
7002struct mlx5_ifc_arm_dct_in_bits {
7003 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007004 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007005
Matan Barakb4ff3a32016-02-09 14:57:42 +02007006 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007007 u8 op_mod[0x10];
7008
Matan Barakb4ff3a32016-02-09 14:57:42 +02007009 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007010 u8 dct_number[0x18];
7011
Matan Barakb4ff3a32016-02-09 14:57:42 +02007012 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007013};
7014
7015struct mlx5_ifc_alloc_xrcd_out_bits {
7016 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007017 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007018
7019 u8 syndrome[0x20];
7020
Matan Barakb4ff3a32016-02-09 14:57:42 +02007021 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007022 u8 xrcd[0x18];
7023
Matan Barakb4ff3a32016-02-09 14:57:42 +02007024 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007025};
7026
7027struct mlx5_ifc_alloc_xrcd_in_bits {
7028 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007029 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007030
Matan Barakb4ff3a32016-02-09 14:57:42 +02007031 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007032 u8 op_mod[0x10];
7033
Matan Barakb4ff3a32016-02-09 14:57:42 +02007034 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007035};
7036
7037struct mlx5_ifc_alloc_uar_out_bits {
7038 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007039 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007040
7041 u8 syndrome[0x20];
7042
Matan Barakb4ff3a32016-02-09 14:57:42 +02007043 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007044 u8 uar[0x18];
7045
Matan Barakb4ff3a32016-02-09 14:57:42 +02007046 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007047};
7048
7049struct mlx5_ifc_alloc_uar_in_bits {
7050 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007051 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007052
Matan Barakb4ff3a32016-02-09 14:57:42 +02007053 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007054 u8 op_mod[0x10];
7055
Matan Barakb4ff3a32016-02-09 14:57:42 +02007056 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007057};
7058
7059struct mlx5_ifc_alloc_transport_domain_out_bits {
7060 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007061 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007062
7063 u8 syndrome[0x20];
7064
Matan Barakb4ff3a32016-02-09 14:57:42 +02007065 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007066 u8 transport_domain[0x18];
7067
Matan Barakb4ff3a32016-02-09 14:57:42 +02007068 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007069};
7070
7071struct mlx5_ifc_alloc_transport_domain_in_bits {
7072 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007073 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007074
Matan Barakb4ff3a32016-02-09 14:57:42 +02007075 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007076 u8 op_mod[0x10];
7077
Matan Barakb4ff3a32016-02-09 14:57:42 +02007078 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007079};
7080
7081struct mlx5_ifc_alloc_q_counter_out_bits {
7082 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007083 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007084
7085 u8 syndrome[0x20];
7086
Matan Barakb4ff3a32016-02-09 14:57:42 +02007087 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007088 u8 counter_set_id[0x8];
7089
Matan Barakb4ff3a32016-02-09 14:57:42 +02007090 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007091};
7092
7093struct mlx5_ifc_alloc_q_counter_in_bits {
7094 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007095 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007096
Matan Barakb4ff3a32016-02-09 14:57:42 +02007097 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007098 u8 op_mod[0x10];
7099
Matan Barakb4ff3a32016-02-09 14:57:42 +02007100 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007101};
7102
7103struct mlx5_ifc_alloc_pd_out_bits {
7104 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007105 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007106
7107 u8 syndrome[0x20];
7108
Matan Barakb4ff3a32016-02-09 14:57:42 +02007109 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007110 u8 pd[0x18];
7111
Matan Barakb4ff3a32016-02-09 14:57:42 +02007112 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007113};
7114
7115struct mlx5_ifc_alloc_pd_in_bits {
7116 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007117 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007118
Matan Barakb4ff3a32016-02-09 14:57:42 +02007119 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007120 u8 op_mod[0x10];
7121
Matan Barakb4ff3a32016-02-09 14:57:42 +02007122 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007123};
7124
Amir Vadai9dc0b282016-05-13 12:55:39 +00007125struct mlx5_ifc_alloc_flow_counter_out_bits {
7126 u8 status[0x8];
7127 u8 reserved_at_8[0x18];
7128
7129 u8 syndrome[0x20];
7130
7131 u8 reserved_at_40[0x10];
7132 u8 flow_counter_id[0x10];
7133
7134 u8 reserved_at_60[0x20];
7135};
7136
7137struct mlx5_ifc_alloc_flow_counter_in_bits {
7138 u8 opcode[0x10];
7139 u8 reserved_at_10[0x10];
7140
7141 u8 reserved_at_20[0x10];
7142 u8 op_mod[0x10];
7143
7144 u8 reserved_at_40[0x40];
7145};
7146
Saeed Mahameede2816822015-05-28 22:28:40 +03007147struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7148 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007149 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007150
7151 u8 syndrome[0x20];
7152
Matan Barakb4ff3a32016-02-09 14:57:42 +02007153 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007154};
7155
7156struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7157 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007158 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007159
Matan Barakb4ff3a32016-02-09 14:57:42 +02007160 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007161 u8 op_mod[0x10];
7162
Matan Barakb4ff3a32016-02-09 14:57:42 +02007163 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007164
Matan Barakb4ff3a32016-02-09 14:57:42 +02007165 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007166 u8 vxlan_udp_port[0x10];
7167};
7168
Saeed Mahameed74862162016-06-09 15:11:34 +03007169struct mlx5_ifc_set_rate_limit_out_bits {
7170 u8 status[0x8];
7171 u8 reserved_at_8[0x18];
7172
7173 u8 syndrome[0x20];
7174
7175 u8 reserved_at_40[0x40];
7176};
7177
7178struct mlx5_ifc_set_rate_limit_in_bits {
7179 u8 opcode[0x10];
7180 u8 reserved_at_10[0x10];
7181
7182 u8 reserved_at_20[0x10];
7183 u8 op_mod[0x10];
7184
7185 u8 reserved_at_40[0x10];
7186 u8 rate_limit_index[0x10];
7187
7188 u8 reserved_at_60[0x20];
7189
7190 u8 rate_limit[0x20];
7191};
7192
Saeed Mahameede2816822015-05-28 22:28:40 +03007193struct mlx5_ifc_access_register_out_bits {
7194 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007195 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007196
7197 u8 syndrome[0x20];
7198
Matan Barakb4ff3a32016-02-09 14:57:42 +02007199 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007200
7201 u8 register_data[0][0x20];
7202};
7203
7204enum {
7205 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7206 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7207};
7208
7209struct mlx5_ifc_access_register_in_bits {
7210 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007211 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007212
Matan Barakb4ff3a32016-02-09 14:57:42 +02007213 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007214 u8 op_mod[0x10];
7215
Matan Barakb4ff3a32016-02-09 14:57:42 +02007216 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007217 u8 register_id[0x10];
7218
7219 u8 argument[0x20];
7220
7221 u8 register_data[0][0x20];
7222};
7223
7224struct mlx5_ifc_sltp_reg_bits {
7225 u8 status[0x4];
7226 u8 version[0x4];
7227 u8 local_port[0x8];
7228 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007229 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007230 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007231 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007232
Matan Barakb4ff3a32016-02-09 14:57:42 +02007233 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007234
Matan Barakb4ff3a32016-02-09 14:57:42 +02007235 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007236 u8 polarity[0x1];
7237 u8 ob_tap0[0x8];
7238 u8 ob_tap1[0x8];
7239 u8 ob_tap2[0x8];
7240
Matan Barakb4ff3a32016-02-09 14:57:42 +02007241 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007242 u8 ob_preemp_mode[0x4];
7243 u8 ob_reg[0x8];
7244 u8 ob_bias[0x8];
7245
Matan Barakb4ff3a32016-02-09 14:57:42 +02007246 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007247};
7248
7249struct mlx5_ifc_slrg_reg_bits {
7250 u8 status[0x4];
7251 u8 version[0x4];
7252 u8 local_port[0x8];
7253 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007254 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007255 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007256 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007257
7258 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007259 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007260 u8 grade_lane_speed[0x4];
7261
7262 u8 grade_version[0x8];
7263 u8 grade[0x18];
7264
Matan Barakb4ff3a32016-02-09 14:57:42 +02007265 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007266 u8 height_grade_type[0x4];
7267 u8 height_grade[0x18];
7268
7269 u8 height_dz[0x10];
7270 u8 height_dv[0x10];
7271
Matan Barakb4ff3a32016-02-09 14:57:42 +02007272 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007273 u8 height_sigma[0x10];
7274
Matan Barakb4ff3a32016-02-09 14:57:42 +02007275 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007276
Matan Barakb4ff3a32016-02-09 14:57:42 +02007277 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007278 u8 phase_grade_type[0x4];
7279 u8 phase_grade[0x18];
7280
Matan Barakb4ff3a32016-02-09 14:57:42 +02007281 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007282 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007283 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007284 u8 phase_eo_neg[0x8];
7285
7286 u8 ffe_set_tested[0x10];
7287 u8 test_errors_per_lane[0x10];
7288};
7289
7290struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007291 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007292 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007293 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007294
Matan Barakb4ff3a32016-02-09 14:57:42 +02007295 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007296 u8 vl_hw_cap[0x4];
7297
Matan Barakb4ff3a32016-02-09 14:57:42 +02007298 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007299 u8 vl_admin[0x4];
7300
Matan Barakb4ff3a32016-02-09 14:57:42 +02007301 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007302 u8 vl_operational[0x4];
7303};
7304
7305struct mlx5_ifc_pude_reg_bits {
7306 u8 swid[0x8];
7307 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007308 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007309 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007310 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007311 u8 oper_status[0x4];
7312
Matan Barakb4ff3a32016-02-09 14:57:42 +02007313 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007314};
7315
7316struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007317 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007318 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007319 u8 an_disable_cap[0x1];
7320 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007321 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007322 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007323 u8 proto_mask[0x3];
7324
Saeed Mahameed74862162016-06-09 15:11:34 +03007325 u8 an_status[0x4];
7326 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007327
7328 u8 eth_proto_capability[0x20];
7329
7330 u8 ib_link_width_capability[0x10];
7331 u8 ib_proto_capability[0x10];
7332
Matan Barakb4ff3a32016-02-09 14:57:42 +02007333 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007334
7335 u8 eth_proto_admin[0x20];
7336
7337 u8 ib_link_width_admin[0x10];
7338 u8 ib_proto_admin[0x10];
7339
Matan Barakb4ff3a32016-02-09 14:57:42 +02007340 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007341
7342 u8 eth_proto_oper[0x20];
7343
7344 u8 ib_link_width_oper[0x10];
7345 u8 ib_proto_oper[0x10];
7346
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007347 u8 reserved_at_160[0x1c];
7348 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007349
7350 u8 eth_proto_lp_advertise[0x20];
7351
Matan Barakb4ff3a32016-02-09 14:57:42 +02007352 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007353};
7354
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007355struct mlx5_ifc_mlcr_reg_bits {
7356 u8 reserved_at_0[0x8];
7357 u8 local_port[0x8];
7358 u8 reserved_at_10[0x20];
7359
7360 u8 beacon_duration[0x10];
7361 u8 reserved_at_40[0x10];
7362
7363 u8 beacon_remain[0x10];
7364};
7365
Saeed Mahameede2816822015-05-28 22:28:40 +03007366struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007367 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007368
7369 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007370 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007371 u8 repetitions_mode[0x4];
7372 u8 num_of_repetitions[0x8];
7373
7374 u8 grade_version[0x8];
7375 u8 height_grade_type[0x4];
7376 u8 phase_grade_type[0x4];
7377 u8 height_grade_weight[0x8];
7378 u8 phase_grade_weight[0x8];
7379
7380 u8 gisim_measure_bits[0x10];
7381 u8 adaptive_tap_measure_bits[0x10];
7382
7383 u8 ber_bath_high_error_threshold[0x10];
7384 u8 ber_bath_mid_error_threshold[0x10];
7385
7386 u8 ber_bath_low_error_threshold[0x10];
7387 u8 one_ratio_high_threshold[0x10];
7388
7389 u8 one_ratio_high_mid_threshold[0x10];
7390 u8 one_ratio_low_mid_threshold[0x10];
7391
7392 u8 one_ratio_low_threshold[0x10];
7393 u8 ndeo_error_threshold[0x10];
7394
7395 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007396 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007397 u8 mix90_phase_for_voltage_bath[0x8];
7398
7399 u8 mixer_offset_start[0x10];
7400 u8 mixer_offset_end[0x10];
7401
Matan Barakb4ff3a32016-02-09 14:57:42 +02007402 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007403 u8 ber_test_time[0xb];
7404};
7405
7406struct mlx5_ifc_pspa_reg_bits {
7407 u8 swid[0x8];
7408 u8 local_port[0x8];
7409 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007410 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007411
Matan Barakb4ff3a32016-02-09 14:57:42 +02007412 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007413};
7414
7415struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007416 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007417 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007418 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007419 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007420 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007421 u8 mode[0x2];
7422
Matan Barakb4ff3a32016-02-09 14:57:42 +02007423 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007424
Matan Barakb4ff3a32016-02-09 14:57:42 +02007425 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007426 u8 min_threshold[0x10];
7427
Matan Barakb4ff3a32016-02-09 14:57:42 +02007428 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007429 u8 max_threshold[0x10];
7430
Matan Barakb4ff3a32016-02-09 14:57:42 +02007431 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007432 u8 mark_probability_denominator[0x10];
7433
Matan Barakb4ff3a32016-02-09 14:57:42 +02007434 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007435};
7436
7437struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007438 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007439 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007440 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007441
Matan Barakb4ff3a32016-02-09 14:57:42 +02007442 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007443
Matan Barakb4ff3a32016-02-09 14:57:42 +02007444 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007445 u8 wrps_admin[0x4];
7446
Matan Barakb4ff3a32016-02-09 14:57:42 +02007447 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007448 u8 wrps_status[0x4];
7449
Matan Barakb4ff3a32016-02-09 14:57:42 +02007450 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007451 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007452 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007453 u8 down_threshold[0x8];
7454
Matan Barakb4ff3a32016-02-09 14:57:42 +02007455 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007456
Matan Barakb4ff3a32016-02-09 14:57:42 +02007457 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007458 u8 srps_admin[0x4];
7459
Matan Barakb4ff3a32016-02-09 14:57:42 +02007460 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007461 u8 srps_status[0x4];
7462
Matan Barakb4ff3a32016-02-09 14:57:42 +02007463 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007464};
7465
7466struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007467 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007468 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007469 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007470
Matan Barakb4ff3a32016-02-09 14:57:42 +02007471 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007472 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007473 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007474 u8 lb_en[0x8];
7475};
7476
7477struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007478 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007479 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007480 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007481
Matan Barakb4ff3a32016-02-09 14:57:42 +02007482 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007483
7484 u8 port_profile_mode[0x8];
7485 u8 static_port_profile[0x8];
7486 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007487 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007488
7489 u8 retransmission_active[0x8];
7490 u8 fec_mode_active[0x18];
7491
Matan Barakb4ff3a32016-02-09 14:57:42 +02007492 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007493};
7494
7495struct mlx5_ifc_ppcnt_reg_bits {
7496 u8 swid[0x8];
7497 u8 local_port[0x8];
7498 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007499 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007500 u8 grp[0x6];
7501
7502 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007503 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007504 u8 prio_tc[0x3];
7505
7506 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7507};
7508
Gal Pressman8ed1a632016-11-17 13:46:01 +02007509struct mlx5_ifc_mpcnt_reg_bits {
7510 u8 reserved_at_0[0x8];
7511 u8 pcie_index[0x8];
7512 u8 reserved_at_10[0xa];
7513 u8 grp[0x6];
7514
7515 u8 clr[0x1];
7516 u8 reserved_at_21[0x1f];
7517
7518 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7519};
7520
Saeed Mahameede2816822015-05-28 22:28:40 +03007521struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007522 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007523 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007524 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007525 u8 local_port[0x8];
7526 u8 mac_47_32[0x10];
7527
7528 u8 mac_31_0[0x20];
7529
Matan Barakb4ff3a32016-02-09 14:57:42 +02007530 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007531};
7532
7533struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007534 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007535 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007536 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007537
7538 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007539 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007540
7541 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007542 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007543
7544 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007545 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007546};
7547
7548struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007549 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007550 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007551 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007552
Matan Barakb4ff3a32016-02-09 14:57:42 +02007553 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007554 u8 attenuation_5g[0x8];
7555
Matan Barakb4ff3a32016-02-09 14:57:42 +02007556 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007557 u8 attenuation_7g[0x8];
7558
Matan Barakb4ff3a32016-02-09 14:57:42 +02007559 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007560 u8 attenuation_12g[0x8];
7561};
7562
7563struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007564 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007565 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007566 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007567 u8 module_status[0x4];
7568
Matan Barakb4ff3a32016-02-09 14:57:42 +02007569 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007570};
7571
7572struct mlx5_ifc_pmpc_reg_bits {
7573 u8 module_state_updated[32][0x8];
7574};
7575
7576struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007577 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007578 u8 mlpn_status[0x4];
7579 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007580 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007581
7582 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007583 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007584};
7585
7586struct mlx5_ifc_pmlp_reg_bits {
7587 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007588 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007589 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007590 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007591 u8 width[0x8];
7592
7593 u8 lane0_module_mapping[0x20];
7594
7595 u8 lane1_module_mapping[0x20];
7596
7597 u8 lane2_module_mapping[0x20];
7598
7599 u8 lane3_module_mapping[0x20];
7600
Matan Barakb4ff3a32016-02-09 14:57:42 +02007601 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007602};
7603
7604struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007605 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007606 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007607 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007608 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007609 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007610 u8 oper_status[0x4];
7611
7612 u8 ase[0x1];
7613 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007614 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007615 u8 e[0x2];
7616
Matan Barakb4ff3a32016-02-09 14:57:42 +02007617 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007618};
7619
7620struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007621 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007622 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007623 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007624 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007625 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007626
Matan Barakb4ff3a32016-02-09 14:57:42 +02007627 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007628 u8 lane_speed[0x10];
7629
Matan Barakb4ff3a32016-02-09 14:57:42 +02007630 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007631 u8 lpbf[0x1];
7632 u8 fec_mode_policy[0x8];
7633
7634 u8 retransmission_capability[0x8];
7635 u8 fec_mode_capability[0x18];
7636
7637 u8 retransmission_support_admin[0x8];
7638 u8 fec_mode_support_admin[0x18];
7639
7640 u8 retransmission_request_admin[0x8];
7641 u8 fec_mode_request_admin[0x18];
7642
Matan Barakb4ff3a32016-02-09 14:57:42 +02007643 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007644};
7645
7646struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007647 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007648 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007649 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007650 u8 ib_port[0x8];
7651
Matan Barakb4ff3a32016-02-09 14:57:42 +02007652 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007653};
7654
7655struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007656 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007657 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007658 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007659 u8 lbf_mode[0x3];
7660
Matan Barakb4ff3a32016-02-09 14:57:42 +02007661 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007662};
7663
7664struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007665 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007666 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007667 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007668
7669 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007670 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007671 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007672 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007673};
7674
7675struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007676 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007677 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007678 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007679
Matan Barakb4ff3a32016-02-09 14:57:42 +02007680 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007681
7682 u8 port_filter[8][0x20];
7683
7684 u8 port_filter_update_en[8][0x20];
7685};
7686
7687struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007688 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007689 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007690 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007691
7692 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007693 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007694 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007695 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007696 u8 prio_mask_rx[0x8];
7697
7698 u8 pptx[0x1];
7699 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007700 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007701 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007702 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007703
7704 u8 pprx[0x1];
7705 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007706 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007707 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007708 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007709
Matan Barakb4ff3a32016-02-09 14:57:42 +02007710 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007711};
7712
7713struct mlx5_ifc_pelc_reg_bits {
7714 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007715 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007716 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007717 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007718
7719 u8 op_admin[0x8];
7720 u8 op_capability[0x8];
7721 u8 op_request[0x8];
7722 u8 op_active[0x8];
7723
7724 u8 admin[0x40];
7725
7726 u8 capability[0x40];
7727
7728 u8 request[0x40];
7729
7730 u8 active[0x40];
7731
Matan Barakb4ff3a32016-02-09 14:57:42 +02007732 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007733};
7734
7735struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007736 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007737 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007738 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007739
Matan Barakb4ff3a32016-02-09 14:57:42 +02007740 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007741 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007742 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007743
Matan Barakb4ff3a32016-02-09 14:57:42 +02007744 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007745 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007746 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007747 u8 error_type[0x8];
7748};
7749
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007750struct mlx5_ifc_pcam_enhanced_features_bits {
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007751 u8 reserved_at_0[0x7c];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007752
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007753 u8 ptys_connector_type[0x1];
7754 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007755 u8 ppcnt_discard_group[0x1];
7756 u8 ppcnt_statistical_group[0x1];
7757};
7758
7759struct mlx5_ifc_pcam_reg_bits {
7760 u8 reserved_at_0[0x8];
7761 u8 feature_group[0x8];
7762 u8 reserved_at_10[0x8];
7763 u8 access_reg_group[0x8];
7764
7765 u8 reserved_at_20[0x20];
7766
7767 union {
7768 u8 reserved_at_0[0x80];
7769 } port_access_reg_cap_mask;
7770
7771 u8 reserved_at_c0[0x80];
7772
7773 union {
7774 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7775 u8 reserved_at_0[0x80];
7776 } feature_cap_mask;
7777
7778 u8 reserved_at_1c0[0xc0];
7779};
7780
7781struct mlx5_ifc_mcam_enhanced_features_bits {
7782 u8 reserved_at_0[0x7f];
7783
7784 u8 pcie_performance_group[0x1];
7785};
7786
Or Gerlitz0ab87742017-06-11 15:25:38 +03007787struct mlx5_ifc_mcam_access_reg_bits {
7788 u8 reserved_at_0[0x1c];
7789 u8 mcda[0x1];
7790 u8 mcc[0x1];
7791 u8 mcqi[0x1];
7792 u8 reserved_at_1f[0x1];
7793
7794 u8 regs_95_to_64[0x20];
7795 u8 regs_63_to_32[0x20];
7796 u8 regs_31_to_0[0x20];
7797};
7798
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007799struct mlx5_ifc_mcam_reg_bits {
7800 u8 reserved_at_0[0x8];
7801 u8 feature_group[0x8];
7802 u8 reserved_at_10[0x8];
7803 u8 access_reg_group[0x8];
7804
7805 u8 reserved_at_20[0x20];
7806
7807 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007808 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007809 u8 reserved_at_0[0x80];
7810 } mng_access_reg_cap_mask;
7811
7812 u8 reserved_at_c0[0x80];
7813
7814 union {
7815 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7816 u8 reserved_at_0[0x80];
7817 } mng_feature_cap_mask;
7818
7819 u8 reserved_at_1c0[0x80];
7820};
7821
Saeed Mahameede2816822015-05-28 22:28:40 +03007822struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007823 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007824 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007825 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007826
7827 u8 port_capability_mask[4][0x20];
7828};
7829
7830struct mlx5_ifc_paos_reg_bits {
7831 u8 swid[0x8];
7832 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007833 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007834 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007835 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007836 u8 oper_status[0x4];
7837
7838 u8 ase[0x1];
7839 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007840 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007841 u8 e[0x2];
7842
Matan Barakb4ff3a32016-02-09 14:57:42 +02007843 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007844};
7845
7846struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007847 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007848 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007849 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007850 u8 opamp_group_type[0x4];
7851
7852 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007853 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007854 u8 num_of_indices[0xc];
7855
7856 u8 index_data[18][0x10];
7857};
7858
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007859struct mlx5_ifc_pcmr_reg_bits {
7860 u8 reserved_at_0[0x8];
7861 u8 local_port[0x8];
7862 u8 reserved_at_10[0x2e];
7863 u8 fcs_cap[0x1];
7864 u8 reserved_at_3f[0x1f];
7865 u8 fcs_chk[0x1];
7866 u8 reserved_at_5f[0x1];
7867};
7868
Saeed Mahameede2816822015-05-28 22:28:40 +03007869struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007870 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007871 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007872 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007873 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007874 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007875 u8 module[0x8];
7876};
7877
7878struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007879 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007880 u8 lossy[0x1];
7881 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007882 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007883 u8 size[0xc];
7884
7885 u8 xoff_threshold[0x10];
7886 u8 xon_threshold[0x10];
7887};
7888
7889struct mlx5_ifc_set_node_in_bits {
7890 u8 node_description[64][0x8];
7891};
7892
7893struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007894 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007895 u8 power_settings_level[0x8];
7896
Matan Barakb4ff3a32016-02-09 14:57:42 +02007897 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007898};
7899
7900struct mlx5_ifc_register_host_endianness_bits {
7901 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007902 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007903
Matan Barakb4ff3a32016-02-09 14:57:42 +02007904 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007905};
7906
7907struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007908 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007909
7910 u8 mkey[0x20];
7911
7912 u8 addressh_63_32[0x20];
7913
7914 u8 addressl_31_0[0x20];
7915};
7916
7917struct mlx5_ifc_ud_adrs_vector_bits {
7918 u8 dc_key[0x40];
7919
7920 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007921 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007922 u8 destination_qp_dct[0x18];
7923
7924 u8 static_rate[0x4];
7925 u8 sl_eth_prio[0x4];
7926 u8 fl[0x1];
7927 u8 mlid[0x7];
7928 u8 rlid_udp_sport[0x10];
7929
Matan Barakb4ff3a32016-02-09 14:57:42 +02007930 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007931
7932 u8 rmac_47_16[0x20];
7933
7934 u8 rmac_15_0[0x10];
7935 u8 tclass[0x8];
7936 u8 hop_limit[0x8];
7937
Matan Barakb4ff3a32016-02-09 14:57:42 +02007938 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03007939 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007940 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007941 u8 src_addr_index[0x8];
7942 u8 flow_label[0x14];
7943
7944 u8 rgid_rip[16][0x8];
7945};
7946
7947struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007948 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007949 u8 function_id[0x10];
7950
7951 u8 num_pages[0x20];
7952
Matan Barakb4ff3a32016-02-09 14:57:42 +02007953 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007954};
7955
7956struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007957 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007958 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007959 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007960 u8 event_sub_type[0x8];
7961
Matan Barakb4ff3a32016-02-09 14:57:42 +02007962 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007963
7964 union mlx5_ifc_event_auto_bits event_data;
7965
Matan Barakb4ff3a32016-02-09 14:57:42 +02007966 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007967 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007968 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007969 u8 owner[0x1];
7970};
7971
7972enum {
7973 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
7974};
7975
7976struct mlx5_ifc_cmd_queue_entry_bits {
7977 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007978 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007979
7980 u8 input_length[0x20];
7981
7982 u8 input_mailbox_pointer_63_32[0x20];
7983
7984 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007985 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007986
7987 u8 command_input_inline_data[16][0x8];
7988
7989 u8 command_output_inline_data[16][0x8];
7990
7991 u8 output_mailbox_pointer_63_32[0x20];
7992
7993 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007994 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007995
7996 u8 output_length[0x20];
7997
7998 u8 token[0x8];
7999 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008000 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008001 u8 status[0x7];
8002 u8 ownership[0x1];
8003};
8004
8005struct mlx5_ifc_cmd_out_bits {
8006 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008007 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008008
8009 u8 syndrome[0x20];
8010
8011 u8 command_output[0x20];
8012};
8013
8014struct mlx5_ifc_cmd_in_bits {
8015 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008016 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008017
Matan Barakb4ff3a32016-02-09 14:57:42 +02008018 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008019 u8 op_mod[0x10];
8020
8021 u8 command[0][0x20];
8022};
8023
8024struct mlx5_ifc_cmd_if_box_bits {
8025 u8 mailbox_data[512][0x8];
8026
Matan Barakb4ff3a32016-02-09 14:57:42 +02008027 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008028
8029 u8 next_pointer_63_32[0x20];
8030
8031 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008032 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008033
8034 u8 block_number[0x20];
8035
Matan Barakb4ff3a32016-02-09 14:57:42 +02008036 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008037 u8 token[0x8];
8038 u8 ctrl_signature[0x8];
8039 u8 signature[0x8];
8040};
8041
8042struct mlx5_ifc_mtt_bits {
8043 u8 ptag_63_32[0x20];
8044
8045 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008046 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008047 u8 wr_en[0x1];
8048 u8 rd_en[0x1];
8049};
8050
Tariq Toukan928cfe82016-02-22 18:17:29 +02008051struct mlx5_ifc_query_wol_rol_out_bits {
8052 u8 status[0x8];
8053 u8 reserved_at_8[0x18];
8054
8055 u8 syndrome[0x20];
8056
8057 u8 reserved_at_40[0x10];
8058 u8 rol_mode[0x8];
8059 u8 wol_mode[0x8];
8060
8061 u8 reserved_at_60[0x20];
8062};
8063
8064struct mlx5_ifc_query_wol_rol_in_bits {
8065 u8 opcode[0x10];
8066 u8 reserved_at_10[0x10];
8067
8068 u8 reserved_at_20[0x10];
8069 u8 op_mod[0x10];
8070
8071 u8 reserved_at_40[0x40];
8072};
8073
8074struct mlx5_ifc_set_wol_rol_out_bits {
8075 u8 status[0x8];
8076 u8 reserved_at_8[0x18];
8077
8078 u8 syndrome[0x20];
8079
8080 u8 reserved_at_40[0x40];
8081};
8082
8083struct mlx5_ifc_set_wol_rol_in_bits {
8084 u8 opcode[0x10];
8085 u8 reserved_at_10[0x10];
8086
8087 u8 reserved_at_20[0x10];
8088 u8 op_mod[0x10];
8089
8090 u8 rol_mode_valid[0x1];
8091 u8 wol_mode_valid[0x1];
8092 u8 reserved_at_42[0xe];
8093 u8 rol_mode[0x8];
8094 u8 wol_mode[0x8];
8095
8096 u8 reserved_at_60[0x20];
8097};
8098
Saeed Mahameede2816822015-05-28 22:28:40 +03008099enum {
8100 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8101 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8102 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8103};
8104
8105enum {
8106 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8107 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8108 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8109};
8110
8111enum {
8112 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8113 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8114 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8115 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8116 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8117 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8118 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8119 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8120 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8121 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8122 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8123};
8124
8125struct mlx5_ifc_initial_seg_bits {
8126 u8 fw_rev_minor[0x10];
8127 u8 fw_rev_major[0x10];
8128
8129 u8 cmd_interface_rev[0x10];
8130 u8 fw_rev_subminor[0x10];
8131
Matan Barakb4ff3a32016-02-09 14:57:42 +02008132 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008133
8134 u8 cmdq_phy_addr_63_32[0x20];
8135
8136 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008137 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008138 u8 nic_interface[0x2];
8139 u8 log_cmdq_size[0x4];
8140 u8 log_cmdq_stride[0x4];
8141
8142 u8 command_doorbell_vector[0x20];
8143
Matan Barakb4ff3a32016-02-09 14:57:42 +02008144 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008145
8146 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008147 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008148 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008149 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008150
8151 struct mlx5_ifc_health_buffer_bits health_buffer;
8152
8153 u8 no_dram_nic_offset[0x20];
8154
Matan Barakb4ff3a32016-02-09 14:57:42 +02008155 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008156
Matan Barakb4ff3a32016-02-09 14:57:42 +02008157 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008158 u8 clear_int[0x1];
8159
8160 u8 health_syndrome[0x8];
8161 u8 health_counter[0x18];
8162
Matan Barakb4ff3a32016-02-09 14:57:42 +02008163 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008164};
8165
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008166struct mlx5_ifc_mtpps_reg_bits {
8167 u8 reserved_at_0[0xc];
8168 u8 cap_number_of_pps_pins[0x4];
8169 u8 reserved_at_10[0x4];
8170 u8 cap_max_num_of_pps_in_pins[0x4];
8171 u8 reserved_at_18[0x4];
8172 u8 cap_max_num_of_pps_out_pins[0x4];
8173
8174 u8 reserved_at_20[0x24];
8175 u8 cap_pin_3_mode[0x4];
8176 u8 reserved_at_48[0x4];
8177 u8 cap_pin_2_mode[0x4];
8178 u8 reserved_at_50[0x4];
8179 u8 cap_pin_1_mode[0x4];
8180 u8 reserved_at_58[0x4];
8181 u8 cap_pin_0_mode[0x4];
8182
8183 u8 reserved_at_60[0x4];
8184 u8 cap_pin_7_mode[0x4];
8185 u8 reserved_at_68[0x4];
8186 u8 cap_pin_6_mode[0x4];
8187 u8 reserved_at_70[0x4];
8188 u8 cap_pin_5_mode[0x4];
8189 u8 reserved_at_78[0x4];
8190 u8 cap_pin_4_mode[0x4];
8191
8192 u8 reserved_at_80[0x80];
8193
8194 u8 enable[0x1];
8195 u8 reserved_at_101[0xb];
8196 u8 pattern[0x4];
8197 u8 reserved_at_110[0x4];
8198 u8 pin_mode[0x4];
8199 u8 pin[0x8];
8200
8201 u8 reserved_at_120[0x20];
8202
8203 u8 time_stamp[0x40];
8204
8205 u8 out_pulse_duration[0x10];
8206 u8 out_periodic_adjustment[0x10];
8207
8208 u8 reserved_at_1a0[0x60];
8209};
8210
8211struct mlx5_ifc_mtppse_reg_bits {
8212 u8 reserved_at_0[0x18];
8213 u8 pin[0x8];
8214 u8 event_arm[0x1];
8215 u8 reserved_at_21[0x1b];
8216 u8 event_generation_mode[0x4];
8217 u8 reserved_at_40[0x40];
8218};
8219
Or Gerlitz47176282017-04-18 13:35:39 +03008220struct mlx5_ifc_mcqi_cap_bits {
8221 u8 supported_info_bitmask[0x20];
8222
8223 u8 component_size[0x20];
8224
8225 u8 max_component_size[0x20];
8226
8227 u8 log_mcda_word_size[0x4];
8228 u8 reserved_at_64[0xc];
8229 u8 mcda_max_write_size[0x10];
8230
8231 u8 rd_en[0x1];
8232 u8 reserved_at_81[0x1];
8233 u8 match_chip_id[0x1];
8234 u8 match_psid[0x1];
8235 u8 check_user_timestamp[0x1];
8236 u8 match_base_guid_mac[0x1];
8237 u8 reserved_at_86[0x1a];
8238};
8239
8240struct mlx5_ifc_mcqi_reg_bits {
8241 u8 read_pending_component[0x1];
8242 u8 reserved_at_1[0xf];
8243 u8 component_index[0x10];
8244
8245 u8 reserved_at_20[0x20];
8246
8247 u8 reserved_at_40[0x1b];
8248 u8 info_type[0x5];
8249
8250 u8 info_size[0x20];
8251
8252 u8 offset[0x20];
8253
8254 u8 reserved_at_a0[0x10];
8255 u8 data_size[0x10];
8256
8257 u8 data[0][0x20];
8258};
8259
8260struct mlx5_ifc_mcc_reg_bits {
8261 u8 reserved_at_0[0x4];
8262 u8 time_elapsed_since_last_cmd[0xc];
8263 u8 reserved_at_10[0x8];
8264 u8 instruction[0x8];
8265
8266 u8 reserved_at_20[0x10];
8267 u8 component_index[0x10];
8268
8269 u8 reserved_at_40[0x8];
8270 u8 update_handle[0x18];
8271
8272 u8 handle_owner_type[0x4];
8273 u8 handle_owner_host_id[0x4];
8274 u8 reserved_at_68[0x1];
8275 u8 control_progress[0x7];
8276 u8 error_code[0x8];
8277 u8 reserved_at_78[0x4];
8278 u8 control_state[0x4];
8279
8280 u8 component_size[0x20];
8281
8282 u8 reserved_at_a0[0x60];
8283};
8284
8285struct mlx5_ifc_mcda_reg_bits {
8286 u8 reserved_at_0[0x8];
8287 u8 update_handle[0x18];
8288
8289 u8 offset[0x20];
8290
8291 u8 reserved_at_40[0x10];
8292 u8 size[0x10];
8293
8294 u8 reserved_at_60[0x20];
8295
8296 u8 data[0][0x20];
8297};
8298
Saeed Mahameede2816822015-05-28 22:28:40 +03008299union mlx5_ifc_ports_control_registers_document_bits {
8300 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8301 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8302 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8303 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8304 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8305 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8306 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8307 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8308 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8309 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8310 struct mlx5_ifc_paos_reg_bits paos_reg;
8311 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8312 struct mlx5_ifc_peir_reg_bits peir_reg;
8313 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8314 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008315 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008316 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8317 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8318 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8319 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8320 struct mlx5_ifc_plib_reg_bits plib_reg;
8321 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8322 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8323 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8324 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8325 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8326 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8327 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8328 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8329 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8330 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008331 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008332 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8333 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8334 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8335 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8336 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8337 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8338 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008339 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008340 struct mlx5_ifc_pude_reg_bits pude_reg;
8341 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8342 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8343 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008344 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8345 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008346 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008347 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8348 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008349 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8350 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8351 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008352 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008353};
8354
8355union mlx5_ifc_debug_enhancements_document_bits {
8356 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008357 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008358};
8359
8360union mlx5_ifc_uplink_pci_interface_document_bits {
8361 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008362 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008363};
8364
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008365struct mlx5_ifc_set_flow_table_root_out_bits {
8366 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008367 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008368
8369 u8 syndrome[0x20];
8370
Matan Barakb4ff3a32016-02-09 14:57:42 +02008371 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008372};
8373
8374struct mlx5_ifc_set_flow_table_root_in_bits {
8375 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008376 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008377
Matan Barakb4ff3a32016-02-09 14:57:42 +02008378 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008379 u8 op_mod[0x10];
8380
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008381 u8 other_vport[0x1];
8382 u8 reserved_at_41[0xf];
8383 u8 vport_number[0x10];
8384
8385 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008386
8387 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008388 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008389
Matan Barakb4ff3a32016-02-09 14:57:42 +02008390 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008391 u8 table_id[0x18];
8392
Erez Shitrit500a3d02017-04-13 06:36:51 +03008393 u8 reserved_at_c0[0x8];
8394 u8 underlay_qpn[0x18];
8395 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008396};
8397
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008398enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008399 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8400 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008401};
8402
8403struct mlx5_ifc_modify_flow_table_out_bits {
8404 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008405 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008406
8407 u8 syndrome[0x20];
8408
Matan Barakb4ff3a32016-02-09 14:57:42 +02008409 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008410};
8411
8412struct mlx5_ifc_modify_flow_table_in_bits {
8413 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008414 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008415
Matan Barakb4ff3a32016-02-09 14:57:42 +02008416 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008417 u8 op_mod[0x10];
8418
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008419 u8 other_vport[0x1];
8420 u8 reserved_at_41[0xf];
8421 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008422
Matan Barakb4ff3a32016-02-09 14:57:42 +02008423 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008424 u8 modify_field_select[0x10];
8425
8426 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008427 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008428
Matan Barakb4ff3a32016-02-09 14:57:42 +02008429 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008430 u8 table_id[0x18];
8431
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008432 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008433};
8434
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008435struct mlx5_ifc_ets_tcn_config_reg_bits {
8436 u8 g[0x1];
8437 u8 b[0x1];
8438 u8 r[0x1];
8439 u8 reserved_at_3[0x9];
8440 u8 group[0x4];
8441 u8 reserved_at_10[0x9];
8442 u8 bw_allocation[0x7];
8443
8444 u8 reserved_at_20[0xc];
8445 u8 max_bw_units[0x4];
8446 u8 reserved_at_30[0x8];
8447 u8 max_bw_value[0x8];
8448};
8449
8450struct mlx5_ifc_ets_global_config_reg_bits {
8451 u8 reserved_at_0[0x2];
8452 u8 r[0x1];
8453 u8 reserved_at_3[0x1d];
8454
8455 u8 reserved_at_20[0xc];
8456 u8 max_bw_units[0x4];
8457 u8 reserved_at_30[0x8];
8458 u8 max_bw_value[0x8];
8459};
8460
8461struct mlx5_ifc_qetc_reg_bits {
8462 u8 reserved_at_0[0x8];
8463 u8 port_number[0x8];
8464 u8 reserved_at_10[0x30];
8465
8466 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8467 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8468};
8469
8470struct mlx5_ifc_qtct_reg_bits {
8471 u8 reserved_at_0[0x8];
8472 u8 port_number[0x8];
8473 u8 reserved_at_10[0xd];
8474 u8 prio[0x3];
8475
8476 u8 reserved_at_20[0x1d];
8477 u8 tclass[0x3];
8478};
8479
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008480struct mlx5_ifc_mcia_reg_bits {
8481 u8 l[0x1];
8482 u8 reserved_at_1[0x7];
8483 u8 module[0x8];
8484 u8 reserved_at_10[0x8];
8485 u8 status[0x8];
8486
8487 u8 i2c_device_address[0x8];
8488 u8 page_number[0x8];
8489 u8 device_address[0x10];
8490
8491 u8 reserved_at_40[0x10];
8492 u8 size[0x10];
8493
8494 u8 reserved_at_60[0x20];
8495
8496 u8 dword_0[0x20];
8497 u8 dword_1[0x20];
8498 u8 dword_2[0x20];
8499 u8 dword_3[0x20];
8500 u8 dword_4[0x20];
8501 u8 dword_5[0x20];
8502 u8 dword_6[0x20];
8503 u8 dword_7[0x20];
8504 u8 dword_8[0x20];
8505 u8 dword_9[0x20];
8506 u8 dword_10[0x20];
8507 u8 dword_11[0x20];
8508};
8509
Saeed Mahameed74862162016-06-09 15:11:34 +03008510struct mlx5_ifc_dcbx_param_bits {
8511 u8 dcbx_cee_cap[0x1];
8512 u8 dcbx_ieee_cap[0x1];
8513 u8 dcbx_standby_cap[0x1];
8514 u8 reserved_at_0[0x5];
8515 u8 port_number[0x8];
8516 u8 reserved_at_10[0xa];
8517 u8 max_application_table_size[6];
8518 u8 reserved_at_20[0x15];
8519 u8 version_oper[0x3];
8520 u8 reserved_at_38[5];
8521 u8 version_admin[0x3];
8522 u8 willing_admin[0x1];
8523 u8 reserved_at_41[0x3];
8524 u8 pfc_cap_oper[0x4];
8525 u8 reserved_at_48[0x4];
8526 u8 pfc_cap_admin[0x4];
8527 u8 reserved_at_50[0x4];
8528 u8 num_of_tc_oper[0x4];
8529 u8 reserved_at_58[0x4];
8530 u8 num_of_tc_admin[0x4];
8531 u8 remote_willing[0x1];
8532 u8 reserved_at_61[3];
8533 u8 remote_pfc_cap[4];
8534 u8 reserved_at_68[0x14];
8535 u8 remote_num_of_tc[0x4];
8536 u8 reserved_at_80[0x18];
8537 u8 error[0x8];
8538 u8 reserved_at_a0[0x160];
8539};
Aviv Heller84df61e2016-05-10 13:47:50 +03008540
8541struct mlx5_ifc_lagc_bits {
8542 u8 reserved_at_0[0x1d];
8543 u8 lag_state[0x3];
8544
8545 u8 reserved_at_20[0x14];
8546 u8 tx_remap_affinity_2[0x4];
8547 u8 reserved_at_38[0x4];
8548 u8 tx_remap_affinity_1[0x4];
8549};
8550
8551struct mlx5_ifc_create_lag_out_bits {
8552 u8 status[0x8];
8553 u8 reserved_at_8[0x18];
8554
8555 u8 syndrome[0x20];
8556
8557 u8 reserved_at_40[0x40];
8558};
8559
8560struct mlx5_ifc_create_lag_in_bits {
8561 u8 opcode[0x10];
8562 u8 reserved_at_10[0x10];
8563
8564 u8 reserved_at_20[0x10];
8565 u8 op_mod[0x10];
8566
8567 struct mlx5_ifc_lagc_bits ctx;
8568};
8569
8570struct mlx5_ifc_modify_lag_out_bits {
8571 u8 status[0x8];
8572 u8 reserved_at_8[0x18];
8573
8574 u8 syndrome[0x20];
8575
8576 u8 reserved_at_40[0x40];
8577};
8578
8579struct mlx5_ifc_modify_lag_in_bits {
8580 u8 opcode[0x10];
8581 u8 reserved_at_10[0x10];
8582
8583 u8 reserved_at_20[0x10];
8584 u8 op_mod[0x10];
8585
8586 u8 reserved_at_40[0x20];
8587 u8 field_select[0x20];
8588
8589 struct mlx5_ifc_lagc_bits ctx;
8590};
8591
8592struct mlx5_ifc_query_lag_out_bits {
8593 u8 status[0x8];
8594 u8 reserved_at_8[0x18];
8595
8596 u8 syndrome[0x20];
8597
8598 u8 reserved_at_40[0x40];
8599
8600 struct mlx5_ifc_lagc_bits ctx;
8601};
8602
8603struct mlx5_ifc_query_lag_in_bits {
8604 u8 opcode[0x10];
8605 u8 reserved_at_10[0x10];
8606
8607 u8 reserved_at_20[0x10];
8608 u8 op_mod[0x10];
8609
8610 u8 reserved_at_40[0x40];
8611};
8612
8613struct mlx5_ifc_destroy_lag_out_bits {
8614 u8 status[0x8];
8615 u8 reserved_at_8[0x18];
8616
8617 u8 syndrome[0x20];
8618
8619 u8 reserved_at_40[0x40];
8620};
8621
8622struct mlx5_ifc_destroy_lag_in_bits {
8623 u8 opcode[0x10];
8624 u8 reserved_at_10[0x10];
8625
8626 u8 reserved_at_20[0x10];
8627 u8 op_mod[0x10];
8628
8629 u8 reserved_at_40[0x40];
8630};
8631
8632struct mlx5_ifc_create_vport_lag_out_bits {
8633 u8 status[0x8];
8634 u8 reserved_at_8[0x18];
8635
8636 u8 syndrome[0x20];
8637
8638 u8 reserved_at_40[0x40];
8639};
8640
8641struct mlx5_ifc_create_vport_lag_in_bits {
8642 u8 opcode[0x10];
8643 u8 reserved_at_10[0x10];
8644
8645 u8 reserved_at_20[0x10];
8646 u8 op_mod[0x10];
8647
8648 u8 reserved_at_40[0x40];
8649};
8650
8651struct mlx5_ifc_destroy_vport_lag_out_bits {
8652 u8 status[0x8];
8653 u8 reserved_at_8[0x18];
8654
8655 u8 syndrome[0x20];
8656
8657 u8 reserved_at_40[0x40];
8658};
8659
8660struct mlx5_ifc_destroy_vport_lag_in_bits {
8661 u8 opcode[0x10];
8662 u8 reserved_at_10[0x10];
8663
8664 u8 reserved_at_20[0x10];
8665 u8 op_mod[0x10];
8666
8667 u8 reserved_at_40[0x40];
8668};
8669
Eli Cohend29b7962014-10-02 12:19:43 +03008670#endif /* MLX5_IFC_H */