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review.shift-gmbh.com / SHIFTPHONES / kernel / shift / mainline / ffcf7ce9332723cab5ae55575f3a55d1ce559bf3 / . / arch / powerpc / kvm / e500_emulate.c
blob: fde1de08b4d77e7321bfa0dbf82fc3c6c6565859 [file] [log] [blame]
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]1/*
Scott Wood5ce941e2011-04-27 17:24:21 -0500[diff] [blame]2 * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]3 *
4 * Author: Yu Liu, <yu.liu@freescale.com>
5 *
6 * Description:
7 * This file is derived from arch/powerpc/kvm/44x_emulate.c,
8 * by Hollis Blanchard <hollisb@us.ibm.com>.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
13 */
14
15#include <asm/kvm_ppc.h>
16#include <asm/disassemble.h>
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]17#include <asm/dbell.h>
Tudor Laurentiu2daab502015-09-25 18:02:23 +0300[diff] [blame]18#include <asm/reg_booke.h>
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]19
20#include "booke.h"
Scott Wood29a5a6f2011-12-20 15:34:29 +0000[diff] [blame]21#include "e500.h"
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]22
Alexander Graf8f20a3a2014-04-17 13:25:33 +0200[diff] [blame]23#define XOP_DCBTLS 166
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]24#define XOP_MSGSND 206
25#define XOP_MSGCLR 238
Tudor Laurentiu2daab502015-09-25 18:02:23 +0300[diff] [blame]26#define XOP_MFTMR 366
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]27#define XOP_TLBIVAX 786
28#define XOP_TLBSX 914
29#define XOP_TLBRE 946
30#define XOP_TLBWE 978
Scott Woodab9fc402011-12-20 15:34:39 +0000[diff] [blame]31#define XOP_TLBILX 18
Bharat Bhushanb12c7842013-07-04 12:27:45 +0530[diff] [blame]32#define XOP_EHPRIV 270
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]33
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]34#ifdef CONFIG_KVM_E500MC
35static int dbell2prio(ulong param)
36{
37 int msg = param & PPC_DBELL_TYPE_MASK;
38 int prio = -1;
39
40 switch (msg) {
41 case PPC_DBELL_TYPE(PPC_DBELL):
42 prio = BOOKE_IRQPRIO_DBELL;
43 break;
44 case PPC_DBELL_TYPE(PPC_DBELL_CRIT):
45 prio = BOOKE_IRQPRIO_DBELL_CRIT;
46 break;
47 default:
48 break;
49 }
50
51 return prio;
52}
53
54static int kvmppc_e500_emul_msgclr(struct kvm_vcpu *vcpu, int rb)
55{
Simon Guo1143a702018-05-07 14:20:07 +0800[diff] [blame]56 ulong param = vcpu->arch.regs.gpr[rb];
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]57 int prio = dbell2prio(param);
58
59 if (prio < 0)
60 return EMULATE_FAIL;
61
62 clear_bit(prio, &vcpu->arch.pending_exceptions);
63 return EMULATE_DONE;
64}
65
66static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, int rb)
67{
Simon Guo1143a702018-05-07 14:20:07 +0800[diff] [blame]68 ulong param = vcpu->arch.regs.gpr[rb];
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]69 int prio = dbell2prio(rb);
70 int pir = param & PPC_DBELL_PIR_MASK;
71 int i;
72 struct kvm_vcpu *cvcpu;
73
74 if (prio < 0)
75 return EMULATE_FAIL;
76
77 kvm_for_each_vcpu(i, cvcpu, vcpu->kvm) {
78 int cpir = cvcpu->arch.shared->pir;
79 if ((param & PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) {
80 set_bit(prio, &cvcpu->arch.pending_exceptions);
81 kvm_vcpu_kick(cvcpu);
82 }
83 }
84
85 return EMULATE_DONE;
86}
87#endif
88
Bharat Bhushanb12c7842013-07-04 12:27:45 +0530[diff] [blame]89static int kvmppc_e500_emul_ehpriv(struct kvm_run *run, struct kvm_vcpu *vcpu,
90 unsigned int inst, int *advance)
91{
92 int emulated = EMULATE_DONE;
93
94 switch (get_oc(inst)) {
95 case EHPRIV_OC_DEBUG:
96 run->exit_reason = KVM_EXIT_DEBUG;
Simon Guo173c5202018-05-07 14:20:08 +0800[diff] [blame]97 run->debug.arch.address = vcpu->arch.regs.nip;
Bharat Bhushanb12c7842013-07-04 12:27:45 +0530[diff] [blame]98 run->debug.arch.status = 0;
99 kvmppc_account_exit(vcpu, DEBUG_EXITS);
100 emulated = EMULATE_EXIT_USER;
101 *advance = 0;
102 break;
103 default:
104 emulated = EMULATE_FAIL;
105 }
106 return emulated;
107}
108
Alexander Graf8f20a3a2014-04-17 13:25:33 +0200[diff] [blame]109static int kvmppc_e500_emul_dcbtls(struct kvm_vcpu *vcpu)
110{
111 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
112
113 /* Always fail to lock the cache */
114 vcpu_e500->l1csr0 |= L1CSR0_CUL;
115 return EMULATE_DONE;
116}
117
Tudor Laurentiu2daab502015-09-25 18:02:23 +0300[diff] [blame]118static int kvmppc_e500_emul_mftmr(struct kvm_vcpu *vcpu, unsigned int inst,
119 int rt)
120{
121 /* Expose one thread per vcpu */
122 if (get_tmrn(inst) == TMRN_TMCFG0) {
123 kvmppc_set_gpr(vcpu, rt,
124 1 | (1 << TMRN_TMCFG0_NATHRD_SHIFT));
125 return EMULATE_DONE;
126 }
127
128 return EMULATE_FAIL;
129}
130
Aneesh Kumar K.V3a167bea2013-10-07 22:17:53 +0530[diff] [blame]131int kvmppc_core_emulate_op_e500(struct kvm_run *run, struct kvm_vcpu *vcpu,
132 unsigned int inst, int *advance)
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]133{
134 int emulated = EMULATE_DONE;
Alexander Grafc46dc9a2012-05-04 14:01:33 +0200[diff] [blame]135 int ra = get_ra(inst);
136 int rb = get_rb(inst);
137 int rt = get_rt(inst);
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame]138 gva_t ea;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]139
140 switch (get_op(inst)) {
141 case 31:
142 switch (get_xop(inst)) {
143
Alexander Graf8f20a3a2014-04-17 13:25:33 +0200[diff] [blame]144 case XOP_DCBTLS:
145 emulated = kvmppc_e500_emul_dcbtls(vcpu);
146 break;
147
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]148#ifdef CONFIG_KVM_E500MC
149 case XOP_MSGSND:
Alexander Grafc46dc9a2012-05-04 14:01:33 +0200[diff] [blame]150 emulated = kvmppc_e500_emul_msgsnd(vcpu, rb);
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]151 break;
152
153 case XOP_MSGCLR:
Alexander Grafc46dc9a2012-05-04 14:01:33 +0200[diff] [blame]154 emulated = kvmppc_e500_emul_msgclr(vcpu, rb);
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]155 break;
156#endif
157
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]158 case XOP_TLBRE:
159 emulated = kvmppc_e500_emul_tlbre(vcpu);
160 break;
161
162 case XOP_TLBWE:
163 emulated = kvmppc_e500_emul_tlbwe(vcpu);
164 break;
165
166 case XOP_TLBSX:
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame]167 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
168 emulated = kvmppc_e500_emul_tlbsx(vcpu, ea);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]169 break;
170
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame]171 case XOP_TLBILX: {
172 int type = rt & 0x3;
173 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
174 emulated = kvmppc_e500_emul_tlbilx(vcpu, type, ea);
Scott Woodab9fc402011-12-20 15:34:39 +0000[diff] [blame]175 break;
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame]176 }
Scott Woodab9fc402011-12-20 15:34:39 +0000[diff] [blame]177
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]178 case XOP_TLBIVAX:
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame]179 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
180 emulated = kvmppc_e500_emul_tlbivax(vcpu, ea);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]181 break;
182
Tudor Laurentiu2daab502015-09-25 18:02:23 +0300[diff] [blame]183 case XOP_MFTMR:
184 emulated = kvmppc_e500_emul_mftmr(vcpu, inst, rt);
185 break;
186
Bharat Bhushanb12c7842013-07-04 12:27:45 +0530[diff] [blame]187 case XOP_EHPRIV:
188 emulated = kvmppc_e500_emul_ehpriv(run, vcpu, inst,
189 advance);
190 break;
191
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]192 default:
193 emulated = EMULATE_FAIL;
194 }
195
196 break;
197
198 default:
199 emulated = EMULATE_FAIL;
200 }
201
202 if (emulated == EMULATE_FAIL)
203 emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
204
205 return emulated;
206}
207
Aneesh Kumar K.V3a167bea2013-10-07 22:17:53 +0530[diff] [blame]208int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]209{
210 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
211 int emulated = EMULATE_DONE;
212
213 switch (sprn) {
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]214#ifndef CONFIG_KVM_BOOKE_HV
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]215 case SPRN_PID:
Scott Wood5ce941e2011-04-27 17:24:21 -0500[diff] [blame]216 kvmppc_set_pid(vcpu, spr_val);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]217 break;
218 case SPRN_PID1:
Liu Yudd9ebf1f2011-06-14 18:35:14 -0500[diff] [blame]219 if (spr_val != 0)
220 return EMULATE_FAIL;
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]221 vcpu_e500->pid[1] = spr_val;
222 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]223 case SPRN_PID2:
Liu Yudd9ebf1f2011-06-14 18:35:14 -0500[diff] [blame]224 if (spr_val != 0)
225 return EMULATE_FAIL;
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]226 vcpu_e500->pid[2] = spr_val;
227 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]228 case SPRN_MAS0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]229 vcpu->arch.shared->mas0 = spr_val;
230 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]231 case SPRN_MAS1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]232 vcpu->arch.shared->mas1 = spr_val;
233 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]234 case SPRN_MAS2:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]235 vcpu->arch.shared->mas2 = spr_val;
236 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]237 case SPRN_MAS3:
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]238 vcpu->arch.shared->mas7_3 &= ~(u64)0xffffffff;
239 vcpu->arch.shared->mas7_3 |= spr_val;
Scott Wooddc83b8b2011-08-18 15:25:21 -0500[diff] [blame]240 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]241 case SPRN_MAS4:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]242 vcpu->arch.shared->mas4 = spr_val;
243 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]244 case SPRN_MAS6:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]245 vcpu->arch.shared->mas6 = spr_val;
246 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]247 case SPRN_MAS7:
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]248 vcpu->arch.shared->mas7_3 &= (u64)0xffffffff;
249 vcpu->arch.shared->mas7_3 |= (u64)spr_val << 32;
Scott Wooddc83b8b2011-08-18 15:25:21 -0500[diff] [blame]250 break;
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]251#endif
Liu Yud86be072010-01-22 18:50:29 +0800[diff] [blame]252 case SPRN_L1CSR0:
253 vcpu_e500->l1csr0 = spr_val;
254 vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC);
255 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]256 case SPRN_L1CSR1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]257 vcpu_e500->l1csr1 = spr_val;
Alexander Graf07fec1c2014-04-17 12:53:13 +0200[diff] [blame]258 vcpu_e500->l1csr1 &= ~(L1CSR1_ICFI | L1CSR1_ICLFR);
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]259 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]260 case SPRN_HID0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]261 vcpu_e500->hid0 = spr_val;
262 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]263 case SPRN_HID1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]264 vcpu_e500->hid1 = spr_val;
265 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]266
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]267 case SPRN_MMUCSR0:
268 emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]269 spr_val);
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]270 break;
271
Mihai Caramandebf27d2014-07-04 11:17:28 +0300[diff] [blame]272 case SPRN_PWRMGTCR0:
273 /*
274 * Guest relies on host power management configurations
275 * Treat the request as a general store
276 */
277 vcpu->arch.pwrmgtcr0 = spr_val;
278 break;
279
Diana Craciun98518c42018-12-12 16:03:03 +0200[diff] [blame]280 case SPRN_BUCSR:
281 /*
282 * If we are here, it means that we have already flushed the
283 * branch predictor, so just return to guest.
284 */
285 break;
286
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]287 /* extra exceptions */
Mihai Caraman95d80a22014-08-20 16:36:23 +0300[diff] [blame]288#ifdef CONFIG_SPE_POSSIBLE
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]289 case SPRN_IVOR32:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]290 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]291 break;
292 case SPRN_IVOR33:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]293 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]294 break;
295 case SPRN_IVOR34:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]296 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]297 break;
Mihai Caraman95d80a22014-08-20 16:36:23 +0300[diff] [blame]298#endif
299#ifdef CONFIG_ALTIVEC
300 case SPRN_IVOR32:
301 vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL] = spr_val;
302 break;
303 case SPRN_IVOR33:
304 vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST] = spr_val;
305 break;
306#endif
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]307 case SPRN_IVOR35:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]308 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]309 break;
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]310#ifdef CONFIG_KVM_BOOKE_HV
311 case SPRN_IVOR36:
312 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] = spr_val;
313 break;
314 case SPRN_IVOR37:
315 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = spr_val;
316 break;
317#endif
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]318 default:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]319 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]320 }
321
322 return emulated;
323}
324
Aneesh Kumar K.V3a167bea2013-10-07 22:17:53 +0530[diff] [blame]325int kvmppc_core_emulate_mfspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]326{
327 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
328 int emulated = EMULATE_DONE;
329
330 switch (sprn) {
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]331#ifndef CONFIG_KVM_BOOKE_HV
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]332 case SPRN_PID:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]333 *spr_val = vcpu_e500->pid[0];
334 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]335 case SPRN_PID1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]336 *spr_val = vcpu_e500->pid[1];
337 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]338 case SPRN_PID2:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]339 *spr_val = vcpu_e500->pid[2];
340 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]341 case SPRN_MAS0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]342 *spr_val = vcpu->arch.shared->mas0;
343 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]344 case SPRN_MAS1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]345 *spr_val = vcpu->arch.shared->mas1;
346 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]347 case SPRN_MAS2:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]348 *spr_val = vcpu->arch.shared->mas2;
349 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]350 case SPRN_MAS3:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]351 *spr_val = (u32)vcpu->arch.shared->mas7_3;
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]352 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]353 case SPRN_MAS4:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]354 *spr_val = vcpu->arch.shared->mas4;
355 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]356 case SPRN_MAS6:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]357 *spr_val = vcpu->arch.shared->mas6;
358 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]359 case SPRN_MAS7:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]360 *spr_val = vcpu->arch.shared->mas7_3 >> 32;
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]361 break;
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]362#endif
Bharat Bhushan21bd0002012-05-20 23:21:23 +0000[diff] [blame]363 case SPRN_DECAR:
364 *spr_val = vcpu->arch.decar;
365 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]366 case SPRN_TLB0CFG:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]367 *spr_val = vcpu->arch.tlbcfg[0];
368 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]369 case SPRN_TLB1CFG:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]370 *spr_val = vcpu->arch.tlbcfg[1];
371 break;
Mihai Caraman307d9002013-04-11 00:03:10 +0000[diff] [blame]372 case SPRN_TLB0PS:
373 if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
374 return EMULATE_FAIL;
375 *spr_val = vcpu->arch.tlbps[0];
376 break;
377 case SPRN_TLB1PS:
378 if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
379 return EMULATE_FAIL;
380 *spr_val = vcpu->arch.tlbps[1];
381 break;
Liu Yud86be072010-01-22 18:50:29 +0800[diff] [blame]382 case SPRN_L1CSR0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]383 *spr_val = vcpu_e500->l1csr0;
384 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]385 case SPRN_L1CSR1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]386 *spr_val = vcpu_e500->l1csr1;
387 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]388 case SPRN_HID0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]389 *spr_val = vcpu_e500->hid0;
390 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]391 case SPRN_HID1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]392 *spr_val = vcpu_e500->hid1;
393 break;
Scott Wood90d34b02011-03-29 16:49:10 -0500[diff] [blame]394 case SPRN_SVR:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]395 *spr_val = vcpu_e500->svr;
396 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]397
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]398 case SPRN_MMUCSR0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]399 *spr_val = 0;
400 break;
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]401
Liu Yu06579dd2009-06-05 14:54:31 +0800[diff] [blame]402 case SPRN_MMUCFG:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]403 *spr_val = vcpu->arch.mmucfg;
404 break;
Mihai Caraman9a6061d2013-04-11 00:03:11 +0000[diff] [blame]405 case SPRN_EPTCFG:
406 if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
407 return EMULATE_FAIL;
408 /*
409 * Legacy Linux guests access EPTCFG register even if the E.PT
410 * category is disabled in the VM. Give them a chance to live.
411 */
412 *spr_val = vcpu->arch.eptcfg;
413 break;
Liu Yu06579dd2009-06-05 14:54:31 +0800[diff] [blame]414
Mihai Caramandebf27d2014-07-04 11:17:28 +0300[diff] [blame]415 case SPRN_PWRMGTCR0:
416 *spr_val = vcpu->arch.pwrmgtcr0;
417 break;
418
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]419 /* extra exceptions */
Mihai Caraman95d80a22014-08-20 16:36:23 +0300[diff] [blame]420#ifdef CONFIG_SPE_POSSIBLE
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]421 case SPRN_IVOR32:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]422 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]423 break;
424 case SPRN_IVOR33:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]425 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]426 break;
427 case SPRN_IVOR34:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]428 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]429 break;
Mihai Caraman95d80a22014-08-20 16:36:23 +0300[diff] [blame]430#endif
431#ifdef CONFIG_ALTIVEC
432 case SPRN_IVOR32:
433 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL];
434 break;
435 case SPRN_IVOR33:
436 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST];
437 break;
438#endif
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]439 case SPRN_IVOR35:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]440 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]441 break;
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]442#ifdef CONFIG_KVM_BOOKE_HV
443 case SPRN_IVOR36:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]444 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL];
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]445 break;
446 case SPRN_IVOR37:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]447 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]448 break;
449#endif
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]450 default:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]451 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]452 }
453
454 return emulated;
455}
456