Gitiles
Code Review Sign In
review.shift-gmbh.com / SHIFTPHONES / kernel / shift / mainline / 7cdd7a95c66a6309ae6156471033fb5375cbcfca / . / arch / powerpc / kvm / e500_emulate.c
blob: e78f353a836a0731d96217546598a93b2ae22dfd [file] [log] [blame]
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]1/*
Scott Wood5ce941e2011-04-27 17:24:21 -0500[diff] [blame]2 * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]3 *
4 * Author: Yu Liu, <yu.liu@freescale.com>
5 *
6 * Description:
7 * This file is derived from arch/powerpc/kvm/44x_emulate.c,
8 * by Hollis Blanchard <hollisb@us.ibm.com>.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
13 */
14
15#include <asm/kvm_ppc.h>
16#include <asm/disassemble.h>
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]17#include <asm/dbell.h>
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]18
19#include "booke.h"
Scott Wood29a5a6f2011-12-20 15:34:29 +0000[diff] [blame]20#include "e500.h"
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]21
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]22#define XOP_MSGSND 206
23#define XOP_MSGCLR 238
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]24#define XOP_TLBIVAX 786
25#define XOP_TLBSX 914
26#define XOP_TLBRE 946
27#define XOP_TLBWE 978
Scott Woodab9fc402011-12-20 15:34:39 +0000[diff] [blame]28#define XOP_TLBILX 18
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]29
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]30#ifdef CONFIG_KVM_E500MC
31static int dbell2prio(ulong param)
32{
33 int msg = param & PPC_DBELL_TYPE_MASK;
34 int prio = -1;
35
36 switch (msg) {
37 case PPC_DBELL_TYPE(PPC_DBELL):
38 prio = BOOKE_IRQPRIO_DBELL;
39 break;
40 case PPC_DBELL_TYPE(PPC_DBELL_CRIT):
41 prio = BOOKE_IRQPRIO_DBELL_CRIT;
42 break;
43 default:
44 break;
45 }
46
47 return prio;
48}
49
50static int kvmppc_e500_emul_msgclr(struct kvm_vcpu *vcpu, int rb)
51{
52 ulong param = vcpu->arch.gpr[rb];
53 int prio = dbell2prio(param);
54
55 if (prio < 0)
56 return EMULATE_FAIL;
57
58 clear_bit(prio, &vcpu->arch.pending_exceptions);
59 return EMULATE_DONE;
60}
61
62static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, int rb)
63{
64 ulong param = vcpu->arch.gpr[rb];
65 int prio = dbell2prio(rb);
66 int pir = param & PPC_DBELL_PIR_MASK;
67 int i;
68 struct kvm_vcpu *cvcpu;
69
70 if (prio < 0)
71 return EMULATE_FAIL;
72
73 kvm_for_each_vcpu(i, cvcpu, vcpu->kvm) {
74 int cpir = cvcpu->arch.shared->pir;
75 if ((param & PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) {
76 set_bit(prio, &cvcpu->arch.pending_exceptions);
77 kvm_vcpu_kick(cvcpu);
78 }
79 }
80
81 return EMULATE_DONE;
82}
83#endif
84
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]85int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
86 unsigned int inst, int *advance)
87{
88 int emulated = EMULATE_DONE;
Alexander Grafc46dc9a2012-05-04 14:01:33 +0200[diff] [blame]89 int ra = get_ra(inst);
90 int rb = get_rb(inst);
91 int rt = get_rt(inst);
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame^]92 gva_t ea;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]93
94 switch (get_op(inst)) {
95 case 31:
96 switch (get_xop(inst)) {
97
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]98#ifdef CONFIG_KVM_E500MC
99 case XOP_MSGSND:
Alexander Grafc46dc9a2012-05-04 14:01:33 +0200[diff] [blame]100 emulated = kvmppc_e500_emul_msgsnd(vcpu, rb);
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]101 break;
102
103 case XOP_MSGCLR:
Alexander Grafc46dc9a2012-05-04 14:01:33 +0200[diff] [blame]104 emulated = kvmppc_e500_emul_msgclr(vcpu, rb);
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]105 break;
106#endif
107
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]108 case XOP_TLBRE:
109 emulated = kvmppc_e500_emul_tlbre(vcpu);
110 break;
111
112 case XOP_TLBWE:
113 emulated = kvmppc_e500_emul_tlbwe(vcpu);
114 break;
115
116 case XOP_TLBSX:
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame^]117 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
118 emulated = kvmppc_e500_emul_tlbsx(vcpu, ea);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]119 break;
120
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame^]121 case XOP_TLBILX: {
122 int type = rt & 0x3;
123 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
124 emulated = kvmppc_e500_emul_tlbilx(vcpu, type, ea);
Scott Woodab9fc402011-12-20 15:34:39 +0000[diff] [blame]125 break;
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame^]126 }
Scott Woodab9fc402011-12-20 15:34:39 +0000[diff] [blame]127
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]128 case XOP_TLBIVAX:
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame^]129 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
130 emulated = kvmppc_e500_emul_tlbivax(vcpu, ea);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]131 break;
132
133 default:
134 emulated = EMULATE_FAIL;
135 }
136
137 break;
138
139 default:
140 emulated = EMULATE_FAIL;
141 }
142
143 if (emulated == EMULATE_FAIL)
144 emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
145
146 return emulated;
147}
148
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]149int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]150{
151 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
152 int emulated = EMULATE_DONE;
153
154 switch (sprn) {
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]155#ifndef CONFIG_KVM_BOOKE_HV
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]156 case SPRN_PID:
Scott Wood5ce941e2011-04-27 17:24:21 -0500[diff] [blame]157 kvmppc_set_pid(vcpu, spr_val);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]158 break;
159 case SPRN_PID1:
Liu Yudd9ebf1f2011-06-14 18:35:14 -0500[diff] [blame]160 if (spr_val != 0)
161 return EMULATE_FAIL;
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]162 vcpu_e500->pid[1] = spr_val;
163 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]164 case SPRN_PID2:
Liu Yudd9ebf1f2011-06-14 18:35:14 -0500[diff] [blame]165 if (spr_val != 0)
166 return EMULATE_FAIL;
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]167 vcpu_e500->pid[2] = spr_val;
168 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]169 case SPRN_MAS0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]170 vcpu->arch.shared->mas0 = spr_val;
171 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]172 case SPRN_MAS1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]173 vcpu->arch.shared->mas1 = spr_val;
174 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]175 case SPRN_MAS2:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]176 vcpu->arch.shared->mas2 = spr_val;
177 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]178 case SPRN_MAS3:
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]179 vcpu->arch.shared->mas7_3 &= ~(u64)0xffffffff;
180 vcpu->arch.shared->mas7_3 |= spr_val;
Scott Wooddc83b8b2011-08-18 15:25:21 -0500[diff] [blame]181 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]182 case SPRN_MAS4:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]183 vcpu->arch.shared->mas4 = spr_val;
184 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]185 case SPRN_MAS6:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]186 vcpu->arch.shared->mas6 = spr_val;
187 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]188 case SPRN_MAS7:
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]189 vcpu->arch.shared->mas7_3 &= (u64)0xffffffff;
190 vcpu->arch.shared->mas7_3 |= (u64)spr_val << 32;
Scott Wooddc83b8b2011-08-18 15:25:21 -0500[diff] [blame]191 break;
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]192#endif
Liu Yud86be072010-01-22 18:50:29 +0800[diff] [blame]193 case SPRN_L1CSR0:
194 vcpu_e500->l1csr0 = spr_val;
195 vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC);
196 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]197 case SPRN_L1CSR1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]198 vcpu_e500->l1csr1 = spr_val;
199 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]200 case SPRN_HID0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]201 vcpu_e500->hid0 = spr_val;
202 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]203 case SPRN_HID1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]204 vcpu_e500->hid1 = spr_val;
205 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]206
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]207 case SPRN_MMUCSR0:
208 emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]209 spr_val);
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]210 break;
211
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]212 /* extra exceptions */
213 case SPRN_IVOR32:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]214 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]215 break;
216 case SPRN_IVOR33:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]217 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]218 break;
219 case SPRN_IVOR34:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]220 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]221 break;
222 case SPRN_IVOR35:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]223 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]224 break;
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]225#ifdef CONFIG_KVM_BOOKE_HV
226 case SPRN_IVOR36:
227 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] = spr_val;
228 break;
229 case SPRN_IVOR37:
230 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = spr_val;
231 break;
232#endif
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]233 default:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]234 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]235 }
236
237 return emulated;
238}
239
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]240int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]241{
242 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
243 int emulated = EMULATE_DONE;
244
245 switch (sprn) {
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]246#ifndef CONFIG_KVM_BOOKE_HV
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]247 case SPRN_PID:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]248 *spr_val = vcpu_e500->pid[0];
249 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]250 case SPRN_PID1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]251 *spr_val = vcpu_e500->pid[1];
252 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]253 case SPRN_PID2:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]254 *spr_val = vcpu_e500->pid[2];
255 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]256 case SPRN_MAS0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]257 *spr_val = vcpu->arch.shared->mas0;
258 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]259 case SPRN_MAS1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]260 *spr_val = vcpu->arch.shared->mas1;
261 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]262 case SPRN_MAS2:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]263 *spr_val = vcpu->arch.shared->mas2;
264 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]265 case SPRN_MAS3:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]266 *spr_val = (u32)vcpu->arch.shared->mas7_3;
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]267 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]268 case SPRN_MAS4:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]269 *spr_val = vcpu->arch.shared->mas4;
270 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]271 case SPRN_MAS6:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]272 *spr_val = vcpu->arch.shared->mas6;
273 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]274 case SPRN_MAS7:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]275 *spr_val = vcpu->arch.shared->mas7_3 >> 32;
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]276 break;
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]277#endif
Bharat Bhushan21bd0002012-05-20 23:21:23 +0000[diff] [blame]278 case SPRN_DECAR:
279 *spr_val = vcpu->arch.decar;
280 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]281 case SPRN_TLB0CFG:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]282 *spr_val = vcpu->arch.tlbcfg[0];
283 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]284 case SPRN_TLB1CFG:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]285 *spr_val = vcpu->arch.tlbcfg[1];
286 break;
Liu Yud86be072010-01-22 18:50:29 +0800[diff] [blame]287 case SPRN_L1CSR0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]288 *spr_val = vcpu_e500->l1csr0;
289 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]290 case SPRN_L1CSR1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]291 *spr_val = vcpu_e500->l1csr1;
292 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]293 case SPRN_HID0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]294 *spr_val = vcpu_e500->hid0;
295 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]296 case SPRN_HID1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]297 *spr_val = vcpu_e500->hid1;
298 break;
Scott Wood90d34b02011-03-29 16:49:10 -0500[diff] [blame]299 case SPRN_SVR:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]300 *spr_val = vcpu_e500->svr;
301 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]302
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]303 case SPRN_MMUCSR0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]304 *spr_val = 0;
305 break;
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]306
Liu Yu06579dd2009-06-05 14:54:31 +0800[diff] [blame]307 case SPRN_MMUCFG:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]308 *spr_val = vcpu->arch.mmucfg;
309 break;
Liu Yu06579dd2009-06-05 14:54:31 +0800[diff] [blame]310
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]311 /* extra exceptions */
312 case SPRN_IVOR32:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]313 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]314 break;
315 case SPRN_IVOR33:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]316 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]317 break;
318 case SPRN_IVOR34:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]319 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]320 break;
321 case SPRN_IVOR35:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]322 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]323 break;
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]324#ifdef CONFIG_KVM_BOOKE_HV
325 case SPRN_IVOR36:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]326 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL];
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]327 break;
328 case SPRN_IVOR37:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]329 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]330 break;
331#endif
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]332 default:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]333 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]334 }
335
336 return emulated;
337}
338