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review.shift-gmbh.com / SHIFTPHONES / kernel / shift / mainline / d78c16ccde96eddf42942c093b241b5e5135b777 / . / arch / arm / plat-samsung / Kconfig
blob: 1091b0a3729a187aff2fba383ea43fe7ce4fb3a1 [file] [log] [blame]
Ben Dookscf383672009-11-10 00:14:58 +0000[diff] [blame]1# arch/arm/plat-samsung/Kconfig
2#
3# Copyright 2009 Simtec Electronics
4#
5# Licensed under GPLv2
6
7config PLAT_SAMSUNG
8 bool
Tomasz Figad78c16c2014-07-02 19:40:44 +0200[diff] [blame^]9 depends on PLAT_S3C24XX || ARCH_S3C64XX || ARCH_EXYNOS || ARCH_S5PV210
Ben Dookscf383672009-11-10 00:14:58 +0000[diff] [blame]10 default y
Russell Kingb1b3f492012-10-06 17:12:25 +0100[diff] [blame]11 select GENERIC_IRQ_CHIP
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700[diff] [blame]12 select NO_IOPORT_MAP
Ben Dookscf383672009-11-10 00:14:58 +0000[diff] [blame]13 help
14 Base platform code for all Samsung SoC based systems
15
Amit Daniel Kachhap89693012013-07-24 14:06:13 +0900[diff] [blame]16config SAMSUNG_PM
17 bool
Tomasz Figad78c16c2014-07-02 19:40:44 +0200[diff] [blame^]18 depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX)
Amit Daniel Kachhap89693012013-07-24 14:06:13 +0900[diff] [blame]19 default y
20 help
21 Base platform power management code for samsung code
22
Ben Dookscf383672009-11-10 00:14:58 +0000[diff] [blame]23if PLAT_SAMSUNG
Rob Herringe509b282014-06-10 09:06:09 -0500[diff] [blame]24menu "Samsung Common options"
Ben Dookscf383672009-11-10 00:14:58 +0000[diff] [blame]25
Ben Dooks89f1fa02010-01-29 09:02:17 +0000[diff] [blame]26# boot configurations
27
28comment "Boot options"
29
Ben Dooks89f1fa02010-01-29 09:02:17 +0000[diff] [blame]30config S3C_LOWLEVEL_UART_PORT
31 int "S3C UART to use for low-level messages"
Rob Herringe509b282014-06-10 09:06:09 -0500[diff] [blame]32 depends on ARCH_S3C64XX
Ben Dooks89f1fa02010-01-29 09:02:17 +0000[diff] [blame]33 default 0
34 help
35 Choice of which UART port to use for the low-level messages,
36 such as the `Uncompressing...` at start time. The value of
37 this configuration should be between zero and two. The port
38 must have been initialised by the boot-loader before use.
39
Tomasz Figacd8dc7a2013-06-15 09:01:49 +0900[diff] [blame]40config SAMSUNG_ATAGS
41 def_bool n
42 depends on !ARCH_MULTIPLATFORM
43 depends on ATAGS
44 help
45 This option enables ATAGS based boot support code for
46 Samsung platforms, including static platform devices, legacy
47 clock, timer and interrupt initialization, etc.
48
49 Platforms that support only DT based boot need not to select
50 this option.
51
52if SAMSUNG_ATAGS
53
Kukjin Kim85841bc2010-01-11 12:21:51 +0900[diff] [blame]54config SAMSUNG_GPIO_EXTRA
55 int "Number of additional GPIO pins"
Mark Brown4ff13992011-11-03 16:15:38 +0900[diff] [blame]56 default 128 if SAMSUNG_GPIO_EXTRA128
57 default 64 if SAMSUNG_GPIO_EXTRA64
Kukjin Kim85841bc2010-01-11 12:21:51 +0900[diff] [blame]58 default 0
59 help
60 Use additional GPIO space in addition to the GPIO's the SOC
61 provides. This allows expanding the GPIO space for use with
62 GPIO expanders.
63
Mark Brown4ff13992011-11-03 16:15:38 +0900[diff] [blame]64config SAMSUNG_GPIO_EXTRA64
65 bool
66
67config SAMSUNG_GPIO_EXTRA128
68 bool
69
Ben Dooks89f1fa02010-01-29 09:02:17 +0000[diff] [blame]70config S3C_GPIO_SPACE
71 int "Space between gpio banks"
72 default 0
73 help
74 Add a number of spare GPIO entries between each bank for debugging
75 purposes. This allows any problems where an counter overflows from
76 one bank to another to be caught, at the expense of using a little
77 more memory.
78
79config S3C_GPIO_TRACK
80 bool
81 help
82 Internal configuration option to enable the s3c specific gpio
83 chip tracking if the platform requires it.
84
Maurus Cuelenaere3929e1e2010-01-14 00:30:31 +0100[diff] [blame]85# ADC driver
86
87config S3C_ADC
88 bool "ADC common driver support"
89 help
90 Core support for the ADC block found in the Samsung SoC systems
91 for drivers such as the touchscreen and hwmon to use to share
92 this resource.
93
Ben Dooksb6a60412010-01-06 02:45:09 +0900[diff] [blame]94# device definitions to compile in
95
96config S3C_DEV_HSMMC
97 bool
98 help
99 Compile in platform device definitions for HSMMC code
100
101config S3C_DEV_HSMMC1
102 bool
103 help
104 Compile in platform device definitions for HSMMC channel 1
105
106config S3C_DEV_HSMMC2
107 bool
108 help
109 Compile in platform device definitions for HSMMC channel 2
110
Hyuk Leeb3c674b2010-06-10 15:22:16 +0900[diff] [blame]111config S3C_DEV_HSMMC3
112 bool
113 help
114 Compile in platform device definitions for HSMMC channel 3
115
Maurus Cuelenaere6cd82ff2010-05-04 13:12:32 +0200[diff] [blame]116config S3C_DEV_HWMON
117 bool
118 help
119 Compile in platform device definitions for HWMON
120
Ben Dooksb6a60412010-01-06 02:45:09 +0900[diff] [blame]121config S3C_DEV_I2C1
122 bool
123 help
124 Compile in platform device definitions for I2C channel 1
125
Marek Szyprowskic8d833b2010-05-20 08:13:06 +0200[diff] [blame]126config S3C_DEV_I2C2
127 bool
128 help
129 Compile in platform device definitions for I2C channel 2
130
Kyungmin Parkb7a98252010-10-12 07:49:24 +0900[diff] [blame]131config S3C_DEV_I2C3
132 bool
133 help
134 Compile in platform device definition for I2C controller 3
135
136config S3C_DEV_I2C4
137 bool
138 help
139 Compile in platform device definition for I2C controller 4
140
141config S3C_DEV_I2C5
142 bool
143 help
144 Compile in platform device definition for I2C controller 5
145
146config S3C_DEV_I2C6
147 bool
148 help
149 Compile in platform device definition for I2C controller 6
150
151config S3C_DEV_I2C7
152 bool
153 help
154 Compile in platform device definition for I2C controller 7
155
Ben Dooksb6a60412010-01-06 02:45:09 +0900[diff] [blame]156config S3C_DEV_FB
157 bool
158 help
159 Compile in platform device definition for framebuffer
160
161config S3C_DEV_USB_HOST
162 bool
163 help
164 Compile in platform device definition for USB host.
165
166config S3C_DEV_USB_HSOTG
167 bool
168 help
169 Compile in platform device definition for USB high-speed OtG
170
Banajit Goswamie1d5c932010-05-19 15:42:29 +0900[diff] [blame]171config S3C_DEV_WDT
172 bool
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900[diff] [blame]173 default y if ARCH_S3C24XX
Banajit Goswamie1d5c932010-05-19 15:42:29 +0900[diff] [blame]174 help
175 Complie in platform device definition for Watchdog Timer
176
Ben Dooksb6a60412010-01-06 02:45:09 +0900[diff] [blame]177config S3C_DEV_NAND
178 bool
179 help
180 Compile in platform device definition for NAND controller
181
Marek Szyprowski999304b2010-05-20 08:59:05 +0200[diff] [blame]182config S3C_DEV_ONENAND
183 bool
184 help
185 Compile in platform device definition for OneNAND controller
186
Atul Dahiyaadc0950c2010-05-18 14:58:56 +0900[diff] [blame]187config S3C_DEV_RTC
188 bool
189 help
190 Complie in platform device definition for RTC
191
Naveen Krishna4f7cdc32010-05-13 22:06:36 +0900[diff] [blame]192config SAMSUNG_DEV_ADC
193 bool
194 help
195 Compile in platform device definition for ADC controller
196
Abhilash Kesavandb900052010-06-08 16:38:20 +0900[diff] [blame]197config SAMSUNG_DEV_IDE
198 bool
199 help
200 Compile in platform device definitions for IDE
201
Padmavathi Venna875a5932011-12-23 10:14:31 +0900[diff] [blame]202config S3C64XX_DEV_SPI0
Jassi Brar4b4c6622010-01-28 17:14:49 +0900[diff] [blame]203 bool
204 help
205 Compile in platform device definitions for S3C64XX's type
Padmavathi Venna875a5932011-12-23 10:14:31 +0900[diff] [blame]206 SPI controller 0
207
208config S3C64XX_DEV_SPI1
209 bool
210 help
211 Compile in platform device definitions for S3C64XX's type
212 SPI controller 1
213
214config S3C64XX_DEV_SPI2
215 bool
216 help
217 Compile in platform device definitions for S3C64XX's type
218 SPI controller 2
Jassi Brar4b4c6622010-01-28 17:14:49 +0900[diff] [blame]219
Ben Dooks2b6c02a2010-05-19 14:36:28 +0900[diff] [blame]220config SAMSUNG_DEV_TS
Maurus Cuelenaere909de0d2010-05-04 13:12:44 +0200[diff] [blame]221 bool
222 help
Ben Dooks2b6c02a2010-05-19 14:36:28 +0900[diff] [blame]223 Common in platform device definitions for touchscreen device
Maurus Cuelenaere909de0d2010-05-04 13:12:44 +0200[diff] [blame]224
Joonyoung Shim995c48a2010-08-06 19:26:10 +0900[diff] [blame]225config SAMSUNG_DEV_KEYPAD
226 bool
227 help
228 Compile in platform device definitions for keypad
229
Banajit Goswami2ce30132011-02-28 22:24:51 +0530[diff] [blame]230config SAMSUNG_DEV_PWM
231 bool
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900[diff] [blame]232 default y if ARCH_S3C24XX
Banajit Goswami2ce30132011-02-28 22:24:51 +0530[diff] [blame]233 help
234 Compile in platform device definition for PWM Timer
235
Banajit Goswamif00207b2011-07-20 23:44:21 +0900[diff] [blame]236config SAMSUNG_DEV_BACKLIGHT
237 bool
238 depends on SAMSUNG_DEV_PWM
239 help
240 Compile in platform device definition LCD backlight with PWM Timer
241
Banajit Goswami2ce30132011-02-28 22:24:51 +0530[diff] [blame]242config S3C24XX_PWM
243 bool "PWM device support"
Arnd Bergmann35e79062012-08-04 07:52:19 +0000[diff] [blame]244 select PWM
245 select PWM_SAMSUNG
Banajit Goswami2ce30132011-02-28 22:24:51 +0530[diff] [blame]246 help
247 Support for exporting the PWM timer blocks via the pwm device
248 system
249
Sylwester Nawrockie51d5482012-11-22 14:29:18 +0900[diff] [blame]250config S3C_SETUP_CAMIF
251 bool
252 help
253 Compile in common setup code for S3C CAMIF devices
254
Ben Dooks89f1fa02010-01-29 09:02:17 +0000[diff] [blame]255# DMA
256
257config S3C_DMA
258 bool
259 help
260 Internal configuration for S3C DMA core
261
Tomasz Figa105dddb2013-06-19 01:24:12 +0900[diff] [blame]262config SAMSUNG_PM_GPIO
263 bool
264 default y if GPIO_SAMSUNG && PM
265 help
266 Include legacy GPIO power management code for platforms not using
267 pinctrl-samsung driver.
268
Boojin Kimaa0de002011-09-02 09:44:34 +0900[diff] [blame]269config SAMSUNG_DMADEV
Arnd Bergmann27873b02014-06-13 12:04:39 +0200[diff] [blame]270 bool "Use legacy Samsung DMA abstraction"
Kukjin Kimb8529ec2014-07-02 07:51:50 +0900[diff] [blame]271 depends on CPU_S5PV210 || ARCH_S3C64XX
Boojin Kimaa0de002011-09-02 09:44:34 +0900[diff] [blame]272 select DMADEVICES
Arnd Bergmann27873b02014-06-13 12:04:39 +0200[diff] [blame]273 default y
Jassi Brard800ede2010-05-18 11:59:06 +0900[diff] [blame]274 help
Boojin Kimaa0de002011-09-02 09:44:34 +0900[diff] [blame]275 Use DMA device engine for PL330 DMAC.
Jassi Brard800ede2010-05-18 11:59:06 +0900[diff] [blame]276
Arnd Bergmann27873b02014-06-13 12:04:39 +0200[diff] [blame]277endif
278
Tomasz Figacd8dc7a2013-06-15 09:01:49 +0900[diff] [blame]279config S5P_DEV_MFC
280 bool
281 help
282 Compile in setup memory (init) code for MFC
283
Ben Dooks80057452010-01-20 12:29:25 +0900[diff] [blame]284comment "Power management"
285
286config SAMSUNG_PM_DEBUG
287 bool "S3C2410 PM Suspend debug"
Arnd Bergmannaf960152014-03-13 16:42:48 +0100[diff] [blame]288 depends on PM && DEBUG_KERNEL && DEBUG_S3C_UART
Ben Dooks80057452010-01-20 12:29:25 +0900[diff] [blame]289 help
290 Say Y here if you want verbose debugging from the PM Suspend and
291 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
292 for more information.
293
294config S3C_PM_DEBUG_LED_SMDK
295 bool "SMDK LED suspend/resume debugging"
296 depends on PM && (MACH_SMDK6410)
297 help
298 Say Y here to enable the use of the SMDK LEDs on the baseboard
299 for debugging of the state of the suspend and resume process.
300
301 Note, this currently only works for S3C64XX based SMDK boards.
302
303config SAMSUNG_PM_CHECK
304 bool "S3C2410 PM Suspend Memory CRC"
Arnd Bergmann714e3302014-03-18 10:02:26 +0100[diff] [blame]305 depends on PM
306 select CRC32
Ben Dooks80057452010-01-20 12:29:25 +0900[diff] [blame]307 help
308 Enable the PM code's memory area checksum over sleep. This option
309 will generate CRCs of all blocks of memory, and store them before
310 going to sleep. The blocks are then checked on resume for any
311 errors.
312
313 Note, this can take several seconds depending on memory size
314 and CPU speed.
315
316 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
317
318config SAMSUNG_PM_CHECK_CHUNKSIZE
319 int "S3C2410 PM Suspend CRC Chunksize (KiB)"
320 depends on PM && SAMSUNG_PM_CHECK
321 default 64
322 help
323 Set the chunksize in Kilobytes of the CRC for checking memory
324 corruption over suspend and resume. A smaller value will mean that
325 the CRC data block will take more memory, but wil identify any
326 faults with better precision.
327
328 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
329
Ben Dooks0317e522010-05-20 14:05:33 +0900[diff] [blame]330config SAMSUNG_WAKEMASK
331 bool
332 depends on PM
333 help
334 Compile support for wakeup-mask controls found on the S3C6400
335 and above. This code allows a set of interrupt to wakeup-mask
336 mappings. See <plat/wakeup-mask.h>
337
Tomasz Figaa4658e52013-06-17 23:45:33 +0900[diff] [blame]338config SAMSUNG_WDT_RESET
339 bool
340 help
341 Compile support for system restart by triggering watchdog reset.
342 Used on SoCs that do not provide dedicated reset control.
343
Will Deacon952aeeb22011-08-16 22:28:54 +0100[diff] [blame]344config DEBUG_S3C_UART
345 depends on PLAT_SAMSUNG
346 int
347 default "0" if DEBUG_S3C_UART0
348 default "1" if DEBUG_S3C_UART1
349 default "2" if DEBUG_S3C_UART2
Olof Johansson5fa23dd2012-11-22 14:24:04 +0900[diff] [blame]350 default "3" if DEBUG_S3C_UART3
Will Deacon952aeeb22011-08-16 22:28:54 +0100[diff] [blame]351
Rob Herringe509b282014-06-10 09:06:09 -0500[diff] [blame]352endmenu
Ben Dookscf383672009-11-10 00:14:58 +0000[diff] [blame]353endif