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review.shift-gmbh.com / SHIFTPHONES / kernel / shift / mainline / 35e7906145d6d487002b738271890a7e7936067e / . / arch / arm / plat-samsung / Kconfig
blob: 9c3b90c3538e3b71bb1e71c8c8bf817ca5057a89 [file] [log] [blame]
Ben Dookscf383672009-11-10 00:14:58 +0000[diff] [blame]1# arch/arm/plat-samsung/Kconfig
2#
3# Copyright 2009 Simtec Electronics
4#
5# Licensed under GPLv2
6
7config PLAT_SAMSUNG
8 bool
Kukjin Kim2d4a3b72010-08-13 14:38:52 +0900[diff] [blame]9 depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P
Ben Dooksae5fa352010-01-29 09:02:19 +0000[diff] [blame]10 select NO_IOPORT
Mark Brown878ccdc2011-05-19 23:10:13 +0100[diff] [blame]11 select GENERIC_IRQ_CHIP
Ben Dookscf383672009-11-10 00:14:58 +0000[diff] [blame]12 default y
13 help
14 Base platform code for all Samsung SoC based systems
15
Kukjin Kim199642b2012-05-13 07:11:38 +0900[diff] [blame]16config PLAT_S5P
17 bool
18 depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
19 default y
20 select ARM_VIC if !ARCH_EXYNOS
21 select ARM_GIC if ARCH_EXYNOS
22 select GIC_NON_BANKED if ARCH_EXYNOS4
23 select NO_IOPORT
24 select ARCH_REQUIRE_GPIOLIB
25 select S3C_GPIO_TRACK
26 select S5P_GPIO_DRVSTR
27 select SAMSUNG_GPIOLIB_4BIT
28 select PLAT_SAMSUNG
29 select SAMSUNG_CLKSRC
30 select SAMSUNG_IRQ_VIC_TIMER
31 help
32 Base platform code for Samsung's S5P series SoC.
33
Ben Dookscf383672009-11-10 00:14:58 +0000[diff] [blame]34if PLAT_SAMSUNG
35
Ben Dooks89f1fa02010-01-29 09:02:17 +0000[diff] [blame]36# boot configurations
37
38comment "Boot options"
39
40config S3C_BOOT_WATCHDOG
41 bool "S3C Initialisation watchdog"
42 depends on S3C2410_WATCHDOG
43 help
44 Say y to enable the watchdog during the kernel decompression
45 stage. If the kernel fails to uncompress, then the watchdog
46 will trigger a reset and the system should restart.
47
48config S3C_BOOT_ERROR_RESET
49 bool "S3C Reboot on decompression error"
50 help
51 Say y here to use the watchdog to reset the system if the
52 kernel decompressor detects an error during decompression.
53
54config S3C_BOOT_UART_FORCE_FIFO
55 bool "Force UART FIFO on during boot process"
56 default y
57 help
58 Say Y here to force the UART FIFOs on during the kernel
59 uncompressor
60
61
62config S3C_LOWLEVEL_UART_PORT
63 int "S3C UART to use for low-level messages"
64 default 0
65 help
66 Choice of which UART port to use for the low-level messages,
67 such as the `Uncompressing...` at start time. The value of
68 this configuration should be between zero and two. The port
69 must have been initialised by the boot-loader before use.
70
Kukjin Kim33bf3322012-04-17 11:20:49 -0700[diff] [blame]71# timer options
72
73config S5P_HRT
74 bool
75 select SAMSUNG_DEV_PWM
76 help
77 Use the High Resolution timer support
78
Ben Dooks89f1fa02010-01-29 09:02:17 +0000[diff] [blame]79# clock options
80
Mark Brown2aa1ecf2012-07-12 16:57:19 +0900[diff] [blame]81config SAMSUNG_CLOCK
82 bool
83 default y if !COMMON_CLK
84
Harald Welteaa9ad6a2009-12-01 01:24:34 +0000[diff] [blame]85config SAMSUNG_CLKSRC
86 bool
87 help
88 Select the clock code for the clksrc implementation
89 used by newer systems such as the S3C64XX.
Ben Dookscf383672009-11-10 00:14:58 +0000[diff] [blame]90
Kukjin Kimbf46aae2012-04-15 21:13:29 -0700[diff] [blame]91config S5P_CLOCK
92 def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
93 help
94 Support common clock part for ARCH_S5P and ARCH_EXYNOS SoCs
95
Ben Dooks7162ba02010-01-06 10:14:51 +0900[diff] [blame]96# options for IRQ support
97
98config SAMSUNG_IRQ_VIC_TIMER
99 bool
100 help
101 Internal configuration to build the VIC timer interrupt code.
102
Kukjin Kim68ae8992012-04-15 21:40:33 -0700[diff] [blame]103config S5P_IRQ
104 def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
105 help
106 Support common interrup part for ARCH_S5P and ARCH_EXYNOS SoCs
107
108config S5P_EXT_INT
109 bool
110 help
111 Use the external interrupts (other than GPIO interrupts.)
112 Note: Do not choose this for S5P6440 and S5P6450.
113
114config S5P_GPIO_INT
115 bool
116 help
117 Common code for the GPIO interrupts (other than external interrupts.)
118
Ben Dooks4f830db2010-01-06 02:28:20 +0900[diff] [blame]119# options for gpio configuration support
120
Kukjin Kim1f323cf2010-01-19 15:30:54 +0900[diff] [blame]121config SAMSUNG_GPIOLIB_4BIT
122 bool
123 help
124 GPIOlib file contains the 4 bit modification functions for gpio
125 configuration. GPIOlib shall be compiled only for S3C64XX and S5P
126 series of processors.
127
Ben Dooks4f830db2010-01-06 02:28:20 +0900[diff] [blame]128config S3C_GPIO_CFG_S3C64XX
129 bool
130 help
131 Internal configuration to enable S3C64XX style GPIO configuration
132 functions.
133
Marek Szyprowski838c6d492010-05-18 12:23:36 +0200[diff] [blame]134config S5P_GPIO_DRVSTR
135 bool
136 help
137 Internal configuration to get and set correct GPIO driver strength
138 helper
139
Kukjin Kim85841bc2010-01-11 12:21:51 +0900[diff] [blame]140config SAMSUNG_GPIO_EXTRA
141 int "Number of additional GPIO pins"
Mark Brown4ff13992011-11-03 16:15:38 +0900[diff] [blame]142 default 128 if SAMSUNG_GPIO_EXTRA128
143 default 64 if SAMSUNG_GPIO_EXTRA64
Kukjin Kim85841bc2010-01-11 12:21:51 +0900[diff] [blame]144 default 0
145 help
146 Use additional GPIO space in addition to the GPIO's the SOC
147 provides. This allows expanding the GPIO space for use with
148 GPIO expanders.
149
Mark Brown4ff13992011-11-03 16:15:38 +0900[diff] [blame]150config SAMSUNG_GPIO_EXTRA64
151 bool
152
153config SAMSUNG_GPIO_EXTRA128
154 bool
155
Ben Dooks89f1fa02010-01-29 09:02:17 +0000[diff] [blame]156config S3C_GPIO_SPACE
157 int "Space between gpio banks"
158 default 0
159 help
160 Add a number of spare GPIO entries between each bank for debugging
161 purposes. This allows any problems where an counter overflows from
162 one bank to another to be caught, at the expense of using a little
163 more memory.
164
165config S3C_GPIO_TRACK
166 bool
167 help
168 Internal configuration option to enable the s3c specific gpio
169 chip tracking if the platform requires it.
170
Kukjin Kimcfe370f2012-04-17 20:05:19 -0700[diff] [blame]171# uart options
172
173config S5P_DEV_UART
174 def_bool y
175 depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
176
Maurus Cuelenaere3929e1e2010-01-14 00:30:31 +0100[diff] [blame]177# ADC driver
178
179config S3C_ADC
180 bool "ADC common driver support"
181 help
182 Core support for the ADC block found in the Samsung SoC systems
183 for drivers such as the touchscreen and hwmon to use to share
184 this resource.
185
Ben Dooksb6a60412010-01-06 02:45:09 +0900[diff] [blame]186# device definitions to compile in
187
188config S3C_DEV_HSMMC
189 bool
190 help
191 Compile in platform device definitions for HSMMC code
192
193config S3C_DEV_HSMMC1
194 bool
195 help
196 Compile in platform device definitions for HSMMC channel 1
197
198config S3C_DEV_HSMMC2
199 bool
200 help
201 Compile in platform device definitions for HSMMC channel 2
202
Hyuk Leeb3c674b2010-06-10 15:22:16 +0900[diff] [blame]203config S3C_DEV_HSMMC3
204 bool
205 help
206 Compile in platform device definitions for HSMMC channel 3
207
Maurus Cuelenaere6cd82ff2010-05-04 13:12:32 +0200[diff] [blame]208config S3C_DEV_HWMON
209 bool
210 help
211 Compile in platform device definitions for HWMON
212
Ben Dooksb6a60412010-01-06 02:45:09 +0900[diff] [blame]213config S3C_DEV_I2C1
214 bool
215 help
216 Compile in platform device definitions for I2C channel 1
217
Marek Szyprowskic8d833b2010-05-20 08:13:06 +0200[diff] [blame]218config S3C_DEV_I2C2
219 bool
220 help
221 Compile in platform device definitions for I2C channel 2
222
Kyungmin Parkb7a98252010-10-12 07:49:24 +0900[diff] [blame]223config S3C_DEV_I2C3
224 bool
225 help
226 Compile in platform device definition for I2C controller 3
227
228config S3C_DEV_I2C4
229 bool
230 help
231 Compile in platform device definition for I2C controller 4
232
233config S3C_DEV_I2C5
234 bool
235 help
236 Compile in platform device definition for I2C controller 5
237
238config S3C_DEV_I2C6
239 bool
240 help
241 Compile in platform device definition for I2C controller 6
242
243config S3C_DEV_I2C7
244 bool
245 help
246 Compile in platform device definition for I2C controller 7
247
Ben Dooksb6a60412010-01-06 02:45:09 +0900[diff] [blame]248config S3C_DEV_FB
249 bool
250 help
251 Compile in platform device definition for framebuffer
252
253config S3C_DEV_USB_HOST
254 bool
255 help
256 Compile in platform device definition for USB host.
257
258config S3C_DEV_USB_HSOTG
259 bool
260 help
261 Compile in platform device definition for USB high-speed OtG
262
Banajit Goswamie1d5c932010-05-19 15:42:29 +0900[diff] [blame]263config S3C_DEV_WDT
264 bool
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900[diff] [blame]265 default y if ARCH_S3C24XX
Banajit Goswamie1d5c932010-05-19 15:42:29 +0900[diff] [blame]266 help
267 Complie in platform device definition for Watchdog Timer
268
Ben Dooksb6a60412010-01-06 02:45:09 +0900[diff] [blame]269config S3C_DEV_NAND
270 bool
271 help
272 Compile in platform device definition for NAND controller
273
Marek Szyprowski999304b2010-05-20 08:59:05 +0200[diff] [blame]274config S3C_DEV_ONENAND
275 bool
276 help
277 Compile in platform device definition for OneNAND controller
278
Atul Dahiyaadc0950c2010-05-18 14:58:56 +0900[diff] [blame]279config S3C_DEV_RTC
280 bool
281 help
282 Complie in platform device definition for RTC
283
Naveen Krishna4f7cdc32010-05-13 22:06:36 +0900[diff] [blame]284config SAMSUNG_DEV_ADC
285 bool
286 help
287 Compile in platform device definition for ADC controller
288
Abhilash Kesavandb900052010-06-08 16:38:20 +0900[diff] [blame]289config SAMSUNG_DEV_IDE
290 bool
291 help
292 Compile in platform device definitions for IDE
293
Padmavathi Venna875a5932011-12-23 10:14:31 +0900[diff] [blame]294config S3C64XX_DEV_SPI0
Jassi Brar4b4c6622010-01-28 17:14:49 +0900[diff] [blame]295 bool
296 help
297 Compile in platform device definitions for S3C64XX's type
Padmavathi Venna875a5932011-12-23 10:14:31 +0900[diff] [blame]298 SPI controller 0
299
300config S3C64XX_DEV_SPI1
301 bool
302 help
303 Compile in platform device definitions for S3C64XX's type
304 SPI controller 1
305
306config S3C64XX_DEV_SPI2
307 bool
308 help
309 Compile in platform device definitions for S3C64XX's type
310 SPI controller 2
Jassi Brar4b4c6622010-01-28 17:14:49 +0900[diff] [blame]311
Ben Dooks2b6c02a2010-05-19 14:36:28 +0900[diff] [blame]312config SAMSUNG_DEV_TS
Maurus Cuelenaere909de0d2010-05-04 13:12:44 +0200[diff] [blame]313 bool
314 help
Ben Dooks2b6c02a2010-05-19 14:36:28 +0900[diff] [blame]315 Common in platform device definitions for touchscreen device
Maurus Cuelenaere909de0d2010-05-04 13:12:44 +0200[diff] [blame]316
Joonyoung Shim995c48a2010-08-06 19:26:10 +0900[diff] [blame]317config SAMSUNG_DEV_KEYPAD
318 bool
319 help
320 Compile in platform device definitions for keypad
321
Banajit Goswami2ce30132011-02-28 22:24:51 +0530[diff] [blame]322config SAMSUNG_DEV_PWM
323 bool
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900[diff] [blame]324 default y if ARCH_S3C24XX
Banajit Goswami2ce30132011-02-28 22:24:51 +0530[diff] [blame]325 help
326 Compile in platform device definition for PWM Timer
327
Banajit Goswamif00207b2011-07-20 23:44:21 +0900[diff] [blame]328config SAMSUNG_DEV_BACKLIGHT
329 bool
330 depends on SAMSUNG_DEV_PWM
331 help
332 Compile in platform device definition LCD backlight with PWM Timer
333
Kukjin Kime033ca92012-04-17 20:39:10 -0700[diff] [blame]334config S5P_DEV_CSIS0
335 bool
336 help
337 Compile in platform device definitions for MIPI-CSIS channel 0
338
339config S5P_DEV_CSIS1
340 bool
341 help
342 Compile in platform device definitions for MIPI-CSIS channel 1
343
344config S5P_DEV_FIMC0
345 bool
346 help
347 Compile in platform device definitions for FIMC controller 0
348
349config S5P_DEV_FIMC1
350 bool
351 help
352 Compile in platform device definitions for FIMC controller 1
353
354config S5P_DEV_FIMC2
355 bool
356 help
357 Compile in platform device definitions for FIMC controller 2
358
359config S5P_DEV_FIMC3
360 bool
361 help
362 Compile in platform device definitions for FIMC controller 3
363
364config S5P_DEV_FIMD0
365 bool
366 help
367 Compile in platform device definitions for FIMD controller 0
368
369config S5P_DEV_G2D
370 bool
371 help
372 Compile in platform device definitions for G2D device
373
374config S5P_DEV_I2C_HDMIPHY
375 bool
376 help
377 Compile in platform device definitions for I2C HDMIPHY controller
378
379config S5P_DEV_JPEG
380 bool
381 help
382 Compile in platform device definitions for JPEG codec
383
Kukjin Kimd9c452f2012-04-17 20:21:30 -0700[diff] [blame]384config S5P_DEV_MFC
385 bool
386 help
387 Compile in setup memory (init) code for MFC
388
Kukjin Kime033ca92012-04-17 20:39:10 -0700[diff] [blame]389config S5P_DEV_ONENAND
390 bool
391 help
392 Compile in platform device definition for OneNAND controller
393
394config S5P_DEV_TV
395 bool
396 help
397 Compile in platform device definition for TV interface
398
399config S5P_DEV_USB_EHCI
400 bool
401 help
402 Compile in platform device definition for USB EHCI
403
Banajit Goswami2ce30132011-02-28 22:24:51 +0530[diff] [blame]404config S3C24XX_PWM
405 bool "PWM device support"
Arnd Bergmann35e79062012-08-04 07:52:19 +0000[diff] [blame^]406 select PWM
407 select PWM_SAMSUNG
Banajit Goswami2ce30132011-02-28 22:24:51 +0530[diff] [blame]408 help
409 Support for exporting the PWM timer blocks via the pwm device
410 system
411
Kukjin Kimd9c452f2012-04-17 20:21:30 -0700[diff] [blame]412config S5P_SETUP_MIPIPHY
413 bool
414 help
415 Compile in common setup code for MIPI-CSIS and MIPI-DSIM devices
416
Ben Dooks89f1fa02010-01-29 09:02:17 +0000[diff] [blame]417# DMA
418
419config S3C_DMA
420 bool
421 help
422 Internal configuration for S3C DMA core
423
Boojin Kimaa0de002011-09-02 09:44:34 +0900[diff] [blame]424config SAMSUNG_DMADEV
Jassi Brard800ede2010-05-18 11:59:06 +0900[diff] [blame]425 bool
Boojin Kimaa0de002011-09-02 09:44:34 +0900[diff] [blame]426 select DMADEVICES
Boojin Kim20ef9e02012-05-12 16:40:52 +0900[diff] [blame]427 select PL330_DMA if (ARCH_EXYNOS5 || ARCH_EXYNOS4 || CPU_S5PV210 || CPU_S5PC100 || \
Boojin Kimaa0de002011-09-02 09:44:34 +0900[diff] [blame]428 CPU_S5P6450 || CPU_S5P6440)
429 select ARM_AMBA
Jassi Brard800ede2010-05-18 11:59:06 +0900[diff] [blame]430 help
Boojin Kimaa0de002011-09-02 09:44:34 +0900[diff] [blame]431 Use DMA device engine for PL330 DMAC.
Jassi Brard800ede2010-05-18 11:59:06 +0900[diff] [blame]432
Ben Dooks80057452010-01-20 12:29:25 +0900[diff] [blame]433comment "Power management"
434
435config SAMSUNG_PM_DEBUG
436 bool "S3C2410 PM Suspend debug"
437 depends on PM
Maurus Cuelenaere3cd21f62012-04-14 07:42:04 -0700[diff] [blame]438 select DEBUG_LL
Ben Dooks80057452010-01-20 12:29:25 +0900[diff] [blame]439 help
440 Say Y here if you want verbose debugging from the PM Suspend and
441 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
442 for more information.
443
444config S3C_PM_DEBUG_LED_SMDK
445 bool "SMDK LED suspend/resume debugging"
446 depends on PM && (MACH_SMDK6410)
447 help
448 Say Y here to enable the use of the SMDK LEDs on the baseboard
449 for debugging of the state of the suspend and resume process.
450
451 Note, this currently only works for S3C64XX based SMDK boards.
452
453config SAMSUNG_PM_CHECK
454 bool "S3C2410 PM Suspend Memory CRC"
455 depends on PM && CRC32
456 help
457 Enable the PM code's memory area checksum over sleep. This option
458 will generate CRCs of all blocks of memory, and store them before
459 going to sleep. The blocks are then checked on resume for any
460 errors.
461
462 Note, this can take several seconds depending on memory size
463 and CPU speed.
464
465 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
466
467config SAMSUNG_PM_CHECK_CHUNKSIZE
468 int "S3C2410 PM Suspend CRC Chunksize (KiB)"
469 depends on PM && SAMSUNG_PM_CHECK
470 default 64
471 help
472 Set the chunksize in Kilobytes of the CRC for checking memory
473 corruption over suspend and resume. A smaller value will mean that
474 the CRC data block will take more memory, but wil identify any
475 faults with better precision.
476
477 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
478
Ben Dooks0317e522010-05-20 14:05:33 +0900[diff] [blame]479config SAMSUNG_WAKEMASK
480 bool
481 depends on PM
482 help
483 Compile support for wakeup-mask controls found on the S3C6400
484 and above. This code allows a set of interrupt to wakeup-mask
485 mappings. See <plat/wakeup-mask.h>
486
Kukjin Kim8eadcf72012-04-15 21:57:38 -0700[diff] [blame]487config S5P_PM
488 bool
489 help
490 Common code for power management support on S5P and newer SoCs
491 Note: Do not select this for S5P6440 and S5P6450.
492
493config S5P_SLEEP
494 bool
495 help
496 Internal config node to apply common S5P sleep management code.
497 Can be selected by S5P and newer SoCs with similar sleep procedure.
498
Will Deacon952aeeb22011-08-16 22:28:54 +0100[diff] [blame]499config DEBUG_S3C_UART
500 depends on PLAT_SAMSUNG
501 int
502 default "0" if DEBUG_S3C_UART0
503 default "1" if DEBUG_S3C_UART1
504 default "2" if DEBUG_S3C_UART2
505
Ben Dookscf383672009-11-10 00:14:58 +0000[diff] [blame]506endif