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Jamie Ilesc9353ae2011-01-24 12:19:12 +00001/*
2 * Copyright 2010-2011 Picochip Ltd., Jamie Iles
3 * http://www.picochip.com
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 *
10 * This file implements a driver for the Synopsys DesignWare watchdog device
Baruch Siach58a251f2013-12-30 14:25:54 +020011 * in the many subsystems. The watchdog has 16 different timeout periods
Jamie Ilesc9353ae2011-01-24 12:19:12 +000012 * and these are a function of the input clock frequency.
13 *
14 * The DesignWare watchdog cannot be stopped once it has been started so we
Guenter Roeckf29a72c2016-02-28 13:12:19 -080015 * do not implement a stop function. The watchdog core will continue to send
16 * heartbeat requests after the watchdog device has been closed.
Jamie Ilesc9353ae2011-01-24 12:19:12 +000017 */
Joe Perches27c766a2012-02-15 15:06:19 -080018
19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
Jamie Ilesc9353ae2011-01-24 12:19:12 +000020
21#include <linux/bitops.h>
22#include <linux/clk.h>
Jisheng Zhang31228f42014-09-23 15:42:12 +080023#include <linux/delay.h>
Jamie Ilesc9353ae2011-01-24 12:19:12 +000024#include <linux/err.h>
Jamie Ilesc9353ae2011-01-24 12:19:12 +000025#include <linux/io.h>
26#include <linux/kernel.h>
Jamie Ilesc9353ae2011-01-24 12:19:12 +000027#include <linux/module.h>
28#include <linux/moduleparam.h>
Dinh Nguyen58e56372013-10-22 11:59:12 -050029#include <linux/of.h>
Jamie Ilesc9353ae2011-01-24 12:19:12 +000030#include <linux/pm.h>
31#include <linux/platform_device.h>
Steffen Trumtrar65a3b692017-05-22 10:51:39 +020032#include <linux/reset.h>
Jamie Ilesc9353ae2011-01-24 12:19:12 +000033#include <linux/watchdog.h>
34
35#define WDOG_CONTROL_REG_OFFSET 0x00
36#define WDOG_CONTROL_REG_WDT_EN_MASK 0x01
Brian Norrisa81abbb2018-03-09 19:46:06 -080037#define WDOG_CONTROL_REG_RESP_MODE_MASK 0x02
Jamie Ilesc9353ae2011-01-24 12:19:12 +000038#define WDOG_TIMEOUT_RANGE_REG_OFFSET 0x04
Jisheng Zhangdfa07142014-09-23 15:42:11 +080039#define WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT 4
Jamie Ilesc9353ae2011-01-24 12:19:12 +000040#define WDOG_CURRENT_COUNT_REG_OFFSET 0x08
41#define WDOG_COUNTER_RESTART_REG_OFFSET 0x0c
42#define WDOG_COUNTER_RESTART_KICK_VALUE 0x76
43
44/* The maximum TOP (timeout period) value that can be set in the watchdog. */
45#define DW_WDT_MAX_TOP 15
46
Doug Andersonb5ade9b2015-01-27 14:25:17 -080047#define DW_WDT_DEFAULT_SECONDS 30
48
Wim Van Sebroeck86a1e182012-03-05 16:51:11 +010049static bool nowayout = WATCHDOG_NOWAYOUT;
50module_param(nowayout, bool, 0);
Jamie Ilesc9353ae2011-01-24 12:19:12 +000051MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
52 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
53
Guenter Roeckf29a72c2016-02-28 13:12:19 -080054struct dw_wdt {
Jamie Ilesc9353ae2011-01-24 12:19:12 +000055 void __iomem *regs;
56 struct clk *clk;
Guenter Roeckc97344f2016-08-09 22:35:58 -070057 unsigned long rate;
Guenter Roeckf29a72c2016-02-28 13:12:19 -080058 struct watchdog_device wdd;
Steffen Trumtrar65a3b692017-05-22 10:51:39 +020059 struct reset_control *rst;
Guenter Roeckf29a72c2016-02-28 13:12:19 -080060};
Jamie Ilesc9353ae2011-01-24 12:19:12 +000061
Guenter Roeckf29a72c2016-02-28 13:12:19 -080062#define to_dw_wdt(wdd) container_of(wdd, struct dw_wdt, wdd)
63
64static inline int dw_wdt_is_enabled(struct dw_wdt *dw_wdt)
Jamie Ilesc9353ae2011-01-24 12:19:12 +000065{
Guenter Roeckf29a72c2016-02-28 13:12:19 -080066 return readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET) &
Jamie Ilesc9353ae2011-01-24 12:19:12 +000067 WDOG_CONTROL_REG_WDT_EN_MASK;
68}
69
Guenter Roeckf29a72c2016-02-28 13:12:19 -080070static inline int dw_wdt_top_in_seconds(struct dw_wdt *dw_wdt, unsigned top)
Jamie Ilesc9353ae2011-01-24 12:19:12 +000071{
72 /*
73 * There are 16 possible timeout values in 0..15 where the number of
74 * cycles is 2 ^ (16 + i) and the watchdog counts down.
75 */
Guenter Roeckc97344f2016-08-09 22:35:58 -070076 return (1U << (16 + top)) / dw_wdt->rate;
Jamie Ilesc9353ae2011-01-24 12:19:12 +000077}
78
Guenter Roeckf29a72c2016-02-28 13:12:19 -080079static int dw_wdt_get_top(struct dw_wdt *dw_wdt)
Jamie Ilesc9353ae2011-01-24 12:19:12 +000080{
Guenter Roeckf29a72c2016-02-28 13:12:19 -080081 int top = readl(dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET) & 0xF;
Jamie Ilesc9353ae2011-01-24 12:19:12 +000082
Guenter Roeckf29a72c2016-02-28 13:12:19 -080083 return dw_wdt_top_in_seconds(dw_wdt, top);
Jamie Ilesc9353ae2011-01-24 12:19:12 +000084}
85
Guenter Roeckf29a72c2016-02-28 13:12:19 -080086static int dw_wdt_ping(struct watchdog_device *wdd)
Jamie Ilesc9353ae2011-01-24 12:19:12 +000087{
Guenter Roeckf29a72c2016-02-28 13:12:19 -080088 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
Jamie Ilesc9353ae2011-01-24 12:19:12 +000089
Guenter Roeckf29a72c2016-02-28 13:12:19 -080090 writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt->regs +
Doug Andersona0085012015-01-27 14:25:16 -080091 WDOG_COUNTER_RESTART_REG_OFFSET);
Guenter Roeckf29a72c2016-02-28 13:12:19 -080092
93 return 0;
Doug Andersona0085012015-01-27 14:25:16 -080094}
95
Guenter Roeckf29a72c2016-02-28 13:12:19 -080096static int dw_wdt_set_timeout(struct watchdog_device *wdd, unsigned int top_s)
Jamie Ilesc9353ae2011-01-24 12:19:12 +000097{
Guenter Roeckf29a72c2016-02-28 13:12:19 -080098 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
Jamie Ilesc9353ae2011-01-24 12:19:12 +000099 int i, top_val = DW_WDT_MAX_TOP;
100
101 /*
102 * Iterate over the timeout values until we find the closest match. We
103 * always look for >=.
104 */
105 for (i = 0; i <= DW_WDT_MAX_TOP; ++i)
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800106 if (dw_wdt_top_in_seconds(dw_wdt, i) >= top_s) {
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000107 top_val = i;
108 break;
109 }
110
Doug Andersona0085012015-01-27 14:25:16 -0800111 /*
112 * Set the new value in the watchdog. Some versions of dw_wdt
113 * have have TOPINIT in the TIMEOUT_RANGE register (as per
114 * CP_WDT_DUAL_TOP in WDT_COMP_PARAMS_1). On those we
115 * effectively get a pat of the watchdog right here.
116 */
Jisheng Zhangdfa07142014-09-23 15:42:11 +0800117 writel(top_val | top_val << WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT,
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800118 dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000119
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800120 wdd->timeout = dw_wdt_top_in_seconds(dw_wdt, top_val);
Doug Andersona0085012015-01-27 14:25:16 -0800121
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800122 return 0;
123}
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000124
Brian Norrisa81abbb2018-03-09 19:46:06 -0800125static void dw_wdt_arm_system_reset(struct dw_wdt *dw_wdt)
126{
127 u32 val = readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
128
129 /* Disable interrupt mode; always perform system reset. */
130 val &= ~WDOG_CONTROL_REG_RESP_MODE_MASK;
131 /* Enable watchdog. */
132 val |= WDOG_CONTROL_REG_WDT_EN_MASK;
133 writel(val, dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
134}
135
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800136static int dw_wdt_start(struct watchdog_device *wdd)
137{
138 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
139
140 dw_wdt_set_timeout(wdd, wdd->timeout);
Brian Norrisa81abbb2018-03-09 19:46:06 -0800141 dw_wdt_arm_system_reset(dw_wdt);
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800142
143 return 0;
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000144}
145
Oleksij Rempel1bfe8882017-09-26 08:11:22 +0200146static int dw_wdt_stop(struct watchdog_device *wdd)
147{
148 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
149
150 if (!dw_wdt->rst) {
151 set_bit(WDOG_HW_RUNNING, &wdd->status);
152 return 0;
153 }
154
155 reset_control_assert(dw_wdt->rst);
156 reset_control_deassert(dw_wdt->rst);
157
158 return 0;
159}
160
Guenter Roecka70dcc02017-01-04 12:27:21 -0800161static int dw_wdt_restart(struct watchdog_device *wdd,
162 unsigned long action, void *data)
Jisheng Zhang31228f42014-09-23 15:42:12 +0800163{
Guenter Roecka70dcc02017-01-04 12:27:21 -0800164 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
Jisheng Zhang31228f42014-09-23 15:42:12 +0800165
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800166 writel(0, dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
Brian Norrisa81abbb2018-03-09 19:46:06 -0800167 if (dw_wdt_is_enabled(dw_wdt))
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800168 writel(WDOG_COUNTER_RESTART_KICK_VALUE,
169 dw_wdt->regs + WDOG_COUNTER_RESTART_REG_OFFSET);
Jisheng Zhang31228f42014-09-23 15:42:12 +0800170 else
Brian Norrisa81abbb2018-03-09 19:46:06 -0800171 dw_wdt_arm_system_reset(dw_wdt);
Jisheng Zhang31228f42014-09-23 15:42:12 +0800172
173 /* wait for reset to assert... */
174 mdelay(500);
175
Guenter Roecka70dcc02017-01-04 12:27:21 -0800176 return 0;
Jisheng Zhang31228f42014-09-23 15:42:12 +0800177}
178
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800179static unsigned int dw_wdt_get_timeleft(struct watchdog_device *wdd)
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000180{
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800181 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000182
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800183 return readl(dw_wdt->regs + WDOG_CURRENT_COUNT_REG_OFFSET) /
Guenter Roeckc97344f2016-08-09 22:35:58 -0700184 dw_wdt->rate;
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000185}
186
187static const struct watchdog_info dw_wdt_ident = {
188 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
189 WDIOF_MAGICCLOSE,
190 .identity = "Synopsys DesignWare Watchdog",
191};
192
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800193static const struct watchdog_ops dw_wdt_ops = {
194 .owner = THIS_MODULE,
195 .start = dw_wdt_start,
Oleksij Rempel1bfe8882017-09-26 08:11:22 +0200196 .stop = dw_wdt_stop,
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800197 .ping = dw_wdt_ping,
198 .set_timeout = dw_wdt_set_timeout,
199 .get_timeleft = dw_wdt_get_timeleft,
Guenter Roecka70dcc02017-01-04 12:27:21 -0800200 .restart = dw_wdt_restart,
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800201};
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000202
Heiko Stübnerad83c6c2013-06-26 20:03:52 +0200203#ifdef CONFIG_PM_SLEEP
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000204static int dw_wdt_suspend(struct device *dev)
205{
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800206 struct dw_wdt *dw_wdt = dev_get_drvdata(dev);
207
208 clk_disable_unprepare(dw_wdt->clk);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000209
210 return 0;
211}
212
213static int dw_wdt_resume(struct device *dev)
214{
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800215 struct dw_wdt *dw_wdt = dev_get_drvdata(dev);
216 int err = clk_prepare_enable(dw_wdt->clk);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000217
218 if (err)
219 return err;
220
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800221 dw_wdt_ping(&dw_wdt->wdd);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000222
223 return 0;
224}
Heiko Stübnerad83c6c2013-06-26 20:03:52 +0200225#endif /* CONFIG_PM_SLEEP */
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000226
Heiko Stübnerad83c6c2013-06-26 20:03:52 +0200227static SIMPLE_DEV_PM_OPS(dw_wdt_pm_ops, dw_wdt_suspend, dw_wdt_resume);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000228
Bill Pemberton2d991a12012-11-19 13:21:41 -0500229static int dw_wdt_drv_probe(struct platform_device *pdev)
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000230{
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800231 struct device *dev = &pdev->dev;
232 struct watchdog_device *wdd;
233 struct dw_wdt *dw_wdt;
234 struct resource *mem;
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000235 int ret;
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000236
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800237 dw_wdt = devm_kzalloc(dev, sizeof(*dw_wdt), GFP_KERNEL);
238 if (!dw_wdt)
239 return -ENOMEM;
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000240
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800241 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
242 dw_wdt->regs = devm_ioremap_resource(dev, mem);
243 if (IS_ERR(dw_wdt->regs))
244 return PTR_ERR(dw_wdt->regs);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000245
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800246 dw_wdt->clk = devm_clk_get(dev, NULL);
247 if (IS_ERR(dw_wdt->clk))
248 return PTR_ERR(dw_wdt->clk);
249
250 ret = clk_prepare_enable(dw_wdt->clk);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000251 if (ret)
Jingoo Hancf3cc8c2013-04-29 18:15:26 +0900252 return ret;
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000253
Guenter Roeckc97344f2016-08-09 22:35:58 -0700254 dw_wdt->rate = clk_get_rate(dw_wdt->clk);
255 if (dw_wdt->rate == 0) {
256 ret = -EINVAL;
257 goto out_disable_clk;
258 }
259
Steffen Trumtrar65a3b692017-05-22 10:51:39 +0200260 dw_wdt->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
261 if (IS_ERR(dw_wdt->rst)) {
262 ret = PTR_ERR(dw_wdt->rst);
263 goto out_disable_clk;
264 }
265
266 reset_control_deassert(dw_wdt->rst);
267
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800268 wdd = &dw_wdt->wdd;
269 wdd->info = &dw_wdt_ident;
270 wdd->ops = &dw_wdt_ops;
271 wdd->min_timeout = 1;
272 wdd->max_hw_heartbeat_ms =
273 dw_wdt_top_in_seconds(dw_wdt, DW_WDT_MAX_TOP) * 1000;
274 wdd->parent = dev;
275
276 watchdog_set_drvdata(wdd, dw_wdt);
277 watchdog_set_nowayout(wdd, nowayout);
278 watchdog_init_timeout(wdd, 0, dev);
279
280 /*
281 * If the watchdog is already running, use its already configured
282 * timeout. Otherwise use the default or the value provided through
283 * devicetree.
284 */
285 if (dw_wdt_is_enabled(dw_wdt)) {
286 wdd->timeout = dw_wdt_get_top(dw_wdt);
287 set_bit(WDOG_HW_RUNNING, &wdd->status);
288 } else {
289 wdd->timeout = DW_WDT_DEFAULT_SECONDS;
290 watchdog_init_timeout(wdd, 0, dev);
291 }
292
293 platform_set_drvdata(pdev, dw_wdt);
294
Guenter Roecka70dcc02017-01-04 12:27:21 -0800295 watchdog_set_restart_priority(wdd, 128);
296
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800297 ret = watchdog_register_device(wdd);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000298 if (ret)
299 goto out_disable_clk;
300
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000301 return 0;
302
303out_disable_clk:
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800304 clk_disable_unprepare(dw_wdt->clk);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000305 return ret;
306}
307
Bill Pemberton4b12b892012-11-19 13:26:24 -0500308static int dw_wdt_drv_remove(struct platform_device *pdev)
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000309{
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800310 struct dw_wdt *dw_wdt = platform_get_drvdata(pdev);
Jisheng Zhang31228f42014-09-23 15:42:12 +0800311
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800312 watchdog_unregister_device(&dw_wdt->wdd);
Steffen Trumtrar65a3b692017-05-22 10:51:39 +0200313 reset_control_assert(dw_wdt->rst);
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800314 clk_disable_unprepare(dw_wdt->clk);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000315
316 return 0;
317}
318
Dinh Nguyen58e56372013-10-22 11:59:12 -0500319#ifdef CONFIG_OF
320static const struct of_device_id dw_wdt_of_match[] = {
321 { .compatible = "snps,dw-wdt", },
322 { /* sentinel */ }
323};
324MODULE_DEVICE_TABLE(of, dw_wdt_of_match);
325#endif
326
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000327static struct platform_driver dw_wdt_driver = {
328 .probe = dw_wdt_drv_probe,
Bill Pemberton82268712012-11-19 13:21:12 -0500329 .remove = dw_wdt_drv_remove,
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000330 .driver = {
331 .name = "dw_wdt",
Dinh Nguyen58e56372013-10-22 11:59:12 -0500332 .of_match_table = of_match_ptr(dw_wdt_of_match),
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000333 .pm = &dw_wdt_pm_ops,
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000334 },
335};
336
Axel Linb8ec6112011-11-29 13:56:27 +0800337module_platform_driver(dw_wdt_driver);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000338
339MODULE_AUTHOR("Jamie Iles");
340MODULE_DESCRIPTION("Synopsys DesignWare Watchdog Driver");
341MODULE_LICENSE("GPL");