blob: c2f4ff51623015ca32aca20d3ad74ff05fe38e29 [file] [log] [blame]
Jamie Ilesc9353ae2011-01-24 12:19:12 +00001/*
2 * Copyright 2010-2011 Picochip Ltd., Jamie Iles
3 * http://www.picochip.com
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 *
10 * This file implements a driver for the Synopsys DesignWare watchdog device
Baruch Siach58a251f2013-12-30 14:25:54 +020011 * in the many subsystems. The watchdog has 16 different timeout periods
Jamie Ilesc9353ae2011-01-24 12:19:12 +000012 * and these are a function of the input clock frequency.
13 *
14 * The DesignWare watchdog cannot be stopped once it has been started so we
Guenter Roeckf29a72c2016-02-28 13:12:19 -080015 * do not implement a stop function. The watchdog core will continue to send
16 * heartbeat requests after the watchdog device has been closed.
Jamie Ilesc9353ae2011-01-24 12:19:12 +000017 */
Joe Perches27c766a2012-02-15 15:06:19 -080018
19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
Jamie Ilesc9353ae2011-01-24 12:19:12 +000020
21#include <linux/bitops.h>
22#include <linux/clk.h>
Jisheng Zhang31228f42014-09-23 15:42:12 +080023#include <linux/delay.h>
Jamie Ilesc9353ae2011-01-24 12:19:12 +000024#include <linux/err.h>
Jamie Ilesc9353ae2011-01-24 12:19:12 +000025#include <linux/io.h>
26#include <linux/kernel.h>
Jamie Ilesc9353ae2011-01-24 12:19:12 +000027#include <linux/module.h>
28#include <linux/moduleparam.h>
Dinh Nguyen58e56372013-10-22 11:59:12 -050029#include <linux/of.h>
Jamie Ilesc9353ae2011-01-24 12:19:12 +000030#include <linux/pm.h>
31#include <linux/platform_device.h>
Steffen Trumtrar65a3b692017-05-22 10:51:39 +020032#include <linux/reset.h>
Jamie Ilesc9353ae2011-01-24 12:19:12 +000033#include <linux/watchdog.h>
34
35#define WDOG_CONTROL_REG_OFFSET 0x00
36#define WDOG_CONTROL_REG_WDT_EN_MASK 0x01
37#define WDOG_TIMEOUT_RANGE_REG_OFFSET 0x04
Jisheng Zhangdfa07142014-09-23 15:42:11 +080038#define WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT 4
Jamie Ilesc9353ae2011-01-24 12:19:12 +000039#define WDOG_CURRENT_COUNT_REG_OFFSET 0x08
40#define WDOG_COUNTER_RESTART_REG_OFFSET 0x0c
41#define WDOG_COUNTER_RESTART_KICK_VALUE 0x76
42
43/* The maximum TOP (timeout period) value that can be set in the watchdog. */
44#define DW_WDT_MAX_TOP 15
45
Doug Andersonb5ade9b2015-01-27 14:25:17 -080046#define DW_WDT_DEFAULT_SECONDS 30
47
Wim Van Sebroeck86a1e182012-03-05 16:51:11 +010048static bool nowayout = WATCHDOG_NOWAYOUT;
49module_param(nowayout, bool, 0);
Jamie Ilesc9353ae2011-01-24 12:19:12 +000050MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
51 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
52
Guenter Roeckf29a72c2016-02-28 13:12:19 -080053struct dw_wdt {
Jamie Ilesc9353ae2011-01-24 12:19:12 +000054 void __iomem *regs;
55 struct clk *clk;
Guenter Roeckc97344f2016-08-09 22:35:58 -070056 unsigned long rate;
Guenter Roeckf29a72c2016-02-28 13:12:19 -080057 struct watchdog_device wdd;
Steffen Trumtrar65a3b692017-05-22 10:51:39 +020058 struct reset_control *rst;
Guenter Roeckf29a72c2016-02-28 13:12:19 -080059};
Jamie Ilesc9353ae2011-01-24 12:19:12 +000060
Guenter Roeckf29a72c2016-02-28 13:12:19 -080061#define to_dw_wdt(wdd) container_of(wdd, struct dw_wdt, wdd)
62
63static inline int dw_wdt_is_enabled(struct dw_wdt *dw_wdt)
Jamie Ilesc9353ae2011-01-24 12:19:12 +000064{
Guenter Roeckf29a72c2016-02-28 13:12:19 -080065 return readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET) &
Jamie Ilesc9353ae2011-01-24 12:19:12 +000066 WDOG_CONTROL_REG_WDT_EN_MASK;
67}
68
Guenter Roeckf29a72c2016-02-28 13:12:19 -080069static inline int dw_wdt_top_in_seconds(struct dw_wdt *dw_wdt, unsigned top)
Jamie Ilesc9353ae2011-01-24 12:19:12 +000070{
71 /*
72 * There are 16 possible timeout values in 0..15 where the number of
73 * cycles is 2 ^ (16 + i) and the watchdog counts down.
74 */
Guenter Roeckc97344f2016-08-09 22:35:58 -070075 return (1U << (16 + top)) / dw_wdt->rate;
Jamie Ilesc9353ae2011-01-24 12:19:12 +000076}
77
Guenter Roeckf29a72c2016-02-28 13:12:19 -080078static int dw_wdt_get_top(struct dw_wdt *dw_wdt)
Jamie Ilesc9353ae2011-01-24 12:19:12 +000079{
Guenter Roeckf29a72c2016-02-28 13:12:19 -080080 int top = readl(dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET) & 0xF;
Jamie Ilesc9353ae2011-01-24 12:19:12 +000081
Guenter Roeckf29a72c2016-02-28 13:12:19 -080082 return dw_wdt_top_in_seconds(dw_wdt, top);
Jamie Ilesc9353ae2011-01-24 12:19:12 +000083}
84
Guenter Roeckf29a72c2016-02-28 13:12:19 -080085static int dw_wdt_ping(struct watchdog_device *wdd)
Jamie Ilesc9353ae2011-01-24 12:19:12 +000086{
Guenter Roeckf29a72c2016-02-28 13:12:19 -080087 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
Jamie Ilesc9353ae2011-01-24 12:19:12 +000088
Guenter Roeckf29a72c2016-02-28 13:12:19 -080089 writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt->regs +
Doug Andersona0085012015-01-27 14:25:16 -080090 WDOG_COUNTER_RESTART_REG_OFFSET);
Guenter Roeckf29a72c2016-02-28 13:12:19 -080091
92 return 0;
Doug Andersona0085012015-01-27 14:25:16 -080093}
94
Guenter Roeckf29a72c2016-02-28 13:12:19 -080095static int dw_wdt_set_timeout(struct watchdog_device *wdd, unsigned int top_s)
Jamie Ilesc9353ae2011-01-24 12:19:12 +000096{
Guenter Roeckf29a72c2016-02-28 13:12:19 -080097 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
Jamie Ilesc9353ae2011-01-24 12:19:12 +000098 int i, top_val = DW_WDT_MAX_TOP;
99
100 /*
101 * Iterate over the timeout values until we find the closest match. We
102 * always look for >=.
103 */
104 for (i = 0; i <= DW_WDT_MAX_TOP; ++i)
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800105 if (dw_wdt_top_in_seconds(dw_wdt, i) >= top_s) {
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000106 top_val = i;
107 break;
108 }
109
Doug Andersona0085012015-01-27 14:25:16 -0800110 /*
111 * Set the new value in the watchdog. Some versions of dw_wdt
112 * have have TOPINIT in the TIMEOUT_RANGE register (as per
113 * CP_WDT_DUAL_TOP in WDT_COMP_PARAMS_1). On those we
114 * effectively get a pat of the watchdog right here.
115 */
Jisheng Zhangdfa07142014-09-23 15:42:11 +0800116 writel(top_val | top_val << WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT,
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800117 dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000118
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800119 wdd->timeout = dw_wdt_top_in_seconds(dw_wdt, top_val);
Doug Andersona0085012015-01-27 14:25:16 -0800120
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800121 return 0;
122}
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000123
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800124static int dw_wdt_start(struct watchdog_device *wdd)
125{
126 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
127
128 dw_wdt_set_timeout(wdd, wdd->timeout);
129
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800130 writel(WDOG_CONTROL_REG_WDT_EN_MASK,
131 dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
132
133 return 0;
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000134}
135
Oleksij Rempel1bfe8882017-09-26 08:11:22 +0200136static int dw_wdt_stop(struct watchdog_device *wdd)
137{
138 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
139
140 if (!dw_wdt->rst) {
141 set_bit(WDOG_HW_RUNNING, &wdd->status);
142 return 0;
143 }
144
145 reset_control_assert(dw_wdt->rst);
146 reset_control_deassert(dw_wdt->rst);
147
148 return 0;
149}
150
Guenter Roecka70dcc02017-01-04 12:27:21 -0800151static int dw_wdt_restart(struct watchdog_device *wdd,
152 unsigned long action, void *data)
Jisheng Zhang31228f42014-09-23 15:42:12 +0800153{
Guenter Roecka70dcc02017-01-04 12:27:21 -0800154 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
Jisheng Zhang31228f42014-09-23 15:42:12 +0800155 u32 val;
156
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800157 writel(0, dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
158 val = readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
Jisheng Zhang31228f42014-09-23 15:42:12 +0800159 if (val & WDOG_CONTROL_REG_WDT_EN_MASK)
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800160 writel(WDOG_COUNTER_RESTART_KICK_VALUE,
161 dw_wdt->regs + WDOG_COUNTER_RESTART_REG_OFFSET);
Jisheng Zhang31228f42014-09-23 15:42:12 +0800162 else
163 writel(WDOG_CONTROL_REG_WDT_EN_MASK,
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800164 dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
Jisheng Zhang31228f42014-09-23 15:42:12 +0800165
166 /* wait for reset to assert... */
167 mdelay(500);
168
Guenter Roecka70dcc02017-01-04 12:27:21 -0800169 return 0;
Jisheng Zhang31228f42014-09-23 15:42:12 +0800170}
171
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800172static unsigned int dw_wdt_get_timeleft(struct watchdog_device *wdd)
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000173{
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800174 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000175
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800176 return readl(dw_wdt->regs + WDOG_CURRENT_COUNT_REG_OFFSET) /
Guenter Roeckc97344f2016-08-09 22:35:58 -0700177 dw_wdt->rate;
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000178}
179
180static const struct watchdog_info dw_wdt_ident = {
181 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
182 WDIOF_MAGICCLOSE,
183 .identity = "Synopsys DesignWare Watchdog",
184};
185
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800186static const struct watchdog_ops dw_wdt_ops = {
187 .owner = THIS_MODULE,
188 .start = dw_wdt_start,
Oleksij Rempel1bfe8882017-09-26 08:11:22 +0200189 .stop = dw_wdt_stop,
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800190 .ping = dw_wdt_ping,
191 .set_timeout = dw_wdt_set_timeout,
192 .get_timeleft = dw_wdt_get_timeleft,
Guenter Roecka70dcc02017-01-04 12:27:21 -0800193 .restart = dw_wdt_restart,
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800194};
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000195
Heiko Stübnerad83c6c2013-06-26 20:03:52 +0200196#ifdef CONFIG_PM_SLEEP
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000197static int dw_wdt_suspend(struct device *dev)
198{
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800199 struct dw_wdt *dw_wdt = dev_get_drvdata(dev);
200
201 clk_disable_unprepare(dw_wdt->clk);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000202
203 return 0;
204}
205
206static int dw_wdt_resume(struct device *dev)
207{
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800208 struct dw_wdt *dw_wdt = dev_get_drvdata(dev);
209 int err = clk_prepare_enable(dw_wdt->clk);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000210
211 if (err)
212 return err;
213
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800214 dw_wdt_ping(&dw_wdt->wdd);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000215
216 return 0;
217}
Heiko Stübnerad83c6c2013-06-26 20:03:52 +0200218#endif /* CONFIG_PM_SLEEP */
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000219
Heiko Stübnerad83c6c2013-06-26 20:03:52 +0200220static SIMPLE_DEV_PM_OPS(dw_wdt_pm_ops, dw_wdt_suspend, dw_wdt_resume);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000221
Bill Pemberton2d991a12012-11-19 13:21:41 -0500222static int dw_wdt_drv_probe(struct platform_device *pdev)
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000223{
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800224 struct device *dev = &pdev->dev;
225 struct watchdog_device *wdd;
226 struct dw_wdt *dw_wdt;
227 struct resource *mem;
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000228 int ret;
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000229
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800230 dw_wdt = devm_kzalloc(dev, sizeof(*dw_wdt), GFP_KERNEL);
231 if (!dw_wdt)
232 return -ENOMEM;
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000233
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800234 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
235 dw_wdt->regs = devm_ioremap_resource(dev, mem);
236 if (IS_ERR(dw_wdt->regs))
237 return PTR_ERR(dw_wdt->regs);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000238
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800239 dw_wdt->clk = devm_clk_get(dev, NULL);
240 if (IS_ERR(dw_wdt->clk))
241 return PTR_ERR(dw_wdt->clk);
242
243 ret = clk_prepare_enable(dw_wdt->clk);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000244 if (ret)
Jingoo Hancf3cc8c2013-04-29 18:15:26 +0900245 return ret;
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000246
Guenter Roeckc97344f2016-08-09 22:35:58 -0700247 dw_wdt->rate = clk_get_rate(dw_wdt->clk);
248 if (dw_wdt->rate == 0) {
249 ret = -EINVAL;
250 goto out_disable_clk;
251 }
252
Steffen Trumtrar65a3b692017-05-22 10:51:39 +0200253 dw_wdt->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
254 if (IS_ERR(dw_wdt->rst)) {
255 ret = PTR_ERR(dw_wdt->rst);
256 goto out_disable_clk;
257 }
258
259 reset_control_deassert(dw_wdt->rst);
260
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800261 wdd = &dw_wdt->wdd;
262 wdd->info = &dw_wdt_ident;
263 wdd->ops = &dw_wdt_ops;
264 wdd->min_timeout = 1;
265 wdd->max_hw_heartbeat_ms =
266 dw_wdt_top_in_seconds(dw_wdt, DW_WDT_MAX_TOP) * 1000;
267 wdd->parent = dev;
268
269 watchdog_set_drvdata(wdd, dw_wdt);
270 watchdog_set_nowayout(wdd, nowayout);
271 watchdog_init_timeout(wdd, 0, dev);
272
273 /*
274 * If the watchdog is already running, use its already configured
275 * timeout. Otherwise use the default or the value provided through
276 * devicetree.
277 */
278 if (dw_wdt_is_enabled(dw_wdt)) {
279 wdd->timeout = dw_wdt_get_top(dw_wdt);
280 set_bit(WDOG_HW_RUNNING, &wdd->status);
281 } else {
282 wdd->timeout = DW_WDT_DEFAULT_SECONDS;
283 watchdog_init_timeout(wdd, 0, dev);
284 }
285
286 platform_set_drvdata(pdev, dw_wdt);
287
Guenter Roecka70dcc02017-01-04 12:27:21 -0800288 watchdog_set_restart_priority(wdd, 128);
289
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800290 ret = watchdog_register_device(wdd);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000291 if (ret)
292 goto out_disable_clk;
293
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000294 return 0;
295
296out_disable_clk:
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800297 clk_disable_unprepare(dw_wdt->clk);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000298 return ret;
299}
300
Bill Pemberton4b12b892012-11-19 13:26:24 -0500301static int dw_wdt_drv_remove(struct platform_device *pdev)
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000302{
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800303 struct dw_wdt *dw_wdt = platform_get_drvdata(pdev);
Jisheng Zhang31228f42014-09-23 15:42:12 +0800304
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800305 watchdog_unregister_device(&dw_wdt->wdd);
Steffen Trumtrar65a3b692017-05-22 10:51:39 +0200306 reset_control_assert(dw_wdt->rst);
Guenter Roeckf29a72c2016-02-28 13:12:19 -0800307 clk_disable_unprepare(dw_wdt->clk);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000308
309 return 0;
310}
311
Dinh Nguyen58e56372013-10-22 11:59:12 -0500312#ifdef CONFIG_OF
313static const struct of_device_id dw_wdt_of_match[] = {
314 { .compatible = "snps,dw-wdt", },
315 { /* sentinel */ }
316};
317MODULE_DEVICE_TABLE(of, dw_wdt_of_match);
318#endif
319
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000320static struct platform_driver dw_wdt_driver = {
321 .probe = dw_wdt_drv_probe,
Bill Pemberton82268712012-11-19 13:21:12 -0500322 .remove = dw_wdt_drv_remove,
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000323 .driver = {
324 .name = "dw_wdt",
Dinh Nguyen58e56372013-10-22 11:59:12 -0500325 .of_match_table = of_match_ptr(dw_wdt_of_match),
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000326 .pm = &dw_wdt_pm_ops,
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000327 },
328};
329
Axel Linb8ec6112011-11-29 13:56:27 +0800330module_platform_driver(dw_wdt_driver);
Jamie Ilesc9353ae2011-01-24 12:19:12 +0000331
332MODULE_AUTHOR("Jamie Iles");
333MODULE_DESCRIPTION("Synopsys DesignWare Watchdog Driver");
334MODULE_LICENSE("GPL");