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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001/* SPDX-License-Identifier: GPL-2.0 */
Takashi Iwaie3d280f2015-02-17 21:46:37 +01002/*
3 * HD-audio core stuff
4 */
5
6#ifndef __SOUND_HDAUDIO_H
7#define __SOUND_HDAUDIO_H
8
9#include <linux/device.h>
Takashi Iwai14752412015-04-14 12:15:47 +020010#include <linux/interrupt.h>
11#include <linux/timecounter.h>
12#include <sound/core.h>
13#include <sound/memalloc.h>
Takashi Iwaid068ebc2015-03-02 23:22:59 +010014#include <sound/hda_verbs.h>
Mengdong Lin98d8fc62015-05-19 22:29:30 +080015#include <drm/i915_component.h>
Takashi Iwaid068ebc2015-03-02 23:22:59 +010016
Takashi Iwai7639a062015-03-03 10:07:24 +010017/* codec node id */
18typedef u16 hda_nid_t;
19
Takashi Iwaid068ebc2015-03-02 23:22:59 +010020struct hdac_bus;
Takashi Iwai14752412015-04-14 12:15:47 +020021struct hdac_stream;
Takashi Iwaid068ebc2015-03-02 23:22:59 +010022struct hdac_device;
23struct hdac_driver;
Takashi Iwai3256be62015-02-24 14:59:42 +010024struct hdac_widget_tree;
Subhransu S. Prustyda23ac12015-09-29 13:56:10 +053025struct hda_device_id;
Takashi Iwaie3d280f2015-02-17 21:46:37 +010026
27/*
28 * exported bus type
29 */
30extern struct bus_type snd_hda_bus_type;
31
32/*
Takashi Iwai71fc4c72015-03-03 17:33:10 +010033 * generic arrays
34 */
35struct snd_array {
36 unsigned int used;
37 unsigned int alloced;
38 unsigned int elem_size;
39 unsigned int alloc_align;
40 void *list;
41};
42
43/*
Takashi Iwaie3d280f2015-02-17 21:46:37 +010044 * HD-audio codec base device
45 */
46struct hdac_device {
47 struct device dev;
48 int type;
Takashi Iwaid068ebc2015-03-02 23:22:59 +010049 struct hdac_bus *bus;
50 unsigned int addr; /* codec address */
51 struct list_head list; /* list point for bus codec_list */
Takashi Iwai7639a062015-03-03 10:07:24 +010052
53 hda_nid_t afg; /* AFG node id */
54 hda_nid_t mfg; /* MFG node id */
55
56 /* ids */
57 unsigned int vendor_id;
58 unsigned int subsystem_id;
59 unsigned int revision_id;
60 unsigned int afg_function_id;
61 unsigned int mfg_function_id;
62 unsigned int afg_unsol:1;
63 unsigned int mfg_unsol:1;
64
65 unsigned int power_caps; /* FG power caps */
66
67 const char *vendor_name; /* codec vendor name */
68 const char *chip_name; /* codec chip name */
69
Takashi Iwai058524482015-03-03 15:40:08 +010070 /* verb exec op override */
71 int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
72 unsigned int flags, unsigned int *res);
73
Takashi Iwai7639a062015-03-03 10:07:24 +010074 /* widgets */
75 unsigned int num_nodes;
76 hda_nid_t start_nid, end_nid;
77
78 /* misc flags */
79 atomic_t in_pm; /* suspend/resume being performed */
Mengdong Lina5e7e072015-04-29 17:43:20 +080080 bool link_power_control:1;
Takashi Iwai3256be62015-02-24 14:59:42 +010081
82 /* sysfs */
83 struct hdac_widget_tree *widgets;
Takashi Iwai4d75faa02015-02-25 14:42:38 +010084
85 /* regmap */
86 struct regmap *regmap;
Takashi Iwai5e56bce2015-02-26 12:29:03 +010087 struct snd_array vendor_verbs;
Takashi Iwai4d75faa02015-02-25 14:42:38 +010088 bool lazy_cache:1; /* don't wake up for writes */
Takashi Iwaifaa75f82015-02-26 08:54:56 +010089 bool caps_overwriting:1; /* caps overwrite being in process */
Takashi Iwai40ba66a2015-03-13 15:56:25 +010090 bool cache_coef:1; /* cache COEF read/write too */
Takashi Iwaie3d280f2015-02-17 21:46:37 +010091};
92
93/* device/driver type used for matching */
94enum {
95 HDA_DEV_CORE,
96 HDA_DEV_LEGACY,
Ramesh Babuc1cc18b2015-04-17 17:58:57 +053097 HDA_DEV_ASOC,
Takashi Iwaie3d280f2015-02-17 21:46:37 +010098};
99
Takashi Iwai7639a062015-03-03 10:07:24 +0100100/* direction */
101enum {
102 HDA_INPUT, HDA_OUTPUT
103};
104
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100105#define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev)
106
Takashi Iwai7639a062015-03-03 10:07:24 +0100107int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
108 const char *name, unsigned int addr);
109void snd_hdac_device_exit(struct hdac_device *dev);
Takashi Iwai3256be62015-02-24 14:59:42 +0100110int snd_hdac_device_register(struct hdac_device *codec);
111void snd_hdac_device_unregister(struct hdac_device *codec);
Takashi Iwaided255b2015-10-01 17:59:43 +0200112int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name);
Takashi Iwai4f9e0c32015-10-16 11:35:49 +0200113int snd_hdac_codec_modalias(struct hdac_device *hdac, char *buf, size_t size);
Takashi Iwai7639a062015-03-03 10:07:24 +0100114
Takashi Iwai9780ded2017-10-18 15:51:59 +0200115int snd_hdac_refresh_widgets(struct hdac_device *codec, bool sysfs);
Takashi Iwai7639a062015-03-03 10:07:24 +0100116
117unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid,
118 unsigned int verb, unsigned int parm);
Takashi Iwai058524482015-03-03 15:40:08 +0100119int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd,
120 unsigned int flags, unsigned int *res);
Takashi Iwai7639a062015-03-03 10:07:24 +0100121int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
122 unsigned int verb, unsigned int parm, unsigned int *res);
Takashi Iwai01ed3c02015-02-26 13:57:47 +0100123int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
124 unsigned int *res);
Takashi Iwai9ba17b42015-03-03 23:29:47 +0100125int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
126 int parm);
Takashi Iwaifaa75f82015-02-26 08:54:56 +0100127int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
128 unsigned int parm, unsigned int val);
Takashi Iwai7639a062015-03-03 10:07:24 +0100129int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
130 hda_nid_t *conn_list, int max_conns);
131int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
132 hda_nid_t *start_id);
Takashi Iwaib7d023e2015-04-16 08:19:06 +0200133unsigned int snd_hdac_calc_stream_format(unsigned int rate,
134 unsigned int channels,
135 unsigned int format,
136 unsigned int maxbps,
137 unsigned short spdif_ctls);
138int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid,
139 u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
140bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid,
141 unsigned int format);
Takashi Iwai7639a062015-03-03 10:07:24 +0100142
Subhransu S. Prusty1b5e6162015-10-08 09:48:05 +0100143int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid,
144 int flags, unsigned int verb, unsigned int parm);
145int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid,
146 int flags, unsigned int verb, unsigned int parm);
147bool snd_hdac_check_power_state(struct hdac_device *hdac,
148 hda_nid_t nid, unsigned int target_state);
Abhijeet Kumar09787492018-01-23 23:00:51 +0530149unsigned int snd_hdac_sync_power_state(struct hdac_device *hdac,
150 hda_nid_t nid, unsigned int target_state);
Takashi Iwai01ed3c02015-02-26 13:57:47 +0100151/**
152 * snd_hdac_read_parm - read a codec parameter
153 * @codec: the codec object
154 * @nid: NID to read a parameter
155 * @parm: parameter to read
156 *
157 * Returns -1 for error. If you need to distinguish the error more
158 * strictly, use _snd_hdac_read_parm() directly.
159 */
160static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
161 int parm)
162{
163 unsigned int val;
164
165 return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
166}
167
Takashi Iwai7639a062015-03-03 10:07:24 +0100168#ifdef CONFIG_PM
Takashi Iwaifbce23a02015-07-17 16:27:33 +0200169int snd_hdac_power_up(struct hdac_device *codec);
170int snd_hdac_power_down(struct hdac_device *codec);
171int snd_hdac_power_up_pm(struct hdac_device *codec);
172int snd_hdac_power_down_pm(struct hdac_device *codec);
Takashi Iwaifc4f0002016-03-04 11:34:18 +0100173int snd_hdac_keep_power_up(struct hdac_device *codec);
Takashi Iwai7639a062015-03-03 10:07:24 +0100174#else
Takashi Iwaifbce23a02015-07-17 16:27:33 +0200175static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; }
176static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; }
177static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; }
178static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; }
Takashi Iwaifc4f0002016-03-04 11:34:18 +0100179static inline int snd_hdac_keep_power_up(struct hdac_device *codec) { return 0; }
Takashi Iwai7639a062015-03-03 10:07:24 +0100180#endif
181
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100182/*
183 * HD-audio codec base driver
184 */
185struct hdac_driver {
186 struct device_driver driver;
187 int type;
Vinod Koulec71efc2015-06-03 12:24:31 +0530188 const struct hda_device_id *id_table;
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100189 int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100190 void (*unsol_event)(struct hdac_device *dev, unsigned int event);
Rakesh Ughrejae1df9312018-06-01 22:53:51 -0500191
192 /* fields used by ext bus APIs */
193 int (*probe)(struct hdac_device *dev);
194 int (*remove)(struct hdac_device *dev);
195 void (*shutdown)(struct hdac_device *dev);
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100196};
197
198#define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
199
Vinod Koulec71efc2015-06-03 12:24:31 +0530200const struct hda_device_id *
201hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv);
202
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100203/*
Takashi Iwai14752412015-04-14 12:15:47 +0200204 * Bus verb operators
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100205 */
206struct hdac_bus_ops {
207 /* send a single command */
208 int (*command)(struct hdac_bus *bus, unsigned int cmd);
209 /* get a response from the last command */
210 int (*get_response)(struct hdac_bus *bus, unsigned int addr,
211 unsigned int *res);
Mengdong Lina5e7e072015-04-29 17:43:20 +0800212 /* control the link power */
213 int (*link_power)(struct hdac_bus *bus, bool enable);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100214};
215
Takashi Iwai14752412015-04-14 12:15:47 +0200216/*
Rakesh Ughrejacb04ba32018-06-01 22:53:58 -0500217 * ops used for ASoC HDA codec drivers
218 */
219struct hdac_ext_bus_ops {
220 int (*hdev_attach)(struct hdac_device *hdev);
221 int (*hdev_detach)(struct hdac_device *hdev);
222};
223
224/*
Takashi Iwai14752412015-04-14 12:15:47 +0200225 * Lowlevel I/O operators
226 */
227struct hdac_io_ops {
228 /* mapped register accesses */
229 void (*reg_writel)(u32 value, u32 __iomem *addr);
230 u32 (*reg_readl)(u32 __iomem *addr);
231 void (*reg_writew)(u16 value, u16 __iomem *addr);
232 u16 (*reg_readw)(u16 __iomem *addr);
233 void (*reg_writeb)(u8 value, u8 __iomem *addr);
234 u8 (*reg_readb)(u8 __iomem *addr);
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200235 /* Allocation ops */
236 int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size,
237 struct snd_dma_buffer *buf);
238 void (*dma_free_pages)(struct hdac_bus *bus,
239 struct snd_dma_buffer *buf);
Takashi Iwai14752412015-04-14 12:15:47 +0200240};
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100241
Takashi Iwai14752412015-04-14 12:15:47 +0200242#define HDA_UNSOL_QUEUE_SIZE 64
243#define HDA_MAX_CODECS 8 /* limit by controller side */
244
Takashi Iwai14752412015-04-14 12:15:47 +0200245/*
246 * CORB/RIRB
247 *
248 * Each CORB entry is 4byte, RIRB is 8byte
249 */
250struct hdac_rb {
251 __le32 *buf; /* virtual address of CORB/RIRB buffer */
252 dma_addr_t addr; /* physical address of CORB/RIRB buffer */
253 unsigned short rp, wp; /* RIRB read/write pointers */
254 int cmds[HDA_MAX_CODECS]; /* number of pending requests */
255 u32 res[HDA_MAX_CODECS]; /* last read value */
256};
257
258/*
259 * HD-audio bus base driver
Vinod Koul6720b382016-08-04 15:46:00 +0530260 *
261 * @ppcap: pp capabilities pointer
262 * @spbcap: SPIB capabilities pointer
263 * @mlcap: MultiLink capabilities pointer
264 * @gtscap: gts capabilities pointer
265 * @drsmcap: dma resume capabilities pointer
Rakesh Ughreja76f56fa2018-06-01 22:53:50 -0500266 * @num_streams: streams supported
267 * @idx: HDA link index
268 * @hlink_list: link list of HDA links
269 * @lock: lock for link mgmt
270 * @cmd_dma_state: state of cmd DMAs: CORB and RIRB
Takashi Iwai14752412015-04-14 12:15:47 +0200271 */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100272struct hdac_bus {
273 struct device *dev;
274 const struct hdac_bus_ops *ops;
Takashi Iwai14752412015-04-14 12:15:47 +0200275 const struct hdac_io_ops *io_ops;
Rakesh Ughrejacb04ba32018-06-01 22:53:58 -0500276 const struct hdac_ext_bus_ops *ext_ops;
Takashi Iwai14752412015-04-14 12:15:47 +0200277
278 /* h/w resources */
279 unsigned long addr;
280 void __iomem *remap_addr;
281 int irq;
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100282
Vinod Koul6720b382016-08-04 15:46:00 +0530283 void __iomem *ppcap;
284 void __iomem *spbcap;
285 void __iomem *mlcap;
286 void __iomem *gtscap;
287 void __iomem *drsmcap;
288
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100289 /* codec linked list */
290 struct list_head codec_list;
291 unsigned int num_codecs;
292
293 /* link caddr -> codec */
294 struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
295
296 /* unsolicited event queue */
297 u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
298 unsigned int unsol_rp, unsol_wp;
299 struct work_struct unsol_work;
300
Takashi Iwai14752412015-04-14 12:15:47 +0200301 /* bit flags of detected codecs */
302 unsigned long codec_mask;
303
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100304 /* bit flags of powered codecs */
305 unsigned long codec_powered;
306
Takashi Iwai14752412015-04-14 12:15:47 +0200307 /* CORB/RIRB */
308 struct hdac_rb corb;
309 struct hdac_rb rirb;
310 unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */
311
312 /* CORB/RIRB and position buffers */
313 struct snd_dma_buffer rb;
314 struct snd_dma_buffer posbuf;
315
316 /* hdac_stream linked list */
317 struct list_head stream_list;
318
319 /* operation state */
320 bool chip_init:1; /* h/w initialized */
321
322 /* behavior flags */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100323 bool sync_write:1; /* sync after verb write */
Takashi Iwai14752412015-04-14 12:15:47 +0200324 bool use_posbuf:1; /* use position buffer */
325 bool snoop:1; /* enable snooping */
326 bool align_bdle_4k:1; /* BDLE align 4K boundary */
327 bool reverse_assign:1; /* assign devices in reverse order */
328 bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
329
330 int bdl_pos_adj; /* BDL position adjustment */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100331
332 /* locks */
Takashi Iwai14752412015-04-14 12:15:47 +0200333 spinlock_t reg_lock;
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100334 struct mutex cmd_mutex;
Mengdong Lin98d8fc62015-05-19 22:29:30 +0800335
Takashi Iwaiae891ab2018-07-11 15:17:22 +0200336 /* DRM component interface */
337 struct drm_audio_component *audio_component;
338 int drm_power_refcount;
Rakesh Ughreja76f56fa2018-06-01 22:53:50 -0500339
340 /* parameters required for enhanced capabilities */
341 int num_streams;
342 int idx;
343
344 struct list_head hlink_list;
345
346 struct mutex lock;
347 bool cmd_dma_state;
348
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100349};
350
351int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
Takashi Iwai14752412015-04-14 12:15:47 +0200352 const struct hdac_bus_ops *ops,
353 const struct hdac_io_ops *io_ops);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100354void snd_hdac_bus_exit(struct hdac_bus *bus);
355int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
356 unsigned int cmd, unsigned int *res);
357int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
358 unsigned int cmd, unsigned int *res);
359void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex);
360
361int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec);
362void snd_hdac_bus_remove_device(struct hdac_bus *bus,
363 struct hdac_device *codec);
364
Takashi Iwai7639a062015-03-03 10:07:24 +0100365static inline void snd_hdac_codec_link_up(struct hdac_device *codec)
366{
367 set_bit(codec->addr, &codec->bus->codec_powered);
368}
369
370static inline void snd_hdac_codec_link_down(struct hdac_device *codec)
371{
372 clear_bit(codec->addr, &codec->bus->codec_powered);
373}
374
Takashi Iwai14752412015-04-14 12:15:47 +0200375int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
376int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
377 unsigned int *res);
Vinod Koul6720b382016-08-04 15:46:00 +0530378int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus);
Mengdong Lina5e7e072015-04-29 17:43:20 +0800379int snd_hdac_link_power(struct hdac_device *codec, bool enable);
Takashi Iwai14752412015-04-14 12:15:47 +0200380
381bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
382void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
383void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
384void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
385void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
386void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
Yu Zhao75383f82018-09-11 15:15:16 -0600387int snd_hdac_bus_reset_link(struct hdac_bus *bus, bool full_reset);
Takashi Iwai14752412015-04-14 12:15:47 +0200388
389void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
Takashi Iwai473f4142016-02-23 15:54:47 +0100390int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
Takashi Iwai14752412015-04-14 12:15:47 +0200391 void (*ack)(struct hdac_bus *,
392 struct hdac_stream *));
393
Jeeja KP304dad32015-04-12 18:06:13 +0530394int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
395void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
396
Takashi Iwai14752412015-04-14 12:15:47 +0200397/*
398 * macros for easy use
399 */
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200400#define _snd_hdac_chip_writeb(chip, reg, value) \
401 ((chip)->io_ops->reg_writeb(value, (chip)->remap_addr + (reg)))
402#define _snd_hdac_chip_readb(chip, reg) \
403 ((chip)->io_ops->reg_readb((chip)->remap_addr + (reg)))
404#define _snd_hdac_chip_writew(chip, reg, value) \
405 ((chip)->io_ops->reg_writew(value, (chip)->remap_addr + (reg)))
406#define _snd_hdac_chip_readw(chip, reg) \
407 ((chip)->io_ops->reg_readw((chip)->remap_addr + (reg)))
408#define _snd_hdac_chip_writel(chip, reg, value) \
409 ((chip)->io_ops->reg_writel(value, (chip)->remap_addr + (reg)))
410#define _snd_hdac_chip_readl(chip, reg) \
411 ((chip)->io_ops->reg_readl((chip)->remap_addr + (reg)))
Takashi Iwai14752412015-04-14 12:15:47 +0200412
413/* read/write a register, pass without AZX_REG_ prefix */
414#define snd_hdac_chip_writel(chip, reg, value) \
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200415 _snd_hdac_chip_writel(chip, AZX_REG_ ## reg, value)
Takashi Iwai14752412015-04-14 12:15:47 +0200416#define snd_hdac_chip_writew(chip, reg, value) \
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200417 _snd_hdac_chip_writew(chip, AZX_REG_ ## reg, value)
Takashi Iwai14752412015-04-14 12:15:47 +0200418#define snd_hdac_chip_writeb(chip, reg, value) \
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200419 _snd_hdac_chip_writeb(chip, AZX_REG_ ## reg, value)
Takashi Iwai14752412015-04-14 12:15:47 +0200420#define snd_hdac_chip_readl(chip, reg) \
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200421 _snd_hdac_chip_readl(chip, AZX_REG_ ## reg)
Takashi Iwai14752412015-04-14 12:15:47 +0200422#define snd_hdac_chip_readw(chip, reg) \
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200423 _snd_hdac_chip_readw(chip, AZX_REG_ ## reg)
Takashi Iwai14752412015-04-14 12:15:47 +0200424#define snd_hdac_chip_readb(chip, reg) \
Takashi Iwai2c1f8132017-03-29 08:27:15 +0200425 _snd_hdac_chip_readb(chip, AZX_REG_ ## reg)
Takashi Iwai14752412015-04-14 12:15:47 +0200426
427/* update a register, pass without AZX_REG_ prefix */
428#define snd_hdac_chip_updatel(chip, reg, mask, val) \
429 snd_hdac_chip_writel(chip, reg, \
430 (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
431#define snd_hdac_chip_updatew(chip, reg, mask, val) \
432 snd_hdac_chip_writew(chip, reg, \
433 (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
434#define snd_hdac_chip_updateb(chip, reg, mask, val) \
435 snd_hdac_chip_writeb(chip, reg, \
436 (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
437
438/*
439 * HD-audio stream
440 */
441struct hdac_stream {
442 struct hdac_bus *bus;
443 struct snd_dma_buffer bdl; /* BDL buffer */
444 __le32 *posbuf; /* position buffer pointer */
445 int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */
446
447 unsigned int bufsize; /* size of the play buffer in bytes */
448 unsigned int period_bytes; /* size of the period in bytes */
449 unsigned int frags; /* number for period in the play buffer */
450 unsigned int fifo_size; /* FIFO size */
451
452 void __iomem *sd_addr; /* stream descriptor pointer */
453
454 u32 sd_int_sta_mask; /* stream int status mask */
455
456 /* pcm support */
457 struct snd_pcm_substream *substream; /* assigned substream,
458 * set in PCM open
459 */
460 unsigned int format_val; /* format value to be set in the
461 * controller and the codec
462 */
463 unsigned char stream_tag; /* assigned stream */
464 unsigned char index; /* stream index */
465 int assigned_key; /* last device# key assigned to */
466
467 bool opened:1;
468 bool running:1;
Takashi Iwai6d23c8f2015-04-17 13:34:30 +0200469 bool prepared:1;
Takashi Iwai14752412015-04-14 12:15:47 +0200470 bool no_period_wakeup:1;
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200471 bool locked:1;
Takashi Iwai14752412015-04-14 12:15:47 +0200472
473 /* timestamp */
474 unsigned long start_wallclk; /* start + minimum wallclk */
475 unsigned long period_wallclk; /* wallclk for period */
476 struct timecounter tc;
477 struct cyclecounter cc;
478 int delay_negative_threshold;
479
480 struct list_head list;
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200481#ifdef CONFIG_SND_HDA_DSP_LOADER
482 /* DSP access mutex */
483 struct mutex dsp_mutex;
484#endif
Takashi Iwai14752412015-04-14 12:15:47 +0200485};
486
487void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
488 int idx, int direction, int tag);
489struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
490 struct snd_pcm_substream *substream);
491void snd_hdac_stream_release(struct hdac_stream *azx_dev);
Jeeja KP4308c9b2015-08-23 11:52:51 +0530492struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus,
493 int dir, int stream_tag);
Takashi Iwai14752412015-04-14 12:15:47 +0200494
495int snd_hdac_stream_setup(struct hdac_stream *azx_dev);
496void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
497int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
Jeeja KP86f65012015-04-17 17:58:58 +0530498int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
499 unsigned int format_val);
Takashi Iwai14752412015-04-14 12:15:47 +0200500void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
501void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
502void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
503void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
504void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
505 unsigned int streams, unsigned int reg);
506void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
507 unsigned int streams);
508void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
509 unsigned int streams);
510/*
511 * macros for easy use
512 */
513#define _snd_hdac_stream_write(type, dev, reg, value) \
514 ((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg)))
515#define _snd_hdac_stream_read(type, dev, reg) \
516 ((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg)))
517
518/* read/write a register, pass without AZX_REG_ prefix */
519#define snd_hdac_stream_writel(dev, reg, value) \
520 _snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value)
521#define snd_hdac_stream_writew(dev, reg, value) \
522 _snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value)
523#define snd_hdac_stream_writeb(dev, reg, value) \
524 _snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value)
525#define snd_hdac_stream_readl(dev, reg) \
526 _snd_hdac_stream_read(l, dev, AZX_REG_ ## reg)
527#define snd_hdac_stream_readw(dev, reg) \
528 _snd_hdac_stream_read(w, dev, AZX_REG_ ## reg)
529#define snd_hdac_stream_readb(dev, reg) \
530 _snd_hdac_stream_read(b, dev, AZX_REG_ ## reg)
531
532/* update a register, pass without AZX_REG_ prefix */
533#define snd_hdac_stream_updatel(dev, reg, mask, val) \
534 snd_hdac_stream_writel(dev, reg, \
535 (snd_hdac_stream_readl(dev, reg) & \
536 ~(mask)) | (val))
537#define snd_hdac_stream_updatew(dev, reg, mask, val) \
538 snd_hdac_stream_writew(dev, reg, \
539 (snd_hdac_stream_readw(dev, reg) & \
540 ~(mask)) | (val))
541#define snd_hdac_stream_updateb(dev, reg, mask, val) \
542 snd_hdac_stream_writeb(dev, reg, \
543 (snd_hdac_stream_readb(dev, reg) & \
544 ~(mask)) | (val))
545
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200546#ifdef CONFIG_SND_HDA_DSP_LOADER
547/* DSP lock helpers */
548#define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex)
549#define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex)
550#define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex)
551#define snd_hdac_stream_is_locked(dev) ((dev)->locked)
552/* DSP loader helpers */
553int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
554 unsigned int byte_size, struct snd_dma_buffer *bufp);
555void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start);
556void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
557 struct snd_dma_buffer *dmab);
558#else /* CONFIG_SND_HDA_DSP_LOADER */
559#define snd_hdac_dsp_lock_init(dev) do {} while (0)
560#define snd_hdac_dsp_lock(dev) do {} while (0)
561#define snd_hdac_dsp_unlock(dev) do {} while (0)
562#define snd_hdac_stream_is_locked(dev) 0
563
564static inline int
565snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
566 unsigned int byte_size, struct snd_dma_buffer *bufp)
567{
568 return 0;
569}
570
571static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
572{
573}
574
575static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
576 struct snd_dma_buffer *dmab)
577{
578}
579#endif /* CONFIG_SND_HDA_DSP_LOADER */
580
581
Takashi Iwai71fc4c72015-03-03 17:33:10 +0100582/*
583 * generic array helpers
584 */
585void *snd_array_new(struct snd_array *array);
586void snd_array_free(struct snd_array *array);
587static inline void snd_array_init(struct snd_array *array, unsigned int size,
588 unsigned int align)
589{
590 array->elem_size = size;
591 array->alloc_align = align;
592}
593
594static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
595{
596 return array->list + idx * array->elem_size;
597}
598
599static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
600{
601 return (unsigned long)(ptr - array->list) / array->elem_size;
602}
603
Takashi Iwaia9c2dfc2018-04-23 17:24:56 +0200604/* a helper macro to iterate for each snd_array element */
605#define snd_array_for_each(array, idx, ptr) \
606 for ((idx) = 0, (ptr) = (array)->list; (idx) < (array)->used; \
607 (ptr) = snd_array_elem(array, ++(idx)))
608
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100609#endif /* __SOUND_HDAUDIO_H */