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Takashi Iwaie3d280f2015-02-17 21:46:37 +01001/*
2 * HD-audio core stuff
3 */
4
5#ifndef __SOUND_HDAUDIO_H
6#define __SOUND_HDAUDIO_H
7
8#include <linux/device.h>
Takashi Iwai14752412015-04-14 12:15:47 +02009#include <linux/interrupt.h>
10#include <linux/timecounter.h>
11#include <sound/core.h>
12#include <sound/memalloc.h>
Takashi Iwaid068ebc2015-03-02 23:22:59 +010013#include <sound/hda_verbs.h>
Mengdong Lin98d8fc62015-05-19 22:29:30 +080014#include <drm/i915_component.h>
Takashi Iwaid068ebc2015-03-02 23:22:59 +010015
Takashi Iwai7639a062015-03-03 10:07:24 +010016/* codec node id */
17typedef u16 hda_nid_t;
18
Takashi Iwaid068ebc2015-03-02 23:22:59 +010019struct hdac_bus;
Takashi Iwai14752412015-04-14 12:15:47 +020020struct hdac_stream;
Takashi Iwaid068ebc2015-03-02 23:22:59 +010021struct hdac_device;
22struct hdac_driver;
Takashi Iwai3256be62015-02-24 14:59:42 +010023struct hdac_widget_tree;
Takashi Iwaie3d280f2015-02-17 21:46:37 +010024
25/*
26 * exported bus type
27 */
28extern struct bus_type snd_hda_bus_type;
29
30/*
Vinod Koulec71efc2015-06-03 12:24:31 +053031 * HDA device table
32 */
33struct hda_device_id {
34 __u32 vendor_id;
35 __u32 rev_id;
36 const char *name;
37 unsigned long driver_data;
38};
39
40/*
Takashi Iwai71fc4c72015-03-03 17:33:10 +010041 * generic arrays
42 */
43struct snd_array {
44 unsigned int used;
45 unsigned int alloced;
46 unsigned int elem_size;
47 unsigned int alloc_align;
48 void *list;
49};
50
51/*
Takashi Iwaie3d280f2015-02-17 21:46:37 +010052 * HD-audio codec base device
53 */
54struct hdac_device {
55 struct device dev;
56 int type;
Takashi Iwaid068ebc2015-03-02 23:22:59 +010057 struct hdac_bus *bus;
58 unsigned int addr; /* codec address */
59 struct list_head list; /* list point for bus codec_list */
Takashi Iwai7639a062015-03-03 10:07:24 +010060
61 hda_nid_t afg; /* AFG node id */
62 hda_nid_t mfg; /* MFG node id */
63
64 /* ids */
65 unsigned int vendor_id;
66 unsigned int subsystem_id;
67 unsigned int revision_id;
68 unsigned int afg_function_id;
69 unsigned int mfg_function_id;
70 unsigned int afg_unsol:1;
71 unsigned int mfg_unsol:1;
72
73 unsigned int power_caps; /* FG power caps */
74
75 const char *vendor_name; /* codec vendor name */
76 const char *chip_name; /* codec chip name */
77
Takashi Iwai058524482015-03-03 15:40:08 +010078 /* verb exec op override */
79 int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
80 unsigned int flags, unsigned int *res);
81
Takashi Iwai7639a062015-03-03 10:07:24 +010082 /* widgets */
83 unsigned int num_nodes;
84 hda_nid_t start_nid, end_nid;
85
86 /* misc flags */
87 atomic_t in_pm; /* suspend/resume being performed */
Mengdong Lina5e7e072015-04-29 17:43:20 +080088 bool link_power_control:1;
Takashi Iwai3256be62015-02-24 14:59:42 +010089
90 /* sysfs */
91 struct hdac_widget_tree *widgets;
Takashi Iwai4d75faa02015-02-25 14:42:38 +010092
93 /* regmap */
94 struct regmap *regmap;
Takashi Iwai5e56bce2015-02-26 12:29:03 +010095 struct snd_array vendor_verbs;
Takashi Iwai4d75faa02015-02-25 14:42:38 +010096 bool lazy_cache:1; /* don't wake up for writes */
Takashi Iwaifaa75f82015-02-26 08:54:56 +010097 bool caps_overwriting:1; /* caps overwrite being in process */
Takashi Iwai40ba66a2015-03-13 15:56:25 +010098 bool cache_coef:1; /* cache COEF read/write too */
Takashi Iwaie3d280f2015-02-17 21:46:37 +010099};
100
101/* device/driver type used for matching */
102enum {
103 HDA_DEV_CORE,
104 HDA_DEV_LEGACY,
Ramesh Babuc1cc18b2015-04-17 17:58:57 +0530105 HDA_DEV_ASOC,
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100106};
107
Takashi Iwai7639a062015-03-03 10:07:24 +0100108/* direction */
109enum {
110 HDA_INPUT, HDA_OUTPUT
111};
112
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100113#define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev)
114
Takashi Iwai7639a062015-03-03 10:07:24 +0100115int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
116 const char *name, unsigned int addr);
117void snd_hdac_device_exit(struct hdac_device *dev);
Takashi Iwai3256be62015-02-24 14:59:42 +0100118int snd_hdac_device_register(struct hdac_device *codec);
119void snd_hdac_device_unregister(struct hdac_device *codec);
Takashi Iwaided255b2015-10-01 17:59:43 +0200120int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name);
Takashi Iwai7639a062015-03-03 10:07:24 +0100121
122int snd_hdac_refresh_widgets(struct hdac_device *codec);
Vinod Koul18dfd792015-08-21 15:47:43 +0530123int snd_hdac_refresh_widget_sysfs(struct hdac_device *codec);
Takashi Iwai7639a062015-03-03 10:07:24 +0100124
125unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid,
126 unsigned int verb, unsigned int parm);
Takashi Iwai058524482015-03-03 15:40:08 +0100127int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd,
128 unsigned int flags, unsigned int *res);
Takashi Iwai7639a062015-03-03 10:07:24 +0100129int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
130 unsigned int verb, unsigned int parm, unsigned int *res);
Takashi Iwai01ed3c02015-02-26 13:57:47 +0100131int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
132 unsigned int *res);
Takashi Iwai9ba17b42015-03-03 23:29:47 +0100133int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
134 int parm);
Takashi Iwaifaa75f82015-02-26 08:54:56 +0100135int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
136 unsigned int parm, unsigned int val);
Takashi Iwai7639a062015-03-03 10:07:24 +0100137int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
138 hda_nid_t *conn_list, int max_conns);
139int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
140 hda_nid_t *start_id);
Takashi Iwaib7d023e2015-04-16 08:19:06 +0200141unsigned int snd_hdac_calc_stream_format(unsigned int rate,
142 unsigned int channels,
143 unsigned int format,
144 unsigned int maxbps,
145 unsigned short spdif_ctls);
146int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid,
147 u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
148bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid,
149 unsigned int format);
Takashi Iwai7639a062015-03-03 10:07:24 +0100150
Subhransu S. Prusty1b5e6162015-10-08 09:48:05 +0100151int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid,
152 int flags, unsigned int verb, unsigned int parm);
153int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid,
154 int flags, unsigned int verb, unsigned int parm);
155bool snd_hdac_check_power_state(struct hdac_device *hdac,
156 hda_nid_t nid, unsigned int target_state);
Takashi Iwai01ed3c02015-02-26 13:57:47 +0100157/**
158 * snd_hdac_read_parm - read a codec parameter
159 * @codec: the codec object
160 * @nid: NID to read a parameter
161 * @parm: parameter to read
162 *
163 * Returns -1 for error. If you need to distinguish the error more
164 * strictly, use _snd_hdac_read_parm() directly.
165 */
166static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
167 int parm)
168{
169 unsigned int val;
170
171 return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
172}
173
Takashi Iwai7639a062015-03-03 10:07:24 +0100174#ifdef CONFIG_PM
Takashi Iwaifbce23a02015-07-17 16:27:33 +0200175int snd_hdac_power_up(struct hdac_device *codec);
176int snd_hdac_power_down(struct hdac_device *codec);
177int snd_hdac_power_up_pm(struct hdac_device *codec);
178int snd_hdac_power_down_pm(struct hdac_device *codec);
Takashi Iwai7639a062015-03-03 10:07:24 +0100179#else
Takashi Iwaifbce23a02015-07-17 16:27:33 +0200180static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; }
181static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; }
182static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; }
183static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; }
Takashi Iwai7639a062015-03-03 10:07:24 +0100184#endif
185
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100186/*
187 * HD-audio codec base driver
188 */
189struct hdac_driver {
190 struct device_driver driver;
191 int type;
Vinod Koulec71efc2015-06-03 12:24:31 +0530192 const struct hda_device_id *id_table;
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100193 int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100194 void (*unsol_event)(struct hdac_device *dev, unsigned int event);
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100195};
196
197#define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
198
Vinod Koulec71efc2015-06-03 12:24:31 +0530199const struct hda_device_id *
200hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv);
201
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100202/*
Takashi Iwai14752412015-04-14 12:15:47 +0200203 * Bus verb operators
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100204 */
205struct hdac_bus_ops {
206 /* send a single command */
207 int (*command)(struct hdac_bus *bus, unsigned int cmd);
208 /* get a response from the last command */
209 int (*get_response)(struct hdac_bus *bus, unsigned int addr,
210 unsigned int *res);
Mengdong Lina5e7e072015-04-29 17:43:20 +0800211 /* control the link power */
212 int (*link_power)(struct hdac_bus *bus, bool enable);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100213};
214
Takashi Iwai14752412015-04-14 12:15:47 +0200215/*
216 * Lowlevel I/O operators
217 */
218struct hdac_io_ops {
219 /* mapped register accesses */
220 void (*reg_writel)(u32 value, u32 __iomem *addr);
221 u32 (*reg_readl)(u32 __iomem *addr);
222 void (*reg_writew)(u16 value, u16 __iomem *addr);
223 u16 (*reg_readw)(u16 __iomem *addr);
224 void (*reg_writeb)(u8 value, u8 __iomem *addr);
225 u8 (*reg_readb)(u8 __iomem *addr);
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200226 /* Allocation ops */
227 int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size,
228 struct snd_dma_buffer *buf);
229 void (*dma_free_pages)(struct hdac_bus *bus,
230 struct snd_dma_buffer *buf);
Takashi Iwai14752412015-04-14 12:15:47 +0200231};
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100232
Takashi Iwai14752412015-04-14 12:15:47 +0200233#define HDA_UNSOL_QUEUE_SIZE 64
234#define HDA_MAX_CODECS 8 /* limit by controller side */
235
236/* HD Audio class code */
237#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
238
239/*
240 * CORB/RIRB
241 *
242 * Each CORB entry is 4byte, RIRB is 8byte
243 */
244struct hdac_rb {
245 __le32 *buf; /* virtual address of CORB/RIRB buffer */
246 dma_addr_t addr; /* physical address of CORB/RIRB buffer */
247 unsigned short rp, wp; /* RIRB read/write pointers */
248 int cmds[HDA_MAX_CODECS]; /* number of pending requests */
249 u32 res[HDA_MAX_CODECS]; /* last read value */
250};
251
252/*
253 * HD-audio bus base driver
254 */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100255struct hdac_bus {
256 struct device *dev;
257 const struct hdac_bus_ops *ops;
Takashi Iwai14752412015-04-14 12:15:47 +0200258 const struct hdac_io_ops *io_ops;
259
260 /* h/w resources */
261 unsigned long addr;
262 void __iomem *remap_addr;
263 int irq;
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100264
265 /* codec linked list */
266 struct list_head codec_list;
267 unsigned int num_codecs;
268
269 /* link caddr -> codec */
270 struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
271
272 /* unsolicited event queue */
273 u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
274 unsigned int unsol_rp, unsol_wp;
275 struct work_struct unsol_work;
276
Takashi Iwai14752412015-04-14 12:15:47 +0200277 /* bit flags of detected codecs */
278 unsigned long codec_mask;
279
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100280 /* bit flags of powered codecs */
281 unsigned long codec_powered;
282
Takashi Iwai14752412015-04-14 12:15:47 +0200283 /* CORB/RIRB */
284 struct hdac_rb corb;
285 struct hdac_rb rirb;
286 unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */
287
288 /* CORB/RIRB and position buffers */
289 struct snd_dma_buffer rb;
290 struct snd_dma_buffer posbuf;
291
292 /* hdac_stream linked list */
293 struct list_head stream_list;
294
295 /* operation state */
296 bool chip_init:1; /* h/w initialized */
297
298 /* behavior flags */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100299 bool sync_write:1; /* sync after verb write */
Takashi Iwai14752412015-04-14 12:15:47 +0200300 bool use_posbuf:1; /* use position buffer */
301 bool snoop:1; /* enable snooping */
302 bool align_bdle_4k:1; /* BDLE align 4K boundary */
303 bool reverse_assign:1; /* assign devices in reverse order */
304 bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
305
306 int bdl_pos_adj; /* BDL position adjustment */
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100307
308 /* locks */
Takashi Iwai14752412015-04-14 12:15:47 +0200309 spinlock_t reg_lock;
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100310 struct mutex cmd_mutex;
Mengdong Lin98d8fc62015-05-19 22:29:30 +0800311
312 /* i915 component interface */
313 struct i915_audio_component *audio_component;
314 int i915_power_refcount;
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100315};
316
317int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
Takashi Iwai14752412015-04-14 12:15:47 +0200318 const struct hdac_bus_ops *ops,
319 const struct hdac_io_ops *io_ops);
Takashi Iwaid068ebc2015-03-02 23:22:59 +0100320void snd_hdac_bus_exit(struct hdac_bus *bus);
321int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
322 unsigned int cmd, unsigned int *res);
323int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
324 unsigned int cmd, unsigned int *res);
325void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex);
326
327int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec);
328void snd_hdac_bus_remove_device(struct hdac_bus *bus,
329 struct hdac_device *codec);
330
Takashi Iwai7639a062015-03-03 10:07:24 +0100331static inline void snd_hdac_codec_link_up(struct hdac_device *codec)
332{
333 set_bit(codec->addr, &codec->bus->codec_powered);
334}
335
336static inline void snd_hdac_codec_link_down(struct hdac_device *codec)
337{
338 clear_bit(codec->addr, &codec->bus->codec_powered);
339}
340
Takashi Iwai14752412015-04-14 12:15:47 +0200341int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
342int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
343 unsigned int *res);
Mengdong Lina5e7e072015-04-29 17:43:20 +0800344int snd_hdac_link_power(struct hdac_device *codec, bool enable);
Takashi Iwai14752412015-04-14 12:15:47 +0200345
346bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
347void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
348void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
349void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
350void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
351void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
352
353void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
354void snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
355 void (*ack)(struct hdac_bus *,
356 struct hdac_stream *));
357
Jeeja KP304dad32015-04-12 18:06:13 +0530358int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
359void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
360
Takashi Iwai14752412015-04-14 12:15:47 +0200361/*
362 * macros for easy use
363 */
364#define _snd_hdac_chip_write(type, chip, reg, value) \
365 ((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg)))
366#define _snd_hdac_chip_read(type, chip, reg) \
367 ((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg)))
368
369/* read/write a register, pass without AZX_REG_ prefix */
370#define snd_hdac_chip_writel(chip, reg, value) \
371 _snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value)
372#define snd_hdac_chip_writew(chip, reg, value) \
373 _snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value)
374#define snd_hdac_chip_writeb(chip, reg, value) \
375 _snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value)
376#define snd_hdac_chip_readl(chip, reg) \
377 _snd_hdac_chip_read(l, chip, AZX_REG_ ## reg)
378#define snd_hdac_chip_readw(chip, reg) \
379 _snd_hdac_chip_read(w, chip, AZX_REG_ ## reg)
380#define snd_hdac_chip_readb(chip, reg) \
381 _snd_hdac_chip_read(b, chip, AZX_REG_ ## reg)
382
383/* update a register, pass without AZX_REG_ prefix */
384#define snd_hdac_chip_updatel(chip, reg, mask, val) \
385 snd_hdac_chip_writel(chip, reg, \
386 (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
387#define snd_hdac_chip_updatew(chip, reg, mask, val) \
388 snd_hdac_chip_writew(chip, reg, \
389 (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
390#define snd_hdac_chip_updateb(chip, reg, mask, val) \
391 snd_hdac_chip_writeb(chip, reg, \
392 (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
393
394/*
395 * HD-audio stream
396 */
397struct hdac_stream {
398 struct hdac_bus *bus;
399 struct snd_dma_buffer bdl; /* BDL buffer */
400 __le32 *posbuf; /* position buffer pointer */
401 int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */
402
403 unsigned int bufsize; /* size of the play buffer in bytes */
404 unsigned int period_bytes; /* size of the period in bytes */
405 unsigned int frags; /* number for period in the play buffer */
406 unsigned int fifo_size; /* FIFO size */
407
408 void __iomem *sd_addr; /* stream descriptor pointer */
409
410 u32 sd_int_sta_mask; /* stream int status mask */
411
412 /* pcm support */
413 struct snd_pcm_substream *substream; /* assigned substream,
414 * set in PCM open
415 */
416 unsigned int format_val; /* format value to be set in the
417 * controller and the codec
418 */
419 unsigned char stream_tag; /* assigned stream */
420 unsigned char index; /* stream index */
421 int assigned_key; /* last device# key assigned to */
422
423 bool opened:1;
424 bool running:1;
Takashi Iwai6d23c8f2015-04-17 13:34:30 +0200425 bool prepared:1;
Takashi Iwai14752412015-04-14 12:15:47 +0200426 bool no_period_wakeup:1;
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200427 bool locked:1;
Takashi Iwai14752412015-04-14 12:15:47 +0200428
429 /* timestamp */
430 unsigned long start_wallclk; /* start + minimum wallclk */
431 unsigned long period_wallclk; /* wallclk for period */
432 struct timecounter tc;
433 struct cyclecounter cc;
434 int delay_negative_threshold;
435
436 struct list_head list;
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200437#ifdef CONFIG_SND_HDA_DSP_LOADER
438 /* DSP access mutex */
439 struct mutex dsp_mutex;
440#endif
Takashi Iwai14752412015-04-14 12:15:47 +0200441};
442
443void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
444 int idx, int direction, int tag);
445struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
446 struct snd_pcm_substream *substream);
447void snd_hdac_stream_release(struct hdac_stream *azx_dev);
Jeeja KP4308c9b2015-08-23 11:52:51 +0530448struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus,
449 int dir, int stream_tag);
Takashi Iwai14752412015-04-14 12:15:47 +0200450
451int snd_hdac_stream_setup(struct hdac_stream *azx_dev);
452void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
453int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
Jeeja KP86f65012015-04-17 17:58:58 +0530454int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
455 unsigned int format_val);
Takashi Iwai14752412015-04-14 12:15:47 +0200456void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
457void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
458void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
459void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
460void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
461 unsigned int streams, unsigned int reg);
462void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
463 unsigned int streams);
464void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
465 unsigned int streams);
466/*
467 * macros for easy use
468 */
469#define _snd_hdac_stream_write(type, dev, reg, value) \
470 ((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg)))
471#define _snd_hdac_stream_read(type, dev, reg) \
472 ((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg)))
473
474/* read/write a register, pass without AZX_REG_ prefix */
475#define snd_hdac_stream_writel(dev, reg, value) \
476 _snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value)
477#define snd_hdac_stream_writew(dev, reg, value) \
478 _snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value)
479#define snd_hdac_stream_writeb(dev, reg, value) \
480 _snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value)
481#define snd_hdac_stream_readl(dev, reg) \
482 _snd_hdac_stream_read(l, dev, AZX_REG_ ## reg)
483#define snd_hdac_stream_readw(dev, reg) \
484 _snd_hdac_stream_read(w, dev, AZX_REG_ ## reg)
485#define snd_hdac_stream_readb(dev, reg) \
486 _snd_hdac_stream_read(b, dev, AZX_REG_ ## reg)
487
488/* update a register, pass without AZX_REG_ prefix */
489#define snd_hdac_stream_updatel(dev, reg, mask, val) \
490 snd_hdac_stream_writel(dev, reg, \
491 (snd_hdac_stream_readl(dev, reg) & \
492 ~(mask)) | (val))
493#define snd_hdac_stream_updatew(dev, reg, mask, val) \
494 snd_hdac_stream_writew(dev, reg, \
495 (snd_hdac_stream_readw(dev, reg) & \
496 ~(mask)) | (val))
497#define snd_hdac_stream_updateb(dev, reg, mask, val) \
498 snd_hdac_stream_writeb(dev, reg, \
499 (snd_hdac_stream_readb(dev, reg) & \
500 ~(mask)) | (val))
501
Takashi Iwai8f3f6002015-04-14 12:53:28 +0200502#ifdef CONFIG_SND_HDA_DSP_LOADER
503/* DSP lock helpers */
504#define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex)
505#define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex)
506#define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex)
507#define snd_hdac_stream_is_locked(dev) ((dev)->locked)
508/* DSP loader helpers */
509int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
510 unsigned int byte_size, struct snd_dma_buffer *bufp);
511void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start);
512void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
513 struct snd_dma_buffer *dmab);
514#else /* CONFIG_SND_HDA_DSP_LOADER */
515#define snd_hdac_dsp_lock_init(dev) do {} while (0)
516#define snd_hdac_dsp_lock(dev) do {} while (0)
517#define snd_hdac_dsp_unlock(dev) do {} while (0)
518#define snd_hdac_stream_is_locked(dev) 0
519
520static inline int
521snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
522 unsigned int byte_size, struct snd_dma_buffer *bufp)
523{
524 return 0;
525}
526
527static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
528{
529}
530
531static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
532 struct snd_dma_buffer *dmab)
533{
534}
535#endif /* CONFIG_SND_HDA_DSP_LOADER */
536
537
Takashi Iwai71fc4c72015-03-03 17:33:10 +0100538/*
539 * generic array helpers
540 */
541void *snd_array_new(struct snd_array *array);
542void snd_array_free(struct snd_array *array);
543static inline void snd_array_init(struct snd_array *array, unsigned int size,
544 unsigned int align)
545{
546 array->elem_size = size;
547 array->alloc_align = align;
548}
549
550static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
551{
552 return array->list + idx * array->elem_size;
553}
554
555static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
556{
557 return (unsigned long)(ptr - array->list) / array->elem_size;
558}
559
Takashi Iwaie3d280f2015-02-17 21:46:37 +0100560#endif /* __SOUND_HDAUDIO_H */