blob: 7a64b3ddb40840aadf70c74595f16eb6a45fc19f [file] [log] [blame]
Thomas Gleixner5b497af2019-05-29 07:18:09 -07001/* SPDX-License-Identifier: GPL-2.0-only */
Dan Williamsb94d5232015-05-19 22:54:31 -04002/*
3 * libnvdimm - Non-volatile-memory Devices Subsystem
4 *
5 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
Dan Williamsb94d5232015-05-19 22:54:31 -04006 */
7#ifndef __LIBNVDIMM_H__
8#define __LIBNVDIMM_H__
Ross Zwisler047fc8a2015-06-25 04:21:02 -04009#include <linux/kernel.h>
Dan Williams62232e452015-06-08 14:27:06 -040010#include <linux/sizes.h>
11#include <linux/types.h>
Dan Williamsfaec6f82017-06-06 11:10:51 -070012#include <linux/uuid.h>
Dave Jiangaa9ad442017-08-23 12:48:26 -070013#include <linux/spinlock.h>
Pankaj Guptac5d43552019-07-05 19:33:22 +053014#include <linux/bio.h>
Dave Jiangaa9ad442017-08-23 12:48:26 -070015
16struct badrange_entry {
17 u64 start;
18 u64 length;
19 struct list_head list;
20};
21
22struct badrange {
23 struct list_head list;
24 spinlock_t lock;
25};
Dan Williamse6dfb2d2015-04-25 03:56:17 -040026
27enum {
28 /* when a dimm supports both PMEM and BLK access a label is required */
Dan Williams8f078b32017-05-04 14:01:24 -070029 NDD_ALIASING = 0,
Dan Williams58138822015-06-23 20:08:34 -040030 /* unarmed memory devices may not persist writes */
Dan Williams8f078b32017-05-04 14:01:24 -070031 NDD_UNARMED = 1,
32 /* locked memory devices should not be accessed */
33 NDD_LOCKED = 2,
Dave Jiang7d988092018-12-13 15:36:18 -070034 /* memory under security wipes should not be accessed */
35 NDD_SECURITY_OVERWRITE = 3,
36 /* tracking whether or not there is a pending device reference */
37 NDD_WORK_PENDING = 4,
Dan Williamsd5d30d52019-02-02 16:35:26 -080038 /* ignore / filter NSLABEL_FLAG_LOCAL for this DIMM, i.e. no aliasing */
39 NDD_NOBLK = 5,
Dan Williams62232e452015-06-08 14:27:06 -040040
41 /* need to set a limit somewhere, but yes, this is likely overkill */
42 ND_IOCTL_MAX_BUFLEN = SZ_4M,
Dan Williams4577b062016-02-17 13:08:58 -080043 ND_CMD_MAX_ELEM = 5,
Jerry Hoemann40abf9b2016-04-11 15:02:28 -070044 ND_CMD_MAX_ENVELOPE = 256,
Dan Williams1f7df6f2015-06-09 20:13:14 -040045 ND_MAX_MAPPINGS = 32,
Dan Williams1b40e092015-05-01 13:34:01 -040046
Dan Williams004f1af2015-08-24 19:20:23 -040047 /* region flag indicating to direct-map persistent memory by default */
48 ND_REGION_PAGEMAP = 0,
Dave Jiang06e8ccd2018-01-31 12:45:38 -070049 /*
50 * Platform ensures entire CPU store data path is flushed to pmem on
51 * system power loss.
52 */
53 ND_REGION_PERSIST_CACHE = 1,
Dave Jiang30e6d7b2018-01-31 12:45:43 -070054 /*
55 * Platform provides mechanisms to automatically flush outstanding
56 * write data from memory controler to pmem on system power loss.
57 * (ADR)
58 */
59 ND_REGION_PERSIST_MEMCTRL = 2,
Dan Williams004f1af2015-08-24 19:20:23 -040060
Pankaj Guptac5d43552019-07-05 19:33:22 +053061 /* Platform provides asynchronous flush mechanism */
62 ND_REGION_ASYNC = 3,
63
Dan Williams1b40e092015-05-01 13:34:01 -040064 /* mark newly adjusted resources as requiring a label update */
65 DPA_RESOURCE_ADJUSTED = 1 << 0,
Dan Williamse6dfb2d2015-04-25 03:56:17 -040066};
67
Dan Williams45def222015-04-26 19:26:48 -040068extern struct attribute_group nvdimm_bus_attribute_group;
Dan Williams62232e452015-06-08 14:27:06 -040069extern struct attribute_group nvdimm_attribute_group;
Dan Williams4d88a972015-05-31 14:41:48 -040070extern struct attribute_group nd_device_attribute_group;
Toshi Kani74ae66c2015-06-19 12:18:34 -060071extern struct attribute_group nd_numa_attribute_group;
Dan Williams1f7df6f2015-06-09 20:13:14 -040072extern struct attribute_group nd_region_attribute_group;
73extern struct attribute_group nd_mapping_attribute_group;
Dan Williams45def222015-04-26 19:26:48 -040074
Dan Williamsb94d5232015-05-19 22:54:31 -040075struct nvdimm;
76struct nvdimm_bus_descriptor;
77typedef int (*ndctl_fn)(struct nvdimm_bus_descriptor *nd_desc,
78 struct nvdimm *nvdimm, unsigned int cmd, void *buf,
Dan Williamsaef25332016-02-12 17:01:11 -080079 unsigned int buf_len, int *cmd_rc);
Dan Williamsb94d5232015-05-19 22:54:31 -040080
Oliver O'Halloran1ff19f42018-04-06 15:21:13 +100081struct device_node;
Dan Williamsb94d5232015-05-19 22:54:31 -040082struct nvdimm_bus_descriptor {
Dan Williams45def222015-04-26 19:26:48 -040083 const struct attribute_group **attr_groups;
Jerry Hoemann7db5bb32017-06-30 20:53:24 -070084 unsigned long bus_dsm_mask;
Dan Williamse3654ec2016-04-28 16:17:07 -070085 unsigned long cmd_mask;
Dan Williamsbc9775d2016-07-21 20:03:19 -070086 struct module *module;
Dan Williamsb94d5232015-05-19 22:54:31 -040087 char *provider_name;
Oliver O'Halloran1ff19f42018-04-06 15:21:13 +100088 struct device_node *of_node;
Dan Williamsb94d5232015-05-19 22:54:31 -040089 ndctl_fn ndctl;
Dan Williams7ae0fa432016-02-19 12:16:34 -080090 int (*flush_probe)(struct nvdimm_bus_descriptor *nd_desc);
Dan Williams87bf5722016-02-22 21:50:31 -080091 int (*clear_to_send)(struct nvdimm_bus_descriptor *nd_desc,
Dave Jiangb3ed2ce2018-12-04 10:31:11 -080092 struct nvdimm *nvdimm, unsigned int cmd, void *data);
Dan Williamsb94d5232015-05-19 22:54:31 -040093};
94
Dan Williams62232e452015-06-08 14:27:06 -040095struct nd_cmd_desc {
96 int in_num;
97 int out_num;
98 u32 in_sizes[ND_CMD_MAX_ELEM];
99 int out_sizes[ND_CMD_MAX_ELEM];
100};
101
Dan Williamseaf96152015-05-01 13:11:27 -0400102struct nd_interleave_set {
Dan Williamsc12c48c2017-06-04 10:59:15 +0900103 /* v1.1 definition of the interleave-set-cookie algorithm */
104 u64 cookie1;
105 /* v1.2 definition of the interleave-set-cookie algorithm */
106 u64 cookie2;
Dan Williams86ef58a2017-02-28 18:32:48 -0800107 /* compatibility with initial buggy Linux implementation */
108 u64 altcookie;
Dan Williamsfaec6f82017-06-06 11:10:51 -0700109
110 guid_t type_guid;
Dan Williamseaf96152015-05-01 13:11:27 -0400111};
112
Dan Williams44c462e2016-09-19 16:38:50 -0700113struct nd_mapping_desc {
114 struct nvdimm *nvdimm;
115 u64 start;
116 u64 size;
Dan Williams401c0a12017-08-04 17:20:16 -0700117 int position;
Dan Williams44c462e2016-09-19 16:38:50 -0700118};
119
Pankaj Guptac5d43552019-07-05 19:33:22 +0530120struct nd_region;
Dan Williams1f7df6f2015-06-09 20:13:14 -0400121struct nd_region_desc {
122 struct resource *res;
Dan Williams44c462e2016-09-19 16:38:50 -0700123 struct nd_mapping_desc *mapping;
Dan Williams1f7df6f2015-06-09 20:13:14 -0400124 u16 num_mappings;
125 const struct attribute_group **attr_groups;
Dan Williamseaf96152015-05-01 13:11:27 -0400126 struct nd_interleave_set *nd_set;
Dan Williams1f7df6f2015-06-09 20:13:14 -0400127 void *provider_data;
Vishal Verma5212e112015-06-25 04:20:32 -0400128 int num_lanes;
Toshi Kani41d7a6d2015-06-19 12:18:33 -0600129 int numa_node;
Dan Williams8fc5c732018-11-09 12:43:07 -0800130 int target_node;
Dan Williams004f1af2015-08-24 19:20:23 -0400131 unsigned long flags;
Oliver O'Halloran1ff19f42018-04-06 15:21:13 +1000132 struct device_node *of_node;
Pankaj Guptac5d43552019-07-05 19:33:22 +0530133 int (*flush)(struct nd_region *nd_region, struct bio *bio);
Dan Williams1f7df6f2015-06-09 20:13:14 -0400134};
135
Dan Williams29b9aa02016-06-06 17:42:38 -0700136struct device;
137void *devm_nvdimm_memremap(struct device *dev, resource_size_t offset,
138 size_t size, unsigned long flags);
139static inline void __iomem *devm_nvdimm_ioremap(struct device *dev,
140 resource_size_t offset, size_t size)
141{
142 return (void __iomem *) devm_nvdimm_memremap(dev, offset, size, 0);
143}
144
Dan Williams62232e452015-06-08 14:27:06 -0400145struct nvdimm_bus;
Dan Williams3d880022015-05-31 15:02:11 -0400146struct module;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400147struct device;
148struct nd_blk_region;
149struct nd_blk_region_desc {
150 int (*enable)(struct nvdimm_bus *nvdimm_bus, struct device *dev);
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400151 int (*do_io)(struct nd_blk_region *ndbr, resource_size_t dpa,
152 void *iobuf, u64 len, int rw);
153 struct nd_region_desc ndr_desc;
154};
155
156static inline struct nd_blk_region_desc *to_blk_region_desc(
157 struct nd_region_desc *ndr_desc)
158{
159 return container_of(ndr_desc, struct nd_blk_region_desc, ndr_desc);
160
161}
162
Dave Jiangf2989392018-12-05 23:39:29 -0800163enum nvdimm_security_state {
Dan Williams1cb95e02019-01-08 15:34:52 -0800164 NVDIMM_SECURITY_ERROR = -1,
Dave Jiangf2989392018-12-05 23:39:29 -0800165 NVDIMM_SECURITY_DISABLED,
166 NVDIMM_SECURITY_UNLOCKED,
167 NVDIMM_SECURITY_LOCKED,
168 NVDIMM_SECURITY_FROZEN,
169 NVDIMM_SECURITY_OVERWRITE,
170};
171
Dave Jiang4c6926a2018-12-06 12:40:01 -0800172#define NVDIMM_PASSPHRASE_LEN 32
173#define NVDIMM_KEY_DESC_LEN 22
174
175struct nvdimm_key_data {
176 u8 data[NVDIMM_PASSPHRASE_LEN];
177};
178
Dave Jiang89fa9d82018-12-10 10:53:22 -0700179enum nvdimm_passphrase_type {
180 NVDIMM_USER,
181 NVDIMM_MASTER,
182};
183
Dave Jiangf2989392018-12-05 23:39:29 -0800184struct nvdimm_security_ops {
Dave Jiang89fa9d82018-12-10 10:53:22 -0700185 enum nvdimm_security_state (*state)(struct nvdimm *nvdimm,
186 enum nvdimm_passphrase_type pass_type);
Dave Jiang37833fb2018-12-06 09:14:08 -0800187 int (*freeze)(struct nvdimm *nvdimm);
Dave Jiang4c6926a2018-12-06 12:40:01 -0800188 int (*change_key)(struct nvdimm *nvdimm,
189 const struct nvdimm_key_data *old_data,
Dave Jiang89fa9d82018-12-10 10:53:22 -0700190 const struct nvdimm_key_data *new_data,
191 enum nvdimm_passphrase_type pass_type);
Dave Jiang4c6926a2018-12-06 12:40:01 -0800192 int (*unlock)(struct nvdimm *nvdimm,
193 const struct nvdimm_key_data *key_data);
Dave Jiang03b65b22018-12-07 10:33:30 -0700194 int (*disable)(struct nvdimm *nvdimm,
195 const struct nvdimm_key_data *key_data);
Dave Jiang64e77c82018-12-07 14:02:12 -0700196 int (*erase)(struct nvdimm *nvdimm,
Dave Jiang89fa9d82018-12-10 10:53:22 -0700197 const struct nvdimm_key_data *key_data,
198 enum nvdimm_passphrase_type pass_type);
Dave Jiang7d988092018-12-13 15:36:18 -0700199 int (*overwrite)(struct nvdimm *nvdimm,
200 const struct nvdimm_key_data *key_data);
201 int (*query_overwrite)(struct nvdimm *nvdimm);
Dave Jiangf2989392018-12-05 23:39:29 -0800202};
203
Dave Jiangaa9ad442017-08-23 12:48:26 -0700204void badrange_init(struct badrange *badrange);
205int badrange_add(struct badrange *badrange, u64 addr, u64 length);
206void badrange_forget(struct badrange *badrange, phys_addr_t start,
207 unsigned int len);
208int nvdimm_bus_add_badrange(struct nvdimm_bus *nvdimm_bus, u64 addr,
209 u64 length);
Dan Williamsbc9775d2016-07-21 20:03:19 -0700210struct nvdimm_bus *nvdimm_bus_register(struct device *parent,
211 struct nvdimm_bus_descriptor *nfit_desc);
Dan Williamsb94d5232015-05-19 22:54:31 -0400212void nvdimm_bus_unregister(struct nvdimm_bus *nvdimm_bus);
Dan Williams45def222015-04-26 19:26:48 -0400213struct nvdimm_bus *to_nvdimm_bus(struct device *dev);
Dave Jiangf2989392018-12-05 23:39:29 -0800214struct nvdimm_bus *nvdimm_to_bus(struct nvdimm *nvdimm);
Dan Williamse6dfb2d2015-04-25 03:56:17 -0400215struct nvdimm *to_nvdimm(struct device *dev);
Dan Williams1f7df6f2015-06-09 20:13:14 -0400216struct nd_region *to_nd_region(struct device *dev);
Dan Williams243f29f2018-04-02 13:14:25 -0700217struct device *nd_region_dev(struct nd_region *nd_region);
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400218struct nd_blk_region *to_nd_blk_region(struct device *dev);
Dan Williams45def222015-04-26 19:26:48 -0400219struct nvdimm_bus_descriptor *to_nd_desc(struct nvdimm_bus *nvdimm_bus);
Vishal Verma37b137f2016-07-23 21:51:42 -0700220struct device *to_nvdimm_bus_dev(struct nvdimm_bus *nvdimm_bus);
Dan Williamse6dfb2d2015-04-25 03:56:17 -0400221const char *nvdimm_name(struct nvdimm *nvdimm);
Dan Williamsba9c8dd2016-08-22 19:28:37 -0700222struct kobject *nvdimm_kobj(struct nvdimm *nvdimm);
Dan Williamse3654ec2016-04-28 16:17:07 -0700223unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm);
Dan Williamse6dfb2d2015-04-25 03:56:17 -0400224void *nvdimm_provider_data(struct nvdimm *nvdimm);
Dave Jiangd6548ae2018-12-04 10:31:20 -0800225struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus,
226 void *provider_data, const struct attribute_group **groups,
227 unsigned long flags, unsigned long cmd_mask, int num_flush,
Dave Jiangf2989392018-12-05 23:39:29 -0800228 struct resource *flush_wpq, const char *dimm_id,
229 const struct nvdimm_security_ops *sec_ops);
Dave Jiangd6548ae2018-12-04 10:31:20 -0800230static inline struct nvdimm *nvdimm_create(struct nvdimm_bus *nvdimm_bus,
231 void *provider_data, const struct attribute_group **groups,
232 unsigned long flags, unsigned long cmd_mask, int num_flush,
233 struct resource *flush_wpq)
234{
235 return __nvdimm_create(nvdimm_bus, provider_data, groups, flags,
Dave Jiangf2989392018-12-05 23:39:29 -0800236 cmd_mask, num_flush, flush_wpq, NULL, NULL);
Dave Jiangd6548ae2018-12-04 10:31:20 -0800237}
238
Dan Williams62232e452015-06-08 14:27:06 -0400239const struct nd_cmd_desc *nd_cmd_dimm_desc(int cmd);
240const struct nd_cmd_desc *nd_cmd_bus_desc(int cmd);
241u32 nd_cmd_in_size(struct nvdimm *nvdimm, int cmd,
242 const struct nd_cmd_desc *desc, int idx, void *buf);
243u32 nd_cmd_out_size(struct nvdimm *nvdimm, int cmd,
244 const struct nd_cmd_desc *desc, int idx, const u32 *in_field,
Dan Williamsefda1b5d2016-12-06 09:10:12 -0800245 const u32 *out_field, unsigned long remainder);
Dan Williams4d88a972015-05-31 14:41:48 -0400246int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count);
Dan Williams1f7df6f2015-06-09 20:13:14 -0400247struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
248 struct nd_region_desc *ndr_desc);
249struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
250 struct nd_region_desc *ndr_desc);
251struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
252 struct nd_region_desc *ndr_desc);
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400253void *nd_region_provider_data(struct nd_region *nd_region);
254void *nd_blk_region_provider_data(struct nd_blk_region *ndbr);
255void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data);
256struct nvdimm *nd_blk_region_to_dimm(struct nd_blk_region *ndbr);
Dan Williamsca6a4652017-01-13 20:36:58 -0800257unsigned long nd_blk_memremap_flags(struct nd_blk_region *ndbr);
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400258unsigned int nd_region_acquire_lane(struct nd_region *nd_region);
259void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane);
Dan Williamseaf96152015-05-01 13:11:27 -0400260u64 nd_fletcher64(void *addr, size_t len, bool le);
Pankaj Guptac5d43552019-07-05 19:33:22 +0530261int nvdimm_flush(struct nd_region *nd_region, struct bio *bio);
262int generic_nvdimm_flush(struct nd_region *nd_region);
Dan Williamsf284a4f2016-07-07 19:44:50 -0700263int nvdimm_has_flush(struct nd_region *nd_region);
Dan Williams0b277962017-06-09 09:46:50 -0700264int nvdimm_has_cache(struct nd_region *nd_region);
Dave Jiang7d988092018-12-13 15:36:18 -0700265int nvdimm_in_overwrite(struct nvdimm *nvdimm);
Pankaj Guptafefc1d92019-07-05 19:33:24 +0530266bool is_nvdimm_sync(struct nd_region *nd_region);
Robin Murphy5deb67f2017-08-31 12:27:09 +0100267
Dave Jiangf2989392018-12-05 23:39:29 -0800268static inline int nvdimm_ctl(struct nvdimm *nvdimm, unsigned int cmd, void *buf,
269 unsigned int buf_len, int *cmd_rc)
270{
271 struct nvdimm_bus *nvdimm_bus = nvdimm_to_bus(nvdimm);
272 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
273
274 return nd_desc->ndctl(nd_desc, nvdimm, cmd, buf, buf_len, cmd_rc);
275}
276
Robin Murphy5deb67f2017-08-31 12:27:09 +0100277#ifdef CONFIG_ARCH_HAS_PMEM_API
278#define ARCH_MEMREMAP_PMEM MEMREMAP_WB
279void arch_wb_cache_pmem(void *addr, size_t size);
280void arch_invalidate_pmem(void *addr, size_t size);
281#else
282#define ARCH_MEMREMAP_PMEM MEMREMAP_WT
283static inline void arch_wb_cache_pmem(void *addr, size_t size)
284{
285}
286static inline void arch_invalidate_pmem(void *addr, size_t size)
287{
288}
289#endif
290
Dan Williamsb94d5232015-05-19 22:54:31 -0400291#endif /* __LIBNVDIMM_H__ */