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Bjorn Helgaas7328c8f2018-01-26 11:45:16 -06001// SPDX-License-Identifier: GPL-2.0
Linus Torvalds1da177e2005-04-16 15:20:36 -07002/*
Bjorn Helgaasdf62ab52018-03-09 16:36:33 -06003 * Support routines for initializing a PCI subsystem
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 *
5 * Extruded from code written by
6 * Dave Rusling (david.rusling@reo.mts.dec.com)
7 * David Mosberger (davidm@cs.arizona.edu)
8 * David Miller (davem@redhat.com)
9 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070010 * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
11 * PCI-PCI bridges cleanup, sorted resource allocation.
12 * Feb 2002, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
13 * Converted to allocation in 3 passes, which gives
14 * tighter packing. Prefetchable range support.
15 */
16
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/pci.h>
21#include <linux/errno.h>
22#include <linux/ioport.h>
23#include <linux/cache.h>
24#include <linux/slab.h>
Rui Wang584c5c42016-08-17 16:00:34 +080025#include <linux/acpi.h>
Chris Wright6faf17f2009-08-28 13:00:06 -070026#include "pci.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Bjorn Helgaas844393f2012-02-23 20:18:59 -070028unsigned int pci_flags;
Bjorn Helgaas47087702012-02-23 14:29:23 -070029
Yinghai Lubdc4abe2012-01-21 02:08:27 -080030struct pci_dev_resource {
31 struct list_head list;
Yinghai Lu2934a0d2012-01-21 02:08:26 -080032 struct resource *res;
33 struct pci_dev *dev;
Yinghai Lu568ddef2010-01-22 01:02:21 -080034 resource_size_t start;
35 resource_size_t end;
Ram Paic8adf9a2011-02-14 17:43:20 -080036 resource_size_t add_size;
Ram Pai2bbc6942011-07-25 13:08:39 -070037 resource_size_t min_align;
Yinghai Lu568ddef2010-01-22 01:02:21 -080038 unsigned long flags;
39};
40
Yinghai Lubffc56d2012-01-21 02:08:30 -080041static void free_list(struct list_head *head)
42{
43 struct pci_dev_resource *dev_res, *tmp;
44
45 list_for_each_entry_safe(dev_res, tmp, head, list) {
46 list_del(&dev_res->list);
47 kfree(dev_res);
48 }
49}
Ram Pai094732a2011-02-14 17:43:18 -080050
Ram Paic8adf9a2011-02-14 17:43:20 -080051/**
Nicholas Johnson0d607612019-05-07 14:51:24 -050052 * add_to_list() - Add a new resource tracker to the list
Ram Paic8adf9a2011-02-14 17:43:20 -080053 * @head: Head of the list
Nicholas Johnson0d607612019-05-07 14:51:24 -050054 * @dev: Device to which the resource belongs
55 * @res: Resource to be tracked
56 * @add_size: Additional size to be optionally added to the resource
Ram Paic8adf9a2011-02-14 17:43:20 -080057 */
Nicholas Johnson0d607612019-05-07 14:51:24 -050058static int add_to_list(struct list_head *head, struct pci_dev *dev,
59 struct resource *res, resource_size_t add_size,
60 resource_size_t min_align)
Yinghai Lu568ddef2010-01-22 01:02:21 -080061{
Yinghai Lu764242a2012-01-21 02:08:28 -080062 struct pci_dev_resource *tmp;
Yinghai Lu568ddef2010-01-22 01:02:21 -080063
Yinghai Lubdc4abe2012-01-21 02:08:27 -080064 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
Markus Elfringc7abb232017-12-29 12:15:16 +010065 if (!tmp)
Yinghai Luef62dfe2012-01-21 02:08:18 -080066 return -ENOMEM;
Yinghai Lu568ddef2010-01-22 01:02:21 -080067
Yinghai Lu568ddef2010-01-22 01:02:21 -080068 tmp->res = res;
69 tmp->dev = dev;
70 tmp->start = res->start;
71 tmp->end = res->end;
72 tmp->flags = res->flags;
Ram Paic8adf9a2011-02-14 17:43:20 -080073 tmp->add_size = add_size;
Ram Pai2bbc6942011-07-25 13:08:39 -070074 tmp->min_align = min_align;
Yinghai Lubdc4abe2012-01-21 02:08:27 -080075
76 list_add(&tmp->list, head);
Yinghai Luef62dfe2012-01-21 02:08:18 -080077
78 return 0;
Yinghai Lu568ddef2010-01-22 01:02:21 -080079}
80
Nicholas Johnson0d607612019-05-07 14:51:24 -050081static void remove_from_list(struct list_head *head, struct resource *res)
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080082{
Yinghai Lub9b0bba2012-01-21 02:08:29 -080083 struct pci_dev_resource *dev_res, *tmp;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080084
Yinghai Lub9b0bba2012-01-21 02:08:29 -080085 list_for_each_entry_safe(dev_res, tmp, head, list) {
86 if (dev_res->res == res) {
87 list_del(&dev_res->list);
88 kfree(dev_res);
Yinghai Lubdc4abe2012-01-21 02:08:27 -080089 break;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080090 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080091 }
92}
93
Wei Yangd74b9022015-03-25 16:23:51 +080094static struct pci_dev_resource *res_to_dev_res(struct list_head *head,
95 struct resource *res)
Yinghai Lu1c372352012-01-21 02:08:19 -080096{
Yinghai Lub9b0bba2012-01-21 02:08:29 -080097 struct pci_dev_resource *dev_res;
Yinghai Lu1c372352012-01-21 02:08:19 -080098
Yinghai Lub9b0bba2012-01-21 02:08:29 -080099 list_for_each_entry(dev_res, head, list) {
Bjorn Helgaas25e77382016-12-29 11:27:52 -0600100 if (dev_res->res == res)
Wei Yangd74b9022015-03-25 16:23:51 +0800101 return dev_res;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800102 }
Yinghai Lu1c372352012-01-21 02:08:19 -0800103
Wei Yangd74b9022015-03-25 16:23:51 +0800104 return NULL;
Yinghai Lu1c372352012-01-21 02:08:19 -0800105}
106
Wei Yangd74b9022015-03-25 16:23:51 +0800107static resource_size_t get_res_add_size(struct list_head *head,
108 struct resource *res)
109{
110 struct pci_dev_resource *dev_res;
111
112 dev_res = res_to_dev_res(head, res);
113 return dev_res ? dev_res->add_size : 0;
114}
115
116static resource_size_t get_res_add_align(struct list_head *head,
117 struct resource *res)
118{
119 struct pci_dev_resource *dev_res;
120
121 dev_res = res_to_dev_res(head, res);
122 return dev_res ? dev_res->min_align : 0;
123}
124
125
Yinghai Lu78c3b322012-01-21 02:08:25 -0800126/* Sort resources by alignment */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800127static void pdev_sort_resources(struct pci_dev *dev, struct list_head *head)
Yinghai Lu78c3b322012-01-21 02:08:25 -0800128{
129 int i;
130
131 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
132 struct resource *r;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800133 struct pci_dev_resource *dev_res, *tmp;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800134 resource_size_t r_align;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800135 struct list_head *n;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800136
137 r = &dev->resource[i];
138
139 if (r->flags & IORESOURCE_PCI_FIXED)
140 continue;
141
142 if (!(r->flags) || r->parent)
143 continue;
144
145 r_align = pci_resource_alignment(dev, r);
146 if (!r_align) {
Frederick Lawler7506dc72018-01-18 12:55:24 -0600147 pci_warn(dev, "BAR %d: %pR has bogus alignment\n",
Yinghai Lu78c3b322012-01-21 02:08:25 -0800148 i, r);
149 continue;
150 }
Yinghai Lu78c3b322012-01-21 02:08:25 -0800151
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800152 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
153 if (!tmp)
Ryan Desfosses227f0642014-04-18 20:13:50 -0400154 panic("pdev_sort_resources(): kmalloc() failed!\n");
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800155 tmp->res = r;
156 tmp->dev = dev;
157
Nicholas Johnson0d607612019-05-07 14:51:24 -0500158 /* Fallback is smallest one or list is empty */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800159 n = head;
160 list_for_each_entry(dev_res, head, list) {
161 resource_size_t align;
162
163 align = pci_resource_alignment(dev_res->dev,
164 dev_res->res);
Yinghai Lu78c3b322012-01-21 02:08:25 -0800165
166 if (r_align > align) {
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800167 n = &dev_res->list;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800168 break;
169 }
170 }
Nicholas Johnson0d607612019-05-07 14:51:24 -0500171 /* Insert it just before n */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800172 list_add_tail(&tmp->list, n);
Yinghai Lu78c3b322012-01-21 02:08:25 -0800173 }
174}
175
Nicholas Johnson0d607612019-05-07 14:51:24 -0500176static void __dev_sort_resources(struct pci_dev *dev, struct list_head *head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177{
Yinghai Lu6841ec62010-01-22 01:02:25 -0800178 u16 class = dev->class >> 8;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179
Nicholas Johnson0d607612019-05-07 14:51:24 -0500180 /* Don't touch classless devices or host bridges or IOAPICs */
Yinghai Lu6841ec62010-01-22 01:02:25 -0800181 if (class == PCI_CLASS_NOT_DEFINED || class == PCI_CLASS_BRIDGE_HOST)
182 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183
Nicholas Johnson0d607612019-05-07 14:51:24 -0500184 /* Don't touch IOAPIC devices already enabled by firmware */
Yinghai Lu6841ec62010-01-22 01:02:25 -0800185 if (class == PCI_CLASS_SYSTEM_PIC) {
186 u16 command;
187 pci_read_config_word(dev, PCI_COMMAND, &command);
188 if (command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY))
189 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700190 }
191
Yinghai Lu6841ec62010-01-22 01:02:25 -0800192 pdev_sort_resources(dev, head);
193}
194
Ram Paifc075e12011-02-14 17:43:19 -0800195static inline void reset_resource(struct resource *res)
196{
197 res->start = 0;
198 res->end = 0;
199 res->flags = 0;
200}
201
Ram Paic8adf9a2011-02-14 17:43:20 -0800202/**
Nicholas Johnson0d607612019-05-07 14:51:24 -0500203 * reassign_resources_sorted() - Satisfy any additional resource requests
Ram Paic8adf9a2011-02-14 17:43:20 -0800204 *
Nicholas Johnson0d607612019-05-07 14:51:24 -0500205 * @realloc_head: Head of the list tracking requests requiring
206 * additional resources
207 * @head: Head of the list tracking requests with allocated
208 * resources
Ram Paic8adf9a2011-02-14 17:43:20 -0800209 *
Nicholas Johnson0d607612019-05-07 14:51:24 -0500210 * Walk through each element of the realloc_head and try to procure additional
211 * resources for the element, provided the element is in the head list.
Ram Paic8adf9a2011-02-14 17:43:20 -0800212 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800213static void reassign_resources_sorted(struct list_head *realloc_head,
Nicholas Johnson0d607612019-05-07 14:51:24 -0500214 struct list_head *head)
Ram Paic8adf9a2011-02-14 17:43:20 -0800215{
216 struct resource *res;
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800217 struct pci_dev_resource *add_res, *tmp;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800218 struct pci_dev_resource *dev_res;
Wei Yangd74b9022015-03-25 16:23:51 +0800219 resource_size_t add_size, align;
Ram Paic8adf9a2011-02-14 17:43:20 -0800220 int idx;
221
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800222 list_for_each_entry_safe(add_res, tmp, realloc_head, list) {
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800223 bool found_match = false;
224
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800225 res = add_res->res;
Nicholas Johnson0d607612019-05-07 14:51:24 -0500226 /* Skip resource that has been reset */
Ram Paic8adf9a2011-02-14 17:43:20 -0800227 if (!res->flags)
228 goto out;
229
Nicholas Johnson0d607612019-05-07 14:51:24 -0500230 /* Skip this resource if not found in head list */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800231 list_for_each_entry(dev_res, head, list) {
232 if (dev_res->res == res) {
233 found_match = true;
234 break;
235 }
Ram Paic8adf9a2011-02-14 17:43:20 -0800236 }
Nicholas Johnson0d607612019-05-07 14:51:24 -0500237 if (!found_match) /* Just skip */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800238 continue;
Ram Paic8adf9a2011-02-14 17:43:20 -0800239
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800240 idx = res - &add_res->dev->resource[0];
241 add_size = add_res->add_size;
Wei Yangd74b9022015-03-25 16:23:51 +0800242 align = add_res->min_align;
Ram Pai2bbc6942011-07-25 13:08:39 -0700243 if (!resource_size(res)) {
Wei Yangd74b9022015-03-25 16:23:51 +0800244 res->start = align;
Ram Pai2bbc6942011-07-25 13:08:39 -0700245 res->end = res->start + add_size - 1;
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800246 if (pci_assign_resource(add_res->dev, idx))
Ram Paic8adf9a2011-02-14 17:43:20 -0800247 reset_resource(res);
Ram Pai2bbc6942011-07-25 13:08:39 -0700248 } else {
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800249 res->flags |= add_res->flags &
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800250 (IORESOURCE_STARTALIGN|IORESOURCE_SIZEALIGN);
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800251 if (pci_reassign_resource(add_res->dev, idx,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800252 add_size, align))
Mohan Kumar34c6b712019-04-20 07:07:20 +0300253 pci_info(add_res->dev, "failed to add %llx res[%d]=%pR\n",
254 (unsigned long long) add_size, idx,
255 res);
Ram Paic8adf9a2011-02-14 17:43:20 -0800256 }
257out:
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800258 list_del(&add_res->list);
259 kfree(add_res);
Ram Paic8adf9a2011-02-14 17:43:20 -0800260 }
261}
262
263/**
Nicholas Johnson0d607612019-05-07 14:51:24 -0500264 * assign_requested_resources_sorted() - Satisfy resource requests
Ram Paic8adf9a2011-02-14 17:43:20 -0800265 *
Nicholas Johnson0d607612019-05-07 14:51:24 -0500266 * @head: Head of the list tracking requests for resources
267 * @fail_head: Head of the list tracking requests that could not be
268 * allocated
Ram Paic8adf9a2011-02-14 17:43:20 -0800269 *
Nicholas Johnson0d607612019-05-07 14:51:24 -0500270 * Satisfy resource requests of each element in the list. Add requests that
271 * could not be satisfied to the failed_list.
Ram Paic8adf9a2011-02-14 17:43:20 -0800272 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800273static void assign_requested_resources_sorted(struct list_head *head,
274 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800275{
276 struct resource *res;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800277 struct pci_dev_resource *dev_res;
Yinghai Lu6841ec62010-01-22 01:02:25 -0800278 int idx;
279
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800280 list_for_each_entry(dev_res, head, list) {
281 res = dev_res->res;
282 idx = res - &dev_res->dev->resource[0];
283 if (resource_size(res) &&
284 pci_assign_resource(dev_res->dev, idx)) {
Yinghai Lua3cb9992013-01-21 13:20:43 -0800285 if (fail_head) {
Yinghai Lu9a928662010-02-28 15:49:39 -0800286 /*
Nicholas Johnson0d607612019-05-07 14:51:24 -0500287 * If the failed resource is a ROM BAR and
288 * it will be enabled later, don't add it
289 * to the list.
Yinghai Lu9a928662010-02-28 15:49:39 -0800290 */
291 if (!((idx == PCI_ROM_RESOURCE) &&
292 (!(res->flags & IORESOURCE_ROM_ENABLE))))
Yinghai Lu67cc7e22012-01-21 02:08:32 -0800293 add_to_list(fail_head,
294 dev_res->dev, res,
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700295 0 /* don't care */,
296 0 /* don't care */);
Yinghai Lu9a928662010-02-28 15:49:39 -0800297 }
Ram Paifc075e12011-02-14 17:43:19 -0800298 reset_resource(res);
Rajesh Shah542df5d2005-04-28 00:25:50 -0700299 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700300 }
301}
302
Yinghai Luaa914f52013-07-25 06:31:38 -0700303static unsigned long pci_fail_res_type_mask(struct list_head *fail_head)
304{
305 struct pci_dev_resource *fail_res;
306 unsigned long mask = 0;
307
Nicholas Johnson0d607612019-05-07 14:51:24 -0500308 /* Check failed type */
Yinghai Luaa914f52013-07-25 06:31:38 -0700309 list_for_each_entry(fail_res, fail_head, list)
310 mask |= fail_res->flags;
311
312 /*
Nicholas Johnson0d607612019-05-07 14:51:24 -0500313 * One pref failed resource will set IORESOURCE_MEM, as we can
314 * allocate pref in non-pref range. Will release all assigned
315 * non-pref sibling resources according to that bit.
Yinghai Luaa914f52013-07-25 06:31:38 -0700316 */
317 return mask & (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH);
318}
319
320static bool pci_need_to_release(unsigned long mask, struct resource *res)
321{
322 if (res->flags & IORESOURCE_IO)
323 return !!(mask & IORESOURCE_IO);
324
Nicholas Johnson0d607612019-05-07 14:51:24 -0500325 /* Check pref at first */
Yinghai Luaa914f52013-07-25 06:31:38 -0700326 if (res->flags & IORESOURCE_PREFETCH) {
327 if (mask & IORESOURCE_PREFETCH)
328 return true;
Nicholas Johnson0d607612019-05-07 14:51:24 -0500329 /* Count pref if its parent is non-pref */
Yinghai Luaa914f52013-07-25 06:31:38 -0700330 else if ((mask & IORESOURCE_MEM) &&
331 !(res->parent->flags & IORESOURCE_PREFETCH))
332 return true;
333 else
334 return false;
335 }
336
337 if (res->flags & IORESOURCE_MEM)
338 return !!(mask & IORESOURCE_MEM);
339
Nicholas Johnson0d607612019-05-07 14:51:24 -0500340 return false; /* Should not get here */
Yinghai Luaa914f52013-07-25 06:31:38 -0700341}
342
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800343static void __assign_resources_sorted(struct list_head *head,
Nicholas Johnson0d607612019-05-07 14:51:24 -0500344 struct list_head *realloc_head,
345 struct list_head *fail_head)
Ram Paic8adf9a2011-02-14 17:43:20 -0800346{
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800347 /*
Nicholas Johnson0d607612019-05-07 14:51:24 -0500348 * Should not assign requested resources at first. They could be
349 * adjacent, so later reassign can not reallocate them one by one in
350 * parent resource window.
351 *
352 * Try to assign requested + add_size at beginning. If could do that,
353 * could get out early. If could not do that, we still try to assign
354 * requested at first, then try to reassign add_size for some resources.
Yinghai Luaa914f52013-07-25 06:31:38 -0700355 *
356 * Separate three resource type checking if we need to release
357 * assigned resource after requested + add_size try.
Nicholas Johnson0d607612019-05-07 14:51:24 -0500358 *
359 * 1. If IO port assignment fails, will release assigned IO
360 * port.
361 * 2. If pref MMIO assignment fails, release assigned pref
362 * MMIO. If assigned pref MMIO's parent is non-pref MMIO
363 * and non-pref MMIO assignment fails, will release that
364 * assigned pref MMIO.
365 * 3. If non-pref MMIO assignment fails or pref MMIO
366 * assignment fails, will release assigned non-pref MMIO.
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800367 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800368 LIST_HEAD(save_head);
369 LIST_HEAD(local_fail_head);
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800370 struct pci_dev_resource *save_res;
Wei Yangd74b9022015-03-25 16:23:51 +0800371 struct pci_dev_resource *dev_res, *tmp_res, *dev_res2;
Yinghai Luaa914f52013-07-25 06:31:38 -0700372 unsigned long fail_type;
Wei Yangd74b9022015-03-25 16:23:51 +0800373 resource_size_t add_align, align;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800374
375 /* Check if optional add_size is there */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800376 if (!realloc_head || list_empty(realloc_head))
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800377 goto requested_and_reassign;
378
379 /* Save original start, end, flags etc at first */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800380 list_for_each_entry(dev_res, head, list) {
381 if (add_to_list(&save_head, dev_res->dev, dev_res->res, 0, 0)) {
Yinghai Lubffc56d2012-01-21 02:08:30 -0800382 free_list(&save_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800383 goto requested_and_reassign;
384 }
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800385 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800386
387 /* Update res in head list with add_size in realloc_head list */
Wei Yangd74b9022015-03-25 16:23:51 +0800388 list_for_each_entry_safe(dev_res, tmp_res, head, list) {
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800389 dev_res->res->end += get_res_add_size(realloc_head,
390 dev_res->res);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800391
Wei Yangd74b9022015-03-25 16:23:51 +0800392 /*
393 * There are two kinds of additional resources in the list:
394 * 1. bridge resource -- IORESOURCE_STARTALIGN
Nicholas Johnson0d607612019-05-07 14:51:24 -0500395 * 2. SR-IOV resource -- IORESOURCE_SIZEALIGN
Wei Yangd74b9022015-03-25 16:23:51 +0800396 * Here just fix the additional alignment for bridge
397 */
398 if (!(dev_res->res->flags & IORESOURCE_STARTALIGN))
399 continue;
400
401 add_align = get_res_add_align(realloc_head, dev_res->res);
402
403 /*
Nicholas Johnson0d607612019-05-07 14:51:24 -0500404 * The "head" list is sorted by alignment so resources with
405 * bigger alignment will be assigned first. After we
406 * change the alignment of a dev_res in "head" list, we
407 * need to reorder the list by alignment to make it
Wei Yangd74b9022015-03-25 16:23:51 +0800408 * consistent.
409 */
410 if (add_align > dev_res->res->start) {
Yinghai Lu552bc942015-05-28 22:40:00 -0700411 resource_size_t r_size = resource_size(dev_res->res);
412
Wei Yangd74b9022015-03-25 16:23:51 +0800413 dev_res->res->start = add_align;
Yinghai Lu552bc942015-05-28 22:40:00 -0700414 dev_res->res->end = add_align + r_size - 1;
Wei Yangd74b9022015-03-25 16:23:51 +0800415
416 list_for_each_entry(dev_res2, head, list) {
417 align = pci_resource_alignment(dev_res2->dev,
418 dev_res2->res);
Wei Yanga6b65982015-05-19 14:24:17 +0800419 if (add_align > align) {
Wei Yangd74b9022015-03-25 16:23:51 +0800420 list_move_tail(&dev_res->list,
421 &dev_res2->list);
Wei Yanga6b65982015-05-19 14:24:17 +0800422 break;
423 }
Wei Yangd74b9022015-03-25 16:23:51 +0800424 }
Bogicevic Sasaff3ce482015-12-27 13:21:11 -0800425 }
Wei Yangd74b9022015-03-25 16:23:51 +0800426
427 }
428
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800429 /* Try updated head list with add_size added */
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800430 assign_requested_resources_sorted(head, &local_fail_head);
431
Nicholas Johnson0d607612019-05-07 14:51:24 -0500432 /* All assigned with add_size? */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800433 if (list_empty(&local_fail_head)) {
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800434 /* Remove head list from realloc_head list */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800435 list_for_each_entry(dev_res, head, list)
436 remove_from_list(realloc_head, dev_res->res);
Yinghai Lubffc56d2012-01-21 02:08:30 -0800437 free_list(&save_head);
438 free_list(head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800439 return;
440 }
441
Nicholas Johnson0d607612019-05-07 14:51:24 -0500442 /* Check failed type */
Yinghai Luaa914f52013-07-25 06:31:38 -0700443 fail_type = pci_fail_res_type_mask(&local_fail_head);
Nicholas Johnson0d607612019-05-07 14:51:24 -0500444 /* Remove not need to be released assigned res from head list etc */
Yinghai Luaa914f52013-07-25 06:31:38 -0700445 list_for_each_entry_safe(dev_res, tmp_res, head, list)
446 if (dev_res->res->parent &&
447 !pci_need_to_release(fail_type, dev_res->res)) {
Nicholas Johnson0d607612019-05-07 14:51:24 -0500448 /* Remove it from realloc_head list */
Yinghai Luaa914f52013-07-25 06:31:38 -0700449 remove_from_list(realloc_head, dev_res->res);
450 remove_from_list(&save_head, dev_res->res);
451 list_del(&dev_res->list);
452 kfree(dev_res);
453 }
454
Yinghai Lubffc56d2012-01-21 02:08:30 -0800455 free_list(&local_fail_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800456 /* Release assigned resource */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800457 list_for_each_entry(dev_res, head, list)
458 if (dev_res->res->parent)
459 release_resource(dev_res->res);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800460 /* Restore start/end/flags from saved list */
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800461 list_for_each_entry(save_res, &save_head, list) {
462 struct resource *res = save_res->res;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800463
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800464 res->start = save_res->start;
465 res->end = save_res->end;
466 res->flags = save_res->flags;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800467 }
Yinghai Lubffc56d2012-01-21 02:08:30 -0800468 free_list(&save_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800469
470requested_and_reassign:
Ram Paic8adf9a2011-02-14 17:43:20 -0800471 /* Satisfy the must-have resource requests */
472 assign_requested_resources_sorted(head, fail_head);
473
Nicholas Johnson0d607612019-05-07 14:51:24 -0500474 /* Try to satisfy any additional optional resource requests */
Ram Pai9e8bf932011-07-25 13:08:42 -0700475 if (realloc_head)
476 reassign_resources_sorted(realloc_head, head);
Yinghai Lubffc56d2012-01-21 02:08:30 -0800477 free_list(head);
Ram Paic8adf9a2011-02-14 17:43:20 -0800478}
479
Yinghai Lu6841ec62010-01-22 01:02:25 -0800480static void pdev_assign_resources_sorted(struct pci_dev *dev,
Nicholas Johnson0d607612019-05-07 14:51:24 -0500481 struct list_head *add_head,
482 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800483{
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800484 LIST_HEAD(head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800485
Yinghai Lu6841ec62010-01-22 01:02:25 -0800486 __dev_sort_resources(dev, &head);
Yinghai Lu8424d752012-01-21 02:08:21 -0800487 __assign_resources_sorted(&head, add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800488
489}
490
491static void pbus_assign_resources_sorted(const struct pci_bus *bus,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800492 struct list_head *realloc_head,
493 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800494{
495 struct pci_dev *dev;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800496 LIST_HEAD(head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800497
Yinghai Lu6841ec62010-01-22 01:02:25 -0800498 list_for_each_entry(dev, &bus->devices, bus_list)
499 __dev_sort_resources(dev, &head);
500
Ram Pai9e8bf932011-07-25 13:08:42 -0700501 __assign_resources_sorted(&head, realloc_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800502}
503
Dominik Brodowskib3743fa2005-09-09 13:03:23 -0700504void pci_setup_cardbus(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700505{
506 struct pci_dev *bridge = bus->self;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600507 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700508 struct pci_bus_region region;
509
Frederick Lawler7506dc72018-01-18 12:55:24 -0600510 pci_info(bridge, "CardBus bridge to %pR\n",
Yinghai Lub918c622012-05-17 18:51:11 -0700511 &bus->busn_res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700512
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600513 res = bus->resource[0];
Yinghai Lufc279852013-12-09 22:54:40 -0800514 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600515 if (res->flags & IORESOURCE_IO) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700516 /*
517 * The IO resource is allocated a range twice as large as it
518 * would normally need. This allows us to set both IO regs.
519 */
Frederick Lawler7506dc72018-01-18 12:55:24 -0600520 pci_info(bridge, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700521 pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,
522 region.start);
523 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,
524 region.end);
525 }
526
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600527 res = bus->resource[1];
Yinghai Lufc279852013-12-09 22:54:40 -0800528 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600529 if (res->flags & IORESOURCE_IO) {
Frederick Lawler7506dc72018-01-18 12:55:24 -0600530 pci_info(bridge, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700531 pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
532 region.start);
533 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,
534 region.end);
535 }
536
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600537 res = bus->resource[2];
Yinghai Lufc279852013-12-09 22:54:40 -0800538 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600539 if (res->flags & IORESOURCE_MEM) {
Frederick Lawler7506dc72018-01-18 12:55:24 -0600540 pci_info(bridge, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700541 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
542 region.start);
543 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,
544 region.end);
545 }
546
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600547 res = bus->resource[3];
Yinghai Lufc279852013-12-09 22:54:40 -0800548 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600549 if (res->flags & IORESOURCE_MEM) {
Frederick Lawler7506dc72018-01-18 12:55:24 -0600550 pci_info(bridge, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
552 region.start);
553 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,
554 region.end);
555 }
556}
Dominik Brodowskib3743fa2005-09-09 13:03:23 -0700557EXPORT_SYMBOL(pci_setup_cardbus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700558
Nicholas Johnson0d607612019-05-07 14:51:24 -0500559/*
560 * Initialize bridges with base/limit values we have collected. PCI-to-PCI
561 * Bridge Architecture Specification rev. 1.1 (1998) requires that if there
562 * are no I/O ports or memory behind the bridge, the corresponding range
563 * must be turned off by writing base value greater than limit to the
564 * bridge's base/limit registers.
565 *
566 * Note: care must be taken when updating I/O base/limit registers of
567 * bridges which support 32-bit I/O. This update requires two config space
568 * writes, so it's quite possible that an I/O window of the bridge will
569 * have some undesirable address (e.g. 0) after the first write. Ditto
570 * 64-bit prefetchable MMIO.
571 */
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600572static void pci_setup_bridge_io(struct pci_dev *bridge)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700573{
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600574 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700575 struct pci_bus_region region;
Bjorn Helgaas2b28ae12012-07-09 13:38:57 -0600576 unsigned long io_mask;
577 u8 io_base_lo, io_limit_lo;
Bjorn Helgaas5b764b82013-11-27 17:24:50 -0700578 u16 l;
579 u32 io_upper16;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700580
Bjorn Helgaas2b28ae12012-07-09 13:38:57 -0600581 io_mask = PCI_IO_RANGE_MASK;
582 if (bridge->io_window_1k)
583 io_mask = PCI_IO_1K_RANGE_MASK;
584
Nicholas Johnson0d607612019-05-07 14:51:24 -0500585 /* Set up the top and bottom of the PCI I/O segment for this bus */
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600586 res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0];
Yinghai Lufc279852013-12-09 22:54:40 -0800587 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600588 if (res->flags & IORESOURCE_IO) {
Bjorn Helgaas5b764b82013-11-27 17:24:50 -0700589 pci_read_config_word(bridge, PCI_IO_BASE, &l);
Bjorn Helgaas2b28ae12012-07-09 13:38:57 -0600590 io_base_lo = (region.start >> 8) & io_mask;
591 io_limit_lo = (region.end >> 8) & io_mask;
Bjorn Helgaas5b764b82013-11-27 17:24:50 -0700592 l = ((u16) io_limit_lo << 8) | io_base_lo;
Nicholas Johnson0d607612019-05-07 14:51:24 -0500593 /* Set up upper 16 bits of I/O base/limit */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700594 io_upper16 = (region.end & 0xffff0000) | (region.start >> 16);
Frederick Lawler7506dc72018-01-18 12:55:24 -0600595 pci_info(bridge, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800596 } else {
Nicholas Johnson0d607612019-05-07 14:51:24 -0500597 /* Clear upper 16 bits of I/O base/limit */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700598 io_upper16 = 0;
599 l = 0x00f0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700600 }
Nicholas Johnson0d607612019-05-07 14:51:24 -0500601 /* Temporarily disable the I/O range before updating PCI_IO_BASE */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700602 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);
Nicholas Johnson0d607612019-05-07 14:51:24 -0500603 /* Update lower 16 bits of I/O base/limit */
Bjorn Helgaas5b764b82013-11-27 17:24:50 -0700604 pci_write_config_word(bridge, PCI_IO_BASE, l);
Nicholas Johnson0d607612019-05-07 14:51:24 -0500605 /* Update upper 16 bits of I/O base/limit */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700606 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800607}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700608
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600609static void pci_setup_bridge_mmio(struct pci_dev *bridge)
Yinghai Lu7cc59972009-12-22 15:02:21 -0800610{
Yinghai Lu7cc59972009-12-22 15:02:21 -0800611 struct resource *res;
612 struct pci_bus_region region;
613 u32 l;
614
Nicholas Johnson0d607612019-05-07 14:51:24 -0500615 /* Set up the top and bottom of the PCI Memory segment for this bus */
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600616 res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1];
Yinghai Lufc279852013-12-09 22:54:40 -0800617 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600618 if (res->flags & IORESOURCE_MEM) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700619 l = (region.start >> 16) & 0xfff0;
620 l |= region.end & 0xfff00000;
Frederick Lawler7506dc72018-01-18 12:55:24 -0600621 pci_info(bridge, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800622 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700623 l = 0x0000fff0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700624 }
625 pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800626}
627
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600628static void pci_setup_bridge_mmio_pref(struct pci_dev *bridge)
Yinghai Lu7cc59972009-12-22 15:02:21 -0800629{
Yinghai Lu7cc59972009-12-22 15:02:21 -0800630 struct resource *res;
631 struct pci_bus_region region;
632 u32 l, bu, lu;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700633
Nicholas Johnson0d607612019-05-07 14:51:24 -0500634 /*
635 * Clear out the upper 32 bits of PREF limit. If
636 * PCI_PREF_BASE_UPPER32 was non-zero, this temporarily disables
637 * PREF range, which is ok.
638 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700639 pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0);
640
Nicholas Johnson0d607612019-05-07 14:51:24 -0500641 /* Set up PREF base/limit */
Benjamin Herrenschmidtc40a22e2007-12-10 17:32:15 +1100642 bu = lu = 0;
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600643 res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2];
Yinghai Lufc279852013-12-09 22:54:40 -0800644 pcibios_resource_to_bus(bridge->bus, &region, res);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600645 if (res->flags & IORESOURCE_PREFETCH) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700646 l = (region.start >> 16) & 0xfff0;
647 l |= region.end & 0xfff00000;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600648 if (res->flags & IORESOURCE_MEM_64) {
Yinghai Lu1f82de12009-04-23 20:48:32 -0700649 bu = upper_32_bits(region.start);
650 lu = upper_32_bits(region.end);
Yinghai Lu1f82de12009-04-23 20:48:32 -0700651 }
Frederick Lawler7506dc72018-01-18 12:55:24 -0600652 pci_info(bridge, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800653 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700654 l = 0x0000fff0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700655 }
656 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
657
Nicholas Johnson0d607612019-05-07 14:51:24 -0500658 /* Set the upper 32 bits of PREF base & limit */
Alex Williamson59353ea2009-11-30 14:51:44 -0700659 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);
660 pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800661}
662
663static void __pci_setup_bridge(struct pci_bus *bus, unsigned long type)
664{
665 struct pci_dev *bridge = bus->self;
666
Frederick Lawler7506dc72018-01-18 12:55:24 -0600667 pci_info(bridge, "PCI bridge to %pR\n",
Yinghai Lub918c622012-05-17 18:51:11 -0700668 &bus->busn_res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800669
670 if (type & IORESOURCE_IO)
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600671 pci_setup_bridge_io(bridge);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800672
673 if (type & IORESOURCE_MEM)
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600674 pci_setup_bridge_mmio(bridge);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800675
676 if (type & IORESOURCE_PREFETCH)
Yinghai Lu3f2f4dc2015-01-15 10:22:31 -0600677 pci_setup_bridge_mmio_pref(bridge);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700678
679 pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl);
680}
681
Gavin Shand366d282016-05-20 16:41:25 +1000682void __weak pcibios_setup_bridge(struct pci_bus *bus, unsigned long type)
683{
684}
685
Benjamin Herrenschmidte2444272011-09-11 14:08:38 -0300686void pci_setup_bridge(struct pci_bus *bus)
Yinghai Lu7cc59972009-12-22 15:02:21 -0800687{
688 unsigned long type = IORESOURCE_IO | IORESOURCE_MEM |
689 IORESOURCE_PREFETCH;
690
Gavin Shand366d282016-05-20 16:41:25 +1000691 pcibios_setup_bridge(bus, type);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800692 __pci_setup_bridge(bus, type);
693}
694
Yinghai Lu8505e722015-01-15 16:21:49 -0600695
696int pci_claim_bridge_resource(struct pci_dev *bridge, int i)
697{
698 if (i < PCI_BRIDGE_RESOURCES || i > PCI_BRIDGE_RESOURCE_END)
699 return 0;
700
701 if (pci_claim_resource(bridge, i) == 0)
Nicholas Johnson0d607612019-05-07 14:51:24 -0500702 return 0; /* Claimed the window */
Yinghai Lu8505e722015-01-15 16:21:49 -0600703
704 if ((bridge->class >> 8) != PCI_CLASS_BRIDGE_PCI)
705 return 0;
706
707 if (!pci_bus_clip_resource(bridge, i))
Nicholas Johnson0d607612019-05-07 14:51:24 -0500708 return -EINVAL; /* Clipping didn't change anything */
Yinghai Lu8505e722015-01-15 16:21:49 -0600709
710 switch (i - PCI_BRIDGE_RESOURCES) {
711 case 0:
712 pci_setup_bridge_io(bridge);
713 break;
714 case 1:
715 pci_setup_bridge_mmio(bridge);
716 break;
717 case 2:
718 pci_setup_bridge_mmio_pref(bridge);
719 break;
720 default:
721 return -EINVAL;
722 }
723
724 if (pci_claim_resource(bridge, i) == 0)
Nicholas Johnson0d607612019-05-07 14:51:24 -0500725 return 0; /* Claimed a smaller window */
Yinghai Lu8505e722015-01-15 16:21:49 -0600726
727 return -EINVAL;
728}
729
Nicholas Johnson0d607612019-05-07 14:51:24 -0500730/*
731 * Check whether the bridge supports optional I/O and prefetchable memory
732 * ranges. If not, the respective base/limit registers must be read-only
733 * and read as 0.
734 */
Sam Ravnborg96bde062007-03-26 21:53:30 -0800735static void pci_bridge_check_ranges(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700736{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700737 struct pci_dev *bridge = bus->self;
Bjorn Helgaas51c48b32019-01-19 11:35:04 -0600738 struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700739
Linus Torvalds1da177e2005-04-16 15:20:36 -0700740 b_res[1].flags |= IORESOURCE_MEM;
741
Bjorn Helgaas51c48b32019-01-19 11:35:04 -0600742 if (bridge->io_window)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700743 b_res[0].flags |= IORESOURCE_IO;
Bjorn Helgaasd2f54d92013-11-27 15:31:07 -0700744
Bjorn Helgaas51c48b32019-01-19 11:35:04 -0600745 if (bridge->pref_window) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700746 b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
Bjorn Helgaas51c48b32019-01-19 11:35:04 -0600747 if (bridge->pref_64_window) {
Yinghai Lu1f82de12009-04-23 20:48:32 -0700748 b_res[2].flags |= IORESOURCE_MEM_64;
Yinghai Lu99586102010-01-22 01:02:28 -0800749 b_res[2].flags |= PCI_PREF_RANGE_TYPE_64;
750 }
Yinghai Lu1f82de12009-04-23 20:48:32 -0700751 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700752}
753
Nicholas Johnson0d607612019-05-07 14:51:24 -0500754/*
Nicholas Johnsonc13704f2019-11-13 15:25:28 +0000755 * Helper function for sizing routines. Assigned resources have non-NULL
756 * parent resource.
757 *
758 * Return first unassigned resource of the correct type. If there is none,
759 * return first assigned resource of the correct type. If none of the
760 * above, return NULL.
761 *
762 * Returning an assigned resource of the correct type allows the caller to
763 * distinguish between already assigned and no resource of the correct type.
Nicholas Johnson0d607612019-05-07 14:51:24 -0500764 */
Nicholas Johnsonc13704f2019-11-13 15:25:28 +0000765static struct resource *find_bus_resource_of_type(struct pci_bus *bus,
766 unsigned long type_mask,
767 unsigned long type)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700768{
Nicholas Johnsonc13704f2019-11-13 15:25:28 +0000769 struct resource *r, *r_assigned = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700770 int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700771
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -0700772 pci_bus_for_each_resource(bus, r, i) {
Ivan Kokshaysky299de032005-06-15 18:59:27 +0400773 if (r == &ioport_resource || r == &iomem_resource)
774 continue;
Jesse Barnes55a10982009-10-27 09:39:18 -0700775 if (r && (r->flags & type_mask) == type && !r->parent)
776 return r;
Nicholas Johnsonc13704f2019-11-13 15:25:28 +0000777 if (r && (r->flags & type_mask) == type && !r_assigned)
778 r_assigned = r;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700779 }
Nicholas Johnsonc13704f2019-11-13 15:25:28 +0000780 return r_assigned;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700781}
782
Ram Pai13583b12011-02-14 17:43:17 -0800783static resource_size_t calculate_iosize(resource_size_t size,
Nicholas Johnson0d607612019-05-07 14:51:24 -0500784 resource_size_t min_size,
785 resource_size_t size1,
786 resource_size_t add_size,
787 resource_size_t children_add_size,
788 resource_size_t old_size,
789 resource_size_t align)
Ram Pai13583b12011-02-14 17:43:17 -0800790{
791 if (size < min_size)
792 size = min_size;
Ryan Desfosses3c78bc62014-04-18 20:13:49 -0400793 if (old_size == 1)
Ram Pai13583b12011-02-14 17:43:17 -0800794 old_size = 0;
Nicholas Johnson0d607612019-05-07 14:51:24 -0500795 /*
796 * To be fixed in 2.5: we should have sort of HAVE_ISA flag in the
797 * struct pci_bus.
798 */
Ram Pai13583b12011-02-14 17:43:17 -0800799#if defined(CONFIG_ISA) || defined(CONFIG_EISA)
800 size = (size & 0xff) + ((size & ~0xffUL) << 2);
801#endif
Jon Derrickde3ffa32018-09-25 12:39:06 -0600802 size = size + size1;
Ram Pai13583b12011-02-14 17:43:17 -0800803 if (size < old_size)
804 size = old_size;
Jon Derrickde3ffa32018-09-25 12:39:06 -0600805
806 size = ALIGN(max(size, add_size) + children_add_size, align);
Ram Pai13583b12011-02-14 17:43:17 -0800807 return size;
808}
809
810static resource_size_t calculate_memsize(resource_size_t size,
Nicholas Johnson0d607612019-05-07 14:51:24 -0500811 resource_size_t min_size,
812 resource_size_t add_size,
813 resource_size_t children_add_size,
814 resource_size_t old_size,
815 resource_size_t align)
Ram Pai13583b12011-02-14 17:43:17 -0800816{
817 if (size < min_size)
818 size = min_size;
Ryan Desfosses3c78bc62014-04-18 20:13:49 -0400819 if (old_size == 1)
Ram Pai13583b12011-02-14 17:43:17 -0800820 old_size = 0;
821 if (size < old_size)
822 size = old_size;
Jon Derrickde3ffa32018-09-25 12:39:06 -0600823
824 size = ALIGN(max(size, add_size) + children_add_size, align);
Ram Pai13583b12011-02-14 17:43:17 -0800825 return size;
826}
827
Gavin Shanac5ad932012-09-11 16:59:45 -0600828resource_size_t __weak pcibios_window_alignment(struct pci_bus *bus,
829 unsigned long type)
830{
831 return 1;
832}
833
834#define PCI_P2P_DEFAULT_MEM_ALIGN 0x100000 /* 1MiB */
835#define PCI_P2P_DEFAULT_IO_ALIGN 0x1000 /* 4KiB */
836#define PCI_P2P_DEFAULT_IO_ALIGN_1K 0x400 /* 1KiB */
837
Nicholas Johnson0d607612019-05-07 14:51:24 -0500838static resource_size_t window_alignment(struct pci_bus *bus, unsigned long type)
Gavin Shanac5ad932012-09-11 16:59:45 -0600839{
840 resource_size_t align = 1, arch_align;
841
842 if (type & IORESOURCE_MEM)
843 align = PCI_P2P_DEFAULT_MEM_ALIGN;
844 else if (type & IORESOURCE_IO) {
845 /*
Nicholas Johnson0d607612019-05-07 14:51:24 -0500846 * Per spec, I/O windows are 4K-aligned, but some bridges have
847 * an extension to support 1K alignment.
Gavin Shanac5ad932012-09-11 16:59:45 -0600848 */
849 if (bus->self->io_window_1k)
850 align = PCI_P2P_DEFAULT_IO_ALIGN_1K;
851 else
852 align = PCI_P2P_DEFAULT_IO_ALIGN;
853 }
854
855 arch_align = pcibios_window_alignment(bus, type);
856 return max(align, arch_align);
857}
858
Ram Paic8adf9a2011-02-14 17:43:20 -0800859/**
Nicholas Johnson0d607612019-05-07 14:51:24 -0500860 * pbus_size_io() - Size the I/O window of a given bus
Ram Paic8adf9a2011-02-14 17:43:20 -0800861 *
Nicholas Johnson0d607612019-05-07 14:51:24 -0500862 * @bus: The bus
863 * @min_size: The minimum I/O window that must be allocated
864 * @add_size: Additional optional I/O window
865 * @realloc_head: Track the additional I/O window on this list
Ram Paic8adf9a2011-02-14 17:43:20 -0800866 *
Nicholas Johnson0d607612019-05-07 14:51:24 -0500867 * Sizing the I/O windows of the PCI-PCI bridge is trivial, since these
868 * windows have 1K or 4K granularity and the I/O ranges of non-bridge PCI
869 * devices are limited to 256 bytes. We must be careful with the ISA
870 * aliasing though.
Ram Paic8adf9a2011-02-14 17:43:20 -0800871 */
872static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
Nicholas Johnson0d607612019-05-07 14:51:24 -0500873 resource_size_t add_size,
874 struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700875{
876 struct pci_dev *dev;
Nicholas Johnsonc13704f2019-11-13 15:25:28 +0000877 struct resource *b_res = find_bus_resource_of_type(bus, IORESOURCE_IO,
878 IORESOURCE_IO);
Wei Yang11251a82013-08-02 17:31:05 +0800879 resource_size_t size = 0, size0 = 0, size1 = 0;
Yinghai Lube768912011-07-25 13:08:38 -0700880 resource_size_t children_add_size = 0;
Bjorn Helgaas2d1d6672013-08-05 16:15:10 -0600881 resource_size_t min_align, align;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700882
883 if (!b_res)
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700884 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700885
Nicholas Johnsonc13704f2019-11-13 15:25:28 +0000886 /* If resource is already assigned, nothing more to do */
887 if (b_res->parent)
888 return;
889
Bjorn Helgaas2d1d6672013-08-05 16:15:10 -0600890 min_align = window_alignment(bus, IORESOURCE_IO);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700891 list_for_each_entry(dev, &bus->devices, bus_list) {
892 int i;
893
894 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
895 struct resource *r = &dev->resource[i];
896 unsigned long r_size;
897
898 if (r->parent || !(r->flags & IORESOURCE_IO))
899 continue;
Zhao, Yu022edd82008-10-13 19:24:28 +0800900 r_size = resource_size(r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700901
902 if (r_size < 0x400)
903 /* Might be re-aligned for ISA */
904 size += r_size;
905 else
906 size1 += r_size;
Yinghai Lube768912011-07-25 13:08:38 -0700907
Yinghai Lufd591342012-07-09 19:55:29 -0600908 align = pci_resource_alignment(dev, r);
909 if (align > min_align)
910 min_align = align;
911
Ram Pai9e8bf932011-07-25 13:08:42 -0700912 if (realloc_head)
913 children_add_size += get_res_add_size(realloc_head, r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700914 }
915 }
Yinghai Lufd591342012-07-09 19:55:29 -0600916
Jon Derrickde3ffa32018-09-25 12:39:06 -0600917 size0 = calculate_iosize(size, min_size, size1, 0, 0,
Yinghai Lufd591342012-07-09 19:55:29 -0600918 resource_size(b_res), min_align);
Jon Derrickde3ffa32018-09-25 12:39:06 -0600919 size1 = (!realloc_head || (realloc_head && !add_size && !children_add_size)) ? size0 :
920 calculate_iosize(size, min_size, size1, add_size, children_add_size,
Yinghai Lufd591342012-07-09 19:55:29 -0600921 resource_size(b_res), min_align);
Ram Paic8adf9a2011-02-14 17:43:20 -0800922 if (!size0 && !size1) {
Bjorn Helgaas865df572009-11-04 10:32:57 -0700923 if (b_res->start || b_res->end)
Frederick Lawler7506dc72018-01-18 12:55:24 -0600924 pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n",
Ryan Desfosses227f0642014-04-18 20:13:50 -0400925 b_res, &bus->busn_res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700926 b_res->flags = 0;
927 return;
928 }
Yinghai Lufd591342012-07-09 19:55:29 -0600929
930 b_res->start = min_align;
Ram Paic8adf9a2011-02-14 17:43:20 -0800931 b_res->end = b_res->start + size0 - 1;
Ivan Kokshaysky88452562008-03-30 19:50:14 +0400932 b_res->flags |= IORESOURCE_STARTALIGN;
Yinghai Lub5924432012-01-21 02:08:31 -0800933 if (size1 > size0 && realloc_head) {
Yinghai Lufd591342012-07-09 19:55:29 -0600934 add_to_list(realloc_head, bus->self, b_res, size1-size0,
935 min_align);
Mohan Kumar34c6b712019-04-20 07:07:20 +0300936 pci_info(bus->self, "bridge window %pR to %pR add_size %llx\n",
937 b_res, &bus->busn_res,
938 (unsigned long long) size1 - size0);
Yinghai Lub5924432012-01-21 02:08:31 -0800939 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700940}
941
Gavin Shanc1215042012-09-11 16:59:46 -0600942static inline resource_size_t calculate_mem_align(resource_size_t *aligns,
943 int max_order)
944{
945 resource_size_t align = 0;
946 resource_size_t min_align = 0;
947 int order;
948
949 for (order = 0; order <= max_order; order++) {
950 resource_size_t align1 = 1;
951
952 align1 <<= (order + 20);
953
954 if (!align)
955 min_align = align1;
956 else if (ALIGN(align + min_align, min_align) < align1)
957 min_align = align1 >> 1;
958 align += aligns[order];
959 }
960
961 return min_align;
962}
963
Ram Paic8adf9a2011-02-14 17:43:20 -0800964/**
Nicholas Johnson0d607612019-05-07 14:51:24 -0500965 * pbus_size_mem() - Size the memory window of a given bus
Ram Paic8adf9a2011-02-14 17:43:20 -0800966 *
Nicholas Johnson0d607612019-05-07 14:51:24 -0500967 * @bus: The bus
968 * @mask: Mask the resource flag, then compare it with type
969 * @type: The type of free resource from bridge
970 * @type2: Second match type
971 * @type3: Third match type
972 * @min_size: The minimum memory window that must be allocated
973 * @add_size: Additional optional memory window
974 * @realloc_head: Track the additional memory window on this list
Ram Paic8adf9a2011-02-14 17:43:20 -0800975 *
Nicholas Johnson0d607612019-05-07 14:51:24 -0500976 * Calculate the size of the bus and minimal alignment which guarantees
977 * that all child resources fit in this size.
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -0600978 *
Nicholas Johnson0d607612019-05-07 14:51:24 -0500979 * Return -ENOSPC if there's no available bus resource of the desired
980 * type. Otherwise, set the bus resource start/end to indicate the
981 * required size, add things to realloc_head (if supplied), and return 0.
Ram Paic8adf9a2011-02-14 17:43:20 -0800982 */
Eric W. Biederman28760482009-09-09 14:09:24 -0700983static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
Yinghai Lu5b285412014-05-19 17:01:55 -0600984 unsigned long type, unsigned long type2,
Nicholas Johnson0d607612019-05-07 14:51:24 -0500985 unsigned long type3, resource_size_t min_size,
986 resource_size_t add_size,
Yinghai Lu5b285412014-05-19 17:01:55 -0600987 struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700988{
989 struct pci_dev *dev;
Ram Paic8adf9a2011-02-14 17:43:20 -0800990 resource_size_t min_align, align, size, size0, size1;
Nicholas Johnson0d607612019-05-07 14:51:24 -0500991 resource_size_t aligns[18]; /* Alignments from 1MB to 128GB */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700992 int order, max_order;
Nicholas Johnsonc13704f2019-11-13 15:25:28 +0000993 struct resource *b_res = find_bus_resource_of_type(bus,
Yinghai Lu5b285412014-05-19 17:01:55 -0600994 mask | IORESOURCE_PREFETCH, type);
Yinghai Lube768912011-07-25 13:08:38 -0700995 resource_size_t children_add_size = 0;
Wei Yangd74b9022015-03-25 16:23:51 +0800996 resource_size_t children_add_align = 0;
997 resource_size_t add_align = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700998
999 if (!b_res)
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001000 return -ENOSPC;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001001
Nicholas Johnsonc13704f2019-11-13 15:25:28 +00001002 /* If resource is already assigned, nothing more to do */
1003 if (b_res->parent)
1004 return 0;
1005
Linus Torvalds1da177e2005-04-16 15:20:36 -07001006 memset(aligns, 0, sizeof(aligns));
1007 max_order = 0;
1008 size = 0;
1009
1010 list_for_each_entry(dev, &bus->devices, bus_list) {
1011 int i;
Yinghai Lu1f82de12009-04-23 20:48:32 -07001012
Linus Torvalds1da177e2005-04-16 15:20:36 -07001013 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
1014 struct resource *r = &dev->resource[i];
Benjamin Herrenschmidtc40a22e2007-12-10 17:32:15 +11001015 resource_size_t r_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001016
David Daneya2220d82015-10-29 17:35:39 -05001017 if (r->parent || (r->flags & IORESOURCE_PCI_FIXED) ||
1018 ((r->flags & mask) != type &&
1019 (r->flags & mask) != type2 &&
1020 (r->flags & mask) != type3))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001021 continue;
Zhao, Yu022edd82008-10-13 19:24:28 +08001022 r_size = resource_size(r);
Yinghai Lu2aceefc2011-07-25 13:08:40 -07001023#ifdef CONFIG_PCI_IOV
Nicholas Johnson0d607612019-05-07 14:51:24 -05001024 /* Put SRIOV requested res to the optional list */
Ram Pai9e8bf932011-07-25 13:08:42 -07001025 if (realloc_head && i >= PCI_IOV_RESOURCES &&
Yinghai Lu2aceefc2011-07-25 13:08:40 -07001026 i <= PCI_IOV_RESOURCE_END) {
Wei Yangd74b9022015-03-25 16:23:51 +08001027 add_align = max(pci_resource_alignment(dev, r), add_align);
Yinghai Lu2aceefc2011-07-25 13:08:40 -07001028 r->end = r->start - 1;
Nicholas Johnson0d607612019-05-07 14:51:24 -05001029 add_to_list(realloc_head, dev, r, r_size, 0 /* Don't care */);
Yinghai Lu2aceefc2011-07-25 13:08:40 -07001030 children_add_size += r_size;
1031 continue;
1032 }
1033#endif
Alan14c85302014-05-19 14:03:14 +01001034 /*
1035 * aligns[0] is for 1MB (since bridge memory
1036 * windows are always at least 1MB aligned), so
1037 * keep "order" from being negative for smaller
1038 * resources.
1039 */
Chris Wright6faf17f2009-08-28 13:00:06 -07001040 align = pci_resource_alignment(dev, r);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001041 order = __ffs(align) - 20;
Alan14c85302014-05-19 14:03:14 +01001042 if (order < 0)
1043 order = 0;
1044 if (order >= ARRAY_SIZE(aligns)) {
Frederick Lawler7506dc72018-01-18 12:55:24 -06001045 pci_warn(dev, "disabling BAR %d: %pR (bad alignment %#llx)\n",
Ryan Desfosses227f0642014-04-18 20:13:50 -04001046 i, r, (unsigned long long) align);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001047 r->flags = 0;
1048 continue;
1049 }
Yongji Xiec9c75142017-04-10 19:58:11 +08001050 size += max(r_size, align);
Nicholas Johnson0d607612019-05-07 14:51:24 -05001051 /*
1052 * Exclude ranges with size > align from calculation of
1053 * the alignment.
1054 */
Yongji Xiec9c75142017-04-10 19:58:11 +08001055 if (r_size <= align)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001056 aligns[order] += align;
1057 if (order > max_order)
1058 max_order = order;
Yinghai Lube768912011-07-25 13:08:38 -07001059
Wei Yangd74b9022015-03-25 16:23:51 +08001060 if (realloc_head) {
Ram Pai9e8bf932011-07-25 13:08:42 -07001061 children_add_size += get_res_add_size(realloc_head, r);
Wei Yangd74b9022015-03-25 16:23:51 +08001062 children_add_align = get_res_add_align(realloc_head, r);
1063 add_align = max(add_align, children_add_align);
1064 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001065 }
1066 }
Jeremy Fitzhardinge8308c542008-09-11 01:31:50 -07001067
Gavin Shanc1215042012-09-11 16:59:46 -06001068 min_align = calculate_mem_align(aligns, max_order);
Wei Yang3ad94b02013-09-06 09:45:58 +08001069 min_align = max(min_align, window_alignment(bus, b_res->flags));
Jon Derrickde3ffa32018-09-25 12:39:06 -06001070 size0 = calculate_memsize(size, min_size, 0, 0, resource_size(b_res), min_align);
Wei Yangd74b9022015-03-25 16:23:51 +08001071 add_align = max(min_align, add_align);
Jon Derrickde3ffa32018-09-25 12:39:06 -06001072 size1 = (!realloc_head || (realloc_head && !add_size && !children_add_size)) ? size0 :
1073 calculate_memsize(size, min_size, add_size, children_add_size,
Wei Yangd74b9022015-03-25 16:23:51 +08001074 resource_size(b_res), add_align);
Ram Paic8adf9a2011-02-14 17:43:20 -08001075 if (!size0 && !size1) {
Bjorn Helgaas865df572009-11-04 10:32:57 -07001076 if (b_res->start || b_res->end)
Frederick Lawler7506dc72018-01-18 12:55:24 -06001077 pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n",
Ryan Desfosses227f0642014-04-18 20:13:50 -04001078 b_res, &bus->busn_res);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001079 b_res->flags = 0;
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001080 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001081 }
1082 b_res->start = min_align;
Ram Paic8adf9a2011-02-14 17:43:20 -08001083 b_res->end = size0 + min_align - 1;
Yinghai Lu5b285412014-05-19 17:01:55 -06001084 b_res->flags |= IORESOURCE_STARTALIGN;
Yinghai Lub5924432012-01-21 02:08:31 -08001085 if (size1 > size0 && realloc_head) {
Wei Yangd74b9022015-03-25 16:23:51 +08001086 add_to_list(realloc_head, bus->self, b_res, size1-size0, add_align);
Mohan Kumar34c6b712019-04-20 07:07:20 +03001087 pci_info(bus->self, "bridge window %pR to %pR add_size %llx add_align %llx\n",
Ryan Desfosses227f0642014-04-18 20:13:50 -04001088 b_res, &bus->busn_res,
Wei Yangd74b9022015-03-25 16:23:51 +08001089 (unsigned long long) (size1 - size0),
1090 (unsigned long long) add_align);
Yinghai Lub5924432012-01-21 02:08:31 -08001091 }
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001092 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001093}
1094
Ram Pai0a2daa12011-07-25 13:08:41 -07001095unsigned long pci_cardbus_resource_alignment(struct resource *res)
1096{
1097 if (res->flags & IORESOURCE_IO)
1098 return pci_cardbus_io_size;
1099 if (res->flags & IORESOURCE_MEM)
1100 return pci_cardbus_mem_size;
1101 return 0;
1102}
1103
1104static void pci_bus_size_cardbus(struct pci_bus *bus,
Nicholas Johnson0d607612019-05-07 14:51:24 -05001105 struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001106{
1107 struct pci_dev *bridge = bus->self;
1108 struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
Yinghai Lu11848932012-02-10 15:33:47 -08001109 resource_size_t b_res_3_size = pci_cardbus_mem_size * 2;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001110 u16 ctrl;
1111
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001112 if (b_res[0].parent)
1113 goto handle_b_res_1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001114 /*
Nicholas Johnson0d607612019-05-07 14:51:24 -05001115 * Reserve some resources for CardBus. We reserve a fixed amount
1116 * of bus space for CardBus bridges.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001117 */
Yinghai Lu11848932012-02-10 15:33:47 -08001118 b_res[0].start = pci_cardbus_io_size;
1119 b_res[0].end = b_res[0].start + pci_cardbus_io_size - 1;
1120 b_res[0].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;
1121 if (realloc_head) {
1122 b_res[0].end -= pci_cardbus_io_size;
1123 add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size,
1124 pci_cardbus_io_size);
1125 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001126
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001127handle_b_res_1:
1128 if (b_res[1].parent)
1129 goto handle_b_res_2;
Yinghai Lu11848932012-02-10 15:33:47 -08001130 b_res[1].start = pci_cardbus_io_size;
1131 b_res[1].end = b_res[1].start + pci_cardbus_io_size - 1;
1132 b_res[1].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;
1133 if (realloc_head) {
1134 b_res[1].end -= pci_cardbus_io_size;
1135 add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size,
1136 pci_cardbus_io_size);
1137 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001138
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001139handle_b_res_2:
Nicholas Johnson0d607612019-05-07 14:51:24 -05001140 /* MEM1 must not be pref MMIO */
Yinghai Ludcef0d02012-02-10 15:33:46 -08001141 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1142 if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) {
1143 ctrl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1;
1144 pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);
1145 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1146 }
1147
Nicholas Johnson0d607612019-05-07 14:51:24 -05001148 /* Check whether prefetchable memory is supported by this bridge. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001149 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1150 if (!(ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0)) {
1151 ctrl |= PCI_CB_BRIDGE_CTL_PREFETCH_MEM0;
1152 pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);
1153 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
1154 }
1155
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001156 if (b_res[2].parent)
1157 goto handle_b_res_3;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001158 /*
Nicholas Johnson0d607612019-05-07 14:51:24 -05001159 * If we have prefetchable memory support, allocate two regions.
1160 * Otherwise, allocate one region of twice the size.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001161 */
1162 if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) {
Yinghai Lu11848932012-02-10 15:33:47 -08001163 b_res[2].start = pci_cardbus_mem_size;
1164 b_res[2].end = b_res[2].start + pci_cardbus_mem_size - 1;
1165 b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH |
1166 IORESOURCE_STARTALIGN;
1167 if (realloc_head) {
1168 b_res[2].end -= pci_cardbus_mem_size;
1169 add_to_list(realloc_head, bridge, b_res+2,
1170 pci_cardbus_mem_size, pci_cardbus_mem_size);
1171 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001172
Nicholas Johnson0d607612019-05-07 14:51:24 -05001173 /* Reduce that to half */
Yinghai Lu11848932012-02-10 15:33:47 -08001174 b_res_3_size = pci_cardbus_mem_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001175 }
Ram Pai0a2daa12011-07-25 13:08:41 -07001176
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001177handle_b_res_3:
1178 if (b_res[3].parent)
1179 goto handle_done;
Yinghai Lu11848932012-02-10 15:33:47 -08001180 b_res[3].start = pci_cardbus_mem_size;
1181 b_res[3].end = b_res[3].start + b_res_3_size - 1;
1182 b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN;
1183 if (realloc_head) {
1184 b_res[3].end -= b_res_3_size;
1185 add_to_list(realloc_head, bridge, b_res+3, b_res_3_size,
1186 pci_cardbus_mem_size);
1187 }
Yinghai Lu3796f1e2012-02-10 15:33:48 -08001188
1189handle_done:
1190 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001191}
1192
Bjorn Helgaas10874f5a2014-04-14 16:11:40 -06001193void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001194{
1195 struct pci_dev *dev;
Yinghai Lu5b285412014-05-19 17:01:55 -06001196 unsigned long mask, prefmask, type2 = 0, type3 = 0;
Nicholas Johnsond7b8a212019-10-23 12:12:29 +00001197 resource_size_t additional_io_size = 0, additional_mmio_size = 0,
1198 additional_mmio_pref_size = 0;
Yinghai Lu5b285412014-05-19 17:01:55 -06001199 struct resource *b_res;
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001200 int ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001201
1202 list_for_each_entry(dev, &bus->devices, bus_list) {
1203 struct pci_bus *b = dev->subordinate;
1204 if (!b)
1205 continue;
1206
Honghui Zhangb2fb5cc2018-10-16 18:44:43 +08001207 switch (dev->hdr_type) {
1208 case PCI_HEADER_TYPE_CARDBUS:
Ram Pai9e8bf932011-07-25 13:08:42 -07001209 pci_bus_size_cardbus(b, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001210 break;
1211
Honghui Zhangb2fb5cc2018-10-16 18:44:43 +08001212 case PCI_HEADER_TYPE_BRIDGE:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001213 default:
Ram Pai9e8bf932011-07-25 13:08:42 -07001214 __pci_bus_size_bridges(b, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001215 break;
1216 }
1217 }
1218
1219 /* The root bus? */
Wei Yang2ba29e22013-09-06 09:45:56 +08001220 if (pci_is_root_bus(bus))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001221 return;
1222
Honghui Zhangb2fb5cc2018-10-16 18:44:43 +08001223 switch (bus->self->hdr_type) {
1224 case PCI_HEADER_TYPE_CARDBUS:
Nicholas Johnson0d607612019-05-07 14:51:24 -05001225 /* Don't size CardBuses yet */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001226 break;
1227
Honghui Zhangb2fb5cc2018-10-16 18:44:43 +08001228 case PCI_HEADER_TYPE_BRIDGE:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001229 pci_bridge_check_ranges(bus);
Eric W. Biederman28760482009-09-09 14:09:24 -07001230 if (bus->self->is_hotplug_bridge) {
Ram Paic8adf9a2011-02-14 17:43:20 -08001231 additional_io_size = pci_hotplug_io_size;
Nicholas Johnsond7b8a212019-10-23 12:12:29 +00001232 additional_mmio_size = pci_hotplug_mmio_size;
1233 additional_mmio_pref_size = pci_hotplug_mmio_pref_size;
Eric W. Biederman28760482009-09-09 14:09:24 -07001234 }
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001235 /* Fall through */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001236 default:
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001237 pbus_size_io(bus, realloc_head ? 0 : additional_io_size,
1238 additional_io_size, realloc_head);
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001239
1240 /*
1241 * If there's a 64-bit prefetchable MMIO window, compute
1242 * the size required to put all 64-bit prefetchable
1243 * resources in it.
1244 */
Yinghai Lu5b285412014-05-19 17:01:55 -06001245 b_res = &bus->self->resource[PCI_BRIDGE_RESOURCES];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001246 mask = IORESOURCE_MEM;
1247 prefmask = IORESOURCE_MEM | IORESOURCE_PREFETCH;
Yinghai Lu5b285412014-05-19 17:01:55 -06001248 if (b_res[2].flags & IORESOURCE_MEM_64) {
1249 prefmask |= IORESOURCE_MEM_64;
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001250 ret = pbus_size_mem(bus, prefmask, prefmask,
Nicholas Johnsond7b8a212019-10-23 12:12:29 +00001251 prefmask, prefmask,
1252 realloc_head ? 0 : additional_mmio_pref_size,
1253 additional_mmio_pref_size, realloc_head);
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001254
1255 /*
1256 * If successful, all non-prefetchable resources
1257 * and any 32-bit prefetchable resources will go in
1258 * the non-prefetchable window.
1259 */
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001260 if (ret == 0) {
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001261 mask = prefmask;
1262 type2 = prefmask & ~IORESOURCE_MEM_64;
1263 type3 = prefmask & ~IORESOURCE_PREFETCH;
Yinghai Lu5b285412014-05-19 17:01:55 -06001264 }
1265 }
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001266
1267 /*
1268 * If there is no 64-bit prefetchable window, compute the
1269 * size required to put all prefetchable resources in the
1270 * 32-bit prefetchable window (if there is one).
1271 */
Yinghai Lu5b285412014-05-19 17:01:55 -06001272 if (!type2) {
1273 prefmask &= ~IORESOURCE_MEM_64;
Bjorn Helgaas30afe8d2014-05-19 18:28:37 -06001274 ret = pbus_size_mem(bus, prefmask, prefmask,
Nicholas Johnsond7b8a212019-10-23 12:12:29 +00001275 prefmask, prefmask,
1276 realloc_head ? 0 : additional_mmio_pref_size,
1277 additional_mmio_pref_size, realloc_head);
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001278
1279 /*
1280 * If successful, only non-prefetchable resources
1281 * will go in the non-prefetchable window.
1282 */
1283 if (ret == 0)
Yinghai Lu5b285412014-05-19 17:01:55 -06001284 mask = prefmask;
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001285 else
Nicholas Johnsond7b8a212019-10-23 12:12:29 +00001286 additional_mmio_size += additional_mmio_pref_size;
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001287
Yinghai Lu5b285412014-05-19 17:01:55 -06001288 type2 = type3 = IORESOURCE_MEM;
1289 }
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001290
1291 /*
1292 * Compute the size required to put everything else in the
Nicholas Johnson0d607612019-05-07 14:51:24 -05001293 * non-prefetchable window. This includes:
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001294 *
1295 * - all non-prefetchable resources
1296 * - 32-bit prefetchable resources if there's a 64-bit
1297 * prefetchable window or no prefetchable window at all
Nicholas Johnson0d607612019-05-07 14:51:24 -05001298 * - 64-bit prefetchable resources if there's no prefetchable
1299 * window at all
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001300 *
Nicholas Johnson0d607612019-05-07 14:51:24 -05001301 * Note that the strategy in __pci_assign_resource() must match
1302 * that used here. Specifically, we cannot put a 32-bit
1303 * prefetchable resource in a 64-bit prefetchable window.
Bjorn Helgaas67d29b52014-05-19 18:32:18 -06001304 */
Yinghai Lu5b285412014-05-19 17:01:55 -06001305 pbus_size_mem(bus, mask, IORESOURCE_MEM, type2, type3,
Nicholas Johnsond7b8a212019-10-23 12:12:29 +00001306 realloc_head ? 0 : additional_mmio_size,
1307 additional_mmio_size, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001308 break;
1309 }
1310}
Ram Paic8adf9a2011-02-14 17:43:20 -08001311
Bjorn Helgaas10874f5a2014-04-14 16:11:40 -06001312void pci_bus_size_bridges(struct pci_bus *bus)
Ram Paic8adf9a2011-02-14 17:43:20 -08001313{
1314 __pci_bus_size_bridges(bus, NULL);
1315}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001316EXPORT_SYMBOL(pci_bus_size_bridges);
1317
David Daneyd04d0112015-10-29 17:35:39 -05001318static void assign_fixed_resource_on_bus(struct pci_bus *b, struct resource *r)
1319{
1320 int i;
1321 struct resource *parent_r;
1322 unsigned long mask = IORESOURCE_IO | IORESOURCE_MEM |
1323 IORESOURCE_PREFETCH;
1324
1325 pci_bus_for_each_resource(b, parent_r, i) {
1326 if (!parent_r)
1327 continue;
1328
1329 if ((r->flags & mask) == (parent_r->flags & mask) &&
1330 resource_contains(parent_r, r))
1331 request_resource(parent_r, r);
1332 }
1333}
1334
1335/*
Nicholas Johnson0d607612019-05-07 14:51:24 -05001336 * Try to assign any resources marked as IORESOURCE_PCI_FIXED, as they are
1337 * skipped by pbus_assign_resources_sorted().
David Daneyd04d0112015-10-29 17:35:39 -05001338 */
1339static void pdev_assign_fixed_resources(struct pci_dev *dev)
1340{
1341 int i;
1342
1343 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
1344 struct pci_bus *b;
1345 struct resource *r = &dev->resource[i];
1346
1347 if (r->parent || !(r->flags & IORESOURCE_PCI_FIXED) ||
1348 !(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
1349 continue;
1350
1351 b = dev->bus;
1352 while (b && !r->parent) {
1353 assign_fixed_resource_on_bus(b, r);
1354 b = b->parent;
1355 }
1356 }
1357}
1358
Bjorn Helgaas10874f5a2014-04-14 16:11:40 -06001359void __pci_bus_assign_resources(const struct pci_bus *bus,
1360 struct list_head *realloc_head,
1361 struct list_head *fail_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001362{
1363 struct pci_bus *b;
1364 struct pci_dev *dev;
1365
Ram Pai9e8bf932011-07-25 13:08:42 -07001366 pbus_assign_resources_sorted(bus, realloc_head, fail_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001367
Linus Torvalds1da177e2005-04-16 15:20:36 -07001368 list_for_each_entry(dev, &bus->devices, bus_list) {
David Daneyd04d0112015-10-29 17:35:39 -05001369 pdev_assign_fixed_resources(dev);
1370
Linus Torvalds1da177e2005-04-16 15:20:36 -07001371 b = dev->subordinate;
1372 if (!b)
1373 continue;
1374
Ram Pai9e8bf932011-07-25 13:08:42 -07001375 __pci_bus_assign_resources(b, realloc_head, fail_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001376
Honghui Zhangb2fb5cc2018-10-16 18:44:43 +08001377 switch (dev->hdr_type) {
1378 case PCI_HEADER_TYPE_BRIDGE:
Yinghai Lu6841ec62010-01-22 01:02:25 -08001379 if (!pci_is_enabled(dev))
1380 pci_setup_bridge(b);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001381 break;
1382
Honghui Zhangb2fb5cc2018-10-16 18:44:43 +08001383 case PCI_HEADER_TYPE_CARDBUS:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001384 pci_setup_cardbus(b);
1385 break;
1386
1387 default:
Frederick Lawler7506dc72018-01-18 12:55:24 -06001388 pci_info(dev, "not setting up bridge for bus %04x:%02x\n",
Ryan Desfosses227f0642014-04-18 20:13:50 -04001389 pci_domain_nr(b), b->number);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001390 break;
1391 }
1392 }
1393}
Yinghai Lu568ddef2010-01-22 01:02:21 -08001394
Bjorn Helgaas10874f5a2014-04-14 16:11:40 -06001395void pci_bus_assign_resources(const struct pci_bus *bus)
Yinghai Lu568ddef2010-01-22 01:02:21 -08001396{
Ram Paic8adf9a2011-02-14 17:43:20 -08001397 __pci_bus_assign_resources(bus, NULL, NULL);
Yinghai Lu568ddef2010-01-22 01:02:21 -08001398}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001399EXPORT_SYMBOL(pci_bus_assign_resources);
1400
Lorenzo Pieralisi765bf9b2016-06-08 12:04:47 +01001401static void pci_claim_device_resources(struct pci_dev *dev)
1402{
1403 int i;
1404
1405 for (i = 0; i < PCI_BRIDGE_RESOURCES; i++) {
1406 struct resource *r = &dev->resource[i];
1407
1408 if (!r->flags || r->parent)
1409 continue;
1410
1411 pci_claim_resource(dev, i);
1412 }
1413}
1414
1415static void pci_claim_bridge_resources(struct pci_dev *dev)
1416{
1417 int i;
1418
1419 for (i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++) {
1420 struct resource *r = &dev->resource[i];
1421
1422 if (!r->flags || r->parent)
1423 continue;
1424
1425 pci_claim_bridge_resource(dev, i);
1426 }
1427}
1428
1429static void pci_bus_allocate_dev_resources(struct pci_bus *b)
1430{
1431 struct pci_dev *dev;
1432 struct pci_bus *child;
1433
1434 list_for_each_entry(dev, &b->devices, bus_list) {
1435 pci_claim_device_resources(dev);
1436
1437 child = dev->subordinate;
1438 if (child)
1439 pci_bus_allocate_dev_resources(child);
1440 }
1441}
1442
1443static void pci_bus_allocate_resources(struct pci_bus *b)
1444{
1445 struct pci_bus *child;
1446
1447 /*
Nicholas Johnson0d607612019-05-07 14:51:24 -05001448 * Carry out a depth-first search on the PCI bus tree to allocate
1449 * bridge apertures. Read the programmed bridge bases and
1450 * recursively claim the respective bridge resources.
Lorenzo Pieralisi765bf9b2016-06-08 12:04:47 +01001451 */
1452 if (b->self) {
1453 pci_read_bridge_bases(b);
1454 pci_claim_bridge_resources(b->self);
1455 }
1456
1457 list_for_each_entry(child, &b->children, node)
1458 pci_bus_allocate_resources(child);
1459}
1460
1461void pci_bus_claim_resources(struct pci_bus *b)
1462{
1463 pci_bus_allocate_resources(b);
1464 pci_bus_allocate_dev_resources(b);
1465}
1466EXPORT_SYMBOL(pci_bus_claim_resources);
1467
Bjorn Helgaas10874f5a2014-04-14 16:11:40 -06001468static void __pci_bridge_assign_resources(const struct pci_dev *bridge,
1469 struct list_head *add_head,
1470 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -08001471{
1472 struct pci_bus *b;
1473
Yinghai Lu8424d752012-01-21 02:08:21 -08001474 pdev_assign_resources_sorted((struct pci_dev *)bridge,
1475 add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001476
1477 b = bridge->subordinate;
1478 if (!b)
1479 return;
1480
Yinghai Lu8424d752012-01-21 02:08:21 -08001481 __pci_bus_assign_resources(b, add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001482
1483 switch (bridge->class >> 8) {
1484 case PCI_CLASS_BRIDGE_PCI:
1485 pci_setup_bridge(b);
1486 break;
1487
1488 case PCI_CLASS_BRIDGE_CARDBUS:
1489 pci_setup_cardbus(b);
1490 break;
1491
1492 default:
Frederick Lawler7506dc72018-01-18 12:55:24 -06001493 pci_info(bridge, "not setting up bridge for bus %04x:%02x\n",
Ryan Desfosses227f0642014-04-18 20:13:50 -04001494 pci_domain_nr(b), b->number);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001495 break;
1496 }
1497}
Christian Königcb21bc92017-10-18 15:58:17 +02001498
1499#define PCI_RES_TYPE_MASK \
1500 (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH |\
1501 IORESOURCE_MEM_64)
1502
Yinghai Lu5009b462010-01-22 01:02:20 -08001503static void pci_bridge_release_resources(struct pci_bus *bus,
Nicholas Johnson0d607612019-05-07 14:51:24 -05001504 unsigned long type)
Yinghai Lu5009b462010-01-22 01:02:20 -08001505{
Yinghai Lu5b285412014-05-19 17:01:55 -06001506 struct pci_dev *dev = bus->self;
Yinghai Lu5009b462010-01-22 01:02:20 -08001507 struct resource *r;
Yinghai Lu5b285412014-05-19 17:01:55 -06001508 unsigned old_flags = 0;
1509 struct resource *b_res;
1510 int idx = 1;
Yinghai Lu5009b462010-01-22 01:02:20 -08001511
Yinghai Lu5b285412014-05-19 17:01:55 -06001512 b_res = &dev->resource[PCI_BRIDGE_RESOURCES];
Yinghai Lu5009b462010-01-22 01:02:20 -08001513
Yinghai Lu5b285412014-05-19 17:01:55 -06001514 /*
Nicholas Johnson0d607612019-05-07 14:51:24 -05001515 * 1. If IO port assignment fails, release bridge IO port.
1516 * 2. If non pref MMIO assignment fails, release bridge nonpref MMIO.
1517 * 3. If 64bit pref MMIO assignment fails, and bridge pref is 64bit,
1518 * release bridge pref MMIO.
1519 * 4. If pref MMIO assignment fails, and bridge pref is 32bit,
1520 * release bridge pref MMIO.
1521 * 5. If pref MMIO assignment fails, and bridge pref is not
1522 * assigned, release bridge nonpref MMIO.
Yinghai Lu5b285412014-05-19 17:01:55 -06001523 */
1524 if (type & IORESOURCE_IO)
1525 idx = 0;
1526 else if (!(type & IORESOURCE_PREFETCH))
1527 idx = 1;
1528 else if ((type & IORESOURCE_MEM_64) &&
1529 (b_res[2].flags & IORESOURCE_MEM_64))
1530 idx = 2;
1531 else if (!(b_res[2].flags & IORESOURCE_MEM_64) &&
1532 (b_res[2].flags & IORESOURCE_PREFETCH))
1533 idx = 2;
1534 else
1535 idx = 1;
1536
1537 r = &b_res[idx];
1538
1539 if (!r->parent)
1540 return;
1541
Nicholas Johnson0d607612019-05-07 14:51:24 -05001542 /* If there are children, release them all */
Yinghai Lu5b285412014-05-19 17:01:55 -06001543 release_child_resources(r);
1544 if (!release_resource(r)) {
Christian Königcb21bc92017-10-18 15:58:17 +02001545 type = old_flags = r->flags & PCI_RES_TYPE_MASK;
Mohan Kumar34c6b712019-04-20 07:07:20 +03001546 pci_info(dev, "resource %d %pR released\n",
1547 PCI_BRIDGE_RESOURCES + idx, r);
Nicholas Johnson0d607612019-05-07 14:51:24 -05001548 /* Keep the old size */
Yinghai Lu5b285412014-05-19 17:01:55 -06001549 r->end = resource_size(r) - 1;
1550 r->start = 0;
1551 r->flags = 0;
1552
Nicholas Johnson0d607612019-05-07 14:51:24 -05001553 /* Avoiding touch the one without PREF */
Yinghai Lu5009b462010-01-22 01:02:20 -08001554 if (type & IORESOURCE_PREFETCH)
1555 type = IORESOURCE_PREFETCH;
1556 __pci_setup_bridge(bus, type);
Nicholas Johnson0d607612019-05-07 14:51:24 -05001557 /* For next child res under same bridge */
Yinghai Lu5b285412014-05-19 17:01:55 -06001558 r->flags = old_flags;
Yinghai Lu5009b462010-01-22 01:02:20 -08001559 }
1560}
1561
1562enum release_type {
1563 leaf_only,
1564 whole_subtree,
1565};
Nicholas Johnson0d607612019-05-07 14:51:24 -05001566
Yinghai Lu5009b462010-01-22 01:02:20 -08001567/*
Nicholas Johnson0d607612019-05-07 14:51:24 -05001568 * Try to release PCI bridge resources from leaf bridge, so we can allocate
1569 * a larger window later.
Yinghai Lu5009b462010-01-22 01:02:20 -08001570 */
Bjorn Helgaas10874f5a2014-04-14 16:11:40 -06001571static void pci_bus_release_bridge_resources(struct pci_bus *bus,
1572 unsigned long type,
1573 enum release_type rel_type)
Yinghai Lu5009b462010-01-22 01:02:20 -08001574{
1575 struct pci_dev *dev;
1576 bool is_leaf_bridge = true;
1577
1578 list_for_each_entry(dev, &bus->devices, bus_list) {
1579 struct pci_bus *b = dev->subordinate;
1580 if (!b)
1581 continue;
1582
1583 is_leaf_bridge = false;
1584
1585 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
1586 continue;
1587
1588 if (rel_type == whole_subtree)
1589 pci_bus_release_bridge_resources(b, type,
1590 whole_subtree);
1591 }
1592
1593 if (pci_is_root_bus(bus))
1594 return;
1595
1596 if ((bus->self->class >> 8) != PCI_CLASS_BRIDGE_PCI)
1597 return;
1598
1599 if ((rel_type == whole_subtree) || is_leaf_bridge)
1600 pci_bridge_release_resources(bus, type);
1601}
1602
Yinghai Lu76fbc262008-06-23 20:33:06 +02001603static void pci_bus_dump_res(struct pci_bus *bus)
1604{
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -07001605 struct resource *res;
1606 int i;
Yinghai Lu76fbc262008-06-23 20:33:06 +02001607
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -07001608 pci_bus_for_each_resource(bus, res, i) {
Yinghai Lu7c9342b2009-12-22 15:02:24 -08001609 if (!res || !res->end || !res->flags)
Ryan Desfosses3c78bc62014-04-18 20:13:49 -04001610 continue;
Yinghai Lu76fbc262008-06-23 20:33:06 +02001611
Mohan Kumar34c6b712019-04-20 07:07:20 +03001612 dev_info(&bus->dev, "resource %d %pR\n", i, res);
Ryan Desfosses3c78bc62014-04-18 20:13:49 -04001613 }
Yinghai Lu76fbc262008-06-23 20:33:06 +02001614}
1615
1616static void pci_bus_dump_resources(struct pci_bus *bus)
1617{
1618 struct pci_bus *b;
1619 struct pci_dev *dev;
1620
1621
1622 pci_bus_dump_res(bus);
1623
1624 list_for_each_entry(dev, &bus->devices, bus_list) {
1625 b = dev->subordinate;
1626 if (!b)
1627 continue;
1628
1629 pci_bus_dump_resources(b);
1630 }
1631}
1632
Yinghai Luff351472013-07-24 15:37:13 -06001633static int pci_bus_get_depth(struct pci_bus *bus)
Yinghai Luda7822e2011-05-12 17:11:37 -07001634{
1635 int depth = 0;
Wei Yangf2a230b2013-08-02 17:31:03 +08001636 struct pci_bus *child_bus;
Yinghai Luda7822e2011-05-12 17:11:37 -07001637
Ryan Desfosses3c78bc62014-04-18 20:13:49 -04001638 list_for_each_entry(child_bus, &bus->children, node) {
Yinghai Luda7822e2011-05-12 17:11:37 -07001639 int ret;
Yinghai Luda7822e2011-05-12 17:11:37 -07001640
Wei Yangf2a230b2013-08-02 17:31:03 +08001641 ret = pci_bus_get_depth(child_bus);
Yinghai Luda7822e2011-05-12 17:11:37 -07001642 if (ret + 1 > depth)
1643 depth = ret + 1;
1644 }
1645
1646 return depth;
1647}
Yinghai Luda7822e2011-05-12 17:11:37 -07001648
Yinghai Lub55438f2012-02-23 19:23:30 -08001649/*
1650 * -1: undefined, will auto detect later
1651 * 0: disabled by user
1652 * 1: disabled by auto detect
1653 * 2: enabled by user
1654 * 3: enabled by auto detect
1655 */
1656enum enable_type {
1657 undefined = -1,
1658 user_disabled,
1659 auto_disabled,
1660 user_enabled,
1661 auto_enabled,
1662};
1663
Yinghai Luff351472013-07-24 15:37:13 -06001664static enum enable_type pci_realloc_enable = undefined;
Yinghai Lub55438f2012-02-23 19:23:30 -08001665void __init pci_realloc_get_opt(char *str)
1666{
1667 if (!strncmp(str, "off", 3))
1668 pci_realloc_enable = user_disabled;
1669 else if (!strncmp(str, "on", 2))
1670 pci_realloc_enable = user_enabled;
1671}
Yinghai Luff351472013-07-24 15:37:13 -06001672static bool pci_realloc_enabled(enum enable_type enable)
Yinghai Lub55438f2012-02-23 19:23:30 -08001673{
Yinghai Lu967260c2013-07-22 14:37:15 -07001674 return enable >= user_enabled;
Yinghai Lub55438f2012-02-23 19:23:30 -08001675}
Ram Paif483d392011-07-07 11:19:10 -07001676
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001677#if defined(CONFIG_PCI_IOV) && defined(CONFIG_PCI_REALLOC_ENABLE_AUTO)
Yinghai Luff351472013-07-24 15:37:13 -06001678static int iov_resources_unassigned(struct pci_dev *dev, void *data)
Yinghai Lu223d96f2013-07-22 14:37:13 -07001679{
1680 int i;
1681 bool *unassigned = data;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001682
Denis Efremov39098ed2019-08-06 17:07:15 +03001683 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
1684 struct resource *r = &dev->resource[i + PCI_IOV_RESOURCES];
Yinghai Lufa216bf2013-07-22 14:37:14 -07001685 struct pci_bus_region region;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001686
Yinghai Lu223d96f2013-07-22 14:37:13 -07001687 /* Not assigned or rejected by kernel? */
Yinghai Lufa216bf2013-07-22 14:37:14 -07001688 if (!r->flags)
1689 continue;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001690
Yinghai Lufc279852013-12-09 22:54:40 -08001691 pcibios_resource_to_bus(dev->bus, &region, r);
Yinghai Lufa216bf2013-07-22 14:37:14 -07001692 if (!region.start) {
Yinghai Lu223d96f2013-07-22 14:37:13 -07001693 *unassigned = true;
Nicholas Johnson0d607612019-05-07 14:51:24 -05001694 return 1; /* Return early from pci_walk_bus() */
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001695 }
1696 }
Yinghai Lu223d96f2013-07-22 14:37:13 -07001697
1698 return 0;
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001699}
1700
Yinghai Luff351472013-07-24 15:37:13 -06001701static enum enable_type pci_realloc_detect(struct pci_bus *bus,
Nicholas Johnson0d607612019-05-07 14:51:24 -05001702 enum enable_type enable_local)
Yinghai Lu223d96f2013-07-22 14:37:13 -07001703{
1704 bool unassigned = false;
Benjamin Herrenschmidt7ac0d0942019-06-15 10:23:58 +10001705 struct pci_host_bridge *host;
Yinghai Luda7822e2011-05-12 17:11:37 -07001706
Yinghai Lu967260c2013-07-22 14:37:15 -07001707 if (enable_local != undefined)
1708 return enable_local;
Yinghai Luda7822e2011-05-12 17:11:37 -07001709
Benjamin Herrenschmidt7ac0d0942019-06-15 10:23:58 +10001710 host = pci_find_host_bridge(bus);
1711 if (host->preserve_config)
1712 return auto_disabled;
1713
Yinghai Lu967260c2013-07-22 14:37:15 -07001714 pci_walk_bus(bus, iov_resources_unassigned, &unassigned);
1715 if (unassigned)
1716 return auto_enabled;
1717
1718 return enable_local;
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001719}
Yinghai Lu223d96f2013-07-22 14:37:13 -07001720#else
Yinghai Luff351472013-07-24 15:37:13 -06001721static enum enable_type pci_realloc_detect(struct pci_bus *bus,
Nicholas Johnson0d607612019-05-07 14:51:24 -05001722 enum enable_type enable_local)
Yinghai Lu967260c2013-07-22 14:37:15 -07001723{
1724 return enable_local;
1725}
Yinghai Lu223d96f2013-07-22 14:37:13 -07001726#endif
Yinghai Luda7822e2011-05-12 17:11:37 -07001727
1728/*
Nicholas Johnson0d607612019-05-07 14:51:24 -05001729 * First try will not touch PCI bridge res.
1730 * Second and later try will clear small leaf bridge res.
1731 * Will stop till to the max depth if can not find good one.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001732 */
Yinghai Lu39772032013-07-22 14:37:18 -07001733void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001734{
Nicholas Johnson0d607612019-05-07 14:51:24 -05001735 LIST_HEAD(realloc_head);
1736 /* List of resources that want additional resources */
Yinghai Luda7822e2011-05-12 17:11:37 -07001737 struct list_head *add_list = NULL;
1738 int tried_times = 0;
1739 enum release_type rel_type = leaf_only;
1740 LIST_HEAD(fail_head);
1741 struct pci_dev_resource *fail_res;
Yinghai Luda7822e2011-05-12 17:11:37 -07001742 int pci_try_num = 1;
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001743 enum enable_type enable_local;
Yinghai Luda7822e2011-05-12 17:11:37 -07001744
Nicholas Johnson0d607612019-05-07 14:51:24 -05001745 /* Don't realloc if asked to do so */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001746 enable_local = pci_realloc_detect(bus, pci_realloc_enable);
Yinghai Lu967260c2013-07-22 14:37:15 -07001747 if (pci_realloc_enabled(enable_local)) {
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001748 int max_depth = pci_bus_get_depth(bus);
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001749
1750 pci_try_num = max_depth + 1;
Mohan Kumar34c6b712019-04-20 07:07:20 +03001751 dev_info(&bus->dev, "max bus depth: %d pci_try_num: %d\n",
1752 max_depth, pci_try_num);
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001753 }
Yinghai Luda7822e2011-05-12 17:11:37 -07001754
1755again:
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001756 /*
Nicholas Johnson0d607612019-05-07 14:51:24 -05001757 * Last try will use add_list, otherwise will try good to have as must
1758 * have, so can realloc parent bridge resource
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001759 */
1760 if (tried_times + 1 == pci_try_num)
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001761 add_list = &realloc_head;
Nicholas Johnson0d607612019-05-07 14:51:24 -05001762 /*
1763 * Depth first, calculate sizes and alignments of all subordinate buses.
1764 */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001765 __pci_bus_size_bridges(bus, add_list);
Ram Paic8adf9a2011-02-14 17:43:20 -08001766
Linus Torvalds1da177e2005-04-16 15:20:36 -07001767 /* Depth last, allocate resources and update the hardware. */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001768 __pci_bus_assign_resources(bus, add_list, &fail_head);
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001769 if (add_list)
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001770 BUG_ON(!list_empty(add_list));
Yinghai Luda7822e2011-05-12 17:11:37 -07001771 tried_times++;
1772
Nicholas Johnson0d607612019-05-07 14:51:24 -05001773 /* Any device complain? */
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001774 if (list_empty(&fail_head))
Yinghai Lu928bea92013-07-22 14:37:17 -07001775 goto dump;
Ram Paif483d392011-07-07 11:19:10 -07001776
Yinghai Lu0c5be0c2012-02-23 19:23:29 -08001777 if (tried_times >= pci_try_num) {
Yinghai Lu967260c2013-07-22 14:37:15 -07001778 if (enable_local == undefined)
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001779 dev_info(&bus->dev, "Some PCI device resources are unassigned, try booting with pci=realloc\n");
Yinghai Lu967260c2013-07-22 14:37:15 -07001780 else if (enable_local == auto_enabled)
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001781 dev_info(&bus->dev, "Automatically enabled pci realloc, if you have problem, try booting with pci=realloc=off\n");
Yinghai Lueb572e72012-02-23 19:23:31 -08001782
Yinghai Lubffc56d2012-01-21 02:08:30 -08001783 free_list(&fail_head);
Yinghai Lu928bea92013-07-22 14:37:17 -07001784 goto dump;
Yinghai Luda7822e2011-05-12 17:11:37 -07001785 }
1786
Mohan Kumar34c6b712019-04-20 07:07:20 +03001787 dev_info(&bus->dev, "No. %d try to assign unassigned res\n",
1788 tried_times + 1);
Yinghai Luda7822e2011-05-12 17:11:37 -07001789
Nicholas Johnson0d607612019-05-07 14:51:24 -05001790 /* Third times and later will not check if it is leaf */
Yinghai Luda7822e2011-05-12 17:11:37 -07001791 if ((tried_times + 1) > 2)
1792 rel_type = whole_subtree;
1793
1794 /*
1795 * Try to release leaf bridge's resources that doesn't fit resource of
Nicholas Johnson0d607612019-05-07 14:51:24 -05001796 * child device under that bridge.
Yinghai Luda7822e2011-05-12 17:11:37 -07001797 */
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001798 list_for_each_entry(fail_res, &fail_head, list)
1799 pci_bus_release_bridge_resources(fail_res->dev->bus,
Christian Königcb21bc92017-10-18 15:58:17 +02001800 fail_res->flags & PCI_RES_TYPE_MASK,
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001801 rel_type);
Yinghai Lu61e83cd2013-07-22 14:37:12 -07001802
Nicholas Johnson0d607612019-05-07 14:51:24 -05001803 /* Restore size and flags */
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001804 list_for_each_entry(fail_res, &fail_head, list) {
1805 struct resource *res = fail_res->res;
Logan Gunthorpe9db8dc62020-01-08 14:32:08 -07001806 int idx;
Yinghai Luda7822e2011-05-12 17:11:37 -07001807
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001808 res->start = fail_res->start;
1809 res->end = fail_res->end;
1810 res->flags = fail_res->flags;
Logan Gunthorpe9db8dc62020-01-08 14:32:08 -07001811
1812 if (pci_is_bridge(fail_res->dev)) {
1813 idx = res - &fail_res->dev->resource[0];
1814 if (idx >= PCI_BRIDGE_RESOURCES &&
1815 idx <= PCI_BRIDGE_RESOURCE_END)
1816 res->flags = 0;
1817 }
Yinghai Luda7822e2011-05-12 17:11:37 -07001818 }
Yinghai Lubffc56d2012-01-21 02:08:30 -08001819 free_list(&fail_head);
Yinghai Luda7822e2011-05-12 17:11:37 -07001820
1821 goto again;
1822
Yinghai Lu928bea92013-07-22 14:37:17 -07001823dump:
Nicholas Johnson0d607612019-05-07 14:51:24 -05001824 /* Dump the resource on buses */
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001825 pci_bus_dump_resources(bus);
1826}
1827
1828void __init pci_assign_unassigned_resources(void)
1829{
1830 struct pci_bus *root_bus;
1831
Rui Wang584c5c42016-08-17 16:00:34 +08001832 list_for_each_entry(root_bus, &pci_root_buses, node) {
Yinghai Lu55ed83a2013-07-22 14:37:16 -07001833 pci_assign_unassigned_root_bus_resources(root_bus);
Rui Wangd9c149d2016-09-10 23:40:45 +08001834
Nicholas Johnson0d607612019-05-07 14:51:24 -05001835 /* Make sure the root bridge has a companion ACPI device */
Rui Wangd9c149d2016-09-10 23:40:45 +08001836 if (ACPI_HANDLE(root_bus->bridge))
1837 acpi_ioapic_add(ACPI_HANDLE(root_bus->bridge));
Rui Wang584c5c42016-08-17 16:00:34 +08001838 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001839}
Yinghai Lu6841ec62010-01-22 01:02:25 -08001840
Nicholas Johnson1e58f4e2020-01-06 15:47:26 +00001841static void adjust_bridge_window(struct pci_dev *bridge, struct resource *res,
Nicholas Johnson0d607612019-05-07 14:51:24 -05001842 struct list_head *add_list,
Nicholas Johnson3d264da2020-01-06 15:47:05 +00001843 resource_size_t new_size)
Mika Westerberg1a576772017-10-13 21:35:45 +03001844{
Nicholas Johnson94867572020-01-06 15:48:06 +00001845 resource_size_t add_size, size = resource_size(res);
Mika Westerberg1a576772017-10-13 21:35:45 +03001846
1847 if (res->parent)
1848 return;
1849
Nicholas Johnson94867572020-01-06 15:48:06 +00001850 if (!new_size)
Mika Westerberg1a576772017-10-13 21:35:45 +03001851 return;
1852
Nicholas Johnson94867572020-01-06 15:48:06 +00001853 if (new_size > size) {
1854 add_size = new_size - size;
1855 pci_dbg(bridge, "bridge window %pR extended by %pa\n", res,
1856 &add_size);
1857 } else if (new_size < size) {
1858 add_size = size - new_size;
1859 pci_dbg(bridge, "bridge window %pR shrunken by %pa\n", res,
1860 &add_size);
1861 }
1862
Nicholas Johnsonae4611f2020-01-06 15:47:46 +00001863 res->end = res->start + new_size - 1;
1864 remove_from_list(add_list, res);
Mika Westerberg1a576772017-10-13 21:35:45 +03001865}
1866
1867static void pci_bus_distribute_available_resources(struct pci_bus *bus,
Nicholas Johnson0d607612019-05-07 14:51:24 -05001868 struct list_head *add_list,
Nicholas Johnsond555a502020-01-06 15:45:52 +00001869 struct resource io,
1870 struct resource mmio,
1871 struct resource mmio_pref)
Mika Westerberg1a576772017-10-13 21:35:45 +03001872{
Mika Westerberg1a576772017-10-13 21:35:45 +03001873 unsigned int normal_bridges = 0, hotplug_bridges = 0;
1874 struct resource *io_res, *mmio_res, *mmio_pref_res;
1875 struct pci_dev *dev, *bridge = bus->self;
Nicholas Johnsonf924c262020-01-06 15:46:13 +00001876 resource_size_t io_per_hp, mmio_per_hp, mmio_pref_per_hp, align;
Mika Westerberg1a576772017-10-13 21:35:45 +03001877
1878 io_res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0];
1879 mmio_res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1];
1880 mmio_pref_res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2];
1881
1882 /*
Nicholas Johnsonf924c262020-01-06 15:46:13 +00001883 * The alignment of this bridge is yet to be considered, hence it must
1884 * be done now before extending its bridge window.
1885 */
1886 align = pci_resource_alignment(bridge, io_res);
1887 if (!io_res->parent && align)
1888 io.start = min(ALIGN(io.start, align), io.end + 1);
1889
1890 align = pci_resource_alignment(bridge, mmio_res);
1891 if (!mmio_res->parent && align)
1892 mmio.start = min(ALIGN(mmio.start, align), mmio.end + 1);
1893
1894 align = pci_resource_alignment(bridge, mmio_pref_res);
1895 if (!mmio_pref_res->parent && align)
1896 mmio_pref.start = min(ALIGN(mmio_pref.start, align),
1897 mmio_pref.end + 1);
1898
1899 /*
Nicholas Johnsonae4611f2020-01-06 15:47:46 +00001900 * Now that we have adjusted for alignment, update the bridge window
1901 * resources to fill as much remaining resource space as possible.
Mika Westerberg1a576772017-10-13 21:35:45 +03001902 */
Nicholas Johnson1e58f4e2020-01-06 15:47:26 +00001903 adjust_bridge_window(bridge, io_res, add_list, resource_size(&io));
1904 adjust_bridge_window(bridge, mmio_res, add_list, resource_size(&mmio));
1905 adjust_bridge_window(bridge, mmio_pref_res, add_list,
Nicholas Johnson77793852020-01-28 15:57:09 -06001906 resource_size(&mmio_pref));
Mika Westerberg1a576772017-10-13 21:35:45 +03001907
1908 /*
Mika Westerberg1a576772017-10-13 21:35:45 +03001909 * Calculate how many hotplug bridges and normal bridges there
Nicholas Johnson0d607612019-05-07 14:51:24 -05001910 * are on this bus. We will distribute the additional available
Mika Westerberg1a576772017-10-13 21:35:45 +03001911 * resources between hotplug bridges.
1912 */
1913 for_each_pci_bridge(dev, bus) {
1914 if (dev->is_hotplug_bridge)
1915 hotplug_bridges++;
1916 else
1917 normal_bridges++;
1918 }
1919
Nicholas Johnson5c6bcc32019-06-22 11:43:46 -05001920 /*
1921 * There is only one bridge on the bus so it gets all available
1922 * resources which it can then distribute to the possible hotplug
1923 * bridges below.
1924 */
1925 if (hotplug_bridges + normal_bridges == 1) {
1926 dev = list_first_entry(&bus->devices, struct pci_dev, bus_list);
Nicholas Johnson3d67a2d2020-01-06 15:45:32 +00001927 if (dev->subordinate)
Nicholas Johnson5c6bcc32019-06-22 11:43:46 -05001928 pci_bus_distribute_available_resources(dev->subordinate,
Nicholas Johnsond555a502020-01-06 15:45:52 +00001929 add_list, io, mmio, mmio_pref);
Nicholas Johnson5c6bcc32019-06-22 11:43:46 -05001930 return;
1931 }
1932
Nicholas Johnson6a381ea2019-06-22 12:13:50 -05001933 if (hotplug_bridges == 0)
1934 return;
1935
Nicholas Johnson5c6bcc32019-06-22 11:43:46 -05001936 /*
1937 * Calculate the total amount of extra resource space we can
1938 * pass to bridges below this one. This is basically the
1939 * extra space reduced by the minimal required space for the
1940 * non-hotplug bridges.
1941 */
Mika Westerberg1a576772017-10-13 21:35:45 +03001942 for_each_pci_bridge(dev, bus) {
Nicholas Johnsonf924c262020-01-06 15:46:13 +00001943 resource_size_t used_size;
1944 struct resource *res;
Mika Westerberg1a576772017-10-13 21:35:45 +03001945
1946 if (dev->is_hotplug_bridge)
1947 continue;
1948
1949 /*
1950 * Reduce the available resource space by what the
1951 * bridge and devices below it occupy.
1952 */
1953 res = &dev->resource[PCI_BRIDGE_RESOURCES + 0];
Nicholas Johnsonf924c262020-01-06 15:46:13 +00001954 align = pci_resource_alignment(dev, res);
1955 align = align ? ALIGN(io.start, align) - io.start : 0;
1956 used_size = align + resource_size(res);
1957 if (!res->parent)
1958 io.start = min(io.start + used_size, io.end + 1);
Mika Westerberg1a576772017-10-13 21:35:45 +03001959
1960 res = &dev->resource[PCI_BRIDGE_RESOURCES + 1];
Nicholas Johnsonf924c262020-01-06 15:46:13 +00001961 align = pci_resource_alignment(dev, res);
1962 align = align ? ALIGN(mmio.start, align) - mmio.start : 0;
1963 used_size = align + resource_size(res);
1964 if (!res->parent)
1965 mmio.start = min(mmio.start + used_size, mmio.end + 1);
Mika Westerberg1a576772017-10-13 21:35:45 +03001966
1967 res = &dev->resource[PCI_BRIDGE_RESOURCES + 2];
Nicholas Johnsonf924c262020-01-06 15:46:13 +00001968 align = pci_resource_alignment(dev, res);
1969 align = align ? ALIGN(mmio_pref.start, align) -
1970 mmio_pref.start : 0;
1971 used_size = align + resource_size(res);
1972 if (!res->parent)
1973 mmio_pref.start = min(mmio_pref.start + used_size,
1974 mmio_pref.end + 1);
Mika Westerberg1a576772017-10-13 21:35:45 +03001975 }
1976
Nicholas Johnsonf924c262020-01-06 15:46:13 +00001977 io_per_hp = div64_ul(resource_size(&io), hotplug_bridges);
1978 mmio_per_hp = div64_ul(resource_size(&mmio), hotplug_bridges);
1979 mmio_pref_per_hp = div64_ul(resource_size(&mmio_pref),
1980 hotplug_bridges);
1981
Mika Westerberg1a576772017-10-13 21:35:45 +03001982 /*
1983 * Go over devices on this bus and distribute the remaining
1984 * resource space between hotplug bridges.
1985 */
1986 for_each_pci_bridge(dev, bus) {
1987 struct pci_bus *b;
1988
1989 b = dev->subordinate;
Mika Westerberg14fe5952018-05-28 15:47:55 +03001990 if (!b || !dev->is_hotplug_bridge)
Mika Westerberg1a576772017-10-13 21:35:45 +03001991 continue;
1992
Mika Westerberg14fe5952018-05-28 15:47:55 +03001993 /*
1994 * Distribute available extra resources equally between
1995 * hotplug-capable downstream ports taking alignment into
1996 * account.
Mika Westerberg14fe5952018-05-28 15:47:55 +03001997 */
Nicholas Johnsond555a502020-01-06 15:45:52 +00001998 io.end = io.start + io_per_hp - 1;
1999 mmio.end = mmio.start + mmio_per_hp - 1;
2000 mmio_pref.end = mmio_pref.start + mmio_pref_per_hp - 1;
2001
2002 pci_bus_distribute_available_resources(b, add_list, io, mmio,
2003 mmio_pref);
Nicholas Johnsonf924c262020-01-06 15:46:13 +00002004
2005 io.start += io_per_hp;
2006 mmio.start += mmio_per_hp;
2007 mmio_pref.start += mmio_pref_per_hp;
Mika Westerberg1a576772017-10-13 21:35:45 +03002008 }
2009}
2010
Nicholas Johnson0d607612019-05-07 14:51:24 -05002011static void pci_bridge_distribute_available_resources(struct pci_dev *bridge,
2012 struct list_head *add_list)
Mika Westerberg1a576772017-10-13 21:35:45 +03002013{
Nicholas Johnsond555a502020-01-06 15:45:52 +00002014 struct resource available_io, available_mmio, available_mmio_pref;
Mika Westerberg1a576772017-10-13 21:35:45 +03002015
2016 if (!bridge->is_hotplug_bridge)
2017 return;
2018
2019 /* Take the initial extra resources from the hotplug port */
Nicholas Johnsond555a502020-01-06 15:45:52 +00002020 available_io = bridge->resource[PCI_BRIDGE_RESOURCES + 0];
2021 available_mmio = bridge->resource[PCI_BRIDGE_RESOURCES + 1];
2022 available_mmio_pref = bridge->resource[PCI_BRIDGE_RESOURCES + 2];
Mika Westerberg1a576772017-10-13 21:35:45 +03002023
2024 pci_bus_distribute_available_resources(bridge->subordinate,
Nicholas Johnson0d607612019-05-07 14:51:24 -05002025 add_list, available_io,
2026 available_mmio,
2027 available_mmio_pref);
Mika Westerberg1a576772017-10-13 21:35:45 +03002028}
2029
Yinghai Lu6841ec62010-01-22 01:02:25 -08002030void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)
2031{
2032 struct pci_bus *parent = bridge->subordinate;
Nicholas Johnson0d607612019-05-07 14:51:24 -05002033 /* List of resources that want additional resources */
2034 LIST_HEAD(add_list);
2035
Yinghai Lu32180e42010-01-22 01:02:27 -08002036 int tried_times = 0;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08002037 LIST_HEAD(fail_head);
Yinghai Lub9b0bba2012-01-21 02:08:29 -08002038 struct pci_dev_resource *fail_res;
Yinghai Lu6841ec62010-01-22 01:02:25 -08002039 int retval;
2040
Yinghai Lu32180e42010-01-22 01:02:27 -08002041again:
Yinghai Lu8424d752012-01-21 02:08:21 -08002042 __pci_bus_size_bridges(parent, &add_list);
Mika Westerberg1a576772017-10-13 21:35:45 +03002043
2044 /*
Nicholas Johnson0d607612019-05-07 14:51:24 -05002045 * Distribute remaining resources (if any) equally between hotplug
2046 * bridges below. This makes it possible to extend the hierarchy
2047 * later without running out of resources.
Mika Westerberg1a576772017-10-13 21:35:45 +03002048 */
2049 pci_bridge_distribute_available_resources(bridge, &add_list);
2050
Yinghai Lubdc4abe2012-01-21 02:08:27 -08002051 __pci_bridge_assign_resources(bridge, &add_list, &fail_head);
2052 BUG_ON(!list_empty(&add_list));
Yinghai Lu32180e42010-01-22 01:02:27 -08002053 tried_times++;
2054
Yinghai Lubdc4abe2012-01-21 02:08:27 -08002055 if (list_empty(&fail_head))
Yinghai Lu3f579c32010-05-21 14:35:06 -07002056 goto enable_all;
Yinghai Lu32180e42010-01-22 01:02:27 -08002057
2058 if (tried_times >= 2) {
Nicholas Johnson0d607612019-05-07 14:51:24 -05002059 /* Still fail, don't need to try more */
Yinghai Lubffc56d2012-01-21 02:08:30 -08002060 free_list(&fail_head);
Yinghai Lu3f579c32010-05-21 14:35:06 -07002061 goto enable_all;
Yinghai Lu32180e42010-01-22 01:02:27 -08002062 }
2063
2064 printk(KERN_DEBUG "PCI: No. %d try to assign unassigned res\n",
2065 tried_times + 1);
2066
2067 /*
Nicholas Johnson0d607612019-05-07 14:51:24 -05002068 * Try to release leaf bridge's resources that aren't big enough
2069 * to contain child device resources.
Yinghai Lu32180e42010-01-22 01:02:27 -08002070 */
Yinghai Lu61e83cd2013-07-22 14:37:12 -07002071 list_for_each_entry(fail_res, &fail_head, list)
2072 pci_bus_release_bridge_resources(fail_res->dev->bus,
Christian Königcb21bc92017-10-18 15:58:17 +02002073 fail_res->flags & PCI_RES_TYPE_MASK,
Yinghai Lu32180e42010-01-22 01:02:27 -08002074 whole_subtree);
Yinghai Lu61e83cd2013-07-22 14:37:12 -07002075
Nicholas Johnson0d607612019-05-07 14:51:24 -05002076 /* Restore size and flags */
Yinghai Lub9b0bba2012-01-21 02:08:29 -08002077 list_for_each_entry(fail_res, &fail_head, list) {
2078 struct resource *res = fail_res->res;
Logan Gunthorpe9db8dc62020-01-08 14:32:08 -07002079 int idx;
Yinghai Lu32180e42010-01-22 01:02:27 -08002080
Yinghai Lub9b0bba2012-01-21 02:08:29 -08002081 res->start = fail_res->start;
2082 res->end = fail_res->end;
2083 res->flags = fail_res->flags;
Logan Gunthorpe9db8dc62020-01-08 14:32:08 -07002084
2085 if (pci_is_bridge(fail_res->dev)) {
2086 idx = res - &fail_res->dev->resource[0];
2087 if (idx >= PCI_BRIDGE_RESOURCES &&
2088 idx <= PCI_BRIDGE_RESOURCE_END)
2089 res->flags = 0;
2090 }
Yinghai Lu32180e42010-01-22 01:02:27 -08002091 }
Yinghai Lubffc56d2012-01-21 02:08:30 -08002092 free_list(&fail_head);
Yinghai Lu32180e42010-01-22 01:02:27 -08002093
2094 goto again;
Yinghai Lu3f579c32010-05-21 14:35:06 -07002095
2096enable_all:
2097 retval = pci_reenable_device(bridge);
Bjorn Helgaas9fc9eea2013-04-12 11:35:40 -06002098 if (retval)
Frederick Lawler7506dc72018-01-18 12:55:24 -06002099 pci_err(bridge, "Error reenabling bridge (%d)\n", retval);
Yinghai Lu3f579c32010-05-21 14:35:06 -07002100 pci_set_master(bridge);
Yinghai Lu6841ec62010-01-22 01:02:25 -08002101}
2102EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources);
Yinghai Lu9b030882012-01-21 02:08:23 -08002103
Christian König8bb705e2017-10-24 14:40:26 -05002104int pci_reassign_bridge_resources(struct pci_dev *bridge, unsigned long type)
2105{
2106 struct pci_dev_resource *dev_res;
2107 struct pci_dev *next;
2108 LIST_HEAD(saved);
2109 LIST_HEAD(added);
2110 LIST_HEAD(failed);
2111 unsigned int i;
2112 int ret;
2113
Benjamin Herrenschmidtfb794a72019-09-25 11:16:55 +10002114 down_read(&pci_bus_sem);
2115
Christian König8bb705e2017-10-24 14:40:26 -05002116 /* Walk to the root hub, releasing bridge BARs when possible */
2117 next = bridge;
2118 do {
2119 bridge = next;
2120 for (i = PCI_BRIDGE_RESOURCES; i < PCI_BRIDGE_RESOURCE_END;
2121 i++) {
2122 struct resource *res = &bridge->resource[i];
2123
2124 if ((res->flags ^ type) & PCI_RES_TYPE_MASK)
2125 continue;
2126
2127 /* Ignore BARs which are still in use */
2128 if (res->child)
2129 continue;
2130
2131 ret = add_to_list(&saved, bridge, res, 0, 0);
2132 if (ret)
2133 goto cleanup;
2134
Frederick Lawler7506dc72018-01-18 12:55:24 -06002135 pci_info(bridge, "BAR %d: releasing %pR\n",
Christian König8bb705e2017-10-24 14:40:26 -05002136 i, res);
2137
2138 if (res->parent)
2139 release_resource(res);
2140 res->start = 0;
2141 res->end = 0;
2142 break;
2143 }
2144 if (i == PCI_BRIDGE_RESOURCE_END)
2145 break;
2146
2147 next = bridge->bus ? bridge->bus->self : NULL;
2148 } while (next);
2149
Benjamin Herrenschmidtfb794a72019-09-25 11:16:55 +10002150 if (list_empty(&saved)) {
2151 up_read(&pci_bus_sem);
Christian König8bb705e2017-10-24 14:40:26 -05002152 return -ENOENT;
Benjamin Herrenschmidtfb794a72019-09-25 11:16:55 +10002153 }
Christian König8bb705e2017-10-24 14:40:26 -05002154
2155 __pci_bus_size_bridges(bridge->subordinate, &added);
2156 __pci_bridge_assign_resources(bridge, &added, &failed);
2157 BUG_ON(!list_empty(&added));
2158
2159 if (!list_empty(&failed)) {
2160 ret = -ENOSPC;
2161 goto cleanup;
2162 }
2163
2164 list_for_each_entry(dev_res, &saved, list) {
Nicholas Johnson0d607612019-05-07 14:51:24 -05002165 /* Skip the bridge we just assigned resources for */
Christian König8bb705e2017-10-24 14:40:26 -05002166 if (bridge == dev_res->dev)
2167 continue;
2168
2169 bridge = dev_res->dev;
2170 pci_setup_bridge(bridge->subordinate);
2171 }
2172
2173 free_list(&saved);
Benjamin Herrenschmidtfb794a72019-09-25 11:16:55 +10002174 up_read(&pci_bus_sem);
Christian König8bb705e2017-10-24 14:40:26 -05002175 return 0;
2176
2177cleanup:
Nicholas Johnson0d607612019-05-07 14:51:24 -05002178 /* Restore size and flags */
Christian König8bb705e2017-10-24 14:40:26 -05002179 list_for_each_entry(dev_res, &failed, list) {
2180 struct resource *res = dev_res->res;
2181
2182 res->start = dev_res->start;
2183 res->end = dev_res->end;
2184 res->flags = dev_res->flags;
2185 }
2186 free_list(&failed);
2187
2188 /* Revert to the old configuration */
2189 list_for_each_entry(dev_res, &saved, list) {
2190 struct resource *res = dev_res->res;
2191
2192 bridge = dev_res->dev;
2193 i = res - bridge->resource;
2194
2195 res->start = dev_res->start;
2196 res->end = dev_res->end;
2197 res->flags = dev_res->flags;
2198
2199 pci_claim_resource(bridge, i);
2200 pci_setup_bridge(bridge->subordinate);
2201 }
2202 free_list(&saved);
Benjamin Herrenschmidtfb794a72019-09-25 11:16:55 +10002203 up_read(&pci_bus_sem);
Christian König8bb705e2017-10-24 14:40:26 -05002204
2205 return ret;
2206}
2207
Yinghai Lu17787942012-10-30 14:31:10 -06002208void pci_assign_unassigned_bus_resources(struct pci_bus *bus)
Yinghai Lu9b030882012-01-21 02:08:23 -08002209{
Yinghai Lu9b030882012-01-21 02:08:23 -08002210 struct pci_dev *dev;
Nicholas Johnson0d607612019-05-07 14:51:24 -05002211 /* List of resources that want additional resources */
2212 LIST_HEAD(add_list);
Yinghai Lu9b030882012-01-21 02:08:23 -08002213
Yinghai Lu9b030882012-01-21 02:08:23 -08002214 down_read(&pci_bus_sem);
Andy Shevchenko24a0c652017-10-20 15:38:54 -05002215 for_each_pci_bridge(dev, bus)
2216 if (pci_has_subordinate(dev))
2217 __pci_bus_size_bridges(dev->subordinate, &add_list);
Yinghai Lu9b030882012-01-21 02:08:23 -08002218 up_read(&pci_bus_sem);
2219 __pci_bus_assign_resources(bus, &add_list, NULL);
Yinghai Lubdc4abe2012-01-21 02:08:27 -08002220 BUG_ON(!list_empty(&add_list));
Yinghai Lu17787942012-10-30 14:31:10 -06002221}
Ray Juie6b29de2015-04-08 11:21:33 -07002222EXPORT_SYMBOL_GPL(pci_assign_unassigned_bus_resources);