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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Saeed Mahameed74862162016-06-09 15:11:34 +0300150 MLX5_CMD_OP_SET_RATE_LIMIT = 0x780,
151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
203 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
204 MLX5_CMD_OP_QUERY_RQ = 0x90b,
205 MLX5_CMD_OP_CREATE_RMP = 0x90c,
206 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
207 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
208 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300209 MLX5_CMD_OP_CREATE_TIS = 0x912,
210 MLX5_CMD_OP_MODIFY_TIS = 0x913,
211 MLX5_CMD_OP_DESTROY_TIS = 0x914,
212 MLX5_CMD_OP_QUERY_TIS = 0x915,
213 MLX5_CMD_OP_CREATE_RQT = 0x916,
214 MLX5_CMD_OP_MODIFY_RQT = 0x917,
215 MLX5_CMD_OP_DESTROY_RQT = 0x918,
216 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200217 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300218 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
219 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
220 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
221 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
222 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
223 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
224 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
225 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200226 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000227 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
228 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
229 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300230 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300231 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
232 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200233 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
234 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Shahar Klein86d56a12016-06-10 00:07:30 +0300235 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300236};
237
238struct mlx5_ifc_flow_table_fields_supported_bits {
239 u8 outer_dmac[0x1];
240 u8 outer_smac[0x1];
241 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300242 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300243 u8 outer_first_prio[0x1];
244 u8 outer_first_cfi[0x1];
245 u8 outer_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200246 u8 reserved_at_7[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300247 u8 outer_second_prio[0x1];
248 u8 outer_second_cfi[0x1];
249 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200250 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300251 u8 outer_sip[0x1];
252 u8 outer_dip[0x1];
253 u8 outer_frag[0x1];
254 u8 outer_ip_protocol[0x1];
255 u8 outer_ip_ecn[0x1];
256 u8 outer_ip_dscp[0x1];
257 u8 outer_udp_sport[0x1];
258 u8 outer_udp_dport[0x1];
259 u8 outer_tcp_sport[0x1];
260 u8 outer_tcp_dport[0x1];
261 u8 outer_tcp_flags[0x1];
262 u8 outer_gre_protocol[0x1];
263 u8 outer_gre_key[0x1];
264 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200265 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300266 u8 source_eswitch_port[0x1];
267
268 u8 inner_dmac[0x1];
269 u8 inner_smac[0x1];
270 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300271 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300272 u8 inner_first_prio[0x1];
273 u8 inner_first_cfi[0x1];
274 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200275 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300276 u8 inner_second_prio[0x1];
277 u8 inner_second_cfi[0x1];
278 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200279 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300280 u8 inner_sip[0x1];
281 u8 inner_dip[0x1];
282 u8 inner_frag[0x1];
283 u8 inner_ip_protocol[0x1];
284 u8 inner_ip_ecn[0x1];
285 u8 inner_ip_dscp[0x1];
286 u8 inner_udp_sport[0x1];
287 u8 inner_udp_dport[0x1];
288 u8 inner_tcp_sport[0x1];
289 u8 inner_tcp_dport[0x1];
290 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200291 u8 reserved_at_37[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +0300292
Matan Barakb4ff3a32016-02-09 14:57:42 +0200293 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300294};
295
296struct mlx5_ifc_flow_table_prop_layout_bits {
297 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000298 u8 reserved_at_1[0x1];
299 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200300 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200301 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200302 u8 identified_miss_table_mode[0x1];
303 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300304 u8 encap[0x1];
305 u8 decap[0x1];
306 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300307
Matan Barakb4ff3a32016-02-09 14:57:42 +0200308 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300309 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200310 u8 log_max_modify_header_context[0x8];
311 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300312 u8 max_ft_level[0x8];
313
Matan Barakb4ff3a32016-02-09 14:57:42 +0200314 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300315
Matan Barakb4ff3a32016-02-09 14:57:42 +0200316 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200317 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300318
Matan Barakb4ff3a32016-02-09 14:57:42 +0200319 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200320 u8 log_max_destination[0x8];
321
Matan Barakb4ff3a32016-02-09 14:57:42 +0200322 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323 u8 log_max_flow[0x8];
324
Matan Barakb4ff3a32016-02-09 14:57:42 +0200325 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300326
327 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
328
329 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
330};
331
332struct mlx5_ifc_odp_per_transport_service_cap_bits {
333 u8 send[0x1];
334 u8 receive[0x1];
335 u8 write[0x1];
336 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200337 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300338 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200339 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300340};
341
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200342struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200343 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200344
345 u8 ipv4[0x20];
346};
347
348struct mlx5_ifc_ipv6_layout_bits {
349 u8 ipv6[16][0x8];
350};
351
352union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
353 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
354 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200355 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200356};
357
Saeed Mahameede2816822015-05-28 22:28:40 +0300358struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
359 u8 smac_47_16[0x20];
360
361 u8 smac_15_0[0x10];
362 u8 ethertype[0x10];
363
364 u8 dmac_47_16[0x20];
365
366 u8 dmac_15_0[0x10];
367 u8 first_prio[0x3];
368 u8 first_cfi[0x1];
369 u8 first_vid[0xc];
370
371 u8 ip_protocol[0x8];
372 u8 ip_dscp[0x6];
373 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300374 u8 cvlan_tag[0x1];
375 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300376 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300377 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300378 u8 tcp_flags[0x9];
379
380 u8 tcp_sport[0x10];
381 u8 tcp_dport[0x10];
382
Matan Barakb4ff3a32016-02-09 14:57:42 +0200383 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300384
385 u8 udp_sport[0x10];
386 u8 udp_dport[0x10];
387
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200388 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300389
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200390 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300391};
392
393struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300394 u8 reserved_at_0[0x8];
395 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300396
Matan Barakb4ff3a32016-02-09 14:57:42 +0200397 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300398 u8 source_port[0x10];
399
400 u8 outer_second_prio[0x3];
401 u8 outer_second_cfi[0x1];
402 u8 outer_second_vid[0xc];
403 u8 inner_second_prio[0x3];
404 u8 inner_second_cfi[0x1];
405 u8 inner_second_vid[0xc];
406
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300407 u8 outer_second_cvlan_tag[0x1];
408 u8 inner_second_cvlan_tag[0x1];
409 u8 outer_second_svlan_tag[0x1];
410 u8 inner_second_svlan_tag[0x1];
411 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300412 u8 gre_protocol[0x10];
413
414 u8 gre_key_h[0x18];
415 u8 gre_key_l[0x8];
416
417 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200418 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300419
Matan Barakb4ff3a32016-02-09 14:57:42 +0200420 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300421
Matan Barakb4ff3a32016-02-09 14:57:42 +0200422 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300423 u8 outer_ipv6_flow_label[0x14];
424
Matan Barakb4ff3a32016-02-09 14:57:42 +0200425 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300426 u8 inner_ipv6_flow_label[0x14];
427
Matan Barakb4ff3a32016-02-09 14:57:42 +0200428 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300429};
430
431struct mlx5_ifc_cmd_pas_bits {
432 u8 pa_h[0x20];
433
434 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200435 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300436};
437
438struct mlx5_ifc_uint64_bits {
439 u8 hi[0x20];
440
441 u8 lo[0x20];
442};
443
444enum {
445 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
446 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
447 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
448 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
449 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
450 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
451 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
452 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
453 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
454 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
455};
456
457struct mlx5_ifc_ads_bits {
458 u8 fl[0x1];
459 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200460 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300461 u8 pkey_index[0x10];
462
Matan Barakb4ff3a32016-02-09 14:57:42 +0200463 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300464 u8 grh[0x1];
465 u8 mlid[0x7];
466 u8 rlid[0x10];
467
468 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200469 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300470 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200471 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300472 u8 stat_rate[0x4];
473 u8 hop_limit[0x8];
474
Matan Barakb4ff3a32016-02-09 14:57:42 +0200475 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300476 u8 tclass[0x8];
477 u8 flow_label[0x14];
478
479 u8 rgid_rip[16][0x8];
480
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 f_dscp[0x1];
483 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200484 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300485 u8 f_eth_prio[0x1];
486 u8 ecn[0x2];
487 u8 dscp[0x6];
488 u8 udp_sport[0x10];
489
490 u8 dei_cfi[0x1];
491 u8 eth_prio[0x3];
492 u8 sl[0x4];
493 u8 port[0x8];
494 u8 rmac_47_32[0x10];
495
496 u8 rmac_31_0[0x20];
497};
498
499struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200500 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300501 u8 nic_rx_multi_path_tirs_fts[0x1];
502 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
503 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300504
505 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
506
Matan Barakb4ff3a32016-02-09 14:57:42 +0200507 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300508
509 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
510
511 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
512
Matan Barakb4ff3a32016-02-09 14:57:42 +0200513 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300514
515 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
516
Matan Barakb4ff3a32016-02-09 14:57:42 +0200517 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300518};
519
Saeed Mahameed495716b2015-12-01 18:03:19 +0200520struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200521 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200522
523 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
524
525 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
526
527 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
528
Matan Barakb4ff3a32016-02-09 14:57:42 +0200529 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200530};
531
Saeed Mahameedd6666752015-12-01 18:03:22 +0200532struct mlx5_ifc_e_switch_cap_bits {
533 u8 vport_svlan_strip[0x1];
534 u8 vport_cvlan_strip[0x1];
535 u8 vport_svlan_insert[0x1];
536 u8 vport_cvlan_insert_if_not_exist[0x1];
537 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300538 u8 reserved_at_5[0x19];
539 u8 nic_vport_node_guid_modify[0x1];
540 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200541
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300542 u8 vxlan_encap_decap[0x1];
543 u8 nvgre_encap_decap[0x1];
544 u8 reserved_at_22[0x9];
545 u8 log_max_encap_headers[0x5];
546 u8 reserved_2b[0x6];
547 u8 max_encap_header_size[0xa];
548
549 u8 reserved_40[0x7c0];
550
Saeed Mahameedd6666752015-12-01 18:03:22 +0200551};
552
Saeed Mahameed74862162016-06-09 15:11:34 +0300553struct mlx5_ifc_qos_cap_bits {
554 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300555 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200556 u8 esw_bw_share[0x1];
557 u8 esw_rate_limit[0x1];
558 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300559
560 u8 reserved_at_20[0x20];
561
Saeed Mahameed74862162016-06-09 15:11:34 +0300562 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300563
Saeed Mahameed74862162016-06-09 15:11:34 +0300564 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300565
566 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300567 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300568
569 u8 esw_element_type[0x10];
570 u8 esw_tsar_type[0x10];
571
572 u8 reserved_at_c0[0x10];
573 u8 max_qos_para_vport[0x10];
574
575 u8 max_tsar_bw_share[0x20];
576
577 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300578};
579
Saeed Mahameede2816822015-05-28 22:28:40 +0300580struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
581 u8 csum_cap[0x1];
582 u8 vlan_cap[0x1];
583 u8 lro_cap[0x1];
584 u8 lro_psh_flag[0x1];
585 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200586 u8 reserved_at_5[0x2];
587 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200588 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200589 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300590 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200591 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300592 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300593 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300594 u8 reg_umr_sq[0x1];
595 u8 scatter_fcs[0x1];
596 u8 reserved_at_1a[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300597 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200598 u8 reserved_at_1c[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300599 u8 tunnel_statless_gre[0x1];
600 u8 tunnel_stateless_vxlan[0x1];
601
Matan Barakb4ff3a32016-02-09 14:57:42 +0200602 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300603
Matan Barakb4ff3a32016-02-09 14:57:42 +0200604 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300605 u8 lro_min_mss_size[0x10];
606
Matan Barakb4ff3a32016-02-09 14:57:42 +0200607 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300608
609 u8 lro_timer_supported_periods[4][0x20];
610
Matan Barakb4ff3a32016-02-09 14:57:42 +0200611 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300612};
613
614struct mlx5_ifc_roce_cap_bits {
615 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200616 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300617
Matan Barakb4ff3a32016-02-09 14:57:42 +0200618 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300619
Matan Barakb4ff3a32016-02-09 14:57:42 +0200620 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300621 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200622 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300623 u8 roce_version[0x8];
624
Matan Barakb4ff3a32016-02-09 14:57:42 +0200625 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300626 u8 r_roce_dest_udp_port[0x10];
627
628 u8 r_roce_max_src_udp_port[0x10];
629 u8 r_roce_min_src_udp_port[0x10];
630
Matan Barakb4ff3a32016-02-09 14:57:42 +0200631 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300632 u8 roce_address_table_size[0x10];
633
Matan Barakb4ff3a32016-02-09 14:57:42 +0200634 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300635};
636
637enum {
638 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
639 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
640 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
641 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
642 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
643 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
644 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
645 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
646 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
647};
648
649enum {
650 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
651 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
652 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
653 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
654 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
656 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
657 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
658 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
659};
660
661struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200662 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300663
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200664 u8 atomic_req_8B_endianess_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200665 u8 reserved_at_42[0x4];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200666 u8 supported_atomic_req_8B_endianess_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300667
Matan Barakb4ff3a32016-02-09 14:57:42 +0200668 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300669
Matan Barakb4ff3a32016-02-09 14:57:42 +0200670 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300671
Matan Barakb4ff3a32016-02-09 14:57:42 +0200672 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200673 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300674
Matan Barakb4ff3a32016-02-09 14:57:42 +0200675 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200676 u8 atomic_size_qp[0x10];
677
Matan Barakb4ff3a32016-02-09 14:57:42 +0200678 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300679 u8 atomic_size_dc[0x10];
680
Matan Barakb4ff3a32016-02-09 14:57:42 +0200681 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300682};
683
684struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200685 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300686
687 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200688 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300689
Matan Barakb4ff3a32016-02-09 14:57:42 +0200690 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300691
692 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
693
694 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
695
696 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
697
Matan Barakb4ff3a32016-02-09 14:57:42 +0200698 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300699};
700
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200701struct mlx5_ifc_calc_op {
702 u8 reserved_at_0[0x10];
703 u8 reserved_at_10[0x9];
704 u8 op_swap_endianness[0x1];
705 u8 op_min[0x1];
706 u8 op_xor[0x1];
707 u8 op_or[0x1];
708 u8 op_and[0x1];
709 u8 op_max[0x1];
710 u8 op_add[0x1];
711};
712
713struct mlx5_ifc_vector_calc_cap_bits {
714 u8 calc_matrix[0x1];
715 u8 reserved_at_1[0x1f];
716 u8 reserved_at_20[0x8];
717 u8 max_vec_count[0x8];
718 u8 reserved_at_30[0xd];
719 u8 max_chunk_size[0x3];
720 struct mlx5_ifc_calc_op calc0;
721 struct mlx5_ifc_calc_op calc1;
722 struct mlx5_ifc_calc_op calc2;
723 struct mlx5_ifc_calc_op calc3;
724
725 u8 reserved_at_e0[0x720];
726};
727
Saeed Mahameede2816822015-05-28 22:28:40 +0300728enum {
729 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
730 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300731 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +0300732};
733
734enum {
735 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
736 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
737};
738
739enum {
740 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
741 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
742 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
743 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
744 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
745};
746
747enum {
748 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
749 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
750 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
751 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
752 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
753 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
754};
755
756enum {
757 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
758 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
759};
760
761enum {
762 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
763 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
764 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
765};
766
767enum {
768 MLX5_CAP_PORT_TYPE_IB = 0x0,
769 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300770};
771
Max Gurtovoy1410a902017-05-28 10:53:10 +0300772enum {
773 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
774 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
775 MLX5_CAP_UMR_FENCE_NONE = 0x2,
776};
777
Eli Cohenb7755162014-10-02 12:19:44 +0300778struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200779 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300780
781 u8 log_max_srq_sz[0x8];
782 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200783 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300784 u8 log_max_qp[0x5];
785
Matan Barakb4ff3a32016-02-09 14:57:42 +0200786 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300787 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200788 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300789
Matan Barakb4ff3a32016-02-09 14:57:42 +0200790 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300791 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200792 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300793 u8 log_max_cq[0x5];
794
795 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200796 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300797 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200798 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300799 u8 log_max_eq[0x4];
800
801 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200802 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300803 u8 log_max_mrw_sz[0x7];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200804 u8 reserved_at_110[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300805 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200806 u8 umr_extended_translation_offset[0x1];
807 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300808 u8 log_max_klm_list_size[0x6];
809
Matan Barakb4ff3a32016-02-09 14:57:42 +0200810 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300811 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200812 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300813 u8 log_max_ra_res_dc[0x6];
814
Matan Barakb4ff3a32016-02-09 14:57:42 +0200815 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300816 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200817 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300818 u8 log_max_ra_res_qp[0x6];
819
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200820 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300821 u8 cc_query_allowed[0x1];
822 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200823 u8 start_pad[0x1];
824 u8 cache_line_128byte[0x1];
825 u8 reserved_at_163[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300826 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300827
Saeed Mahameede2816822015-05-28 22:28:40 +0300828 u8 out_of_seq_cnt[0x1];
829 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300830 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300831 u8 reserved_at_183[0x1];
832 u8 modify_rq_counter_set_id[0x1];
833 u8 reserved_at_185[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300834 u8 max_qp_cnt[0xa];
835 u8 pkey_table_size[0x10];
836
Saeed Mahameede2816822015-05-28 22:28:40 +0300837 u8 vport_group_manager[0x1];
838 u8 vhca_group_manager[0x1];
839 u8 ib_virt[0x1];
840 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200841 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300842 u8 ets[0x1];
843 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200844 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300845 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200846 u8 mcam_reg[0x1];
847 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300848 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200849 u8 port_module_event[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200850 u8 reserved_at_1b1[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300851 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200852 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300853 u8 disable_link_up[0x1];
854 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300855 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300856 u8 num_ports[0x8];
857
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300858 u8 reserved_at_1c0[0x1];
859 u8 pps[0x1];
860 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300861 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300862 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200863 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300864 u8 reserved_at_1d0[0x1];
865 u8 dcbx[0x1];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200866 u8 reserved_at_1d2[0x3];
867 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200868 u8 rol_s[0x1];
869 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300870 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200871 u8 wol_s[0x1];
872 u8 wol_g[0x1];
873 u8 wol_a[0x1];
874 u8 wol_b[0x1];
875 u8 wol_m[0x1];
876 u8 wol_u[0x1];
877 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300878
879 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300880 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300881 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300882
Saeed Mahameede2816822015-05-28 22:28:40 +0300883 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300884 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300885 u8 reserved_at_202[0x1];
886 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200887 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300888 u8 reserved_at_205[0x5];
889 u8 umr_fence[0x2];
890 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300891 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300892 u8 cmdif_checksum[0x2];
893 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300894 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300895 u8 wq_signature[0x1];
896 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300897 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300898 u8 sho[0x1];
899 u8 tph[0x1];
900 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300901 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300902 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300903 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300904 u8 roce[0x1];
905 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300906 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300907
908 u8 cq_oi[0x1];
909 u8 cq_resize[0x1];
910 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300911 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300912 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300913 u8 pg[0x1];
914 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300915 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300916 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300917 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300918 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300919 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300920 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200921 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300922 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200923 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300924 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300925 u8 qkv[0x1];
926 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200927 u8 set_deth_sqpn[0x1];
928 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300929 u8 xrc[0x1];
930 u8 ud[0x1];
931 u8 uc[0x1];
932 u8 rc[0x1];
933
Eli Cohena6d51b62017-01-03 23:55:23 +0200934 u8 uar_4k[0x1];
935 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300936 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300937 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300938 u8 log_pg_sz[0x8];
939
940 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200941 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300942 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300943 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300944 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300945
946 u8 reserved_at_270[0xb];
947 u8 lag_master[0x1];
948 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300949
Tariq Toukane1c9c622016-04-11 23:10:21 +0300950 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300951 u8 max_wqe_sz_sq[0x10];
952
Tariq Toukane1c9c622016-04-11 23:10:21 +0300953 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300954 u8 max_wqe_sz_rq[0x10];
955
Tariq Toukane1c9c622016-04-11 23:10:21 +0300956 u8 reserved_at_2c0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300957 u8 max_wqe_sz_sq_dc[0x10];
958
Tariq Toukane1c9c622016-04-11 23:10:21 +0300959 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300960 u8 max_qp_mcg[0x19];
961
Tariq Toukane1c9c622016-04-11 23:10:21 +0300962 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300963 u8 log_max_mcg[0x8];
964
Tariq Toukane1c9c622016-04-11 23:10:21 +0300965 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300966 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300967 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300968 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300969 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300970 u8 log_max_xrcd[0x5];
971
Amir Vadaia351a1b02016-07-14 10:32:38 +0300972 u8 reserved_at_340[0x8];
973 u8 log_max_flow_counter_bulk[0x8];
974 u8 max_flow_counter[0x10];
975
Eli Cohenb7755162014-10-02 12:19:44 +0300976
Tariq Toukane1c9c622016-04-11 23:10:21 +0300977 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300978 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300979 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300980 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300981 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300982 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300983 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300984 u8 log_max_tis[0x5];
985
Saeed Mahameede2816822015-05-28 22:28:40 +0300986 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300987 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300988 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300989 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300990 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300991 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300992 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300993 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300994 u8 log_max_tis_per_sq[0x5];
995
Tariq Toukane1c9c622016-04-11 23:10:21 +0300996 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300997 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300998 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300999 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001000 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001001 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001002 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001003 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001004
Tariq Toukane1c9c622016-04-11 23:10:21 +03001005 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03001006 u8 log_max_wq_sz[0x5];
1007
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001008 u8 nic_vport_change_event[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001009 u8 reserved_at_3e1[0xa];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001010 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001011 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001012 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001013 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001014 u8 log_max_current_uc_list[0x5];
1015
Tariq Toukane1c9c622016-04-11 23:10:21 +03001016 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001017
Tariq Toukane1c9c622016-04-11 23:10:21 +03001018 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001019 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001020 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001021 u8 log_uar_page_sz[0x10];
1022
Tariq Toukane1c9c622016-04-11 23:10:21 +03001023 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001024 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001025 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001026
Eli Cohena6d51b62017-01-03 23:55:23 +02001027 u8 reserved_at_500[0x20];
1028 u8 num_of_uars_per_page[0x20];
1029 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001030
1031 u8 reserved_at_580[0x3f];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001032 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001033
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001034 u8 cqe_compression_timeout[0x10];
1035 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001036
Saeed Mahameed74862162016-06-09 15:11:34 +03001037 u8 reserved_at_5e0[0x10];
1038 u8 tag_matching[0x1];
1039 u8 rndv_offload_rc[0x1];
1040 u8 rndv_offload_dc[0x1];
1041 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001042 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001043 u8 log_max_xrq[0x5];
1044
Max Gurtovoy7b135582017-01-02 11:37:38 +02001045 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001046};
1047
Saeed Mahameed81848732015-12-01 18:03:20 +02001048enum mlx5_flow_destination_type {
1049 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1050 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1051 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001052
1053 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001054};
1055
1056struct mlx5_ifc_dest_format_struct_bits {
1057 u8 destination_type[0x8];
1058 u8 destination_id[0x18];
1059
Matan Barakb4ff3a32016-02-09 14:57:42 +02001060 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001061};
1062
Amir Vadai9dc0b282016-05-13 12:55:39 +00001063struct mlx5_ifc_flow_counter_list_bits {
Amir Vadaia351a1b02016-07-14 10:32:38 +03001064 u8 clear[0x1];
1065 u8 num_of_counters[0xf];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001066 u8 flow_counter_id[0x10];
1067
1068 u8 reserved_at_20[0x20];
1069};
1070
1071union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1072 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1073 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1074 u8 reserved_at_0[0x40];
1075};
1076
Saeed Mahameede2816822015-05-28 22:28:40 +03001077struct mlx5_ifc_fte_match_param_bits {
1078 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1079
1080 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1081
1082 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1083
Matan Barakb4ff3a32016-02-09 14:57:42 +02001084 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001085};
1086
1087enum {
1088 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1089 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1090 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1091 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1092 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1093};
1094
1095struct mlx5_ifc_rx_hash_field_select_bits {
1096 u8 l3_prot_type[0x1];
1097 u8 l4_prot_type[0x1];
1098 u8 selected_fields[0x1e];
1099};
1100
1101enum {
1102 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1103 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1104};
1105
1106enum {
1107 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1108 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1109};
1110
1111struct mlx5_ifc_wq_bits {
1112 u8 wq_type[0x4];
1113 u8 wq_signature[0x1];
1114 u8 end_padding_mode[0x2];
1115 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001116 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001117
1118 u8 hds_skip_first_sge[0x1];
1119 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001120 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001121 u8 page_offset[0x5];
1122 u8 lwm[0x10];
1123
Matan Barakb4ff3a32016-02-09 14:57:42 +02001124 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001125 u8 pd[0x18];
1126
Matan Barakb4ff3a32016-02-09 14:57:42 +02001127 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001128 u8 uar_page[0x18];
1129
1130 u8 dbr_addr[0x40];
1131
1132 u8 hw_counter[0x20];
1133
1134 u8 sw_counter[0x20];
1135
Matan Barakb4ff3a32016-02-09 14:57:42 +02001136 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001137 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001138 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001139 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001140 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001141 u8 log_wq_sz[0x5];
1142
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001143 u8 reserved_at_120[0x15];
1144 u8 log_wqe_num_of_strides[0x3];
1145 u8 two_byte_shift_en[0x1];
1146 u8 reserved_at_139[0x4];
1147 u8 log_wqe_stride_size[0x3];
1148
1149 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001150
1151 struct mlx5_ifc_cmd_pas_bits pas[0];
1152};
1153
1154struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001155 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001156 u8 rq_num[0x18];
1157};
1158
1159struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001160 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001161 u8 mac_addr_47_32[0x10];
1162
1163 u8 mac_addr_31_0[0x20];
1164};
1165
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001166struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001167 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001168 u8 vlan[0x0c];
1169
Matan Barakb4ff3a32016-02-09 14:57:42 +02001170 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001171};
1172
Saeed Mahameede2816822015-05-28 22:28:40 +03001173struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001174 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001175
1176 u8 min_time_between_cnps[0x20];
1177
Matan Barakb4ff3a32016-02-09 14:57:42 +02001178 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001179 u8 cnp_dscp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001180 u8 reserved_at_d8[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001181 u8 cnp_802p_prio[0x3];
1182
Matan Barakb4ff3a32016-02-09 14:57:42 +02001183 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001184};
1185
1186struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001187 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001188
Matan Barakb4ff3a32016-02-09 14:57:42 +02001189 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001190 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001191 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001192 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001193 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001194
Matan Barakb4ff3a32016-02-09 14:57:42 +02001195 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001196
1197 u8 rpg_time_reset[0x20];
1198
1199 u8 rpg_byte_reset[0x20];
1200
1201 u8 rpg_threshold[0x20];
1202
1203 u8 rpg_max_rate[0x20];
1204
1205 u8 rpg_ai_rate[0x20];
1206
1207 u8 rpg_hai_rate[0x20];
1208
1209 u8 rpg_gd[0x20];
1210
1211 u8 rpg_min_dec_fac[0x20];
1212
1213 u8 rpg_min_rate[0x20];
1214
Matan Barakb4ff3a32016-02-09 14:57:42 +02001215 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001216
1217 u8 rate_to_set_on_first_cnp[0x20];
1218
1219 u8 dce_tcp_g[0x20];
1220
1221 u8 dce_tcp_rtt[0x20];
1222
1223 u8 rate_reduce_monitor_period[0x20];
1224
Matan Barakb4ff3a32016-02-09 14:57:42 +02001225 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001226
1227 u8 initial_alpha_value[0x20];
1228
Matan Barakb4ff3a32016-02-09 14:57:42 +02001229 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001230};
1231
1232struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001233 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001234
1235 u8 rppp_max_rps[0x20];
1236
1237 u8 rpg_time_reset[0x20];
1238
1239 u8 rpg_byte_reset[0x20];
1240
1241 u8 rpg_threshold[0x20];
1242
1243 u8 rpg_max_rate[0x20];
1244
1245 u8 rpg_ai_rate[0x20];
1246
1247 u8 rpg_hai_rate[0x20];
1248
1249 u8 rpg_gd[0x20];
1250
1251 u8 rpg_min_dec_fac[0x20];
1252
1253 u8 rpg_min_rate[0x20];
1254
Matan Barakb4ff3a32016-02-09 14:57:42 +02001255 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001256};
1257
1258enum {
1259 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1260 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1261 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1262};
1263
1264struct mlx5_ifc_resize_field_select_bits {
1265 u8 resize_field_select[0x20];
1266};
1267
1268enum {
1269 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1270 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1271 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1272 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1273};
1274
1275struct mlx5_ifc_modify_field_select_bits {
1276 u8 modify_field_select[0x20];
1277};
1278
1279struct mlx5_ifc_field_select_r_roce_np_bits {
1280 u8 field_select_r_roce_np[0x20];
1281};
1282
1283struct mlx5_ifc_field_select_r_roce_rp_bits {
1284 u8 field_select_r_roce_rp[0x20];
1285};
1286
1287enum {
1288 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1289 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1290 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1291 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1292 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1293 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1294 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1295 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1296 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1297 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1298};
1299
1300struct mlx5_ifc_field_select_802_1qau_rp_bits {
1301 u8 field_select_8021qaurp[0x20];
1302};
1303
1304struct mlx5_ifc_phys_layer_cntrs_bits {
1305 u8 time_since_last_clear_high[0x20];
1306
1307 u8 time_since_last_clear_low[0x20];
1308
1309 u8 symbol_errors_high[0x20];
1310
1311 u8 symbol_errors_low[0x20];
1312
1313 u8 sync_headers_errors_high[0x20];
1314
1315 u8 sync_headers_errors_low[0x20];
1316
1317 u8 edpl_bip_errors_lane0_high[0x20];
1318
1319 u8 edpl_bip_errors_lane0_low[0x20];
1320
1321 u8 edpl_bip_errors_lane1_high[0x20];
1322
1323 u8 edpl_bip_errors_lane1_low[0x20];
1324
1325 u8 edpl_bip_errors_lane2_high[0x20];
1326
1327 u8 edpl_bip_errors_lane2_low[0x20];
1328
1329 u8 edpl_bip_errors_lane3_high[0x20];
1330
1331 u8 edpl_bip_errors_lane3_low[0x20];
1332
1333 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1334
1335 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1336
1337 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1338
1339 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1340
1341 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1342
1343 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1344
1345 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1346
1347 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1348
1349 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1350
1351 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1352
1353 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1354
1355 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1356
1357 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1358
1359 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1360
1361 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1362
1363 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1364
1365 u8 rs_fec_corrected_blocks_high[0x20];
1366
1367 u8 rs_fec_corrected_blocks_low[0x20];
1368
1369 u8 rs_fec_uncorrectable_blocks_high[0x20];
1370
1371 u8 rs_fec_uncorrectable_blocks_low[0x20];
1372
1373 u8 rs_fec_no_errors_blocks_high[0x20];
1374
1375 u8 rs_fec_no_errors_blocks_low[0x20];
1376
1377 u8 rs_fec_single_error_blocks_high[0x20];
1378
1379 u8 rs_fec_single_error_blocks_low[0x20];
1380
1381 u8 rs_fec_corrected_symbols_total_high[0x20];
1382
1383 u8 rs_fec_corrected_symbols_total_low[0x20];
1384
1385 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1386
1387 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1388
1389 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1390
1391 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1392
1393 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1394
1395 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1396
1397 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1398
1399 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1400
1401 u8 link_down_events[0x20];
1402
1403 u8 successful_recovery_events[0x20];
1404
Matan Barakb4ff3a32016-02-09 14:57:42 +02001405 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001406};
1407
Gal Pressmand8dc0502016-09-27 17:04:51 +03001408struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1409 u8 time_since_last_clear_high[0x20];
1410
1411 u8 time_since_last_clear_low[0x20];
1412
1413 u8 phy_received_bits_high[0x20];
1414
1415 u8 phy_received_bits_low[0x20];
1416
1417 u8 phy_symbol_errors_high[0x20];
1418
1419 u8 phy_symbol_errors_low[0x20];
1420
1421 u8 phy_corrected_bits_high[0x20];
1422
1423 u8 phy_corrected_bits_low[0x20];
1424
1425 u8 phy_corrected_bits_lane0_high[0x20];
1426
1427 u8 phy_corrected_bits_lane0_low[0x20];
1428
1429 u8 phy_corrected_bits_lane1_high[0x20];
1430
1431 u8 phy_corrected_bits_lane1_low[0x20];
1432
1433 u8 phy_corrected_bits_lane2_high[0x20];
1434
1435 u8 phy_corrected_bits_lane2_low[0x20];
1436
1437 u8 phy_corrected_bits_lane3_high[0x20];
1438
1439 u8 phy_corrected_bits_lane3_low[0x20];
1440
1441 u8 reserved_at_200[0x5c0];
1442};
1443
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001444struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1445 u8 symbol_error_counter[0x10];
1446
1447 u8 link_error_recovery_counter[0x8];
1448
1449 u8 link_downed_counter[0x8];
1450
1451 u8 port_rcv_errors[0x10];
1452
1453 u8 port_rcv_remote_physical_errors[0x10];
1454
1455 u8 port_rcv_switch_relay_errors[0x10];
1456
1457 u8 port_xmit_discards[0x10];
1458
1459 u8 port_xmit_constraint_errors[0x8];
1460
1461 u8 port_rcv_constraint_errors[0x8];
1462
1463 u8 reserved_at_70[0x8];
1464
1465 u8 link_overrun_errors[0x8];
1466
1467 u8 reserved_at_80[0x10];
1468
1469 u8 vl_15_dropped[0x10];
1470
Tim Wright133bea02017-05-01 17:30:08 +01001471 u8 reserved_at_a0[0x80];
1472
1473 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001474};
1475
Saeed Mahameede2816822015-05-28 22:28:40 +03001476struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1477 u8 transmit_queue_high[0x20];
1478
1479 u8 transmit_queue_low[0x20];
1480
Matan Barakb4ff3a32016-02-09 14:57:42 +02001481 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001482};
1483
1484struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1485 u8 rx_octets_high[0x20];
1486
1487 u8 rx_octets_low[0x20];
1488
Matan Barakb4ff3a32016-02-09 14:57:42 +02001489 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001490
1491 u8 rx_frames_high[0x20];
1492
1493 u8 rx_frames_low[0x20];
1494
1495 u8 tx_octets_high[0x20];
1496
1497 u8 tx_octets_low[0x20];
1498
Matan Barakb4ff3a32016-02-09 14:57:42 +02001499 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001500
1501 u8 tx_frames_high[0x20];
1502
1503 u8 tx_frames_low[0x20];
1504
1505 u8 rx_pause_high[0x20];
1506
1507 u8 rx_pause_low[0x20];
1508
1509 u8 rx_pause_duration_high[0x20];
1510
1511 u8 rx_pause_duration_low[0x20];
1512
1513 u8 tx_pause_high[0x20];
1514
1515 u8 tx_pause_low[0x20];
1516
1517 u8 tx_pause_duration_high[0x20];
1518
1519 u8 tx_pause_duration_low[0x20];
1520
1521 u8 rx_pause_transition_high[0x20];
1522
1523 u8 rx_pause_transition_low[0x20];
1524
Matan Barakb4ff3a32016-02-09 14:57:42 +02001525 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001526};
1527
1528struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1529 u8 port_transmit_wait_high[0x20];
1530
1531 u8 port_transmit_wait_low[0x20];
1532
Matan Barakb4ff3a32016-02-09 14:57:42 +02001533 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001534};
1535
1536struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1537 u8 dot3stats_alignment_errors_high[0x20];
1538
1539 u8 dot3stats_alignment_errors_low[0x20];
1540
1541 u8 dot3stats_fcs_errors_high[0x20];
1542
1543 u8 dot3stats_fcs_errors_low[0x20];
1544
1545 u8 dot3stats_single_collision_frames_high[0x20];
1546
1547 u8 dot3stats_single_collision_frames_low[0x20];
1548
1549 u8 dot3stats_multiple_collision_frames_high[0x20];
1550
1551 u8 dot3stats_multiple_collision_frames_low[0x20];
1552
1553 u8 dot3stats_sqe_test_errors_high[0x20];
1554
1555 u8 dot3stats_sqe_test_errors_low[0x20];
1556
1557 u8 dot3stats_deferred_transmissions_high[0x20];
1558
1559 u8 dot3stats_deferred_transmissions_low[0x20];
1560
1561 u8 dot3stats_late_collisions_high[0x20];
1562
1563 u8 dot3stats_late_collisions_low[0x20];
1564
1565 u8 dot3stats_excessive_collisions_high[0x20];
1566
1567 u8 dot3stats_excessive_collisions_low[0x20];
1568
1569 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1570
1571 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1572
1573 u8 dot3stats_carrier_sense_errors_high[0x20];
1574
1575 u8 dot3stats_carrier_sense_errors_low[0x20];
1576
1577 u8 dot3stats_frame_too_longs_high[0x20];
1578
1579 u8 dot3stats_frame_too_longs_low[0x20];
1580
1581 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1582
1583 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1584
1585 u8 dot3stats_symbol_errors_high[0x20];
1586
1587 u8 dot3stats_symbol_errors_low[0x20];
1588
1589 u8 dot3control_in_unknown_opcodes_high[0x20];
1590
1591 u8 dot3control_in_unknown_opcodes_low[0x20];
1592
1593 u8 dot3in_pause_frames_high[0x20];
1594
1595 u8 dot3in_pause_frames_low[0x20];
1596
1597 u8 dot3out_pause_frames_high[0x20];
1598
1599 u8 dot3out_pause_frames_low[0x20];
1600
Matan Barakb4ff3a32016-02-09 14:57:42 +02001601 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001602};
1603
1604struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1605 u8 ether_stats_drop_events_high[0x20];
1606
1607 u8 ether_stats_drop_events_low[0x20];
1608
1609 u8 ether_stats_octets_high[0x20];
1610
1611 u8 ether_stats_octets_low[0x20];
1612
1613 u8 ether_stats_pkts_high[0x20];
1614
1615 u8 ether_stats_pkts_low[0x20];
1616
1617 u8 ether_stats_broadcast_pkts_high[0x20];
1618
1619 u8 ether_stats_broadcast_pkts_low[0x20];
1620
1621 u8 ether_stats_multicast_pkts_high[0x20];
1622
1623 u8 ether_stats_multicast_pkts_low[0x20];
1624
1625 u8 ether_stats_crc_align_errors_high[0x20];
1626
1627 u8 ether_stats_crc_align_errors_low[0x20];
1628
1629 u8 ether_stats_undersize_pkts_high[0x20];
1630
1631 u8 ether_stats_undersize_pkts_low[0x20];
1632
1633 u8 ether_stats_oversize_pkts_high[0x20];
1634
1635 u8 ether_stats_oversize_pkts_low[0x20];
1636
1637 u8 ether_stats_fragments_high[0x20];
1638
1639 u8 ether_stats_fragments_low[0x20];
1640
1641 u8 ether_stats_jabbers_high[0x20];
1642
1643 u8 ether_stats_jabbers_low[0x20];
1644
1645 u8 ether_stats_collisions_high[0x20];
1646
1647 u8 ether_stats_collisions_low[0x20];
1648
1649 u8 ether_stats_pkts64octets_high[0x20];
1650
1651 u8 ether_stats_pkts64octets_low[0x20];
1652
1653 u8 ether_stats_pkts65to127octets_high[0x20];
1654
1655 u8 ether_stats_pkts65to127octets_low[0x20];
1656
1657 u8 ether_stats_pkts128to255octets_high[0x20];
1658
1659 u8 ether_stats_pkts128to255octets_low[0x20];
1660
1661 u8 ether_stats_pkts256to511octets_high[0x20];
1662
1663 u8 ether_stats_pkts256to511octets_low[0x20];
1664
1665 u8 ether_stats_pkts512to1023octets_high[0x20];
1666
1667 u8 ether_stats_pkts512to1023octets_low[0x20];
1668
1669 u8 ether_stats_pkts1024to1518octets_high[0x20];
1670
1671 u8 ether_stats_pkts1024to1518octets_low[0x20];
1672
1673 u8 ether_stats_pkts1519to2047octets_high[0x20];
1674
1675 u8 ether_stats_pkts1519to2047octets_low[0x20];
1676
1677 u8 ether_stats_pkts2048to4095octets_high[0x20];
1678
1679 u8 ether_stats_pkts2048to4095octets_low[0x20];
1680
1681 u8 ether_stats_pkts4096to8191octets_high[0x20];
1682
1683 u8 ether_stats_pkts4096to8191octets_low[0x20];
1684
1685 u8 ether_stats_pkts8192to10239octets_high[0x20];
1686
1687 u8 ether_stats_pkts8192to10239octets_low[0x20];
1688
Matan Barakb4ff3a32016-02-09 14:57:42 +02001689 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001690};
1691
1692struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1693 u8 if_in_octets_high[0x20];
1694
1695 u8 if_in_octets_low[0x20];
1696
1697 u8 if_in_ucast_pkts_high[0x20];
1698
1699 u8 if_in_ucast_pkts_low[0x20];
1700
1701 u8 if_in_discards_high[0x20];
1702
1703 u8 if_in_discards_low[0x20];
1704
1705 u8 if_in_errors_high[0x20];
1706
1707 u8 if_in_errors_low[0x20];
1708
1709 u8 if_in_unknown_protos_high[0x20];
1710
1711 u8 if_in_unknown_protos_low[0x20];
1712
1713 u8 if_out_octets_high[0x20];
1714
1715 u8 if_out_octets_low[0x20];
1716
1717 u8 if_out_ucast_pkts_high[0x20];
1718
1719 u8 if_out_ucast_pkts_low[0x20];
1720
1721 u8 if_out_discards_high[0x20];
1722
1723 u8 if_out_discards_low[0x20];
1724
1725 u8 if_out_errors_high[0x20];
1726
1727 u8 if_out_errors_low[0x20];
1728
1729 u8 if_in_multicast_pkts_high[0x20];
1730
1731 u8 if_in_multicast_pkts_low[0x20];
1732
1733 u8 if_in_broadcast_pkts_high[0x20];
1734
1735 u8 if_in_broadcast_pkts_low[0x20];
1736
1737 u8 if_out_multicast_pkts_high[0x20];
1738
1739 u8 if_out_multicast_pkts_low[0x20];
1740
1741 u8 if_out_broadcast_pkts_high[0x20];
1742
1743 u8 if_out_broadcast_pkts_low[0x20];
1744
Matan Barakb4ff3a32016-02-09 14:57:42 +02001745 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001746};
1747
1748struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1749 u8 a_frames_transmitted_ok_high[0x20];
1750
1751 u8 a_frames_transmitted_ok_low[0x20];
1752
1753 u8 a_frames_received_ok_high[0x20];
1754
1755 u8 a_frames_received_ok_low[0x20];
1756
1757 u8 a_frame_check_sequence_errors_high[0x20];
1758
1759 u8 a_frame_check_sequence_errors_low[0x20];
1760
1761 u8 a_alignment_errors_high[0x20];
1762
1763 u8 a_alignment_errors_low[0x20];
1764
1765 u8 a_octets_transmitted_ok_high[0x20];
1766
1767 u8 a_octets_transmitted_ok_low[0x20];
1768
1769 u8 a_octets_received_ok_high[0x20];
1770
1771 u8 a_octets_received_ok_low[0x20];
1772
1773 u8 a_multicast_frames_xmitted_ok_high[0x20];
1774
1775 u8 a_multicast_frames_xmitted_ok_low[0x20];
1776
1777 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1778
1779 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1780
1781 u8 a_multicast_frames_received_ok_high[0x20];
1782
1783 u8 a_multicast_frames_received_ok_low[0x20];
1784
1785 u8 a_broadcast_frames_received_ok_high[0x20];
1786
1787 u8 a_broadcast_frames_received_ok_low[0x20];
1788
1789 u8 a_in_range_length_errors_high[0x20];
1790
1791 u8 a_in_range_length_errors_low[0x20];
1792
1793 u8 a_out_of_range_length_field_high[0x20];
1794
1795 u8 a_out_of_range_length_field_low[0x20];
1796
1797 u8 a_frame_too_long_errors_high[0x20];
1798
1799 u8 a_frame_too_long_errors_low[0x20];
1800
1801 u8 a_symbol_error_during_carrier_high[0x20];
1802
1803 u8 a_symbol_error_during_carrier_low[0x20];
1804
1805 u8 a_mac_control_frames_transmitted_high[0x20];
1806
1807 u8 a_mac_control_frames_transmitted_low[0x20];
1808
1809 u8 a_mac_control_frames_received_high[0x20];
1810
1811 u8 a_mac_control_frames_received_low[0x20];
1812
1813 u8 a_unsupported_opcodes_received_high[0x20];
1814
1815 u8 a_unsupported_opcodes_received_low[0x20];
1816
1817 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1818
1819 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1820
1821 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1822
1823 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1824
Matan Barakb4ff3a32016-02-09 14:57:42 +02001825 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001826};
1827
Gal Pressman8ed1a632016-11-17 13:46:01 +02001828struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1829 u8 life_time_counter_high[0x20];
1830
1831 u8 life_time_counter_low[0x20];
1832
1833 u8 rx_errors[0x20];
1834
1835 u8 tx_errors[0x20];
1836
1837 u8 l0_to_recovery_eieos[0x20];
1838
1839 u8 l0_to_recovery_ts[0x20];
1840
1841 u8 l0_to_recovery_framing[0x20];
1842
1843 u8 l0_to_recovery_retrain[0x20];
1844
1845 u8 crc_error_dllp[0x20];
1846
1847 u8 crc_error_tlp[0x20];
1848
1849 u8 reserved_at_140[0x680];
1850};
1851
Saeed Mahameede2816822015-05-28 22:28:40 +03001852struct mlx5_ifc_cmd_inter_comp_event_bits {
1853 u8 command_completion_vector[0x20];
1854
Matan Barakb4ff3a32016-02-09 14:57:42 +02001855 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001856};
1857
1858struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001859 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001860 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001861 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001862 u8 vl[0x4];
1863
Matan Barakb4ff3a32016-02-09 14:57:42 +02001864 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001865};
1866
1867struct mlx5_ifc_db_bf_congestion_event_bits {
1868 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001869 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001870 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001871 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001872
Matan Barakb4ff3a32016-02-09 14:57:42 +02001873 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001874};
1875
1876struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001877 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001878
1879 u8 gpio_event_hi[0x20];
1880
1881 u8 gpio_event_lo[0x20];
1882
Matan Barakb4ff3a32016-02-09 14:57:42 +02001883 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001884};
1885
1886struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001887 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001888
1889 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001890 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001891
Matan Barakb4ff3a32016-02-09 14:57:42 +02001892 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001893};
1894
1895struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001896 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001897};
1898
1899enum {
1900 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1901 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1902};
1903
1904struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001905 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001906 u8 cqn[0x18];
1907
Matan Barakb4ff3a32016-02-09 14:57:42 +02001908 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001909
Matan Barakb4ff3a32016-02-09 14:57:42 +02001910 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001911 u8 syndrome[0x8];
1912
Matan Barakb4ff3a32016-02-09 14:57:42 +02001913 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001914};
1915
1916struct mlx5_ifc_rdma_page_fault_event_bits {
1917 u8 bytes_committed[0x20];
1918
1919 u8 r_key[0x20];
1920
Matan Barakb4ff3a32016-02-09 14:57:42 +02001921 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001922 u8 packet_len[0x10];
1923
1924 u8 rdma_op_len[0x20];
1925
1926 u8 rdma_va[0x40];
1927
Matan Barakb4ff3a32016-02-09 14:57:42 +02001928 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001929 u8 rdma[0x1];
1930 u8 write[0x1];
1931 u8 requestor[0x1];
1932 u8 qp_number[0x18];
1933};
1934
1935struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1936 u8 bytes_committed[0x20];
1937
Matan Barakb4ff3a32016-02-09 14:57:42 +02001938 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001939 u8 wqe_index[0x10];
1940
Matan Barakb4ff3a32016-02-09 14:57:42 +02001941 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001942 u8 len[0x10];
1943
Matan Barakb4ff3a32016-02-09 14:57:42 +02001944 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001945
Matan Barakb4ff3a32016-02-09 14:57:42 +02001946 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001947 u8 rdma[0x1];
1948 u8 write_read[0x1];
1949 u8 requestor[0x1];
1950 u8 qpn[0x18];
1951};
1952
1953struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001954 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001955
1956 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001957 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001958
Matan Barakb4ff3a32016-02-09 14:57:42 +02001959 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001960 u8 qpn_rqn_sqn[0x18];
1961};
1962
1963struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001964 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001965
Matan Barakb4ff3a32016-02-09 14:57:42 +02001966 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001967 u8 dct_number[0x18];
1968};
1969
1970struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001971 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001972
Matan Barakb4ff3a32016-02-09 14:57:42 +02001973 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001974 u8 cq_number[0x18];
1975};
1976
1977enum {
1978 MLX5_QPC_STATE_RST = 0x0,
1979 MLX5_QPC_STATE_INIT = 0x1,
1980 MLX5_QPC_STATE_RTR = 0x2,
1981 MLX5_QPC_STATE_RTS = 0x3,
1982 MLX5_QPC_STATE_SQER = 0x4,
1983 MLX5_QPC_STATE_ERR = 0x6,
1984 MLX5_QPC_STATE_SQD = 0x7,
1985 MLX5_QPC_STATE_SUSPENDED = 0x9,
1986};
1987
1988enum {
1989 MLX5_QPC_ST_RC = 0x0,
1990 MLX5_QPC_ST_UC = 0x1,
1991 MLX5_QPC_ST_UD = 0x2,
1992 MLX5_QPC_ST_XRC = 0x3,
1993 MLX5_QPC_ST_DCI = 0x5,
1994 MLX5_QPC_ST_QP0 = 0x7,
1995 MLX5_QPC_ST_QP1 = 0x8,
1996 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
1997 MLX5_QPC_ST_REG_UMR = 0xc,
1998};
1999
2000enum {
2001 MLX5_QPC_PM_STATE_ARMED = 0x0,
2002 MLX5_QPC_PM_STATE_REARM = 0x1,
2003 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2004 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2005};
2006
2007enum {
2008 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2009 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2010};
2011
2012enum {
2013 MLX5_QPC_MTU_256_BYTES = 0x1,
2014 MLX5_QPC_MTU_512_BYTES = 0x2,
2015 MLX5_QPC_MTU_1K_BYTES = 0x3,
2016 MLX5_QPC_MTU_2K_BYTES = 0x4,
2017 MLX5_QPC_MTU_4K_BYTES = 0x5,
2018 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2019};
2020
2021enum {
2022 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2023 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2024 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2025 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2026 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2027 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2028 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2029 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2030};
2031
2032enum {
2033 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2034 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2035 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2036};
2037
2038enum {
2039 MLX5_QPC_CS_RES_DISABLE = 0x0,
2040 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2041 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2042};
2043
2044struct mlx5_ifc_qpc_bits {
2045 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002046 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002047 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002048 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002049 u8 pm_state[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002050 u8 reserved_at_15[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03002051 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002052 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002053
2054 u8 wq_signature[0x1];
2055 u8 block_lb_mc[0x1];
2056 u8 atomic_like_write_en[0x1];
2057 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002058 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002059 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002060 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002061 u8 pd[0x18];
2062
2063 u8 mtu[0x3];
2064 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002065 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002066 u8 log_rq_size[0x4];
2067 u8 log_rq_stride[0x3];
2068 u8 no_sq[0x1];
2069 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002070 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002071 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002072 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002073
2074 u8 counter_set_id[0x8];
2075 u8 uar_page[0x18];
2076
Matan Barakb4ff3a32016-02-09 14:57:42 +02002077 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002078 u8 user_index[0x18];
2079
Matan Barakb4ff3a32016-02-09 14:57:42 +02002080 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002081 u8 log_page_size[0x5];
2082 u8 remote_qpn[0x18];
2083
2084 struct mlx5_ifc_ads_bits primary_address_path;
2085
2086 struct mlx5_ifc_ads_bits secondary_address_path;
2087
2088 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002089 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002090 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002091 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002092 u8 retry_count[0x3];
2093 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002094 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002095 u8 fre[0x1];
2096 u8 cur_rnr_retry[0x3];
2097 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002098 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002099
Matan Barakb4ff3a32016-02-09 14:57:42 +02002100 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002101
Matan Barakb4ff3a32016-02-09 14:57:42 +02002102 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002103 u8 next_send_psn[0x18];
2104
Matan Barakb4ff3a32016-02-09 14:57:42 +02002105 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002106 u8 cqn_snd[0x18];
2107
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002108 u8 reserved_at_400[0x8];
2109 u8 deth_sqpn[0x18];
2110
2111 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002112
Matan Barakb4ff3a32016-02-09 14:57:42 +02002113 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002114 u8 last_acked_psn[0x18];
2115
Matan Barakb4ff3a32016-02-09 14:57:42 +02002116 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002117 u8 ssn[0x18];
2118
Matan Barakb4ff3a32016-02-09 14:57:42 +02002119 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002120 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002121 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002122 u8 atomic_mode[0x4];
2123 u8 rre[0x1];
2124 u8 rwe[0x1];
2125 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002126 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002127 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002128 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002129 u8 cd_slave_receive[0x1];
2130 u8 cd_slave_send[0x1];
2131 u8 cd_master[0x1];
2132
Matan Barakb4ff3a32016-02-09 14:57:42 +02002133 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002134 u8 min_rnr_nak[0x5];
2135 u8 next_rcv_psn[0x18];
2136
Matan Barakb4ff3a32016-02-09 14:57:42 +02002137 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002138 u8 xrcd[0x18];
2139
Matan Barakb4ff3a32016-02-09 14:57:42 +02002140 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002141 u8 cqn_rcv[0x18];
2142
2143 u8 dbr_addr[0x40];
2144
2145 u8 q_key[0x20];
2146
Matan Barakb4ff3a32016-02-09 14:57:42 +02002147 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002148 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002149 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002150
Matan Barakb4ff3a32016-02-09 14:57:42 +02002151 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002152 u8 rmsn[0x18];
2153
2154 u8 hw_sq_wqebb_counter[0x10];
2155 u8 sw_sq_wqebb_counter[0x10];
2156
2157 u8 hw_rq_counter[0x20];
2158
2159 u8 sw_rq_counter[0x20];
2160
Matan Barakb4ff3a32016-02-09 14:57:42 +02002161 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002162
Matan Barakb4ff3a32016-02-09 14:57:42 +02002163 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002164 u8 cgs[0x1];
2165 u8 cs_req[0x8];
2166 u8 cs_res[0x8];
2167
2168 u8 dc_access_key[0x40];
2169
Matan Barakb4ff3a32016-02-09 14:57:42 +02002170 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002171};
2172
2173struct mlx5_ifc_roce_addr_layout_bits {
2174 u8 source_l3_address[16][0x8];
2175
Matan Barakb4ff3a32016-02-09 14:57:42 +02002176 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002177 u8 vlan_valid[0x1];
2178 u8 vlan_id[0xc];
2179 u8 source_mac_47_32[0x10];
2180
2181 u8 source_mac_31_0[0x20];
2182
Matan Barakb4ff3a32016-02-09 14:57:42 +02002183 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002184 u8 roce_l3_type[0x4];
2185 u8 roce_version[0x8];
2186
Matan Barakb4ff3a32016-02-09 14:57:42 +02002187 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002188};
2189
2190union mlx5_ifc_hca_cap_union_bits {
2191 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2192 struct mlx5_ifc_odp_cap_bits odp_cap;
2193 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2194 struct mlx5_ifc_roce_cap_bits roce_cap;
2195 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2196 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002197 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002198 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002199 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002200 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002201 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002202 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002203};
2204
2205enum {
2206 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2207 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2208 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002209 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002210 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2211 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002212 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002213};
2214
2215struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002216 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002217
2218 u8 group_id[0x20];
2219
Matan Barakb4ff3a32016-02-09 14:57:42 +02002220 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002221 u8 flow_tag[0x18];
2222
Matan Barakb4ff3a32016-02-09 14:57:42 +02002223 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002224 u8 action[0x10];
2225
Matan Barakb4ff3a32016-02-09 14:57:42 +02002226 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002227 u8 destination_list_size[0x18];
2228
Amir Vadai9dc0b282016-05-13 12:55:39 +00002229 u8 reserved_at_a0[0x8];
2230 u8 flow_counter_list_size[0x18];
2231
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002232 u8 encap_id[0x20];
2233
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002234 u8 modify_header_id[0x20];
2235
2236 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002237
2238 struct mlx5_ifc_fte_match_param_bits match_value;
2239
Matan Barakb4ff3a32016-02-09 14:57:42 +02002240 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002241
Amir Vadai9dc0b282016-05-13 12:55:39 +00002242 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002243};
2244
2245enum {
2246 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2247 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2248};
2249
2250struct mlx5_ifc_xrc_srqc_bits {
2251 u8 state[0x4];
2252 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002253 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002254
2255 u8 wq_signature[0x1];
2256 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002257 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002258 u8 rlky[0x1];
2259 u8 basic_cyclic_rcv_wqe[0x1];
2260 u8 log_rq_stride[0x3];
2261 u8 xrcd[0x18];
2262
2263 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002264 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002265 u8 cqn[0x18];
2266
Matan Barakb4ff3a32016-02-09 14:57:42 +02002267 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002268
2269 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002270 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002271 u8 log_page_size[0x6];
2272 u8 user_index[0x18];
2273
Matan Barakb4ff3a32016-02-09 14:57:42 +02002274 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002275
Matan Barakb4ff3a32016-02-09 14:57:42 +02002276 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002277 u8 pd[0x18];
2278
2279 u8 lwm[0x10];
2280 u8 wqe_cnt[0x10];
2281
Matan Barakb4ff3a32016-02-09 14:57:42 +02002282 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002283
2284 u8 db_record_addr_h[0x20];
2285
2286 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002287 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002288
Matan Barakb4ff3a32016-02-09 14:57:42 +02002289 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002290};
2291
2292struct mlx5_ifc_traffic_counter_bits {
2293 u8 packets[0x40];
2294
2295 u8 octets[0x40];
2296};
2297
2298struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002299 u8 strict_lag_tx_port_affinity[0x1];
2300 u8 reserved_at_1[0x3];
2301 u8 lag_tx_port_affinity[0x04];
2302
2303 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002304 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002305 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002306
Matan Barakb4ff3a32016-02-09 14:57:42 +02002307 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002308
Matan Barakb4ff3a32016-02-09 14:57:42 +02002309 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002310 u8 transport_domain[0x18];
2311
Erez Shitrit500a3d02017-04-13 06:36:51 +03002312 u8 reserved_at_140[0x8];
2313 u8 underlay_qpn[0x18];
2314 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002315};
2316
2317enum {
2318 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2319 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2320};
2321
2322enum {
2323 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2324 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2325};
2326
2327enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002328 MLX5_RX_HASH_FN_NONE = 0x0,
2329 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2330 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002331};
2332
2333enum {
2334 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2335 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2336};
2337
2338struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002339 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002340
2341 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002342 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002343
Matan Barakb4ff3a32016-02-09 14:57:42 +02002344 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002345
Matan Barakb4ff3a32016-02-09 14:57:42 +02002346 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002347 u8 lro_timeout_period_usecs[0x10];
2348 u8 lro_enable_mask[0x4];
2349 u8 lro_max_ip_payload_size[0x8];
2350
Matan Barakb4ff3a32016-02-09 14:57:42 +02002351 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002352
Matan Barakb4ff3a32016-02-09 14:57:42 +02002353 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002354 u8 inline_rqn[0x18];
2355
2356 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002357 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002358 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002359 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002360 u8 indirect_table[0x18];
2361
2362 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002363 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002364 u8 self_lb_block[0x2];
2365 u8 transport_domain[0x18];
2366
2367 u8 rx_hash_toeplitz_key[10][0x20];
2368
2369 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2370
2371 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2372
Matan Barakb4ff3a32016-02-09 14:57:42 +02002373 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002374};
2375
2376enum {
2377 MLX5_SRQC_STATE_GOOD = 0x0,
2378 MLX5_SRQC_STATE_ERROR = 0x1,
2379};
2380
2381struct mlx5_ifc_srqc_bits {
2382 u8 state[0x4];
2383 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002384 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002385
2386 u8 wq_signature[0x1];
2387 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002388 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002389 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002390 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002391 u8 log_rq_stride[0x3];
2392 u8 xrcd[0x18];
2393
2394 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002395 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002396 u8 cqn[0x18];
2397
Matan Barakb4ff3a32016-02-09 14:57:42 +02002398 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002399
Matan Barakb4ff3a32016-02-09 14:57:42 +02002400 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002401 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002402 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002403
Matan Barakb4ff3a32016-02-09 14:57:42 +02002404 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002405
Matan Barakb4ff3a32016-02-09 14:57:42 +02002406 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002407 u8 pd[0x18];
2408
2409 u8 lwm[0x10];
2410 u8 wqe_cnt[0x10];
2411
Matan Barakb4ff3a32016-02-09 14:57:42 +02002412 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002413
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002414 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002415
Matan Barakb4ff3a32016-02-09 14:57:42 +02002416 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002417};
2418
2419enum {
2420 MLX5_SQC_STATE_RST = 0x0,
2421 MLX5_SQC_STATE_RDY = 0x1,
2422 MLX5_SQC_STATE_ERR = 0x3,
2423};
2424
2425struct mlx5_ifc_sqc_bits {
2426 u8 rlky[0x1];
2427 u8 cd_master[0x1];
2428 u8 fre[0x1];
2429 u8 flush_in_error_en[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002430 u8 reserved_at_4[0x1];
2431 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002432 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002433 u8 reg_umr[0x1];
2434 u8 reserved_at_d[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03002435
Matan Barakb4ff3a32016-02-09 14:57:42 +02002436 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002437 u8 user_index[0x18];
2438
Matan Barakb4ff3a32016-02-09 14:57:42 +02002439 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002440 u8 cqn[0x18];
2441
Saeed Mahameed74862162016-06-09 15:11:34 +03002442 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002443
Saeed Mahameed74862162016-06-09 15:11:34 +03002444 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002445 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002446 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002447
Matan Barakb4ff3a32016-02-09 14:57:42 +02002448 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002449
Matan Barakb4ff3a32016-02-09 14:57:42 +02002450 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002451 u8 tis_num_0[0x18];
2452
2453 struct mlx5_ifc_wq_bits wq;
2454};
2455
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002456enum {
2457 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2458 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2459 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2460 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2461};
2462
2463struct mlx5_ifc_scheduling_context_bits {
2464 u8 element_type[0x8];
2465 u8 reserved_at_8[0x18];
2466
2467 u8 element_attributes[0x20];
2468
2469 u8 parent_element_id[0x20];
2470
2471 u8 reserved_at_60[0x40];
2472
2473 u8 bw_share[0x20];
2474
2475 u8 max_average_bw[0x20];
2476
2477 u8 reserved_at_e0[0x120];
2478};
2479
Saeed Mahameede2816822015-05-28 22:28:40 +03002480struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002481 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002482
Matan Barakb4ff3a32016-02-09 14:57:42 +02002483 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002484 u8 rqt_max_size[0x10];
2485
Matan Barakb4ff3a32016-02-09 14:57:42 +02002486 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002487 u8 rqt_actual_size[0x10];
2488
Matan Barakb4ff3a32016-02-09 14:57:42 +02002489 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002490
2491 struct mlx5_ifc_rq_num_bits rq_num[0];
2492};
2493
2494enum {
2495 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2496 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2497};
2498
2499enum {
2500 MLX5_RQC_STATE_RST = 0x0,
2501 MLX5_RQC_STATE_RDY = 0x1,
2502 MLX5_RQC_STATE_ERR = 0x3,
2503};
2504
2505struct mlx5_ifc_rqc_bits {
2506 u8 rlky[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002507 u8 reserved_at_1[0x1];
2508 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002509 u8 vsd[0x1];
2510 u8 mem_rq_type[0x4];
2511 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002512 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002513 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002514 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002515
Matan Barakb4ff3a32016-02-09 14:57:42 +02002516 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002517 u8 user_index[0x18];
2518
Matan Barakb4ff3a32016-02-09 14:57:42 +02002519 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002520 u8 cqn[0x18];
2521
2522 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002523 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002524
Matan Barakb4ff3a32016-02-09 14:57:42 +02002525 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002526 u8 rmpn[0x18];
2527
Matan Barakb4ff3a32016-02-09 14:57:42 +02002528 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002529
2530 struct mlx5_ifc_wq_bits wq;
2531};
2532
2533enum {
2534 MLX5_RMPC_STATE_RDY = 0x1,
2535 MLX5_RMPC_STATE_ERR = 0x3,
2536};
2537
2538struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002539 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002540 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002541 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002542
2543 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002544 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002545
Matan Barakb4ff3a32016-02-09 14:57:42 +02002546 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002547
2548 struct mlx5_ifc_wq_bits wq;
2549};
2550
Saeed Mahameede2816822015-05-28 22:28:40 +03002551struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002552 u8 reserved_at_0[0x5];
2553 u8 min_wqe_inline_mode[0x3];
2554 u8 reserved_at_8[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03002555 u8 roce_en[0x1];
2556
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002557 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002558 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002559 u8 event_on_mtu[0x1];
2560 u8 event_on_promisc_change[0x1];
2561 u8 event_on_vlan_change[0x1];
2562 u8 event_on_mc_address_change[0x1];
2563 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002564
Matan Barakb4ff3a32016-02-09 14:57:42 +02002565 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002566
2567 u8 mtu[0x10];
2568
Achiad Shochat9efa7522015-12-23 18:47:20 +02002569 u8 system_image_guid[0x40];
2570 u8 port_guid[0x40];
2571 u8 node_guid[0x40];
2572
Matan Barakb4ff3a32016-02-09 14:57:42 +02002573 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002574 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002575 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002576
2577 u8 promisc_uc[0x1];
2578 u8 promisc_mc[0x1];
2579 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002580 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002581 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002582 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002583 u8 allowed_list_size[0xc];
2584
2585 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2586
Matan Barakb4ff3a32016-02-09 14:57:42 +02002587 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002588
2589 u8 current_uc_mac_address[0][0x40];
2590};
2591
2592enum {
2593 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2594 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2595 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002596 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002597};
2598
2599struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002600 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002601 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002602 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002603 u8 small_fence_on_rdma_read_response[0x1];
2604 u8 umr_en[0x1];
2605 u8 a[0x1];
2606 u8 rw[0x1];
2607 u8 rr[0x1];
2608 u8 lw[0x1];
2609 u8 lr[0x1];
2610 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002611 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002612
2613 u8 qpn[0x18];
2614 u8 mkey_7_0[0x8];
2615
Matan Barakb4ff3a32016-02-09 14:57:42 +02002616 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002617
2618 u8 length64[0x1];
2619 u8 bsf_en[0x1];
2620 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002621 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002622 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002623 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002624 u8 en_rinval[0x1];
2625 u8 pd[0x18];
2626
2627 u8 start_addr[0x40];
2628
2629 u8 len[0x40];
2630
2631 u8 bsf_octword_size[0x20];
2632
Matan Barakb4ff3a32016-02-09 14:57:42 +02002633 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002634
2635 u8 translations_octword_size[0x20];
2636
Matan Barakb4ff3a32016-02-09 14:57:42 +02002637 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002638 u8 log_page_size[0x5];
2639
Matan Barakb4ff3a32016-02-09 14:57:42 +02002640 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002641};
2642
2643struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002644 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002645 u8 pkey[0x10];
2646};
2647
2648struct mlx5_ifc_array128_auto_bits {
2649 u8 array128_auto[16][0x8];
2650};
2651
2652struct mlx5_ifc_hca_vport_context_bits {
2653 u8 field_select[0x20];
2654
Matan Barakb4ff3a32016-02-09 14:57:42 +02002655 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002656
2657 u8 sm_virt_aware[0x1];
2658 u8 has_smi[0x1];
2659 u8 has_raw[0x1];
2660 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002661 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002662 u8 port_physical_state[0x4];
2663 u8 vport_state_policy[0x4];
2664 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002665 u8 vport_state[0x4];
2666
Matan Barakb4ff3a32016-02-09 14:57:42 +02002667 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002668
2669 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002670
2671 u8 port_guid[0x40];
2672
2673 u8 node_guid[0x40];
2674
2675 u8 cap_mask1[0x20];
2676
2677 u8 cap_mask1_field_select[0x20];
2678
2679 u8 cap_mask2[0x20];
2680
2681 u8 cap_mask2_field_select[0x20];
2682
Matan Barakb4ff3a32016-02-09 14:57:42 +02002683 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002684
2685 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002686 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002687 u8 init_type_reply[0x4];
2688 u8 lmc[0x3];
2689 u8 subnet_timeout[0x5];
2690
2691 u8 sm_lid[0x10];
2692 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002693 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002694
2695 u8 qkey_violation_counter[0x10];
2696 u8 pkey_violation_counter[0x10];
2697
Matan Barakb4ff3a32016-02-09 14:57:42 +02002698 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002699};
2700
Saeed Mahameedd6666752015-12-01 18:03:22 +02002701struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002702 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002703 u8 vport_svlan_strip[0x1];
2704 u8 vport_cvlan_strip[0x1];
2705 u8 vport_svlan_insert[0x1];
2706 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002707 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002708
Matan Barakb4ff3a32016-02-09 14:57:42 +02002709 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002710
2711 u8 svlan_cfi[0x1];
2712 u8 svlan_pcp[0x3];
2713 u8 svlan_id[0xc];
2714 u8 cvlan_cfi[0x1];
2715 u8 cvlan_pcp[0x3];
2716 u8 cvlan_id[0xc];
2717
Matan Barakb4ff3a32016-02-09 14:57:42 +02002718 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002719};
2720
Saeed Mahameede2816822015-05-28 22:28:40 +03002721enum {
2722 MLX5_EQC_STATUS_OK = 0x0,
2723 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2724};
2725
2726enum {
2727 MLX5_EQC_ST_ARMED = 0x9,
2728 MLX5_EQC_ST_FIRED = 0xa,
2729};
2730
2731struct mlx5_ifc_eqc_bits {
2732 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002733 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002734 u8 ec[0x1];
2735 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002736 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002737 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002738 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002739
Matan Barakb4ff3a32016-02-09 14:57:42 +02002740 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002741
Matan Barakb4ff3a32016-02-09 14:57:42 +02002742 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002743 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002744 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002745
Matan Barakb4ff3a32016-02-09 14:57:42 +02002746 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002747 u8 log_eq_size[0x5];
2748 u8 uar_page[0x18];
2749
Matan Barakb4ff3a32016-02-09 14:57:42 +02002750 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002751
Matan Barakb4ff3a32016-02-09 14:57:42 +02002752 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002753 u8 intr[0x8];
2754
Matan Barakb4ff3a32016-02-09 14:57:42 +02002755 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002756 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002757 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002758
Matan Barakb4ff3a32016-02-09 14:57:42 +02002759 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002760
Matan Barakb4ff3a32016-02-09 14:57:42 +02002761 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002762 u8 consumer_counter[0x18];
2763
Matan Barakb4ff3a32016-02-09 14:57:42 +02002764 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002765 u8 producer_counter[0x18];
2766
Matan Barakb4ff3a32016-02-09 14:57:42 +02002767 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002768};
2769
2770enum {
2771 MLX5_DCTC_STATE_ACTIVE = 0x0,
2772 MLX5_DCTC_STATE_DRAINING = 0x1,
2773 MLX5_DCTC_STATE_DRAINED = 0x2,
2774};
2775
2776enum {
2777 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2778 MLX5_DCTC_CS_RES_NA = 0x1,
2779 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2780};
2781
2782enum {
2783 MLX5_DCTC_MTU_256_BYTES = 0x1,
2784 MLX5_DCTC_MTU_512_BYTES = 0x2,
2785 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2786 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2787 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2788};
2789
2790struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002791 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002792 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002793 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002794
Matan Barakb4ff3a32016-02-09 14:57:42 +02002795 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002796 u8 user_index[0x18];
2797
Matan Barakb4ff3a32016-02-09 14:57:42 +02002798 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002799 u8 cqn[0x18];
2800
2801 u8 counter_set_id[0x8];
2802 u8 atomic_mode[0x4];
2803 u8 rre[0x1];
2804 u8 rwe[0x1];
2805 u8 rae[0x1];
2806 u8 atomic_like_write_en[0x1];
2807 u8 latency_sensitive[0x1];
2808 u8 rlky[0x1];
2809 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002810 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002811
Matan Barakb4ff3a32016-02-09 14:57:42 +02002812 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002813 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002814 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002815 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002816 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002817
Matan Barakb4ff3a32016-02-09 14:57:42 +02002818 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002819 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002820
Matan Barakb4ff3a32016-02-09 14:57:42 +02002821 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002822 u8 pd[0x18];
2823
2824 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002825 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002826 u8 flow_label[0x14];
2827
2828 u8 dc_access_key[0x40];
2829
Matan Barakb4ff3a32016-02-09 14:57:42 +02002830 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002831 u8 mtu[0x3];
2832 u8 port[0x8];
2833 u8 pkey_index[0x10];
2834
Matan Barakb4ff3a32016-02-09 14:57:42 +02002835 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002836 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002837 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002838 u8 hop_limit[0x8];
2839
2840 u8 dc_access_key_violation_count[0x20];
2841
Matan Barakb4ff3a32016-02-09 14:57:42 +02002842 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002843 u8 dei_cfi[0x1];
2844 u8 eth_prio[0x3];
2845 u8 ecn[0x2];
2846 u8 dscp[0x6];
2847
Matan Barakb4ff3a32016-02-09 14:57:42 +02002848 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002849};
2850
2851enum {
2852 MLX5_CQC_STATUS_OK = 0x0,
2853 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2854 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2855};
2856
2857enum {
2858 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2859 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2860};
2861
2862enum {
2863 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2864 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2865 MLX5_CQC_ST_FIRED = 0xa,
2866};
2867
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002868enum {
2869 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2870 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002871 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002872};
2873
Saeed Mahameede2816822015-05-28 22:28:40 +03002874struct mlx5_ifc_cqc_bits {
2875 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002876 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002877 u8 cqe_sz[0x3];
2878 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002879 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002880 u8 scqe_break_moderation_en[0x1];
2881 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002882 u8 cq_period_mode[0x2];
2883 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002884 u8 mini_cqe_res_format[0x2];
2885 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002886 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002887
Matan Barakb4ff3a32016-02-09 14:57:42 +02002888 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002889
Matan Barakb4ff3a32016-02-09 14:57:42 +02002890 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002891 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002892 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002893
Matan Barakb4ff3a32016-02-09 14:57:42 +02002894 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002895 u8 log_cq_size[0x5];
2896 u8 uar_page[0x18];
2897
Matan Barakb4ff3a32016-02-09 14:57:42 +02002898 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002899 u8 cq_period[0xc];
2900 u8 cq_max_count[0x10];
2901
Matan Barakb4ff3a32016-02-09 14:57:42 +02002902 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002903 u8 c_eqn[0x8];
2904
Matan Barakb4ff3a32016-02-09 14:57:42 +02002905 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002906 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002907 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002908
Matan Barakb4ff3a32016-02-09 14:57:42 +02002909 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002910
Matan Barakb4ff3a32016-02-09 14:57:42 +02002911 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002912 u8 last_notified_index[0x18];
2913
Matan Barakb4ff3a32016-02-09 14:57:42 +02002914 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002915 u8 last_solicit_index[0x18];
2916
Matan Barakb4ff3a32016-02-09 14:57:42 +02002917 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002918 u8 consumer_counter[0x18];
2919
Matan Barakb4ff3a32016-02-09 14:57:42 +02002920 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002921 u8 producer_counter[0x18];
2922
Matan Barakb4ff3a32016-02-09 14:57:42 +02002923 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002924
2925 u8 dbr_addr[0x40];
2926};
2927
2928union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2929 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2930 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2931 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002932 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002933};
2934
2935struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002936 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002937
Matan Barakb4ff3a32016-02-09 14:57:42 +02002938 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002939 u8 ieee_vendor_id[0x18];
2940
Matan Barakb4ff3a32016-02-09 14:57:42 +02002941 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002942 u8 vsd_vendor_id[0x10];
2943
2944 u8 vsd[208][0x8];
2945
2946 u8 vsd_contd_psid[16][0x8];
2947};
2948
Saeed Mahameed74862162016-06-09 15:11:34 +03002949enum {
2950 MLX5_XRQC_STATE_GOOD = 0x0,
2951 MLX5_XRQC_STATE_ERROR = 0x1,
2952};
2953
2954enum {
2955 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
2956 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
2957};
2958
2959enum {
2960 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
2961};
2962
2963struct mlx5_ifc_tag_matching_topology_context_bits {
2964 u8 log_matching_list_sz[0x4];
2965 u8 reserved_at_4[0xc];
2966 u8 append_next_index[0x10];
2967
2968 u8 sw_phase_cnt[0x10];
2969 u8 hw_phase_cnt[0x10];
2970
2971 u8 reserved_at_40[0x40];
2972};
2973
2974struct mlx5_ifc_xrqc_bits {
2975 u8 state[0x4];
2976 u8 rlkey[0x1];
2977 u8 reserved_at_5[0xf];
2978 u8 topology[0x4];
2979 u8 reserved_at_18[0x4];
2980 u8 offload[0x4];
2981
2982 u8 reserved_at_20[0x8];
2983 u8 user_index[0x18];
2984
2985 u8 reserved_at_40[0x8];
2986 u8 cqn[0x18];
2987
2988 u8 reserved_at_60[0xa0];
2989
2990 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
2991
Artemy Kovalyov5579e152016-08-31 05:17:54 +00002992 u8 reserved_at_180[0x880];
Saeed Mahameed74862162016-06-09 15:11:34 +03002993
2994 struct mlx5_ifc_wq_bits wq;
2995};
2996
Saeed Mahameede2816822015-05-28 22:28:40 +03002997union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
2998 struct mlx5_ifc_modify_field_select_bits modify_field_select;
2999 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003000 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003001};
3002
3003union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3004 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3005 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3006 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003007 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003008};
3009
3010union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3011 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3012 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3013 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3014 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3015 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3016 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3017 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003018 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003019 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003020 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003021 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003022};
3023
Gal Pressman8ed1a632016-11-17 13:46:01 +02003024union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3025 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3026 u8 reserved_at_0[0x7c0];
3027};
3028
Saeed Mahameede2816822015-05-28 22:28:40 +03003029union mlx5_ifc_event_auto_bits {
3030 struct mlx5_ifc_comp_event_bits comp_event;
3031 struct mlx5_ifc_dct_events_bits dct_events;
3032 struct mlx5_ifc_qp_events_bits qp_events;
3033 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3034 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3035 struct mlx5_ifc_cq_error_bits cq_error;
3036 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3037 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3038 struct mlx5_ifc_gpio_event_bits gpio_event;
3039 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3040 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3041 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003042 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003043};
3044
3045struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003046 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003047
3048 u8 assert_existptr[0x20];
3049
3050 u8 assert_callra[0x20];
3051
Matan Barakb4ff3a32016-02-09 14:57:42 +02003052 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003053
3054 u8 fw_version[0x20];
3055
3056 u8 hw_id[0x20];
3057
Matan Barakb4ff3a32016-02-09 14:57:42 +02003058 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003059
3060 u8 irisc_index[0x8];
3061 u8 synd[0x8];
3062 u8 ext_synd[0x10];
3063};
3064
3065struct mlx5_ifc_register_loopback_control_bits {
3066 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003067 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003068 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003069 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003070
Matan Barakb4ff3a32016-02-09 14:57:42 +02003071 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003072};
3073
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003074struct mlx5_ifc_vport_tc_element_bits {
3075 u8 traffic_class[0x4];
3076 u8 reserved_at_4[0xc];
3077 u8 vport_number[0x10];
3078};
3079
3080struct mlx5_ifc_vport_element_bits {
3081 u8 reserved_at_0[0x10];
3082 u8 vport_number[0x10];
3083};
3084
3085enum {
3086 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3087 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3088 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3089};
3090
3091struct mlx5_ifc_tsar_element_bits {
3092 u8 reserved_at_0[0x8];
3093 u8 tsar_type[0x8];
3094 u8 reserved_at_10[0x10];
3095};
3096
Saeed Mahameede2816822015-05-28 22:28:40 +03003097struct mlx5_ifc_teardown_hca_out_bits {
3098 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003099 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003100
3101 u8 syndrome[0x20];
3102
Matan Barakb4ff3a32016-02-09 14:57:42 +02003103 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003104};
3105
3106enum {
3107 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
3108 MLX5_TEARDOWN_HCA_IN_PROFILE_PANIC_CLOSE = 0x1,
3109};
3110
3111struct mlx5_ifc_teardown_hca_in_bits {
3112 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003113 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003114
Matan Barakb4ff3a32016-02-09 14:57:42 +02003115 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003116 u8 op_mod[0x10];
3117
Matan Barakb4ff3a32016-02-09 14:57:42 +02003118 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003119 u8 profile[0x10];
3120
Matan Barakb4ff3a32016-02-09 14:57:42 +02003121 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003122};
3123
3124struct mlx5_ifc_sqerr2rts_qp_out_bits {
3125 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003126 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003127
3128 u8 syndrome[0x20];
3129
Matan Barakb4ff3a32016-02-09 14:57:42 +02003130 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003131};
3132
3133struct mlx5_ifc_sqerr2rts_qp_in_bits {
3134 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003135 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003136
Matan Barakb4ff3a32016-02-09 14:57:42 +02003137 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003138 u8 op_mod[0x10];
3139
Matan Barakb4ff3a32016-02-09 14:57:42 +02003140 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003141 u8 qpn[0x18];
3142
Matan Barakb4ff3a32016-02-09 14:57:42 +02003143 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003144
3145 u8 opt_param_mask[0x20];
3146
Matan Barakb4ff3a32016-02-09 14:57:42 +02003147 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003148
3149 struct mlx5_ifc_qpc_bits qpc;
3150
Matan Barakb4ff3a32016-02-09 14:57:42 +02003151 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003152};
3153
3154struct mlx5_ifc_sqd2rts_qp_out_bits {
3155 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003156 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003157
3158 u8 syndrome[0x20];
3159
Matan Barakb4ff3a32016-02-09 14:57:42 +02003160 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003161};
3162
3163struct mlx5_ifc_sqd2rts_qp_in_bits {
3164 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003165 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003166
Matan Barakb4ff3a32016-02-09 14:57:42 +02003167 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003168 u8 op_mod[0x10];
3169
Matan Barakb4ff3a32016-02-09 14:57:42 +02003170 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003171 u8 qpn[0x18];
3172
Matan Barakb4ff3a32016-02-09 14:57:42 +02003173 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003174
3175 u8 opt_param_mask[0x20];
3176
Matan Barakb4ff3a32016-02-09 14:57:42 +02003177 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003178
3179 struct mlx5_ifc_qpc_bits qpc;
3180
Matan Barakb4ff3a32016-02-09 14:57:42 +02003181 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003182};
3183
3184struct mlx5_ifc_set_roce_address_out_bits {
3185 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003186 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003187
3188 u8 syndrome[0x20];
3189
Matan Barakb4ff3a32016-02-09 14:57:42 +02003190 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003191};
3192
3193struct mlx5_ifc_set_roce_address_in_bits {
3194 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003195 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003196
Matan Barakb4ff3a32016-02-09 14:57:42 +02003197 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003198 u8 op_mod[0x10];
3199
3200 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003201 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003202
Matan Barakb4ff3a32016-02-09 14:57:42 +02003203 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003204
3205 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3206};
3207
3208struct mlx5_ifc_set_mad_demux_out_bits {
3209 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003210 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003211
3212 u8 syndrome[0x20];
3213
Matan Barakb4ff3a32016-02-09 14:57:42 +02003214 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003215};
3216
3217enum {
3218 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3219 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3220};
3221
3222struct mlx5_ifc_set_mad_demux_in_bits {
3223 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003224 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003225
Matan Barakb4ff3a32016-02-09 14:57:42 +02003226 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003227 u8 op_mod[0x10];
3228
Matan Barakb4ff3a32016-02-09 14:57:42 +02003229 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003230
Matan Barakb4ff3a32016-02-09 14:57:42 +02003231 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003232 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003233 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003234};
3235
3236struct mlx5_ifc_set_l2_table_entry_out_bits {
3237 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003238 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003239
3240 u8 syndrome[0x20];
3241
Matan Barakb4ff3a32016-02-09 14:57:42 +02003242 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003243};
3244
3245struct mlx5_ifc_set_l2_table_entry_in_bits {
3246 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003247 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003248
Matan Barakb4ff3a32016-02-09 14:57:42 +02003249 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003250 u8 op_mod[0x10];
3251
Matan Barakb4ff3a32016-02-09 14:57:42 +02003252 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003253
Matan Barakb4ff3a32016-02-09 14:57:42 +02003254 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003255 u8 table_index[0x18];
3256
Matan Barakb4ff3a32016-02-09 14:57:42 +02003257 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003258
Matan Barakb4ff3a32016-02-09 14:57:42 +02003259 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003260 u8 vlan_valid[0x1];
3261 u8 vlan[0xc];
3262
3263 struct mlx5_ifc_mac_address_layout_bits mac_address;
3264
Matan Barakb4ff3a32016-02-09 14:57:42 +02003265 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003266};
3267
3268struct mlx5_ifc_set_issi_out_bits {
3269 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003270 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003271
3272 u8 syndrome[0x20];
3273
Matan Barakb4ff3a32016-02-09 14:57:42 +02003274 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003275};
3276
3277struct mlx5_ifc_set_issi_in_bits {
3278 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003279 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003280
Matan Barakb4ff3a32016-02-09 14:57:42 +02003281 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003282 u8 op_mod[0x10];
3283
Matan Barakb4ff3a32016-02-09 14:57:42 +02003284 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003285 u8 current_issi[0x10];
3286
Matan Barakb4ff3a32016-02-09 14:57:42 +02003287 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003288};
3289
3290struct mlx5_ifc_set_hca_cap_out_bits {
3291 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003292 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003293
3294 u8 syndrome[0x20];
3295
Matan Barakb4ff3a32016-02-09 14:57:42 +02003296 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003297};
3298
3299struct mlx5_ifc_set_hca_cap_in_bits {
3300 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003301 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003302
Matan Barakb4ff3a32016-02-09 14:57:42 +02003303 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003304 u8 op_mod[0x10];
3305
Matan Barakb4ff3a32016-02-09 14:57:42 +02003306 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003307
Saeed Mahameede2816822015-05-28 22:28:40 +03003308 union mlx5_ifc_hca_cap_union_bits capability;
3309};
3310
Maor Gottlieb26a81452015-12-10 17:12:39 +02003311enum {
3312 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3313 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3314 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3315 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3316};
3317
Saeed Mahameede2816822015-05-28 22:28:40 +03003318struct mlx5_ifc_set_fte_out_bits {
3319 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003320 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003321
3322 u8 syndrome[0x20];
3323
Matan Barakb4ff3a32016-02-09 14:57:42 +02003324 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003325};
3326
3327struct mlx5_ifc_set_fte_in_bits {
3328 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003329 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003330
Matan Barakb4ff3a32016-02-09 14:57:42 +02003331 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003332 u8 op_mod[0x10];
3333
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003334 u8 other_vport[0x1];
3335 u8 reserved_at_41[0xf];
3336 u8 vport_number[0x10];
3337
3338 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003339
3340 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003341 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003342
Matan Barakb4ff3a32016-02-09 14:57:42 +02003343 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003344 u8 table_id[0x18];
3345
Matan Barakb4ff3a32016-02-09 14:57:42 +02003346 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003347 u8 modify_enable_mask[0x8];
3348
Matan Barakb4ff3a32016-02-09 14:57:42 +02003349 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003350
3351 u8 flow_index[0x20];
3352
Matan Barakb4ff3a32016-02-09 14:57:42 +02003353 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003354
3355 struct mlx5_ifc_flow_context_bits flow_context;
3356};
3357
3358struct mlx5_ifc_rts2rts_qp_out_bits {
3359 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003360 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003361
3362 u8 syndrome[0x20];
3363
Matan Barakb4ff3a32016-02-09 14:57:42 +02003364 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003365};
3366
3367struct mlx5_ifc_rts2rts_qp_in_bits {
3368 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003369 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003370
Matan Barakb4ff3a32016-02-09 14:57:42 +02003371 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003372 u8 op_mod[0x10];
3373
Matan Barakb4ff3a32016-02-09 14:57:42 +02003374 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003375 u8 qpn[0x18];
3376
Matan Barakb4ff3a32016-02-09 14:57:42 +02003377 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003378
3379 u8 opt_param_mask[0x20];
3380
Matan Barakb4ff3a32016-02-09 14:57:42 +02003381 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003382
3383 struct mlx5_ifc_qpc_bits qpc;
3384
Matan Barakb4ff3a32016-02-09 14:57:42 +02003385 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003386};
3387
3388struct mlx5_ifc_rtr2rts_qp_out_bits {
3389 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003390 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003391
3392 u8 syndrome[0x20];
3393
Matan Barakb4ff3a32016-02-09 14:57:42 +02003394 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003395};
3396
3397struct mlx5_ifc_rtr2rts_qp_in_bits {
3398 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003399 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003400
Matan Barakb4ff3a32016-02-09 14:57:42 +02003401 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003402 u8 op_mod[0x10];
3403
Matan Barakb4ff3a32016-02-09 14:57:42 +02003404 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003405 u8 qpn[0x18];
3406
Matan Barakb4ff3a32016-02-09 14:57:42 +02003407 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003408
3409 u8 opt_param_mask[0x20];
3410
Matan Barakb4ff3a32016-02-09 14:57:42 +02003411 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003412
3413 struct mlx5_ifc_qpc_bits qpc;
3414
Matan Barakb4ff3a32016-02-09 14:57:42 +02003415 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003416};
3417
3418struct mlx5_ifc_rst2init_qp_out_bits {
3419 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003420 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003421
3422 u8 syndrome[0x20];
3423
Matan Barakb4ff3a32016-02-09 14:57:42 +02003424 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003425};
3426
3427struct mlx5_ifc_rst2init_qp_in_bits {
3428 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003429 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003430
Matan Barakb4ff3a32016-02-09 14:57:42 +02003431 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003432 u8 op_mod[0x10];
3433
Matan Barakb4ff3a32016-02-09 14:57:42 +02003434 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003435 u8 qpn[0x18];
3436
Matan Barakb4ff3a32016-02-09 14:57:42 +02003437 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003438
3439 u8 opt_param_mask[0x20];
3440
Matan Barakb4ff3a32016-02-09 14:57:42 +02003441 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003442
3443 struct mlx5_ifc_qpc_bits qpc;
3444
Matan Barakb4ff3a32016-02-09 14:57:42 +02003445 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003446};
3447
Saeed Mahameed74862162016-06-09 15:11:34 +03003448struct mlx5_ifc_query_xrq_out_bits {
3449 u8 status[0x8];
3450 u8 reserved_at_8[0x18];
3451
3452 u8 syndrome[0x20];
3453
3454 u8 reserved_at_40[0x40];
3455
3456 struct mlx5_ifc_xrqc_bits xrq_context;
3457};
3458
3459struct mlx5_ifc_query_xrq_in_bits {
3460 u8 opcode[0x10];
3461 u8 reserved_at_10[0x10];
3462
3463 u8 reserved_at_20[0x10];
3464 u8 op_mod[0x10];
3465
3466 u8 reserved_at_40[0x8];
3467 u8 xrqn[0x18];
3468
3469 u8 reserved_at_60[0x20];
3470};
3471
Saeed Mahameede2816822015-05-28 22:28:40 +03003472struct mlx5_ifc_query_xrc_srq_out_bits {
3473 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003474 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003475
3476 u8 syndrome[0x20];
3477
Matan Barakb4ff3a32016-02-09 14:57:42 +02003478 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003479
3480 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3481
Matan Barakb4ff3a32016-02-09 14:57:42 +02003482 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003483
3484 u8 pas[0][0x40];
3485};
3486
3487struct mlx5_ifc_query_xrc_srq_in_bits {
3488 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003489 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003490
Matan Barakb4ff3a32016-02-09 14:57:42 +02003491 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003492 u8 op_mod[0x10];
3493
Matan Barakb4ff3a32016-02-09 14:57:42 +02003494 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003495 u8 xrc_srqn[0x18];
3496
Matan Barakb4ff3a32016-02-09 14:57:42 +02003497 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003498};
3499
3500enum {
3501 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3502 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3503};
3504
3505struct mlx5_ifc_query_vport_state_out_bits {
3506 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003507 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003508
3509 u8 syndrome[0x20];
3510
Matan Barakb4ff3a32016-02-09 14:57:42 +02003511 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003512
Matan Barakb4ff3a32016-02-09 14:57:42 +02003513 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003514 u8 admin_state[0x4];
3515 u8 state[0x4];
3516};
3517
3518enum {
3519 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003520 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003521};
3522
3523struct mlx5_ifc_query_vport_state_in_bits {
3524 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003525 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003526
Matan Barakb4ff3a32016-02-09 14:57:42 +02003527 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003528 u8 op_mod[0x10];
3529
3530 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003531 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003532 u8 vport_number[0x10];
3533
Matan Barakb4ff3a32016-02-09 14:57:42 +02003534 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003535};
3536
3537struct mlx5_ifc_query_vport_counter_out_bits {
3538 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003539 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003540
3541 u8 syndrome[0x20];
3542
Matan Barakb4ff3a32016-02-09 14:57:42 +02003543 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003544
3545 struct mlx5_ifc_traffic_counter_bits received_errors;
3546
3547 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3548
3549 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3550
3551 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3552
3553 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3554
3555 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3556
3557 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3558
3559 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3560
3561 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3562
3563 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3564
3565 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3566
3567 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3568
Matan Barakb4ff3a32016-02-09 14:57:42 +02003569 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003570};
3571
3572enum {
3573 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3574};
3575
3576struct mlx5_ifc_query_vport_counter_in_bits {
3577 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003578 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003579
Matan Barakb4ff3a32016-02-09 14:57:42 +02003580 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003581 u8 op_mod[0x10];
3582
3583 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003584 u8 reserved_at_41[0xb];
3585 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003586 u8 vport_number[0x10];
3587
Matan Barakb4ff3a32016-02-09 14:57:42 +02003588 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003589
3590 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003591 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003592
Matan Barakb4ff3a32016-02-09 14:57:42 +02003593 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003594};
3595
3596struct mlx5_ifc_query_tis_out_bits {
3597 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003598 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003599
3600 u8 syndrome[0x20];
3601
Matan Barakb4ff3a32016-02-09 14:57:42 +02003602 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003603
3604 struct mlx5_ifc_tisc_bits tis_context;
3605};
3606
3607struct mlx5_ifc_query_tis_in_bits {
3608 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003609 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003610
Matan Barakb4ff3a32016-02-09 14:57:42 +02003611 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003612 u8 op_mod[0x10];
3613
Matan Barakb4ff3a32016-02-09 14:57:42 +02003614 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003615 u8 tisn[0x18];
3616
Matan Barakb4ff3a32016-02-09 14:57:42 +02003617 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003618};
3619
3620struct mlx5_ifc_query_tir_out_bits {
3621 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003622 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003623
3624 u8 syndrome[0x20];
3625
Matan Barakb4ff3a32016-02-09 14:57:42 +02003626 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003627
3628 struct mlx5_ifc_tirc_bits tir_context;
3629};
3630
3631struct mlx5_ifc_query_tir_in_bits {
3632 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003633 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003634
Matan Barakb4ff3a32016-02-09 14:57:42 +02003635 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003636 u8 op_mod[0x10];
3637
Matan Barakb4ff3a32016-02-09 14:57:42 +02003638 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003639 u8 tirn[0x18];
3640
Matan Barakb4ff3a32016-02-09 14:57:42 +02003641 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003642};
3643
3644struct mlx5_ifc_query_srq_out_bits {
3645 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003646 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003647
3648 u8 syndrome[0x20];
3649
Matan Barakb4ff3a32016-02-09 14:57:42 +02003650 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003651
3652 struct mlx5_ifc_srqc_bits srq_context_entry;
3653
Matan Barakb4ff3a32016-02-09 14:57:42 +02003654 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003655
3656 u8 pas[0][0x40];
3657};
3658
3659struct mlx5_ifc_query_srq_in_bits {
3660 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003661 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003662
Matan Barakb4ff3a32016-02-09 14:57:42 +02003663 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003664 u8 op_mod[0x10];
3665
Matan Barakb4ff3a32016-02-09 14:57:42 +02003666 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003667 u8 srqn[0x18];
3668
Matan Barakb4ff3a32016-02-09 14:57:42 +02003669 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003670};
3671
3672struct mlx5_ifc_query_sq_out_bits {
3673 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003674 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003675
3676 u8 syndrome[0x20];
3677
Matan Barakb4ff3a32016-02-09 14:57:42 +02003678 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003679
3680 struct mlx5_ifc_sqc_bits sq_context;
3681};
3682
3683struct mlx5_ifc_query_sq_in_bits {
3684 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003685 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003686
Matan Barakb4ff3a32016-02-09 14:57:42 +02003687 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003688 u8 op_mod[0x10];
3689
Matan Barakb4ff3a32016-02-09 14:57:42 +02003690 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003691 u8 sqn[0x18];
3692
Matan Barakb4ff3a32016-02-09 14:57:42 +02003693 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003694};
3695
3696struct mlx5_ifc_query_special_contexts_out_bits {
3697 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003698 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003699
3700 u8 syndrome[0x20];
3701
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003702 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003703
3704 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003705
3706 u8 null_mkey[0x20];
3707
3708 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003709};
3710
3711struct mlx5_ifc_query_special_contexts_in_bits {
3712 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003713 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003714
Matan Barakb4ff3a32016-02-09 14:57:42 +02003715 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003716 u8 op_mod[0x10];
3717
Matan Barakb4ff3a32016-02-09 14:57:42 +02003718 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003719};
3720
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003721struct mlx5_ifc_query_scheduling_element_out_bits {
3722 u8 opcode[0x10];
3723 u8 reserved_at_10[0x10];
3724
3725 u8 reserved_at_20[0x10];
3726 u8 op_mod[0x10];
3727
3728 u8 reserved_at_40[0xc0];
3729
3730 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3731
3732 u8 reserved_at_300[0x100];
3733};
3734
3735enum {
3736 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3737};
3738
3739struct mlx5_ifc_query_scheduling_element_in_bits {
3740 u8 opcode[0x10];
3741 u8 reserved_at_10[0x10];
3742
3743 u8 reserved_at_20[0x10];
3744 u8 op_mod[0x10];
3745
3746 u8 scheduling_hierarchy[0x8];
3747 u8 reserved_at_48[0x18];
3748
3749 u8 scheduling_element_id[0x20];
3750
3751 u8 reserved_at_80[0x180];
3752};
3753
Saeed Mahameede2816822015-05-28 22:28:40 +03003754struct mlx5_ifc_query_rqt_out_bits {
3755 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003756 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003757
3758 u8 syndrome[0x20];
3759
Matan Barakb4ff3a32016-02-09 14:57:42 +02003760 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003761
3762 struct mlx5_ifc_rqtc_bits rqt_context;
3763};
3764
3765struct mlx5_ifc_query_rqt_in_bits {
3766 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003767 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003768
Matan Barakb4ff3a32016-02-09 14:57:42 +02003769 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003770 u8 op_mod[0x10];
3771
Matan Barakb4ff3a32016-02-09 14:57:42 +02003772 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003773 u8 rqtn[0x18];
3774
Matan Barakb4ff3a32016-02-09 14:57:42 +02003775 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003776};
3777
3778struct mlx5_ifc_query_rq_out_bits {
3779 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003780 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003781
3782 u8 syndrome[0x20];
3783
Matan Barakb4ff3a32016-02-09 14:57:42 +02003784 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003785
3786 struct mlx5_ifc_rqc_bits rq_context;
3787};
3788
3789struct mlx5_ifc_query_rq_in_bits {
3790 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003791 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003792
Matan Barakb4ff3a32016-02-09 14:57:42 +02003793 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003794 u8 op_mod[0x10];
3795
Matan Barakb4ff3a32016-02-09 14:57:42 +02003796 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003797 u8 rqn[0x18];
3798
Matan Barakb4ff3a32016-02-09 14:57:42 +02003799 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003800};
3801
3802struct mlx5_ifc_query_roce_address_out_bits {
3803 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003804 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003805
3806 u8 syndrome[0x20];
3807
Matan Barakb4ff3a32016-02-09 14:57:42 +02003808 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003809
3810 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3811};
3812
3813struct mlx5_ifc_query_roce_address_in_bits {
3814 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003815 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003816
Matan Barakb4ff3a32016-02-09 14:57:42 +02003817 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003818 u8 op_mod[0x10];
3819
3820 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003821 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003822
Matan Barakb4ff3a32016-02-09 14:57:42 +02003823 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003824};
3825
3826struct mlx5_ifc_query_rmp_out_bits {
3827 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003828 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003829
3830 u8 syndrome[0x20];
3831
Matan Barakb4ff3a32016-02-09 14:57:42 +02003832 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003833
3834 struct mlx5_ifc_rmpc_bits rmp_context;
3835};
3836
3837struct mlx5_ifc_query_rmp_in_bits {
3838 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003839 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003840
Matan Barakb4ff3a32016-02-09 14:57:42 +02003841 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003842 u8 op_mod[0x10];
3843
Matan Barakb4ff3a32016-02-09 14:57:42 +02003844 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003845 u8 rmpn[0x18];
3846
Matan Barakb4ff3a32016-02-09 14:57:42 +02003847 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003848};
3849
3850struct mlx5_ifc_query_qp_out_bits {
3851 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003852 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003853
3854 u8 syndrome[0x20];
3855
Matan Barakb4ff3a32016-02-09 14:57:42 +02003856 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003857
3858 u8 opt_param_mask[0x20];
3859
Matan Barakb4ff3a32016-02-09 14:57:42 +02003860 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003861
3862 struct mlx5_ifc_qpc_bits qpc;
3863
Matan Barakb4ff3a32016-02-09 14:57:42 +02003864 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003865
3866 u8 pas[0][0x40];
3867};
3868
3869struct mlx5_ifc_query_qp_in_bits {
3870 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003871 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003872
Matan Barakb4ff3a32016-02-09 14:57:42 +02003873 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003874 u8 op_mod[0x10];
3875
Matan Barakb4ff3a32016-02-09 14:57:42 +02003876 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003877 u8 qpn[0x18];
3878
Matan Barakb4ff3a32016-02-09 14:57:42 +02003879 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003880};
3881
3882struct mlx5_ifc_query_q_counter_out_bits {
3883 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003884 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003885
3886 u8 syndrome[0x20];
3887
Matan Barakb4ff3a32016-02-09 14:57:42 +02003888 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003889
3890 u8 rx_write_requests[0x20];
3891
Matan Barakb4ff3a32016-02-09 14:57:42 +02003892 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003893
3894 u8 rx_read_requests[0x20];
3895
Matan Barakb4ff3a32016-02-09 14:57:42 +02003896 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003897
3898 u8 rx_atomic_requests[0x20];
3899
Matan Barakb4ff3a32016-02-09 14:57:42 +02003900 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003901
3902 u8 rx_dct_connect[0x20];
3903
Matan Barakb4ff3a32016-02-09 14:57:42 +02003904 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003905
3906 u8 out_of_buffer[0x20];
3907
Matan Barakb4ff3a32016-02-09 14:57:42 +02003908 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003909
3910 u8 out_of_sequence[0x20];
3911
Saeed Mahameed74862162016-06-09 15:11:34 +03003912 u8 reserved_at_1e0[0x20];
3913
3914 u8 duplicate_request[0x20];
3915
3916 u8 reserved_at_220[0x20];
3917
3918 u8 rnr_nak_retry_err[0x20];
3919
3920 u8 reserved_at_260[0x20];
3921
3922 u8 packet_seq_err[0x20];
3923
3924 u8 reserved_at_2a0[0x20];
3925
3926 u8 implied_nak_seq_err[0x20];
3927
3928 u8 reserved_at_2e0[0x20];
3929
3930 u8 local_ack_timeout_err[0x20];
3931
3932 u8 reserved_at_320[0x4e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003933};
3934
3935struct mlx5_ifc_query_q_counter_in_bits {
3936 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003937 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003938
Matan Barakb4ff3a32016-02-09 14:57:42 +02003939 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003940 u8 op_mod[0x10];
3941
Matan Barakb4ff3a32016-02-09 14:57:42 +02003942 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003943
3944 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003945 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003946
Matan Barakb4ff3a32016-02-09 14:57:42 +02003947 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003948 u8 counter_set_id[0x8];
3949};
3950
3951struct mlx5_ifc_query_pages_out_bits {
3952 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003953 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003954
3955 u8 syndrome[0x20];
3956
Matan Barakb4ff3a32016-02-09 14:57:42 +02003957 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003958 u8 function_id[0x10];
3959
3960 u8 num_pages[0x20];
3961};
3962
3963enum {
3964 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
3965 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
3966 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
3967};
3968
3969struct mlx5_ifc_query_pages_in_bits {
3970 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003971 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003972
Matan Barakb4ff3a32016-02-09 14:57:42 +02003973 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003974 u8 op_mod[0x10];
3975
Matan Barakb4ff3a32016-02-09 14:57:42 +02003976 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003977 u8 function_id[0x10];
3978
Matan Barakb4ff3a32016-02-09 14:57:42 +02003979 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003980};
3981
3982struct mlx5_ifc_query_nic_vport_context_out_bits {
3983 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003984 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003985
3986 u8 syndrome[0x20];
3987
Matan Barakb4ff3a32016-02-09 14:57:42 +02003988 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003989
3990 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
3991};
3992
3993struct mlx5_ifc_query_nic_vport_context_in_bits {
3994 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003995 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003996
Matan Barakb4ff3a32016-02-09 14:57:42 +02003997 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003998 u8 op_mod[0x10];
3999
4000 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004001 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004002 u8 vport_number[0x10];
4003
Matan Barakb4ff3a32016-02-09 14:57:42 +02004004 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004005 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004006 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004007};
4008
4009struct mlx5_ifc_query_mkey_out_bits {
4010 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004011 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004012
4013 u8 syndrome[0x20];
4014
Matan Barakb4ff3a32016-02-09 14:57:42 +02004015 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004016
4017 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4018
Matan Barakb4ff3a32016-02-09 14:57:42 +02004019 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004020
4021 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4022
4023 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4024};
4025
4026struct mlx5_ifc_query_mkey_in_bits {
4027 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004028 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004029
Matan Barakb4ff3a32016-02-09 14:57:42 +02004030 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004031 u8 op_mod[0x10];
4032
Matan Barakb4ff3a32016-02-09 14:57:42 +02004033 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004034 u8 mkey_index[0x18];
4035
4036 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004037 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004038};
4039
4040struct mlx5_ifc_query_mad_demux_out_bits {
4041 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004042 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004043
4044 u8 syndrome[0x20];
4045
Matan Barakb4ff3a32016-02-09 14:57:42 +02004046 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004047
4048 u8 mad_dumux_parameters_block[0x20];
4049};
4050
4051struct mlx5_ifc_query_mad_demux_in_bits {
4052 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004053 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004054
Matan Barakb4ff3a32016-02-09 14:57:42 +02004055 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004056 u8 op_mod[0x10];
4057
Matan Barakb4ff3a32016-02-09 14:57:42 +02004058 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004059};
4060
4061struct mlx5_ifc_query_l2_table_entry_out_bits {
4062 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004063 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004064
4065 u8 syndrome[0x20];
4066
Matan Barakb4ff3a32016-02-09 14:57:42 +02004067 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004068
Matan Barakb4ff3a32016-02-09 14:57:42 +02004069 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004070 u8 vlan_valid[0x1];
4071 u8 vlan[0xc];
4072
4073 struct mlx5_ifc_mac_address_layout_bits mac_address;
4074
Matan Barakb4ff3a32016-02-09 14:57:42 +02004075 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004076};
4077
4078struct mlx5_ifc_query_l2_table_entry_in_bits {
4079 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004080 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004081
Matan Barakb4ff3a32016-02-09 14:57:42 +02004082 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004083 u8 op_mod[0x10];
4084
Matan Barakb4ff3a32016-02-09 14:57:42 +02004085 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004086
Matan Barakb4ff3a32016-02-09 14:57:42 +02004087 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004088 u8 table_index[0x18];
4089
Matan Barakb4ff3a32016-02-09 14:57:42 +02004090 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004091};
4092
4093struct mlx5_ifc_query_issi_out_bits {
4094 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004095 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004096
4097 u8 syndrome[0x20];
4098
Matan Barakb4ff3a32016-02-09 14:57:42 +02004099 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004100 u8 current_issi[0x10];
4101
Matan Barakb4ff3a32016-02-09 14:57:42 +02004102 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004103
Matan Barakb4ff3a32016-02-09 14:57:42 +02004104 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004105 u8 supported_issi_dw0[0x20];
4106};
4107
4108struct mlx5_ifc_query_issi_in_bits {
4109 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004110 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004111
Matan Barakb4ff3a32016-02-09 14:57:42 +02004112 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004113 u8 op_mod[0x10];
4114
Matan Barakb4ff3a32016-02-09 14:57:42 +02004115 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004116};
4117
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004118struct mlx5_ifc_set_driver_version_out_bits {
4119 u8 status[0x8];
4120 u8 reserved_0[0x18];
4121
4122 u8 syndrome[0x20];
4123 u8 reserved_1[0x40];
4124};
4125
4126struct mlx5_ifc_set_driver_version_in_bits {
4127 u8 opcode[0x10];
4128 u8 reserved_0[0x10];
4129
4130 u8 reserved_1[0x10];
4131 u8 op_mod[0x10];
4132
4133 u8 reserved_2[0x40];
4134 u8 driver_version[64][0x8];
4135};
4136
Saeed Mahameede2816822015-05-28 22:28:40 +03004137struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4138 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004139 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004140
4141 u8 syndrome[0x20];
4142
Matan Barakb4ff3a32016-02-09 14:57:42 +02004143 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004144
4145 struct mlx5_ifc_pkey_bits pkey[0];
4146};
4147
4148struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4149 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004150 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004151
Matan Barakb4ff3a32016-02-09 14:57:42 +02004152 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004153 u8 op_mod[0x10];
4154
4155 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004156 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004157 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004158 u8 vport_number[0x10];
4159
Matan Barakb4ff3a32016-02-09 14:57:42 +02004160 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004161 u8 pkey_index[0x10];
4162};
4163
Eli Coheneff901d2016-03-11 22:58:42 +02004164enum {
4165 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4166 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4167 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4168};
4169
Saeed Mahameede2816822015-05-28 22:28:40 +03004170struct mlx5_ifc_query_hca_vport_gid_out_bits {
4171 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004172 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004173
4174 u8 syndrome[0x20];
4175
Matan Barakb4ff3a32016-02-09 14:57:42 +02004176 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004177
4178 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004179 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004180
4181 struct mlx5_ifc_array128_auto_bits gid[0];
4182};
4183
4184struct mlx5_ifc_query_hca_vport_gid_in_bits {
4185 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004186 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004187
Matan Barakb4ff3a32016-02-09 14:57:42 +02004188 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004189 u8 op_mod[0x10];
4190
4191 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004192 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004193 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004194 u8 vport_number[0x10];
4195
Matan Barakb4ff3a32016-02-09 14:57:42 +02004196 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004197 u8 gid_index[0x10];
4198};
4199
4200struct mlx5_ifc_query_hca_vport_context_out_bits {
4201 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004202 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004203
4204 u8 syndrome[0x20];
4205
Matan Barakb4ff3a32016-02-09 14:57:42 +02004206 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004207
4208 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4209};
4210
4211struct mlx5_ifc_query_hca_vport_context_in_bits {
4212 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004213 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004214
Matan Barakb4ff3a32016-02-09 14:57:42 +02004215 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004216 u8 op_mod[0x10];
4217
4218 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004219 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004220 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004221 u8 vport_number[0x10];
4222
Matan Barakb4ff3a32016-02-09 14:57:42 +02004223 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004224};
4225
4226struct mlx5_ifc_query_hca_cap_out_bits {
4227 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004228 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004229
4230 u8 syndrome[0x20];
4231
Matan Barakb4ff3a32016-02-09 14:57:42 +02004232 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004233
4234 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004235};
4236
4237struct mlx5_ifc_query_hca_cap_in_bits {
4238 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004239 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004240
Matan Barakb4ff3a32016-02-09 14:57:42 +02004241 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004242 u8 op_mod[0x10];
4243
Matan Barakb4ff3a32016-02-09 14:57:42 +02004244 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004245};
4246
Saeed Mahameede2816822015-05-28 22:28:40 +03004247struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004248 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004249 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004250
4251 u8 syndrome[0x20];
4252
Matan Barakb4ff3a32016-02-09 14:57:42 +02004253 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004254
Matan Barakb4ff3a32016-02-09 14:57:42 +02004255 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004256 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004257 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004258 u8 log_size[0x8];
4259
Matan Barakb4ff3a32016-02-09 14:57:42 +02004260 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004261};
4262
Saeed Mahameede2816822015-05-28 22:28:40 +03004263struct mlx5_ifc_query_flow_table_in_bits {
4264 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004265 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004266
Matan Barakb4ff3a32016-02-09 14:57:42 +02004267 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004268 u8 op_mod[0x10];
4269
Matan Barakb4ff3a32016-02-09 14:57:42 +02004270 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004271
4272 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004273 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004274
Matan Barakb4ff3a32016-02-09 14:57:42 +02004275 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004276 u8 table_id[0x18];
4277
Matan Barakb4ff3a32016-02-09 14:57:42 +02004278 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004279};
4280
4281struct mlx5_ifc_query_fte_out_bits {
4282 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004283 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004284
4285 u8 syndrome[0x20];
4286
Matan Barakb4ff3a32016-02-09 14:57:42 +02004287 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004288
4289 struct mlx5_ifc_flow_context_bits flow_context;
4290};
4291
4292struct mlx5_ifc_query_fte_in_bits {
4293 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004294 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004295
Matan Barakb4ff3a32016-02-09 14:57:42 +02004296 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004297 u8 op_mod[0x10];
4298
Matan Barakb4ff3a32016-02-09 14:57:42 +02004299 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004300
4301 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004302 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004303
Matan Barakb4ff3a32016-02-09 14:57:42 +02004304 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004305 u8 table_id[0x18];
4306
Matan Barakb4ff3a32016-02-09 14:57:42 +02004307 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004308
4309 u8 flow_index[0x20];
4310
Matan Barakb4ff3a32016-02-09 14:57:42 +02004311 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004312};
4313
4314enum {
4315 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4316 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4317 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4318};
4319
4320struct mlx5_ifc_query_flow_group_out_bits {
4321 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004322 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004323
4324 u8 syndrome[0x20];
4325
Matan Barakb4ff3a32016-02-09 14:57:42 +02004326 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004327
4328 u8 start_flow_index[0x20];
4329
Matan Barakb4ff3a32016-02-09 14:57:42 +02004330 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004331
4332 u8 end_flow_index[0x20];
4333
Matan Barakb4ff3a32016-02-09 14:57:42 +02004334 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004335
Matan Barakb4ff3a32016-02-09 14:57:42 +02004336 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004337 u8 match_criteria_enable[0x8];
4338
4339 struct mlx5_ifc_fte_match_param_bits match_criteria;
4340
Matan Barakb4ff3a32016-02-09 14:57:42 +02004341 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004342};
4343
4344struct mlx5_ifc_query_flow_group_in_bits {
4345 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004346 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004347
Matan Barakb4ff3a32016-02-09 14:57:42 +02004348 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004349 u8 op_mod[0x10];
4350
Matan Barakb4ff3a32016-02-09 14:57:42 +02004351 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004352
4353 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004354 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004355
Matan Barakb4ff3a32016-02-09 14:57:42 +02004356 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004357 u8 table_id[0x18];
4358
4359 u8 group_id[0x20];
4360
Matan Barakb4ff3a32016-02-09 14:57:42 +02004361 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004362};
4363
Amir Vadai9dc0b282016-05-13 12:55:39 +00004364struct mlx5_ifc_query_flow_counter_out_bits {
4365 u8 status[0x8];
4366 u8 reserved_at_8[0x18];
4367
4368 u8 syndrome[0x20];
4369
4370 u8 reserved_at_40[0x40];
4371
4372 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4373};
4374
4375struct mlx5_ifc_query_flow_counter_in_bits {
4376 u8 opcode[0x10];
4377 u8 reserved_at_10[0x10];
4378
4379 u8 reserved_at_20[0x10];
4380 u8 op_mod[0x10];
4381
4382 u8 reserved_at_40[0x80];
4383
4384 u8 clear[0x1];
4385 u8 reserved_at_c1[0xf];
4386 u8 num_of_counters[0x10];
4387
4388 u8 reserved_at_e0[0x10];
4389 u8 flow_counter_id[0x10];
4390};
4391
Saeed Mahameedd6666752015-12-01 18:03:22 +02004392struct mlx5_ifc_query_esw_vport_context_out_bits {
4393 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004394 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004395
4396 u8 syndrome[0x20];
4397
Matan Barakb4ff3a32016-02-09 14:57:42 +02004398 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004399
4400 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4401};
4402
4403struct mlx5_ifc_query_esw_vport_context_in_bits {
4404 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004405 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004406
Matan Barakb4ff3a32016-02-09 14:57:42 +02004407 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004408 u8 op_mod[0x10];
4409
4410 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004411 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004412 u8 vport_number[0x10];
4413
Matan Barakb4ff3a32016-02-09 14:57:42 +02004414 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004415};
4416
4417struct mlx5_ifc_modify_esw_vport_context_out_bits {
4418 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004419 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004420
4421 u8 syndrome[0x20];
4422
Matan Barakb4ff3a32016-02-09 14:57:42 +02004423 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004424};
4425
4426struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004427 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004428 u8 vport_cvlan_insert[0x1];
4429 u8 vport_svlan_insert[0x1];
4430 u8 vport_cvlan_strip[0x1];
4431 u8 vport_svlan_strip[0x1];
4432};
4433
4434struct mlx5_ifc_modify_esw_vport_context_in_bits {
4435 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004436 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004437
Matan Barakb4ff3a32016-02-09 14:57:42 +02004438 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004439 u8 op_mod[0x10];
4440
4441 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004442 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004443 u8 vport_number[0x10];
4444
4445 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4446
4447 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4448};
4449
Saeed Mahameede2816822015-05-28 22:28:40 +03004450struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004451 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004452 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004453
4454 u8 syndrome[0x20];
4455
Matan Barakb4ff3a32016-02-09 14:57:42 +02004456 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004457
4458 struct mlx5_ifc_eqc_bits eq_context_entry;
4459
Matan Barakb4ff3a32016-02-09 14:57:42 +02004460 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004461
4462 u8 event_bitmask[0x40];
4463
Matan Barakb4ff3a32016-02-09 14:57:42 +02004464 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004465
4466 u8 pas[0][0x40];
4467};
4468
4469struct mlx5_ifc_query_eq_in_bits {
4470 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004471 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004472
Matan Barakb4ff3a32016-02-09 14:57:42 +02004473 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004474 u8 op_mod[0x10];
4475
Matan Barakb4ff3a32016-02-09 14:57:42 +02004476 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004477 u8 eq_number[0x8];
4478
Matan Barakb4ff3a32016-02-09 14:57:42 +02004479 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004480};
4481
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004482struct mlx5_ifc_encap_header_in_bits {
4483 u8 reserved_at_0[0x5];
4484 u8 header_type[0x3];
4485 u8 reserved_at_8[0xe];
4486 u8 encap_header_size[0xa];
4487
4488 u8 reserved_at_20[0x10];
4489 u8 encap_header[2][0x8];
4490
4491 u8 more_encap_header[0][0x8];
4492};
4493
4494struct mlx5_ifc_query_encap_header_out_bits {
4495 u8 status[0x8];
4496 u8 reserved_at_8[0x18];
4497
4498 u8 syndrome[0x20];
4499
4500 u8 reserved_at_40[0xa0];
4501
4502 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4503};
4504
4505struct mlx5_ifc_query_encap_header_in_bits {
4506 u8 opcode[0x10];
4507 u8 reserved_at_10[0x10];
4508
4509 u8 reserved_at_20[0x10];
4510 u8 op_mod[0x10];
4511
4512 u8 encap_id[0x20];
4513
4514 u8 reserved_at_60[0xa0];
4515};
4516
4517struct mlx5_ifc_alloc_encap_header_out_bits {
4518 u8 status[0x8];
4519 u8 reserved_at_8[0x18];
4520
4521 u8 syndrome[0x20];
4522
4523 u8 encap_id[0x20];
4524
4525 u8 reserved_at_60[0x20];
4526};
4527
4528struct mlx5_ifc_alloc_encap_header_in_bits {
4529 u8 opcode[0x10];
4530 u8 reserved_at_10[0x10];
4531
4532 u8 reserved_at_20[0x10];
4533 u8 op_mod[0x10];
4534
4535 u8 reserved_at_40[0xa0];
4536
4537 struct mlx5_ifc_encap_header_in_bits encap_header;
4538};
4539
4540struct mlx5_ifc_dealloc_encap_header_out_bits {
4541 u8 status[0x8];
4542 u8 reserved_at_8[0x18];
4543
4544 u8 syndrome[0x20];
4545
4546 u8 reserved_at_40[0x40];
4547};
4548
4549struct mlx5_ifc_dealloc_encap_header_in_bits {
4550 u8 opcode[0x10];
4551 u8 reserved_at_10[0x10];
4552
4553 u8 reserved_20[0x10];
4554 u8 op_mod[0x10];
4555
4556 u8 encap_id[0x20];
4557
4558 u8 reserved_60[0x20];
4559};
4560
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004561struct mlx5_ifc_set_action_in_bits {
4562 u8 action_type[0x4];
4563 u8 field[0xc];
4564 u8 reserved_at_10[0x3];
4565 u8 offset[0x5];
4566 u8 reserved_at_18[0x3];
4567 u8 length[0x5];
4568
4569 u8 data[0x20];
4570};
4571
4572struct mlx5_ifc_add_action_in_bits {
4573 u8 action_type[0x4];
4574 u8 field[0xc];
4575 u8 reserved_at_10[0x10];
4576
4577 u8 data[0x20];
4578};
4579
4580union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4581 struct mlx5_ifc_set_action_in_bits set_action_in;
4582 struct mlx5_ifc_add_action_in_bits add_action_in;
4583 u8 reserved_at_0[0x40];
4584};
4585
4586enum {
4587 MLX5_ACTION_TYPE_SET = 0x1,
4588 MLX5_ACTION_TYPE_ADD = 0x2,
4589};
4590
4591enum {
4592 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4593 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4594 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4595 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4596 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4597 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4598 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4599 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4600 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4601 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4602 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4603 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4604 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4605 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4606 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4607 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4608 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4609 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4610 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4611 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4612 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4613 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
4614};
4615
4616struct mlx5_ifc_alloc_modify_header_context_out_bits {
4617 u8 status[0x8];
4618 u8 reserved_at_8[0x18];
4619
4620 u8 syndrome[0x20];
4621
4622 u8 modify_header_id[0x20];
4623
4624 u8 reserved_at_60[0x20];
4625};
4626
4627struct mlx5_ifc_alloc_modify_header_context_in_bits {
4628 u8 opcode[0x10];
4629 u8 reserved_at_10[0x10];
4630
4631 u8 reserved_at_20[0x10];
4632 u8 op_mod[0x10];
4633
4634 u8 reserved_at_40[0x20];
4635
4636 u8 table_type[0x8];
4637 u8 reserved_at_68[0x10];
4638 u8 num_of_actions[0x8];
4639
4640 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4641};
4642
4643struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4644 u8 status[0x8];
4645 u8 reserved_at_8[0x18];
4646
4647 u8 syndrome[0x20];
4648
4649 u8 reserved_at_40[0x40];
4650};
4651
4652struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4653 u8 opcode[0x10];
4654 u8 reserved_at_10[0x10];
4655
4656 u8 reserved_at_20[0x10];
4657 u8 op_mod[0x10];
4658
4659 u8 modify_header_id[0x20];
4660
4661 u8 reserved_at_60[0x20];
4662};
4663
Saeed Mahameede2816822015-05-28 22:28:40 +03004664struct mlx5_ifc_query_dct_out_bits {
4665 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004666 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004667
4668 u8 syndrome[0x20];
4669
Matan Barakb4ff3a32016-02-09 14:57:42 +02004670 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004671
4672 struct mlx5_ifc_dctc_bits dct_context_entry;
4673
Matan Barakb4ff3a32016-02-09 14:57:42 +02004674 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004675};
4676
4677struct mlx5_ifc_query_dct_in_bits {
4678 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004679 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004680
Matan Barakb4ff3a32016-02-09 14:57:42 +02004681 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004682 u8 op_mod[0x10];
4683
Matan Barakb4ff3a32016-02-09 14:57:42 +02004684 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004685 u8 dctn[0x18];
4686
Matan Barakb4ff3a32016-02-09 14:57:42 +02004687 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004688};
4689
4690struct mlx5_ifc_query_cq_out_bits {
4691 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004692 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004693
4694 u8 syndrome[0x20];
4695
Matan Barakb4ff3a32016-02-09 14:57:42 +02004696 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004697
4698 struct mlx5_ifc_cqc_bits cq_context;
4699
Matan Barakb4ff3a32016-02-09 14:57:42 +02004700 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004701
4702 u8 pas[0][0x40];
4703};
4704
4705struct mlx5_ifc_query_cq_in_bits {
4706 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004707 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004708
Matan Barakb4ff3a32016-02-09 14:57:42 +02004709 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004710 u8 op_mod[0x10];
4711
Matan Barakb4ff3a32016-02-09 14:57:42 +02004712 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004713 u8 cqn[0x18];
4714
Matan Barakb4ff3a32016-02-09 14:57:42 +02004715 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004716};
4717
4718struct mlx5_ifc_query_cong_status_out_bits {
4719 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004720 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004721
4722 u8 syndrome[0x20];
4723
Matan Barakb4ff3a32016-02-09 14:57:42 +02004724 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004725
4726 u8 enable[0x1];
4727 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004728 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004729};
4730
4731struct mlx5_ifc_query_cong_status_in_bits {
4732 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004733 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004734
Matan Barakb4ff3a32016-02-09 14:57:42 +02004735 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004736 u8 op_mod[0x10];
4737
Matan Barakb4ff3a32016-02-09 14:57:42 +02004738 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004739 u8 priority[0x4];
4740 u8 cong_protocol[0x4];
4741
Matan Barakb4ff3a32016-02-09 14:57:42 +02004742 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004743};
4744
4745struct mlx5_ifc_query_cong_statistics_out_bits {
4746 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004747 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004748
4749 u8 syndrome[0x20];
4750
Matan Barakb4ff3a32016-02-09 14:57:42 +02004751 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004752
Parav Pandite1f24a72017-04-16 07:29:29 +03004753 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004754
4755 u8 sum_flows[0x20];
4756
Parav Pandite1f24a72017-04-16 07:29:29 +03004757 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004758
Parav Pandite1f24a72017-04-16 07:29:29 +03004759 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004760
Parav Pandite1f24a72017-04-16 07:29:29 +03004761 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004762
Parav Pandite1f24a72017-04-16 07:29:29 +03004763 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004764
Matan Barakb4ff3a32016-02-09 14:57:42 +02004765 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004766
4767 u8 time_stamp_high[0x20];
4768
4769 u8 time_stamp_low[0x20];
4770
4771 u8 accumulators_period[0x20];
4772
Parav Pandite1f24a72017-04-16 07:29:29 +03004773 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004774
Parav Pandite1f24a72017-04-16 07:29:29 +03004775 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004776
Parav Pandite1f24a72017-04-16 07:29:29 +03004777 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004778
Parav Pandite1f24a72017-04-16 07:29:29 +03004779 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004780
Matan Barakb4ff3a32016-02-09 14:57:42 +02004781 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004782};
4783
4784struct mlx5_ifc_query_cong_statistics_in_bits {
4785 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004786 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004787
Matan Barakb4ff3a32016-02-09 14:57:42 +02004788 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004789 u8 op_mod[0x10];
4790
4791 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004792 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004793
Matan Barakb4ff3a32016-02-09 14:57:42 +02004794 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004795};
4796
4797struct mlx5_ifc_query_cong_params_out_bits {
4798 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004799 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004800
4801 u8 syndrome[0x20];
4802
Matan Barakb4ff3a32016-02-09 14:57:42 +02004803 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004804
4805 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4806};
4807
4808struct mlx5_ifc_query_cong_params_in_bits {
4809 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004810 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004811
Matan Barakb4ff3a32016-02-09 14:57:42 +02004812 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004813 u8 op_mod[0x10];
4814
Matan Barakb4ff3a32016-02-09 14:57:42 +02004815 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004816 u8 cong_protocol[0x4];
4817
Matan Barakb4ff3a32016-02-09 14:57:42 +02004818 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004819};
4820
4821struct mlx5_ifc_query_adapter_out_bits {
4822 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004823 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004824
4825 u8 syndrome[0x20];
4826
Matan Barakb4ff3a32016-02-09 14:57:42 +02004827 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004828
4829 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4830};
4831
4832struct mlx5_ifc_query_adapter_in_bits {
4833 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004834 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004835
Matan Barakb4ff3a32016-02-09 14:57:42 +02004836 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004837 u8 op_mod[0x10];
4838
Matan Barakb4ff3a32016-02-09 14:57:42 +02004839 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004840};
4841
4842struct mlx5_ifc_qp_2rst_out_bits {
4843 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004844 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004845
4846 u8 syndrome[0x20];
4847
Matan Barakb4ff3a32016-02-09 14:57:42 +02004848 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004849};
4850
4851struct mlx5_ifc_qp_2rst_in_bits {
4852 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004853 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004854
Matan Barakb4ff3a32016-02-09 14:57:42 +02004855 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004856 u8 op_mod[0x10];
4857
Matan Barakb4ff3a32016-02-09 14:57:42 +02004858 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004859 u8 qpn[0x18];
4860
Matan Barakb4ff3a32016-02-09 14:57:42 +02004861 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004862};
4863
4864struct mlx5_ifc_qp_2err_out_bits {
4865 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004866 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004867
4868 u8 syndrome[0x20];
4869
Matan Barakb4ff3a32016-02-09 14:57:42 +02004870 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004871};
4872
4873struct mlx5_ifc_qp_2err_in_bits {
4874 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004875 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004876
Matan Barakb4ff3a32016-02-09 14:57:42 +02004877 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004878 u8 op_mod[0x10];
4879
Matan Barakb4ff3a32016-02-09 14:57:42 +02004880 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004881 u8 qpn[0x18];
4882
Matan Barakb4ff3a32016-02-09 14:57:42 +02004883 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004884};
4885
4886struct mlx5_ifc_page_fault_resume_out_bits {
4887 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004888 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004889
4890 u8 syndrome[0x20];
4891
Matan Barakb4ff3a32016-02-09 14:57:42 +02004892 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004893};
4894
4895struct mlx5_ifc_page_fault_resume_in_bits {
4896 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004897 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004898
Matan Barakb4ff3a32016-02-09 14:57:42 +02004899 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004900 u8 op_mod[0x10];
4901
4902 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004903 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004904 u8 page_fault_type[0x3];
4905 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004906
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004907 u8 reserved_at_60[0x8];
4908 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004909};
4910
4911struct mlx5_ifc_nop_out_bits {
4912 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004913 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004914
4915 u8 syndrome[0x20];
4916
Matan Barakb4ff3a32016-02-09 14:57:42 +02004917 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004918};
4919
4920struct mlx5_ifc_nop_in_bits {
4921 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004922 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004923
Matan Barakb4ff3a32016-02-09 14:57:42 +02004924 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004925 u8 op_mod[0x10];
4926
Matan Barakb4ff3a32016-02-09 14:57:42 +02004927 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004928};
4929
4930struct mlx5_ifc_modify_vport_state_out_bits {
4931 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004932 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004933
4934 u8 syndrome[0x20];
4935
Matan Barakb4ff3a32016-02-09 14:57:42 +02004936 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004937};
4938
4939struct mlx5_ifc_modify_vport_state_in_bits {
4940 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004941 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004942
Matan Barakb4ff3a32016-02-09 14:57:42 +02004943 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004944 u8 op_mod[0x10];
4945
4946 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004947 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004948 u8 vport_number[0x10];
4949
Matan Barakb4ff3a32016-02-09 14:57:42 +02004950 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004951 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004952 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004953};
4954
4955struct mlx5_ifc_modify_tis_out_bits {
4956 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004957 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004958
4959 u8 syndrome[0x20];
4960
Matan Barakb4ff3a32016-02-09 14:57:42 +02004961 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004962};
4963
majd@mellanox.com75850d02016-01-14 19:13:06 +02004964struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004965 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004966
Aviv Heller84df61e2016-05-10 13:47:50 +03004967 u8 reserved_at_20[0x1d];
4968 u8 lag_tx_port_affinity[0x1];
4969 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004970 u8 prio[0x1];
4971};
4972
Saeed Mahameede2816822015-05-28 22:28:40 +03004973struct mlx5_ifc_modify_tis_in_bits {
4974 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004975 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004976
Matan Barakb4ff3a32016-02-09 14:57:42 +02004977 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004978 u8 op_mod[0x10];
4979
Matan Barakb4ff3a32016-02-09 14:57:42 +02004980 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004981 u8 tisn[0x18];
4982
Matan Barakb4ff3a32016-02-09 14:57:42 +02004983 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004984
majd@mellanox.com75850d02016-01-14 19:13:06 +02004985 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03004986
Matan Barakb4ff3a32016-02-09 14:57:42 +02004987 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004988
4989 struct mlx5_ifc_tisc_bits ctx;
4990};
4991
Achiad Shochatd9eea402015-08-04 14:05:42 +03004992struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004993 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03004994
Matan Barakb4ff3a32016-02-09 14:57:42 +02004995 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02004996 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02004997 u8 reserved_at_3c[0x1];
4998 u8 hash[0x1];
4999 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005000 u8 lro[0x1];
5001};
5002
Saeed Mahameede2816822015-05-28 22:28:40 +03005003struct mlx5_ifc_modify_tir_out_bits {
5004 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005005 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005006
5007 u8 syndrome[0x20];
5008
Matan Barakb4ff3a32016-02-09 14:57:42 +02005009 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005010};
5011
5012struct mlx5_ifc_modify_tir_in_bits {
5013 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005014 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005015
Matan Barakb4ff3a32016-02-09 14:57:42 +02005016 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005017 u8 op_mod[0x10];
5018
Matan Barakb4ff3a32016-02-09 14:57:42 +02005019 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005020 u8 tirn[0x18];
5021
Matan Barakb4ff3a32016-02-09 14:57:42 +02005022 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005023
Achiad Shochatd9eea402015-08-04 14:05:42 +03005024 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005025
Matan Barakb4ff3a32016-02-09 14:57:42 +02005026 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005027
5028 struct mlx5_ifc_tirc_bits ctx;
5029};
5030
5031struct mlx5_ifc_modify_sq_out_bits {
5032 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005033 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005034
5035 u8 syndrome[0x20];
5036
Matan Barakb4ff3a32016-02-09 14:57:42 +02005037 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005038};
5039
5040struct mlx5_ifc_modify_sq_in_bits {
5041 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005042 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005043
Matan Barakb4ff3a32016-02-09 14:57:42 +02005044 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005045 u8 op_mod[0x10];
5046
5047 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005048 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005049 u8 sqn[0x18];
5050
Matan Barakb4ff3a32016-02-09 14:57:42 +02005051 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005052
5053 u8 modify_bitmask[0x40];
5054
Matan Barakb4ff3a32016-02-09 14:57:42 +02005055 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005056
5057 struct mlx5_ifc_sqc_bits ctx;
5058};
5059
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005060struct mlx5_ifc_modify_scheduling_element_out_bits {
5061 u8 status[0x8];
5062 u8 reserved_at_8[0x18];
5063
5064 u8 syndrome[0x20];
5065
5066 u8 reserved_at_40[0x1c0];
5067};
5068
5069enum {
5070 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5071 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5072};
5073
5074struct mlx5_ifc_modify_scheduling_element_in_bits {
5075 u8 opcode[0x10];
5076 u8 reserved_at_10[0x10];
5077
5078 u8 reserved_at_20[0x10];
5079 u8 op_mod[0x10];
5080
5081 u8 scheduling_hierarchy[0x8];
5082 u8 reserved_at_48[0x18];
5083
5084 u8 scheduling_element_id[0x20];
5085
5086 u8 reserved_at_80[0x20];
5087
5088 u8 modify_bitmask[0x20];
5089
5090 u8 reserved_at_c0[0x40];
5091
5092 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5093
5094 u8 reserved_at_300[0x100];
5095};
5096
Saeed Mahameede2816822015-05-28 22:28:40 +03005097struct mlx5_ifc_modify_rqt_out_bits {
5098 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005099 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005100
5101 u8 syndrome[0x20];
5102
Matan Barakb4ff3a32016-02-09 14:57:42 +02005103 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005104};
5105
Achiad Shochat5c503682015-08-04 14:05:43 +03005106struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005107 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005108
Matan Barakb4ff3a32016-02-09 14:57:42 +02005109 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005110 u8 rqn_list[0x1];
5111};
5112
Saeed Mahameede2816822015-05-28 22:28:40 +03005113struct mlx5_ifc_modify_rqt_in_bits {
5114 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005115 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005116
Matan Barakb4ff3a32016-02-09 14:57:42 +02005117 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005118 u8 op_mod[0x10];
5119
Matan Barakb4ff3a32016-02-09 14:57:42 +02005120 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005121 u8 rqtn[0x18];
5122
Matan Barakb4ff3a32016-02-09 14:57:42 +02005123 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005124
Achiad Shochat5c503682015-08-04 14:05:43 +03005125 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005126
Matan Barakb4ff3a32016-02-09 14:57:42 +02005127 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005128
5129 struct mlx5_ifc_rqtc_bits ctx;
5130};
5131
5132struct mlx5_ifc_modify_rq_out_bits {
5133 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005134 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005135
5136 u8 syndrome[0x20];
5137
Matan Barakb4ff3a32016-02-09 14:57:42 +02005138 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005139};
5140
Alex Vesker83b502a2016-08-04 17:32:02 +03005141enum {
5142 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005143 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005144 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005145};
5146
Saeed Mahameede2816822015-05-28 22:28:40 +03005147struct mlx5_ifc_modify_rq_in_bits {
5148 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005149 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005150
Matan Barakb4ff3a32016-02-09 14:57:42 +02005151 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005152 u8 op_mod[0x10];
5153
5154 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005155 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005156 u8 rqn[0x18];
5157
Matan Barakb4ff3a32016-02-09 14:57:42 +02005158 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005159
5160 u8 modify_bitmask[0x40];
5161
Matan Barakb4ff3a32016-02-09 14:57:42 +02005162 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005163
5164 struct mlx5_ifc_rqc_bits ctx;
5165};
5166
5167struct mlx5_ifc_modify_rmp_out_bits {
5168 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005169 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005170
5171 u8 syndrome[0x20];
5172
Matan Barakb4ff3a32016-02-09 14:57:42 +02005173 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005174};
5175
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005176struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005177 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005178
Matan Barakb4ff3a32016-02-09 14:57:42 +02005179 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005180 u8 lwm[0x1];
5181};
5182
Saeed Mahameede2816822015-05-28 22:28:40 +03005183struct mlx5_ifc_modify_rmp_in_bits {
5184 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005185 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005186
Matan Barakb4ff3a32016-02-09 14:57:42 +02005187 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005188 u8 op_mod[0x10];
5189
5190 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005191 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005192 u8 rmpn[0x18];
5193
Matan Barakb4ff3a32016-02-09 14:57:42 +02005194 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005195
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005196 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005197
Matan Barakb4ff3a32016-02-09 14:57:42 +02005198 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005199
5200 struct mlx5_ifc_rmpc_bits ctx;
5201};
5202
5203struct mlx5_ifc_modify_nic_vport_context_out_bits {
5204 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005205 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005206
5207 u8 syndrome[0x20];
5208
Matan Barakb4ff3a32016-02-09 14:57:42 +02005209 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005210};
5211
5212struct mlx5_ifc_modify_nic_vport_field_select_bits {
Noa Osherovich23898c72016-06-10 00:07:37 +03005213 u8 reserved_at_0[0x16];
5214 u8 node_guid[0x1];
5215 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005216 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005217 u8 mtu[0x1];
5218 u8 change_event[0x1];
5219 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005220 u8 permanent_address[0x1];
5221 u8 addresses_list[0x1];
5222 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005223 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005224};
5225
5226struct mlx5_ifc_modify_nic_vport_context_in_bits {
5227 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005228 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005229
Matan Barakb4ff3a32016-02-09 14:57:42 +02005230 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005231 u8 op_mod[0x10];
5232
5233 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005234 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005235 u8 vport_number[0x10];
5236
5237 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5238
Matan Barakb4ff3a32016-02-09 14:57:42 +02005239 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005240
5241 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5242};
5243
5244struct mlx5_ifc_modify_hca_vport_context_out_bits {
5245 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005246 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005247
5248 u8 syndrome[0x20];
5249
Matan Barakb4ff3a32016-02-09 14:57:42 +02005250 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005251};
5252
5253struct mlx5_ifc_modify_hca_vport_context_in_bits {
5254 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005255 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005256
Matan Barakb4ff3a32016-02-09 14:57:42 +02005257 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005258 u8 op_mod[0x10];
5259
5260 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005261 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005262 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005263 u8 vport_number[0x10];
5264
Matan Barakb4ff3a32016-02-09 14:57:42 +02005265 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005266
5267 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5268};
5269
5270struct mlx5_ifc_modify_cq_out_bits {
5271 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005272 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005273
5274 u8 syndrome[0x20];
5275
Matan Barakb4ff3a32016-02-09 14:57:42 +02005276 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005277};
5278
5279enum {
5280 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5281 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5282};
5283
5284struct mlx5_ifc_modify_cq_in_bits {
5285 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005286 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005287
Matan Barakb4ff3a32016-02-09 14:57:42 +02005288 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005289 u8 op_mod[0x10];
5290
Matan Barakb4ff3a32016-02-09 14:57:42 +02005291 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005292 u8 cqn[0x18];
5293
5294 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5295
5296 struct mlx5_ifc_cqc_bits cq_context;
5297
Matan Barakb4ff3a32016-02-09 14:57:42 +02005298 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005299
5300 u8 pas[0][0x40];
5301};
5302
5303struct mlx5_ifc_modify_cong_status_out_bits {
5304 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005305 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005306
5307 u8 syndrome[0x20];
5308
Matan Barakb4ff3a32016-02-09 14:57:42 +02005309 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005310};
5311
5312struct mlx5_ifc_modify_cong_status_in_bits {
5313 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005314 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005315
Matan Barakb4ff3a32016-02-09 14:57:42 +02005316 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005317 u8 op_mod[0x10];
5318
Matan Barakb4ff3a32016-02-09 14:57:42 +02005319 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005320 u8 priority[0x4];
5321 u8 cong_protocol[0x4];
5322
5323 u8 enable[0x1];
5324 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005325 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005326};
5327
5328struct mlx5_ifc_modify_cong_params_out_bits {
5329 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005330 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005331
5332 u8 syndrome[0x20];
5333
Matan Barakb4ff3a32016-02-09 14:57:42 +02005334 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005335};
5336
5337struct mlx5_ifc_modify_cong_params_in_bits {
5338 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005339 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005340
Matan Barakb4ff3a32016-02-09 14:57:42 +02005341 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005342 u8 op_mod[0x10];
5343
Matan Barakb4ff3a32016-02-09 14:57:42 +02005344 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005345 u8 cong_protocol[0x4];
5346
5347 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5348
Matan Barakb4ff3a32016-02-09 14:57:42 +02005349 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005350
5351 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5352};
5353
5354struct mlx5_ifc_manage_pages_out_bits {
5355 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005356 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005357
5358 u8 syndrome[0x20];
5359
5360 u8 output_num_entries[0x20];
5361
Matan Barakb4ff3a32016-02-09 14:57:42 +02005362 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005363
5364 u8 pas[0][0x40];
5365};
5366
5367enum {
5368 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5369 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5370 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5371};
5372
5373struct mlx5_ifc_manage_pages_in_bits {
5374 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005375 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005376
Matan Barakb4ff3a32016-02-09 14:57:42 +02005377 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005378 u8 op_mod[0x10];
5379
Matan Barakb4ff3a32016-02-09 14:57:42 +02005380 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005381 u8 function_id[0x10];
5382
5383 u8 input_num_entries[0x20];
5384
5385 u8 pas[0][0x40];
5386};
5387
5388struct mlx5_ifc_mad_ifc_out_bits {
5389 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005390 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005391
5392 u8 syndrome[0x20];
5393
Matan Barakb4ff3a32016-02-09 14:57:42 +02005394 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005395
5396 u8 response_mad_packet[256][0x8];
5397};
5398
5399struct mlx5_ifc_mad_ifc_in_bits {
5400 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005401 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005402
Matan Barakb4ff3a32016-02-09 14:57:42 +02005403 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005404 u8 op_mod[0x10];
5405
5406 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005407 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005408 u8 port[0x8];
5409
Matan Barakb4ff3a32016-02-09 14:57:42 +02005410 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005411
5412 u8 mad[256][0x8];
5413};
5414
5415struct mlx5_ifc_init_hca_out_bits {
5416 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005417 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005418
5419 u8 syndrome[0x20];
5420
Matan Barakb4ff3a32016-02-09 14:57:42 +02005421 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005422};
5423
5424struct mlx5_ifc_init_hca_in_bits {
5425 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005426 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005427
Matan Barakb4ff3a32016-02-09 14:57:42 +02005428 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005429 u8 op_mod[0x10];
5430
Matan Barakb4ff3a32016-02-09 14:57:42 +02005431 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005432};
5433
5434struct mlx5_ifc_init2rtr_qp_out_bits {
5435 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005436 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005437
5438 u8 syndrome[0x20];
5439
Matan Barakb4ff3a32016-02-09 14:57:42 +02005440 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005441};
5442
5443struct mlx5_ifc_init2rtr_qp_in_bits {
5444 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005445 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005446
Matan Barakb4ff3a32016-02-09 14:57:42 +02005447 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005448 u8 op_mod[0x10];
5449
Matan Barakb4ff3a32016-02-09 14:57:42 +02005450 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005451 u8 qpn[0x18];
5452
Matan Barakb4ff3a32016-02-09 14:57:42 +02005453 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005454
5455 u8 opt_param_mask[0x20];
5456
Matan Barakb4ff3a32016-02-09 14:57:42 +02005457 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005458
5459 struct mlx5_ifc_qpc_bits qpc;
5460
Matan Barakb4ff3a32016-02-09 14:57:42 +02005461 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005462};
5463
5464struct mlx5_ifc_init2init_qp_out_bits {
5465 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005466 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005467
5468 u8 syndrome[0x20];
5469
Matan Barakb4ff3a32016-02-09 14:57:42 +02005470 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005471};
5472
5473struct mlx5_ifc_init2init_qp_in_bits {
5474 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005475 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005476
Matan Barakb4ff3a32016-02-09 14:57:42 +02005477 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005478 u8 op_mod[0x10];
5479
Matan Barakb4ff3a32016-02-09 14:57:42 +02005480 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005481 u8 qpn[0x18];
5482
Matan Barakb4ff3a32016-02-09 14:57:42 +02005483 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005484
5485 u8 opt_param_mask[0x20];
5486
Matan Barakb4ff3a32016-02-09 14:57:42 +02005487 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005488
5489 struct mlx5_ifc_qpc_bits qpc;
5490
Matan Barakb4ff3a32016-02-09 14:57:42 +02005491 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005492};
5493
5494struct mlx5_ifc_get_dropped_packet_log_out_bits {
5495 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005496 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005497
5498 u8 syndrome[0x20];
5499
Matan Barakb4ff3a32016-02-09 14:57:42 +02005500 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005501
5502 u8 packet_headers_log[128][0x8];
5503
5504 u8 packet_syndrome[64][0x8];
5505};
5506
5507struct mlx5_ifc_get_dropped_packet_log_in_bits {
5508 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005509 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005510
Matan Barakb4ff3a32016-02-09 14:57:42 +02005511 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005512 u8 op_mod[0x10];
5513
Matan Barakb4ff3a32016-02-09 14:57:42 +02005514 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005515};
5516
5517struct mlx5_ifc_gen_eqe_in_bits {
5518 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005519 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005520
Matan Barakb4ff3a32016-02-09 14:57:42 +02005521 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005522 u8 op_mod[0x10];
5523
Matan Barakb4ff3a32016-02-09 14:57:42 +02005524 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005525 u8 eq_number[0x8];
5526
Matan Barakb4ff3a32016-02-09 14:57:42 +02005527 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005528
5529 u8 eqe[64][0x8];
5530};
5531
5532struct mlx5_ifc_gen_eq_out_bits {
5533 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005534 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005535
5536 u8 syndrome[0x20];
5537
Matan Barakb4ff3a32016-02-09 14:57:42 +02005538 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005539};
5540
5541struct mlx5_ifc_enable_hca_out_bits {
5542 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005543 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005544
5545 u8 syndrome[0x20];
5546
Matan Barakb4ff3a32016-02-09 14:57:42 +02005547 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005548};
5549
5550struct mlx5_ifc_enable_hca_in_bits {
5551 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005552 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005553
Matan Barakb4ff3a32016-02-09 14:57:42 +02005554 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005555 u8 op_mod[0x10];
5556
Matan Barakb4ff3a32016-02-09 14:57:42 +02005557 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005558 u8 function_id[0x10];
5559
Matan Barakb4ff3a32016-02-09 14:57:42 +02005560 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005561};
5562
5563struct mlx5_ifc_drain_dct_out_bits {
5564 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005565 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005566
5567 u8 syndrome[0x20];
5568
Matan Barakb4ff3a32016-02-09 14:57:42 +02005569 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005570};
5571
5572struct mlx5_ifc_drain_dct_in_bits {
5573 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005574 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005575
Matan Barakb4ff3a32016-02-09 14:57:42 +02005576 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005577 u8 op_mod[0x10];
5578
Matan Barakb4ff3a32016-02-09 14:57:42 +02005579 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005580 u8 dctn[0x18];
5581
Matan Barakb4ff3a32016-02-09 14:57:42 +02005582 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005583};
5584
5585struct mlx5_ifc_disable_hca_out_bits {
5586 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005587 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005588
5589 u8 syndrome[0x20];
5590
Matan Barakb4ff3a32016-02-09 14:57:42 +02005591 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005592};
5593
5594struct mlx5_ifc_disable_hca_in_bits {
5595 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005596 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005597
Matan Barakb4ff3a32016-02-09 14:57:42 +02005598 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005599 u8 op_mod[0x10];
5600
Matan Barakb4ff3a32016-02-09 14:57:42 +02005601 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005602 u8 function_id[0x10];
5603
Matan Barakb4ff3a32016-02-09 14:57:42 +02005604 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005605};
5606
5607struct mlx5_ifc_detach_from_mcg_out_bits {
5608 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005609 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005610
5611 u8 syndrome[0x20];
5612
Matan Barakb4ff3a32016-02-09 14:57:42 +02005613 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005614};
5615
5616struct mlx5_ifc_detach_from_mcg_in_bits {
5617 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005618 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005619
Matan Barakb4ff3a32016-02-09 14:57:42 +02005620 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005621 u8 op_mod[0x10];
5622
Matan Barakb4ff3a32016-02-09 14:57:42 +02005623 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005624 u8 qpn[0x18];
5625
Matan Barakb4ff3a32016-02-09 14:57:42 +02005626 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005627
5628 u8 multicast_gid[16][0x8];
5629};
5630
Saeed Mahameed74862162016-06-09 15:11:34 +03005631struct mlx5_ifc_destroy_xrq_out_bits {
5632 u8 status[0x8];
5633 u8 reserved_at_8[0x18];
5634
5635 u8 syndrome[0x20];
5636
5637 u8 reserved_at_40[0x40];
5638};
5639
5640struct mlx5_ifc_destroy_xrq_in_bits {
5641 u8 opcode[0x10];
5642 u8 reserved_at_10[0x10];
5643
5644 u8 reserved_at_20[0x10];
5645 u8 op_mod[0x10];
5646
5647 u8 reserved_at_40[0x8];
5648 u8 xrqn[0x18];
5649
5650 u8 reserved_at_60[0x20];
5651};
5652
Saeed Mahameede2816822015-05-28 22:28:40 +03005653struct mlx5_ifc_destroy_xrc_srq_out_bits {
5654 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005655 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005656
5657 u8 syndrome[0x20];
5658
Matan Barakb4ff3a32016-02-09 14:57:42 +02005659 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005660};
5661
5662struct mlx5_ifc_destroy_xrc_srq_in_bits {
5663 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005664 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005665
Matan Barakb4ff3a32016-02-09 14:57:42 +02005666 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005667 u8 op_mod[0x10];
5668
Matan Barakb4ff3a32016-02-09 14:57:42 +02005669 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005670 u8 xrc_srqn[0x18];
5671
Matan Barakb4ff3a32016-02-09 14:57:42 +02005672 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005673};
5674
5675struct mlx5_ifc_destroy_tis_out_bits {
5676 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005677 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005678
5679 u8 syndrome[0x20];
5680
Matan Barakb4ff3a32016-02-09 14:57:42 +02005681 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005682};
5683
5684struct mlx5_ifc_destroy_tis_in_bits {
5685 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005686 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005687
Matan Barakb4ff3a32016-02-09 14:57:42 +02005688 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005689 u8 op_mod[0x10];
5690
Matan Barakb4ff3a32016-02-09 14:57:42 +02005691 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005692 u8 tisn[0x18];
5693
Matan Barakb4ff3a32016-02-09 14:57:42 +02005694 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005695};
5696
5697struct mlx5_ifc_destroy_tir_out_bits {
5698 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005699 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005700
5701 u8 syndrome[0x20];
5702
Matan Barakb4ff3a32016-02-09 14:57:42 +02005703 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005704};
5705
5706struct mlx5_ifc_destroy_tir_in_bits {
5707 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005708 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005709
Matan Barakb4ff3a32016-02-09 14:57:42 +02005710 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005711 u8 op_mod[0x10];
5712
Matan Barakb4ff3a32016-02-09 14:57:42 +02005713 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005714 u8 tirn[0x18];
5715
Matan Barakb4ff3a32016-02-09 14:57:42 +02005716 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005717};
5718
5719struct mlx5_ifc_destroy_srq_out_bits {
5720 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005721 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005722
5723 u8 syndrome[0x20];
5724
Matan Barakb4ff3a32016-02-09 14:57:42 +02005725 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005726};
5727
5728struct mlx5_ifc_destroy_srq_in_bits {
5729 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005730 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005731
Matan Barakb4ff3a32016-02-09 14:57:42 +02005732 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005733 u8 op_mod[0x10];
5734
Matan Barakb4ff3a32016-02-09 14:57:42 +02005735 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005736 u8 srqn[0x18];
5737
Matan Barakb4ff3a32016-02-09 14:57:42 +02005738 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005739};
5740
5741struct mlx5_ifc_destroy_sq_out_bits {
5742 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005743 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005744
5745 u8 syndrome[0x20];
5746
Matan Barakb4ff3a32016-02-09 14:57:42 +02005747 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005748};
5749
5750struct mlx5_ifc_destroy_sq_in_bits {
5751 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005752 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005753
Matan Barakb4ff3a32016-02-09 14:57:42 +02005754 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005755 u8 op_mod[0x10];
5756
Matan Barakb4ff3a32016-02-09 14:57:42 +02005757 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005758 u8 sqn[0x18];
5759
Matan Barakb4ff3a32016-02-09 14:57:42 +02005760 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005761};
5762
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005763struct mlx5_ifc_destroy_scheduling_element_out_bits {
5764 u8 status[0x8];
5765 u8 reserved_at_8[0x18];
5766
5767 u8 syndrome[0x20];
5768
5769 u8 reserved_at_40[0x1c0];
5770};
5771
5772struct mlx5_ifc_destroy_scheduling_element_in_bits {
5773 u8 opcode[0x10];
5774 u8 reserved_at_10[0x10];
5775
5776 u8 reserved_at_20[0x10];
5777 u8 op_mod[0x10];
5778
5779 u8 scheduling_hierarchy[0x8];
5780 u8 reserved_at_48[0x18];
5781
5782 u8 scheduling_element_id[0x20];
5783
5784 u8 reserved_at_80[0x180];
5785};
5786
Saeed Mahameede2816822015-05-28 22:28:40 +03005787struct mlx5_ifc_destroy_rqt_out_bits {
5788 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005789 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005790
5791 u8 syndrome[0x20];
5792
Matan Barakb4ff3a32016-02-09 14:57:42 +02005793 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005794};
5795
5796struct mlx5_ifc_destroy_rqt_in_bits {
5797 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005798 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005799
Matan Barakb4ff3a32016-02-09 14:57:42 +02005800 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005801 u8 op_mod[0x10];
5802
Matan Barakb4ff3a32016-02-09 14:57:42 +02005803 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005804 u8 rqtn[0x18];
5805
Matan Barakb4ff3a32016-02-09 14:57:42 +02005806 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005807};
5808
5809struct mlx5_ifc_destroy_rq_out_bits {
5810 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005811 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005812
5813 u8 syndrome[0x20];
5814
Matan Barakb4ff3a32016-02-09 14:57:42 +02005815 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005816};
5817
5818struct mlx5_ifc_destroy_rq_in_bits {
5819 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005820 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005821
Matan Barakb4ff3a32016-02-09 14:57:42 +02005822 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005823 u8 op_mod[0x10];
5824
Matan Barakb4ff3a32016-02-09 14:57:42 +02005825 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005826 u8 rqn[0x18];
5827
Matan Barakb4ff3a32016-02-09 14:57:42 +02005828 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005829};
5830
5831struct mlx5_ifc_destroy_rmp_out_bits {
5832 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005833 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005834
5835 u8 syndrome[0x20];
5836
Matan Barakb4ff3a32016-02-09 14:57:42 +02005837 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005838};
5839
5840struct mlx5_ifc_destroy_rmp_in_bits {
5841 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005842 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005843
Matan Barakb4ff3a32016-02-09 14:57:42 +02005844 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005845 u8 op_mod[0x10];
5846
Matan Barakb4ff3a32016-02-09 14:57:42 +02005847 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005848 u8 rmpn[0x18];
5849
Matan Barakb4ff3a32016-02-09 14:57:42 +02005850 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005851};
5852
5853struct mlx5_ifc_destroy_qp_out_bits {
5854 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005855 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005856
5857 u8 syndrome[0x20];
5858
Matan Barakb4ff3a32016-02-09 14:57:42 +02005859 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005860};
5861
5862struct mlx5_ifc_destroy_qp_in_bits {
5863 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005864 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005865
Matan Barakb4ff3a32016-02-09 14:57:42 +02005866 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005867 u8 op_mod[0x10];
5868
Matan Barakb4ff3a32016-02-09 14:57:42 +02005869 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005870 u8 qpn[0x18];
5871
Matan Barakb4ff3a32016-02-09 14:57:42 +02005872 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005873};
5874
5875struct mlx5_ifc_destroy_psv_out_bits {
5876 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005877 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005878
5879 u8 syndrome[0x20];
5880
Matan Barakb4ff3a32016-02-09 14:57:42 +02005881 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005882};
5883
5884struct mlx5_ifc_destroy_psv_in_bits {
5885 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005886 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005887
Matan Barakb4ff3a32016-02-09 14:57:42 +02005888 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005889 u8 op_mod[0x10];
5890
Matan Barakb4ff3a32016-02-09 14:57:42 +02005891 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005892 u8 psvn[0x18];
5893
Matan Barakb4ff3a32016-02-09 14:57:42 +02005894 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005895};
5896
5897struct mlx5_ifc_destroy_mkey_out_bits {
5898 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005899 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005900
5901 u8 syndrome[0x20];
5902
Matan Barakb4ff3a32016-02-09 14:57:42 +02005903 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005904};
5905
5906struct mlx5_ifc_destroy_mkey_in_bits {
5907 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005908 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005909
Matan Barakb4ff3a32016-02-09 14:57:42 +02005910 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005911 u8 op_mod[0x10];
5912
Matan Barakb4ff3a32016-02-09 14:57:42 +02005913 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005914 u8 mkey_index[0x18];
5915
Matan Barakb4ff3a32016-02-09 14:57:42 +02005916 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005917};
5918
5919struct mlx5_ifc_destroy_flow_table_out_bits {
5920 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005921 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005922
5923 u8 syndrome[0x20];
5924
Matan Barakb4ff3a32016-02-09 14:57:42 +02005925 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005926};
5927
5928struct mlx5_ifc_destroy_flow_table_in_bits {
5929 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005930 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005931
Matan Barakb4ff3a32016-02-09 14:57:42 +02005932 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005933 u8 op_mod[0x10];
5934
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005935 u8 other_vport[0x1];
5936 u8 reserved_at_41[0xf];
5937 u8 vport_number[0x10];
5938
5939 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005940
5941 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005942 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005943
Matan Barakb4ff3a32016-02-09 14:57:42 +02005944 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005945 u8 table_id[0x18];
5946
Matan Barakb4ff3a32016-02-09 14:57:42 +02005947 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03005948};
5949
5950struct mlx5_ifc_destroy_flow_group_out_bits {
5951 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005952 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005953
5954 u8 syndrome[0x20];
5955
Matan Barakb4ff3a32016-02-09 14:57:42 +02005956 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005957};
5958
5959struct mlx5_ifc_destroy_flow_group_in_bits {
5960 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005961 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005962
Matan Barakb4ff3a32016-02-09 14:57:42 +02005963 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005964 u8 op_mod[0x10];
5965
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005966 u8 other_vport[0x1];
5967 u8 reserved_at_41[0xf];
5968 u8 vport_number[0x10];
5969
5970 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005971
5972 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005973 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005974
Matan Barakb4ff3a32016-02-09 14:57:42 +02005975 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005976 u8 table_id[0x18];
5977
5978 u8 group_id[0x20];
5979
Matan Barakb4ff3a32016-02-09 14:57:42 +02005980 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03005981};
5982
5983struct mlx5_ifc_destroy_eq_out_bits {
5984 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005985 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005986
5987 u8 syndrome[0x20];
5988
Matan Barakb4ff3a32016-02-09 14:57:42 +02005989 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005990};
5991
5992struct mlx5_ifc_destroy_eq_in_bits {
5993 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005994 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005995
Matan Barakb4ff3a32016-02-09 14:57:42 +02005996 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005997 u8 op_mod[0x10];
5998
Matan Barakb4ff3a32016-02-09 14:57:42 +02005999 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006000 u8 eq_number[0x8];
6001
Matan Barakb4ff3a32016-02-09 14:57:42 +02006002 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006003};
6004
6005struct mlx5_ifc_destroy_dct_out_bits {
6006 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006007 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006008
6009 u8 syndrome[0x20];
6010
Matan Barakb4ff3a32016-02-09 14:57:42 +02006011 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006012};
6013
6014struct mlx5_ifc_destroy_dct_in_bits {
6015 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006016 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006017
Matan Barakb4ff3a32016-02-09 14:57:42 +02006018 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006019 u8 op_mod[0x10];
6020
Matan Barakb4ff3a32016-02-09 14:57:42 +02006021 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006022 u8 dctn[0x18];
6023
Matan Barakb4ff3a32016-02-09 14:57:42 +02006024 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006025};
6026
6027struct mlx5_ifc_destroy_cq_out_bits {
6028 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006029 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006030
6031 u8 syndrome[0x20];
6032
Matan Barakb4ff3a32016-02-09 14:57:42 +02006033 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006034};
6035
6036struct mlx5_ifc_destroy_cq_in_bits {
6037 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006038 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006039
Matan Barakb4ff3a32016-02-09 14:57:42 +02006040 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006041 u8 op_mod[0x10];
6042
Matan Barakb4ff3a32016-02-09 14:57:42 +02006043 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006044 u8 cqn[0x18];
6045
Matan Barakb4ff3a32016-02-09 14:57:42 +02006046 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006047};
6048
6049struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6050 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006051 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006052
6053 u8 syndrome[0x20];
6054
Matan Barakb4ff3a32016-02-09 14:57:42 +02006055 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006056};
6057
6058struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6059 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006060 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006061
Matan Barakb4ff3a32016-02-09 14:57:42 +02006062 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006063 u8 op_mod[0x10];
6064
Matan Barakb4ff3a32016-02-09 14:57:42 +02006065 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006066
Matan Barakb4ff3a32016-02-09 14:57:42 +02006067 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006068 u8 vxlan_udp_port[0x10];
6069};
6070
6071struct mlx5_ifc_delete_l2_table_entry_out_bits {
6072 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006073 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006074
6075 u8 syndrome[0x20];
6076
Matan Barakb4ff3a32016-02-09 14:57:42 +02006077 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006078};
6079
6080struct mlx5_ifc_delete_l2_table_entry_in_bits {
6081 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006082 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006083
Matan Barakb4ff3a32016-02-09 14:57:42 +02006084 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006085 u8 op_mod[0x10];
6086
Matan Barakb4ff3a32016-02-09 14:57:42 +02006087 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006088
Matan Barakb4ff3a32016-02-09 14:57:42 +02006089 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006090 u8 table_index[0x18];
6091
Matan Barakb4ff3a32016-02-09 14:57:42 +02006092 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006093};
6094
6095struct mlx5_ifc_delete_fte_out_bits {
6096 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006097 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006098
6099 u8 syndrome[0x20];
6100
Matan Barakb4ff3a32016-02-09 14:57:42 +02006101 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006102};
6103
6104struct mlx5_ifc_delete_fte_in_bits {
6105 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006106 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006107
Matan Barakb4ff3a32016-02-09 14:57:42 +02006108 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006109 u8 op_mod[0x10];
6110
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006111 u8 other_vport[0x1];
6112 u8 reserved_at_41[0xf];
6113 u8 vport_number[0x10];
6114
6115 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006116
6117 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006118 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006119
Matan Barakb4ff3a32016-02-09 14:57:42 +02006120 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006121 u8 table_id[0x18];
6122
Matan Barakb4ff3a32016-02-09 14:57:42 +02006123 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006124
6125 u8 flow_index[0x20];
6126
Matan Barakb4ff3a32016-02-09 14:57:42 +02006127 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006128};
6129
6130struct mlx5_ifc_dealloc_xrcd_out_bits {
6131 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006132 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006133
6134 u8 syndrome[0x20];
6135
Matan Barakb4ff3a32016-02-09 14:57:42 +02006136 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006137};
6138
6139struct mlx5_ifc_dealloc_xrcd_in_bits {
6140 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006141 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006142
Matan Barakb4ff3a32016-02-09 14:57:42 +02006143 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006144 u8 op_mod[0x10];
6145
Matan Barakb4ff3a32016-02-09 14:57:42 +02006146 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006147 u8 xrcd[0x18];
6148
Matan Barakb4ff3a32016-02-09 14:57:42 +02006149 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006150};
6151
6152struct mlx5_ifc_dealloc_uar_out_bits {
6153 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006154 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006155
6156 u8 syndrome[0x20];
6157
Matan Barakb4ff3a32016-02-09 14:57:42 +02006158 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006159};
6160
6161struct mlx5_ifc_dealloc_uar_in_bits {
6162 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006163 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006164
Matan Barakb4ff3a32016-02-09 14:57:42 +02006165 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006166 u8 op_mod[0x10];
6167
Matan Barakb4ff3a32016-02-09 14:57:42 +02006168 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006169 u8 uar[0x18];
6170
Matan Barakb4ff3a32016-02-09 14:57:42 +02006171 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006172};
6173
6174struct mlx5_ifc_dealloc_transport_domain_out_bits {
6175 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006176 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006177
6178 u8 syndrome[0x20];
6179
Matan Barakb4ff3a32016-02-09 14:57:42 +02006180 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006181};
6182
6183struct mlx5_ifc_dealloc_transport_domain_in_bits {
6184 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006185 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006186
Matan Barakb4ff3a32016-02-09 14:57:42 +02006187 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006188 u8 op_mod[0x10];
6189
Matan Barakb4ff3a32016-02-09 14:57:42 +02006190 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006191 u8 transport_domain[0x18];
6192
Matan Barakb4ff3a32016-02-09 14:57:42 +02006193 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006194};
6195
6196struct mlx5_ifc_dealloc_q_counter_out_bits {
6197 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006198 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006199
6200 u8 syndrome[0x20];
6201
Matan Barakb4ff3a32016-02-09 14:57:42 +02006202 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006203};
6204
6205struct mlx5_ifc_dealloc_q_counter_in_bits {
6206 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006207 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006208
Matan Barakb4ff3a32016-02-09 14:57:42 +02006209 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006210 u8 op_mod[0x10];
6211
Matan Barakb4ff3a32016-02-09 14:57:42 +02006212 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006213 u8 counter_set_id[0x8];
6214
Matan Barakb4ff3a32016-02-09 14:57:42 +02006215 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006216};
6217
6218struct mlx5_ifc_dealloc_pd_out_bits {
6219 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006220 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006221
6222 u8 syndrome[0x20];
6223
Matan Barakb4ff3a32016-02-09 14:57:42 +02006224 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006225};
6226
6227struct mlx5_ifc_dealloc_pd_in_bits {
6228 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006229 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006230
Matan Barakb4ff3a32016-02-09 14:57:42 +02006231 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006232 u8 op_mod[0x10];
6233
Matan Barakb4ff3a32016-02-09 14:57:42 +02006234 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006235 u8 pd[0x18];
6236
Matan Barakb4ff3a32016-02-09 14:57:42 +02006237 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006238};
6239
Amir Vadai9dc0b282016-05-13 12:55:39 +00006240struct mlx5_ifc_dealloc_flow_counter_out_bits {
6241 u8 status[0x8];
6242 u8 reserved_at_8[0x18];
6243
6244 u8 syndrome[0x20];
6245
6246 u8 reserved_at_40[0x40];
6247};
6248
6249struct mlx5_ifc_dealloc_flow_counter_in_bits {
6250 u8 opcode[0x10];
6251 u8 reserved_at_10[0x10];
6252
6253 u8 reserved_at_20[0x10];
6254 u8 op_mod[0x10];
6255
6256 u8 reserved_at_40[0x10];
6257 u8 flow_counter_id[0x10];
6258
6259 u8 reserved_at_60[0x20];
6260};
6261
Saeed Mahameed74862162016-06-09 15:11:34 +03006262struct mlx5_ifc_create_xrq_out_bits {
6263 u8 status[0x8];
6264 u8 reserved_at_8[0x18];
6265
6266 u8 syndrome[0x20];
6267
6268 u8 reserved_at_40[0x8];
6269 u8 xrqn[0x18];
6270
6271 u8 reserved_at_60[0x20];
6272};
6273
6274struct mlx5_ifc_create_xrq_in_bits {
6275 u8 opcode[0x10];
6276 u8 reserved_at_10[0x10];
6277
6278 u8 reserved_at_20[0x10];
6279 u8 op_mod[0x10];
6280
6281 u8 reserved_at_40[0x40];
6282
6283 struct mlx5_ifc_xrqc_bits xrq_context;
6284};
6285
Saeed Mahameede2816822015-05-28 22:28:40 +03006286struct mlx5_ifc_create_xrc_srq_out_bits {
6287 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006288 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006289
6290 u8 syndrome[0x20];
6291
Matan Barakb4ff3a32016-02-09 14:57:42 +02006292 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006293 u8 xrc_srqn[0x18];
6294
Matan Barakb4ff3a32016-02-09 14:57:42 +02006295 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006296};
6297
6298struct mlx5_ifc_create_xrc_srq_in_bits {
6299 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006300 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006301
Matan Barakb4ff3a32016-02-09 14:57:42 +02006302 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006303 u8 op_mod[0x10];
6304
Matan Barakb4ff3a32016-02-09 14:57:42 +02006305 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006306
6307 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6308
Matan Barakb4ff3a32016-02-09 14:57:42 +02006309 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006310
6311 u8 pas[0][0x40];
6312};
6313
6314struct mlx5_ifc_create_tis_out_bits {
6315 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006316 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006317
6318 u8 syndrome[0x20];
6319
Matan Barakb4ff3a32016-02-09 14:57:42 +02006320 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006321 u8 tisn[0x18];
6322
Matan Barakb4ff3a32016-02-09 14:57:42 +02006323 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006324};
6325
6326struct mlx5_ifc_create_tis_in_bits {
6327 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006328 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006329
Matan Barakb4ff3a32016-02-09 14:57:42 +02006330 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006331 u8 op_mod[0x10];
6332
Matan Barakb4ff3a32016-02-09 14:57:42 +02006333 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006334
6335 struct mlx5_ifc_tisc_bits ctx;
6336};
6337
6338struct mlx5_ifc_create_tir_out_bits {
6339 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006340 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006341
6342 u8 syndrome[0x20];
6343
Matan Barakb4ff3a32016-02-09 14:57:42 +02006344 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006345 u8 tirn[0x18];
6346
Matan Barakb4ff3a32016-02-09 14:57:42 +02006347 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006348};
6349
6350struct mlx5_ifc_create_tir_in_bits {
6351 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006352 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006353
Matan Barakb4ff3a32016-02-09 14:57:42 +02006354 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006355 u8 op_mod[0x10];
6356
Matan Barakb4ff3a32016-02-09 14:57:42 +02006357 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006358
6359 struct mlx5_ifc_tirc_bits ctx;
6360};
6361
6362struct mlx5_ifc_create_srq_out_bits {
6363 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006364 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006365
6366 u8 syndrome[0x20];
6367
Matan Barakb4ff3a32016-02-09 14:57:42 +02006368 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006369 u8 srqn[0x18];
6370
Matan Barakb4ff3a32016-02-09 14:57:42 +02006371 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006372};
6373
6374struct mlx5_ifc_create_srq_in_bits {
6375 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006376 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006377
Matan Barakb4ff3a32016-02-09 14:57:42 +02006378 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006379 u8 op_mod[0x10];
6380
Matan Barakb4ff3a32016-02-09 14:57:42 +02006381 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006382
6383 struct mlx5_ifc_srqc_bits srq_context_entry;
6384
Matan Barakb4ff3a32016-02-09 14:57:42 +02006385 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006386
6387 u8 pas[0][0x40];
6388};
6389
6390struct mlx5_ifc_create_sq_out_bits {
6391 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006392 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006393
6394 u8 syndrome[0x20];
6395
Matan Barakb4ff3a32016-02-09 14:57:42 +02006396 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006397 u8 sqn[0x18];
6398
Matan Barakb4ff3a32016-02-09 14:57:42 +02006399 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006400};
6401
6402struct mlx5_ifc_create_sq_in_bits {
6403 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006404 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006405
Matan Barakb4ff3a32016-02-09 14:57:42 +02006406 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006407 u8 op_mod[0x10];
6408
Matan Barakb4ff3a32016-02-09 14:57:42 +02006409 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006410
6411 struct mlx5_ifc_sqc_bits ctx;
6412};
6413
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006414struct mlx5_ifc_create_scheduling_element_out_bits {
6415 u8 status[0x8];
6416 u8 reserved_at_8[0x18];
6417
6418 u8 syndrome[0x20];
6419
6420 u8 reserved_at_40[0x40];
6421
6422 u8 scheduling_element_id[0x20];
6423
6424 u8 reserved_at_a0[0x160];
6425};
6426
6427struct mlx5_ifc_create_scheduling_element_in_bits {
6428 u8 opcode[0x10];
6429 u8 reserved_at_10[0x10];
6430
6431 u8 reserved_at_20[0x10];
6432 u8 op_mod[0x10];
6433
6434 u8 scheduling_hierarchy[0x8];
6435 u8 reserved_at_48[0x18];
6436
6437 u8 reserved_at_60[0xa0];
6438
6439 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6440
6441 u8 reserved_at_300[0x100];
6442};
6443
Saeed Mahameede2816822015-05-28 22:28:40 +03006444struct mlx5_ifc_create_rqt_out_bits {
6445 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006446 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006447
6448 u8 syndrome[0x20];
6449
Matan Barakb4ff3a32016-02-09 14:57:42 +02006450 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006451 u8 rqtn[0x18];
6452
Matan Barakb4ff3a32016-02-09 14:57:42 +02006453 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006454};
6455
6456struct mlx5_ifc_create_rqt_in_bits {
6457 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006458 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006459
Matan Barakb4ff3a32016-02-09 14:57:42 +02006460 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006461 u8 op_mod[0x10];
6462
Matan Barakb4ff3a32016-02-09 14:57:42 +02006463 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006464
6465 struct mlx5_ifc_rqtc_bits rqt_context;
6466};
6467
6468struct mlx5_ifc_create_rq_out_bits {
6469 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006470 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006471
6472 u8 syndrome[0x20];
6473
Matan Barakb4ff3a32016-02-09 14:57:42 +02006474 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006475 u8 rqn[0x18];
6476
Matan Barakb4ff3a32016-02-09 14:57:42 +02006477 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006478};
6479
6480struct mlx5_ifc_create_rq_in_bits {
6481 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006482 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006483
Matan Barakb4ff3a32016-02-09 14:57:42 +02006484 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006485 u8 op_mod[0x10];
6486
Matan Barakb4ff3a32016-02-09 14:57:42 +02006487 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006488
6489 struct mlx5_ifc_rqc_bits ctx;
6490};
6491
6492struct mlx5_ifc_create_rmp_out_bits {
6493 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006494 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006495
6496 u8 syndrome[0x20];
6497
Matan Barakb4ff3a32016-02-09 14:57:42 +02006498 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006499 u8 rmpn[0x18];
6500
Matan Barakb4ff3a32016-02-09 14:57:42 +02006501 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006502};
6503
6504struct mlx5_ifc_create_rmp_in_bits {
6505 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006506 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006507
Matan Barakb4ff3a32016-02-09 14:57:42 +02006508 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006509 u8 op_mod[0x10];
6510
Matan Barakb4ff3a32016-02-09 14:57:42 +02006511 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006512
6513 struct mlx5_ifc_rmpc_bits ctx;
6514};
6515
6516struct mlx5_ifc_create_qp_out_bits {
6517 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006518 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006519
6520 u8 syndrome[0x20];
6521
Matan Barakb4ff3a32016-02-09 14:57:42 +02006522 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006523 u8 qpn[0x18];
6524
Matan Barakb4ff3a32016-02-09 14:57:42 +02006525 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006526};
6527
6528struct mlx5_ifc_create_qp_in_bits {
6529 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006530 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006531
Matan Barakb4ff3a32016-02-09 14:57:42 +02006532 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006533 u8 op_mod[0x10];
6534
Matan Barakb4ff3a32016-02-09 14:57:42 +02006535 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006536
6537 u8 opt_param_mask[0x20];
6538
Matan Barakb4ff3a32016-02-09 14:57:42 +02006539 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006540
6541 struct mlx5_ifc_qpc_bits qpc;
6542
Matan Barakb4ff3a32016-02-09 14:57:42 +02006543 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006544
6545 u8 pas[0][0x40];
6546};
6547
6548struct mlx5_ifc_create_psv_out_bits {
6549 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006550 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006551
6552 u8 syndrome[0x20];
6553
Matan Barakb4ff3a32016-02-09 14:57:42 +02006554 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006555
Matan Barakb4ff3a32016-02-09 14:57:42 +02006556 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006557 u8 psv0_index[0x18];
6558
Matan Barakb4ff3a32016-02-09 14:57:42 +02006559 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006560 u8 psv1_index[0x18];
6561
Matan Barakb4ff3a32016-02-09 14:57:42 +02006562 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006563 u8 psv2_index[0x18];
6564
Matan Barakb4ff3a32016-02-09 14:57:42 +02006565 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006566 u8 psv3_index[0x18];
6567};
6568
6569struct mlx5_ifc_create_psv_in_bits {
6570 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006571 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006572
Matan Barakb4ff3a32016-02-09 14:57:42 +02006573 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006574 u8 op_mod[0x10];
6575
6576 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006577 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006578 u8 pd[0x18];
6579
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581};
6582
6583struct mlx5_ifc_create_mkey_out_bits {
6584 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006585 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006586
6587 u8 syndrome[0x20];
6588
Matan Barakb4ff3a32016-02-09 14:57:42 +02006589 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006590 u8 mkey_index[0x18];
6591
Matan Barakb4ff3a32016-02-09 14:57:42 +02006592 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006593};
6594
6595struct mlx5_ifc_create_mkey_in_bits {
6596 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006597 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006598
Matan Barakb4ff3a32016-02-09 14:57:42 +02006599 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006600 u8 op_mod[0x10];
6601
Matan Barakb4ff3a32016-02-09 14:57:42 +02006602 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006603
6604 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006605 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006606
6607 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6608
Matan Barakb4ff3a32016-02-09 14:57:42 +02006609 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006610
6611 u8 translations_octword_actual_size[0x20];
6612
Matan Barakb4ff3a32016-02-09 14:57:42 +02006613 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006614
6615 u8 klm_pas_mtt[0][0x20];
6616};
6617
6618struct mlx5_ifc_create_flow_table_out_bits {
6619 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006620 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006621
6622 u8 syndrome[0x20];
6623
Matan Barakb4ff3a32016-02-09 14:57:42 +02006624 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006625 u8 table_id[0x18];
6626
Matan Barakb4ff3a32016-02-09 14:57:42 +02006627 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006628};
6629
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006630struct mlx5_ifc_flow_table_context_bits {
6631 u8 encap_en[0x1];
6632 u8 decap_en[0x1];
6633 u8 reserved_at_2[0x2];
6634 u8 table_miss_action[0x4];
6635 u8 level[0x8];
6636 u8 reserved_at_10[0x8];
6637 u8 log_size[0x8];
6638
6639 u8 reserved_at_20[0x8];
6640 u8 table_miss_id[0x18];
6641
6642 u8 reserved_at_40[0x8];
6643 u8 lag_master_next_table_id[0x18];
6644
6645 u8 reserved_at_60[0xe0];
6646};
6647
Saeed Mahameede2816822015-05-28 22:28:40 +03006648struct mlx5_ifc_create_flow_table_in_bits {
6649 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006650 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006651
Matan Barakb4ff3a32016-02-09 14:57:42 +02006652 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006653 u8 op_mod[0x10];
6654
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006655 u8 other_vport[0x1];
6656 u8 reserved_at_41[0xf];
6657 u8 vport_number[0x10];
6658
6659 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006660
6661 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006662 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006663
Matan Barakb4ff3a32016-02-09 14:57:42 +02006664 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006665
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006666 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006667};
6668
6669struct mlx5_ifc_create_flow_group_out_bits {
6670 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006671 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006672
6673 u8 syndrome[0x20];
6674
Matan Barakb4ff3a32016-02-09 14:57:42 +02006675 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006676 u8 group_id[0x18];
6677
Matan Barakb4ff3a32016-02-09 14:57:42 +02006678 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006679};
6680
6681enum {
6682 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6683 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6684 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6685};
6686
6687struct mlx5_ifc_create_flow_group_in_bits {
6688 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006689 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006690
Matan Barakb4ff3a32016-02-09 14:57:42 +02006691 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006692 u8 op_mod[0x10];
6693
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006694 u8 other_vport[0x1];
6695 u8 reserved_at_41[0xf];
6696 u8 vport_number[0x10];
6697
6698 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006699
6700 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006701 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006702
Matan Barakb4ff3a32016-02-09 14:57:42 +02006703 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006704 u8 table_id[0x18];
6705
Matan Barakb4ff3a32016-02-09 14:57:42 +02006706 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006707
6708 u8 start_flow_index[0x20];
6709
Matan Barakb4ff3a32016-02-09 14:57:42 +02006710 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006711
6712 u8 end_flow_index[0x20];
6713
Matan Barakb4ff3a32016-02-09 14:57:42 +02006714 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006715
Matan Barakb4ff3a32016-02-09 14:57:42 +02006716 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006717 u8 match_criteria_enable[0x8];
6718
6719 struct mlx5_ifc_fte_match_param_bits match_criteria;
6720
Matan Barakb4ff3a32016-02-09 14:57:42 +02006721 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006722};
6723
6724struct mlx5_ifc_create_eq_out_bits {
6725 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006726 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006727
6728 u8 syndrome[0x20];
6729
Matan Barakb4ff3a32016-02-09 14:57:42 +02006730 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006731 u8 eq_number[0x8];
6732
Matan Barakb4ff3a32016-02-09 14:57:42 +02006733 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006734};
6735
6736struct mlx5_ifc_create_eq_in_bits {
6737 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006738 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006739
Matan Barakb4ff3a32016-02-09 14:57:42 +02006740 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006741 u8 op_mod[0x10];
6742
Matan Barakb4ff3a32016-02-09 14:57:42 +02006743 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006744
6745 struct mlx5_ifc_eqc_bits eq_context_entry;
6746
Matan Barakb4ff3a32016-02-09 14:57:42 +02006747 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006748
6749 u8 event_bitmask[0x40];
6750
Matan Barakb4ff3a32016-02-09 14:57:42 +02006751 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006752
6753 u8 pas[0][0x40];
6754};
6755
6756struct mlx5_ifc_create_dct_out_bits {
6757 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006758 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006759
6760 u8 syndrome[0x20];
6761
Matan Barakb4ff3a32016-02-09 14:57:42 +02006762 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006763 u8 dctn[0x18];
6764
Matan Barakb4ff3a32016-02-09 14:57:42 +02006765 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006766};
6767
6768struct mlx5_ifc_create_dct_in_bits {
6769 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006770 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006771
Matan Barakb4ff3a32016-02-09 14:57:42 +02006772 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006773 u8 op_mod[0x10];
6774
Matan Barakb4ff3a32016-02-09 14:57:42 +02006775 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006776
6777 struct mlx5_ifc_dctc_bits dct_context_entry;
6778
Matan Barakb4ff3a32016-02-09 14:57:42 +02006779 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006780};
6781
6782struct mlx5_ifc_create_cq_out_bits {
6783 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006784 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006785
6786 u8 syndrome[0x20];
6787
Matan Barakb4ff3a32016-02-09 14:57:42 +02006788 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006789 u8 cqn[0x18];
6790
Matan Barakb4ff3a32016-02-09 14:57:42 +02006791 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006792};
6793
6794struct mlx5_ifc_create_cq_in_bits {
6795 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006796 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006797
Matan Barakb4ff3a32016-02-09 14:57:42 +02006798 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006799 u8 op_mod[0x10];
6800
Matan Barakb4ff3a32016-02-09 14:57:42 +02006801 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006802
6803 struct mlx5_ifc_cqc_bits cq_context;
6804
Matan Barakb4ff3a32016-02-09 14:57:42 +02006805 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006806
6807 u8 pas[0][0x40];
6808};
6809
6810struct mlx5_ifc_config_int_moderation_out_bits {
6811 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006812 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006813
6814 u8 syndrome[0x20];
6815
Matan Barakb4ff3a32016-02-09 14:57:42 +02006816 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006817 u8 min_delay[0xc];
6818 u8 int_vector[0x10];
6819
Matan Barakb4ff3a32016-02-09 14:57:42 +02006820 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006821};
6822
6823enum {
6824 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6825 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6826};
6827
6828struct mlx5_ifc_config_int_moderation_in_bits {
6829 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006830 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006831
Matan Barakb4ff3a32016-02-09 14:57:42 +02006832 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006833 u8 op_mod[0x10];
6834
Matan Barakb4ff3a32016-02-09 14:57:42 +02006835 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006836 u8 min_delay[0xc];
6837 u8 int_vector[0x10];
6838
Matan Barakb4ff3a32016-02-09 14:57:42 +02006839 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006840};
6841
6842struct mlx5_ifc_attach_to_mcg_out_bits {
6843 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006844 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006845
6846 u8 syndrome[0x20];
6847
Matan Barakb4ff3a32016-02-09 14:57:42 +02006848 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006849};
6850
6851struct mlx5_ifc_attach_to_mcg_in_bits {
6852 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006853 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006854
Matan Barakb4ff3a32016-02-09 14:57:42 +02006855 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006856 u8 op_mod[0x10];
6857
Matan Barakb4ff3a32016-02-09 14:57:42 +02006858 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006859 u8 qpn[0x18];
6860
Matan Barakb4ff3a32016-02-09 14:57:42 +02006861 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006862
6863 u8 multicast_gid[16][0x8];
6864};
6865
Saeed Mahameed74862162016-06-09 15:11:34 +03006866struct mlx5_ifc_arm_xrq_out_bits {
6867 u8 status[0x8];
6868 u8 reserved_at_8[0x18];
6869
6870 u8 syndrome[0x20];
6871
6872 u8 reserved_at_40[0x40];
6873};
6874
6875struct mlx5_ifc_arm_xrq_in_bits {
6876 u8 opcode[0x10];
6877 u8 reserved_at_10[0x10];
6878
6879 u8 reserved_at_20[0x10];
6880 u8 op_mod[0x10];
6881
6882 u8 reserved_at_40[0x8];
6883 u8 xrqn[0x18];
6884
6885 u8 reserved_at_60[0x10];
6886 u8 lwm[0x10];
6887};
6888
Saeed Mahameede2816822015-05-28 22:28:40 +03006889struct mlx5_ifc_arm_xrc_srq_out_bits {
6890 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006891 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006892
6893 u8 syndrome[0x20];
6894
Matan Barakb4ff3a32016-02-09 14:57:42 +02006895 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006896};
6897
6898enum {
6899 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
6900};
6901
6902struct mlx5_ifc_arm_xrc_srq_in_bits {
6903 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006904 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006905
Matan Barakb4ff3a32016-02-09 14:57:42 +02006906 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006907 u8 op_mod[0x10];
6908
Matan Barakb4ff3a32016-02-09 14:57:42 +02006909 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006910 u8 xrc_srqn[0x18];
6911
Matan Barakb4ff3a32016-02-09 14:57:42 +02006912 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006913 u8 lwm[0x10];
6914};
6915
6916struct mlx5_ifc_arm_rq_out_bits {
6917 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006918 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006919
6920 u8 syndrome[0x20];
6921
Matan Barakb4ff3a32016-02-09 14:57:42 +02006922 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006923};
6924
6925enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03006926 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
6927 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03006928};
6929
6930struct mlx5_ifc_arm_rq_in_bits {
6931 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006932 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006933
Matan Barakb4ff3a32016-02-09 14:57:42 +02006934 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006935 u8 op_mod[0x10];
6936
Matan Barakb4ff3a32016-02-09 14:57:42 +02006937 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006938 u8 srq_number[0x18];
6939
Matan Barakb4ff3a32016-02-09 14:57:42 +02006940 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006941 u8 lwm[0x10];
6942};
6943
6944struct mlx5_ifc_arm_dct_out_bits {
6945 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006946 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006947
6948 u8 syndrome[0x20];
6949
Matan Barakb4ff3a32016-02-09 14:57:42 +02006950 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006951};
6952
6953struct mlx5_ifc_arm_dct_in_bits {
6954 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006955 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006956
Matan Barakb4ff3a32016-02-09 14:57:42 +02006957 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006958 u8 op_mod[0x10];
6959
Matan Barakb4ff3a32016-02-09 14:57:42 +02006960 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006961 u8 dct_number[0x18];
6962
Matan Barakb4ff3a32016-02-09 14:57:42 +02006963 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006964};
6965
6966struct mlx5_ifc_alloc_xrcd_out_bits {
6967 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006968 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006969
6970 u8 syndrome[0x20];
6971
Matan Barakb4ff3a32016-02-09 14:57:42 +02006972 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006973 u8 xrcd[0x18];
6974
Matan Barakb4ff3a32016-02-09 14:57:42 +02006975 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006976};
6977
6978struct mlx5_ifc_alloc_xrcd_in_bits {
6979 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006980 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006981
Matan Barakb4ff3a32016-02-09 14:57:42 +02006982 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006983 u8 op_mod[0x10];
6984
Matan Barakb4ff3a32016-02-09 14:57:42 +02006985 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006986};
6987
6988struct mlx5_ifc_alloc_uar_out_bits {
6989 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006990 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006991
6992 u8 syndrome[0x20];
6993
Matan Barakb4ff3a32016-02-09 14:57:42 +02006994 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006995 u8 uar[0x18];
6996
Matan Barakb4ff3a32016-02-09 14:57:42 +02006997 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006998};
6999
7000struct mlx5_ifc_alloc_uar_in_bits {
7001 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007002 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007003
Matan Barakb4ff3a32016-02-09 14:57:42 +02007004 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007005 u8 op_mod[0x10];
7006
Matan Barakb4ff3a32016-02-09 14:57:42 +02007007 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007008};
7009
7010struct mlx5_ifc_alloc_transport_domain_out_bits {
7011 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007012 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007013
7014 u8 syndrome[0x20];
7015
Matan Barakb4ff3a32016-02-09 14:57:42 +02007016 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007017 u8 transport_domain[0x18];
7018
Matan Barakb4ff3a32016-02-09 14:57:42 +02007019 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007020};
7021
7022struct mlx5_ifc_alloc_transport_domain_in_bits {
7023 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007024 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007025
Matan Barakb4ff3a32016-02-09 14:57:42 +02007026 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007027 u8 op_mod[0x10];
7028
Matan Barakb4ff3a32016-02-09 14:57:42 +02007029 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007030};
7031
7032struct mlx5_ifc_alloc_q_counter_out_bits {
7033 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007034 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007035
7036 u8 syndrome[0x20];
7037
Matan Barakb4ff3a32016-02-09 14:57:42 +02007038 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007039 u8 counter_set_id[0x8];
7040
Matan Barakb4ff3a32016-02-09 14:57:42 +02007041 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007042};
7043
7044struct mlx5_ifc_alloc_q_counter_in_bits {
7045 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007046 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007047
Matan Barakb4ff3a32016-02-09 14:57:42 +02007048 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007049 u8 op_mod[0x10];
7050
Matan Barakb4ff3a32016-02-09 14:57:42 +02007051 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007052};
7053
7054struct mlx5_ifc_alloc_pd_out_bits {
7055 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007056 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007057
7058 u8 syndrome[0x20];
7059
Matan Barakb4ff3a32016-02-09 14:57:42 +02007060 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007061 u8 pd[0x18];
7062
Matan Barakb4ff3a32016-02-09 14:57:42 +02007063 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007064};
7065
7066struct mlx5_ifc_alloc_pd_in_bits {
7067 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007068 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007069
Matan Barakb4ff3a32016-02-09 14:57:42 +02007070 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007071 u8 op_mod[0x10];
7072
Matan Barakb4ff3a32016-02-09 14:57:42 +02007073 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007074};
7075
Amir Vadai9dc0b282016-05-13 12:55:39 +00007076struct mlx5_ifc_alloc_flow_counter_out_bits {
7077 u8 status[0x8];
7078 u8 reserved_at_8[0x18];
7079
7080 u8 syndrome[0x20];
7081
7082 u8 reserved_at_40[0x10];
7083 u8 flow_counter_id[0x10];
7084
7085 u8 reserved_at_60[0x20];
7086};
7087
7088struct mlx5_ifc_alloc_flow_counter_in_bits {
7089 u8 opcode[0x10];
7090 u8 reserved_at_10[0x10];
7091
7092 u8 reserved_at_20[0x10];
7093 u8 op_mod[0x10];
7094
7095 u8 reserved_at_40[0x40];
7096};
7097
Saeed Mahameede2816822015-05-28 22:28:40 +03007098struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7099 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007100 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007101
7102 u8 syndrome[0x20];
7103
Matan Barakb4ff3a32016-02-09 14:57:42 +02007104 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007105};
7106
7107struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7108 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007109 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007110
Matan Barakb4ff3a32016-02-09 14:57:42 +02007111 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007112 u8 op_mod[0x10];
7113
Matan Barakb4ff3a32016-02-09 14:57:42 +02007114 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007115
Matan Barakb4ff3a32016-02-09 14:57:42 +02007116 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007117 u8 vxlan_udp_port[0x10];
7118};
7119
Saeed Mahameed74862162016-06-09 15:11:34 +03007120struct mlx5_ifc_set_rate_limit_out_bits {
7121 u8 status[0x8];
7122 u8 reserved_at_8[0x18];
7123
7124 u8 syndrome[0x20];
7125
7126 u8 reserved_at_40[0x40];
7127};
7128
7129struct mlx5_ifc_set_rate_limit_in_bits {
7130 u8 opcode[0x10];
7131 u8 reserved_at_10[0x10];
7132
7133 u8 reserved_at_20[0x10];
7134 u8 op_mod[0x10];
7135
7136 u8 reserved_at_40[0x10];
7137 u8 rate_limit_index[0x10];
7138
7139 u8 reserved_at_60[0x20];
7140
7141 u8 rate_limit[0x20];
7142};
7143
Saeed Mahameede2816822015-05-28 22:28:40 +03007144struct mlx5_ifc_access_register_out_bits {
7145 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007146 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007147
7148 u8 syndrome[0x20];
7149
Matan Barakb4ff3a32016-02-09 14:57:42 +02007150 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007151
7152 u8 register_data[0][0x20];
7153};
7154
7155enum {
7156 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7157 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7158};
7159
7160struct mlx5_ifc_access_register_in_bits {
7161 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007162 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007163
Matan Barakb4ff3a32016-02-09 14:57:42 +02007164 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007165 u8 op_mod[0x10];
7166
Matan Barakb4ff3a32016-02-09 14:57:42 +02007167 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007168 u8 register_id[0x10];
7169
7170 u8 argument[0x20];
7171
7172 u8 register_data[0][0x20];
7173};
7174
7175struct mlx5_ifc_sltp_reg_bits {
7176 u8 status[0x4];
7177 u8 version[0x4];
7178 u8 local_port[0x8];
7179 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007180 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007181 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007182 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007183
Matan Barakb4ff3a32016-02-09 14:57:42 +02007184 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007185
Matan Barakb4ff3a32016-02-09 14:57:42 +02007186 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007187 u8 polarity[0x1];
7188 u8 ob_tap0[0x8];
7189 u8 ob_tap1[0x8];
7190 u8 ob_tap2[0x8];
7191
Matan Barakb4ff3a32016-02-09 14:57:42 +02007192 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007193 u8 ob_preemp_mode[0x4];
7194 u8 ob_reg[0x8];
7195 u8 ob_bias[0x8];
7196
Matan Barakb4ff3a32016-02-09 14:57:42 +02007197 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007198};
7199
7200struct mlx5_ifc_slrg_reg_bits {
7201 u8 status[0x4];
7202 u8 version[0x4];
7203 u8 local_port[0x8];
7204 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007205 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007206 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007207 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007208
7209 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007210 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007211 u8 grade_lane_speed[0x4];
7212
7213 u8 grade_version[0x8];
7214 u8 grade[0x18];
7215
Matan Barakb4ff3a32016-02-09 14:57:42 +02007216 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007217 u8 height_grade_type[0x4];
7218 u8 height_grade[0x18];
7219
7220 u8 height_dz[0x10];
7221 u8 height_dv[0x10];
7222
Matan Barakb4ff3a32016-02-09 14:57:42 +02007223 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007224 u8 height_sigma[0x10];
7225
Matan Barakb4ff3a32016-02-09 14:57:42 +02007226 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007227
Matan Barakb4ff3a32016-02-09 14:57:42 +02007228 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007229 u8 phase_grade_type[0x4];
7230 u8 phase_grade[0x18];
7231
Matan Barakb4ff3a32016-02-09 14:57:42 +02007232 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007233 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007234 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007235 u8 phase_eo_neg[0x8];
7236
7237 u8 ffe_set_tested[0x10];
7238 u8 test_errors_per_lane[0x10];
7239};
7240
7241struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007242 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007243 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007244 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007245
Matan Barakb4ff3a32016-02-09 14:57:42 +02007246 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007247 u8 vl_hw_cap[0x4];
7248
Matan Barakb4ff3a32016-02-09 14:57:42 +02007249 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007250 u8 vl_admin[0x4];
7251
Matan Barakb4ff3a32016-02-09 14:57:42 +02007252 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007253 u8 vl_operational[0x4];
7254};
7255
7256struct mlx5_ifc_pude_reg_bits {
7257 u8 swid[0x8];
7258 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007259 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007260 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007261 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007262 u8 oper_status[0x4];
7263
Matan Barakb4ff3a32016-02-09 14:57:42 +02007264 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007265};
7266
7267struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007268 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007269 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007270 u8 an_disable_cap[0x1];
7271 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007272 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007273 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007274 u8 proto_mask[0x3];
7275
Saeed Mahameed74862162016-06-09 15:11:34 +03007276 u8 an_status[0x4];
7277 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007278
7279 u8 eth_proto_capability[0x20];
7280
7281 u8 ib_link_width_capability[0x10];
7282 u8 ib_proto_capability[0x10];
7283
Matan Barakb4ff3a32016-02-09 14:57:42 +02007284 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007285
7286 u8 eth_proto_admin[0x20];
7287
7288 u8 ib_link_width_admin[0x10];
7289 u8 ib_proto_admin[0x10];
7290
Matan Barakb4ff3a32016-02-09 14:57:42 +02007291 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007292
7293 u8 eth_proto_oper[0x20];
7294
7295 u8 ib_link_width_oper[0x10];
7296 u8 ib_proto_oper[0x10];
7297
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007298 u8 reserved_at_160[0x1c];
7299 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007300
7301 u8 eth_proto_lp_advertise[0x20];
7302
Matan Barakb4ff3a32016-02-09 14:57:42 +02007303 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007304};
7305
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007306struct mlx5_ifc_mlcr_reg_bits {
7307 u8 reserved_at_0[0x8];
7308 u8 local_port[0x8];
7309 u8 reserved_at_10[0x20];
7310
7311 u8 beacon_duration[0x10];
7312 u8 reserved_at_40[0x10];
7313
7314 u8 beacon_remain[0x10];
7315};
7316
Saeed Mahameede2816822015-05-28 22:28:40 +03007317struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007318 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007319
7320 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007321 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007322 u8 repetitions_mode[0x4];
7323 u8 num_of_repetitions[0x8];
7324
7325 u8 grade_version[0x8];
7326 u8 height_grade_type[0x4];
7327 u8 phase_grade_type[0x4];
7328 u8 height_grade_weight[0x8];
7329 u8 phase_grade_weight[0x8];
7330
7331 u8 gisim_measure_bits[0x10];
7332 u8 adaptive_tap_measure_bits[0x10];
7333
7334 u8 ber_bath_high_error_threshold[0x10];
7335 u8 ber_bath_mid_error_threshold[0x10];
7336
7337 u8 ber_bath_low_error_threshold[0x10];
7338 u8 one_ratio_high_threshold[0x10];
7339
7340 u8 one_ratio_high_mid_threshold[0x10];
7341 u8 one_ratio_low_mid_threshold[0x10];
7342
7343 u8 one_ratio_low_threshold[0x10];
7344 u8 ndeo_error_threshold[0x10];
7345
7346 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007347 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007348 u8 mix90_phase_for_voltage_bath[0x8];
7349
7350 u8 mixer_offset_start[0x10];
7351 u8 mixer_offset_end[0x10];
7352
Matan Barakb4ff3a32016-02-09 14:57:42 +02007353 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007354 u8 ber_test_time[0xb];
7355};
7356
7357struct mlx5_ifc_pspa_reg_bits {
7358 u8 swid[0x8];
7359 u8 local_port[0x8];
7360 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007361 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007362
Matan Barakb4ff3a32016-02-09 14:57:42 +02007363 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007364};
7365
7366struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007367 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007368 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007369 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007370 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007371 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007372 u8 mode[0x2];
7373
Matan Barakb4ff3a32016-02-09 14:57:42 +02007374 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007375
Matan Barakb4ff3a32016-02-09 14:57:42 +02007376 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007377 u8 min_threshold[0x10];
7378
Matan Barakb4ff3a32016-02-09 14:57:42 +02007379 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007380 u8 max_threshold[0x10];
7381
Matan Barakb4ff3a32016-02-09 14:57:42 +02007382 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007383 u8 mark_probability_denominator[0x10];
7384
Matan Barakb4ff3a32016-02-09 14:57:42 +02007385 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007386};
7387
7388struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007389 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007390 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007391 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007392
Matan Barakb4ff3a32016-02-09 14:57:42 +02007393 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007394
Matan Barakb4ff3a32016-02-09 14:57:42 +02007395 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007396 u8 wrps_admin[0x4];
7397
Matan Barakb4ff3a32016-02-09 14:57:42 +02007398 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007399 u8 wrps_status[0x4];
7400
Matan Barakb4ff3a32016-02-09 14:57:42 +02007401 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007402 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007403 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007404 u8 down_threshold[0x8];
7405
Matan Barakb4ff3a32016-02-09 14:57:42 +02007406 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007407
Matan Barakb4ff3a32016-02-09 14:57:42 +02007408 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007409 u8 srps_admin[0x4];
7410
Matan Barakb4ff3a32016-02-09 14:57:42 +02007411 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007412 u8 srps_status[0x4];
7413
Matan Barakb4ff3a32016-02-09 14:57:42 +02007414 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007415};
7416
7417struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007418 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007419 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007420 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007421
Matan Barakb4ff3a32016-02-09 14:57:42 +02007422 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007423 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007424 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007425 u8 lb_en[0x8];
7426};
7427
7428struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007429 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007430 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007431 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007432
Matan Barakb4ff3a32016-02-09 14:57:42 +02007433 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007434
7435 u8 port_profile_mode[0x8];
7436 u8 static_port_profile[0x8];
7437 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007438 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007439
7440 u8 retransmission_active[0x8];
7441 u8 fec_mode_active[0x18];
7442
Matan Barakb4ff3a32016-02-09 14:57:42 +02007443 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007444};
7445
7446struct mlx5_ifc_ppcnt_reg_bits {
7447 u8 swid[0x8];
7448 u8 local_port[0x8];
7449 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007450 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007451 u8 grp[0x6];
7452
7453 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007454 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007455 u8 prio_tc[0x3];
7456
7457 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7458};
7459
Gal Pressman8ed1a632016-11-17 13:46:01 +02007460struct mlx5_ifc_mpcnt_reg_bits {
7461 u8 reserved_at_0[0x8];
7462 u8 pcie_index[0x8];
7463 u8 reserved_at_10[0xa];
7464 u8 grp[0x6];
7465
7466 u8 clr[0x1];
7467 u8 reserved_at_21[0x1f];
7468
7469 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7470};
7471
Saeed Mahameede2816822015-05-28 22:28:40 +03007472struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007473 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007474 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007475 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007476 u8 local_port[0x8];
7477 u8 mac_47_32[0x10];
7478
7479 u8 mac_31_0[0x20];
7480
Matan Barakb4ff3a32016-02-09 14:57:42 +02007481 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007482};
7483
7484struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007485 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007486 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007487 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007488
7489 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007490 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007491
7492 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007493 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007494
7495 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007496 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007497};
7498
7499struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007500 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007501 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007502 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007503
Matan Barakb4ff3a32016-02-09 14:57:42 +02007504 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007505 u8 attenuation_5g[0x8];
7506
Matan Barakb4ff3a32016-02-09 14:57:42 +02007507 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007508 u8 attenuation_7g[0x8];
7509
Matan Barakb4ff3a32016-02-09 14:57:42 +02007510 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007511 u8 attenuation_12g[0x8];
7512};
7513
7514struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007515 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007516 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007517 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007518 u8 module_status[0x4];
7519
Matan Barakb4ff3a32016-02-09 14:57:42 +02007520 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007521};
7522
7523struct mlx5_ifc_pmpc_reg_bits {
7524 u8 module_state_updated[32][0x8];
7525};
7526
7527struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007528 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007529 u8 mlpn_status[0x4];
7530 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007531 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007532
7533 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007534 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007535};
7536
7537struct mlx5_ifc_pmlp_reg_bits {
7538 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007539 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007540 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007541 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007542 u8 width[0x8];
7543
7544 u8 lane0_module_mapping[0x20];
7545
7546 u8 lane1_module_mapping[0x20];
7547
7548 u8 lane2_module_mapping[0x20];
7549
7550 u8 lane3_module_mapping[0x20];
7551
Matan Barakb4ff3a32016-02-09 14:57:42 +02007552 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007553};
7554
7555struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007556 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007557 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007558 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007559 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007560 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007561 u8 oper_status[0x4];
7562
7563 u8 ase[0x1];
7564 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007565 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007566 u8 e[0x2];
7567
Matan Barakb4ff3a32016-02-09 14:57:42 +02007568 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007569};
7570
7571struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007572 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007573 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007574 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007575 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007576 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007577
Matan Barakb4ff3a32016-02-09 14:57:42 +02007578 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007579 u8 lane_speed[0x10];
7580
Matan Barakb4ff3a32016-02-09 14:57:42 +02007581 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007582 u8 lpbf[0x1];
7583 u8 fec_mode_policy[0x8];
7584
7585 u8 retransmission_capability[0x8];
7586 u8 fec_mode_capability[0x18];
7587
7588 u8 retransmission_support_admin[0x8];
7589 u8 fec_mode_support_admin[0x18];
7590
7591 u8 retransmission_request_admin[0x8];
7592 u8 fec_mode_request_admin[0x18];
7593
Matan Barakb4ff3a32016-02-09 14:57:42 +02007594 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007595};
7596
7597struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007598 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007599 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007600 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007601 u8 ib_port[0x8];
7602
Matan Barakb4ff3a32016-02-09 14:57:42 +02007603 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007604};
7605
7606struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007607 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007608 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007609 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007610 u8 lbf_mode[0x3];
7611
Matan Barakb4ff3a32016-02-09 14:57:42 +02007612 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007613};
7614
7615struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007616 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007617 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007618 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007619
7620 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007621 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007622 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007623 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007624};
7625
7626struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007627 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007628 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007629 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007630
Matan Barakb4ff3a32016-02-09 14:57:42 +02007631 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007632
7633 u8 port_filter[8][0x20];
7634
7635 u8 port_filter_update_en[8][0x20];
7636};
7637
7638struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007639 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007640 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007641 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007642
7643 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007644 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007645 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007646 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007647 u8 prio_mask_rx[0x8];
7648
7649 u8 pptx[0x1];
7650 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007651 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007652 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007653 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007654
7655 u8 pprx[0x1];
7656 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007657 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007658 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007659 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007660
Matan Barakb4ff3a32016-02-09 14:57:42 +02007661 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007662};
7663
7664struct mlx5_ifc_pelc_reg_bits {
7665 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007666 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007667 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007668 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007669
7670 u8 op_admin[0x8];
7671 u8 op_capability[0x8];
7672 u8 op_request[0x8];
7673 u8 op_active[0x8];
7674
7675 u8 admin[0x40];
7676
7677 u8 capability[0x40];
7678
7679 u8 request[0x40];
7680
7681 u8 active[0x40];
7682
Matan Barakb4ff3a32016-02-09 14:57:42 +02007683 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007684};
7685
7686struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007687 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007688 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007689 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007690
Matan Barakb4ff3a32016-02-09 14:57:42 +02007691 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007692 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007693 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007694
Matan Barakb4ff3a32016-02-09 14:57:42 +02007695 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007696 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007697 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007698 u8 error_type[0x8];
7699};
7700
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007701struct mlx5_ifc_pcam_enhanced_features_bits {
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007702 u8 reserved_at_0[0x7c];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007703
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007704 u8 ptys_connector_type[0x1];
7705 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007706 u8 ppcnt_discard_group[0x1];
7707 u8 ppcnt_statistical_group[0x1];
7708};
7709
7710struct mlx5_ifc_pcam_reg_bits {
7711 u8 reserved_at_0[0x8];
7712 u8 feature_group[0x8];
7713 u8 reserved_at_10[0x8];
7714 u8 access_reg_group[0x8];
7715
7716 u8 reserved_at_20[0x20];
7717
7718 union {
7719 u8 reserved_at_0[0x80];
7720 } port_access_reg_cap_mask;
7721
7722 u8 reserved_at_c0[0x80];
7723
7724 union {
7725 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7726 u8 reserved_at_0[0x80];
7727 } feature_cap_mask;
7728
7729 u8 reserved_at_1c0[0xc0];
7730};
7731
7732struct mlx5_ifc_mcam_enhanced_features_bits {
7733 u8 reserved_at_0[0x7f];
7734
7735 u8 pcie_performance_group[0x1];
7736};
7737
7738struct mlx5_ifc_mcam_reg_bits {
7739 u8 reserved_at_0[0x8];
7740 u8 feature_group[0x8];
7741 u8 reserved_at_10[0x8];
7742 u8 access_reg_group[0x8];
7743
7744 u8 reserved_at_20[0x20];
7745
7746 union {
7747 u8 reserved_at_0[0x80];
7748 } mng_access_reg_cap_mask;
7749
7750 u8 reserved_at_c0[0x80];
7751
7752 union {
7753 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7754 u8 reserved_at_0[0x80];
7755 } mng_feature_cap_mask;
7756
7757 u8 reserved_at_1c0[0x80];
7758};
7759
Saeed Mahameede2816822015-05-28 22:28:40 +03007760struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007761 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007762 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007763 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007764
7765 u8 port_capability_mask[4][0x20];
7766};
7767
7768struct mlx5_ifc_paos_reg_bits {
7769 u8 swid[0x8];
7770 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007771 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007772 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007773 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007774 u8 oper_status[0x4];
7775
7776 u8 ase[0x1];
7777 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007778 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007779 u8 e[0x2];
7780
Matan Barakb4ff3a32016-02-09 14:57:42 +02007781 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007782};
7783
7784struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007785 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007786 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007787 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007788 u8 opamp_group_type[0x4];
7789
7790 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007791 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007792 u8 num_of_indices[0xc];
7793
7794 u8 index_data[18][0x10];
7795};
7796
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007797struct mlx5_ifc_pcmr_reg_bits {
7798 u8 reserved_at_0[0x8];
7799 u8 local_port[0x8];
7800 u8 reserved_at_10[0x2e];
7801 u8 fcs_cap[0x1];
7802 u8 reserved_at_3f[0x1f];
7803 u8 fcs_chk[0x1];
7804 u8 reserved_at_5f[0x1];
7805};
7806
Saeed Mahameede2816822015-05-28 22:28:40 +03007807struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007808 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007809 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007810 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007811 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007812 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007813 u8 module[0x8];
7814};
7815
7816struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007817 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007818 u8 lossy[0x1];
7819 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007820 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007821 u8 size[0xc];
7822
7823 u8 xoff_threshold[0x10];
7824 u8 xon_threshold[0x10];
7825};
7826
7827struct mlx5_ifc_set_node_in_bits {
7828 u8 node_description[64][0x8];
7829};
7830
7831struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007832 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007833 u8 power_settings_level[0x8];
7834
Matan Barakb4ff3a32016-02-09 14:57:42 +02007835 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007836};
7837
7838struct mlx5_ifc_register_host_endianness_bits {
7839 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007840 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007841
Matan Barakb4ff3a32016-02-09 14:57:42 +02007842 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007843};
7844
7845struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007846 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007847
7848 u8 mkey[0x20];
7849
7850 u8 addressh_63_32[0x20];
7851
7852 u8 addressl_31_0[0x20];
7853};
7854
7855struct mlx5_ifc_ud_adrs_vector_bits {
7856 u8 dc_key[0x40];
7857
7858 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007859 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007860 u8 destination_qp_dct[0x18];
7861
7862 u8 static_rate[0x4];
7863 u8 sl_eth_prio[0x4];
7864 u8 fl[0x1];
7865 u8 mlid[0x7];
7866 u8 rlid_udp_sport[0x10];
7867
Matan Barakb4ff3a32016-02-09 14:57:42 +02007868 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007869
7870 u8 rmac_47_16[0x20];
7871
7872 u8 rmac_15_0[0x10];
7873 u8 tclass[0x8];
7874 u8 hop_limit[0x8];
7875
Matan Barakb4ff3a32016-02-09 14:57:42 +02007876 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03007877 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007878 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007879 u8 src_addr_index[0x8];
7880 u8 flow_label[0x14];
7881
7882 u8 rgid_rip[16][0x8];
7883};
7884
7885struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007886 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007887 u8 function_id[0x10];
7888
7889 u8 num_pages[0x20];
7890
Matan Barakb4ff3a32016-02-09 14:57:42 +02007891 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007892};
7893
7894struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007895 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007896 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007897 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007898 u8 event_sub_type[0x8];
7899
Matan Barakb4ff3a32016-02-09 14:57:42 +02007900 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007901
7902 union mlx5_ifc_event_auto_bits event_data;
7903
Matan Barakb4ff3a32016-02-09 14:57:42 +02007904 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007905 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007906 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007907 u8 owner[0x1];
7908};
7909
7910enum {
7911 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
7912};
7913
7914struct mlx5_ifc_cmd_queue_entry_bits {
7915 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007916 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007917
7918 u8 input_length[0x20];
7919
7920 u8 input_mailbox_pointer_63_32[0x20];
7921
7922 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007923 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007924
7925 u8 command_input_inline_data[16][0x8];
7926
7927 u8 command_output_inline_data[16][0x8];
7928
7929 u8 output_mailbox_pointer_63_32[0x20];
7930
7931 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007932 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007933
7934 u8 output_length[0x20];
7935
7936 u8 token[0x8];
7937 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007938 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007939 u8 status[0x7];
7940 u8 ownership[0x1];
7941};
7942
7943struct mlx5_ifc_cmd_out_bits {
7944 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007945 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007946
7947 u8 syndrome[0x20];
7948
7949 u8 command_output[0x20];
7950};
7951
7952struct mlx5_ifc_cmd_in_bits {
7953 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007954 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007955
Matan Barakb4ff3a32016-02-09 14:57:42 +02007956 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007957 u8 op_mod[0x10];
7958
7959 u8 command[0][0x20];
7960};
7961
7962struct mlx5_ifc_cmd_if_box_bits {
7963 u8 mailbox_data[512][0x8];
7964
Matan Barakb4ff3a32016-02-09 14:57:42 +02007965 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03007966
7967 u8 next_pointer_63_32[0x20];
7968
7969 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007970 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03007971
7972 u8 block_number[0x20];
7973
Matan Barakb4ff3a32016-02-09 14:57:42 +02007974 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007975 u8 token[0x8];
7976 u8 ctrl_signature[0x8];
7977 u8 signature[0x8];
7978};
7979
7980struct mlx5_ifc_mtt_bits {
7981 u8 ptag_63_32[0x20];
7982
7983 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007984 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007985 u8 wr_en[0x1];
7986 u8 rd_en[0x1];
7987};
7988
Tariq Toukan928cfe82016-02-22 18:17:29 +02007989struct mlx5_ifc_query_wol_rol_out_bits {
7990 u8 status[0x8];
7991 u8 reserved_at_8[0x18];
7992
7993 u8 syndrome[0x20];
7994
7995 u8 reserved_at_40[0x10];
7996 u8 rol_mode[0x8];
7997 u8 wol_mode[0x8];
7998
7999 u8 reserved_at_60[0x20];
8000};
8001
8002struct mlx5_ifc_query_wol_rol_in_bits {
8003 u8 opcode[0x10];
8004 u8 reserved_at_10[0x10];
8005
8006 u8 reserved_at_20[0x10];
8007 u8 op_mod[0x10];
8008
8009 u8 reserved_at_40[0x40];
8010};
8011
8012struct mlx5_ifc_set_wol_rol_out_bits {
8013 u8 status[0x8];
8014 u8 reserved_at_8[0x18];
8015
8016 u8 syndrome[0x20];
8017
8018 u8 reserved_at_40[0x40];
8019};
8020
8021struct mlx5_ifc_set_wol_rol_in_bits {
8022 u8 opcode[0x10];
8023 u8 reserved_at_10[0x10];
8024
8025 u8 reserved_at_20[0x10];
8026 u8 op_mod[0x10];
8027
8028 u8 rol_mode_valid[0x1];
8029 u8 wol_mode_valid[0x1];
8030 u8 reserved_at_42[0xe];
8031 u8 rol_mode[0x8];
8032 u8 wol_mode[0x8];
8033
8034 u8 reserved_at_60[0x20];
8035};
8036
Saeed Mahameede2816822015-05-28 22:28:40 +03008037enum {
8038 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8039 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8040 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8041};
8042
8043enum {
8044 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8045 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8046 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8047};
8048
8049enum {
8050 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8051 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8052 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8053 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8054 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8055 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8056 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8057 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8058 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8059 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8060 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8061};
8062
8063struct mlx5_ifc_initial_seg_bits {
8064 u8 fw_rev_minor[0x10];
8065 u8 fw_rev_major[0x10];
8066
8067 u8 cmd_interface_rev[0x10];
8068 u8 fw_rev_subminor[0x10];
8069
Matan Barakb4ff3a32016-02-09 14:57:42 +02008070 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008071
8072 u8 cmdq_phy_addr_63_32[0x20];
8073
8074 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008075 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008076 u8 nic_interface[0x2];
8077 u8 log_cmdq_size[0x4];
8078 u8 log_cmdq_stride[0x4];
8079
8080 u8 command_doorbell_vector[0x20];
8081
Matan Barakb4ff3a32016-02-09 14:57:42 +02008082 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008083
8084 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008085 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008086 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008087 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008088
8089 struct mlx5_ifc_health_buffer_bits health_buffer;
8090
8091 u8 no_dram_nic_offset[0x20];
8092
Matan Barakb4ff3a32016-02-09 14:57:42 +02008093 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008094
Matan Barakb4ff3a32016-02-09 14:57:42 +02008095 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008096 u8 clear_int[0x1];
8097
8098 u8 health_syndrome[0x8];
8099 u8 health_counter[0x18];
8100
Matan Barakb4ff3a32016-02-09 14:57:42 +02008101 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008102};
8103
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008104struct mlx5_ifc_mtpps_reg_bits {
8105 u8 reserved_at_0[0xc];
8106 u8 cap_number_of_pps_pins[0x4];
8107 u8 reserved_at_10[0x4];
8108 u8 cap_max_num_of_pps_in_pins[0x4];
8109 u8 reserved_at_18[0x4];
8110 u8 cap_max_num_of_pps_out_pins[0x4];
8111
8112 u8 reserved_at_20[0x24];
8113 u8 cap_pin_3_mode[0x4];
8114 u8 reserved_at_48[0x4];
8115 u8 cap_pin_2_mode[0x4];
8116 u8 reserved_at_50[0x4];
8117 u8 cap_pin_1_mode[0x4];
8118 u8 reserved_at_58[0x4];
8119 u8 cap_pin_0_mode[0x4];
8120
8121 u8 reserved_at_60[0x4];
8122 u8 cap_pin_7_mode[0x4];
8123 u8 reserved_at_68[0x4];
8124 u8 cap_pin_6_mode[0x4];
8125 u8 reserved_at_70[0x4];
8126 u8 cap_pin_5_mode[0x4];
8127 u8 reserved_at_78[0x4];
8128 u8 cap_pin_4_mode[0x4];
8129
8130 u8 reserved_at_80[0x80];
8131
8132 u8 enable[0x1];
8133 u8 reserved_at_101[0xb];
8134 u8 pattern[0x4];
8135 u8 reserved_at_110[0x4];
8136 u8 pin_mode[0x4];
8137 u8 pin[0x8];
8138
8139 u8 reserved_at_120[0x20];
8140
8141 u8 time_stamp[0x40];
8142
8143 u8 out_pulse_duration[0x10];
8144 u8 out_periodic_adjustment[0x10];
8145
8146 u8 reserved_at_1a0[0x60];
8147};
8148
8149struct mlx5_ifc_mtppse_reg_bits {
8150 u8 reserved_at_0[0x18];
8151 u8 pin[0x8];
8152 u8 event_arm[0x1];
8153 u8 reserved_at_21[0x1b];
8154 u8 event_generation_mode[0x4];
8155 u8 reserved_at_40[0x40];
8156};
8157
Saeed Mahameede2816822015-05-28 22:28:40 +03008158union mlx5_ifc_ports_control_registers_document_bits {
8159 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8160 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8161 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8162 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8163 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8164 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8165 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8166 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8167 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8168 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8169 struct mlx5_ifc_paos_reg_bits paos_reg;
8170 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8171 struct mlx5_ifc_peir_reg_bits peir_reg;
8172 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8173 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008174 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008175 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8176 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8177 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8178 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8179 struct mlx5_ifc_plib_reg_bits plib_reg;
8180 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8181 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8182 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8183 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8184 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8185 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8186 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8187 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8188 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8189 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008190 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008191 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8192 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8193 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8194 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8195 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8196 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8197 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008198 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008199 struct mlx5_ifc_pude_reg_bits pude_reg;
8200 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8201 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8202 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008203 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8204 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008205 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8206 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008207 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008208};
8209
8210union mlx5_ifc_debug_enhancements_document_bits {
8211 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008212 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008213};
8214
8215union mlx5_ifc_uplink_pci_interface_document_bits {
8216 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008217 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008218};
8219
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008220struct mlx5_ifc_set_flow_table_root_out_bits {
8221 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008222 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008223
8224 u8 syndrome[0x20];
8225
Matan Barakb4ff3a32016-02-09 14:57:42 +02008226 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008227};
8228
8229struct mlx5_ifc_set_flow_table_root_in_bits {
8230 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008231 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008232
Matan Barakb4ff3a32016-02-09 14:57:42 +02008233 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008234 u8 op_mod[0x10];
8235
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008236 u8 other_vport[0x1];
8237 u8 reserved_at_41[0xf];
8238 u8 vport_number[0x10];
8239
8240 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008241
8242 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008243 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008244
Matan Barakb4ff3a32016-02-09 14:57:42 +02008245 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008246 u8 table_id[0x18];
8247
Erez Shitrit500a3d02017-04-13 06:36:51 +03008248 u8 reserved_at_c0[0x8];
8249 u8 underlay_qpn[0x18];
8250 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008251};
8252
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008253enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008254 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8255 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008256};
8257
8258struct mlx5_ifc_modify_flow_table_out_bits {
8259 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008260 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008261
8262 u8 syndrome[0x20];
8263
Matan Barakb4ff3a32016-02-09 14:57:42 +02008264 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008265};
8266
8267struct mlx5_ifc_modify_flow_table_in_bits {
8268 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008269 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008270
Matan Barakb4ff3a32016-02-09 14:57:42 +02008271 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008272 u8 op_mod[0x10];
8273
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008274 u8 other_vport[0x1];
8275 u8 reserved_at_41[0xf];
8276 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008277
Matan Barakb4ff3a32016-02-09 14:57:42 +02008278 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008279 u8 modify_field_select[0x10];
8280
8281 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008282 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008283
Matan Barakb4ff3a32016-02-09 14:57:42 +02008284 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008285 u8 table_id[0x18];
8286
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008287 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008288};
8289
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008290struct mlx5_ifc_ets_tcn_config_reg_bits {
8291 u8 g[0x1];
8292 u8 b[0x1];
8293 u8 r[0x1];
8294 u8 reserved_at_3[0x9];
8295 u8 group[0x4];
8296 u8 reserved_at_10[0x9];
8297 u8 bw_allocation[0x7];
8298
8299 u8 reserved_at_20[0xc];
8300 u8 max_bw_units[0x4];
8301 u8 reserved_at_30[0x8];
8302 u8 max_bw_value[0x8];
8303};
8304
8305struct mlx5_ifc_ets_global_config_reg_bits {
8306 u8 reserved_at_0[0x2];
8307 u8 r[0x1];
8308 u8 reserved_at_3[0x1d];
8309
8310 u8 reserved_at_20[0xc];
8311 u8 max_bw_units[0x4];
8312 u8 reserved_at_30[0x8];
8313 u8 max_bw_value[0x8];
8314};
8315
8316struct mlx5_ifc_qetc_reg_bits {
8317 u8 reserved_at_0[0x8];
8318 u8 port_number[0x8];
8319 u8 reserved_at_10[0x30];
8320
8321 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8322 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8323};
8324
8325struct mlx5_ifc_qtct_reg_bits {
8326 u8 reserved_at_0[0x8];
8327 u8 port_number[0x8];
8328 u8 reserved_at_10[0xd];
8329 u8 prio[0x3];
8330
8331 u8 reserved_at_20[0x1d];
8332 u8 tclass[0x3];
8333};
8334
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008335struct mlx5_ifc_mcia_reg_bits {
8336 u8 l[0x1];
8337 u8 reserved_at_1[0x7];
8338 u8 module[0x8];
8339 u8 reserved_at_10[0x8];
8340 u8 status[0x8];
8341
8342 u8 i2c_device_address[0x8];
8343 u8 page_number[0x8];
8344 u8 device_address[0x10];
8345
8346 u8 reserved_at_40[0x10];
8347 u8 size[0x10];
8348
8349 u8 reserved_at_60[0x20];
8350
8351 u8 dword_0[0x20];
8352 u8 dword_1[0x20];
8353 u8 dword_2[0x20];
8354 u8 dword_3[0x20];
8355 u8 dword_4[0x20];
8356 u8 dword_5[0x20];
8357 u8 dword_6[0x20];
8358 u8 dword_7[0x20];
8359 u8 dword_8[0x20];
8360 u8 dword_9[0x20];
8361 u8 dword_10[0x20];
8362 u8 dword_11[0x20];
8363};
8364
Saeed Mahameed74862162016-06-09 15:11:34 +03008365struct mlx5_ifc_dcbx_param_bits {
8366 u8 dcbx_cee_cap[0x1];
8367 u8 dcbx_ieee_cap[0x1];
8368 u8 dcbx_standby_cap[0x1];
8369 u8 reserved_at_0[0x5];
8370 u8 port_number[0x8];
8371 u8 reserved_at_10[0xa];
8372 u8 max_application_table_size[6];
8373 u8 reserved_at_20[0x15];
8374 u8 version_oper[0x3];
8375 u8 reserved_at_38[5];
8376 u8 version_admin[0x3];
8377 u8 willing_admin[0x1];
8378 u8 reserved_at_41[0x3];
8379 u8 pfc_cap_oper[0x4];
8380 u8 reserved_at_48[0x4];
8381 u8 pfc_cap_admin[0x4];
8382 u8 reserved_at_50[0x4];
8383 u8 num_of_tc_oper[0x4];
8384 u8 reserved_at_58[0x4];
8385 u8 num_of_tc_admin[0x4];
8386 u8 remote_willing[0x1];
8387 u8 reserved_at_61[3];
8388 u8 remote_pfc_cap[4];
8389 u8 reserved_at_68[0x14];
8390 u8 remote_num_of_tc[0x4];
8391 u8 reserved_at_80[0x18];
8392 u8 error[0x8];
8393 u8 reserved_at_a0[0x160];
8394};
Aviv Heller84df61e2016-05-10 13:47:50 +03008395
8396struct mlx5_ifc_lagc_bits {
8397 u8 reserved_at_0[0x1d];
8398 u8 lag_state[0x3];
8399
8400 u8 reserved_at_20[0x14];
8401 u8 tx_remap_affinity_2[0x4];
8402 u8 reserved_at_38[0x4];
8403 u8 tx_remap_affinity_1[0x4];
8404};
8405
8406struct mlx5_ifc_create_lag_out_bits {
8407 u8 status[0x8];
8408 u8 reserved_at_8[0x18];
8409
8410 u8 syndrome[0x20];
8411
8412 u8 reserved_at_40[0x40];
8413};
8414
8415struct mlx5_ifc_create_lag_in_bits {
8416 u8 opcode[0x10];
8417 u8 reserved_at_10[0x10];
8418
8419 u8 reserved_at_20[0x10];
8420 u8 op_mod[0x10];
8421
8422 struct mlx5_ifc_lagc_bits ctx;
8423};
8424
8425struct mlx5_ifc_modify_lag_out_bits {
8426 u8 status[0x8];
8427 u8 reserved_at_8[0x18];
8428
8429 u8 syndrome[0x20];
8430
8431 u8 reserved_at_40[0x40];
8432};
8433
8434struct mlx5_ifc_modify_lag_in_bits {
8435 u8 opcode[0x10];
8436 u8 reserved_at_10[0x10];
8437
8438 u8 reserved_at_20[0x10];
8439 u8 op_mod[0x10];
8440
8441 u8 reserved_at_40[0x20];
8442 u8 field_select[0x20];
8443
8444 struct mlx5_ifc_lagc_bits ctx;
8445};
8446
8447struct mlx5_ifc_query_lag_out_bits {
8448 u8 status[0x8];
8449 u8 reserved_at_8[0x18];
8450
8451 u8 syndrome[0x20];
8452
8453 u8 reserved_at_40[0x40];
8454
8455 struct mlx5_ifc_lagc_bits ctx;
8456};
8457
8458struct mlx5_ifc_query_lag_in_bits {
8459 u8 opcode[0x10];
8460 u8 reserved_at_10[0x10];
8461
8462 u8 reserved_at_20[0x10];
8463 u8 op_mod[0x10];
8464
8465 u8 reserved_at_40[0x40];
8466};
8467
8468struct mlx5_ifc_destroy_lag_out_bits {
8469 u8 status[0x8];
8470 u8 reserved_at_8[0x18];
8471
8472 u8 syndrome[0x20];
8473
8474 u8 reserved_at_40[0x40];
8475};
8476
8477struct mlx5_ifc_destroy_lag_in_bits {
8478 u8 opcode[0x10];
8479 u8 reserved_at_10[0x10];
8480
8481 u8 reserved_at_20[0x10];
8482 u8 op_mod[0x10];
8483
8484 u8 reserved_at_40[0x40];
8485};
8486
8487struct mlx5_ifc_create_vport_lag_out_bits {
8488 u8 status[0x8];
8489 u8 reserved_at_8[0x18];
8490
8491 u8 syndrome[0x20];
8492
8493 u8 reserved_at_40[0x40];
8494};
8495
8496struct mlx5_ifc_create_vport_lag_in_bits {
8497 u8 opcode[0x10];
8498 u8 reserved_at_10[0x10];
8499
8500 u8 reserved_at_20[0x10];
8501 u8 op_mod[0x10];
8502
8503 u8 reserved_at_40[0x40];
8504};
8505
8506struct mlx5_ifc_destroy_vport_lag_out_bits {
8507 u8 status[0x8];
8508 u8 reserved_at_8[0x18];
8509
8510 u8 syndrome[0x20];
8511
8512 u8 reserved_at_40[0x40];
8513};
8514
8515struct mlx5_ifc_destroy_vport_lag_in_bits {
8516 u8 opcode[0x10];
8517 u8 reserved_at_10[0x10];
8518
8519 u8 reserved_at_20[0x10];
8520 u8 op_mod[0x10];
8521
8522 u8 reserved_at_40[0x40];
8523};
8524
Eli Cohend29b7962014-10-02 12:19:43 +03008525#endif /* MLX5_IFC_H */