Thomas Gleixner | 5b497af | 2019-05-29 07:18:09 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 2 | /* |
| 3 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 4 | */ |
| 5 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
Dan Williams | d5d30d5 | 2019-02-02 16:35:26 -0800 | [diff] [blame] | 6 | #include <linux/moduleparam.h> |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 7 | #include <linux/vmalloc.h> |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 8 | #include <linux/device.h> |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 9 | #include <linux/ndctl.h> |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 10 | #include <linux/slab.h> |
| 11 | #include <linux/io.h> |
| 12 | #include <linux/fs.h> |
| 13 | #include <linux/mm.h> |
| 14 | #include "nd-core.h" |
Dan Williams | 0ba1c63 | 2015-05-30 12:35:36 -0400 | [diff] [blame] | 15 | #include "label.h" |
Dan Williams | ca6a465 | 2017-01-13 20:36:58 -0800 | [diff] [blame] | 16 | #include "pmem.h" |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 17 | #include "nd.h" |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 18 | |
| 19 | static DEFINE_IDA(dimm_ida); |
| 20 | |
Dan Williams | d5d30d5 | 2019-02-02 16:35:26 -0800 | [diff] [blame] | 21 | static bool noblk; |
| 22 | module_param(noblk, bool, 0444); |
| 23 | MODULE_PARM_DESC(noblk, "force disable BLK / local alias support"); |
| 24 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 25 | /* |
| 26 | * Retrieve bus and dimm handle and return if this bus supports |
| 27 | * get_config_data commands |
| 28 | */ |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 29 | int nvdimm_check_config_data(struct device *dev) |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 30 | { |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 31 | struct nvdimm *nvdimm = to_nvdimm(dev); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 32 | |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 33 | if (!nvdimm->cmd_mask || |
| 34 | !test_bit(ND_CMD_GET_CONFIG_DATA, &nvdimm->cmd_mask)) { |
Dan Williams | 8f078b3 | 2017-05-04 14:01:24 -0700 | [diff] [blame] | 35 | if (test_bit(NDD_ALIASING, &nvdimm->flags)) |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 36 | return -ENXIO; |
| 37 | else |
| 38 | return -ENOTTY; |
| 39 | } |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 40 | |
| 41 | return 0; |
| 42 | } |
| 43 | |
| 44 | static int validate_dimm(struct nvdimm_drvdata *ndd) |
| 45 | { |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 46 | int rc; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 47 | |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 48 | if (!ndd) |
| 49 | return -EINVAL; |
| 50 | |
| 51 | rc = nvdimm_check_config_data(ndd->dev); |
| 52 | if (rc) |
Sakari Ailus | d75f773 | 2019-03-25 21:32:28 +0200 | [diff] [blame] | 53 | dev_dbg(ndd->dev, "%ps: %s error: %d\n", |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 54 | __builtin_return_address(0), __func__, rc); |
| 55 | return rc; |
| 56 | } |
| 57 | |
| 58 | /** |
| 59 | * nvdimm_init_nsarea - determine the geometry of a dimm's namespace area |
| 60 | * @nvdimm: dimm to initialize |
| 61 | */ |
| 62 | int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd) |
| 63 | { |
| 64 | struct nd_cmd_get_config_size *cmd = &ndd->nsarea; |
| 65 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
| 66 | struct nvdimm_bus_descriptor *nd_desc; |
| 67 | int rc = validate_dimm(ndd); |
Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 68 | int cmd_rc = 0; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 69 | |
| 70 | if (rc) |
| 71 | return rc; |
| 72 | |
| 73 | if (cmd->config_size) |
| 74 | return 0; /* already valid */ |
| 75 | |
| 76 | memset(cmd, 0, sizeof(*cmd)); |
| 77 | nd_desc = nvdimm_bus->nd_desc; |
Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 78 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
| 79 | ND_CMD_GET_CONFIG_SIZE, cmd, sizeof(*cmd), &cmd_rc); |
| 80 | if (rc < 0) |
| 81 | return rc; |
| 82 | return cmd_rc; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 83 | } |
| 84 | |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 85 | int nvdimm_get_config_data(struct nvdimm_drvdata *ndd, void *buf, |
| 86 | size_t offset, size_t len) |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 87 | { |
| 88 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 89 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; |
Dan Williams | e7c5a57 | 2018-04-09 12:34:24 -0700 | [diff] [blame] | 90 | int rc = validate_dimm(ndd), cmd_rc = 0; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 91 | struct nd_cmd_get_config_data_hdr *cmd; |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 92 | size_t max_cmd_size, buf_offset; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 93 | |
| 94 | if (rc) |
| 95 | return rc; |
| 96 | |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 97 | if (offset + len > ndd->nsarea.config_size) |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 98 | return -ENXIO; |
| 99 | |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 100 | max_cmd_size = min_t(u32, len, ndd->nsarea.max_xfer); |
Dan Williams | d11cf4a | 2018-10-10 16:38:24 -0700 | [diff] [blame] | 101 | cmd = kvzalloc(max_cmd_size + sizeof(*cmd), GFP_KERNEL); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 102 | if (!cmd) |
| 103 | return -ENOMEM; |
| 104 | |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 105 | for (buf_offset = 0; len; |
| 106 | len -= cmd->in_length, buf_offset += cmd->in_length) { |
| 107 | size_t cmd_size; |
| 108 | |
| 109 | cmd->in_offset = offset + buf_offset; |
| 110 | cmd->in_length = min(max_cmd_size, len); |
| 111 | |
| 112 | cmd_size = sizeof(*cmd) + cmd->in_length; |
| 113 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 114 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 115 | ND_CMD_GET_CONFIG_DATA, cmd, cmd_size, &cmd_rc); |
Dan Williams | e7c5a57 | 2018-04-09 12:34:24 -0700 | [diff] [blame] | 116 | if (rc < 0) |
| 117 | break; |
| 118 | if (cmd_rc < 0) { |
| 119 | rc = cmd_rc; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 120 | break; |
| 121 | } |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 122 | |
| 123 | /* out_buf should be valid, copy it into our output buffer */ |
| 124 | memcpy(buf + buf_offset, cmd->out_buf, cmd->in_length); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 125 | } |
Dan Williams | d11cf4a | 2018-10-10 16:38:24 -0700 | [diff] [blame] | 126 | kvfree(cmd); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 127 | |
| 128 | return rc; |
| 129 | } |
| 130 | |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 131 | int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, |
| 132 | void *buf, size_t len) |
| 133 | { |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 134 | size_t max_cmd_size, buf_offset; |
| 135 | struct nd_cmd_set_config_hdr *cmd; |
Dan Williams | e7c5a57 | 2018-04-09 12:34:24 -0700 | [diff] [blame] | 136 | int rc = validate_dimm(ndd), cmd_rc = 0; |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 137 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
| 138 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; |
| 139 | |
| 140 | if (rc) |
| 141 | return rc; |
| 142 | |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 143 | if (offset + len > ndd->nsarea.config_size) |
| 144 | return -ENXIO; |
| 145 | |
Dan Williams | d11cf4a | 2018-10-10 16:38:24 -0700 | [diff] [blame] | 146 | max_cmd_size = min_t(u32, len, ndd->nsarea.max_xfer); |
| 147 | cmd = kvzalloc(max_cmd_size + sizeof(*cmd) + sizeof(u32), GFP_KERNEL); |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 148 | if (!cmd) |
| 149 | return -ENOMEM; |
| 150 | |
| 151 | for (buf_offset = 0; len; len -= cmd->in_length, |
| 152 | buf_offset += cmd->in_length) { |
| 153 | size_t cmd_size; |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 154 | |
| 155 | cmd->in_offset = offset + buf_offset; |
| 156 | cmd->in_length = min(max_cmd_size, len); |
| 157 | memcpy(cmd->in_buf, buf + buf_offset, cmd->in_length); |
| 158 | |
| 159 | /* status is output in the last 4-bytes of the command buffer */ |
| 160 | cmd_size = sizeof(*cmd) + cmd->in_length + sizeof(u32); |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 161 | |
| 162 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
Dan Williams | e7c5a57 | 2018-04-09 12:34:24 -0700 | [diff] [blame] | 163 | ND_CMD_SET_CONFIG_DATA, cmd, cmd_size, &cmd_rc); |
| 164 | if (rc < 0) |
| 165 | break; |
| 166 | if (cmd_rc < 0) { |
| 167 | rc = cmd_rc; |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 168 | break; |
| 169 | } |
| 170 | } |
Dan Williams | d11cf4a | 2018-10-10 16:38:24 -0700 | [diff] [blame] | 171 | kvfree(cmd); |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 172 | |
| 173 | return rc; |
| 174 | } |
| 175 | |
Dan Williams | 42237e3 | 2016-10-15 15:33:52 -0700 | [diff] [blame] | 176 | void nvdimm_set_aliasing(struct device *dev) |
| 177 | { |
| 178 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 179 | |
Dan Williams | 8f078b3 | 2017-05-04 14:01:24 -0700 | [diff] [blame] | 180 | set_bit(NDD_ALIASING, &nvdimm->flags); |
| 181 | } |
| 182 | |
| 183 | void nvdimm_set_locked(struct device *dev) |
| 184 | { |
| 185 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 186 | |
| 187 | set_bit(NDD_LOCKED, &nvdimm->flags); |
Dan Williams | 42237e3 | 2016-10-15 15:33:52 -0700 | [diff] [blame] | 188 | } |
| 189 | |
Dan Williams | d34cb80 | 2017-09-25 11:01:31 -0700 | [diff] [blame] | 190 | void nvdimm_clear_locked(struct device *dev) |
| 191 | { |
| 192 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 193 | |
| 194 | clear_bit(NDD_LOCKED, &nvdimm->flags); |
| 195 | } |
| 196 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 197 | static void nvdimm_release(struct device *dev) |
| 198 | { |
| 199 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 200 | |
| 201 | ida_simple_remove(&dimm_ida, nvdimm->id); |
| 202 | kfree(nvdimm); |
| 203 | } |
| 204 | |
Dan Williams | adbb682 | 2019-11-12 17:00:24 -0800 | [diff] [blame^] | 205 | static const struct attribute_group *nvdimm_attribute_groups[] = { |
| 206 | &nd_device_attribute_group, |
| 207 | NULL, |
| 208 | }; |
| 209 | |
| 210 | static const struct device_type nvdimm_device_type = { |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 211 | .name = "nvdimm", |
| 212 | .release = nvdimm_release, |
Dan Williams | adbb682 | 2019-11-12 17:00:24 -0800 | [diff] [blame^] | 213 | .groups = nvdimm_attribute_groups, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 214 | }; |
| 215 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 216 | bool is_nvdimm(struct device *dev) |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 217 | { |
| 218 | return dev->type == &nvdimm_device_type; |
| 219 | } |
| 220 | |
| 221 | struct nvdimm *to_nvdimm(struct device *dev) |
| 222 | { |
| 223 | struct nvdimm *nvdimm = container_of(dev, struct nvdimm, dev); |
| 224 | |
| 225 | WARN_ON(!is_nvdimm(dev)); |
| 226 | return nvdimm; |
| 227 | } |
| 228 | EXPORT_SYMBOL_GPL(to_nvdimm); |
| 229 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 230 | struct nvdimm *nd_blk_region_to_dimm(struct nd_blk_region *ndbr) |
| 231 | { |
| 232 | struct nd_region *nd_region = &ndbr->nd_region; |
| 233 | struct nd_mapping *nd_mapping = &nd_region->mapping[0]; |
| 234 | |
| 235 | return nd_mapping->nvdimm; |
| 236 | } |
| 237 | EXPORT_SYMBOL_GPL(nd_blk_region_to_dimm); |
| 238 | |
Dan Williams | ca6a465 | 2017-01-13 20:36:58 -0800 | [diff] [blame] | 239 | unsigned long nd_blk_memremap_flags(struct nd_blk_region *ndbr) |
| 240 | { |
| 241 | /* pmem mapping properties are private to libnvdimm */ |
| 242 | return ARCH_MEMREMAP_PMEM; |
| 243 | } |
| 244 | EXPORT_SYMBOL_GPL(nd_blk_memremap_flags); |
| 245 | |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 246 | struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping) |
| 247 | { |
| 248 | struct nvdimm *nvdimm = nd_mapping->nvdimm; |
| 249 | |
| 250 | WARN_ON_ONCE(!is_nvdimm_bus_locked(&nvdimm->dev)); |
| 251 | |
| 252 | return dev_get_drvdata(&nvdimm->dev); |
| 253 | } |
| 254 | EXPORT_SYMBOL(to_ndd); |
| 255 | |
| 256 | void nvdimm_drvdata_release(struct kref *kref) |
| 257 | { |
| 258 | struct nvdimm_drvdata *ndd = container_of(kref, typeof(*ndd), kref); |
| 259 | struct device *dev = ndd->dev; |
| 260 | struct resource *res, *_r; |
| 261 | |
Dan Williams | 426824d | 2018-03-05 16:39:31 -0800 | [diff] [blame] | 262 | dev_dbg(dev, "trace\n"); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 263 | nvdimm_bus_lock(dev); |
| 264 | for_each_dpa_resource_safe(ndd, res, _r) |
| 265 | nvdimm_free_dpa(ndd, res); |
| 266 | nvdimm_bus_unlock(dev); |
| 267 | |
yalin wang | a06a757 | 2015-08-27 19:35:48 -0400 | [diff] [blame] | 268 | kvfree(ndd->data); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 269 | kfree(ndd); |
| 270 | put_device(dev); |
| 271 | } |
| 272 | |
| 273 | void get_ndd(struct nvdimm_drvdata *ndd) |
| 274 | { |
| 275 | kref_get(&ndd->kref); |
| 276 | } |
| 277 | |
| 278 | void put_ndd(struct nvdimm_drvdata *ndd) |
| 279 | { |
| 280 | if (ndd) |
| 281 | kref_put(&ndd->kref, nvdimm_drvdata_release); |
| 282 | } |
| 283 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 284 | const char *nvdimm_name(struct nvdimm *nvdimm) |
| 285 | { |
| 286 | return dev_name(&nvdimm->dev); |
| 287 | } |
| 288 | EXPORT_SYMBOL_GPL(nvdimm_name); |
| 289 | |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 290 | struct kobject *nvdimm_kobj(struct nvdimm *nvdimm) |
| 291 | { |
| 292 | return &nvdimm->dev.kobj; |
| 293 | } |
| 294 | EXPORT_SYMBOL_GPL(nvdimm_kobj); |
| 295 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 296 | unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm) |
| 297 | { |
| 298 | return nvdimm->cmd_mask; |
| 299 | } |
| 300 | EXPORT_SYMBOL_GPL(nvdimm_cmd_mask); |
| 301 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 302 | void *nvdimm_provider_data(struct nvdimm *nvdimm) |
| 303 | { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 304 | if (nvdimm) |
| 305 | return nvdimm->provider_data; |
| 306 | return NULL; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 307 | } |
| 308 | EXPORT_SYMBOL_GPL(nvdimm_provider_data); |
| 309 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 310 | static ssize_t commands_show(struct device *dev, |
| 311 | struct device_attribute *attr, char *buf) |
| 312 | { |
| 313 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 314 | int cmd, len = 0; |
| 315 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 316 | if (!nvdimm->cmd_mask) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 317 | return sprintf(buf, "\n"); |
| 318 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 319 | for_each_set_bit(cmd, &nvdimm->cmd_mask, BITS_PER_LONG) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 320 | len += sprintf(buf + len, "%s ", nvdimm_cmd_name(cmd)); |
| 321 | len += sprintf(buf + len, "\n"); |
| 322 | return len; |
| 323 | } |
| 324 | static DEVICE_ATTR_RO(commands); |
| 325 | |
Dan Williams | efbf6f5 | 2017-09-25 10:24:26 -0700 | [diff] [blame] | 326 | static ssize_t flags_show(struct device *dev, |
| 327 | struct device_attribute *attr, char *buf) |
| 328 | { |
| 329 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 330 | |
| 331 | return sprintf(buf, "%s%s\n", |
| 332 | test_bit(NDD_ALIASING, &nvdimm->flags) ? "alias " : "", |
| 333 | test_bit(NDD_LOCKED, &nvdimm->flags) ? "lock " : ""); |
| 334 | } |
| 335 | static DEVICE_ATTR_RO(flags); |
| 336 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 337 | static ssize_t state_show(struct device *dev, struct device_attribute *attr, |
| 338 | char *buf) |
| 339 | { |
| 340 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 341 | |
| 342 | /* |
| 343 | * The state may be in the process of changing, userspace should |
| 344 | * quiesce probing if it wants a static answer |
| 345 | */ |
| 346 | nvdimm_bus_lock(dev); |
| 347 | nvdimm_bus_unlock(dev); |
| 348 | return sprintf(buf, "%s\n", atomic_read(&nvdimm->busy) |
| 349 | ? "active" : "idle"); |
| 350 | } |
| 351 | static DEVICE_ATTR_RO(state); |
| 352 | |
Dan Williams | 0ba1c63 | 2015-05-30 12:35:36 -0400 | [diff] [blame] | 353 | static ssize_t available_slots_show(struct device *dev, |
| 354 | struct device_attribute *attr, char *buf) |
| 355 | { |
| 356 | struct nvdimm_drvdata *ndd = dev_get_drvdata(dev); |
| 357 | ssize_t rc; |
| 358 | u32 nfree; |
| 359 | |
| 360 | if (!ndd) |
| 361 | return -ENXIO; |
| 362 | |
| 363 | nvdimm_bus_lock(dev); |
| 364 | nfree = nd_label_nfree(ndd); |
| 365 | if (nfree - 1 > nfree) { |
| 366 | dev_WARN_ONCE(dev, 1, "we ate our last label?\n"); |
| 367 | nfree = 0; |
| 368 | } else |
| 369 | nfree--; |
| 370 | rc = sprintf(buf, "%d\n", nfree); |
| 371 | nvdimm_bus_unlock(dev); |
| 372 | return rc; |
| 373 | } |
| 374 | static DEVICE_ATTR_RO(available_slots); |
| 375 | |
Dave Jiang | 3c13e2a | 2018-12-10 13:20:42 -0700 | [diff] [blame] | 376 | __weak ssize_t security_show(struct device *dev, |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 377 | struct device_attribute *attr, char *buf) |
| 378 | { |
| 379 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 380 | |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 381 | if (test_bit(NVDIMM_SECURITY_DISABLED, &nvdimm->sec.flags)) |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 382 | return sprintf(buf, "disabled\n"); |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 383 | if (test_bit(NVDIMM_SECURITY_UNLOCKED, &nvdimm->sec.flags)) |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 384 | return sprintf(buf, "unlocked\n"); |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 385 | if (test_bit(NVDIMM_SECURITY_LOCKED, &nvdimm->sec.flags)) |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 386 | return sprintf(buf, "locked\n"); |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 387 | if (test_bit(NVDIMM_SECURITY_OVERWRITE, &nvdimm->sec.flags)) |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 388 | return sprintf(buf, "overwrite\n"); |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 389 | return -ENOTTY; |
| 390 | } |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 391 | |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 392 | static ssize_t frozen_show(struct device *dev, |
| 393 | struct device_attribute *attr, char *buf) |
| 394 | { |
| 395 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 396 | |
| 397 | return sprintf(buf, "%d\n", test_bit(NVDIMM_SECURITY_FROZEN, |
| 398 | &nvdimm->sec.flags)); |
| 399 | } |
| 400 | static DEVICE_ATTR_RO(frozen); |
| 401 | |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 402 | static ssize_t security_store(struct device *dev, |
| 403 | struct device_attribute *attr, const char *buf, size_t len) |
| 404 | |
| 405 | { |
| 406 | ssize_t rc; |
| 407 | |
| 408 | /* |
| 409 | * Require all userspace triggered security management to be |
| 410 | * done while probing is idle and the DIMM is not in active use |
| 411 | * in any region. |
| 412 | */ |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 413 | nd_device_lock(dev); |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 414 | nvdimm_bus_lock(dev); |
| 415 | wait_nvdimm_bus_probe_idle(dev); |
Dan Williams | 7b60422 | 2019-08-26 17:55:05 -0700 | [diff] [blame] | 416 | rc = nvdimm_security_store(dev, buf, len); |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 417 | nvdimm_bus_unlock(dev); |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 418 | nd_device_unlock(dev); |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 419 | |
| 420 | return rc; |
| 421 | } |
| 422 | static DEVICE_ATTR_RW(security); |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 423 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 424 | static struct attribute *nvdimm_attributes[] = { |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 425 | &dev_attr_state.attr, |
Dan Williams | efbf6f5 | 2017-09-25 10:24:26 -0700 | [diff] [blame] | 426 | &dev_attr_flags.attr, |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 427 | &dev_attr_commands.attr, |
Dan Williams | 0ba1c63 | 2015-05-30 12:35:36 -0400 | [diff] [blame] | 428 | &dev_attr_available_slots.attr, |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 429 | &dev_attr_security.attr, |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 430 | &dev_attr_frozen.attr, |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 431 | NULL, |
| 432 | }; |
| 433 | |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 434 | static umode_t nvdimm_visible(struct kobject *kobj, struct attribute *a, int n) |
| 435 | { |
| 436 | struct device *dev = container_of(kobj, typeof(*dev), kobj); |
| 437 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 438 | |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 439 | if (a != &dev_attr_security.attr && a != &dev_attr_frozen.attr) |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 440 | return a->mode; |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 441 | if (!nvdimm->sec.flags) |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 442 | return 0; |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 443 | |
| 444 | if (a == &dev_attr_security.attr) { |
| 445 | /* Are there any state mutation ops (make writable)? */ |
| 446 | if (nvdimm->sec.ops->freeze || nvdimm->sec.ops->disable |
| 447 | || nvdimm->sec.ops->change_key |
| 448 | || nvdimm->sec.ops->erase |
| 449 | || nvdimm->sec.ops->overwrite) |
| 450 | return a->mode; |
| 451 | return 0444; |
| 452 | } |
| 453 | |
| 454 | if (nvdimm->sec.ops->freeze) |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 455 | return a->mode; |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 456 | return 0; |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 457 | } |
| 458 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 459 | struct attribute_group nvdimm_attribute_group = { |
| 460 | .attrs = nvdimm_attributes, |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 461 | .is_visible = nvdimm_visible, |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 462 | }; |
| 463 | EXPORT_SYMBOL_GPL(nvdimm_attribute_group); |
| 464 | |
Dave Jiang | d6548ae | 2018-12-04 10:31:20 -0800 | [diff] [blame] | 465 | struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus, |
| 466 | void *provider_data, const struct attribute_group **groups, |
| 467 | unsigned long flags, unsigned long cmd_mask, int num_flush, |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 468 | struct resource *flush_wpq, const char *dimm_id, |
| 469 | const struct nvdimm_security_ops *sec_ops) |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 470 | { |
| 471 | struct nvdimm *nvdimm = kzalloc(sizeof(*nvdimm), GFP_KERNEL); |
| 472 | struct device *dev; |
| 473 | |
| 474 | if (!nvdimm) |
| 475 | return NULL; |
| 476 | |
| 477 | nvdimm->id = ida_simple_get(&dimm_ida, 0, 0, GFP_KERNEL); |
| 478 | if (nvdimm->id < 0) { |
| 479 | kfree(nvdimm); |
| 480 | return NULL; |
| 481 | } |
Dave Jiang | d6548ae | 2018-12-04 10:31:20 -0800 | [diff] [blame] | 482 | |
| 483 | nvdimm->dimm_id = dimm_id; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 484 | nvdimm->provider_data = provider_data; |
Dan Williams | d5d30d5 | 2019-02-02 16:35:26 -0800 | [diff] [blame] | 485 | if (noblk) |
| 486 | flags |= 1 << NDD_NOBLK; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 487 | nvdimm->flags = flags; |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 488 | nvdimm->cmd_mask = cmd_mask; |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 489 | nvdimm->num_flush = num_flush; |
| 490 | nvdimm->flush_wpq = flush_wpq; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 491 | atomic_set(&nvdimm->busy, 0); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 492 | dev = &nvdimm->dev; |
| 493 | dev_set_name(dev, "nmem%d", nvdimm->id); |
| 494 | dev->parent = &nvdimm_bus->dev; |
| 495 | dev->type = &nvdimm_device_type; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 496 | dev->devt = MKDEV(nvdimm_major, nvdimm->id); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 497 | dev->groups = groups; |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 498 | nvdimm->sec.ops = sec_ops; |
Dave Jiang | 7d98809 | 2018-12-13 15:36:18 -0700 | [diff] [blame] | 499 | nvdimm->sec.overwrite_tmo = 0; |
| 500 | INIT_DELAYED_WORK(&nvdimm->dwork, nvdimm_security_overwrite_query); |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 501 | /* |
| 502 | * Security state must be initialized before device_add() for |
| 503 | * attribute visibility. |
| 504 | */ |
Dave Jiang | 89fa9d8 | 2018-12-10 10:53:22 -0700 | [diff] [blame] | 505 | /* get security state and extended (master) state */ |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 506 | nvdimm->sec.flags = nvdimm_security_flags(nvdimm, NVDIMM_USER); |
| 507 | nvdimm->sec.ext_flags = nvdimm_security_flags(nvdimm, NVDIMM_MASTER); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 508 | nd_device_register(dev); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 509 | |
| 510 | return nvdimm; |
| 511 | } |
Dave Jiang | d6548ae | 2018-12-04 10:31:20 -0800 | [diff] [blame] | 512 | EXPORT_SYMBOL_GPL(__nvdimm_create); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 513 | |
Dan Williams | 1cd7386 | 2019-01-19 08:45:56 -0800 | [diff] [blame] | 514 | static void shutdown_security_notify(void *data) |
Dave Jiang | 7d98809 | 2018-12-13 15:36:18 -0700 | [diff] [blame] | 515 | { |
Dan Williams | 1cd7386 | 2019-01-19 08:45:56 -0800 | [diff] [blame] | 516 | struct nvdimm *nvdimm = data; |
| 517 | |
| 518 | sysfs_put(nvdimm->sec.overwrite_state); |
| 519 | } |
| 520 | |
| 521 | int nvdimm_security_setup_events(struct device *dev) |
| 522 | { |
| 523 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 524 | |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 525 | if (!nvdimm->sec.flags || !nvdimm->sec.ops |
Dan Williams | 1cd7386 | 2019-01-19 08:45:56 -0800 | [diff] [blame] | 526 | || !nvdimm->sec.ops->overwrite) |
| 527 | return 0; |
| 528 | nvdimm->sec.overwrite_state = sysfs_get_dirent(dev->kobj.sd, "security"); |
Dave Jiang | 7d98809 | 2018-12-13 15:36:18 -0700 | [diff] [blame] | 529 | if (!nvdimm->sec.overwrite_state) |
Dan Williams | 1cd7386 | 2019-01-19 08:45:56 -0800 | [diff] [blame] | 530 | return -ENOMEM; |
| 531 | |
| 532 | return devm_add_action_or_reset(dev, shutdown_security_notify, nvdimm); |
Dave Jiang | 7d98809 | 2018-12-13 15:36:18 -0700 | [diff] [blame] | 533 | } |
| 534 | EXPORT_SYMBOL_GPL(nvdimm_security_setup_events); |
| 535 | |
| 536 | int nvdimm_in_overwrite(struct nvdimm *nvdimm) |
| 537 | { |
| 538 | return test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags); |
| 539 | } |
| 540 | EXPORT_SYMBOL_GPL(nvdimm_in_overwrite); |
| 541 | |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 542 | int nvdimm_security_freeze(struct nvdimm *nvdimm) |
| 543 | { |
| 544 | int rc; |
| 545 | |
| 546 | WARN_ON_ONCE(!is_nvdimm_bus_locked(&nvdimm->dev)); |
| 547 | |
| 548 | if (!nvdimm->sec.ops || !nvdimm->sec.ops->freeze) |
| 549 | return -EOPNOTSUPP; |
| 550 | |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 551 | if (!nvdimm->sec.flags) |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 552 | return -EIO; |
| 553 | |
Dave Jiang | 7d98809 | 2018-12-13 15:36:18 -0700 | [diff] [blame] | 554 | if (test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags)) { |
| 555 | dev_warn(&nvdimm->dev, "Overwrite operation in progress.\n"); |
| 556 | return -EBUSY; |
| 557 | } |
| 558 | |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 559 | rc = nvdimm->sec.ops->freeze(nvdimm); |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 560 | nvdimm->sec.flags = nvdimm_security_flags(nvdimm, NVDIMM_USER); |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 561 | |
| 562 | return rc; |
| 563 | } |
| 564 | |
Dan Williams | 762d067 | 2016-10-04 16:09:59 -0700 | [diff] [blame] | 565 | int alias_dpa_busy(struct device *dev, void *data) |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 566 | { |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 567 | resource_size_t map_end, blk_start, new; |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 568 | struct blk_alloc_info *info = data; |
| 569 | struct nd_mapping *nd_mapping; |
| 570 | struct nd_region *nd_region; |
| 571 | struct nvdimm_drvdata *ndd; |
| 572 | struct resource *res; |
| 573 | int i; |
| 574 | |
Dan Williams | c9e582a | 2017-05-29 23:12:19 -0700 | [diff] [blame] | 575 | if (!is_memory(dev)) |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 576 | return 0; |
| 577 | |
| 578 | nd_region = to_nd_region(dev); |
| 579 | for (i = 0; i < nd_region->ndr_mappings; i++) { |
| 580 | nd_mapping = &nd_region->mapping[i]; |
| 581 | if (nd_mapping->nvdimm == info->nd_mapping->nvdimm) |
| 582 | break; |
| 583 | } |
| 584 | |
| 585 | if (i >= nd_region->ndr_mappings) |
| 586 | return 0; |
| 587 | |
| 588 | ndd = to_ndd(nd_mapping); |
| 589 | map_end = nd_mapping->start + nd_mapping->size - 1; |
| 590 | blk_start = nd_mapping->start; |
Dan Williams | 762d067 | 2016-10-04 16:09:59 -0700 | [diff] [blame] | 591 | |
| 592 | /* |
| 593 | * In the allocation case ->res is set to free space that we are |
| 594 | * looking to validate against PMEM aliasing collision rules |
| 595 | * (i.e. BLK is allocated after all aliased PMEM). |
| 596 | */ |
| 597 | if (info->res) { |
| 598 | if (info->res->start >= nd_mapping->start |
| 599 | && info->res->start < map_end) |
| 600 | /* pass */; |
| 601 | else |
| 602 | return 0; |
| 603 | } |
| 604 | |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 605 | retry: |
| 606 | /* |
| 607 | * Find the free dpa from the end of the last pmem allocation to |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 608 | * the end of the interleave-set mapping. |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 609 | */ |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 610 | for_each_dpa_resource(ndd, res) { |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 611 | if (strncmp(res->name, "pmem", 4) != 0) |
| 612 | continue; |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 613 | if ((res->start >= blk_start && res->start < map_end) |
| 614 | || (res->end >= blk_start |
| 615 | && res->end <= map_end)) { |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 616 | new = max(blk_start, min(map_end + 1, res->end + 1)); |
| 617 | if (new != blk_start) { |
| 618 | blk_start = new; |
| 619 | goto retry; |
| 620 | } |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 621 | } |
| 622 | } |
| 623 | |
Dan Williams | 762d067 | 2016-10-04 16:09:59 -0700 | [diff] [blame] | 624 | /* update the free space range with the probed blk_start */ |
| 625 | if (info->res && blk_start > info->res->start) { |
| 626 | info->res->start = max(info->res->start, blk_start); |
| 627 | if (info->res->start > info->res->end) |
| 628 | info->res->end = info->res->start - 1; |
| 629 | return 1; |
| 630 | } |
| 631 | |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 632 | info->available -= blk_start - nd_mapping->start; |
Dan Williams | 762d067 | 2016-10-04 16:09:59 -0700 | [diff] [blame] | 633 | |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 634 | return 0; |
| 635 | } |
| 636 | |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 637 | /** |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 638 | * nd_blk_available_dpa - account the unused dpa of BLK region |
| 639 | * @nd_mapping: container of dpa-resource-root + labels |
| 640 | * |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 641 | * Unlike PMEM, BLK namespaces can occupy discontiguous DPA ranges, but |
| 642 | * we arrange for them to never start at an lower dpa than the last |
| 643 | * PMEM allocation in an aliased region. |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 644 | */ |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 645 | resource_size_t nd_blk_available_dpa(struct nd_region *nd_region) |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 646 | { |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 647 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(&nd_region->dev); |
| 648 | struct nd_mapping *nd_mapping = &nd_region->mapping[0]; |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 649 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 650 | struct blk_alloc_info info = { |
| 651 | .nd_mapping = nd_mapping, |
| 652 | .available = nd_mapping->size, |
Dan Williams | 762d067 | 2016-10-04 16:09:59 -0700 | [diff] [blame] | 653 | .res = NULL, |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 654 | }; |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 655 | struct resource *res; |
| 656 | |
| 657 | if (!ndd) |
| 658 | return 0; |
| 659 | |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 660 | device_for_each_child(&nvdimm_bus->dev, &info, alias_dpa_busy); |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 661 | |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 662 | /* now account for busy blk allocations in unaliased dpa */ |
| 663 | for_each_dpa_resource(ndd, res) { |
| 664 | if (strncmp(res->name, "blk", 3) != 0) |
| 665 | continue; |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 666 | info.available -= resource_size(res); |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 667 | } |
| 668 | |
| 669 | return info.available; |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 670 | } |
| 671 | |
| 672 | /** |
Keith Busch | 12e3129 | 2018-07-24 15:07:57 -0600 | [diff] [blame] | 673 | * nd_pmem_max_contiguous_dpa - For the given dimm+region, return the max |
| 674 | * contiguous unallocated dpa range. |
| 675 | * @nd_region: constrain available space check to this reference region |
| 676 | * @nd_mapping: container of dpa-resource-root + labels |
| 677 | */ |
| 678 | resource_size_t nd_pmem_max_contiguous_dpa(struct nd_region *nd_region, |
| 679 | struct nd_mapping *nd_mapping) |
| 680 | { |
| 681 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); |
| 682 | struct nvdimm_bus *nvdimm_bus; |
| 683 | resource_size_t max = 0; |
| 684 | struct resource *res; |
| 685 | |
| 686 | /* if a dimm is disabled the available capacity is zero */ |
| 687 | if (!ndd) |
| 688 | return 0; |
| 689 | |
| 690 | nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
| 691 | if (__reserve_free_pmem(&nd_region->dev, nd_mapping->nvdimm)) |
| 692 | return 0; |
| 693 | for_each_dpa_resource(ndd, res) { |
| 694 | if (strcmp(res->name, "pmem-reserve") != 0) |
| 695 | continue; |
| 696 | if (resource_size(res) > max) |
| 697 | max = resource_size(res); |
| 698 | } |
| 699 | release_free_pmem(nvdimm_bus, nd_mapping); |
| 700 | return max; |
| 701 | } |
| 702 | |
| 703 | /** |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 704 | * nd_pmem_available_dpa - for the given dimm+region account unallocated dpa |
| 705 | * @nd_mapping: container of dpa-resource-root + labels |
| 706 | * @nd_region: constrain available space check to this reference region |
| 707 | * @overlap: calculate available space assuming this level of overlap |
| 708 | * |
| 709 | * Validate that a PMEM label, if present, aligns with the start of an |
| 710 | * interleave set and truncate the available size at the lowest BLK |
| 711 | * overlap point. |
| 712 | * |
| 713 | * The expectation is that this routine is called multiple times as it |
| 714 | * probes for the largest BLK encroachment for any single member DIMM of |
| 715 | * the interleave set. Once that value is determined the PMEM-limit for |
| 716 | * the set can be established. |
| 717 | */ |
| 718 | resource_size_t nd_pmem_available_dpa(struct nd_region *nd_region, |
| 719 | struct nd_mapping *nd_mapping, resource_size_t *overlap) |
| 720 | { |
| 721 | resource_size_t map_start, map_end, busy = 0, available, blk_start; |
| 722 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); |
| 723 | struct resource *res; |
| 724 | const char *reason; |
| 725 | |
| 726 | if (!ndd) |
| 727 | return 0; |
| 728 | |
| 729 | map_start = nd_mapping->start; |
| 730 | map_end = map_start + nd_mapping->size - 1; |
| 731 | blk_start = max(map_start, map_end + 1 - *overlap); |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 732 | for_each_dpa_resource(ndd, res) { |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 733 | if (res->start >= map_start && res->start < map_end) { |
| 734 | if (strncmp(res->name, "blk", 3) == 0) |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 735 | blk_start = min(blk_start, |
| 736 | max(map_start, res->start)); |
| 737 | else if (res->end > map_end) { |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 738 | reason = "misaligned to iset"; |
| 739 | goto err; |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 740 | } else |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 741 | busy += resource_size(res); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 742 | } else if (res->end >= map_start && res->end <= map_end) { |
| 743 | if (strncmp(res->name, "blk", 3) == 0) { |
| 744 | /* |
| 745 | * If a BLK allocation overlaps the start of |
| 746 | * PMEM the entire interleave set may now only |
| 747 | * be used for BLK. |
| 748 | */ |
| 749 | blk_start = map_start; |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 750 | } else |
| 751 | busy += resource_size(res); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 752 | } else if (map_start > res->start && map_start < res->end) { |
| 753 | /* total eclipse of the mapping */ |
| 754 | busy += nd_mapping->size; |
| 755 | blk_start = map_start; |
| 756 | } |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 757 | } |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 758 | |
| 759 | *overlap = map_end + 1 - blk_start; |
| 760 | available = blk_start - map_start; |
| 761 | if (busy < available) |
| 762 | return available - busy; |
| 763 | return 0; |
| 764 | |
| 765 | err: |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 766 | nd_dbg_dpa(nd_region, ndd, res, "%s\n", reason); |
| 767 | return 0; |
| 768 | } |
| 769 | |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 770 | void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res) |
| 771 | { |
| 772 | WARN_ON_ONCE(!is_nvdimm_bus_locked(ndd->dev)); |
| 773 | kfree(res->name); |
| 774 | __release_region(&ndd->dpa, res->start, resource_size(res)); |
| 775 | } |
| 776 | |
| 777 | struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd, |
| 778 | struct nd_label_id *label_id, resource_size_t start, |
| 779 | resource_size_t n) |
| 780 | { |
| 781 | char *name = kmemdup(label_id, sizeof(*label_id), GFP_KERNEL); |
| 782 | struct resource *res; |
| 783 | |
| 784 | if (!name) |
| 785 | return NULL; |
| 786 | |
| 787 | WARN_ON_ONCE(!is_nvdimm_bus_locked(ndd->dev)); |
| 788 | res = __request_region(&ndd->dpa, start, n, name, 0); |
| 789 | if (!res) |
| 790 | kfree(name); |
| 791 | return res; |
| 792 | } |
| 793 | |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 794 | /** |
| 795 | * nvdimm_allocated_dpa - sum up the dpa currently allocated to this label_id |
| 796 | * @nvdimm: container of dpa-resource-root + labels |
| 797 | * @label_id: dpa resource name of the form {pmem|blk}-<human readable uuid> |
| 798 | */ |
| 799 | resource_size_t nvdimm_allocated_dpa(struct nvdimm_drvdata *ndd, |
| 800 | struct nd_label_id *label_id) |
| 801 | { |
| 802 | resource_size_t allocated = 0; |
| 803 | struct resource *res; |
| 804 | |
| 805 | for_each_dpa_resource(ndd, res) |
| 806 | if (strcmp(res->name, label_id->id) == 0) |
| 807 | allocated += resource_size(res); |
| 808 | |
| 809 | return allocated; |
| 810 | } |
| 811 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 812 | static int count_dimms(struct device *dev, void *c) |
| 813 | { |
| 814 | int *count = c; |
| 815 | |
| 816 | if (is_nvdimm(dev)) |
| 817 | (*count)++; |
| 818 | return 0; |
| 819 | } |
| 820 | |
| 821 | int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count) |
| 822 | { |
| 823 | int count = 0; |
| 824 | /* Flush any possible dimm registration failures */ |
| 825 | nd_synchronize(); |
| 826 | |
| 827 | device_for_each_child(&nvdimm_bus->dev, &count, count_dimms); |
Dan Williams | 426824d | 2018-03-05 16:39:31 -0800 | [diff] [blame] | 828 | dev_dbg(&nvdimm_bus->dev, "count: %d\n", count); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 829 | if (count != dimm_count) |
| 830 | return -ENXIO; |
| 831 | return 0; |
| 832 | } |
| 833 | EXPORT_SYMBOL_GPL(nvdimm_bus_check_dimm_count); |
Dan Williams | b354aba | 2016-05-17 20:24:16 -0700 | [diff] [blame] | 834 | |
| 835 | void __exit nvdimm_devs_exit(void) |
| 836 | { |
| 837 | ida_destroy(&dimm_ida); |
| 838 | } |