Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of version 2 of the GNU General Public License as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, but |
| 9 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 11 | * General Public License for more details. |
| 12 | */ |
| 13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 14 | #include <linux/vmalloc.h> |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 15 | #include <linux/device.h> |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 16 | #include <linux/ndctl.h> |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 17 | #include <linux/slab.h> |
| 18 | #include <linux/io.h> |
| 19 | #include <linux/fs.h> |
| 20 | #include <linux/mm.h> |
| 21 | #include "nd-core.h" |
Dan Williams | 0ba1c63 | 2015-05-30 12:35:36 -0400 | [diff] [blame] | 22 | #include "label.h" |
Dan Williams | ca6a465 | 2017-01-13 20:36:58 -0800 | [diff] [blame] | 23 | #include "pmem.h" |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 24 | #include "nd.h" |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 25 | |
| 26 | static DEFINE_IDA(dimm_ida); |
| 27 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 28 | /* |
| 29 | * Retrieve bus and dimm handle and return if this bus supports |
| 30 | * get_config_data commands |
| 31 | */ |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 32 | int nvdimm_check_config_data(struct device *dev) |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 33 | { |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 34 | struct nvdimm *nvdimm = to_nvdimm(dev); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 35 | |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 36 | if (!nvdimm->cmd_mask || |
| 37 | !test_bit(ND_CMD_GET_CONFIG_DATA, &nvdimm->cmd_mask)) { |
Dan Williams | 8f078b3 | 2017-05-04 14:01:24 -0700 | [diff] [blame] | 38 | if (test_bit(NDD_ALIASING, &nvdimm->flags)) |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 39 | return -ENXIO; |
| 40 | else |
| 41 | return -ENOTTY; |
| 42 | } |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 43 | |
| 44 | return 0; |
| 45 | } |
| 46 | |
| 47 | static int validate_dimm(struct nvdimm_drvdata *ndd) |
| 48 | { |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 49 | int rc; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 50 | |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 51 | if (!ndd) |
| 52 | return -EINVAL; |
| 53 | |
| 54 | rc = nvdimm_check_config_data(ndd->dev); |
| 55 | if (rc) |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 56 | dev_dbg(ndd->dev, "%pf: %s error: %d\n", |
| 57 | __builtin_return_address(0), __func__, rc); |
| 58 | return rc; |
| 59 | } |
| 60 | |
| 61 | /** |
| 62 | * nvdimm_init_nsarea - determine the geometry of a dimm's namespace area |
| 63 | * @nvdimm: dimm to initialize |
| 64 | */ |
| 65 | int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd) |
| 66 | { |
| 67 | struct nd_cmd_get_config_size *cmd = &ndd->nsarea; |
| 68 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
| 69 | struct nvdimm_bus_descriptor *nd_desc; |
| 70 | int rc = validate_dimm(ndd); |
Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 71 | int cmd_rc = 0; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 72 | |
| 73 | if (rc) |
| 74 | return rc; |
| 75 | |
| 76 | if (cmd->config_size) |
| 77 | return 0; /* already valid */ |
| 78 | |
| 79 | memset(cmd, 0, sizeof(*cmd)); |
| 80 | nd_desc = nvdimm_bus->nd_desc; |
Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 81 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
| 82 | ND_CMD_GET_CONFIG_SIZE, cmd, sizeof(*cmd), &cmd_rc); |
| 83 | if (rc < 0) |
| 84 | return rc; |
| 85 | return cmd_rc; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 86 | } |
| 87 | |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 88 | int nvdimm_get_config_data(struct nvdimm_drvdata *ndd, void *buf, |
| 89 | size_t offset, size_t len) |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 90 | { |
| 91 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 92 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; |
Dan Williams | e7c5a57 | 2018-04-09 12:34:24 -0700 | [diff] [blame] | 93 | int rc = validate_dimm(ndd), cmd_rc = 0; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 94 | struct nd_cmd_get_config_data_hdr *cmd; |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 95 | size_t max_cmd_size, buf_offset; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 96 | |
| 97 | if (rc) |
| 98 | return rc; |
| 99 | |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 100 | if (offset + len > ndd->nsarea.config_size) |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 101 | return -ENXIO; |
| 102 | |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 103 | max_cmd_size = min_t(u32, len, ndd->nsarea.max_xfer); |
Dan Williams | d11cf4a | 2018-10-10 16:38:24 -0700 | [diff] [blame] | 104 | cmd = kvzalloc(max_cmd_size + sizeof(*cmd), GFP_KERNEL); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 105 | if (!cmd) |
| 106 | return -ENOMEM; |
| 107 | |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 108 | for (buf_offset = 0; len; |
| 109 | len -= cmd->in_length, buf_offset += cmd->in_length) { |
| 110 | size_t cmd_size; |
| 111 | |
| 112 | cmd->in_offset = offset + buf_offset; |
| 113 | cmd->in_length = min(max_cmd_size, len); |
| 114 | |
| 115 | cmd_size = sizeof(*cmd) + cmd->in_length; |
| 116 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 117 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 118 | ND_CMD_GET_CONFIG_DATA, cmd, cmd_size, &cmd_rc); |
Dan Williams | e7c5a57 | 2018-04-09 12:34:24 -0700 | [diff] [blame] | 119 | if (rc < 0) |
| 120 | break; |
| 121 | if (cmd_rc < 0) { |
| 122 | rc = cmd_rc; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 123 | break; |
| 124 | } |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 125 | |
| 126 | /* out_buf should be valid, copy it into our output buffer */ |
| 127 | memcpy(buf + buf_offset, cmd->out_buf, cmd->in_length); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 128 | } |
Dan Williams | d11cf4a | 2018-10-10 16:38:24 -0700 | [diff] [blame] | 129 | kvfree(cmd); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 130 | |
| 131 | return rc; |
| 132 | } |
| 133 | |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 134 | int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, |
| 135 | void *buf, size_t len) |
| 136 | { |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 137 | size_t max_cmd_size, buf_offset; |
| 138 | struct nd_cmd_set_config_hdr *cmd; |
Dan Williams | e7c5a57 | 2018-04-09 12:34:24 -0700 | [diff] [blame] | 139 | int rc = validate_dimm(ndd), cmd_rc = 0; |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 140 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
| 141 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; |
| 142 | |
| 143 | if (rc) |
| 144 | return rc; |
| 145 | |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 146 | if (offset + len > ndd->nsarea.config_size) |
| 147 | return -ENXIO; |
| 148 | |
Dan Williams | d11cf4a | 2018-10-10 16:38:24 -0700 | [diff] [blame] | 149 | max_cmd_size = min_t(u32, len, ndd->nsarea.max_xfer); |
| 150 | cmd = kvzalloc(max_cmd_size + sizeof(*cmd) + sizeof(u32), GFP_KERNEL); |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 151 | if (!cmd) |
| 152 | return -ENOMEM; |
| 153 | |
| 154 | for (buf_offset = 0; len; len -= cmd->in_length, |
| 155 | buf_offset += cmd->in_length) { |
| 156 | size_t cmd_size; |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 157 | |
| 158 | cmd->in_offset = offset + buf_offset; |
| 159 | cmd->in_length = min(max_cmd_size, len); |
| 160 | memcpy(cmd->in_buf, buf + buf_offset, cmd->in_length); |
| 161 | |
| 162 | /* status is output in the last 4-bytes of the command buffer */ |
| 163 | cmd_size = sizeof(*cmd) + cmd->in_length + sizeof(u32); |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 164 | |
| 165 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
Dan Williams | e7c5a57 | 2018-04-09 12:34:24 -0700 | [diff] [blame] | 166 | ND_CMD_SET_CONFIG_DATA, cmd, cmd_size, &cmd_rc); |
| 167 | if (rc < 0) |
| 168 | break; |
| 169 | if (cmd_rc < 0) { |
| 170 | rc = cmd_rc; |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 171 | break; |
| 172 | } |
| 173 | } |
Dan Williams | d11cf4a | 2018-10-10 16:38:24 -0700 | [diff] [blame] | 174 | kvfree(cmd); |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 175 | |
| 176 | return rc; |
| 177 | } |
| 178 | |
Dan Williams | 42237e3 | 2016-10-15 15:33:52 -0700 | [diff] [blame] | 179 | void nvdimm_set_aliasing(struct device *dev) |
| 180 | { |
| 181 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 182 | |
Dan Williams | 8f078b3 | 2017-05-04 14:01:24 -0700 | [diff] [blame] | 183 | set_bit(NDD_ALIASING, &nvdimm->flags); |
| 184 | } |
| 185 | |
| 186 | void nvdimm_set_locked(struct device *dev) |
| 187 | { |
| 188 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 189 | |
| 190 | set_bit(NDD_LOCKED, &nvdimm->flags); |
Dan Williams | 42237e3 | 2016-10-15 15:33:52 -0700 | [diff] [blame] | 191 | } |
| 192 | |
Dan Williams | d34cb80 | 2017-09-25 11:01:31 -0700 | [diff] [blame] | 193 | void nvdimm_clear_locked(struct device *dev) |
| 194 | { |
| 195 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 196 | |
| 197 | clear_bit(NDD_LOCKED, &nvdimm->flags); |
| 198 | } |
| 199 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 200 | static void nvdimm_release(struct device *dev) |
| 201 | { |
| 202 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 203 | |
| 204 | ida_simple_remove(&dimm_ida, nvdimm->id); |
| 205 | kfree(nvdimm); |
| 206 | } |
| 207 | |
| 208 | static struct device_type nvdimm_device_type = { |
| 209 | .name = "nvdimm", |
| 210 | .release = nvdimm_release, |
| 211 | }; |
| 212 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 213 | bool is_nvdimm(struct device *dev) |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 214 | { |
| 215 | return dev->type == &nvdimm_device_type; |
| 216 | } |
| 217 | |
| 218 | struct nvdimm *to_nvdimm(struct device *dev) |
| 219 | { |
| 220 | struct nvdimm *nvdimm = container_of(dev, struct nvdimm, dev); |
| 221 | |
| 222 | WARN_ON(!is_nvdimm(dev)); |
| 223 | return nvdimm; |
| 224 | } |
| 225 | EXPORT_SYMBOL_GPL(to_nvdimm); |
| 226 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 227 | struct nvdimm *nd_blk_region_to_dimm(struct nd_blk_region *ndbr) |
| 228 | { |
| 229 | struct nd_region *nd_region = &ndbr->nd_region; |
| 230 | struct nd_mapping *nd_mapping = &nd_region->mapping[0]; |
| 231 | |
| 232 | return nd_mapping->nvdimm; |
| 233 | } |
| 234 | EXPORT_SYMBOL_GPL(nd_blk_region_to_dimm); |
| 235 | |
Dan Williams | ca6a465 | 2017-01-13 20:36:58 -0800 | [diff] [blame] | 236 | unsigned long nd_blk_memremap_flags(struct nd_blk_region *ndbr) |
| 237 | { |
| 238 | /* pmem mapping properties are private to libnvdimm */ |
| 239 | return ARCH_MEMREMAP_PMEM; |
| 240 | } |
| 241 | EXPORT_SYMBOL_GPL(nd_blk_memremap_flags); |
| 242 | |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 243 | struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping) |
| 244 | { |
| 245 | struct nvdimm *nvdimm = nd_mapping->nvdimm; |
| 246 | |
| 247 | WARN_ON_ONCE(!is_nvdimm_bus_locked(&nvdimm->dev)); |
| 248 | |
| 249 | return dev_get_drvdata(&nvdimm->dev); |
| 250 | } |
| 251 | EXPORT_SYMBOL(to_ndd); |
| 252 | |
| 253 | void nvdimm_drvdata_release(struct kref *kref) |
| 254 | { |
| 255 | struct nvdimm_drvdata *ndd = container_of(kref, typeof(*ndd), kref); |
| 256 | struct device *dev = ndd->dev; |
| 257 | struct resource *res, *_r; |
| 258 | |
Dan Williams | 426824d | 2018-03-05 16:39:31 -0800 | [diff] [blame] | 259 | dev_dbg(dev, "trace\n"); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 260 | nvdimm_bus_lock(dev); |
| 261 | for_each_dpa_resource_safe(ndd, res, _r) |
| 262 | nvdimm_free_dpa(ndd, res); |
| 263 | nvdimm_bus_unlock(dev); |
| 264 | |
yalin wang | a06a757 | 2015-08-27 19:35:48 -0400 | [diff] [blame] | 265 | kvfree(ndd->data); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 266 | kfree(ndd); |
| 267 | put_device(dev); |
| 268 | } |
| 269 | |
| 270 | void get_ndd(struct nvdimm_drvdata *ndd) |
| 271 | { |
| 272 | kref_get(&ndd->kref); |
| 273 | } |
| 274 | |
| 275 | void put_ndd(struct nvdimm_drvdata *ndd) |
| 276 | { |
| 277 | if (ndd) |
| 278 | kref_put(&ndd->kref, nvdimm_drvdata_release); |
| 279 | } |
| 280 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 281 | const char *nvdimm_name(struct nvdimm *nvdimm) |
| 282 | { |
| 283 | return dev_name(&nvdimm->dev); |
| 284 | } |
| 285 | EXPORT_SYMBOL_GPL(nvdimm_name); |
| 286 | |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 287 | struct kobject *nvdimm_kobj(struct nvdimm *nvdimm) |
| 288 | { |
| 289 | return &nvdimm->dev.kobj; |
| 290 | } |
| 291 | EXPORT_SYMBOL_GPL(nvdimm_kobj); |
| 292 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 293 | unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm) |
| 294 | { |
| 295 | return nvdimm->cmd_mask; |
| 296 | } |
| 297 | EXPORT_SYMBOL_GPL(nvdimm_cmd_mask); |
| 298 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 299 | void *nvdimm_provider_data(struct nvdimm *nvdimm) |
| 300 | { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 301 | if (nvdimm) |
| 302 | return nvdimm->provider_data; |
| 303 | return NULL; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 304 | } |
| 305 | EXPORT_SYMBOL_GPL(nvdimm_provider_data); |
| 306 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 307 | static ssize_t commands_show(struct device *dev, |
| 308 | struct device_attribute *attr, char *buf) |
| 309 | { |
| 310 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 311 | int cmd, len = 0; |
| 312 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 313 | if (!nvdimm->cmd_mask) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 314 | return sprintf(buf, "\n"); |
| 315 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 316 | for_each_set_bit(cmd, &nvdimm->cmd_mask, BITS_PER_LONG) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 317 | len += sprintf(buf + len, "%s ", nvdimm_cmd_name(cmd)); |
| 318 | len += sprintf(buf + len, "\n"); |
| 319 | return len; |
| 320 | } |
| 321 | static DEVICE_ATTR_RO(commands); |
| 322 | |
Dan Williams | efbf6f5 | 2017-09-25 10:24:26 -0700 | [diff] [blame] | 323 | static ssize_t flags_show(struct device *dev, |
| 324 | struct device_attribute *attr, char *buf) |
| 325 | { |
| 326 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 327 | |
| 328 | return sprintf(buf, "%s%s\n", |
| 329 | test_bit(NDD_ALIASING, &nvdimm->flags) ? "alias " : "", |
| 330 | test_bit(NDD_LOCKED, &nvdimm->flags) ? "lock " : ""); |
| 331 | } |
| 332 | static DEVICE_ATTR_RO(flags); |
| 333 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 334 | static ssize_t state_show(struct device *dev, struct device_attribute *attr, |
| 335 | char *buf) |
| 336 | { |
| 337 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 338 | |
| 339 | /* |
| 340 | * The state may be in the process of changing, userspace should |
| 341 | * quiesce probing if it wants a static answer |
| 342 | */ |
| 343 | nvdimm_bus_lock(dev); |
| 344 | nvdimm_bus_unlock(dev); |
| 345 | return sprintf(buf, "%s\n", atomic_read(&nvdimm->busy) |
| 346 | ? "active" : "idle"); |
| 347 | } |
| 348 | static DEVICE_ATTR_RO(state); |
| 349 | |
Dan Williams | 0ba1c63 | 2015-05-30 12:35:36 -0400 | [diff] [blame] | 350 | static ssize_t available_slots_show(struct device *dev, |
| 351 | struct device_attribute *attr, char *buf) |
| 352 | { |
| 353 | struct nvdimm_drvdata *ndd = dev_get_drvdata(dev); |
| 354 | ssize_t rc; |
| 355 | u32 nfree; |
| 356 | |
| 357 | if (!ndd) |
| 358 | return -ENXIO; |
| 359 | |
| 360 | nvdimm_bus_lock(dev); |
| 361 | nfree = nd_label_nfree(ndd); |
| 362 | if (nfree - 1 > nfree) { |
| 363 | dev_WARN_ONCE(dev, 1, "we ate our last label?\n"); |
| 364 | nfree = 0; |
| 365 | } else |
| 366 | nfree--; |
| 367 | rc = sprintf(buf, "%d\n", nfree); |
| 368 | nvdimm_bus_unlock(dev); |
| 369 | return rc; |
| 370 | } |
| 371 | static DEVICE_ATTR_RO(available_slots); |
| 372 | |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 373 | static ssize_t security_show(struct device *dev, |
| 374 | struct device_attribute *attr, char *buf) |
| 375 | { |
| 376 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 377 | |
| 378 | switch (nvdimm->sec.state) { |
| 379 | case NVDIMM_SECURITY_DISABLED: |
| 380 | return sprintf(buf, "disabled\n"); |
| 381 | case NVDIMM_SECURITY_UNLOCKED: |
| 382 | return sprintf(buf, "unlocked\n"); |
| 383 | case NVDIMM_SECURITY_LOCKED: |
| 384 | return sprintf(buf, "locked\n"); |
| 385 | case NVDIMM_SECURITY_FROZEN: |
| 386 | return sprintf(buf, "frozen\n"); |
| 387 | case NVDIMM_SECURITY_OVERWRITE: |
| 388 | return sprintf(buf, "overwrite\n"); |
| 389 | } |
| 390 | |
| 391 | return -ENOTTY; |
| 392 | } |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame^] | 393 | |
| 394 | static ssize_t __security_store(struct device *dev, const char *buf, size_t len) |
| 395 | { |
| 396 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 397 | ssize_t rc; |
| 398 | |
| 399 | if (atomic_read(&nvdimm->busy)) |
| 400 | return -EBUSY; |
| 401 | |
| 402 | if (sysfs_streq(buf, "freeze")) { |
| 403 | dev_dbg(dev, "freeze\n"); |
| 404 | rc = nvdimm_security_freeze(nvdimm); |
| 405 | } else |
| 406 | return -EINVAL; |
| 407 | |
| 408 | if (rc == 0) |
| 409 | rc = len; |
| 410 | return rc; |
| 411 | |
| 412 | } |
| 413 | |
| 414 | static ssize_t security_store(struct device *dev, |
| 415 | struct device_attribute *attr, const char *buf, size_t len) |
| 416 | |
| 417 | { |
| 418 | ssize_t rc; |
| 419 | |
| 420 | /* |
| 421 | * Require all userspace triggered security management to be |
| 422 | * done while probing is idle and the DIMM is not in active use |
| 423 | * in any region. |
| 424 | */ |
| 425 | device_lock(dev); |
| 426 | nvdimm_bus_lock(dev); |
| 427 | wait_nvdimm_bus_probe_idle(dev); |
| 428 | rc = __security_store(dev, buf, len); |
| 429 | nvdimm_bus_unlock(dev); |
| 430 | device_unlock(dev); |
| 431 | |
| 432 | return rc; |
| 433 | } |
| 434 | static DEVICE_ATTR_RW(security); |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 435 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 436 | static struct attribute *nvdimm_attributes[] = { |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 437 | &dev_attr_state.attr, |
Dan Williams | efbf6f5 | 2017-09-25 10:24:26 -0700 | [diff] [blame] | 438 | &dev_attr_flags.attr, |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 439 | &dev_attr_commands.attr, |
Dan Williams | 0ba1c63 | 2015-05-30 12:35:36 -0400 | [diff] [blame] | 440 | &dev_attr_available_slots.attr, |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 441 | &dev_attr_security.attr, |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 442 | NULL, |
| 443 | }; |
| 444 | |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 445 | static umode_t nvdimm_visible(struct kobject *kobj, struct attribute *a, int n) |
| 446 | { |
| 447 | struct device *dev = container_of(kobj, typeof(*dev), kobj); |
| 448 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 449 | |
| 450 | if (a != &dev_attr_security.attr) |
| 451 | return a->mode; |
| 452 | if (nvdimm->sec.state < 0) |
| 453 | return 0; |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame^] | 454 | /* Are there any state mutation ops? */ |
| 455 | if (nvdimm->sec.ops->freeze) |
| 456 | return a->mode; |
| 457 | return 0444; |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 458 | } |
| 459 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 460 | struct attribute_group nvdimm_attribute_group = { |
| 461 | .attrs = nvdimm_attributes, |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 462 | .is_visible = nvdimm_visible, |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 463 | }; |
| 464 | EXPORT_SYMBOL_GPL(nvdimm_attribute_group); |
| 465 | |
Dave Jiang | d6548ae | 2018-12-04 10:31:20 -0800 | [diff] [blame] | 466 | struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus, |
| 467 | void *provider_data, const struct attribute_group **groups, |
| 468 | unsigned long flags, unsigned long cmd_mask, int num_flush, |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 469 | struct resource *flush_wpq, const char *dimm_id, |
| 470 | const struct nvdimm_security_ops *sec_ops) |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 471 | { |
| 472 | struct nvdimm *nvdimm = kzalloc(sizeof(*nvdimm), GFP_KERNEL); |
| 473 | struct device *dev; |
| 474 | |
| 475 | if (!nvdimm) |
| 476 | return NULL; |
| 477 | |
| 478 | nvdimm->id = ida_simple_get(&dimm_ida, 0, 0, GFP_KERNEL); |
| 479 | if (nvdimm->id < 0) { |
| 480 | kfree(nvdimm); |
| 481 | return NULL; |
| 482 | } |
Dave Jiang | d6548ae | 2018-12-04 10:31:20 -0800 | [diff] [blame] | 483 | |
| 484 | nvdimm->dimm_id = dimm_id; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 485 | nvdimm->provider_data = provider_data; |
| 486 | nvdimm->flags = flags; |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 487 | nvdimm->cmd_mask = cmd_mask; |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 488 | nvdimm->num_flush = num_flush; |
| 489 | nvdimm->flush_wpq = flush_wpq; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 490 | atomic_set(&nvdimm->busy, 0); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 491 | dev = &nvdimm->dev; |
| 492 | dev_set_name(dev, "nmem%d", nvdimm->id); |
| 493 | dev->parent = &nvdimm_bus->dev; |
| 494 | dev->type = &nvdimm_device_type; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 495 | dev->devt = MKDEV(nvdimm_major, nvdimm->id); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 496 | dev->groups = groups; |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 497 | nvdimm->sec.ops = sec_ops; |
| 498 | /* |
| 499 | * Security state must be initialized before device_add() for |
| 500 | * attribute visibility. |
| 501 | */ |
| 502 | nvdimm->sec.state = nvdimm_security_state(nvdimm); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 503 | nd_device_register(dev); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 504 | |
| 505 | return nvdimm; |
| 506 | } |
Dave Jiang | d6548ae | 2018-12-04 10:31:20 -0800 | [diff] [blame] | 507 | EXPORT_SYMBOL_GPL(__nvdimm_create); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 508 | |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame^] | 509 | int nvdimm_security_freeze(struct nvdimm *nvdimm) |
| 510 | { |
| 511 | int rc; |
| 512 | |
| 513 | WARN_ON_ONCE(!is_nvdimm_bus_locked(&nvdimm->dev)); |
| 514 | |
| 515 | if (!nvdimm->sec.ops || !nvdimm->sec.ops->freeze) |
| 516 | return -EOPNOTSUPP; |
| 517 | |
| 518 | if (nvdimm->sec.state < 0) |
| 519 | return -EIO; |
| 520 | |
| 521 | rc = nvdimm->sec.ops->freeze(nvdimm); |
| 522 | nvdimm->sec.state = nvdimm_security_state(nvdimm); |
| 523 | |
| 524 | return rc; |
| 525 | } |
| 526 | |
Dan Williams | 762d067 | 2016-10-04 16:09:59 -0700 | [diff] [blame] | 527 | int alias_dpa_busy(struct device *dev, void *data) |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 528 | { |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 529 | resource_size_t map_end, blk_start, new; |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 530 | struct blk_alloc_info *info = data; |
| 531 | struct nd_mapping *nd_mapping; |
| 532 | struct nd_region *nd_region; |
| 533 | struct nvdimm_drvdata *ndd; |
| 534 | struct resource *res; |
| 535 | int i; |
| 536 | |
Dan Williams | c9e582a | 2017-05-29 23:12:19 -0700 | [diff] [blame] | 537 | if (!is_memory(dev)) |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 538 | return 0; |
| 539 | |
| 540 | nd_region = to_nd_region(dev); |
| 541 | for (i = 0; i < nd_region->ndr_mappings; i++) { |
| 542 | nd_mapping = &nd_region->mapping[i]; |
| 543 | if (nd_mapping->nvdimm == info->nd_mapping->nvdimm) |
| 544 | break; |
| 545 | } |
| 546 | |
| 547 | if (i >= nd_region->ndr_mappings) |
| 548 | return 0; |
| 549 | |
| 550 | ndd = to_ndd(nd_mapping); |
| 551 | map_end = nd_mapping->start + nd_mapping->size - 1; |
| 552 | blk_start = nd_mapping->start; |
Dan Williams | 762d067 | 2016-10-04 16:09:59 -0700 | [diff] [blame] | 553 | |
| 554 | /* |
| 555 | * In the allocation case ->res is set to free space that we are |
| 556 | * looking to validate against PMEM aliasing collision rules |
| 557 | * (i.e. BLK is allocated after all aliased PMEM). |
| 558 | */ |
| 559 | if (info->res) { |
| 560 | if (info->res->start >= nd_mapping->start |
| 561 | && info->res->start < map_end) |
| 562 | /* pass */; |
| 563 | else |
| 564 | return 0; |
| 565 | } |
| 566 | |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 567 | retry: |
| 568 | /* |
| 569 | * Find the free dpa from the end of the last pmem allocation to |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 570 | * the end of the interleave-set mapping. |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 571 | */ |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 572 | for_each_dpa_resource(ndd, res) { |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 573 | if (strncmp(res->name, "pmem", 4) != 0) |
| 574 | continue; |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 575 | if ((res->start >= blk_start && res->start < map_end) |
| 576 | || (res->end >= blk_start |
| 577 | && res->end <= map_end)) { |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 578 | new = max(blk_start, min(map_end + 1, res->end + 1)); |
| 579 | if (new != blk_start) { |
| 580 | blk_start = new; |
| 581 | goto retry; |
| 582 | } |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 583 | } |
| 584 | } |
| 585 | |
Dan Williams | 762d067 | 2016-10-04 16:09:59 -0700 | [diff] [blame] | 586 | /* update the free space range with the probed blk_start */ |
| 587 | if (info->res && blk_start > info->res->start) { |
| 588 | info->res->start = max(info->res->start, blk_start); |
| 589 | if (info->res->start > info->res->end) |
| 590 | info->res->end = info->res->start - 1; |
| 591 | return 1; |
| 592 | } |
| 593 | |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 594 | info->available -= blk_start - nd_mapping->start; |
Dan Williams | 762d067 | 2016-10-04 16:09:59 -0700 | [diff] [blame] | 595 | |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 596 | return 0; |
| 597 | } |
| 598 | |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 599 | /** |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 600 | * nd_blk_available_dpa - account the unused dpa of BLK region |
| 601 | * @nd_mapping: container of dpa-resource-root + labels |
| 602 | * |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 603 | * Unlike PMEM, BLK namespaces can occupy discontiguous DPA ranges, but |
| 604 | * we arrange for them to never start at an lower dpa than the last |
| 605 | * PMEM allocation in an aliased region. |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 606 | */ |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 607 | resource_size_t nd_blk_available_dpa(struct nd_region *nd_region) |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 608 | { |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 609 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(&nd_region->dev); |
| 610 | struct nd_mapping *nd_mapping = &nd_region->mapping[0]; |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 611 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 612 | struct blk_alloc_info info = { |
| 613 | .nd_mapping = nd_mapping, |
| 614 | .available = nd_mapping->size, |
Dan Williams | 762d067 | 2016-10-04 16:09:59 -0700 | [diff] [blame] | 615 | .res = NULL, |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 616 | }; |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 617 | struct resource *res; |
| 618 | |
| 619 | if (!ndd) |
| 620 | return 0; |
| 621 | |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 622 | device_for_each_child(&nvdimm_bus->dev, &info, alias_dpa_busy); |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 623 | |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 624 | /* now account for busy blk allocations in unaliased dpa */ |
| 625 | for_each_dpa_resource(ndd, res) { |
| 626 | if (strncmp(res->name, "blk", 3) != 0) |
| 627 | continue; |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 628 | info.available -= resource_size(res); |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 629 | } |
| 630 | |
| 631 | return info.available; |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 632 | } |
| 633 | |
| 634 | /** |
Keith Busch | 12e3129 | 2018-07-24 15:07:57 -0600 | [diff] [blame] | 635 | * nd_pmem_max_contiguous_dpa - For the given dimm+region, return the max |
| 636 | * contiguous unallocated dpa range. |
| 637 | * @nd_region: constrain available space check to this reference region |
| 638 | * @nd_mapping: container of dpa-resource-root + labels |
| 639 | */ |
| 640 | resource_size_t nd_pmem_max_contiguous_dpa(struct nd_region *nd_region, |
| 641 | struct nd_mapping *nd_mapping) |
| 642 | { |
| 643 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); |
| 644 | struct nvdimm_bus *nvdimm_bus; |
| 645 | resource_size_t max = 0; |
| 646 | struct resource *res; |
| 647 | |
| 648 | /* if a dimm is disabled the available capacity is zero */ |
| 649 | if (!ndd) |
| 650 | return 0; |
| 651 | |
| 652 | nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
| 653 | if (__reserve_free_pmem(&nd_region->dev, nd_mapping->nvdimm)) |
| 654 | return 0; |
| 655 | for_each_dpa_resource(ndd, res) { |
| 656 | if (strcmp(res->name, "pmem-reserve") != 0) |
| 657 | continue; |
| 658 | if (resource_size(res) > max) |
| 659 | max = resource_size(res); |
| 660 | } |
| 661 | release_free_pmem(nvdimm_bus, nd_mapping); |
| 662 | return max; |
| 663 | } |
| 664 | |
| 665 | /** |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 666 | * nd_pmem_available_dpa - for the given dimm+region account unallocated dpa |
| 667 | * @nd_mapping: container of dpa-resource-root + labels |
| 668 | * @nd_region: constrain available space check to this reference region |
| 669 | * @overlap: calculate available space assuming this level of overlap |
| 670 | * |
| 671 | * Validate that a PMEM label, if present, aligns with the start of an |
| 672 | * interleave set and truncate the available size at the lowest BLK |
| 673 | * overlap point. |
| 674 | * |
| 675 | * The expectation is that this routine is called multiple times as it |
| 676 | * probes for the largest BLK encroachment for any single member DIMM of |
| 677 | * the interleave set. Once that value is determined the PMEM-limit for |
| 678 | * the set can be established. |
| 679 | */ |
| 680 | resource_size_t nd_pmem_available_dpa(struct nd_region *nd_region, |
| 681 | struct nd_mapping *nd_mapping, resource_size_t *overlap) |
| 682 | { |
| 683 | resource_size_t map_start, map_end, busy = 0, available, blk_start; |
| 684 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); |
| 685 | struct resource *res; |
| 686 | const char *reason; |
| 687 | |
| 688 | if (!ndd) |
| 689 | return 0; |
| 690 | |
| 691 | map_start = nd_mapping->start; |
| 692 | map_end = map_start + nd_mapping->size - 1; |
| 693 | blk_start = max(map_start, map_end + 1 - *overlap); |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 694 | for_each_dpa_resource(ndd, res) { |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 695 | if (res->start >= map_start && res->start < map_end) { |
| 696 | if (strncmp(res->name, "blk", 3) == 0) |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 697 | blk_start = min(blk_start, |
| 698 | max(map_start, res->start)); |
| 699 | else if (res->end > map_end) { |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 700 | reason = "misaligned to iset"; |
| 701 | goto err; |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 702 | } else |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 703 | busy += resource_size(res); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 704 | } else if (res->end >= map_start && res->end <= map_end) { |
| 705 | if (strncmp(res->name, "blk", 3) == 0) { |
| 706 | /* |
| 707 | * If a BLK allocation overlaps the start of |
| 708 | * PMEM the entire interleave set may now only |
| 709 | * be used for BLK. |
| 710 | */ |
| 711 | blk_start = map_start; |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 712 | } else |
| 713 | busy += resource_size(res); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 714 | } else if (map_start > res->start && map_start < res->end) { |
| 715 | /* total eclipse of the mapping */ |
| 716 | busy += nd_mapping->size; |
| 717 | blk_start = map_start; |
| 718 | } |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 719 | } |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 720 | |
| 721 | *overlap = map_end + 1 - blk_start; |
| 722 | available = blk_start - map_start; |
| 723 | if (busy < available) |
| 724 | return available - busy; |
| 725 | return 0; |
| 726 | |
| 727 | err: |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 728 | nd_dbg_dpa(nd_region, ndd, res, "%s\n", reason); |
| 729 | return 0; |
| 730 | } |
| 731 | |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 732 | void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res) |
| 733 | { |
| 734 | WARN_ON_ONCE(!is_nvdimm_bus_locked(ndd->dev)); |
| 735 | kfree(res->name); |
| 736 | __release_region(&ndd->dpa, res->start, resource_size(res)); |
| 737 | } |
| 738 | |
| 739 | struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd, |
| 740 | struct nd_label_id *label_id, resource_size_t start, |
| 741 | resource_size_t n) |
| 742 | { |
| 743 | char *name = kmemdup(label_id, sizeof(*label_id), GFP_KERNEL); |
| 744 | struct resource *res; |
| 745 | |
| 746 | if (!name) |
| 747 | return NULL; |
| 748 | |
| 749 | WARN_ON_ONCE(!is_nvdimm_bus_locked(ndd->dev)); |
| 750 | res = __request_region(&ndd->dpa, start, n, name, 0); |
| 751 | if (!res) |
| 752 | kfree(name); |
| 753 | return res; |
| 754 | } |
| 755 | |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 756 | /** |
| 757 | * nvdimm_allocated_dpa - sum up the dpa currently allocated to this label_id |
| 758 | * @nvdimm: container of dpa-resource-root + labels |
| 759 | * @label_id: dpa resource name of the form {pmem|blk}-<human readable uuid> |
| 760 | */ |
| 761 | resource_size_t nvdimm_allocated_dpa(struct nvdimm_drvdata *ndd, |
| 762 | struct nd_label_id *label_id) |
| 763 | { |
| 764 | resource_size_t allocated = 0; |
| 765 | struct resource *res; |
| 766 | |
| 767 | for_each_dpa_resource(ndd, res) |
| 768 | if (strcmp(res->name, label_id->id) == 0) |
| 769 | allocated += resource_size(res); |
| 770 | |
| 771 | return allocated; |
| 772 | } |
| 773 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 774 | static int count_dimms(struct device *dev, void *c) |
| 775 | { |
| 776 | int *count = c; |
| 777 | |
| 778 | if (is_nvdimm(dev)) |
| 779 | (*count)++; |
| 780 | return 0; |
| 781 | } |
| 782 | |
| 783 | int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count) |
| 784 | { |
| 785 | int count = 0; |
| 786 | /* Flush any possible dimm registration failures */ |
| 787 | nd_synchronize(); |
| 788 | |
| 789 | device_for_each_child(&nvdimm_bus->dev, &count, count_dimms); |
Dan Williams | 426824d | 2018-03-05 16:39:31 -0800 | [diff] [blame] | 790 | dev_dbg(&nvdimm_bus->dev, "count: %d\n", count); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 791 | if (count != dimm_count) |
| 792 | return -ENXIO; |
| 793 | return 0; |
| 794 | } |
| 795 | EXPORT_SYMBOL_GPL(nvdimm_bus_check_dimm_count); |
Dan Williams | b354aba | 2016-05-17 20:24:16 -0700 | [diff] [blame] | 796 | |
| 797 | void __exit nvdimm_devs_exit(void) |
| 798 | { |
| 799 | ida_destroy(&dimm_ida); |
| 800 | } |