blob: 4f4e703d1b147e7a0b7869e1cb5928da52deb645 [file] [log] [blame]
Chris Wilson688e6c72016-07-01 17:23:15 +01001/*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
Chris Wilsonc81d4612016-07-01 17:23:25 +010025#include <linux/kthread.h>
26
Chris Wilson688e6c72016-07-01 17:23:15 +010027#include "i915_drv.h"
28
Chris Wilson2246bea2017-02-17 15:13:00 +000029static unsigned long wait_timeout(void)
30{
31 return round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES);
32}
33
Chris Wilson83348ba2016-08-09 17:47:51 +010034static void intel_breadcrumbs_hangcheck(unsigned long data)
35{
36 struct intel_engine_cs *engine = (struct intel_engine_cs *)data;
37 struct intel_breadcrumbs *b = &engine->breadcrumbs;
38
39 if (!b->irq_enabled)
40 return;
41
Chris Wilson2246bea2017-02-17 15:13:00 +000042 if (b->hangcheck_interrupts != atomic_read(&engine->irq_count)) {
43 b->hangcheck_interrupts = atomic_read(&engine->irq_count);
44 mod_timer(&b->hangcheck, wait_timeout());
Chris Wilson83348ba2016-08-09 17:47:51 +010045 return;
46 }
47
Chris Wilson89985672017-02-17 15:13:02 +000048 /* If the waiter was currently running, assume it hasn't had a chance
49 * to process the pending interrupt (e.g, low priority task on a loaded
50 * system) and wait until it sleeps before declaring a missed interrupt.
51 */
52 if (!intel_engine_wakeup(engine)) {
53 mod_timer(&b->hangcheck, wait_timeout());
54 return;
55 }
56
Chris Wilson83348ba2016-08-09 17:47:51 +010057 DRM_DEBUG("Hangcheck timer elapsed... %s idle\n", engine->name);
58 set_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
59 mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
60
61 /* Ensure that even if the GPU hangs, we get woken up.
62 *
63 * However, note that if no one is waiting, we never notice
64 * a gpu hang. Eventually, we will have to wait for a resource
65 * held by the GPU and so trigger a hangcheck. In the most
66 * pathological case, this will be upon memory starvation! To
67 * prevent this, we also queue the hangcheck from the retire
68 * worker.
69 */
70 i915_queue_hangcheck(engine->i915);
71}
72
Chris Wilson688e6c72016-07-01 17:23:15 +010073static void intel_breadcrumbs_fake_irq(unsigned long data)
74{
75 struct intel_engine_cs *engine = (struct intel_engine_cs *)data;
76
77 /*
78 * The timer persists in case we cannot enable interrupts,
79 * or if we have previously seen seqno/interrupt incoherency
80 * ("missed interrupt" syndrome). Here the worker will wake up
81 * every jiffie in order to kick the oldest waiter to do the
82 * coherent seqno check.
83 */
Chris Wilson688e6c72016-07-01 17:23:15 +010084 if (intel_engine_wakeup(engine))
85 mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
Chris Wilson688e6c72016-07-01 17:23:15 +010086}
87
88static void irq_enable(struct intel_engine_cs *engine)
89{
Chris Wilson3d5564e2016-07-01 17:23:23 +010090 /* Enabling the IRQ may miss the generation of the interrupt, but
91 * we still need to force the barrier before reading the seqno,
92 * just in case.
93 */
Chris Wilson538b2572017-01-24 15:18:05 +000094 set_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
Chris Wilson31bb59c2016-07-01 17:23:27 +010095
Chris Wilsonf6168e32016-10-28 13:58:55 +010096 /* Caller disables interrupts */
97 spin_lock(&engine->i915->irq_lock);
Chris Wilson31bb59c2016-07-01 17:23:27 +010098 engine->irq_enable(engine);
Chris Wilsonf6168e32016-10-28 13:58:55 +010099 spin_unlock(&engine->i915->irq_lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100100}
101
102static void irq_disable(struct intel_engine_cs *engine)
103{
Chris Wilsonf6168e32016-10-28 13:58:55 +0100104 /* Caller disables interrupts */
105 spin_lock(&engine->i915->irq_lock);
Chris Wilson31bb59c2016-07-01 17:23:27 +0100106 engine->irq_disable(engine);
Chris Wilsonf6168e32016-10-28 13:58:55 +0100107 spin_unlock(&engine->i915->irq_lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100108}
109
Chris Wilson6ef98ea2017-02-17 15:13:03 +0000110static bool use_fake_irq(const struct intel_breadcrumbs *b)
111{
112 const struct intel_engine_cs *engine =
113 container_of(b, struct intel_engine_cs, breadcrumbs);
114
115 if (!test_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings))
116 return false;
117
118 /* Only start with the heavy weight fake irq timer if we have not
119 * seen any interrupts since enabling it the first time. If the
120 * interrupts are still arriving, it means we made a mistake in our
121 * engine->seqno_barrier(), a timing error that should be transient
122 * and unlikely to reoccur.
123 */
124 return atomic_read(&engine->irq_count) == b->hangcheck_interrupts;
125}
126
Chris Wilson04171312016-07-06 12:39:00 +0100127static void __intel_breadcrumbs_enable_irq(struct intel_breadcrumbs *b)
Chris Wilson688e6c72016-07-01 17:23:15 +0100128{
129 struct intel_engine_cs *engine =
130 container_of(b, struct intel_engine_cs, breadcrumbs);
131 struct drm_i915_private *i915 = engine->i915;
Chris Wilson688e6c72016-07-01 17:23:15 +0100132
133 assert_spin_locked(&b->lock);
134 if (b->rpm_wakelock)
Chris Wilson04171312016-07-06 12:39:00 +0100135 return;
Chris Wilson688e6c72016-07-01 17:23:15 +0100136
Chris Wilsonf97fbf92017-02-13 17:15:14 +0000137 if (I915_SELFTEST_ONLY(b->mock)) {
138 /* For our mock objects we want to avoid interaction
139 * with the real hardware (which is not set up). So
140 * we simply pretend we have enabled the powerwell
141 * and the irq, and leave it up to the mock
142 * implementation to call intel_engine_wakeup()
143 * itself when it wants to simulate a user interrupt,
144 */
145 b->rpm_wakelock = true;
146 return;
147 }
148
Chris Wilson688e6c72016-07-01 17:23:15 +0100149 /* Since we are waiting on a request, the GPU should be busy
150 * and should have its own rpm reference. For completeness,
151 * record an rpm reference for ourselves to cover the
152 * interrupt we unmask.
153 */
154 intel_runtime_pm_get_noresume(i915);
155 b->rpm_wakelock = true;
156
157 /* No interrupts? Kick the waiter every jiffie! */
158 if (intel_irqs_enabled(i915)) {
Chris Wilson3d5564e2016-07-01 17:23:23 +0100159 if (!test_bit(engine->id, &i915->gpu_error.test_irq_rings))
Chris Wilson688e6c72016-07-01 17:23:15 +0100160 irq_enable(engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100161 b->irq_enabled = true;
162 }
163
Chris Wilson6ef98ea2017-02-17 15:13:03 +0000164 if (!b->irq_enabled || use_fake_irq(b)) {
Chris Wilson688e6c72016-07-01 17:23:15 +0100165 mod_timer(&b->fake_irq, jiffies + 1);
Chris Wilson2f1ac9c2017-01-23 09:37:24 +0000166 i915_queue_hangcheck(i915);
Chris Wilson83348ba2016-08-09 17:47:51 +0100167 } else {
168 /* Ensure we never sleep indefinitely */
Chris Wilson2246bea2017-02-17 15:13:00 +0000169 mod_timer(&b->hangcheck, wait_timeout());
Chris Wilson83348ba2016-08-09 17:47:51 +0100170 }
Chris Wilson688e6c72016-07-01 17:23:15 +0100171}
172
173static void __intel_breadcrumbs_disable_irq(struct intel_breadcrumbs *b)
174{
175 struct intel_engine_cs *engine =
176 container_of(b, struct intel_engine_cs, breadcrumbs);
177
178 assert_spin_locked(&b->lock);
179 if (!b->rpm_wakelock)
180 return;
181
Chris Wilsonf97fbf92017-02-13 17:15:14 +0000182 if (I915_SELFTEST_ONLY(b->mock)) {
183 b->rpm_wakelock = false;
184 return;
185 }
186
Chris Wilson688e6c72016-07-01 17:23:15 +0100187 if (b->irq_enabled) {
188 irq_disable(engine);
189 b->irq_enabled = false;
190 }
191
192 intel_runtime_pm_put(engine->i915);
193 b->rpm_wakelock = false;
194}
195
196static inline struct intel_wait *to_wait(struct rb_node *node)
197{
Chris Wilsond8567862016-12-20 10:40:03 +0000198 return rb_entry(node, struct intel_wait, node);
Chris Wilson688e6c72016-07-01 17:23:15 +0100199}
200
201static inline void __intel_breadcrumbs_finish(struct intel_breadcrumbs *b,
202 struct intel_wait *wait)
203{
204 assert_spin_locked(&b->lock);
205
206 /* This request is completed, so remove it from the tree, mark it as
207 * complete, and *then* wake up the associated task.
208 */
209 rb_erase(&wait->node, &b->waiters);
210 RB_CLEAR_NODE(&wait->node);
211
212 wake_up_process(wait->tsk); /* implicit smp_wmb() */
213}
214
215static bool __intel_engine_add_wait(struct intel_engine_cs *engine,
216 struct intel_wait *wait)
217{
218 struct intel_breadcrumbs *b = &engine->breadcrumbs;
219 struct rb_node **p, *parent, *completed;
220 bool first;
221 u32 seqno;
222
223 /* Insert the request into the retirement ordered list
224 * of waiters by walking the rbtree. If we are the oldest
225 * seqno in the tree (the first to be retired), then
226 * set ourselves as the bottom-half.
227 *
228 * As we descend the tree, prune completed branches since we hold the
229 * spinlock we know that the first_waiter must be delayed and can
230 * reduce some of the sequential wake up latency if we take action
231 * ourselves and wake up the completed tasks in parallel. Also, by
232 * removing stale elements in the tree, we may be able to reduce the
233 * ping-pong between the old bottom-half and ourselves as first-waiter.
234 */
235 first = true;
236 parent = NULL;
237 completed = NULL;
Chris Wilson1b7744e2016-07-01 17:23:17 +0100238 seqno = intel_engine_get_seqno(engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100239
240 /* If the request completed before we managed to grab the spinlock,
241 * return now before adding ourselves to the rbtree. We let the
242 * current bottom-half handle any pending wakeups and instead
243 * try and get out of the way quickly.
244 */
245 if (i915_seqno_passed(seqno, wait->seqno)) {
246 RB_CLEAR_NODE(&wait->node);
247 return first;
248 }
249
250 p = &b->waiters.rb_node;
251 while (*p) {
252 parent = *p;
253 if (wait->seqno == to_wait(parent)->seqno) {
254 /* We have multiple waiters on the same seqno, select
255 * the highest priority task (that with the smallest
256 * task->prio) to serve as the bottom-half for this
257 * group.
258 */
259 if (wait->tsk->prio > to_wait(parent)->tsk->prio) {
260 p = &parent->rb_right;
261 first = false;
262 } else {
263 p = &parent->rb_left;
264 }
265 } else if (i915_seqno_passed(wait->seqno,
266 to_wait(parent)->seqno)) {
267 p = &parent->rb_right;
268 if (i915_seqno_passed(seqno, to_wait(parent)->seqno))
269 completed = parent;
270 else
271 first = false;
272 } else {
273 p = &parent->rb_left;
274 }
275 }
276 rb_link_node(&wait->node, parent, p);
277 rb_insert_color(&wait->node, &b->waiters);
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100278 GEM_BUG_ON(!first && !rcu_access_pointer(b->irq_seqno_bh));
Chris Wilson688e6c72016-07-01 17:23:15 +0100279
280 if (completed) {
281 struct rb_node *next = rb_next(completed);
282
283 GEM_BUG_ON(!next && !first);
284 if (next && next != &wait->node) {
285 GEM_BUG_ON(first);
286 b->first_wait = to_wait(next);
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100287 rcu_assign_pointer(b->irq_seqno_bh, b->first_wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100288 /* As there is a delay between reading the current
289 * seqno, processing the completed tasks and selecting
290 * the next waiter, we may have missed the interrupt
291 * and so need for the next bottom-half to wakeup.
292 *
293 * Also as we enable the IRQ, we may miss the
294 * interrupt for that seqno, so we have to wake up
295 * the next bottom-half in order to do a coherent check
296 * in case the seqno passed.
297 */
298 __intel_breadcrumbs_enable_irq(b);
Chris Wilson538b2572017-01-24 15:18:05 +0000299 if (test_bit(ENGINE_IRQ_BREADCRUMB,
300 &engine->irq_posted))
Chris Wilson3d5564e2016-07-01 17:23:23 +0100301 wake_up_process(to_wait(next)->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100302 }
303
304 do {
305 struct intel_wait *crumb = to_wait(completed);
306 completed = rb_prev(completed);
307 __intel_breadcrumbs_finish(b, crumb);
308 } while (completed);
309 }
310
311 if (first) {
312 GEM_BUG_ON(rb_first(&b->waiters) != &wait->node);
313 b->first_wait = wait;
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100314 rcu_assign_pointer(b->irq_seqno_bh, wait->tsk);
Chris Wilson04171312016-07-06 12:39:00 +0100315 /* After assigning ourselves as the new bottom-half, we must
316 * perform a cursory check to prevent a missed interrupt.
317 * Either we miss the interrupt whilst programming the hardware,
318 * or if there was a previous waiter (for a later seqno) they
319 * may be woken instead of us (due to the inherent race
Chris Wilsonaca34b62016-07-06 12:39:02 +0100320 * in the unlocked read of b->irq_seqno_bh in the irq handler)
321 * and so we miss the wake up.
Chris Wilson04171312016-07-06 12:39:00 +0100322 */
323 __intel_breadcrumbs_enable_irq(b);
Chris Wilson688e6c72016-07-01 17:23:15 +0100324 }
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100325 GEM_BUG_ON(!rcu_access_pointer(b->irq_seqno_bh));
Chris Wilson688e6c72016-07-01 17:23:15 +0100326 GEM_BUG_ON(!b->first_wait);
327 GEM_BUG_ON(rb_first(&b->waiters) != &b->first_wait->node);
328
329 return first;
330}
331
332bool intel_engine_add_wait(struct intel_engine_cs *engine,
333 struct intel_wait *wait)
334{
335 struct intel_breadcrumbs *b = &engine->breadcrumbs;
336 bool first;
337
Chris Wilsonf6168e32016-10-28 13:58:55 +0100338 spin_lock_irq(&b->lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100339 first = __intel_engine_add_wait(engine, wait);
Chris Wilsonf6168e32016-10-28 13:58:55 +0100340 spin_unlock_irq(&b->lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100341
342 return first;
343}
344
Chris Wilson688e6c72016-07-01 17:23:15 +0100345static inline bool chain_wakeup(struct rb_node *rb, int priority)
346{
347 return rb && to_wait(rb)->tsk->prio <= priority;
348}
349
Chris Wilsonc81d4612016-07-01 17:23:25 +0100350static inline int wakeup_priority(struct intel_breadcrumbs *b,
351 struct task_struct *tsk)
352{
353 if (tsk == b->signaler)
354 return INT_MIN;
355 else
356 return tsk->prio;
357}
358
Chris Wilson688e6c72016-07-01 17:23:15 +0100359void intel_engine_remove_wait(struct intel_engine_cs *engine,
360 struct intel_wait *wait)
361{
362 struct intel_breadcrumbs *b = &engine->breadcrumbs;
363
364 /* Quick check to see if this waiter was already decoupled from
365 * the tree by the bottom-half to avoid contention on the spinlock
366 * by the herd.
367 */
368 if (RB_EMPTY_NODE(&wait->node))
369 return;
370
Chris Wilsonf6168e32016-10-28 13:58:55 +0100371 spin_lock_irq(&b->lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100372
373 if (RB_EMPTY_NODE(&wait->node))
374 goto out_unlock;
375
376 if (b->first_wait == wait) {
Chris Wilsonc81d4612016-07-01 17:23:25 +0100377 const int priority = wakeup_priority(b, wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100378 struct rb_node *next;
Chris Wilson688e6c72016-07-01 17:23:15 +0100379
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100380 GEM_BUG_ON(rcu_access_pointer(b->irq_seqno_bh) != wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100381
382 /* We are the current bottom-half. Find the next candidate,
383 * the first waiter in the queue on the remaining oldest
384 * request. As multiple seqnos may complete in the time it
385 * takes us to wake up and find the next waiter, we have to
386 * wake up that waiter for it to perform its own coherent
387 * completion check.
388 */
389 next = rb_next(&wait->node);
390 if (chain_wakeup(next, priority)) {
391 /* If the next waiter is already complete,
392 * wake it up and continue onto the next waiter. So
393 * if have a small herd, they will wake up in parallel
394 * rather than sequentially, which should reduce
395 * the overall latency in waking all the completed
396 * clients.
397 *
398 * However, waking up a chain adds extra latency to
399 * the first_waiter. This is undesirable if that
400 * waiter is a high priority task.
401 */
Chris Wilson1b7744e2016-07-01 17:23:17 +0100402 u32 seqno = intel_engine_get_seqno(engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100403
404 while (i915_seqno_passed(seqno, to_wait(next)->seqno)) {
405 struct rb_node *n = rb_next(next);
406
407 __intel_breadcrumbs_finish(b, to_wait(next));
408 next = n;
409 if (!chain_wakeup(next, priority))
410 break;
411 }
412 }
413
414 if (next) {
415 /* In our haste, we may have completed the first waiter
416 * before we enabled the interrupt. Do so now as we
417 * have a second waiter for a future seqno. Afterwards,
418 * we have to wake up that waiter in case we missed
419 * the interrupt, or if we have to handle an
420 * exception rather than a seqno completion.
421 */
422 b->first_wait = to_wait(next);
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100423 rcu_assign_pointer(b->irq_seqno_bh, b->first_wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100424 if (b->first_wait->seqno != wait->seqno)
425 __intel_breadcrumbs_enable_irq(b);
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100426 wake_up_process(b->first_wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100427 } else {
428 b->first_wait = NULL;
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100429 rcu_assign_pointer(b->irq_seqno_bh, NULL);
Chris Wilson688e6c72016-07-01 17:23:15 +0100430 __intel_breadcrumbs_disable_irq(b);
431 }
432 } else {
433 GEM_BUG_ON(rb_first(&b->waiters) == &wait->node);
434 }
435
436 GEM_BUG_ON(RB_EMPTY_NODE(&wait->node));
437 rb_erase(&wait->node, &b->waiters);
438
439out_unlock:
440 GEM_BUG_ON(b->first_wait == wait);
441 GEM_BUG_ON(rb_first(&b->waiters) !=
442 (b->first_wait ? &b->first_wait->node : NULL));
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100443 GEM_BUG_ON(!rcu_access_pointer(b->irq_seqno_bh) ^ RB_EMPTY_ROOT(&b->waiters));
Chris Wilsonf6168e32016-10-28 13:58:55 +0100444 spin_unlock_irq(&b->lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100445}
446
Chris Wilsonb3850852016-07-01 17:23:26 +0100447static bool signal_complete(struct drm_i915_gem_request *request)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100448{
Chris Wilsonb3850852016-07-01 17:23:26 +0100449 if (!request)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100450 return false;
451
452 /* If another process served as the bottom-half it may have already
453 * signalled that this wait is already completed.
454 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100455 if (intel_wait_complete(&request->signaling.wait))
Chris Wilsonc81d4612016-07-01 17:23:25 +0100456 return true;
457
458 /* Carefully check if the request is complete, giving time for the
459 * seqno to be visible or if the GPU hung.
460 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100461 if (__i915_request_irq_complete(request))
Chris Wilsonc81d4612016-07-01 17:23:25 +0100462 return true;
463
464 return false;
465}
466
Chris Wilsonb3850852016-07-01 17:23:26 +0100467static struct drm_i915_gem_request *to_signaler(struct rb_node *rb)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100468{
Chris Wilsond8567862016-12-20 10:40:03 +0000469 return rb_entry(rb, struct drm_i915_gem_request, signaling.node);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100470}
471
472static void signaler_set_rtpriority(void)
473{
474 struct sched_param param = { .sched_priority = 1 };
475
476 sched_setscheduler_nocheck(current, SCHED_FIFO, &param);
477}
478
479static int intel_breadcrumbs_signaler(void *arg)
480{
481 struct intel_engine_cs *engine = arg;
482 struct intel_breadcrumbs *b = &engine->breadcrumbs;
Chris Wilsonb3850852016-07-01 17:23:26 +0100483 struct drm_i915_gem_request *request;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100484
485 /* Install ourselves with high priority to reduce signalling latency */
486 signaler_set_rtpriority();
487
488 do {
489 set_current_state(TASK_INTERRUPTIBLE);
490
491 /* We are either woken up by the interrupt bottom-half,
492 * or by a client adding a new signaller. In both cases,
493 * the GPU seqno may have advanced beyond our oldest signal.
494 * If it has, propagate the signal, remove the waiter and
495 * check again with the next oldest signal. Otherwise we
496 * need to wait for a new interrupt from the GPU or for
497 * a new client.
498 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100499 request = READ_ONCE(b->first_signal);
500 if (signal_complete(request)) {
Chris Wilson7c9e9342017-01-24 11:00:09 +0000501 local_bh_disable();
502 dma_fence_signal(&request->fence);
503 local_bh_enable(); /* kick start the tasklets */
504
Chris Wilsonc81d4612016-07-01 17:23:25 +0100505 /* Wake up all other completed waiters and select the
506 * next bottom-half for the next user interrupt.
507 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100508 intel_engine_remove_wait(engine,
509 &request->signaling.wait);
Chris Wilson5590af32016-09-09 14:11:54 +0100510
Chris Wilsonc81d4612016-07-01 17:23:25 +0100511 /* Find the next oldest signal. Note that as we have
512 * not been holding the lock, another client may
513 * have installed an even older signal than the one
514 * we just completed - so double check we are still
515 * the oldest before picking the next one.
516 */
Chris Wilsonf6168e32016-10-28 13:58:55 +0100517 spin_lock_irq(&b->lock);
Chris Wilsonb3850852016-07-01 17:23:26 +0100518 if (request == b->first_signal) {
519 struct rb_node *rb =
520 rb_next(&request->signaling.node);
521 b->first_signal = rb ? to_signaler(rb) : NULL;
522 }
523 rb_erase(&request->signaling.node, &b->signals);
Chris Wilsonf6168e32016-10-28 13:58:55 +0100524 spin_unlock_irq(&b->lock);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100525
Chris Wilsone8a261e2016-07-20 13:31:49 +0100526 i915_gem_request_put(request);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100527 } else {
528 if (kthread_should_stop())
529 break;
530
531 schedule();
Chris Wilsonfe3288b2017-02-12 17:20:01 +0000532
533 if (kthread_should_park())
534 kthread_parkme();
Chris Wilsonc81d4612016-07-01 17:23:25 +0100535 }
536 } while (1);
537 __set_current_state(TASK_RUNNING);
538
539 return 0;
540}
541
Chris Wilsonb3850852016-07-01 17:23:26 +0100542void intel_engine_enable_signaling(struct drm_i915_gem_request *request)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100543{
544 struct intel_engine_cs *engine = request->engine;
545 struct intel_breadcrumbs *b = &engine->breadcrumbs;
546 struct rb_node *parent, **p;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100547 bool first, wakeup;
548
Chris Wilsonf6168e32016-10-28 13:58:55 +0100549 /* Note that we may be called from an interrupt handler on another
550 * device (e.g. nouveau signaling a fence completion causing us
551 * to submit a request, and so enable signaling). As such,
552 * we need to make sure that all other users of b->lock protect
553 * against interrupts, i.e. use spin_lock_irqsave.
554 */
555
556 /* locked by dma_fence_enable_sw_signaling() (irqsafe fence->lock) */
Chris Wilson4a50d202016-07-26 12:01:50 +0100557 assert_spin_locked(&request->lock);
Chris Wilson65e47602016-10-28 13:58:49 +0100558 if (!request->global_seqno)
559 return;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100560
Chris Wilsonb3850852016-07-01 17:23:26 +0100561 request->signaling.wait.tsk = b->signaler;
Chris Wilson65e47602016-10-28 13:58:49 +0100562 request->signaling.wait.seqno = request->global_seqno;
Chris Wilsone8a261e2016-07-20 13:31:49 +0100563 i915_gem_request_get(request);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100564
Chris Wilson4a50d202016-07-26 12:01:50 +0100565 spin_lock(&b->lock);
566
Chris Wilsonc81d4612016-07-01 17:23:25 +0100567 /* First add ourselves into the list of waiters, but register our
568 * bottom-half as the signaller thread. As per usual, only the oldest
569 * waiter (not just signaller) is tasked as the bottom-half waking
570 * up all completed waiters after the user interrupt.
571 *
572 * If we are the oldest waiter, enable the irq (after which we
573 * must double check that the seqno did not complete).
574 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100575 wakeup = __intel_engine_add_wait(engine, &request->signaling.wait);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100576
577 /* Now insert ourselves into the retirement ordered list of signals
578 * on this engine. We track the oldest seqno as that will be the
579 * first signal to complete.
580 */
Chris Wilsonc81d4612016-07-01 17:23:25 +0100581 parent = NULL;
582 first = true;
583 p = &b->signals.rb_node;
584 while (*p) {
585 parent = *p;
Chris Wilson65e47602016-10-28 13:58:49 +0100586 if (i915_seqno_passed(request->global_seqno,
587 to_signaler(parent)->global_seqno)) {
Chris Wilsonc81d4612016-07-01 17:23:25 +0100588 p = &parent->rb_right;
589 first = false;
590 } else {
591 p = &parent->rb_left;
592 }
593 }
Chris Wilsonb3850852016-07-01 17:23:26 +0100594 rb_link_node(&request->signaling.node, parent, p);
595 rb_insert_color(&request->signaling.node, &b->signals);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100596 if (first)
Chris Wilsonb3850852016-07-01 17:23:26 +0100597 smp_store_mb(b->first_signal, request);
598
Chris Wilsonc81d4612016-07-01 17:23:25 +0100599 spin_unlock(&b->lock);
600
601 if (wakeup)
602 wake_up_process(b->signaler);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100603}
604
Chris Wilson688e6c72016-07-01 17:23:15 +0100605int intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
606{
607 struct intel_breadcrumbs *b = &engine->breadcrumbs;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100608 struct task_struct *tsk;
Chris Wilson688e6c72016-07-01 17:23:15 +0100609
610 spin_lock_init(&b->lock);
611 setup_timer(&b->fake_irq,
612 intel_breadcrumbs_fake_irq,
613 (unsigned long)engine);
Chris Wilson83348ba2016-08-09 17:47:51 +0100614 setup_timer(&b->hangcheck,
615 intel_breadcrumbs_hangcheck,
616 (unsigned long)engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100617
Chris Wilsonc81d4612016-07-01 17:23:25 +0100618 /* Spawn a thread to provide a common bottom-half for all signals.
619 * As this is an asynchronous interface we cannot steal the current
620 * task for handling the bottom-half to the user interrupt, therefore
621 * we create a thread to do the coherent seqno dance after the
622 * interrupt and then signal the waitqueue (via the dma-buf/fence).
623 */
624 tsk = kthread_run(intel_breadcrumbs_signaler, engine,
625 "i915/signal:%d", engine->id);
626 if (IS_ERR(tsk))
627 return PTR_ERR(tsk);
628
629 b->signaler = tsk;
630
Chris Wilson688e6c72016-07-01 17:23:15 +0100631 return 0;
632}
633
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100634static void cancel_fake_irq(struct intel_engine_cs *engine)
635{
636 struct intel_breadcrumbs *b = &engine->breadcrumbs;
637
638 del_timer_sync(&b->hangcheck);
639 del_timer_sync(&b->fake_irq);
640 clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
641}
642
643void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
644{
645 struct intel_breadcrumbs *b = &engine->breadcrumbs;
646
647 cancel_fake_irq(engine);
Chris Wilsonf6168e32016-10-28 13:58:55 +0100648 spin_lock_irq(&b->lock);
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100649
650 __intel_breadcrumbs_disable_irq(b);
651 if (intel_engine_has_waiter(engine)) {
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100652 __intel_breadcrumbs_enable_irq(b);
Chris Wilson538b2572017-01-24 15:18:05 +0000653 if (test_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted))
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100654 wake_up_process(b->first_wait->tsk);
655 } else {
656 /* sanitize the IMR and unmask any auxiliary interrupts */
657 irq_disable(engine);
658 }
659
Chris Wilsonf6168e32016-10-28 13:58:55 +0100660 spin_unlock_irq(&b->lock);
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100661}
662
Chris Wilson688e6c72016-07-01 17:23:15 +0100663void intel_engine_fini_breadcrumbs(struct intel_engine_cs *engine)
664{
665 struct intel_breadcrumbs *b = &engine->breadcrumbs;
666
Chris Wilson381744f2016-11-21 11:07:59 +0000667 /* The engines should be idle and all requests accounted for! */
668 WARN_ON(READ_ONCE(b->first_wait));
669 WARN_ON(!RB_EMPTY_ROOT(&b->waiters));
670 WARN_ON(READ_ONCE(b->first_signal));
671 WARN_ON(!RB_EMPTY_ROOT(&b->signals));
672
Chris Wilsonc81d4612016-07-01 17:23:25 +0100673 if (!IS_ERR_OR_NULL(b->signaler))
674 kthread_stop(b->signaler);
675
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100676 cancel_fake_irq(engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100677}
678
Chris Wilson9b6586a2017-02-23 07:44:08 +0000679bool intel_breadcrumbs_busy(struct intel_engine_cs *engine)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100680{
Chris Wilson9b6586a2017-02-23 07:44:08 +0000681 struct intel_breadcrumbs *b = &engine->breadcrumbs;
682 bool busy = false;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100683
Chris Wilson9b6586a2017-02-23 07:44:08 +0000684 spin_lock_irq(&b->lock);
Chris Wilson6a5d1db2016-11-08 14:37:19 +0000685
Chris Wilson9b6586a2017-02-23 07:44:08 +0000686 if (b->first_wait) {
687 wake_up_process(b->first_wait->tsk);
688 busy |= intel_engine_flag(engine);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100689 }
690
Chris Wilson9b6586a2017-02-23 07:44:08 +0000691 if (b->first_signal) {
692 wake_up_process(b->signaler);
693 busy |= intel_engine_flag(engine);
694 }
695
696 spin_unlock_irq(&b->lock);
697
698 return busy;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100699}
Chris Wilsonf97fbf92017-02-13 17:15:14 +0000700
701#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
702#include "selftests/intel_breadcrumbs.c"
703#endif