blob: 74cb7b91b5dbd26c988ba5ad9b220d2c5ff99a88 [file] [log] [blame]
Chris Wilson688e6c72016-07-01 17:23:15 +01001/*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
Chris Wilsonc81d4612016-07-01 17:23:25 +010025#include <linux/kthread.h>
26
Chris Wilson688e6c72016-07-01 17:23:15 +010027#include "i915_drv.h"
28
Chris Wilson83348ba2016-08-09 17:47:51 +010029static void intel_breadcrumbs_hangcheck(unsigned long data)
30{
31 struct intel_engine_cs *engine = (struct intel_engine_cs *)data;
32 struct intel_breadcrumbs *b = &engine->breadcrumbs;
33
34 if (!b->irq_enabled)
35 return;
36
37 if (time_before(jiffies, b->timeout)) {
38 mod_timer(&b->hangcheck, b->timeout);
39 return;
40 }
41
42 DRM_DEBUG("Hangcheck timer elapsed... %s idle\n", engine->name);
43 set_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
44 mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
45
46 /* Ensure that even if the GPU hangs, we get woken up.
47 *
48 * However, note that if no one is waiting, we never notice
49 * a gpu hang. Eventually, we will have to wait for a resource
50 * held by the GPU and so trigger a hangcheck. In the most
51 * pathological case, this will be upon memory starvation! To
52 * prevent this, we also queue the hangcheck from the retire
53 * worker.
54 */
55 i915_queue_hangcheck(engine->i915);
56}
57
58static unsigned long wait_timeout(void)
59{
60 return round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES);
61}
62
Chris Wilson688e6c72016-07-01 17:23:15 +010063static void intel_breadcrumbs_fake_irq(unsigned long data)
64{
65 struct intel_engine_cs *engine = (struct intel_engine_cs *)data;
66
67 /*
68 * The timer persists in case we cannot enable interrupts,
69 * or if we have previously seen seqno/interrupt incoherency
70 * ("missed interrupt" syndrome). Here the worker will wake up
71 * every jiffie in order to kick the oldest waiter to do the
72 * coherent seqno check.
73 */
Chris Wilson688e6c72016-07-01 17:23:15 +010074 if (intel_engine_wakeup(engine))
75 mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
Chris Wilson688e6c72016-07-01 17:23:15 +010076}
77
78static void irq_enable(struct intel_engine_cs *engine)
79{
Chris Wilson3d5564e2016-07-01 17:23:23 +010080 /* Enabling the IRQ may miss the generation of the interrupt, but
81 * we still need to force the barrier before reading the seqno,
82 * just in case.
83 */
Chris Wilson538b2572017-01-24 15:18:05 +000084 set_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
Chris Wilson31bb59c2016-07-01 17:23:27 +010085
Chris Wilsonf6168e32016-10-28 13:58:55 +010086 /* Caller disables interrupts */
87 spin_lock(&engine->i915->irq_lock);
Chris Wilson31bb59c2016-07-01 17:23:27 +010088 engine->irq_enable(engine);
Chris Wilsonf6168e32016-10-28 13:58:55 +010089 spin_unlock(&engine->i915->irq_lock);
Chris Wilson688e6c72016-07-01 17:23:15 +010090}
91
92static void irq_disable(struct intel_engine_cs *engine)
93{
Chris Wilsonf6168e32016-10-28 13:58:55 +010094 /* Caller disables interrupts */
95 spin_lock(&engine->i915->irq_lock);
Chris Wilson31bb59c2016-07-01 17:23:27 +010096 engine->irq_disable(engine);
Chris Wilsonf6168e32016-10-28 13:58:55 +010097 spin_unlock(&engine->i915->irq_lock);
Chris Wilson688e6c72016-07-01 17:23:15 +010098}
99
Chris Wilson04171312016-07-06 12:39:00 +0100100static void __intel_breadcrumbs_enable_irq(struct intel_breadcrumbs *b)
Chris Wilson688e6c72016-07-01 17:23:15 +0100101{
102 struct intel_engine_cs *engine =
103 container_of(b, struct intel_engine_cs, breadcrumbs);
104 struct drm_i915_private *i915 = engine->i915;
Chris Wilson688e6c72016-07-01 17:23:15 +0100105
106 assert_spin_locked(&b->lock);
107 if (b->rpm_wakelock)
Chris Wilson04171312016-07-06 12:39:00 +0100108 return;
Chris Wilson688e6c72016-07-01 17:23:15 +0100109
Chris Wilsonf97fbf92017-02-13 17:15:14 +0000110 if (I915_SELFTEST_ONLY(b->mock)) {
111 /* For our mock objects we want to avoid interaction
112 * with the real hardware (which is not set up). So
113 * we simply pretend we have enabled the powerwell
114 * and the irq, and leave it up to the mock
115 * implementation to call intel_engine_wakeup()
116 * itself when it wants to simulate a user interrupt,
117 */
118 b->rpm_wakelock = true;
119 return;
120 }
121
Chris Wilson688e6c72016-07-01 17:23:15 +0100122 /* Since we are waiting on a request, the GPU should be busy
123 * and should have its own rpm reference. For completeness,
124 * record an rpm reference for ourselves to cover the
125 * interrupt we unmask.
126 */
127 intel_runtime_pm_get_noresume(i915);
128 b->rpm_wakelock = true;
129
130 /* No interrupts? Kick the waiter every jiffie! */
131 if (intel_irqs_enabled(i915)) {
Chris Wilson3d5564e2016-07-01 17:23:23 +0100132 if (!test_bit(engine->id, &i915->gpu_error.test_irq_rings))
Chris Wilson688e6c72016-07-01 17:23:15 +0100133 irq_enable(engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100134 b->irq_enabled = true;
135 }
136
137 if (!b->irq_enabled ||
Chris Wilson83348ba2016-08-09 17:47:51 +0100138 test_bit(engine->id, &i915->gpu_error.missed_irq_rings)) {
Chris Wilson688e6c72016-07-01 17:23:15 +0100139 mod_timer(&b->fake_irq, jiffies + 1);
Chris Wilson2f1ac9c2017-01-23 09:37:24 +0000140 i915_queue_hangcheck(i915);
Chris Wilson83348ba2016-08-09 17:47:51 +0100141 } else {
142 /* Ensure we never sleep indefinitely */
143 GEM_BUG_ON(!time_after(b->timeout, jiffies));
144 mod_timer(&b->hangcheck, b->timeout);
145 }
Chris Wilson688e6c72016-07-01 17:23:15 +0100146}
147
148static void __intel_breadcrumbs_disable_irq(struct intel_breadcrumbs *b)
149{
150 struct intel_engine_cs *engine =
151 container_of(b, struct intel_engine_cs, breadcrumbs);
152
153 assert_spin_locked(&b->lock);
154 if (!b->rpm_wakelock)
155 return;
156
Chris Wilsonf97fbf92017-02-13 17:15:14 +0000157 if (I915_SELFTEST_ONLY(b->mock)) {
158 b->rpm_wakelock = false;
159 return;
160 }
161
Chris Wilson688e6c72016-07-01 17:23:15 +0100162 if (b->irq_enabled) {
163 irq_disable(engine);
164 b->irq_enabled = false;
165 }
166
167 intel_runtime_pm_put(engine->i915);
168 b->rpm_wakelock = false;
169}
170
171static inline struct intel_wait *to_wait(struct rb_node *node)
172{
Chris Wilsond8567862016-12-20 10:40:03 +0000173 return rb_entry(node, struct intel_wait, node);
Chris Wilson688e6c72016-07-01 17:23:15 +0100174}
175
176static inline void __intel_breadcrumbs_finish(struct intel_breadcrumbs *b,
177 struct intel_wait *wait)
178{
179 assert_spin_locked(&b->lock);
180
181 /* This request is completed, so remove it from the tree, mark it as
182 * complete, and *then* wake up the associated task.
183 */
184 rb_erase(&wait->node, &b->waiters);
185 RB_CLEAR_NODE(&wait->node);
186
187 wake_up_process(wait->tsk); /* implicit smp_wmb() */
188}
189
190static bool __intel_engine_add_wait(struct intel_engine_cs *engine,
191 struct intel_wait *wait)
192{
193 struct intel_breadcrumbs *b = &engine->breadcrumbs;
194 struct rb_node **p, *parent, *completed;
195 bool first;
196 u32 seqno;
197
198 /* Insert the request into the retirement ordered list
199 * of waiters by walking the rbtree. If we are the oldest
200 * seqno in the tree (the first to be retired), then
201 * set ourselves as the bottom-half.
202 *
203 * As we descend the tree, prune completed branches since we hold the
204 * spinlock we know that the first_waiter must be delayed and can
205 * reduce some of the sequential wake up latency if we take action
206 * ourselves and wake up the completed tasks in parallel. Also, by
207 * removing stale elements in the tree, we may be able to reduce the
208 * ping-pong between the old bottom-half and ourselves as first-waiter.
209 */
210 first = true;
211 parent = NULL;
212 completed = NULL;
Chris Wilson1b7744e2016-07-01 17:23:17 +0100213 seqno = intel_engine_get_seqno(engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100214
215 /* If the request completed before we managed to grab the spinlock,
216 * return now before adding ourselves to the rbtree. We let the
217 * current bottom-half handle any pending wakeups and instead
218 * try and get out of the way quickly.
219 */
220 if (i915_seqno_passed(seqno, wait->seqno)) {
221 RB_CLEAR_NODE(&wait->node);
222 return first;
223 }
224
225 p = &b->waiters.rb_node;
226 while (*p) {
227 parent = *p;
228 if (wait->seqno == to_wait(parent)->seqno) {
229 /* We have multiple waiters on the same seqno, select
230 * the highest priority task (that with the smallest
231 * task->prio) to serve as the bottom-half for this
232 * group.
233 */
234 if (wait->tsk->prio > to_wait(parent)->tsk->prio) {
235 p = &parent->rb_right;
236 first = false;
237 } else {
238 p = &parent->rb_left;
239 }
240 } else if (i915_seqno_passed(wait->seqno,
241 to_wait(parent)->seqno)) {
242 p = &parent->rb_right;
243 if (i915_seqno_passed(seqno, to_wait(parent)->seqno))
244 completed = parent;
245 else
246 first = false;
247 } else {
248 p = &parent->rb_left;
249 }
250 }
251 rb_link_node(&wait->node, parent, p);
252 rb_insert_color(&wait->node, &b->waiters);
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100253 GEM_BUG_ON(!first && !rcu_access_pointer(b->irq_seqno_bh));
Chris Wilson688e6c72016-07-01 17:23:15 +0100254
255 if (completed) {
256 struct rb_node *next = rb_next(completed);
257
258 GEM_BUG_ON(!next && !first);
259 if (next && next != &wait->node) {
260 GEM_BUG_ON(first);
Chris Wilson83348ba2016-08-09 17:47:51 +0100261 b->timeout = wait_timeout();
Chris Wilson688e6c72016-07-01 17:23:15 +0100262 b->first_wait = to_wait(next);
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100263 rcu_assign_pointer(b->irq_seqno_bh, b->first_wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100264 /* As there is a delay between reading the current
265 * seqno, processing the completed tasks and selecting
266 * the next waiter, we may have missed the interrupt
267 * and so need for the next bottom-half to wakeup.
268 *
269 * Also as we enable the IRQ, we may miss the
270 * interrupt for that seqno, so we have to wake up
271 * the next bottom-half in order to do a coherent check
272 * in case the seqno passed.
273 */
274 __intel_breadcrumbs_enable_irq(b);
Chris Wilson538b2572017-01-24 15:18:05 +0000275 if (test_bit(ENGINE_IRQ_BREADCRUMB,
276 &engine->irq_posted))
Chris Wilson3d5564e2016-07-01 17:23:23 +0100277 wake_up_process(to_wait(next)->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100278 }
279
280 do {
281 struct intel_wait *crumb = to_wait(completed);
282 completed = rb_prev(completed);
283 __intel_breadcrumbs_finish(b, crumb);
284 } while (completed);
285 }
286
287 if (first) {
288 GEM_BUG_ON(rb_first(&b->waiters) != &wait->node);
Chris Wilson83348ba2016-08-09 17:47:51 +0100289 b->timeout = wait_timeout();
Chris Wilson688e6c72016-07-01 17:23:15 +0100290 b->first_wait = wait;
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100291 rcu_assign_pointer(b->irq_seqno_bh, wait->tsk);
Chris Wilson04171312016-07-06 12:39:00 +0100292 /* After assigning ourselves as the new bottom-half, we must
293 * perform a cursory check to prevent a missed interrupt.
294 * Either we miss the interrupt whilst programming the hardware,
295 * or if there was a previous waiter (for a later seqno) they
296 * may be woken instead of us (due to the inherent race
Chris Wilsonaca34b62016-07-06 12:39:02 +0100297 * in the unlocked read of b->irq_seqno_bh in the irq handler)
298 * and so we miss the wake up.
Chris Wilson04171312016-07-06 12:39:00 +0100299 */
300 __intel_breadcrumbs_enable_irq(b);
Chris Wilson688e6c72016-07-01 17:23:15 +0100301 }
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100302 GEM_BUG_ON(!rcu_access_pointer(b->irq_seqno_bh));
Chris Wilson688e6c72016-07-01 17:23:15 +0100303 GEM_BUG_ON(!b->first_wait);
304 GEM_BUG_ON(rb_first(&b->waiters) != &b->first_wait->node);
305
306 return first;
307}
308
309bool intel_engine_add_wait(struct intel_engine_cs *engine,
310 struct intel_wait *wait)
311{
312 struct intel_breadcrumbs *b = &engine->breadcrumbs;
313 bool first;
314
Chris Wilsonf6168e32016-10-28 13:58:55 +0100315 spin_lock_irq(&b->lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100316 first = __intel_engine_add_wait(engine, wait);
Chris Wilsonf6168e32016-10-28 13:58:55 +0100317 spin_unlock_irq(&b->lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100318
319 return first;
320}
321
Chris Wilson688e6c72016-07-01 17:23:15 +0100322static inline bool chain_wakeup(struct rb_node *rb, int priority)
323{
324 return rb && to_wait(rb)->tsk->prio <= priority;
325}
326
Chris Wilsonc81d4612016-07-01 17:23:25 +0100327static inline int wakeup_priority(struct intel_breadcrumbs *b,
328 struct task_struct *tsk)
329{
330 if (tsk == b->signaler)
331 return INT_MIN;
332 else
333 return tsk->prio;
334}
335
Chris Wilson688e6c72016-07-01 17:23:15 +0100336void intel_engine_remove_wait(struct intel_engine_cs *engine,
337 struct intel_wait *wait)
338{
339 struct intel_breadcrumbs *b = &engine->breadcrumbs;
340
341 /* Quick check to see if this waiter was already decoupled from
342 * the tree by the bottom-half to avoid contention on the spinlock
343 * by the herd.
344 */
345 if (RB_EMPTY_NODE(&wait->node))
346 return;
347
Chris Wilsonf6168e32016-10-28 13:58:55 +0100348 spin_lock_irq(&b->lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100349
350 if (RB_EMPTY_NODE(&wait->node))
351 goto out_unlock;
352
353 if (b->first_wait == wait) {
Chris Wilsonc81d4612016-07-01 17:23:25 +0100354 const int priority = wakeup_priority(b, wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100355 struct rb_node *next;
Chris Wilson688e6c72016-07-01 17:23:15 +0100356
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100357 GEM_BUG_ON(rcu_access_pointer(b->irq_seqno_bh) != wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100358
359 /* We are the current bottom-half. Find the next candidate,
360 * the first waiter in the queue on the remaining oldest
361 * request. As multiple seqnos may complete in the time it
362 * takes us to wake up and find the next waiter, we have to
363 * wake up that waiter for it to perform its own coherent
364 * completion check.
365 */
366 next = rb_next(&wait->node);
367 if (chain_wakeup(next, priority)) {
368 /* If the next waiter is already complete,
369 * wake it up and continue onto the next waiter. So
370 * if have a small herd, they will wake up in parallel
371 * rather than sequentially, which should reduce
372 * the overall latency in waking all the completed
373 * clients.
374 *
375 * However, waking up a chain adds extra latency to
376 * the first_waiter. This is undesirable if that
377 * waiter is a high priority task.
378 */
Chris Wilson1b7744e2016-07-01 17:23:17 +0100379 u32 seqno = intel_engine_get_seqno(engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100380
381 while (i915_seqno_passed(seqno, to_wait(next)->seqno)) {
382 struct rb_node *n = rb_next(next);
383
384 __intel_breadcrumbs_finish(b, to_wait(next));
385 next = n;
386 if (!chain_wakeup(next, priority))
387 break;
388 }
389 }
390
391 if (next) {
392 /* In our haste, we may have completed the first waiter
393 * before we enabled the interrupt. Do so now as we
394 * have a second waiter for a future seqno. Afterwards,
395 * we have to wake up that waiter in case we missed
396 * the interrupt, or if we have to handle an
397 * exception rather than a seqno completion.
398 */
Chris Wilson83348ba2016-08-09 17:47:51 +0100399 b->timeout = wait_timeout();
Chris Wilson688e6c72016-07-01 17:23:15 +0100400 b->first_wait = to_wait(next);
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100401 rcu_assign_pointer(b->irq_seqno_bh, b->first_wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100402 if (b->first_wait->seqno != wait->seqno)
403 __intel_breadcrumbs_enable_irq(b);
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100404 wake_up_process(b->first_wait->tsk);
Chris Wilson688e6c72016-07-01 17:23:15 +0100405 } else {
406 b->first_wait = NULL;
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100407 rcu_assign_pointer(b->irq_seqno_bh, NULL);
Chris Wilson688e6c72016-07-01 17:23:15 +0100408 __intel_breadcrumbs_disable_irq(b);
409 }
410 } else {
411 GEM_BUG_ON(rb_first(&b->waiters) == &wait->node);
412 }
413
414 GEM_BUG_ON(RB_EMPTY_NODE(&wait->node));
415 rb_erase(&wait->node, &b->waiters);
416
417out_unlock:
418 GEM_BUG_ON(b->first_wait == wait);
419 GEM_BUG_ON(rb_first(&b->waiters) !=
420 (b->first_wait ? &b->first_wait->node : NULL));
Chris Wilsondbd6ef22016-08-09 17:47:52 +0100421 GEM_BUG_ON(!rcu_access_pointer(b->irq_seqno_bh) ^ RB_EMPTY_ROOT(&b->waiters));
Chris Wilsonf6168e32016-10-28 13:58:55 +0100422 spin_unlock_irq(&b->lock);
Chris Wilson688e6c72016-07-01 17:23:15 +0100423}
424
Chris Wilsonb3850852016-07-01 17:23:26 +0100425static bool signal_complete(struct drm_i915_gem_request *request)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100426{
Chris Wilsonb3850852016-07-01 17:23:26 +0100427 if (!request)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100428 return false;
429
430 /* If another process served as the bottom-half it may have already
431 * signalled that this wait is already completed.
432 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100433 if (intel_wait_complete(&request->signaling.wait))
Chris Wilsonc81d4612016-07-01 17:23:25 +0100434 return true;
435
436 /* Carefully check if the request is complete, giving time for the
437 * seqno to be visible or if the GPU hung.
438 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100439 if (__i915_request_irq_complete(request))
Chris Wilsonc81d4612016-07-01 17:23:25 +0100440 return true;
441
442 return false;
443}
444
Chris Wilsonb3850852016-07-01 17:23:26 +0100445static struct drm_i915_gem_request *to_signaler(struct rb_node *rb)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100446{
Chris Wilsond8567862016-12-20 10:40:03 +0000447 return rb_entry(rb, struct drm_i915_gem_request, signaling.node);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100448}
449
450static void signaler_set_rtpriority(void)
451{
452 struct sched_param param = { .sched_priority = 1 };
453
454 sched_setscheduler_nocheck(current, SCHED_FIFO, &param);
455}
456
457static int intel_breadcrumbs_signaler(void *arg)
458{
459 struct intel_engine_cs *engine = arg;
460 struct intel_breadcrumbs *b = &engine->breadcrumbs;
Chris Wilsonb3850852016-07-01 17:23:26 +0100461 struct drm_i915_gem_request *request;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100462
463 /* Install ourselves with high priority to reduce signalling latency */
464 signaler_set_rtpriority();
465
466 do {
467 set_current_state(TASK_INTERRUPTIBLE);
468
469 /* We are either woken up by the interrupt bottom-half,
470 * or by a client adding a new signaller. In both cases,
471 * the GPU seqno may have advanced beyond our oldest signal.
472 * If it has, propagate the signal, remove the waiter and
473 * check again with the next oldest signal. Otherwise we
474 * need to wait for a new interrupt from the GPU or for
475 * a new client.
476 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100477 request = READ_ONCE(b->first_signal);
478 if (signal_complete(request)) {
Chris Wilson7c9e9342017-01-24 11:00:09 +0000479 local_bh_disable();
480 dma_fence_signal(&request->fence);
481 local_bh_enable(); /* kick start the tasklets */
482
Chris Wilsonc81d4612016-07-01 17:23:25 +0100483 /* Wake up all other completed waiters and select the
484 * next bottom-half for the next user interrupt.
485 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100486 intel_engine_remove_wait(engine,
487 &request->signaling.wait);
Chris Wilson5590af32016-09-09 14:11:54 +0100488
Chris Wilsonc81d4612016-07-01 17:23:25 +0100489 /* Find the next oldest signal. Note that as we have
490 * not been holding the lock, another client may
491 * have installed an even older signal than the one
492 * we just completed - so double check we are still
493 * the oldest before picking the next one.
494 */
Chris Wilsonf6168e32016-10-28 13:58:55 +0100495 spin_lock_irq(&b->lock);
Chris Wilsonb3850852016-07-01 17:23:26 +0100496 if (request == b->first_signal) {
497 struct rb_node *rb =
498 rb_next(&request->signaling.node);
499 b->first_signal = rb ? to_signaler(rb) : NULL;
500 }
501 rb_erase(&request->signaling.node, &b->signals);
Chris Wilsonf6168e32016-10-28 13:58:55 +0100502 spin_unlock_irq(&b->lock);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100503
Chris Wilsone8a261e2016-07-20 13:31:49 +0100504 i915_gem_request_put(request);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100505 } else {
506 if (kthread_should_stop())
507 break;
508
509 schedule();
Chris Wilsonfe3288b2017-02-12 17:20:01 +0000510
511 if (kthread_should_park())
512 kthread_parkme();
Chris Wilsonc81d4612016-07-01 17:23:25 +0100513 }
514 } while (1);
515 __set_current_state(TASK_RUNNING);
516
517 return 0;
518}
519
Chris Wilsonb3850852016-07-01 17:23:26 +0100520void intel_engine_enable_signaling(struct drm_i915_gem_request *request)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100521{
522 struct intel_engine_cs *engine = request->engine;
523 struct intel_breadcrumbs *b = &engine->breadcrumbs;
524 struct rb_node *parent, **p;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100525 bool first, wakeup;
526
Chris Wilsonf6168e32016-10-28 13:58:55 +0100527 /* Note that we may be called from an interrupt handler on another
528 * device (e.g. nouveau signaling a fence completion causing us
529 * to submit a request, and so enable signaling). As such,
530 * we need to make sure that all other users of b->lock protect
531 * against interrupts, i.e. use spin_lock_irqsave.
532 */
533
534 /* locked by dma_fence_enable_sw_signaling() (irqsafe fence->lock) */
Chris Wilson4a50d202016-07-26 12:01:50 +0100535 assert_spin_locked(&request->lock);
Chris Wilson65e47602016-10-28 13:58:49 +0100536 if (!request->global_seqno)
537 return;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100538
Chris Wilsonb3850852016-07-01 17:23:26 +0100539 request->signaling.wait.tsk = b->signaler;
Chris Wilson65e47602016-10-28 13:58:49 +0100540 request->signaling.wait.seqno = request->global_seqno;
Chris Wilsone8a261e2016-07-20 13:31:49 +0100541 i915_gem_request_get(request);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100542
Chris Wilson4a50d202016-07-26 12:01:50 +0100543 spin_lock(&b->lock);
544
Chris Wilsonc81d4612016-07-01 17:23:25 +0100545 /* First add ourselves into the list of waiters, but register our
546 * bottom-half as the signaller thread. As per usual, only the oldest
547 * waiter (not just signaller) is tasked as the bottom-half waking
548 * up all completed waiters after the user interrupt.
549 *
550 * If we are the oldest waiter, enable the irq (after which we
551 * must double check that the seqno did not complete).
552 */
Chris Wilsonb3850852016-07-01 17:23:26 +0100553 wakeup = __intel_engine_add_wait(engine, &request->signaling.wait);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100554
555 /* Now insert ourselves into the retirement ordered list of signals
556 * on this engine. We track the oldest seqno as that will be the
557 * first signal to complete.
558 */
Chris Wilsonc81d4612016-07-01 17:23:25 +0100559 parent = NULL;
560 first = true;
561 p = &b->signals.rb_node;
562 while (*p) {
563 parent = *p;
Chris Wilson65e47602016-10-28 13:58:49 +0100564 if (i915_seqno_passed(request->global_seqno,
565 to_signaler(parent)->global_seqno)) {
Chris Wilsonc81d4612016-07-01 17:23:25 +0100566 p = &parent->rb_right;
567 first = false;
568 } else {
569 p = &parent->rb_left;
570 }
571 }
Chris Wilsonb3850852016-07-01 17:23:26 +0100572 rb_link_node(&request->signaling.node, parent, p);
573 rb_insert_color(&request->signaling.node, &b->signals);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100574 if (first)
Chris Wilsonb3850852016-07-01 17:23:26 +0100575 smp_store_mb(b->first_signal, request);
576
Chris Wilsonc81d4612016-07-01 17:23:25 +0100577 spin_unlock(&b->lock);
578
579 if (wakeup)
580 wake_up_process(b->signaler);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100581}
582
Chris Wilson688e6c72016-07-01 17:23:15 +0100583int intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
584{
585 struct intel_breadcrumbs *b = &engine->breadcrumbs;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100586 struct task_struct *tsk;
Chris Wilson688e6c72016-07-01 17:23:15 +0100587
588 spin_lock_init(&b->lock);
589 setup_timer(&b->fake_irq,
590 intel_breadcrumbs_fake_irq,
591 (unsigned long)engine);
Chris Wilson83348ba2016-08-09 17:47:51 +0100592 setup_timer(&b->hangcheck,
593 intel_breadcrumbs_hangcheck,
594 (unsigned long)engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100595
Chris Wilsonc81d4612016-07-01 17:23:25 +0100596 /* Spawn a thread to provide a common bottom-half for all signals.
597 * As this is an asynchronous interface we cannot steal the current
598 * task for handling the bottom-half to the user interrupt, therefore
599 * we create a thread to do the coherent seqno dance after the
600 * interrupt and then signal the waitqueue (via the dma-buf/fence).
601 */
602 tsk = kthread_run(intel_breadcrumbs_signaler, engine,
603 "i915/signal:%d", engine->id);
604 if (IS_ERR(tsk))
605 return PTR_ERR(tsk);
606
607 b->signaler = tsk;
608
Chris Wilson688e6c72016-07-01 17:23:15 +0100609 return 0;
610}
611
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100612static void cancel_fake_irq(struct intel_engine_cs *engine)
613{
614 struct intel_breadcrumbs *b = &engine->breadcrumbs;
615
616 del_timer_sync(&b->hangcheck);
617 del_timer_sync(&b->fake_irq);
618 clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
619}
620
621void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
622{
623 struct intel_breadcrumbs *b = &engine->breadcrumbs;
624
625 cancel_fake_irq(engine);
Chris Wilsonf6168e32016-10-28 13:58:55 +0100626 spin_lock_irq(&b->lock);
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100627
628 __intel_breadcrumbs_disable_irq(b);
629 if (intel_engine_has_waiter(engine)) {
630 b->timeout = wait_timeout();
631 __intel_breadcrumbs_enable_irq(b);
Chris Wilson538b2572017-01-24 15:18:05 +0000632 if (test_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted))
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100633 wake_up_process(b->first_wait->tsk);
634 } else {
635 /* sanitize the IMR and unmask any auxiliary interrupts */
636 irq_disable(engine);
637 }
638
Chris Wilsonf6168e32016-10-28 13:58:55 +0100639 spin_unlock_irq(&b->lock);
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100640}
641
Chris Wilson688e6c72016-07-01 17:23:15 +0100642void intel_engine_fini_breadcrumbs(struct intel_engine_cs *engine)
643{
644 struct intel_breadcrumbs *b = &engine->breadcrumbs;
645
Chris Wilson381744f2016-11-21 11:07:59 +0000646 /* The engines should be idle and all requests accounted for! */
647 WARN_ON(READ_ONCE(b->first_wait));
648 WARN_ON(!RB_EMPTY_ROOT(&b->waiters));
649 WARN_ON(READ_ONCE(b->first_signal));
650 WARN_ON(!RB_EMPTY_ROOT(&b->signals));
651
Chris Wilsonc81d4612016-07-01 17:23:25 +0100652 if (!IS_ERR_OR_NULL(b->signaler))
653 kthread_stop(b->signaler);
654
Chris Wilsonad07dfc2016-10-07 07:53:26 +0100655 cancel_fake_irq(engine);
Chris Wilson688e6c72016-07-01 17:23:15 +0100656}
657
Chris Wilson6a5d1db2016-11-08 14:37:19 +0000658unsigned int intel_breadcrumbs_busy(struct drm_i915_private *i915)
Chris Wilsonc81d4612016-07-01 17:23:25 +0100659{
660 struct intel_engine_cs *engine;
Akash Goel3b3f1652016-10-13 22:44:48 +0530661 enum intel_engine_id id;
Chris Wilsonc81d4612016-07-01 17:23:25 +0100662 unsigned int mask = 0;
663
Akash Goel3b3f1652016-10-13 22:44:48 +0530664 for_each_engine(engine, i915, id) {
Chris Wilson6a5d1db2016-11-08 14:37:19 +0000665 struct intel_breadcrumbs *b = &engine->breadcrumbs;
666
667 spin_lock_irq(&b->lock);
668
669 if (b->first_wait) {
670 wake_up_process(b->first_wait->tsk);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100671 mask |= intel_engine_flag(engine);
672 }
Chris Wilson6a5d1db2016-11-08 14:37:19 +0000673
674 if (b->first_signal) {
675 wake_up_process(b->signaler);
676 mask |= intel_engine_flag(engine);
677 }
678
679 spin_unlock_irq(&b->lock);
Chris Wilsonc81d4612016-07-01 17:23:25 +0100680 }
681
682 return mask;
683}
Chris Wilsonf97fbf92017-02-13 17:15:14 +0000684
685#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
686#include "selftests/intel_breadcrumbs.c"
687#endif