blob: a43c7135f33da946dd75bc849355f2fe92263a29 [file] [log] [blame]
Vinayak Holikattie0eca632013-02-25 21:44:33 +05301/*
2 * Universal Flash Storage Host controller driver
3 *
4 * This code is based on drivers/scsi/ufs/ufshcd.h
5 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Vinayak Holikattie0eca632013-02-25 21:44:33 +05307 *
8 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
35 */
36
37#ifndef _UFSHCD_H
38#define _UFSHCD_H
39
40#include <linux/module.h>
41#include <linux/kernel.h>
42#include <linux/init.h>
43#include <linux/interrupt.h>
44#include <linux/io.h>
45#include <linux/delay.h>
46#include <linux/slab.h>
47#include <linux/spinlock.h>
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -080048#include <linux/rwsem.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053049#include <linux/workqueue.h>
50#include <linux/errno.h>
51#include <linux/types.h>
52#include <linux/wait.h>
53#include <linux/bitops.h>
54#include <linux/pm_runtime.h>
55#include <linux/clk.h>
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053056#include <linux/completion.h>
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030057#include <linux/regulator/consumer.h>
Yaniv Gardif37aabc2016-03-10 17:37:20 +020058#include "unipro.h"
Vinayak Holikattie0eca632013-02-25 21:44:33 +053059
60#include <asm/irq.h>
61#include <asm/byteorder.h>
62#include <scsi/scsi.h>
63#include <scsi/scsi_cmnd.h>
64#include <scsi/scsi_host.h>
65#include <scsi/scsi_tcq.h>
66#include <scsi/scsi_dbg.h>
67#include <scsi/scsi_eh.h>
68
69#include "ufs.h"
70#include "ufshci.h"
71
72#define UFSHCD "ufshcd"
73#define UFSHCD_DRIVER_VERSION "0.2"
74
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030075struct ufs_hba;
76
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053077enum dev_cmd_type {
78 DEV_CMD_TYPE_NOP = 0x0,
Dolev Raviv68078d52013-07-30 00:35:58 +053079 DEV_CMD_TYPE_QUERY = 0x1,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053080};
81
Vinayak Holikattie0eca632013-02-25 21:44:33 +053082/**
83 * struct uic_command - UIC command structure
84 * @command: UIC command
85 * @argument1: UIC command argument 1
86 * @argument2: UIC command argument 2
87 * @argument3: UIC command argument 3
88 * @cmd_active: Indicate if UIC command is outstanding
89 * @result: UIC command result
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053090 * @done: UIC command completion
Vinayak Holikattie0eca632013-02-25 21:44:33 +053091 */
92struct uic_command {
93 u32 command;
94 u32 argument1;
95 u32 argument2;
96 u32 argument3;
97 int cmd_active;
98 int result;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053099 struct completion done;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530100};
101
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300102/* Used to differentiate the power management options */
103enum ufs_pm_op {
104 UFS_RUNTIME_PM,
105 UFS_SYSTEM_PM,
106 UFS_SHUTDOWN_PM,
107};
108
109#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
110#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
111#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
112
113/* Host <-> Device UniPro Link state */
114enum uic_link_state {
115 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
116 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
117 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
118};
119
120#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
121#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
122 UIC_LINK_ACTIVE_STATE)
123#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
124 UIC_LINK_HIBERN8_STATE)
125#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
126#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
127 UIC_LINK_ACTIVE_STATE)
128#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
129 UIC_LINK_HIBERN8_STATE)
130
131/*
132 * UFS Power management levels.
133 * Each level is in increasing order of power savings.
134 */
135enum ufs_pm_level {
136 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
137 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
138 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
139 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
140 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
141 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
142 UFS_PM_LVL_MAX
143};
144
145struct ufs_pm_lvl_states {
146 enum ufs_dev_pwr_mode dev_state;
147 enum uic_link_state link_state;
148};
149
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530150/**
151 * struct ufshcd_lrb - local reference block
152 * @utr_descriptor_ptr: UTRD address of the command
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530153 * @ucd_req_ptr: UCD address of the command
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530154 * @ucd_rsp_ptr: Response UPIU address for this command
155 * @ucd_prdt_ptr: PRDT address of the command
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800156 * @utrd_dma_addr: UTRD dma address for debug
157 * @ucd_prdt_dma_addr: PRDT dma address for debug
158 * @ucd_rsp_dma_addr: UPIU response dma address for debug
159 * @ucd_req_dma_addr: UPIU request dma address for debug
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530160 * @cmd: pointer to SCSI command
161 * @sense_buffer: pointer to sense buffer address of the SCSI command
162 * @sense_bufflen: Length of the sense buffer
163 * @scsi_status: SCSI status of the command
164 * @command_type: SCSI, UFS, Query.
165 * @task_tag: Task tag of the command
166 * @lun: LUN of the command
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530167 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800168 * @issue_time_stamp: time stamp for debug purposes
Zang Leigang09017182017-09-27 10:06:06 +0800169 * @compl_time_stamp: time stamp for statistics
Gilad Bronere0b299e2017-02-03 16:56:40 -0800170 * @req_abort_skip: skip request abort task flag
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530171 */
172struct ufshcd_lrb {
173 struct utp_transfer_req_desc *utr_descriptor_ptr;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530174 struct utp_upiu_req *ucd_req_ptr;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530175 struct utp_upiu_rsp *ucd_rsp_ptr;
176 struct ufshcd_sg_entry *ucd_prdt_ptr;
177
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800178 dma_addr_t utrd_dma_addr;
179 dma_addr_t ucd_req_dma_addr;
180 dma_addr_t ucd_rsp_dma_addr;
181 dma_addr_t ucd_prdt_dma_addr;
182
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530183 struct scsi_cmnd *cmd;
184 u8 *sense_buffer;
185 unsigned int sense_bufflen;
186 int scsi_status;
187
188 int command_type;
189 int task_tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +0300190 u8 lun; /* UPIU LUN id field is only 8-bit wide */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530191 bool intr_cmd;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800192 ktime_t issue_time_stamp;
Zang Leigang09017182017-09-27 10:06:06 +0800193 ktime_t compl_time_stamp;
Gilad Bronere0b299e2017-02-03 16:56:40 -0800194
195 bool req_abort_skip;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530196};
197
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530198/**
Tomas Winklera230c2f2016-02-09 10:25:41 +0200199 * struct ufs_query - holds relevant data structures for query request
Dolev Raviv68078d52013-07-30 00:35:58 +0530200 * @request: request upiu and function
201 * @descriptor: buffer for sending/receiving descriptor
202 * @response: response upiu and response
203 */
204struct ufs_query {
205 struct ufs_query_req request;
206 u8 *descriptor;
207 struct ufs_query_res response;
208};
209
210/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530211 * struct ufs_dev_cmd - all assosiated fields with device management commands
212 * @type: device management command type - Query, NOP OUT
213 * @lock: lock to allow one command at a time
214 * @complete: internal commands completion
215 * @tag_wq: wait queue until free command slot is available
216 */
217struct ufs_dev_cmd {
218 enum dev_cmd_type type;
219 struct mutex lock;
220 struct completion *complete;
221 wait_queue_head_t tag_wq;
Dolev Raviv68078d52013-07-30 00:35:58 +0530222 struct ufs_query query;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530223};
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530224
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +0000225struct ufs_desc_size {
226 int dev_desc;
227 int pwr_desc;
228 int geom_desc;
229 int interc_desc;
230 int unit_desc;
231 int conf_desc;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +0200232 int hlth_desc;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +0000233};
234
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300235/**
236 * struct ufs_clk_info - UFS clock related info
237 * @list: list headed by hba->clk_list_head
238 * @clk: clock node
239 * @name: clock name
240 * @max_freq: maximum frequency supported by the clock
Sahitya Tummala4cff6d992014-09-25 15:32:33 +0300241 * @min_freq: min frequency that can be used for clock scaling
Sahitya Tummala856b3482014-09-25 15:32:34 +0300242 * @curr_freq: indicates the current frequency that it is set to
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300243 * @enabled: variable to check against multiple enable/disable
244 */
245struct ufs_clk_info {
246 struct list_head list;
247 struct clk *clk;
248 const char *name;
249 u32 max_freq;
Sahitya Tummala4cff6d992014-09-25 15:32:33 +0300250 u32 min_freq;
Sahitya Tummala856b3482014-09-25 15:32:34 +0300251 u32 curr_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300252 bool enabled;
253};
254
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200255enum ufs_notify_change_status {
256 PRE_CHANGE,
257 POST_CHANGE,
258};
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300259
260struct ufs_pa_layer_attr {
261 u32 gear_rx;
262 u32 gear_tx;
263 u32 lane_rx;
264 u32 lane_tx;
265 u32 pwr_rx;
266 u32 pwr_tx;
267 u32 hs_rate;
268};
269
270struct ufs_pwr_mode_info {
271 bool is_valid;
272 struct ufs_pa_layer_attr info;
273};
274
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300275/**
276 * struct ufs_hba_variant_ops - variant specific callbacks
277 * @name: variant name
278 * @init: called when the driver is initialized
279 * @exit: called to cleanup everything done in init
Yaniv Gardi9949e702015-05-17 18:55:05 +0300280 * @get_ufs_hci_version: called to get UFS HCI version
Sahitya Tummala856b3482014-09-25 15:32:34 +0300281 * @clk_scale_notify: notifies that clks are scaled up/down
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300282 * @setup_clocks: called before touching any of the controller registers
283 * @setup_regulators: called before accessing the host controller
284 * @hce_enable_notify: called before and after HCE enable bit is set to allow
285 * variant specific Uni-Pro initialization.
286 * @link_startup_notify: called before and after Link startup is carried out
287 * to allow variant specific Uni-Pro initialization.
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300288 * @pwr_change_notify: called before and after a power mode change
289 * is carried out to allow vendor spesific capabilities
290 * to be set.
Kiwoong Kim0e675ef2016-11-10 21:14:36 +0900291 * @setup_xfer_req: called before any transfer request is issued
292 * to set some things
Kiwoong Kimd2877be2016-11-10 21:16:15 +0900293 * @setup_task_mgmt: called before any task management request is issued
294 * to set some things
Kiwoong Kimee32c902016-11-10 21:17:43 +0900295 * @hibern8_notify: called around hibern8 enter/exit
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800296 * @apply_dev_quirks: called to apply device specific quirks
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300297 * @suspend: called during host controller PM callback
298 * @resume: called during host controller PM callback
Yaniv Gardi6e3fd442015-10-28 13:15:50 +0200299 * @dbg_register_dump: used to dump controller debug information
Joao Pinto4b9ffb52016-05-11 12:21:30 +0100300 * @phy_initialization: used to initialize phys
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300301 */
302struct ufs_hba_variant_ops {
303 const char *name;
304 int (*init)(struct ufs_hba *);
305 void (*exit)(struct ufs_hba *);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300306 u32 (*get_ufs_hci_version)(struct ufs_hba *);
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200307 int (*clk_scale_notify)(struct ufs_hba *, bool,
308 enum ufs_notify_change_status);
Subhash Jadavani1e879e82016-10-06 21:48:22 -0700309 int (*setup_clocks)(struct ufs_hba *, bool,
310 enum ufs_notify_change_status);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300311 int (*setup_regulators)(struct ufs_hba *, bool);
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200312 int (*hce_enable_notify)(struct ufs_hba *,
313 enum ufs_notify_change_status);
314 int (*link_startup_notify)(struct ufs_hba *,
315 enum ufs_notify_change_status);
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300316 int (*pwr_change_notify)(struct ufs_hba *,
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200317 enum ufs_notify_change_status status,
318 struct ufs_pa_layer_attr *,
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300319 struct ufs_pa_layer_attr *);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +0900320 void (*setup_xfer_req)(struct ufs_hba *, int, bool);
Kiwoong Kimd2877be2016-11-10 21:16:15 +0900321 void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
Kiwoong Kimee32c902016-11-10 21:17:43 +0900322 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800323 enum ufs_notify_change_status);
324 int (*apply_dev_quirks)(struct ufs_hba *);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300325 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
326 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
Yaniv Gardi6e3fd442015-10-28 13:15:50 +0200327 void (*dbg_register_dump)(struct ufs_hba *hba);
Joao Pinto4b9ffb52016-05-11 12:21:30 +0100328 int (*phy_initialization)(struct ufs_hba *);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300329};
330
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300331/* clock gating state */
332enum clk_gating_state {
333 CLKS_OFF,
334 CLKS_ON,
335 REQ_CLKS_OFF,
336 REQ_CLKS_ON,
337};
338
339/**
340 * struct ufs_clk_gating - UFS clock gating related info
341 * @gate_work: worker to turn off clocks after some delay as specified in
342 * delay_ms
343 * @ungate_work: worker to turn on clocks that will be used in case of
344 * interrupt context
345 * @state: the current clocks state
346 * @delay_ms: gating delay in ms
347 * @is_suspended: clk gating is suspended when set to 1 which can be used
348 * during suspend/resume
349 * @delay_attr: sysfs attribute to control delay_attr
Sahitya Tummalab4274112016-12-22 18:40:39 -0800350 * @enable_attr: sysfs attribute to enable/disable clock gating
351 * @is_enabled: Indicates the current status of clock gating
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300352 * @active_reqs: number of requests that are pending and should be waited for
353 * completion before gating clocks.
354 */
355struct ufs_clk_gating {
356 struct delayed_work gate_work;
357 struct work_struct ungate_work;
358 enum clk_gating_state state;
359 unsigned long delay_ms;
360 bool is_suspended;
361 struct device_attribute delay_attr;
Sahitya Tummalab4274112016-12-22 18:40:39 -0800362 struct device_attribute enable_attr;
363 bool is_enabled;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300364 int active_reqs;
Vijay Viswanath10e5e372018-05-03 16:37:22 +0530365 struct workqueue_struct *clk_gating_workq;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300366};
367
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800368struct ufs_saved_pwr_info {
369 struct ufs_pa_layer_attr info;
370 bool is_valid;
371};
372
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800373/**
374 * struct ufs_clk_scaling - UFS clock scaling related data
375 * @active_reqs: number of requests that are pending. If this is zero when
376 * devfreq ->target() function is called then schedule "suspend_work" to
377 * suspend devfreq.
378 * @tot_busy_t: Total busy time in current polling window
379 * @window_start_t: Start time (in jiffies) of the current polling window
380 * @busy_start_t: Start time of current busy period
381 * @enable_attr: sysfs attribute to enable/disable clock scaling
382 * @saved_pwr_info: UFS power mode may also be changed during scaling and this
383 * one keeps track of previous power mode.
384 * @workq: workqueue to schedule devfreq suspend/resume work
385 * @suspend_work: worker to suspend devfreq
386 * @resume_work: worker to resume devfreq
387 * @is_allowed: tracks if scaling is currently allowed or not
388 * @is_busy_started: tracks if busy period has started or not
389 * @is_suspended: tracks if devfreq is suspended or not
390 */
Sahitya Tummala856b3482014-09-25 15:32:34 +0300391struct ufs_clk_scaling {
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800392 int active_reqs;
393 unsigned long tot_busy_t;
Sahitya Tummala856b3482014-09-25 15:32:34 +0300394 unsigned long window_start_t;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800395 ktime_t busy_start_t;
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800396 struct device_attribute enable_attr;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800397 struct ufs_saved_pwr_info saved_pwr_info;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800398 struct workqueue_struct *workq;
399 struct work_struct suspend_work;
400 struct work_struct resume_work;
401 bool is_allowed;
402 bool is_busy_started;
403 bool is_suspended;
Sahitya Tummala856b3482014-09-25 15:32:34 +0300404};
405
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530406/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +0300407 * struct ufs_init_prefetch - contains data that is pre-fetched once during
408 * initialization
409 * @icc_level: icc level which was read during initialization
410 */
411struct ufs_init_prefetch {
412 u32 icc_level;
413};
414
Stanley Chu48d5b972019-07-10 21:38:18 +0800415#define UFS_ERR_REG_HIST_LENGTH 8
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800416/**
Stanley Chud3c615b2019-07-10 21:38:19 +0800417 * struct ufs_err_reg_hist - keeps history of errors
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800418 * @pos: index to indicate cyclic buffer position
419 * @reg: cyclic buffer for registers value
420 * @tstamp: cyclic buffer for time stamp
421 */
Stanley Chu48d5b972019-07-10 21:38:18 +0800422struct ufs_err_reg_hist {
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800423 int pos;
Stanley Chu48d5b972019-07-10 21:38:18 +0800424 u32 reg[UFS_ERR_REG_HIST_LENGTH];
425 ktime_t tstamp[UFS_ERR_REG_HIST_LENGTH];
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800426};
427
428/**
429 * struct ufs_stats - keeps usage/err statistics
430 * @hibern8_exit_cnt: Counter to keep track of number of exits,
431 * reset this after link-startup.
432 * @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
433 * Clear after the first successful command completion.
434 * @pa_err: tracks pa-uic errors
435 * @dl_err: tracks dl-uic errors
436 * @nl_err: tracks nl-uic errors
437 * @tl_err: tracks tl-uic errors
438 * @dme_err: tracks dme errors
Stanley Chud3c615b2019-07-10 21:38:19 +0800439 * @auto_hibern8_err: tracks auto-hibernate errors
Stanley Chu8808b4e2019-07-10 21:38:21 +0800440 * @fatal_err: tracks fatal errors
441 * @linkup_err: tracks link-startup errors
442 * @resume_err: tracks resume errors
443 * @suspend_err: tracks suspend errors
444 * @dev_reset: tracks device reset events
445 * @host_reset: tracks host reset events
446 * @tsk_abort: tracks task abort events
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800447 */
448struct ufs_stats {
449 u32 hibern8_exit_cnt;
450 ktime_t last_hibern8_exit_tstamp;
Stanley Chud3c615b2019-07-10 21:38:19 +0800451
452 /* uic specific errors */
Stanley Chu48d5b972019-07-10 21:38:18 +0800453 struct ufs_err_reg_hist pa_err;
454 struct ufs_err_reg_hist dl_err;
455 struct ufs_err_reg_hist nl_err;
456 struct ufs_err_reg_hist tl_err;
457 struct ufs_err_reg_hist dme_err;
Stanley Chud3c615b2019-07-10 21:38:19 +0800458
459 /* fatal errors */
Stanley Chud3c615b2019-07-10 21:38:19 +0800460 struct ufs_err_reg_hist auto_hibern8_err;
Stanley Chu8808b4e2019-07-10 21:38:21 +0800461 struct ufs_err_reg_hist fatal_err;
462 struct ufs_err_reg_hist link_startup_err;
463 struct ufs_err_reg_hist resume_err;
464 struct ufs_err_reg_hist suspend_err;
465
466 /* abnormal events */
467 struct ufs_err_reg_hist dev_reset;
468 struct ufs_err_reg_hist host_reset;
469 struct ufs_err_reg_hist task_abort;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800470};
471
Yaniv Gardi3a4bf062014-09-25 15:32:27 +0300472/**
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530473 * struct ufs_hba - per adapter private structure
474 * @mmio_base: UFSHCI base register address
475 * @ucdl_base_addr: UFS Command Descriptor base address
476 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
477 * @utmrdl_base_addr: UTP Task Management Descriptor base address
478 * @ucdl_dma_addr: UFS Command Descriptor DMA address
479 * @utrdl_dma_addr: UTRDL DMA address
480 * @utmrdl_dma_addr: UTMRDL DMA address
481 * @host: Scsi_Host instance of the driver
482 * @dev: device handle
483 * @lrb: local reference block
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530484 * @lrb_in_use: lrb in use
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530485 * @outstanding_tasks: Bits representing outstanding task requests
486 * @outstanding_reqs: Bits representing outstanding transfer requests
487 * @capabilities: UFS Controller Capabilities
488 * @nutrs: Transfer Request Queue depth supported by controller
489 * @nutmrs: Task Management Queue depth supported by controller
490 * @ufs_version: UFS Version to which controller complies
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300491 * @vops: pointer to variant specific operations
492 * @priv: pointer to variant specific private data
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530493 * @irq: Irq number of the controller
494 * @active_uic_cmd: handle of active UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +0530495 * @uic_cmd_mutex: mutex for uic command
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530496 * @tm_wq: wait queue for task management
497 * @tm_tag_wq: wait queue for free task management slots
498 * @tm_slots_in_use: bit map of task management request slots in use
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +0530499 * @pwr_done: completion for power mode change
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530500 * @tm_condition: condition variable for task management
501 * @ufshcd_state: UFSHCD states
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530502 * @eh_flags: Error handling flags
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530503 * @intr_mask: Interrupt Mask Bits
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530504 * @ee_ctrl_mask: Exception event control mask
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300505 * @is_powered: flag to check if HBA is powered
Yaniv Gardi3a4bf062014-09-25 15:32:27 +0300506 * @is_init_prefetch: flag to check if data was pre-fetched in initialization
507 * @init_prefetch_data: data pre-fetched during initialization
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530508 * @eh_work: Worker to handle UFS errors that require s/w attention
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530509 * @eeh_work: Worker to handle exception events
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530510 * @errors: HBA errors
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530511 * @uic_error: UFS interconnect layer error status
512 * @saved_err: sticky error mask
513 * @saved_uic_err: sticky UIC error mask
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530514 * @dev_cmd: ufs device management command information
Yaniv Gardicad2e032015-03-31 17:37:14 +0300515 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530516 * @auto_bkops_enabled: to track whether bkops is enabled in device
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +0300517 * @vreg_info: UFS device voltage regulator information
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300518 * @clk_list_head: UFS host controller clocks list node head
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300519 * @pwr_info: holds current power mode
520 * @max_pwr_info: keeps the device max valid pwm
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +0000521 * @desc_size: descriptor sizes reported by device
Yaniv Gardiafdfff52016-03-10 17:37:15 +0200522 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
523 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
524 * device is known or not.
Subhash Jadavani38135532018-05-03 16:37:18 +0530525 * @scsi_block_reqs_cnt: reference counting for scsi block requests
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530526 */
527struct ufs_hba {
528 void __iomem *mmio_base;
529
530 /* Virtual memory reference */
531 struct utp_transfer_cmd_desc *ucdl_base_addr;
532 struct utp_transfer_req_desc *utrdl_base_addr;
533 struct utp_task_req_desc *utmrdl_base_addr;
534
535 /* DMA memory reference */
536 dma_addr_t ucdl_dma_addr;
537 dma_addr_t utrdl_dma_addr;
538 dma_addr_t utmrdl_dma_addr;
539
540 struct Scsi_Host *host;
541 struct device *dev;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +0300542 /*
543 * This field is to keep a reference to "scsi_device" corresponding to
544 * "UFS device" W-LU.
545 */
546 struct scsi_device *sdev_ufs_device;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530547
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300548 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
549 enum uic_link_state uic_link_state;
550 /* Desired UFS power management level during runtime PM */
551 enum ufs_pm_level rpm_lvl;
552 /* Desired UFS power management level during system PM */
553 enum ufs_pm_level spm_lvl;
subhashj@codeaurora.org09690d52016-12-22 18:41:00 -0800554 struct device_attribute rpm_lvl_attr;
555 struct device_attribute spm_lvl_attr;
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300556 int pm_op_in_progress;
557
Adrian Hunterad448372018-03-20 15:07:38 +0200558 /* Auto-Hibernate Idle Timer register value */
559 u32 ahit;
560
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530561 struct ufshcd_lrb *lrb;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530562 unsigned long lrb_in_use;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530563
564 unsigned long outstanding_tasks;
565 unsigned long outstanding_reqs;
566
567 u32 capabilities;
568 int nutrs;
569 int nutmrs;
570 u32 ufs_version;
Arnd Bergmann176eb922019-03-04 20:39:11 +0100571 const struct ufs_hba_variant_ops *vops;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300572 void *priv;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530573 unsigned int irq;
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300574 bool is_irq_enabled;
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +0530575 enum ufs_ref_clk_freq dev_ref_clk_freq;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530576
Yaniv Gardib8521902015-05-17 18:54:57 +0300577 /* Interrupt aggregation support is broken */
Alim Akhtarcc816412017-10-03 20:51:22 +0530578 #define UFSHCD_QUIRK_BROKEN_INTR_AGGR 0x1
Yaniv Gardib8521902015-05-17 18:54:57 +0300579
Yaniv Gardicad2e032015-03-31 17:37:14 +0300580 /*
581 * delay before each dme command is required as the unipro
582 * layer has shown instabilities
583 */
Alim Akhtarcc816412017-10-03 20:51:22 +0530584 #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS 0x2
Yaniv Gardib8521902015-05-17 18:54:57 +0300585
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +0300586 /*
587 * If UFS host controller is having issue in processing LCC (Line
588 * Control Command) coming from device then enable this quirk.
589 * When this quirk is enabled, host controller driver should disable
590 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
591 * attribute of device to 0).
592 */
Alim Akhtarcc816412017-10-03 20:51:22 +0530593 #define UFSHCD_QUIRK_BROKEN_LCC 0x4
Yaniv Gardicad2e032015-03-31 17:37:14 +0300594
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +0300595 /*
596 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
597 * inbound Link supports unterminated line in HS mode. Setting this
598 * attribute to 1 fixes moving to HS gear.
599 */
Alim Akhtarcc816412017-10-03 20:51:22 +0530600 #define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP 0x8
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +0300601
Yaniv Gardi874237f2015-05-17 18:55:03 +0300602 /*
603 * This quirk needs to be enabled if the host contoller only allows
604 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
605 * SLOW AUTO).
606 */
Alim Akhtarcc816412017-10-03 20:51:22 +0530607 #define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE 0x10
Yaniv Gardi874237f2015-05-17 18:55:03 +0300608
Yaniv Gardi9949e702015-05-17 18:55:05 +0300609 /*
610 * This quirk needs to be enabled if the host contoller doesn't
611 * advertise the correct version in UFS_VER register. If this quirk
612 * is enabled, standard UFS host driver will call the vendor specific
613 * ops (get_ufs_hci_version) to get the correct version.
614 */
Alim Akhtarcc816412017-10-03 20:51:22 +0530615 #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION 0x20
Yaniv Gardi9949e702015-05-17 18:55:05 +0300616
Kiwoong Kim75b1cc42016-11-22 17:06:59 +0900617 /*
618 * This quirk needs to be enabled if the host contoller regards
619 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
620 */
Alim Akhtarcc816412017-10-03 20:51:22 +0530621 #define UFSHCD_QUIRK_PRDT_BYTE_GRAN 0x80
Kiwoong Kim75b1cc42016-11-22 17:06:59 +0900622
Alim Akhtar1399c5b2018-05-06 15:44:15 +0530623 /*
624 * Clear handling for transfer/task request list is just opposite.
625 */
626 #define UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR 0x100
627
Alim Akhtar5ac6abc2018-05-06 15:44:16 +0530628 /*
629 * This quirk needs to be enabled if host controller doesn't allow
630 * that the interrupt aggregation timer and counter are reset by s/w.
631 */
632 #define UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR 0x200
633
Alim Akhtar4404c5d2018-05-06 15:44:17 +0530634 /*
635 * This quirks needs to be enabled if host controller cannot be
636 * enabled via HCE register.
637 */
638 #define UFSHCI_QUIRK_BROKEN_HCE 0x400
Yaniv Gardicad2e032015-03-31 17:37:14 +0300639 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +0530640
Yaniv Gardic58ab7a2016-03-10 17:37:10 +0200641 /* Device deviations from standard UFS device spec. */
642 unsigned int dev_quirks;
643
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530644 wait_queue_head_t tm_wq;
645 wait_queue_head_t tm_tag_wq;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530646 unsigned long tm_condition;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530647 unsigned long tm_slots_in_use;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530648
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300649 struct uic_command *active_uic_cmd;
650 struct mutex uic_cmd_mutex;
651 struct completion *uic_async_done;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +0530652
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530653 u32 ufshcd_state;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530654 u32 eh_flags;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530655 u32 intr_mask;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530656 u16 ee_ctrl_mask;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300657 bool is_powered;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +0300658 bool is_init_prefetch;
659 struct ufs_init_prefetch init_prefetch_data;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530660
661 /* Work Queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530662 struct work_struct eh_work;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530663 struct work_struct eeh_work;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530664
665 /* HBA Errors */
666 u32 errors;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530667 u32 uic_error;
668 u32 saved_err;
669 u32 saved_uic_err;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800670 struct ufs_stats ufs_stats;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530671
672 /* Device management request data */
673 struct ufs_dev_cmd dev_cmd;
Yaniv Gardicad2e032015-03-31 17:37:14 +0300674 ktime_t last_dme_cmd_tstamp;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530675
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300676 /* Keeps information of the UFS device connected to this host */
677 struct ufs_dev_info dev_info;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530678 bool auto_bkops_enabled;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +0300679 struct ufs_vreg_info vreg_info;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300680 struct list_head clk_list_head;
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300681
682 bool wlun_dev_clr_ua;
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300683
Gilad Broner7fabb772017-02-03 16:56:50 -0800684 /* Number of requests aborts */
685 int req_abort_count;
686
Yaniv Gardi54b879b2016-03-10 17:37:05 +0200687 /* Number of lanes available (1 or 2) for Rx/Tx */
688 u32 lanes_per_direction;
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300689 struct ufs_pa_layer_attr pwr_info;
690 struct ufs_pwr_mode_info max_pwr_info;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300691
692 struct ufs_clk_gating clk_gating;
693 /* Control to enable/disable host capabilities */
694 u32 caps;
695 /* Allow dynamic clk gating */
696#define UFSHCD_CAP_CLK_GATING (1 << 0)
697 /* Allow hiberb8 with clk gating */
698#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
Sahitya Tummala856b3482014-09-25 15:32:34 +0300699 /* Allow dynamic clk scaling */
700#define UFSHCD_CAP_CLK_SCALING (1 << 2)
Subhash Jadavani374a2462014-09-25 15:32:35 +0300701 /* Allow auto bkops to enabled during runtime suspend */
702#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
Yaniv Gardib8521902015-05-17 18:54:57 +0300703 /*
704 * This capability allows host controller driver to use the UFS HCI's
705 * interrupt aggregation capability.
706 * CAUTION: Enabling this might reduce overall UFS throughput.
707 */
708#define UFSHCD_CAP_INTR_AGGR (1 << 4)
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -0800709 /*
710 * This capability allows the device auto-bkops to be always enabled
711 * except during suspend (both runtime and suspend).
712 * Enabling this capability means that device will always be allowed
713 * to do background operation when it's active but it might degrade
714 * the performance of ongoing read/write operations.
715 */
716#define UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND (1 << 5)
Sahitya Tummala856b3482014-09-25 15:32:34 +0300717
718 struct devfreq *devfreq;
719 struct ufs_clk_scaling clk_scaling;
Dolev Ravive7850602014-09-25 15:32:36 +0300720 bool is_sys_suspended;
Yaniv Gardiafdfff52016-03-10 17:37:15 +0200721
722 enum bkops_status urgent_bkops_lvl;
723 bool is_urgent_bkops_lvl_checked;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800724
725 struct rw_semaphore clk_scaling_lock;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +0000726 struct ufs_desc_size desc_size;
Subhash Jadavani38135532018-05-03 16:37:18 +0530727 atomic_t scsi_block_reqs_cnt;
Avri Altmandf032bf2018-10-07 17:30:35 +0300728
729 struct device bsg_dev;
730 struct request_queue *bsg_queue;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530731};
732
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300733/* Returns true if clocks can be gated. Otherwise false */
734static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
735{
736 return hba->caps & UFSHCD_CAP_CLK_GATING;
737}
738static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
739{
740 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
741}
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800742static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
Sahitya Tummala856b3482014-09-25 15:32:34 +0300743{
744 return hba->caps & UFSHCD_CAP_CLK_SCALING;
745}
Subhash Jadavani374a2462014-09-25 15:32:35 +0300746static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
747{
748 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
749}
750
Yaniv Gardib8521902015-05-17 18:54:57 +0300751static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
752{
Joao Pinto4b9ffb52016-05-11 12:21:30 +0100753/* DWC UFS Core has the Interrupt aggregation feature but is not detectable*/
754#ifndef CONFIG_SCSI_UFS_DWC
Yaniv Gardib8521902015-05-17 18:54:57 +0300755 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
756 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
757 return true;
758 else
759 return false;
Joao Pinto4b9ffb52016-05-11 12:21:30 +0100760#else
761return true;
762#endif
Yaniv Gardib8521902015-05-17 18:54:57 +0300763}
764
Stanley Chuee5f1042019-05-21 14:44:52 +0800765static inline bool ufshcd_is_auto_hibern8_supported(struct ufs_hba *hba)
766{
767 return (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT);
768}
769
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530770#define ufshcd_writel(hba, val, reg) \
771 writel((val), (hba)->mmio_base + (reg))
772#define ufshcd_readl(hba, reg) \
773 readl((hba)->mmio_base + (reg))
774
Dolev Ravive7850602014-09-25 15:32:36 +0300775/**
776 * ufshcd_rmwl - read modify write into a register
777 * @hba - per adapter instance
778 * @mask - mask to apply on read value
779 * @val - actual value to write
780 * @reg - register address
781 */
782static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
783{
784 u32 tmp;
785
786 tmp = ufshcd_readl(hba, reg);
787 tmp &= ~mask;
788 tmp |= (val & mask);
789 ufshcd_writel(hba, tmp, reg);
790}
791
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300792int ufshcd_alloc_host(struct device *, struct ufs_hba **);
Yaniv Gardi47555a52015-10-28 13:15:49 +0200793void ufshcd_dealloc_host(struct ufs_hba *);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300794int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530795void ufshcd_remove(struct ufs_hba *);
Yaniv Gardi596585a2016-03-10 17:37:08 +0200796int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
797 u32 val, unsigned long interval_us,
798 unsigned long timeout_ms, bool can_sleep);
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +0530799void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk);
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530800
Dolev Raviv68078d52013-07-30 00:35:58 +0530801static inline void check_upiu_size(void)
802{
803 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
804 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
805}
806
Yaniv Gardi1ce58982015-10-28 13:15:47 +0200807/**
808 * ufshcd_set_variant - set variant specific data to the hba
809 * @hba - per adapter instance
810 * @variant - pointer to variant specific data
811 */
812static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
813{
814 BUG_ON(!hba);
815 hba->priv = variant;
816}
817
818/**
819 * ufshcd_get_variant - get variant specific data from the hba
820 * @hba - per adapter instance
821 */
822static inline void *ufshcd_get_variant(struct ufs_hba *hba)
823{
824 BUG_ON(!hba);
825 return hba->priv;
826}
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -0800827static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
828 struct ufs_hba *hba)
829{
830 return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
831}
Yaniv Gardi1ce58982015-10-28 13:15:47 +0200832
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530833extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
834extern int ufshcd_runtime_resume(struct ufs_hba *hba);
835extern int ufshcd_runtime_idle(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300836extern int ufshcd_system_suspend(struct ufs_hba *hba);
837extern int ufshcd_system_resume(struct ufs_hba *hba);
838extern int ufshcd_shutdown(struct ufs_hba *hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530839extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
840 u8 attr_set, u32 mib_val, u8 peer);
841extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
842 u32 *mib_val, u8 peer);
Alim Akhtar0d846e72018-05-06 15:44:18 +0530843extern int ufshcd_config_pwr_mode(struct ufs_hba *hba,
844 struct ufs_pa_layer_attr *desired_pwr_mode);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530845
846/* UIC command interfaces for DME primitives */
847#define DME_LOCAL 0
848#define DME_PEER 1
849#define ATTR_SET_NOR 0 /* NORMAL */
850#define ATTR_SET_ST 1 /* STATIC */
851
852static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
853 u32 mib_val)
854{
855 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
856 mib_val, DME_LOCAL);
857}
858
859static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
860 u32 mib_val)
861{
862 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
863 mib_val, DME_LOCAL);
864}
865
866static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
867 u32 mib_val)
868{
869 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
870 mib_val, DME_PEER);
871}
872
873static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
874 u32 mib_val)
875{
876 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
877 mib_val, DME_PEER);
878}
879
880static inline int ufshcd_dme_get(struct ufs_hba *hba,
881 u32 attr_sel, u32 *mib_val)
882{
883 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
884}
885
886static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
887 u32 attr_sel, u32 *mib_val)
888{
889 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
890}
891
Yaniv Gardif37aabc2016-03-10 17:37:20 +0200892static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
893{
894 return (pwr_info->pwr_rx == FAST_MODE ||
895 pwr_info->pwr_rx == FASTAUTO_MODE) &&
896 (pwr_info->pwr_tx == FAST_MODE ||
897 pwr_info->pwr_tx == FASTAUTO_MODE);
898}
899
Yaniv Gardidc3c8d32016-02-01 15:02:46 +0200900/* Expose Query-Request API */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +0200901int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
902 enum query_opcode opcode,
903 enum desc_idn idn, u8 index,
904 u8 selector,
905 u8 *desc_buf, int *buf_len);
Stanislav Nijnikov45bced82018-02-15 14:14:02 +0200906int ufshcd_read_desc_param(struct ufs_hba *hba,
907 enum desc_idn desc_id,
908 int desc_index,
909 u8 param_offset,
910 u8 *param_read_buf,
911 u8 param_size);
Stanislav Nijnikovec92b592018-02-15 14:14:11 +0200912int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
913 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val);
Yaniv Gardidc3c8d32016-02-01 15:02:46 +0200914int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
915 enum flag_idn idn, bool *flag_res);
Stanislav Nijnikov2238d312018-02-15 14:14:07 +0200916int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index,
917 u8 *buf, u32 size, bool ascii);
918
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300919int ufshcd_hold(struct ufs_hba *hba, bool async);
920void ufshcd_release(struct ufs_hba *hba);
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +0000921
922int ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
923 int *desc_length);
924
Yaniv Gardi37113102016-03-10 17:37:16 +0200925u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200926
Avri Altmane77044c52018-10-07 17:30:39 +0300927int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd);
928
Avri Altman5e0a86e2018-10-07 17:30:37 +0300929int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
930 struct utp_upiu_req *req_upiu,
931 struct utp_upiu_req *rsp_upiu,
932 int msgcode,
933 u8 *desc_buff, int *buff_len,
934 enum query_opcode desc_op);
935
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200936/* Wrapper functions for safely calling variant operations */
937static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
938{
939 if (hba->vops)
940 return hba->vops->name;
941 return "";
942}
943
944static inline int ufshcd_vops_init(struct ufs_hba *hba)
945{
946 if (hba->vops && hba->vops->init)
947 return hba->vops->init(hba);
948
949 return 0;
950}
951
952static inline void ufshcd_vops_exit(struct ufs_hba *hba)
953{
954 if (hba->vops && hba->vops->exit)
955 return hba->vops->exit(hba);
956}
957
958static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
959{
960 if (hba->vops && hba->vops->get_ufs_hci_version)
961 return hba->vops->get_ufs_hci_version(hba);
962
963 return ufshcd_readl(hba, REG_UFS_VERSION);
964}
965
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200966static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
967 bool up, enum ufs_notify_change_status status)
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200968{
969 if (hba->vops && hba->vops->clk_scale_notify)
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200970 return hba->vops->clk_scale_notify(hba, up, status);
971 return 0;
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200972}
973
Subhash Jadavani1e879e82016-10-06 21:48:22 -0700974static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
975 enum ufs_notify_change_status status)
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200976{
977 if (hba->vops && hba->vops->setup_clocks)
Subhash Jadavani1e879e82016-10-06 21:48:22 -0700978 return hba->vops->setup_clocks(hba, on, status);
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200979 return 0;
980}
981
982static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
983{
984 if (hba->vops && hba->vops->setup_regulators)
985 return hba->vops->setup_regulators(hba, status);
986
987 return 0;
988}
989
990static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
991 bool status)
992{
993 if (hba->vops && hba->vops->hce_enable_notify)
994 return hba->vops->hce_enable_notify(hba, status);
995
996 return 0;
997}
998static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
999 bool status)
1000{
1001 if (hba->vops && hba->vops->link_startup_notify)
1002 return hba->vops->link_startup_notify(hba, status);
1003
1004 return 0;
1005}
1006
1007static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
1008 bool status,
1009 struct ufs_pa_layer_attr *dev_max_params,
1010 struct ufs_pa_layer_attr *dev_req_params)
1011{
1012 if (hba->vops && hba->vops->pwr_change_notify)
1013 return hba->vops->pwr_change_notify(hba, status,
1014 dev_max_params, dev_req_params);
1015
1016 return -ENOTSUPP;
1017}
1018
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09001019static inline void ufshcd_vops_setup_xfer_req(struct ufs_hba *hba, int tag,
1020 bool is_scsi_cmd)
1021{
1022 if (hba->vops && hba->vops->setup_xfer_req)
1023 return hba->vops->setup_xfer_req(hba, tag, is_scsi_cmd);
1024}
1025
Kiwoong Kimd2877be2016-11-10 21:16:15 +09001026static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
1027 int tag, u8 tm_function)
1028{
1029 if (hba->vops && hba->vops->setup_task_mgmt)
1030 return hba->vops->setup_task_mgmt(hba, tag, tm_function);
1031}
1032
Kiwoong Kimee32c902016-11-10 21:17:43 +09001033static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
1034 enum uic_cmd_dme cmd,
1035 enum ufs_notify_change_status status)
1036{
1037 if (hba->vops && hba->vops->hibern8_notify)
1038 return hba->vops->hibern8_notify(hba, cmd, status);
1039}
1040
Subhash Jadavani56d4a182016-12-05 19:25:32 -08001041static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
1042{
1043 if (hba->vops && hba->vops->apply_dev_quirks)
1044 return hba->vops->apply_dev_quirks(hba);
1045 return 0;
1046}
1047
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02001048static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
1049{
1050 if (hba->vops && hba->vops->suspend)
1051 return hba->vops->suspend(hba, op);
1052
1053 return 0;
1054}
1055
1056static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
1057{
1058 if (hba->vops && hba->vops->resume)
1059 return hba->vops->resume(hba, op);
1060
1061 return 0;
1062}
1063
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001064static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
1065{
1066 if (hba->vops && hba->vops->dbg_register_dump)
1067 hba->vops->dbg_register_dump(hba);
1068}
1069
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02001070extern struct ufs_pm_lvl_states ufs_pm_lvl_states[];
1071
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02001072/*
1073 * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
1074 * @scsi_lun: scsi LUN id
1075 *
1076 * Returns UPIU LUN id
1077 */
1078static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
1079{
1080 if (scsi_is_wlun(scsi_lun))
1081 return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
1082 | UFS_UPIU_WLUN_ID;
1083 else
1084 return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
1085}
1086
Tomas Winklerba809172018-06-14 11:14:09 +03001087int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
1088 const char *prefix);
1089
Vinayak Holikattie0eca632013-02-25 21:44:33 +05301090#endif /* End of Header */