Dave Airlie | c0e0920 | 2008-05-29 10:09:59 +1000 | [diff] [blame] | 1 | # |
2 | # Makefile for the drm device driver. This driver provides support for the | ||||
3 | # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. | ||||
4 | |||||
Chris Wilson | 0a793ad | 2016-04-13 17:35:00 +0100 | [diff] [blame] | 5 | subdir-ccflags-$(CONFIG_DRM_I915_WERROR) := -Werror |
Chris Wilson | 0b1de5d | 2016-08-12 12:39:59 +0100 | [diff] [blame] | 6 | subdir-ccflags-y += \ |
7 | $(call as-instr,movntdqa (%eax)$(comma)%xmm0,-DCONFIG_AS_MOVNTDQA) | ||||
Chris Wilson | 0a793ad | 2016-04-13 17:35:00 +0100 | [diff] [blame] | 8 | |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 9 | # Please keep these build lists sorted! |
10 | |||||
11 | # core driver code | ||||
12 | i915-y := i915_drv.o \ | ||||
Daniel Vetter | 042794b | 2015-07-24 13:55:10 +0200 | [diff] [blame] | 13 | i915_irq.o \ |
Chris Wilson | 0b1de5d | 2016-08-12 12:39:59 +0100 | [diff] [blame] | 14 | i915_memcpy.o \ |
Chris Wilson | c58305a | 2016-08-19 16:54:28 +0100 | [diff] [blame] | 15 | i915_mm.o \ |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 16 | i915_params.o \ |
Chris Wilson | 42f5551 | 2016-06-24 14:00:26 +0100 | [diff] [blame] | 17 | i915_pci.o \ |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 18 | i915_suspend.o \ |
Chris Wilson | 4797948 | 2017-05-03 10:39:21 +0100 | [diff] [blame] | 19 | i915_syncmap.o \ |
Chris Wilson | e68a139 | 2016-09-09 14:11:41 +0100 | [diff] [blame] | 20 | i915_sw_fence.o \ |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 21 | i915_sysfs.o \ |
Daniel Vetter | 042794b | 2015-07-24 13:55:10 +0200 | [diff] [blame] | 22 | intel_csr.o \ |
Chris Wilson | 94b4f3b | 2016-07-05 10:40:20 +0100 | [diff] [blame] | 23 | intel_device_info.o \ |
Daniel Vetter | 9c065a7 | 2014-09-30 10:56:38 +0200 | [diff] [blame] | 24 | intel_pm.o \ |
Daniel Vetter | 042794b | 2015-07-24 13:55:10 +0200 | [diff] [blame] | 25 | intel_runtime_pm.o |
Daniel Vetter | 9c065a7 | 2014-09-30 10:56:38 +0200 | [diff] [blame] | 26 | |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 27 | i915-$(CONFIG_COMPAT) += i915_ioc32.o |
Tomeu Vizoso | 731035f | 2016-12-12 13:29:48 +0100 | [diff] [blame] | 28 | i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o intel_pipe_crc.o |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 29 | |
30 | # GEM code | ||||
31 | i915-y += i915_cmd_parser.o \ | ||||
Brad Volkin | 493018d | 2014-12-11 12:13:08 -0800 | [diff] [blame] | 32 | i915_gem_batch_pool.o \ |
Chris Wilson | 57822dc | 2017-02-22 11:40:48 +0000 | [diff] [blame] | 33 | i915_gem_clflush.o \ |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 34 | i915_gem_context.o \ |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 35 | i915_gem_dmabuf.o \ |
Chris Wilson | b47eb4a | 2010-08-07 11:01:23 +0100 | [diff] [blame] | 36 | i915_gem_evict.o \ |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 37 | i915_gem_execbuffer.o \ |
Joonas Lahtinen | b42fe9c | 2016-11-11 12:43:54 +0200 | [diff] [blame] | 38 | i915_gem_fence_reg.o \ |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 39 | i915_gem_gtt.o \ |
Chris Wilson | 920cf41 | 2016-10-28 13:58:30 +0100 | [diff] [blame] | 40 | i915_gem_internal.o \ |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 41 | i915_gem.o \ |
Chris Wilson | b8f55be | 2017-08-11 12:11:16 +0100 | [diff] [blame^] | 42 | i915_gem_object.o \ |
Daniel Vetter | 042794b | 2015-07-24 13:55:10 +0200 | [diff] [blame] | 43 | i915_gem_render_state.o \ |
Chris Wilson | 05235c5 | 2016-07-20 09:21:08 +0100 | [diff] [blame] | 44 | i915_gem_request.o \ |
Daniel Vetter | be6a037 | 2015-03-18 10:46:04 +0100 | [diff] [blame] | 45 | i915_gem_shrinker.o \ |
Chris Wilson | 9797fbf | 2012-04-24 15:47:39 +0100 | [diff] [blame] | 46 | i915_gem_stolen.o \ |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 47 | i915_gem_tiling.o \ |
Chris Wilson | 73cb970 | 2016-10-28 13:58:46 +0100 | [diff] [blame] | 48 | i915_gem_timeline.o \ |
Chris Wilson | 5cc9ed4 | 2014-05-16 14:22:37 +0100 | [diff] [blame] | 49 | i915_gem_userptr.o \ |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 50 | i915_trace_points.o \ |
Joonas Lahtinen | b42fe9c | 2016-11-11 12:43:54 +0200 | [diff] [blame] | 51 | i915_vma.o \ |
Chris Wilson | 688e6c7 | 2016-07-01 17:23:15 +0100 | [diff] [blame] | 52 | intel_breadcrumbs.o \ |
Tvrtko Ursulin | 88d2ba2 | 2016-07-13 16:03:40 +0100 | [diff] [blame] | 53 | intel_engine_cs.o \ |
Mika Kuoppala | 3ac168a | 2016-11-01 18:43:03 +0200 | [diff] [blame] | 54 | intel_hangcheck.o \ |
Oscar Mateo | b20385f | 2014-07-24 17:04:10 +0100 | [diff] [blame] | 55 | intel_lrc.o \ |
Peter Antoine | 3bbaba0 | 2015-07-10 20:13:11 +0300 | [diff] [blame] | 56 | intel_mocs.o \ |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 57 | intel_ringbuffer.o \ |
58 | intel_uncore.o | ||||
59 | |||||
Alex Dai | 33a732f | 2015-08-12 15:43:36 +0100 | [diff] [blame] | 60 | # general-purpose microcontroller (GuC) support |
Arkadiusz Hiler | 2d803c2 | 2016-11-25 18:59:35 +0100 | [diff] [blame] | 61 | i915-y += intel_uc.o \ |
Michal Wajdeczko | f8a58d6 | 2017-05-26 11:13:25 +0000 | [diff] [blame] | 62 | intel_guc_ct.o \ |
Michal Wajdeczko | f9cda04 | 2017-01-13 17:41:57 +0000 | [diff] [blame] | 63 | intel_guc_log.o \ |
Arkadiusz Hiler | 2d803c2 | 2016-11-25 18:59:35 +0100 | [diff] [blame] | 64 | intel_guc_loader.o \ |
Anusha Srivatsa | bd13285 | 2017-01-18 08:05:53 -0800 | [diff] [blame] | 65 | intel_huc.o \ |
Alex Dai | bac427f | 2015-08-12 15:43:39 +0100 | [diff] [blame] | 66 | i915_guc_submission.o |
Alex Dai | 33a732f | 2015-08-12 15:43:36 +0100 | [diff] [blame] | 67 | |
Mika Kuoppala | 9d0a6fa | 2014-05-14 17:02:16 +0300 | [diff] [blame] | 68 | # autogenerated null render state |
69 | i915-y += intel_renderstate_gen6.o \ | ||||
70 | intel_renderstate_gen7.o \ | ||||
Armin Reese | ff7a60f | 2014-10-23 08:34:28 -0700 | [diff] [blame] | 71 | intel_renderstate_gen8.o \ |
72 | intel_renderstate_gen9.o | ||||
Mika Kuoppala | 9d0a6fa | 2014-05-14 17:02:16 +0300 | [diff] [blame] | 73 | |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 74 | # modesetting core code |
Jani Nikula | 7c10a2b | 2014-10-27 16:26:43 +0200 | [diff] [blame] | 75 | i915-y += intel_audio.o \ |
Daniel Vetter | 042794b | 2015-07-24 13:55:10 +0200 | [diff] [blame] | 76 | intel_atomic.o \ |
77 | intel_atomic_plane.o \ | ||||
Jani Nikula | 7c10a2b | 2014-10-27 16:26:43 +0200 | [diff] [blame] | 78 | intel_bios.o \ |
Ville Syrjälä | 7ff89ca | 2017-02-07 20:33:05 +0200 | [diff] [blame] | 79 | intel_cdclk.o \ |
Lionel Landwerlin | 8563b1e | 2016-03-16 10:57:14 +0000 | [diff] [blame] | 80 | intel_color.o \ |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 81 | intel_display.o \ |
Ander Conselvan de Oliveira | b7fa22d | 2016-04-27 15:44:17 +0300 | [diff] [blame] | 82 | intel_dpio_phy.o \ |
Ander Conselvan de Oliveira | 7abd4b3 | 2016-03-08 17:46:15 +0200 | [diff] [blame] | 83 | intel_dpll_mgr.o \ |
Rodrigo Vivi | 7ff0ebc | 2014-12-08 14:09:10 -0200 | [diff] [blame] | 84 | intel_fbc.o \ |
Daniel Vetter | 47339cd | 2014-09-30 10:56:46 +0200 | [diff] [blame] | 85 | intel_fifo_underrun.o \ |
Daniel Vetter | b680c37 | 2014-09-19 18:27:27 +0200 | [diff] [blame] | 86 | intel_frontbuffer.o \ |
Daniel Vetter | 042794b | 2015-07-24 13:55:10 +0200 | [diff] [blame] | 87 | intel_hotplug.o \ |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 88 | intel_modes.o \ |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 89 | intel_overlay.o \ |
Rodrigo Vivi | 0bc12bc | 2014-11-14 08:52:28 -0800 | [diff] [blame] | 90 | intel_psr.o \ |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 91 | intel_sideband.o \ |
92 | intel_sprite.o | ||||
Daniel Vetter | e19b913 | 2014-03-18 09:43:56 +0100 | [diff] [blame] | 93 | i915-$(CONFIG_ACPI) += intel_acpi.o intel_opregion.o |
Daniel Vetter | 0695726 | 2015-08-10 13:34:08 +0200 | [diff] [blame] | 94 | i915-$(CONFIG_DRM_FBDEV_EMULATION) += intel_fbdev.o |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 95 | |
96 | # modesetting output/encoder code | ||||
97 | i915-y += dvo_ch7017.o \ | ||||
98 | dvo_ch7xxx.o \ | ||||
99 | dvo_ivch.o \ | ||||
100 | dvo_ns2501.o \ | ||||
101 | dvo_sil164.o \ | ||||
102 | dvo_tfp410.o \ | ||||
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 103 | intel_crt.o \ |
Eugeni Dodonov | 45244b8 | 2012-05-09 15:37:20 -0300 | [diff] [blame] | 104 | intel_ddi.o \ |
Yetunde Adebisi | e7156c8 | 2016-04-05 15:10:52 +0100 | [diff] [blame] | 105 | intel_dp_aux_backlight.o \ |
Ander Conselvan de Oliveira | 94223d0 | 2015-10-23 13:01:48 +0300 | [diff] [blame] | 106 | intel_dp_link_training.o \ |
Dave Airlie | 0e32b39 | 2014-05-02 14:02:48 +1000 | [diff] [blame] | 107 | intel_dp_mst.o \ |
Daniel Vetter | 042794b | 2015-07-24 13:55:10 +0200 | [diff] [blame] | 108 | intel_dp.o \ |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 109 | intel_dsi.o \ |
Jani Nikula | 9019835 | 2016-04-26 16:14:25 +0300 | [diff] [blame] | 110 | intel_dsi_dcs_backlight.o \ |
Daniel Vetter | 042794b | 2015-07-24 13:55:10 +0200 | [diff] [blame] | 111 | intel_dsi_pll.o \ |
Jani Nikula | 5431fc0 | 2017-03-06 16:31:29 +0200 | [diff] [blame] | 112 | intel_dsi_vbt.o \ |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 113 | intel_dvo.o \ |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 114 | intel_hdmi.o \ |
115 | intel_i2c.o \ | ||||
Shashank Sharma | dbe9e61 | 2016-10-14 19:56:49 +0530 | [diff] [blame] | 116 | intel_lspcon.o \ |
Daniel Vetter | 2fae6a8 | 2014-03-07 09:17:21 +0100 | [diff] [blame] | 117 | intel_lvds.o \ |
118 | intel_panel.o \ | ||||
119 | intel_sdvo.o \ | ||||
120 | intel_tv.o | ||||
Dave Airlie | c0e0920 | 2008-05-29 10:09:59 +1000 | [diff] [blame] | 121 | |
Chris Wilson | 98a2f41 | 2016-10-12 10:05:18 +0100 | [diff] [blame] | 122 | # Post-mortem debug and GPU hang state capture |
123 | i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o | ||||
Chris Wilson | 953c7f8 | 2017-02-13 17:15:12 +0000 | [diff] [blame] | 124 | i915-$(CONFIG_DRM_I915_SELFTEST) += \ |
125 | selftests/i915_random.o \ | ||||
126 | selftests/i915_selftest.o | ||||
Chris Wilson | 98a2f41 | 2016-10-12 10:05:18 +0100 | [diff] [blame] | 127 | |
Yu Zhang | cf9d289 | 2015-02-10 19:05:47 +0800 | [diff] [blame] | 128 | # virtual gpu code |
129 | i915-y += i915_vgpu.o | ||||
130 | |||||
Robert Bragg | eec688e | 2016-11-07 19:49:47 +0000 | [diff] [blame] | 131 | # perf code |
Robert Bragg | 8a3003d | 2016-11-07 19:49:51 +0000 | [diff] [blame] | 132 | i915-y += i915_perf.o \ |
Robert Bragg | 5182f64 | 2017-06-13 12:23:02 +0100 | [diff] [blame] | 133 | i915_oa_hsw.o \ |
134 | i915_oa_bdw.o \ | ||||
135 | i915_oa_chv.o \ | ||||
136 | i915_oa_sklgt2.o \ | ||||
137 | i915_oa_sklgt3.o \ | ||||
138 | i915_oa_sklgt4.o \ | ||||
Lionel Landwerlin | 6c5c1d8 | 2017-06-13 12:23:08 +0100 | [diff] [blame] | 139 | i915_oa_bxt.o \ |
140 | i915_oa_kblgt2.o \ | ||||
Lionel Landwerlin | 28c7ef9 | 2017-06-13 12:23:09 +0100 | [diff] [blame] | 141 | i915_oa_kblgt3.o \ |
142 | i915_oa_glk.o | ||||
Robert Bragg | eec688e | 2016-11-07 19:49:47 +0000 | [diff] [blame] | 143 | |
Zhi Wang | 0ad35fe | 2016-06-16 08:07:00 -0400 | [diff] [blame] | 144 | ifeq ($(CONFIG_DRM_I915_GVT),y) |
145 | i915-y += intel_gvt.o | ||||
146 | include $(src)/gvt/Makefile | ||||
147 | endif | ||||
148 | |||||
Jerome Anand | eef5732 | 2017-01-25 04:27:49 +0530 | [diff] [blame] | 149 | # LPE Audio for VLV and CHT |
150 | i915-y += intel_lpe_audio.o | ||||
151 | |||||
Chris Wilson | c58305a | 2016-08-19 16:54:28 +0100 | [diff] [blame] | 152 | obj-$(CONFIG_DRM_I915) += i915.o |
Peter Clifton | a7c5427 | 2010-05-03 13:24:41 +0100 | [diff] [blame] | 153 | |
154 | CFLAGS_i915_trace_points.o := -I$(src) |