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Laurent Pinchartcd8968f2014-08-27 18:26:39 +02001* Renesas R-Car Display Unit (DU)
2
3Required Properties:
4
5 - compatible: must be one of the following.
Fabrizio Castrofaf4a3f2017-10-13 16:22:19 +01006 - "renesas,du-r8a7743" for R8A7743 (RZ/G1M) compatible DU
Biju Das5eb08d92018-09-21 19:08:28 +01007 - "renesas,du-r8a7744" for R8A7744 (RZ/G1N) compatible DU
Fabrizio Castrofaf4a3f2017-10-13 16:22:19 +01008 - "renesas,du-r8a7745" for R8A7745 (RZ/G1E) compatible DU
Fabrizio Castroaab2b522018-09-21 19:08:27 +01009 - "renesas,du-r8a77470" for R8A77470 (RZ/G1C) compatible DU
Biju Das2acd1d12019-04-12 13:38:02 +010010 - "renesas,du-r8a774a1" for R8A774A1 (RZ/G2M) compatible DU
Biju Das2d4794f2019-09-30 10:15:02 +010011 - "renesas,du-r8a774b1" for R8A774B1 (RZ/G2N) compatible DU
Fabrizio Castro8c9fde42018-12-13 20:20:45 +000012 - "renesas,du-r8a774c0" for R8A774C0 (RZ/G2E) compatible DU
Laurent Pinchartcd8968f2014-08-27 18:26:39 +020013 - "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU
14 - "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU
Laurent Pinchartf1ceb84a2015-07-17 10:44:33 +030015 - "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU
Sergei Shtylyov73323dd2016-08-04 15:01:02 -070016 - "renesas,du-r8a7792" for R8A7792 (R-Car V2H) compatible DU
Laurent Pinchartf1ceb84a2015-07-17 10:44:33 +030017 - "renesas,du-r8a7793" for R8A7793 (R-Car M2-N) compatible DU
Laurent Pinchart090425c2015-07-17 10:44:33 +030018 - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
Laurent Pinchart2427b302015-09-07 17:34:26 +030019 - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
Laurent Pinchart63b50532016-09-06 02:11:43 +030020 - "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU
Kieran Binghamdc814292018-04-26 17:53:31 +010021 - "renesas,du-r8a77965" for R8A77965 (R-Car M3-N) compatible DU
Sergei Shtylyov88fb4a02018-01-19 00:05:58 +030022 - "renesas,du-r8a77970" for R8A77970 (R-Car V3M) compatible DU
Sergei Shtylyov4ffe5aa2018-06-04 22:04:59 +030023 - "renesas,du-r8a77980" for R8A77980 (R-Car V3H) compatible DU
Laurent Pinchartf48097d2018-08-20 17:07:25 +030024 - "renesas,du-r8a77990" for R8A77990 (R-Car E3) compatible DU
Kieran Binghamb378b352018-02-15 08:38:17 +000025 - "renesas,du-r8a77995" for R8A77995 (R-Car D3) compatible DU
Laurent Pinchartcd8968f2014-08-27 18:26:39 +020026
Laurent Pinchart6d2ca852018-01-10 16:05:46 +020027 - reg: the memory-mapped I/O registers base address and length
Laurent Pinchartcd8968f2014-08-27 18:26:39 +020028
Laurent Pinchartcd8968f2014-08-27 18:26:39 +020029 - interrupts: Interrupt specifiers for the DU interrupts.
30
31 - clocks: A list of phandles + clock-specifier pairs, one for each entry in
32 the clock-names property.
33 - clock-names: Name of the clocks. This property is model-dependent.
34 - R8A7779 uses a single functional clock. The clock doesn't need to be
35 named.
Laurent Pinchart6d2ca852018-01-10 16:05:46 +020036 - All other DU instances use one functional clock per channel The
37 functional clocks must be named "du.x" with "x" being the channel
38 numerical index.
39 - In addition to the functional clocks, all DU versions also support
40 externally supplied pixel clocks. Those clocks are optional. When
41 supplied they must be named "dclkin.x" with "x" being the input clock
42 numerical index.
Laurent Pinchartcd8968f2014-08-27 18:26:39 +020043
Laurent Pinchartfd57d772017-07-12 11:43:36 +030044 - vsps: A list of phandle and channel index tuples to the VSPs that handle
45 the memory interfaces for the DU channels. The phandle identifies the VSP
46 instance that serves the DU channel, and the channel index identifies the
47 LIF instance in that VSP.
Laurent Pinchart06711e62017-03-27 12:51:04 +030048
Jacopo Mondi6e2258b2019-10-16 10:55:42 +020049 - renesas,cmms: A list of phandles to the CMM instances present in the SoC,
50 one for each available DU channel. The property shall not be specified for
51 SoCs that do not provide any CMM (such as V3M and V3H).
52
Laurent Pinchartcd8968f2014-08-27 18:26:39 +020053Required nodes:
54
55The connections to the DU output video ports are modeled using the OF graph
56bindings specified in Documentation/devicetree/bindings/graph.txt.
57
58The following table lists for each supported model the port number
59corresponding to each DU output.
60
Kieran Binghama4af8422018-04-26 17:53:30 +010061 Port0 Port1 Port2 Port3
Laurent Pinchartcd8968f2014-08-27 18:26:39 +020062-----------------------------------------------------------------------------
Kieran Binghama4af8422018-04-26 17:53:30 +010063 R8A7743 (RZ/G1M) DPAD 0 LVDS 0 - -
Biju Das5eb08d92018-09-21 19:08:28 +010064 R8A7744 (RZ/G1N) DPAD 0 LVDS 0 - -
Kieran Binghama4af8422018-04-26 17:53:30 +010065 R8A7745 (RZ/G1E) DPAD 0 DPAD 1 - -
Fabrizio Castroaab2b522018-09-21 19:08:27 +010066 R8A77470 (RZ/G1C) DPAD 0 DPAD 1 LVDS 0 -
Biju Das2acd1d12019-04-12 13:38:02 +010067 R8A774A1 (RZ/G2M) DPAD 0 HDMI 0 LVDS 0 -
Biju Das2d4794f2019-09-30 10:15:02 +010068 R8A774B1 (RZ/G2N) DPAD 0 HDMI 0 LVDS 0 -
Fabrizio Castro8c9fde42018-12-13 20:20:45 +000069 R8A774C0 (RZ/G2E) DPAD 0 LVDS 0 LVDS 1 -
Kieran Binghama4af8422018-04-26 17:53:30 +010070 R8A7779 (R-Car H1) DPAD 0 DPAD 1 - -
71 R8A7790 (R-Car H2) DPAD 0 LVDS 0 LVDS 1 -
72 R8A7791 (R-Car M2-W) DPAD 0 LVDS 0 - -
73 R8A7792 (R-Car V2H) DPAD 0 DPAD 1 - -
74 R8A7793 (R-Car M2-N) DPAD 0 LVDS 0 - -
75 R8A7794 (R-Car E2) DPAD 0 DPAD 1 - -
76 R8A7795 (R-Car H3) DPAD 0 HDMI 0 HDMI 1 LVDS 0
77 R8A7796 (R-Car M3-W) DPAD 0 HDMI 0 LVDS 0 -
Kieran Binghamdc814292018-04-26 17:53:31 +010078 R8A77965 (R-Car M3-N) DPAD 0 HDMI 0 LVDS 0 -
Kieran Binghama4af8422018-04-26 17:53:30 +010079 R8A77970 (R-Car V3M) DPAD 0 LVDS 0 - -
Sergei Shtylyov4ffe5aa2018-06-04 22:04:59 +030080 R8A77980 (R-Car V3H) DPAD 0 LVDS 0 - -
Laurent Pinchartf48097d2018-08-20 17:07:25 +030081 R8A77990 (R-Car E3) DPAD 0 LVDS 0 LVDS 1 -
Kieran Binghama4af8422018-04-26 17:53:30 +010082 R8A77995 (R-Car D3) DPAD 0 LVDS 0 LVDS 1 -
Laurent Pinchartcd8968f2014-08-27 18:26:39 +020083
84
Laurent Pinchartfd57d772017-07-12 11:43:36 +030085Example: R8A7795 (R-Car H3) ES2.0 DU
Laurent Pinchartcd8968f2014-08-27 18:26:39 +020086
Laurent Pinchartfd57d772017-07-12 11:43:36 +030087 du: display@feb00000 {
88 compatible = "renesas,du-r8a7795";
Laurent Pinchart6d2ca852018-01-10 16:05:46 +020089 reg = <0 0xfeb00000 0 0x80000>;
Laurent Pinchartfd57d772017-07-12 11:43:36 +030090 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
91 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
92 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
93 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
94 clocks = <&cpg CPG_MOD 724>,
95 <&cpg CPG_MOD 723>,
96 <&cpg CPG_MOD 722>,
Laurent Pinchart6d2ca852018-01-10 16:05:46 +020097 <&cpg CPG_MOD 721>;
98 clock-names = "du.0", "du.1", "du.2", "du.3";
Laurent Pinchartfd57d772017-07-12 11:43:36 +030099 vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
Jacopo Mondi6e2258b2019-10-16 10:55:42 +0200100 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
Laurent Pinchartcd8968f2014-08-27 18:26:39 +0200101
102 ports {
103 #address-cells = <1>;
104 #size-cells = <0>;
105
106 port@0 {
107 reg = <0>;
108 du_out_rgb: endpoint {
109 };
110 };
111 port@1 {
112 reg = <1>;
Laurent Pinchartfd57d772017-07-12 11:43:36 +0300113 du_out_hdmi0: endpoint {
114 remote-endpoint = <&dw_hdmi0_in>;
Laurent Pinchartcd8968f2014-08-27 18:26:39 +0200115 };
116 };
117 port@2 {
118 reg = <2>;
Laurent Pinchartfd57d772017-07-12 11:43:36 +0300119 du_out_hdmi1: endpoint {
120 remote-endpoint = <&dw_hdmi1_in>;
121 };
122 };
123 port@3 {
124 reg = <3>;
125 du_out_lvds0: endpoint {
Laurent Pinchartcd8968f2014-08-27 18:26:39 +0200126 };
127 };
128 };
129 };