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Sarah Sharp66d4ead2009-04-27 19:52:28 -07001/*
2 * xHCI host controller driver
3 *
4 * Copyright (C) 2008 Intel Corp.
5 *
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
Dong Nguyen43b86af2010-07-21 16:56:08 -070023#include <linux/pci.h>
Sarah Sharp66d4ead2009-04-27 19:52:28 -070024#include <linux/irq.h>
Sarah Sharp8df75f42010-04-02 15:34:16 -070025#include <linux/log2.h>
Sarah Sharp66d4ead2009-04-27 19:52:28 -070026#include <linux/module.h>
Sarah Sharpb0567b32009-08-07 14:04:36 -070027#include <linux/moduleparam.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090028#include <linux/slab.h>
Alexis R. Cortes71c731a2012-08-03 14:00:27 -050029#include <linux/dmi.h>
James Hogan008eb952013-07-26 13:34:43 +010030#include <linux/dma-mapping.h>
Sarah Sharp66d4ead2009-04-27 19:52:28 -070031
32#include "xhci.h"
Xenia Ragiadakou84a99f62013-08-06 00:22:15 +030033#include "xhci-trace.h"
Chunfeng Yun0cbd4b32015-11-24 13:09:55 +020034#include "xhci-mtk.h"
Sarah Sharp66d4ead2009-04-27 19:52:28 -070035
36#define DRIVER_AUTHOR "Sarah Sharp"
37#define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
38
Lu Baolua1377e52014-11-18 11:27:14 +020039#define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
40
Sarah Sharpb0567b32009-08-07 14:04:36 -070041/* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
42static int link_quirk;
43module_param(link_quirk, int, S_IRUGO | S_IWUSR);
44MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
45
Takashi Iwai4e6a1ee2013-12-09 12:42:48 +010046static unsigned int quirks;
47module_param(quirks, uint, S_IRUGO);
48MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
49
Sarah Sharp66d4ead2009-04-27 19:52:28 -070050/* TODO: copied from ehci-hcd.c - can this be refactored? */
51/*
Sarah Sharp2611bd182012-10-25 13:27:51 -070052 * xhci_handshake - spin reading hc until handshake completes or fails
Sarah Sharp66d4ead2009-04-27 19:52:28 -070053 * @ptr: address of hc register to be read
54 * @mask: bits to look at in result of read
55 * @done: value of those bits when handshake succeeds
56 * @usec: timeout in microseconds
57 *
58 * Returns negative errno, or zero on success
59 *
60 * Success happens when the "mask" bits have the specified value (hardware
61 * handshake done). There are two failure modes: "usec" have passed (major
62 * hardware flakeout), or the register reads as all-ones (hardware removed).
63 */
Lin Wangdc0b1772015-01-09 16:06:28 +020064int xhci_handshake(void __iomem *ptr, u32 mask, u32 done, int usec)
Sarah Sharp66d4ead2009-04-27 19:52:28 -070065{
66 u32 result;
67
68 do {
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +020069 result = readl(ptr);
Sarah Sharp66d4ead2009-04-27 19:52:28 -070070 if (result == ~(u32)0) /* card removed */
71 return -ENODEV;
72 result &= mask;
73 if (result == done)
74 return 0;
75 udelay(1);
76 usec--;
77 } while (usec > 0);
78 return -ETIMEDOUT;
79}
80
81/*
Sarah Sharp4f0f0ba2009-10-27 10:56:33 -070082 * Disable interrupts and begin the xHCI halting process.
83 */
84void xhci_quiesce(struct xhci_hcd *xhci)
85{
86 u32 halted;
87 u32 cmd;
88 u32 mask;
89
90 mask = ~(XHCI_IRQS);
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +020091 halted = readl(&xhci->op_regs->status) & STS_HALT;
Sarah Sharp4f0f0ba2009-10-27 10:56:33 -070092 if (!halted)
93 mask &= ~CMD_RUN;
94
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +020095 cmd = readl(&xhci->op_regs->command);
Sarah Sharp4f0f0ba2009-10-27 10:56:33 -070096 cmd &= mask;
Xenia Ragiadakou204b7792013-11-15 05:34:07 +020097 writel(cmd, &xhci->op_regs->command);
Sarah Sharp4f0f0ba2009-10-27 10:56:33 -070098}
99
100/*
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700101 * Force HC into halt state.
102 *
103 * Disable any IRQs and clear the run/stop bit.
104 * HC will complete any current and actively pipelined transactions, and
Andiry Xubdfca502011-01-06 15:43:39 +0800105 * should halt within 16 ms of the run/stop bit being cleared.
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700106 * Read HC Halted bit in the status register to see when the HC is finished.
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700107 */
108int xhci_halt(struct xhci_hcd *xhci)
109{
Sarah Sharpc6cc27c2011-03-11 10:20:58 -0800110 int ret;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300111 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
Sarah Sharp4f0f0ba2009-10-27 10:56:33 -0700112 xhci_quiesce(xhci);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700113
Lin Wangdc0b1772015-01-09 16:06:28 +0200114 ret = xhci_handshake(&xhci->op_regs->status,
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700115 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
Mathias Nyman99154fd2016-11-11 15:13:11 +0200116 if (ret) {
117 xhci_warn(xhci, "Host halt failed, %d\n", ret);
118 return ret;
119 }
120 xhci->xhc_state |= XHCI_STATE_HALTED;
121 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
Sarah Sharpc6cc27c2011-03-11 10:20:58 -0800122 return ret;
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700123}
124
125/*
Sarah Sharped074532010-05-24 13:25:21 -0700126 * Set the run bit and wait for the host to be running.
127 */
Dmitry Torokhov8212a492011-02-08 13:55:59 -0800128static int xhci_start(struct xhci_hcd *xhci)
Sarah Sharped074532010-05-24 13:25:21 -0700129{
130 u32 temp;
131 int ret;
132
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200133 temp = readl(&xhci->op_regs->command);
Sarah Sharped074532010-05-24 13:25:21 -0700134 temp |= (CMD_RUN);
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300135 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
Sarah Sharped074532010-05-24 13:25:21 -0700136 temp);
Xenia Ragiadakou204b7792013-11-15 05:34:07 +0200137 writel(temp, &xhci->op_regs->command);
Sarah Sharped074532010-05-24 13:25:21 -0700138
139 /*
140 * Wait for the HCHalted Status bit to be 0 to indicate the host is
141 * running.
142 */
Lin Wangdc0b1772015-01-09 16:06:28 +0200143 ret = xhci_handshake(&xhci->op_regs->status,
Sarah Sharped074532010-05-24 13:25:21 -0700144 STS_HALT, 0, XHCI_MAX_HALT_USEC);
145 if (ret == -ETIMEDOUT)
146 xhci_err(xhci, "Host took too long to start, "
147 "waited %u microseconds.\n",
148 XHCI_MAX_HALT_USEC);
Sarah Sharpc6cc27c2011-03-11 10:20:58 -0800149 if (!ret)
Mathias Nyman98d74f92016-04-08 16:25:10 +0300150 /* clear state flags. Including dying, halted or removing */
151 xhci->xhc_state = 0;
Roger Quadrose5bfeab2015-09-21 17:46:13 +0300152
Sarah Sharped074532010-05-24 13:25:21 -0700153 return ret;
154}
155
156/*
Sarah Sharpac04e6f2011-03-11 08:47:33 -0800157 * Reset a halted HC.
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700158 *
159 * This resets pipelines, timers, counters, state machines, etc.
160 * Transactions will be terminated immediately, and operational registers
161 * will be set to their defaults.
162 */
163int xhci_reset(struct xhci_hcd *xhci)
164{
165 u32 command;
166 u32 state;
Andiry Xuf370b992012-04-14 02:54:30 +0800167 int ret, i;
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700168
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200169 state = readl(&xhci->op_regs->status);
Mathias Nymanc11ae032016-11-11 15:13:12 +0200170
171 if (state == ~(u32)0) {
172 xhci_warn(xhci, "Host not accessible, reset failed.\n");
173 return -ENODEV;
174 }
175
Sarah Sharpd3512f62009-07-27 12:03:50 -0700176 if ((state & STS_HALT) == 0) {
177 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
178 return 0;
179 }
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700180
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300181 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200182 command = readl(&xhci->op_regs->command);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700183 command |= CMD_RESET;
Xenia Ragiadakou204b7792013-11-15 05:34:07 +0200184 writel(command, &xhci->op_regs->command);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700185
Rajmohan Mania5964392015-11-18 10:48:20 +0200186 /* Existing Intel xHCI controllers require a delay of 1 mS,
187 * after setting the CMD_RESET bit, and before accessing any
188 * HC registers. This allows the HC to complete the
189 * reset operation and be ready for HC register access.
190 * Without this delay, the subsequent HC register access,
191 * may result in a system hang very rarely.
192 */
193 if (xhci->quirks & XHCI_INTEL_HOST)
194 udelay(1000);
195
Lin Wangdc0b1772015-01-09 16:06:28 +0200196 ret = xhci_handshake(&xhci->op_regs->command,
Sarah Sharp22ceac12012-07-23 16:06:08 -0700197 CMD_RESET, 0, 10 * 1000 * 1000);
Sarah Sharp2d62f3e2010-05-24 13:25:15 -0700198 if (ret)
199 return ret;
200
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300201 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
202 "Wait for controller to be ready for doorbell rings");
Sarah Sharp2d62f3e2010-05-24 13:25:15 -0700203 /*
204 * xHCI cannot write to any doorbells or operational registers other
205 * than status until the "Controller Not Ready" flag is cleared.
206 */
Lin Wangdc0b1772015-01-09 16:06:28 +0200207 ret = xhci_handshake(&xhci->op_regs->status,
Sarah Sharp22ceac12012-07-23 16:06:08 -0700208 STS_CNR, 0, 10 * 1000 * 1000);
Andiry Xuf370b992012-04-14 02:54:30 +0800209
Felipe Balbi98871e92017-01-23 14:20:04 +0200210 for (i = 0; i < 2; i++) {
Andiry Xuf370b992012-04-14 02:54:30 +0800211 xhci->bus_state[i].port_c_suspend = 0;
212 xhci->bus_state[i].suspended_ports = 0;
213 xhci->bus_state[i].resuming_ports = 0;
214 }
215
216 return ret;
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700217}
218
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700219#ifdef CONFIG_PCI
220static int xhci_free_msi(struct xhci_hcd *xhci)
Dong Nguyen43b86af2010-07-21 16:56:08 -0700221{
222 int i;
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700223
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700224 if (!xhci->msix_entries)
225 return -EINVAL;
Dong Nguyen43b86af2010-07-21 16:56:08 -0700226
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700227 for (i = 0; i < xhci->msix_count; i++)
228 if (xhci->msix_entries[i].vector)
229 free_irq(xhci->msix_entries[i].vector,
230 xhci_to_hcd(xhci));
231 return 0;
Dong Nguyen43b86af2010-07-21 16:56:08 -0700232}
233
234/*
235 * Set up MSI
236 */
237static int xhci_setup_msi(struct xhci_hcd *xhci)
238{
239 int ret;
240 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
241
242 ret = pci_enable_msi(pdev);
243 if (ret) {
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300244 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
245 "failed to allocate MSI entry");
Dong Nguyen43b86af2010-07-21 16:56:08 -0700246 return ret;
247 }
248
Alex Shi851ec162013-05-24 10:54:19 +0800249 ret = request_irq(pdev->irq, xhci_msi_irq,
Dong Nguyen43b86af2010-07-21 16:56:08 -0700250 0, "xhci_hcd", xhci_to_hcd(xhci));
251 if (ret) {
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300252 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
253 "disable MSI interrupt");
Dong Nguyen43b86af2010-07-21 16:56:08 -0700254 pci_disable_msi(pdev);
255 }
256
257 return ret;
258}
259
260/*
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700261 * Free IRQs
262 * free all IRQs request
263 */
264static void xhci_free_irq(struct xhci_hcd *xhci)
265{
266 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
267 int ret;
268
269 /* return if using legacy interrupt */
Felipe Balbicd704692012-02-29 16:46:23 +0200270 if (xhci_to_hcd(xhci)->irq > 0)
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700271 return;
272
273 ret = xhci_free_msi(xhci);
274 if (!ret)
275 return;
Felipe Balbicd704692012-02-29 16:46:23 +0200276 if (pdev->irq > 0)
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700277 free_irq(pdev->irq, xhci_to_hcd(xhci));
278
279 return;
280}
281
282/*
Dong Nguyen43b86af2010-07-21 16:56:08 -0700283 * Set up MSI-X
284 */
285static int xhci_setup_msix(struct xhci_hcd *xhci)
286{
287 int i, ret = 0;
Andiry Xu00292272010-12-27 17:39:02 +0800288 struct usb_hcd *hcd = xhci_to_hcd(xhci);
289 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
Dong Nguyen43b86af2010-07-21 16:56:08 -0700290
291 /*
292 * calculate number of msi-x vectors supported.
293 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
294 * with max number of interrupters based on the xhci HCSPARAMS1.
295 * - num_online_cpus: maximum msi-x vectors per CPUs core.
296 * Add additional 1 vector to ensure always available interrupt.
297 */
298 xhci->msix_count = min(num_online_cpus() + 1,
299 HCS_MAX_INTRS(xhci->hcs_params1));
300
301 xhci->msix_entries =
302 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
Greg Kroah-Hartman86871972010-11-11 09:41:02 -0800303 GFP_KERNEL);
Wolfram Sangf4c46f12016-08-25 19:39:10 +0200304 if (!xhci->msix_entries)
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700305 return -ENOMEM;
Dong Nguyen43b86af2010-07-21 16:56:08 -0700306
307 for (i = 0; i < xhci->msix_count; i++) {
308 xhci->msix_entries[i].entry = i;
309 xhci->msix_entries[i].vector = 0;
310 }
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700311
Alexander Gordeeva62445a2014-05-08 19:25:58 +0300312 ret = pci_enable_msix_exact(pdev, xhci->msix_entries, xhci->msix_count);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700313 if (ret) {
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300314 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
315 "Failed to enable MSI-X");
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700316 goto free_entries;
317 }
318
Dong Nguyen43b86af2010-07-21 16:56:08 -0700319 for (i = 0; i < xhci->msix_count; i++) {
320 ret = request_irq(xhci->msix_entries[i].vector,
Alex Shi851ec162013-05-24 10:54:19 +0800321 xhci_msi_irq,
Dong Nguyen43b86af2010-07-21 16:56:08 -0700322 0, "xhci_hcd", xhci_to_hcd(xhci));
323 if (ret)
324 goto disable_msix;
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700325 }
Dong Nguyen43b86af2010-07-21 16:56:08 -0700326
Andiry Xu00292272010-12-27 17:39:02 +0800327 hcd->msix_enabled = 1;
Dong Nguyen43b86af2010-07-21 16:56:08 -0700328 return ret;
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700329
330disable_msix:
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300331 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
Dong Nguyen43b86af2010-07-21 16:56:08 -0700332 xhci_free_irq(xhci);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700333 pci_disable_msix(pdev);
334free_entries:
335 kfree(xhci->msix_entries);
336 xhci->msix_entries = NULL;
337 return ret;
338}
339
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700340/* Free any IRQs and disable MSI-X */
341static void xhci_cleanup_msix(struct xhci_hcd *xhci)
342{
Andiry Xu00292272010-12-27 17:39:02 +0800343 struct usb_hcd *hcd = xhci_to_hcd(xhci);
344 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700345
Jack Pham90053552013-11-15 14:53:14 -0800346 if (xhci->quirks & XHCI_PLAT)
347 return;
348
Dong Nguyen43b86af2010-07-21 16:56:08 -0700349 xhci_free_irq(xhci);
350
351 if (xhci->msix_entries) {
352 pci_disable_msix(pdev);
353 kfree(xhci->msix_entries);
354 xhci->msix_entries = NULL;
355 } else {
356 pci_disable_msi(pdev);
357 }
358
Andiry Xu00292272010-12-27 17:39:02 +0800359 hcd->msix_enabled = 0;
Dong Nguyen43b86af2010-07-21 16:56:08 -0700360 return;
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700361}
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700362
Olof Johanssond5c82fe2013-07-23 11:58:20 -0700363static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700364{
365 int i;
366
367 if (xhci->msix_entries) {
368 for (i = 0; i < xhci->msix_count; i++)
369 synchronize_irq(xhci->msix_entries[i].vector);
370 }
371}
372
373static int xhci_try_enable_msi(struct usb_hcd *hcd)
374{
375 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
Sarah Sharp52fb6122013-08-08 10:08:34 -0700376 struct pci_dev *pdev;
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700377 int ret;
378
Sarah Sharp52fb6122013-08-08 10:08:34 -0700379 /* The xhci platform device has set up IRQs through usb_add_hcd. */
380 if (xhci->quirks & XHCI_PLAT)
381 return 0;
382
383 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700384 /*
385 * Some Fresco Logic host controllers advertise MSI, but fail to
386 * generate interrupts. Don't even try to enable MSI.
387 */
388 if (xhci->quirks & XHCI_BROKEN_MSI)
Hannes Reinecke00eed9c2013-03-04 17:14:43 +0100389 goto legacy_irq;
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700390
391 /* unregister the legacy interrupt */
392 if (hcd->irq)
393 free_irq(hcd->irq, hcd);
Felipe Balbicd704692012-02-29 16:46:23 +0200394 hcd->irq = 0;
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700395
396 ret = xhci_setup_msix(xhci);
397 if (ret)
398 /* fall back to msi*/
399 ret = xhci_setup_msi(xhci);
400
401 if (!ret)
Felipe Balbicd704692012-02-29 16:46:23 +0200402 /* hcd->irq is 0, we have MSI */
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700403 return 0;
404
Sarah Sharp68d07f62012-02-13 16:25:57 -0800405 if (!pdev->irq) {
406 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
407 return -EINVAL;
408 }
409
Hannes Reinecke00eed9c2013-03-04 17:14:43 +0100410 legacy_irq:
Adrian Huang79699432014-02-27 11:26:03 +0000411 if (!strlen(hcd->irq_descr))
412 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",
413 hcd->driver->description, hcd->self.busnum);
414
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700415 /* fall back to legacy interrupt*/
416 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
417 hcd->irq_descr, hcd);
418 if (ret) {
419 xhci_err(xhci, "request interrupt %d failed\n",
420 pdev->irq);
421 return ret;
422 }
423 hcd->irq = pdev->irq;
424 return 0;
425}
426
427#else
428
David Cohen01bb59e2014-04-25 19:20:16 +0300429static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700430{
431 return 0;
432}
433
David Cohen01bb59e2014-04-25 19:20:16 +0300434static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700435{
436}
437
David Cohen01bb59e2014-04-25 19:20:16 +0300438static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700439{
440}
441
442#endif
443
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500444static void compliance_mode_recovery(unsigned long arg)
445{
446 struct xhci_hcd *xhci;
447 struct usb_hcd *hcd;
448 u32 temp;
449 int i;
450
451 xhci = (struct xhci_hcd *)arg;
452
453 for (i = 0; i < xhci->num_usb3_ports; i++) {
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200454 temp = readl(xhci->usb3_ports[i]);
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500455 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
456 /*
457 * Compliance Mode Detected. Letting USB Core
458 * handle the Warm Reset
459 */
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +0300460 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
461 "Compliance mode detected->port %d",
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500462 i + 1);
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +0300463 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
464 "Attempting compliance mode recovery");
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500465 hcd = xhci->shared_hcd;
466
467 if (hcd->state == HC_STATE_SUSPENDED)
468 usb_hcd_resume_root_hub(hcd);
469
470 usb_hcd_poll_rh_status(hcd);
471 }
472 }
473
474 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
475 mod_timer(&xhci->comp_mode_recovery_timer,
476 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
477}
478
479/*
480 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
481 * that causes ports behind that hardware to enter compliance mode sometimes.
482 * The quirk creates a timer that polls every 2 seconds the link state of
483 * each host controller's port and recovers it by issuing a Warm reset
484 * if Compliance mode is detected, otherwise the port will become "dead" (no
485 * device connections or disconnections will be detected anymore). Becasue no
486 * status event is generated when entering compliance mode (per xhci spec),
487 * this quirk is needed on systems that have the failing hardware installed.
488 */
489static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
490{
491 xhci->port_status_u0 = 0;
Julia Lawallfc8abe02015-01-09 16:06:29 +0200492 setup_timer(&xhci->comp_mode_recovery_timer,
493 compliance_mode_recovery, (unsigned long)xhci);
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500494 xhci->comp_mode_recovery_timer.expires = jiffies +
495 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
496
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500497 add_timer(&xhci->comp_mode_recovery_timer);
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +0300498 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
499 "Compliance mode recovery timer initialized");
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500500}
501
502/*
503 * This function identifies the systems that have installed the SN65LVPE502CP
504 * USB3.0 re-driver and that need the Compliance Mode Quirk.
505 * Systems:
506 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
507 */
Andrew Brestickere1cd9722014-10-03 11:35:27 +0300508static bool xhci_compliance_mode_recovery_timer_quirk_check(void)
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500509{
510 const char *dmi_product_name, *dmi_sys_vendor;
511
512 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
513 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
Vivek Gautam457a73d2012-09-22 18:11:19 +0530514 if (!dmi_product_name || !dmi_sys_vendor)
515 return false;
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500516
517 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
518 return false;
519
520 if (strstr(dmi_product_name, "Z420") ||
521 strstr(dmi_product_name, "Z620") ||
Alexis R. Cortes47080972012-10-17 14:09:12 -0500522 strstr(dmi_product_name, "Z820") ||
Alexis R. Cortesb0e4e602012-11-08 16:59:27 -0600523 strstr(dmi_product_name, "Z1 Workstation"))
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500524 return true;
525
526 return false;
527}
528
529static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
530{
531 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
532}
533
534
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700535/*
536 * Initialize memory for HCD and xHC (one-time init).
537 *
538 * Program the PAGESIZE register, initialize the device context array, create
539 * device contexts (?), set up a command ring segment (or two?), create event
540 * ring (one for now).
541 */
542int xhci_init(struct usb_hcd *hcd)
543{
544 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
545 int retval = 0;
546
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300547 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700548 spin_lock_init(&xhci->lock);
Sebastian Andrzej Siewiord7826592011-09-13 16:41:10 -0700549 if (xhci->hci_version == 0x95 && link_quirk) {
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +0300550 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
551 "QUIRK: Not clearing Link TRB chain bits.");
Sarah Sharpb0567b32009-08-07 14:04:36 -0700552 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
553 } else {
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300554 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
555 "xHCI doesn't need link TRB QUIRK");
Sarah Sharpb0567b32009-08-07 14:04:36 -0700556 }
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700557 retval = xhci_mem_init(xhci, GFP_KERNEL);
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300558 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700559
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500560 /* Initializing Compliance Mode Recovery Data If Needed */
Sarah Sharpc3897aa2013-04-18 10:02:03 -0700561 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500562 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
563 compliance_mode_recovery_timer_init(xhci);
564 }
565
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700566 return retval;
567}
568
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700569/*-------------------------------------------------------------------------*/
570
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700571
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -0800572static int xhci_run_finished(struct xhci_hcd *xhci)
573{
574 if (xhci_start(xhci)) {
575 xhci_halt(xhci);
576 return -ENODEV;
577 }
578 xhci->shared_hcd->state = HC_STATE_RUNNING;
Elric Fuc181bc52012-06-27 16:30:57 +0800579 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -0800580
581 if (xhci->quirks & XHCI_NEC_HOST)
582 xhci_ring_cmd_db(xhci);
583
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300584 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
585 "Finished xhci_run for USB3 roothub");
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -0800586 return 0;
587}
588
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700589/*
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700590 * Start the HC after it was halted.
591 *
592 * This function is called by the USB core when the HC driver is added.
593 * Its opposite is xhci_stop().
594 *
595 * xhci_init() must be called once before this function can be called.
596 * Reset the HC, enable device slot contexts, program DCBAAP, and
597 * set command ring pointer and event ring pointer.
598 *
599 * Setup MSI-X vectors and enable interrupts.
600 */
601int xhci_run(struct usb_hcd *hcd)
602{
603 u32 temp;
Sarah Sharp8e595a52009-07-27 12:03:31 -0700604 u64 temp_64;
Sebastian Andrzej Siewior3fd1ec52011-09-23 14:19:57 -0700605 int ret;
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700606 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700607
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -0800608 /* Start the xHCI host controller running only after the USB 2.0 roothub
609 * is setup.
610 */
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700611
Sarah Sharp0f2a7932009-04-27 19:57:12 -0700612 hcd->uses_new_polling = 1;
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -0800613 if (!usb_hcd_is_primary_hcd(hcd))
614 return xhci_run_finished(xhci);
Sarah Sharp0f2a7932009-04-27 19:57:12 -0700615
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300616 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700617
Sebastian Andrzej Siewior3fd1ec52011-09-23 14:19:57 -0700618 ret = xhci_try_enable_msi(hcd);
Dong Nguyen43b86af2010-07-21 16:56:08 -0700619 if (ret)
Sebastian Andrzej Siewior3fd1ec52011-09-23 14:19:57 -0700620 return ret;
Dong Nguyen43b86af2010-07-21 16:56:08 -0700621
Sarah Sharp66e49d82009-07-27 12:03:46 -0700622 xhci_dbg(xhci, "Command ring memory map follows:\n");
623 xhci_debug_ring(xhci, xhci->cmd_ring);
624 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
625 xhci_dbg_cmd_ptrs(xhci);
626
627 xhci_dbg(xhci, "ERST memory map follows:\n");
628 xhci_dbg_erst(xhci, &xhci->erst);
629 xhci_dbg(xhci, "Event ring:\n");
630 xhci_debug_ring(xhci, xhci->event_ring);
631 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
Sarah Sharpf7b2e402014-01-30 13:27:49 -0800632 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
Sarah Sharp66e49d82009-07-27 12:03:46 -0700633 temp_64 &= ~ERST_PTR_MASK;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300634 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
635 "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
Sarah Sharp66e49d82009-07-27 12:03:46 -0700636
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300637 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
638 "// Set the interrupt modulation register");
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200639 temp = readl(&xhci->ir_set->irq_control);
Sarah Sharpa4d88302009-05-14 11:44:26 -0700640 temp &= ~ER_IRQ_INTERVAL_MASK;
Chunfeng Yun0cbd4b32015-11-24 13:09:55 +0200641 /*
642 * the increment interval is 8 times as much as that defined
643 * in xHCI spec on MTK's controller
644 */
645 temp |= (u32) ((xhci->quirks & XHCI_MTK_HOST) ? 20 : 160);
Xenia Ragiadakou204b7792013-11-15 05:34:07 +0200646 writel(temp, &xhci->ir_set->irq_control);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700647
648 /* Set the HCD state before we enable the irqs */
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200649 temp = readl(&xhci->op_regs->command);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700650 temp |= (CMD_EIE);
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300651 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
652 "// Enable interrupts, cmd = 0x%x.", temp);
Xenia Ragiadakou204b7792013-11-15 05:34:07 +0200653 writel(temp, &xhci->op_regs->command);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700654
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200655 temp = readl(&xhci->ir_set->irq_pending);
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300656 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
657 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700658 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
Xenia Ragiadakou204b7792013-11-15 05:34:07 +0200659 writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
Dmitry Torokhov09ece302011-02-08 16:29:33 -0800660 xhci_print_ir_set(xhci, 0);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700661
Mathias Nymanddba5cd2014-05-08 19:26:00 +0300662 if (xhci->quirks & XHCI_NEC_HOST) {
663 struct xhci_command *command;
664 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
665 if (!command)
666 return -ENOMEM;
667 xhci_queue_vendor_command(xhci, command, 0, 0, 0,
Sarah Sharp02386342010-05-24 13:25:28 -0700668 TRB_TYPE(TRB_NEC_GET_FW));
Mathias Nymanddba5cd2014-05-08 19:26:00 +0300669 }
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300670 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
671 "Finished xhci_run for USB2 roothub");
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700672 return 0;
673}
Andrew Bresticker436e8c72014-10-03 11:35:28 +0300674EXPORT_SYMBOL_GPL(xhci_run);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700675
676/*
677 * Stop xHCI driver.
678 *
679 * This function is called by the USB core when the HC driver is removed.
680 * Its opposite is xhci_run().
681 *
682 * Disable device contexts, disable IRQs, and quiesce the HC.
683 * Reset the HC, finish any completed transactions, and cleanup memory.
684 */
685void xhci_stop(struct usb_hcd *hcd)
686{
687 u32 temp;
688 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
689
Roger Quadros8c24d6d2015-09-21 17:46:14 +0300690 mutex_lock(&xhci->mutex);
Roger Quadros8c24d6d2015-09-21 17:46:14 +0300691
Gabriel Krisman Bertazi27a41a82016-06-01 18:09:07 +0300692 if (!(xhci->xhc_state & XHCI_STATE_HALTED)) {
693 spin_lock_irq(&xhci->lock);
694
695 xhci->xhc_state |= XHCI_STATE_HALTED;
696 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
697 xhci_halt(xhci);
698 xhci_reset(xhci);
Gabriel Krisman Bertazi27a41a82016-06-01 18:09:07 +0300699 spin_unlock_irq(&xhci->lock);
700 }
701
702 if (!usb_hcd_is_primary_hcd(hcd)) {
703 mutex_unlock(&xhci->mutex);
704 return;
705 }
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700706
Zhang Rui40a9fb12010-12-17 13:17:04 -0800707 xhci_cleanup_msix(xhci);
708
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500709 /* Deleting Compliance Mode Recovery Timer */
710 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
Tony Camuso58b1d792013-04-05 14:27:07 -0400711 (!(xhci_all_ports_seen_u0(xhci)))) {
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500712 del_timer_sync(&xhci->comp_mode_recovery_timer);
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +0300713 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
714 "%s: compliance mode recovery timer deleted",
Tony Camuso58b1d792013-04-05 14:27:07 -0400715 __func__);
716 }
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500717
Andiry Xuc41136b2011-03-22 17:08:14 +0800718 if (xhci->quirks & XHCI_AMD_PLL_FIX)
719 usb_amd_dev_put();
720
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300721 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
722 "// Disabling event ring interrupts");
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200723 temp = readl(&xhci->op_regs->status);
Xenia Ragiadakou204b7792013-11-15 05:34:07 +0200724 writel(temp & ~STS_EINT, &xhci->op_regs->status);
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200725 temp = readl(&xhci->ir_set->irq_pending);
Xenia Ragiadakou204b7792013-11-15 05:34:07 +0200726 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
Dmitry Torokhov09ece302011-02-08 16:29:33 -0800727 xhci_print_ir_set(xhci, 0);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700728
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300729 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700730 xhci_mem_cleanup(xhci);
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300731 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
732 "xhci_stop completed - status = %x",
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200733 readl(&xhci->op_regs->status));
Roger Quadros85ac90f2015-09-21 17:46:12 +0300734 mutex_unlock(&xhci->mutex);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700735}
736
737/*
738 * Shutdown HC (not bus-specific)
739 *
740 * This is called when the machine is rebooting or halting. We assume that the
741 * machine will be powered off, and the HC's internal state will be reset.
742 * Don't bother to free memory.
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -0800743 *
744 * This will only ever be called with the main usb_hcd (the USB3 roothub).
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700745 */
746void xhci_shutdown(struct usb_hcd *hcd)
747{
748 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
749
Dan Carpenter052c7f92012-08-13 19:57:03 +0300750 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
Sarah Sharpe95829f2012-07-23 18:59:30 +0300751 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
752
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700753 spin_lock_irq(&xhci->lock);
754 xhci_halt(xhci);
Takashi Iwai638298d2013-09-12 08:11:06 +0200755 /* Workaround for spurious wakeups at shutdown with HSW */
756 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
757 xhci_reset(xhci);
Dong Nguyen43b86af2010-07-21 16:56:08 -0700758 spin_unlock_irq(&xhci->lock);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700759
Zhang Rui40a9fb12010-12-17 13:17:04 -0800760 xhci_cleanup_msix(xhci);
761
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300762 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
763 "xhci_shutdown completed - status = %x",
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200764 readl(&xhci->op_regs->status));
Takashi Iwai638298d2013-09-12 08:11:06 +0200765
766 /* Yet another workaround for spurious wakeups at shutdown with HSW */
767 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
768 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700769}
770
Sarah Sharpb5b5c3a2010-10-15 11:24:14 -0700771#ifdef CONFIG_PM
Andiry Xu5535b1d52010-10-14 07:23:06 -0700772static void xhci_save_registers(struct xhci_hcd *xhci)
773{
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200774 xhci->s3.command = readl(&xhci->op_regs->command);
775 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
Sarah Sharpf7b2e402014-01-30 13:27:49 -0800776 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200777 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
778 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
Sarah Sharpf7b2e402014-01-30 13:27:49 -0800779 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
780 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200781 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
782 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
Andiry Xu5535b1d52010-10-14 07:23:06 -0700783}
784
785static void xhci_restore_registers(struct xhci_hcd *xhci)
786{
Xenia Ragiadakou204b7792013-11-15 05:34:07 +0200787 writel(xhci->s3.command, &xhci->op_regs->command);
788 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
Sarah Sharp477632d2014-01-29 14:02:00 -0800789 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
Xenia Ragiadakou204b7792013-11-15 05:34:07 +0200790 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
791 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
Sarah Sharp477632d2014-01-29 14:02:00 -0800792 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
793 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
Xenia Ragiadakou204b7792013-11-15 05:34:07 +0200794 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
795 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
Andiry Xu5535b1d52010-10-14 07:23:06 -0700796}
797
Sarah Sharp89821322010-11-12 11:59:31 -0800798static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
799{
800 u64 val_64;
801
802 /* step 2: initialize command ring buffer */
Sarah Sharpf7b2e402014-01-30 13:27:49 -0800803 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
Sarah Sharp89821322010-11-12 11:59:31 -0800804 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
805 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
806 xhci->cmd_ring->dequeue) &
807 (u64) ~CMD_RING_RSVD_BITS) |
808 xhci->cmd_ring->cycle_state;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +0300809 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
810 "// Setting command ring address to 0x%llx",
Sarah Sharp89821322010-11-12 11:59:31 -0800811 (long unsigned long) val_64);
Sarah Sharp477632d2014-01-29 14:02:00 -0800812 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
Sarah Sharp89821322010-11-12 11:59:31 -0800813}
814
815/*
816 * The whole command ring must be cleared to zero when we suspend the host.
817 *
818 * The host doesn't save the command ring pointer in the suspend well, so we
819 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
820 * aligned, because of the reserved bits in the command ring dequeue pointer
821 * register. Therefore, we can't just set the dequeue pointer back in the
822 * middle of the ring (TRBs are 16-byte aligned).
823 */
824static void xhci_clear_command_ring(struct xhci_hcd *xhci)
825{
826 struct xhci_ring *ring;
827 struct xhci_segment *seg;
828
829 ring = xhci->cmd_ring;
830 seg = ring->deq_seg;
831 do {
Andiry Xu158886c2011-11-30 16:37:41 +0800832 memset(seg->trbs, 0,
833 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
834 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
835 cpu_to_le32(~TRB_CYCLE);
Sarah Sharp89821322010-11-12 11:59:31 -0800836 seg = seg->next;
837 } while (seg != ring->deq_seg);
838
839 /* Reset the software enqueue and dequeue pointers */
840 ring->deq_seg = ring->first_seg;
841 ring->dequeue = ring->first_seg->trbs;
842 ring->enq_seg = ring->deq_seg;
843 ring->enqueue = ring->dequeue;
844
Andiry Xub008df62012-03-05 17:49:34 +0800845 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
Sarah Sharp89821322010-11-12 11:59:31 -0800846 /*
847 * Ring is now zeroed, so the HW should look for change of ownership
848 * when the cycle bit is set to 1.
849 */
850 ring->cycle_state = 1;
851
852 /*
853 * Reset the hardware dequeue pointer.
854 * Yes, this will need to be re-written after resume, but we're paranoid
855 * and want to make sure the hardware doesn't access bogus memory
856 * because, say, the BIOS or an SMI started the host without changing
857 * the command ring pointers.
858 */
859 xhci_set_cmd_ring_deq(xhci);
860}
861
Lu Baolua1377e52014-11-18 11:27:14 +0200862static void xhci_disable_port_wake_on_bits(struct xhci_hcd *xhci)
863{
864 int port_index;
865 __le32 __iomem **port_array;
866 unsigned long flags;
867 u32 t1, t2;
868
869 spin_lock_irqsave(&xhci->lock, flags);
870
871 /* disble usb3 ports Wake bits*/
872 port_index = xhci->num_usb3_ports;
873 port_array = xhci->usb3_ports;
874 while (port_index--) {
875 t1 = readl(port_array[port_index]);
876 t1 = xhci_port_state_to_neutral(t1);
877 t2 = t1 & ~PORT_WAKE_BITS;
878 if (t1 != t2)
879 writel(t2, port_array[port_index]);
880 }
881
882 /* disble usb2 ports Wake bits*/
883 port_index = xhci->num_usb2_ports;
884 port_array = xhci->usb2_ports;
885 while (port_index--) {
886 t1 = readl(port_array[port_index]);
887 t1 = xhci_port_state_to_neutral(t1);
888 t2 = t1 & ~PORT_WAKE_BITS;
889 if (t1 != t2)
890 writel(t2, port_array[port_index]);
891 }
892
893 spin_unlock_irqrestore(&xhci->lock, flags);
894}
895
Andiry Xu5535b1d52010-10-14 07:23:06 -0700896/*
897 * Stop HC (not bus-specific)
898 *
899 * This is called when the machine transition into S3/S4 mode.
900 *
901 */
Lu Baolua1377e52014-11-18 11:27:14 +0200902int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup)
Andiry Xu5535b1d52010-10-14 07:23:06 -0700903{
904 int rc = 0;
Oliver Neukum455f5892013-09-30 15:50:54 +0200905 unsigned int delay = XHCI_MAX_HALT_USEC;
Andiry Xu5535b1d52010-10-14 07:23:06 -0700906 struct usb_hcd *hcd = xhci_to_hcd(xhci);
907 u32 command;
908
Roger Quadros9fa733f2015-05-29 17:01:50 +0300909 if (!hcd->state)
910 return 0;
911
Felipe Balbi77b84762012-10-19 10:55:16 +0300912 if (hcd->state != HC_STATE_SUSPENDED ||
913 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
914 return -EINVAL;
915
Lu Baolua1377e52014-11-18 11:27:14 +0200916 /* Clear root port wake on bits if wakeup not allowed. */
917 if (!do_wakeup)
918 xhci_disable_port_wake_on_bits(xhci);
919
Sarah Sharpc52804a2012-11-27 12:30:23 -0800920 /* Don't poll the roothubs on bus suspend. */
921 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
922 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
923 del_timer_sync(&hcd->rh_timer);
Al Cooper14e61a12014-08-20 16:41:57 +0300924 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
925 del_timer_sync(&xhci->shared_hcd->rh_timer);
Sarah Sharpc52804a2012-11-27 12:30:23 -0800926
Andiry Xu5535b1d52010-10-14 07:23:06 -0700927 spin_lock_irq(&xhci->lock);
928 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
Sarah Sharpb32093792011-03-07 11:24:07 -0800929 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
Andiry Xu5535b1d52010-10-14 07:23:06 -0700930 /* step 1: stop endpoint */
931 /* skipped assuming that port suspend has done */
932
933 /* step 2: clear Run/Stop bit */
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200934 command = readl(&xhci->op_regs->command);
Andiry Xu5535b1d52010-10-14 07:23:06 -0700935 command &= ~CMD_RUN;
Xenia Ragiadakou204b7792013-11-15 05:34:07 +0200936 writel(command, &xhci->op_regs->command);
Oliver Neukum455f5892013-09-30 15:50:54 +0200937
938 /* Some chips from Fresco Logic need an extraordinary delay */
939 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
940
Lin Wangdc0b1772015-01-09 16:06:28 +0200941 if (xhci_handshake(&xhci->op_regs->status,
Oliver Neukum455f5892013-09-30 15:50:54 +0200942 STS_HALT, STS_HALT, delay)) {
Andiry Xu5535b1d52010-10-14 07:23:06 -0700943 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
944 spin_unlock_irq(&xhci->lock);
945 return -ETIMEDOUT;
946 }
Sarah Sharp89821322010-11-12 11:59:31 -0800947 xhci_clear_command_ring(xhci);
Andiry Xu5535b1d52010-10-14 07:23:06 -0700948
949 /* step 3: save registers */
950 xhci_save_registers(xhci);
951
952 /* step 4: set CSS flag */
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +0200953 command = readl(&xhci->op_regs->command);
Andiry Xu5535b1d52010-10-14 07:23:06 -0700954 command |= CMD_CSS;
Xenia Ragiadakou204b7792013-11-15 05:34:07 +0200955 writel(command, &xhci->op_regs->command);
Lin Wangdc0b1772015-01-09 16:06:28 +0200956 if (xhci_handshake(&xhci->op_regs->status,
Sarah Sharp2611bd182012-10-25 13:27:51 -0700957 STS_SAVE, 0, 10 * 1000)) {
Andiry Xu622eb782012-06-13 10:51:57 +0800958 xhci_warn(xhci, "WARN: xHC save state timeout\n");
Andiry Xu5535b1d52010-10-14 07:23:06 -0700959 spin_unlock_irq(&xhci->lock);
960 return -ETIMEDOUT;
961 }
Andiry Xu5535b1d52010-10-14 07:23:06 -0700962 spin_unlock_irq(&xhci->lock);
963
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500964 /*
965 * Deleting Compliance Mode Recovery Timer because the xHCI Host
966 * is about to be suspended.
967 */
968 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
969 (!(xhci_all_ports_seen_u0(xhci)))) {
970 del_timer_sync(&xhci->comp_mode_recovery_timer);
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +0300971 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
972 "%s: compliance mode recovery timer deleted",
Tony Camuso58b1d792013-04-05 14:27:07 -0400973 __func__);
Alexis R. Cortes71c731a2012-08-03 14:00:27 -0500974 }
975
Andiry Xu00292272010-12-27 17:39:02 +0800976 /* step 5: remove core well power */
977 /* synchronize irq when using MSI-X */
Sebastian Andrzej Siewior421aa842011-09-23 14:19:58 -0700978 xhci_msix_sync_irqs(xhci);
Andiry Xu00292272010-12-27 17:39:02 +0800979
Andiry Xu5535b1d52010-10-14 07:23:06 -0700980 return rc;
981}
Andrew Bresticker436e8c72014-10-03 11:35:28 +0300982EXPORT_SYMBOL_GPL(xhci_suspend);
Andiry Xu5535b1d52010-10-14 07:23:06 -0700983
984/*
985 * start xHC (not bus-specific)
986 *
987 * This is called when the machine transition from S3/S4 mode.
988 *
989 */
990int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
991{
Wang, Yud6236f62014-06-24 17:14:44 +0300992 u32 command, temp = 0, status;
Andiry Xu5535b1d52010-10-14 07:23:06 -0700993 struct usb_hcd *hcd = xhci_to_hcd(xhci);
Sarah Sharp65b22f92010-12-17 12:35:05 -0800994 struct usb_hcd *secondary_hcd;
Alan Sternf69e31202011-11-03 11:37:10 -0400995 int retval = 0;
Tony Camuso77df9e02013-02-21 16:11:27 -0500996 bool comp_timer_running = false;
Andiry Xu5535b1d52010-10-14 07:23:06 -0700997
Roger Quadros9fa733f2015-05-29 17:01:50 +0300998 if (!hcd->state)
999 return 0;
1000
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -08001001 /* Wait a bit if either of the roothubs need to settle from the
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001002 * transition into bus suspend.
Sarah Sharp20b67cf2010-12-15 12:47:14 -08001003 */
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -08001004 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
1005 time_before(jiffies,
1006 xhci->bus_state[1].next_statechange))
Andiry Xu5535b1d52010-10-14 07:23:06 -07001007 msleep(100);
1008
Alan Sternf69e31202011-11-03 11:37:10 -04001009 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1010 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
1011
Andiry Xu5535b1d52010-10-14 07:23:06 -07001012 spin_lock_irq(&xhci->lock);
Maarten Lankhorstc877b3b2011-06-15 23:47:21 +02001013 if (xhci->quirks & XHCI_RESET_ON_RESUME)
1014 hibernated = true;
Andiry Xu5535b1d52010-10-14 07:23:06 -07001015
1016 if (!hibernated) {
1017 /* step 1: restore register */
1018 xhci_restore_registers(xhci);
1019 /* step 2: initialize command ring buffer */
Sarah Sharp89821322010-11-12 11:59:31 -08001020 xhci_set_cmd_ring_deq(xhci);
Andiry Xu5535b1d52010-10-14 07:23:06 -07001021 /* step 3: restore state and start state*/
1022 /* step 3: set CRS flag */
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02001023 command = readl(&xhci->op_regs->command);
Andiry Xu5535b1d52010-10-14 07:23:06 -07001024 command |= CMD_CRS;
Xenia Ragiadakou204b7792013-11-15 05:34:07 +02001025 writel(command, &xhci->op_regs->command);
Lin Wangdc0b1772015-01-09 16:06:28 +02001026 if (xhci_handshake(&xhci->op_regs->status,
Andiry Xu622eb782012-06-13 10:51:57 +08001027 STS_RESTORE, 0, 10 * 1000)) {
1028 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
Andiry Xu5535b1d52010-10-14 07:23:06 -07001029 spin_unlock_irq(&xhci->lock);
1030 return -ETIMEDOUT;
1031 }
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02001032 temp = readl(&xhci->op_regs->status);
Andiry Xu5535b1d52010-10-14 07:23:06 -07001033 }
1034
1035 /* If restore operation fails, re-initialize the HC during resume */
1036 if ((temp & STS_SRE) || hibernated) {
Tony Camuso77df9e02013-02-21 16:11:27 -05001037
1038 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
1039 !(xhci_all_ports_seen_u0(xhci))) {
1040 del_timer_sync(&xhci->comp_mode_recovery_timer);
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +03001041 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1042 "Compliance Mode Recovery Timer deleted!");
Tony Camuso77df9e02013-02-21 16:11:27 -05001043 }
1044
Sarah Sharpfedd3832011-04-12 17:43:19 -07001045 /* Let the USB core know _both_ roothubs lost power. */
1046 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1047 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
Andiry Xu5535b1d52010-10-14 07:23:06 -07001048
1049 xhci_dbg(xhci, "Stop HCD\n");
1050 xhci_halt(xhci);
1051 xhci_reset(xhci);
Andiry Xu5535b1d52010-10-14 07:23:06 -07001052 spin_unlock_irq(&xhci->lock);
Andiry Xu00292272010-12-27 17:39:02 +08001053 xhci_cleanup_msix(xhci);
Andiry Xu5535b1d52010-10-14 07:23:06 -07001054
Andiry Xu5535b1d52010-10-14 07:23:06 -07001055 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02001056 temp = readl(&xhci->op_regs->status);
Xenia Ragiadakou204b7792013-11-15 05:34:07 +02001057 writel(temp & ~STS_EINT, &xhci->op_regs->status);
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02001058 temp = readl(&xhci->ir_set->irq_pending);
Xenia Ragiadakou204b7792013-11-15 05:34:07 +02001059 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
Dmitry Torokhov09ece302011-02-08 16:29:33 -08001060 xhci_print_ir_set(xhci, 0);
Andiry Xu5535b1d52010-10-14 07:23:06 -07001061
1062 xhci_dbg(xhci, "cleaning up memory\n");
1063 xhci_mem_cleanup(xhci);
1064 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02001065 readl(&xhci->op_regs->status));
Andiry Xu5535b1d52010-10-14 07:23:06 -07001066
Sarah Sharp65b22f92010-12-17 12:35:05 -08001067 /* USB core calls the PCI reinit and start functions twice:
1068 * first with the primary HCD, and then with the secondary HCD.
1069 * If we don't do the same, the host will never be started.
1070 */
1071 if (!usb_hcd_is_primary_hcd(hcd))
1072 secondary_hcd = hcd;
1073 else
1074 secondary_hcd = xhci->shared_hcd;
1075
1076 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1077 retval = xhci_init(hcd->primary_hcd);
Andiry Xu5535b1d52010-10-14 07:23:06 -07001078 if (retval)
1079 return retval;
Tony Camuso77df9e02013-02-21 16:11:27 -05001080 comp_timer_running = true;
1081
Sarah Sharp65b22f92010-12-17 12:35:05 -08001082 xhci_dbg(xhci, "Start the primary HCD\n");
1083 retval = xhci_run(hcd->primary_hcd);
Sarah Sharpb32093792011-03-07 11:24:07 -08001084 if (!retval) {
Alan Sternf69e31202011-11-03 11:37:10 -04001085 xhci_dbg(xhci, "Start the secondary HCD\n");
1086 retval = xhci_run(secondary_hcd);
Sarah Sharpb32093792011-03-07 11:24:07 -08001087 }
Andiry Xu5535b1d52010-10-14 07:23:06 -07001088 hcd->state = HC_STATE_SUSPENDED;
Sarah Sharpb32093792011-03-07 11:24:07 -08001089 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
Alan Sternf69e31202011-11-03 11:37:10 -04001090 goto done;
Andiry Xu5535b1d52010-10-14 07:23:06 -07001091 }
1092
Andiry Xu5535b1d52010-10-14 07:23:06 -07001093 /* step 4: set Run/Stop bit */
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02001094 command = readl(&xhci->op_regs->command);
Andiry Xu5535b1d52010-10-14 07:23:06 -07001095 command |= CMD_RUN;
Xenia Ragiadakou204b7792013-11-15 05:34:07 +02001096 writel(command, &xhci->op_regs->command);
Lin Wangdc0b1772015-01-09 16:06:28 +02001097 xhci_handshake(&xhci->op_regs->status, STS_HALT,
Andiry Xu5535b1d52010-10-14 07:23:06 -07001098 0, 250 * 1000);
1099
1100 /* step 5: walk topology and initialize portsc,
1101 * portpmsc and portli
1102 */
1103 /* this is done in bus_resume */
1104
1105 /* step 6: restart each of the previously
1106 * Running endpoints by ringing their doorbells
1107 */
1108
Andiry Xu5535b1d52010-10-14 07:23:06 -07001109 spin_unlock_irq(&xhci->lock);
Alan Sternf69e31202011-11-03 11:37:10 -04001110
1111 done:
1112 if (retval == 0) {
Wang, Yud6236f62014-06-24 17:14:44 +03001113 /* Resume root hubs only when have pending events. */
1114 status = readl(&xhci->op_regs->status);
1115 if (status & STS_EINT) {
Wang, Yud6236f62014-06-24 17:14:44 +03001116 usb_hcd_resume_root_hub(xhci->shared_hcd);
Mathias Nyman671ffdf2016-04-08 16:25:06 +03001117 usb_hcd_resume_root_hub(hcd);
Wang, Yud6236f62014-06-24 17:14:44 +03001118 }
Alan Sternf69e31202011-11-03 11:37:10 -04001119 }
Alexis R. Cortes71c731a2012-08-03 14:00:27 -05001120
1121 /*
1122 * If system is subject to the Quirk, Compliance Mode Timer needs to
1123 * be re-initialized Always after a system resume. Ports are subject
1124 * to suffer the Compliance Mode issue again. It doesn't matter if
1125 * ports have entered previously to U0 before system's suspension.
1126 */
Tony Camuso77df9e02013-02-21 16:11:27 -05001127 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
Alexis R. Cortes71c731a2012-08-03 14:00:27 -05001128 compliance_mode_recovery_timer_init(xhci);
1129
Sarah Sharpc52804a2012-11-27 12:30:23 -08001130 /* Re-enable port polling. */
1131 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
Al Cooper14e61a12014-08-20 16:41:57 +03001132 set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
1133 usb_hcd_poll_rh_status(xhci->shared_hcd);
Mathias Nyman671ffdf2016-04-08 16:25:06 +03001134 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1135 usb_hcd_poll_rh_status(hcd);
Sarah Sharpc52804a2012-11-27 12:30:23 -08001136
Alan Sternf69e31202011-11-03 11:37:10 -04001137 return retval;
Andiry Xu5535b1d52010-10-14 07:23:06 -07001138}
Andrew Bresticker436e8c72014-10-03 11:35:28 +03001139EXPORT_SYMBOL_GPL(xhci_resume);
Sarah Sharpb5b5c3a2010-10-15 11:24:14 -07001140#endif /* CONFIG_PM */
1141
Sarah Sharp7f84eef2009-04-27 19:53:56 -07001142/*-------------------------------------------------------------------------*/
1143
Sarah Sharpd0e96f52009-04-27 19:58:01 -07001144/**
1145 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1146 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1147 * value to right shift 1 for the bitmask.
1148 *
1149 * Index = (epnum * 2) + direction - 1,
1150 * where direction = 0 for OUT, 1 for IN.
1151 * For control endpoints, the IN index is used (OUT index is unused), so
1152 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1153 */
1154unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1155{
1156 unsigned int index;
1157 if (usb_endpoint_xfer_control(desc))
1158 index = (unsigned int) (usb_endpoint_num(desc)*2);
1159 else
1160 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1161 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1162 return index;
1163}
1164
Julius Werner01c5f442013-04-15 15:55:04 -07001165/* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1166 * address from the XHCI endpoint index.
1167 */
1168unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1169{
1170 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1171 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1172 return direction | number;
1173}
1174
Sarah Sharpf94e01862009-04-27 19:58:38 -07001175/* Find the flag for this endpoint (for use in the control context). Use the
1176 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1177 * bit 1, etc.
1178 */
1179unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1180{
1181 return 1 << (xhci_get_endpoint_index(desc) + 1);
1182}
1183
Sarah Sharpac9d8fe2009-08-07 14:04:55 -07001184/* Find the flag for this endpoint (for use in the control context). Use the
1185 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1186 * bit 1, etc.
1187 */
1188unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1189{
1190 return 1 << (ep_index + 1);
1191}
1192
Sarah Sharpf94e01862009-04-27 19:58:38 -07001193/* Compute the last valid endpoint context index. Basically, this is the
1194 * endpoint index plus one. For slot contexts with more than valid endpoint,
1195 * we find the most significant bit set in the added contexts flags.
1196 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1197 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1198 */
Sarah Sharpac9d8fe2009-08-07 14:04:55 -07001199unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
Sarah Sharpf94e01862009-04-27 19:58:38 -07001200{
1201 return fls(added_ctxs) - 1;
1202}
1203
Sarah Sharpd0e96f52009-04-27 19:58:01 -07001204/* Returns 1 if the arguments are OK;
1205 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1206 */
Dmitry Torokhov8212a492011-02-08 13:55:59 -08001207static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
Andiry Xu64927732010-10-14 07:22:45 -07001208 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1209 const char *func) {
1210 struct xhci_hcd *xhci;
1211 struct xhci_virt_device *virt_dev;
1212
Sarah Sharpd0e96f52009-04-27 19:58:01 -07001213 if (!hcd || (check_ep && !ep) || !udev) {
Xenia Ragiadakou5c1127d2013-07-02 17:49:26 +03001214 pr_debug("xHCI %s called with invalid args\n", func);
Sarah Sharpd0e96f52009-04-27 19:58:01 -07001215 return -EINVAL;
1216 }
1217 if (!udev->parent) {
Xenia Ragiadakou5c1127d2013-07-02 17:49:26 +03001218 pr_debug("xHCI %s called for root hub\n", func);
Sarah Sharpd0e96f52009-04-27 19:58:01 -07001219 return 0;
1220 }
Andiry Xu64927732010-10-14 07:22:45 -07001221
Sarah Sharp7bd89b42011-07-01 13:35:40 -07001222 xhci = hcd_to_xhci(hcd);
Andiry Xu64927732010-10-14 07:22:45 -07001223 if (check_virt_dev) {
sifram.rajas@gmail.com73ddc242011-09-02 11:06:00 -07001224 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
Xenia Ragiadakou5c1127d2013-07-02 17:49:26 +03001225 xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1226 func);
Andiry Xu64927732010-10-14 07:22:45 -07001227 return -EINVAL;
1228 }
1229
1230 virt_dev = xhci->devs[udev->slot_id];
1231 if (virt_dev->udev != udev) {
Xenia Ragiadakou5c1127d2013-07-02 17:49:26 +03001232 xhci_dbg(xhci, "xHCI %s called with udev and "
Andiry Xu64927732010-10-14 07:22:45 -07001233 "virt_dev does not match\n", func);
1234 return -EINVAL;
1235 }
Sarah Sharpd0e96f52009-04-27 19:58:01 -07001236 }
Andiry Xu64927732010-10-14 07:22:45 -07001237
Sarah Sharp203a8662013-07-24 10:27:13 -07001238 if (xhci->xhc_state & XHCI_STATE_HALTED)
1239 return -ENODEV;
1240
Sarah Sharpd0e96f52009-04-27 19:58:01 -07001241 return 1;
1242}
1243
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001244static int xhci_configure_endpoint(struct xhci_hcd *xhci,
Sarah Sharp913a8a32009-09-04 10:53:13 -07001245 struct usb_device *udev, struct xhci_command *command,
1246 bool ctx_change, bool must_succeed);
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001247
1248/*
1249 * Full speed devices may have a max packet size greater than 8 bytes, but the
1250 * USB core doesn't know that until it reads the first 8 bytes of the
1251 * descriptor. If the usb_device's max packet size changes after that point,
1252 * we need to issue an evaluate context command and wait on it.
1253 */
1254static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1255 unsigned int ep_index, struct urb *urb)
1256{
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001257 struct xhci_container_ctx *out_ctx;
1258 struct xhci_input_control_ctx *ctrl_ctx;
1259 struct xhci_ep_ctx *ep_ctx;
Mathias Nymanddba5cd2014-05-08 19:26:00 +03001260 struct xhci_command *command;
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001261 int max_packet_size;
1262 int hw_max_packet_size;
1263 int ret = 0;
1264
1265 out_ctx = xhci->devs[slot_id]->out_ctx;
1266 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
Matt Evans28ccd292011-03-29 13:40:46 +11001267 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
Kuninori Morimoto29cc8892011-08-23 03:12:03 -07001268 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001269 if (hw_max_packet_size != max_packet_size) {
Xenia Ragiadakou3a7fa5b2013-07-31 07:35:27 +03001270 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1271 "Max Packet Size for ep 0 changed.");
1272 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1273 "Max packet size in usb_device = %d",
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001274 max_packet_size);
Xenia Ragiadakou3a7fa5b2013-07-31 07:35:27 +03001275 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1276 "Max packet size in xHCI HW = %d",
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001277 hw_max_packet_size);
Xenia Ragiadakou3a7fa5b2013-07-31 07:35:27 +03001278 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1279 "Issuing evaluate context command.");
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001280
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001281 /* Set up the input context flags for the command */
1282 /* FIXME: This won't work if a non-default control endpoint
1283 * changes max packet sizes.
1284 */
Mathias Nymanddba5cd2014-05-08 19:26:00 +03001285
1286 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
1287 if (!command)
1288 return -ENOMEM;
1289
1290 command->in_ctx = xhci->devs[slot_id]->in_ctx;
Lin Wang4daf9df2015-01-09 16:06:31 +02001291 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
Sarah Sharp92f8e762013-04-23 17:11:14 -07001292 if (!ctrl_ctx) {
1293 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1294 __func__);
Mathias Nymanddba5cd2014-05-08 19:26:00 +03001295 ret = -ENOMEM;
1296 goto command_cleanup;
Sarah Sharp92f8e762013-04-23 17:11:14 -07001297 }
1298 /* Set up the modified control endpoint 0 */
1299 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1300 xhci->devs[slot_id]->out_ctx, ep_index);
1301
Mathias Nymanddba5cd2014-05-08 19:26:00 +03001302 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
Sarah Sharp92f8e762013-04-23 17:11:14 -07001303 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1304 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1305
Matt Evans28ccd292011-03-29 13:40:46 +11001306 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001307 ctrl_ctx->drop_flags = 0;
1308
1309 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
Mathias Nymanddba5cd2014-05-08 19:26:00 +03001310 xhci_dbg_ctx(xhci, command->in_ctx, ep_index);
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001311 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1312 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1313
Mathias Nymanddba5cd2014-05-08 19:26:00 +03001314 ret = xhci_configure_endpoint(xhci, urb->dev, command,
Sarah Sharp913a8a32009-09-04 10:53:13 -07001315 true, false);
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001316
1317 /* Clean up the input context for later use by bandwidth
1318 * functions.
1319 */
Matt Evans28ccd292011-03-29 13:40:46 +11001320 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
Mathias Nymanddba5cd2014-05-08 19:26:00 +03001321command_cleanup:
1322 kfree(command->completion);
1323 kfree(command);
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001324 }
1325 return ret;
1326}
1327
Sarah Sharpd0e96f52009-04-27 19:58:01 -07001328/*
1329 * non-error returns are a promise to giveback() the urb later
1330 * we drop ownership so next owner (or urb unlink) can get it
1331 */
1332int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1333{
1334 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1335 unsigned long flags;
1336 int ret = 0;
Mathias Nyman69694082017-01-23 14:20:27 +02001337 unsigned int slot_id, ep_index, ep_state;
Andiry Xu8e51adc2010-07-22 15:23:31 -07001338 struct urb_priv *urb_priv;
Mathias Nyman7e64b032017-01-23 14:20:26 +02001339 int num_tds;
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001340
Andiry Xu64927732010-10-14 07:22:45 -07001341 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1342 true, true, __func__) <= 0)
Sarah Sharpd0e96f52009-04-27 19:58:01 -07001343 return -EINVAL;
1344
1345 slot_id = urb->dev->slot_id;
1346 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
Sarah Sharpd0e96f52009-04-27 19:58:01 -07001347
Alan Stern541c7d42010-06-22 16:39:10 -04001348 if (!HCD_HW_ACCESSIBLE(hcd)) {
Sarah Sharpd0e96f52009-04-27 19:58:01 -07001349 if (!in_interrupt())
1350 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
Mathias Nyman69694082017-01-23 14:20:27 +02001351 return -ESHUTDOWN;
Sarah Sharpd0e96f52009-04-27 19:58:01 -07001352 }
Andiry Xu8e51adc2010-07-22 15:23:31 -07001353
1354 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
Mathias Nymane6f7caa2017-01-23 14:20:24 +02001355 num_tds = urb->number_of_packets;
Reyad Attiyat4758dcd2015-08-06 19:23:58 +03001356 else if (usb_endpoint_is_bulk_out(&urb->ep->desc) &&
1357 urb->transfer_buffer_length > 0 &&
1358 urb->transfer_flags & URB_ZERO_PACKET &&
1359 !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc)))
Mathias Nymane6f7caa2017-01-23 14:20:24 +02001360 num_tds = 2;
Andiry Xu8e51adc2010-07-22 15:23:31 -07001361 else
Mathias Nymane6f7caa2017-01-23 14:20:24 +02001362 num_tds = 1;
Andiry Xu8e51adc2010-07-22 15:23:31 -07001363
1364 urb_priv = kzalloc(sizeof(struct urb_priv) +
Mathias Nyman7e64b032017-01-23 14:20:26 +02001365 num_tds * sizeof(struct xhci_td), mem_flags);
Andiry Xu8e51adc2010-07-22 15:23:31 -07001366 if (!urb_priv)
1367 return -ENOMEM;
1368
Mathias Nyman9ef7fbb2017-01-23 14:20:25 +02001369 urb_priv->num_tds = num_tds;
1370 urb_priv->num_tds_done = 0;
Andiry Xu8e51adc2010-07-22 15:23:31 -07001371 urb->hcpriv = urb_priv;
1372
Felipe Balbi5abdc2e2017-01-23 14:20:20 +02001373 trace_xhci_urb_enqueue(urb);
1374
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001375 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1376 /* Check to see if the max packet size for the default control
1377 * endpoint changed during FS device enumeration
1378 */
1379 if (urb->dev->speed == USB_SPEED_FULL) {
1380 ret = xhci_check_maxpacket(xhci, slot_id,
1381 ep_index, urb);
Sarah Sharpd13565c2011-07-22 14:34:34 -07001382 if (ret < 0) {
Lin Wang4daf9df2015-01-09 16:06:31 +02001383 xhci_urb_free_priv(urb_priv);
Sarah Sharpd13565c2011-07-22 14:34:34 -07001384 urb->hcpriv = NULL;
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001385 return ret;
Sarah Sharpd13565c2011-07-22 14:34:34 -07001386 }
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001387 }
Mathias Nyman69694082017-01-23 14:20:27 +02001388 }
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001389
Mathias Nyman69694082017-01-23 14:20:27 +02001390 spin_lock_irqsave(&xhci->lock, flags);
1391
1392 if (xhci->xhc_state & XHCI_STATE_DYING) {
1393 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for non-responsive xHCI host.\n",
1394 urb->ep->desc.bEndpointAddress, urb);
1395 ret = -ESHUTDOWN;
1396 goto free_priv;
1397 }
1398
1399 switch (usb_endpoint_type(&urb->ep->desc)) {
1400
1401 case USB_ENDPOINT_XFER_CONTROL:
Sarah Sharpb11069f2009-07-27 12:03:23 -07001402 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
Mathias Nyman69694082017-01-23 14:20:27 +02001403 slot_id, ep_index);
1404 break;
1405 case USB_ENDPOINT_XFER_BULK:
1406 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1407 if (ep_state & (EP_GETTING_STREAMS | EP_GETTING_NO_STREAMS)) {
1408 xhci_warn(xhci, "WARN: Can't enqueue URB, ep in streams transition state %x\n",
1409 ep_state);
Sarah Sharp8df75f42010-04-02 15:34:16 -07001410 ret = -EINVAL;
Mathias Nyman69694082017-01-23 14:20:27 +02001411 break;
Sarah Sharp8df75f42010-04-02 15:34:16 -07001412 }
Mathias Nyman69694082017-01-23 14:20:27 +02001413 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1414 slot_id, ep_index);
1415 break;
1416
1417
1418 case USB_ENDPOINT_XFER_INT:
Sarah Sharp624defa2009-09-02 12:14:28 -07001419 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1420 slot_id, ep_index);
Mathias Nyman69694082017-01-23 14:20:27 +02001421 break;
1422
1423 case USB_ENDPOINT_XFER_ISOC:
Andiry Xu787f4e52010-07-22 15:23:52 -07001424 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1425 slot_id, ep_index);
Sarah Sharp2d3f1fa2009-08-07 14:04:49 -07001426 }
Mathias Nyman69694082017-01-23 14:20:27 +02001427
1428 if (ret) {
Sarah Sharpd13565c2011-07-22 14:34:34 -07001429free_priv:
Mathias Nyman69694082017-01-23 14:20:27 +02001430 xhci_urb_free_priv(urb_priv);
1431 urb->hcpriv = NULL;
1432 }
Sarah Sharp6f5165c2009-10-27 10:57:01 -07001433 spin_unlock_irqrestore(&xhci->lock, flags);
Sarah Sharpd13565c2011-07-22 14:34:34 -07001434 return ret;
Sarah Sharpd0e96f52009-04-27 19:58:01 -07001435}
1436
Sarah Sharpae636742009-04-29 19:02:31 -07001437/*
1438 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1439 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1440 * should pick up where it left off in the TD, unless a Set Transfer Ring
1441 * Dequeue Pointer is issued.
1442 *
1443 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1444 * the ring. Since the ring is a contiguous structure, they can't be physically
1445 * removed. Instead, there are two options:
1446 *
1447 * 1) If the HC is in the middle of processing the URB to be canceled, we
1448 * simply move the ring's dequeue pointer past those TRBs using the Set
1449 * Transfer Ring Dequeue Pointer command. This will be the common case,
1450 * when drivers timeout on the last submitted URB and attempt to cancel.
1451 *
1452 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1453 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1454 * HC will need to invalidate the any TRBs it has cached after the stop
1455 * endpoint command, as noted in the xHCI 0.95 errata.
1456 *
1457 * 3) The TD may have completed by the time the Stop Endpoint Command
1458 * completes, so software needs to handle that case too.
1459 *
1460 * This function should protect against the TD enqueueing code ringing the
1461 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1462 * It also needs to account for multiple cancellations on happening at the same
1463 * time for the same endpoint.
1464 *
1465 * Note that this function can be called in any context, or so says
1466 * usb_hcd_unlink_urb()
Sarah Sharpd0e96f52009-04-27 19:58:01 -07001467 */
1468int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1469{
Sarah Sharpae636742009-04-29 19:02:31 -07001470 unsigned long flags;
Andiry Xu8e51adc2010-07-22 15:23:31 -07001471 int ret, i;
Sarah Sharpe34b2fb2009-09-28 17:21:37 -07001472 u32 temp;
Sarah Sharpae636742009-04-29 19:02:31 -07001473 struct xhci_hcd *xhci;
Andiry Xu8e51adc2010-07-22 15:23:31 -07001474 struct urb_priv *urb_priv;
Sarah Sharpae636742009-04-29 19:02:31 -07001475 struct xhci_td *td;
1476 unsigned int ep_index;
1477 struct xhci_ring *ep_ring;
Sarah Sharp63a0d9a2009-09-04 10:53:09 -07001478 struct xhci_virt_ep *ep;
Mathias Nymanddba5cd2014-05-08 19:26:00 +03001479 struct xhci_command *command;
Sarah Sharpae636742009-04-29 19:02:31 -07001480
1481 xhci = hcd_to_xhci(hcd);
1482 spin_lock_irqsave(&xhci->lock, flags);
Felipe Balbi5abdc2e2017-01-23 14:20:20 +02001483
1484 trace_xhci_urb_dequeue(urb);
1485
Sarah Sharpae636742009-04-29 19:02:31 -07001486 /* Make sure the URB hasn't completed or been unlinked already */
1487 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1488 if (ret || !urb->hcpriv)
1489 goto done;
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02001490 temp = readl(&xhci->op_regs->status);
Sarah Sharpc6cc27c2011-03-11 10:20:58 -08001491 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
Xenia Ragiadakouaa50b292013-08-14 06:33:54 +03001492 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1493 "HW died, freeing TD.");
Andiry Xu8e51adc2010-07-22 15:23:31 -07001494 urb_priv = urb->hcpriv;
Mathias Nyman9ef7fbb2017-01-23 14:20:25 +02001495 for (i = urb_priv->num_tds_done;
1496 i < urb_priv->num_tds && xhci->devs[urb->dev->slot_id];
Mathias Nyman5c821712016-01-26 17:50:12 +02001497 i++) {
Mathias Nyman7e64b032017-01-23 14:20:26 +02001498 td = &urb_priv->td[i];
Sarah Sharp585df1d2011-08-02 15:43:40 -07001499 if (!list_empty(&td->td_list))
1500 list_del_init(&td->td_list);
1501 if (!list_empty(&td->cancelled_td_list))
1502 list_del_init(&td->cancelled_td_list);
1503 }
Sarah Sharpe34b2fb2009-09-28 17:21:37 -07001504
1505 usb_hcd_unlink_urb_from_ep(hcd, urb);
1506 spin_unlock_irqrestore(&xhci->lock, flags);
Sarah Sharp214f76f2010-10-26 11:22:02 -07001507 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
Lin Wang4daf9df2015-01-09 16:06:31 +02001508 xhci_urb_free_priv(urb_priv);
Sarah Sharpe34b2fb2009-09-28 17:21:37 -07001509 return ret;
1510 }
Sarah Sharpae636742009-04-29 19:02:31 -07001511
Sarah Sharpae636742009-04-29 19:02:31 -07001512 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
Sarah Sharp63a0d9a2009-09-04 10:53:09 -07001513 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
Sarah Sharpe9df17e2010-04-02 15:34:43 -07001514 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1515 if (!ep_ring) {
1516 ret = -EINVAL;
1517 goto done;
1518 }
1519
Andiry Xu8e51adc2010-07-22 15:23:31 -07001520 urb_priv = urb->hcpriv;
Mathias Nyman9ef7fbb2017-01-23 14:20:25 +02001521 i = urb_priv->num_tds_done;
1522 if (i < urb_priv->num_tds)
Xenia Ragiadakouaa50b292013-08-14 06:33:54 +03001523 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1524 "Cancel URB %p, dev %s, ep 0x%x, "
1525 "starting at offset 0x%llx",
Sarah Sharp79688ac2011-12-19 16:56:04 -08001526 urb, urb->dev->devpath,
1527 urb->ep->desc.bEndpointAddress,
1528 (unsigned long long) xhci_trb_virt_to_dma(
Mathias Nyman7e64b032017-01-23 14:20:26 +02001529 urb_priv->td[i].start_seg,
1530 urb_priv->td[i].first_trb));
Andiry Xu8e51adc2010-07-22 15:23:31 -07001531
Mathias Nyman9ef7fbb2017-01-23 14:20:25 +02001532 for (; i < urb_priv->num_tds; i++) {
Mathias Nyman7e64b032017-01-23 14:20:26 +02001533 td = &urb_priv->td[i];
Andiry Xu8e51adc2010-07-22 15:23:31 -07001534 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1535 }
1536
Sarah Sharpae636742009-04-29 19:02:31 -07001537 /* Queue a stop endpoint command, but only if this is
1538 * the first cancellation to be handled.
1539 */
Mathias Nyman9983a5f2017-01-23 14:19:52 +02001540 if (!(ep->ep_state & EP_STOP_CMD_PENDING)) {
Mathias Nymanddba5cd2014-05-08 19:26:00 +03001541 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
Hans de Goedea0ee6192014-07-25 22:01:21 +02001542 if (!command) {
1543 ret = -ENOMEM;
1544 goto done;
1545 }
Mathias Nyman9983a5f2017-01-23 14:19:52 +02001546 ep->ep_state |= EP_STOP_CMD_PENDING;
Sarah Sharp6f5165c2009-10-27 10:57:01 -07001547 ep->stop_cmd_timer.expires = jiffies +
1548 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1549 add_timer(&ep->stop_cmd_timer);
Mathias Nymanddba5cd2014-05-08 19:26:00 +03001550 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id,
1551 ep_index, 0);
Sarah Sharp23e3be12009-04-29 19:05:20 -07001552 xhci_ring_cmd_db(xhci);
Sarah Sharpae636742009-04-29 19:02:31 -07001553 }
1554done:
1555 spin_unlock_irqrestore(&xhci->lock, flags);
1556 return ret;
Sarah Sharpd0e96f52009-04-27 19:58:01 -07001557}
1558
Sarah Sharpf94e01862009-04-27 19:58:38 -07001559/* Drop an endpoint from a new bandwidth configuration for this device.
1560 * Only one call to this function is allowed per endpoint before
1561 * check_bandwidth() or reset_bandwidth() must be called.
1562 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1563 * add the endpoint to the schedule with possibly new parameters denoted by a
1564 * different endpoint descriptor in usb_host_endpoint.
1565 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1566 * not allowed.
Sarah Sharpf88ba782009-05-14 11:44:22 -07001567 *
1568 * The USB core will not allow URBs to be queued to an endpoint that is being
1569 * disabled, so there's no need for mutual exclusion to protect
1570 * the xhci->devs[slot_id] structure.
Sarah Sharpf94e01862009-04-27 19:58:38 -07001571 */
1572int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1573 struct usb_host_endpoint *ep)
1574{
Sarah Sharpf94e01862009-04-27 19:58:38 -07001575 struct xhci_hcd *xhci;
John Yound115b042009-07-27 12:05:15 -07001576 struct xhci_container_ctx *in_ctx, *out_ctx;
1577 struct xhci_input_control_ctx *ctrl_ctx;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001578 unsigned int ep_index;
1579 struct xhci_ep_ctx *ep_ctx;
1580 u32 drop_flag;
Julius Wernerd6759132014-06-24 17:14:42 +03001581 u32 new_add_flags, new_drop_flags;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001582 int ret;
1583
Andiry Xu64927732010-10-14 07:22:45 -07001584 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001585 if (ret <= 0)
1586 return ret;
1587 xhci = hcd_to_xhci(hcd);
Sarah Sharpfe6c6c12011-05-23 16:41:17 -07001588 if (xhci->xhc_state & XHCI_STATE_DYING)
1589 return -ENODEV;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001590
Sarah Sharpfe6c6c12011-05-23 16:41:17 -07001591 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001592 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1593 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1594 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1595 __func__, drop_flag);
1596 return 0;
1597 }
1598
Sarah Sharpf94e01862009-04-27 19:58:38 -07001599 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
John Yound115b042009-07-27 12:05:15 -07001600 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
Lin Wang4daf9df2015-01-09 16:06:31 +02001601 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
Sarah Sharp92f8e762013-04-23 17:11:14 -07001602 if (!ctrl_ctx) {
1603 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1604 __func__);
1605 return 0;
1606 }
1607
Sarah Sharpf94e01862009-04-27 19:58:38 -07001608 ep_index = xhci_get_endpoint_index(&ep->desc);
John Yound115b042009-07-27 12:05:15 -07001609 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001610 /* If the HC already knows the endpoint is disabled,
1611 * or the HCD has noted it is disabled, ignore this request
1612 */
Mathias Nyman5071e6b2016-11-11 15:13:28 +02001613 if ((GET_EP_CTX_STATE(ep_ctx) == EP_STATE_DISABLED) ||
Matt Evans28ccd292011-03-29 13:40:46 +11001614 le32_to_cpu(ctrl_ctx->drop_flags) &
1615 xhci_get_endpoint_flag(&ep->desc)) {
Hans de Goedea6134132015-01-16 17:54:02 +02001616 /* Do not warn when called after a usb_device_reset */
1617 if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL)
1618 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1619 __func__, ep);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001620 return 0;
1621 }
1622
Matt Evans28ccd292011-03-29 13:40:46 +11001623 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1624 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001625
Matt Evans28ccd292011-03-29 13:40:46 +11001626 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1627 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001628
Sarah Sharpf94e01862009-04-27 19:58:38 -07001629 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1630
Chunfeng Yun0cbd4b32015-11-24 13:09:55 +02001631 if (xhci->quirks & XHCI_MTK_HOST)
1632 xhci_mtk_drop_ep_quirk(hcd, udev, ep);
1633
Julius Wernerd6759132014-06-24 17:14:42 +03001634 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
Sarah Sharpf94e01862009-04-27 19:58:38 -07001635 (unsigned int) ep->desc.bEndpointAddress,
1636 udev->slot_id,
1637 (unsigned int) new_drop_flags,
Julius Wernerd6759132014-06-24 17:14:42 +03001638 (unsigned int) new_add_flags);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001639 return 0;
1640}
1641
1642/* Add an endpoint to a new possible bandwidth configuration for this device.
1643 * Only one call to this function is allowed per endpoint before
1644 * check_bandwidth() or reset_bandwidth() must be called.
1645 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1646 * add the endpoint to the schedule with possibly new parameters denoted by a
1647 * different endpoint descriptor in usb_host_endpoint.
1648 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1649 * not allowed.
Sarah Sharpf88ba782009-05-14 11:44:22 -07001650 *
1651 * The USB core will not allow URBs to be queued to an endpoint until the
1652 * configuration or alt setting is installed in the device, so there's no need
1653 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
Sarah Sharpf94e01862009-04-27 19:58:38 -07001654 */
1655int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1656 struct usb_host_endpoint *ep)
1657{
Sarah Sharpf94e01862009-04-27 19:58:38 -07001658 struct xhci_hcd *xhci;
Lin Wang92c96912015-01-09 16:06:27 +02001659 struct xhci_container_ctx *in_ctx;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001660 unsigned int ep_index;
John Yound115b042009-07-27 12:05:15 -07001661 struct xhci_input_control_ctx *ctrl_ctx;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001662 u32 added_ctxs;
Julius Wernerd6759132014-06-24 17:14:42 +03001663 u32 new_add_flags, new_drop_flags;
Sarah Sharpfa75ac32011-06-05 23:10:04 -07001664 struct xhci_virt_device *virt_dev;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001665 int ret = 0;
1666
Andiry Xu64927732010-10-14 07:22:45 -07001667 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
Sarah Sharpa1587d92009-07-27 12:03:15 -07001668 if (ret <= 0) {
1669 /* So we won't queue a reset ep command for a root hub */
1670 ep->hcpriv = NULL;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001671 return ret;
Sarah Sharpa1587d92009-07-27 12:03:15 -07001672 }
Sarah Sharpf94e01862009-04-27 19:58:38 -07001673 xhci = hcd_to_xhci(hcd);
Sarah Sharpfe6c6c12011-05-23 16:41:17 -07001674 if (xhci->xhc_state & XHCI_STATE_DYING)
1675 return -ENODEV;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001676
1677 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001678 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1679 /* FIXME when we have to issue an evaluate endpoint command to
1680 * deal with ep0 max packet size changing once we get the
1681 * descriptors
1682 */
1683 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1684 __func__, added_ctxs);
1685 return 0;
1686 }
1687
Sarah Sharpfa75ac32011-06-05 23:10:04 -07001688 virt_dev = xhci->devs[udev->slot_id];
1689 in_ctx = virt_dev->in_ctx;
Lin Wang4daf9df2015-01-09 16:06:31 +02001690 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
Sarah Sharp92f8e762013-04-23 17:11:14 -07001691 if (!ctrl_ctx) {
1692 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1693 __func__);
1694 return 0;
1695 }
Sarah Sharpfa75ac32011-06-05 23:10:04 -07001696
Sarah Sharp92f8e762013-04-23 17:11:14 -07001697 ep_index = xhci_get_endpoint_index(&ep->desc);
Sarah Sharpfa75ac32011-06-05 23:10:04 -07001698 /* If this endpoint is already in use, and the upper layers are trying
1699 * to add it again without dropping it, reject the addition.
1700 */
1701 if (virt_dev->eps[ep_index].ring &&
Lin Wang92c96912015-01-09 16:06:27 +02001702 !(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) {
Sarah Sharpfa75ac32011-06-05 23:10:04 -07001703 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1704 "without dropping it.\n",
1705 (unsigned int) ep->desc.bEndpointAddress);
1706 return -EINVAL;
1707 }
1708
Sarah Sharpf94e01862009-04-27 19:58:38 -07001709 /* If the HCD has already noted the endpoint is enabled,
1710 * ignore this request.
1711 */
Lin Wang92c96912015-01-09 16:06:27 +02001712 if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) {
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -07001713 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1714 __func__, ep);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001715 return 0;
1716 }
1717
Sarah Sharpf88ba782009-05-14 11:44:22 -07001718 /*
1719 * Configuration and alternate setting changes must be done in
1720 * process context, not interrupt context (or so documenation
1721 * for usb_set_interface() and usb_set_configuration() claim).
1722 */
Sarah Sharpfa75ac32011-06-05 23:10:04 -07001723 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
Sarah Sharpf94e01862009-04-27 19:58:38 -07001724 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1725 __func__, ep->desc.bEndpointAddress);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001726 return -ENOMEM;
1727 }
1728
Chunfeng Yun0cbd4b32015-11-24 13:09:55 +02001729 if (xhci->quirks & XHCI_MTK_HOST) {
1730 ret = xhci_mtk_add_ep_quirk(hcd, udev, ep);
1731 if (ret < 0) {
1732 xhci_free_or_cache_endpoint_ring(xhci,
1733 virt_dev, ep_index);
1734 return ret;
1735 }
1736 }
1737
Matt Evans28ccd292011-03-29 13:40:46 +11001738 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1739 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001740
1741 /* If xhci_endpoint_disable() was called for this endpoint, but the
1742 * xHC hasn't been notified yet through the check_bandwidth() call,
1743 * this re-adds a new state for the endpoint from the new endpoint
1744 * descriptors. We must drop and re-add this endpoint, so we leave the
1745 * drop flags alone.
1746 */
Matt Evans28ccd292011-03-29 13:40:46 +11001747 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001748
Sarah Sharpa1587d92009-07-27 12:03:15 -07001749 /* Store the usb_device pointer for later use */
1750 ep->hcpriv = udev;
1751
Julius Wernerd6759132014-06-24 17:14:42 +03001752 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
Sarah Sharpf94e01862009-04-27 19:58:38 -07001753 (unsigned int) ep->desc.bEndpointAddress,
1754 udev->slot_id,
1755 (unsigned int) new_drop_flags,
Julius Wernerd6759132014-06-24 17:14:42 +03001756 (unsigned int) new_add_flags);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001757 return 0;
1758}
1759
John Yound115b042009-07-27 12:05:15 -07001760static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
Sarah Sharpf94e01862009-04-27 19:58:38 -07001761{
John Yound115b042009-07-27 12:05:15 -07001762 struct xhci_input_control_ctx *ctrl_ctx;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001763 struct xhci_ep_ctx *ep_ctx;
John Yound115b042009-07-27 12:05:15 -07001764 struct xhci_slot_ctx *slot_ctx;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001765 int i;
1766
Lin Wang4daf9df2015-01-09 16:06:31 +02001767 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
Sarah Sharp92f8e762013-04-23 17:11:14 -07001768 if (!ctrl_ctx) {
1769 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1770 __func__);
1771 return;
1772 }
1773
Sarah Sharpf94e01862009-04-27 19:58:38 -07001774 /* When a device's add flag and drop flag are zero, any subsequent
1775 * configure endpoint command will leave that endpoint's state
1776 * untouched. Make sure we don't leave any old state in the input
1777 * endpoint contexts.
1778 */
John Yound115b042009-07-27 12:05:15 -07001779 ctrl_ctx->drop_flags = 0;
1780 ctrl_ctx->add_flags = 0;
1781 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
Matt Evans28ccd292011-03-29 13:40:46 +11001782 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001783 /* Endpoint 0 is always valid */
Matt Evans28ccd292011-03-29 13:40:46 +11001784 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
Felipe Balbi98871e92017-01-23 14:20:04 +02001785 for (i = 1; i < 31; i++) {
John Yound115b042009-07-27 12:05:15 -07001786 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001787 ep_ctx->ep_info = 0;
1788 ep_ctx->ep_info2 = 0;
Sarah Sharp8e595a52009-07-27 12:03:31 -07001789 ep_ctx->deq = 0;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001790 ep_ctx->tx_info = 0;
1791 }
1792}
1793
Sarah Sharpf2217e82009-08-07 14:04:43 -07001794static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
Sarah Sharp00161f72011-04-28 12:23:23 -07001795 struct usb_device *udev, u32 *cmd_status)
Sarah Sharpf2217e82009-08-07 14:04:43 -07001796{
1797 int ret;
1798
Sarah Sharp913a8a32009-09-04 10:53:13 -07001799 switch (*cmd_status) {
Felipe Balbi0b7c1052017-01-23 14:20:06 +02001800 case COMP_COMMAND_ABORTED:
1801 case COMP_STOPPED:
Mathias Nymanc311e392014-05-08 19:26:03 +03001802 xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
1803 ret = -ETIME;
1804 break;
Felipe Balbi0b7c1052017-01-23 14:20:06 +02001805 case COMP_RESOURCE_ERROR:
Oliver Neukum288c0f42014-06-02 15:25:17 +02001806 dev_warn(&udev->dev,
1807 "Not enough host controller resources for new device state.\n");
Sarah Sharpf2217e82009-08-07 14:04:43 -07001808 ret = -ENOMEM;
1809 /* FIXME: can we allocate more resources for the HC? */
1810 break;
Felipe Balbi0b7c1052017-01-23 14:20:06 +02001811 case COMP_BANDWIDTH_ERROR:
1812 case COMP_SECONDARY_BANDWIDTH_ERROR:
Oliver Neukum288c0f42014-06-02 15:25:17 +02001813 dev_warn(&udev->dev,
1814 "Not enough bandwidth for new device state.\n");
Sarah Sharpf2217e82009-08-07 14:04:43 -07001815 ret = -ENOSPC;
1816 /* FIXME: can we go back to the old state? */
1817 break;
Felipe Balbi0b7c1052017-01-23 14:20:06 +02001818 case COMP_TRB_ERROR:
Sarah Sharpf2217e82009-08-07 14:04:43 -07001819 /* the HCD set up something wrong */
1820 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1821 "add flag = 1, "
1822 "and endpoint is not disabled.\n");
1823 ret = -EINVAL;
1824 break;
Felipe Balbi0b7c1052017-01-23 14:20:06 +02001825 case COMP_INCOMPATIBLE_DEVICE_ERROR:
Oliver Neukum288c0f42014-06-02 15:25:17 +02001826 dev_warn(&udev->dev,
1827 "ERROR: Incompatible device for endpoint configure command.\n");
Alex Hef6ba6fe2011-06-08 18:34:06 +08001828 ret = -ENODEV;
1829 break;
Sarah Sharpf2217e82009-08-07 14:04:43 -07001830 case COMP_SUCCESS:
Xenia Ragiadakou3a7fa5b2013-07-31 07:35:27 +03001831 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1832 "Successful Endpoint Configure command");
Sarah Sharpf2217e82009-08-07 14:04:43 -07001833 ret = 0;
1834 break;
1835 default:
Oliver Neukum288c0f42014-06-02 15:25:17 +02001836 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1837 *cmd_status);
Sarah Sharpf2217e82009-08-07 14:04:43 -07001838 ret = -EINVAL;
1839 break;
1840 }
1841 return ret;
1842}
1843
1844static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
Sarah Sharp00161f72011-04-28 12:23:23 -07001845 struct usb_device *udev, u32 *cmd_status)
Sarah Sharpf2217e82009-08-07 14:04:43 -07001846{
1847 int ret;
Sarah Sharp913a8a32009-09-04 10:53:13 -07001848 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
Sarah Sharpf2217e82009-08-07 14:04:43 -07001849
Sarah Sharp913a8a32009-09-04 10:53:13 -07001850 switch (*cmd_status) {
Felipe Balbi0b7c1052017-01-23 14:20:06 +02001851 case COMP_COMMAND_ABORTED:
1852 case COMP_STOPPED:
Mathias Nymanc311e392014-05-08 19:26:03 +03001853 xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
1854 ret = -ETIME;
1855 break;
Felipe Balbi0b7c1052017-01-23 14:20:06 +02001856 case COMP_PARAMETER_ERROR:
Oliver Neukum288c0f42014-06-02 15:25:17 +02001857 dev_warn(&udev->dev,
1858 "WARN: xHCI driver setup invalid evaluate context command.\n");
Sarah Sharpf2217e82009-08-07 14:04:43 -07001859 ret = -EINVAL;
1860 break;
Felipe Balbi0b7c1052017-01-23 14:20:06 +02001861 case COMP_SLOT_NOT_ENABLED_ERROR:
Oliver Neukum288c0f42014-06-02 15:25:17 +02001862 dev_warn(&udev->dev,
1863 "WARN: slot not enabled for evaluate context command.\n");
Sarah Sharpb8031342012-10-16 13:26:22 -07001864 ret = -EINVAL;
1865 break;
Felipe Balbi0b7c1052017-01-23 14:20:06 +02001866 case COMP_CONTEXT_STATE_ERROR:
Oliver Neukum288c0f42014-06-02 15:25:17 +02001867 dev_warn(&udev->dev,
1868 "WARN: invalid context state for evaluate context command.\n");
Sarah Sharpf2217e82009-08-07 14:04:43 -07001869 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1870 ret = -EINVAL;
1871 break;
Felipe Balbi0b7c1052017-01-23 14:20:06 +02001872 case COMP_INCOMPATIBLE_DEVICE_ERROR:
Oliver Neukum288c0f42014-06-02 15:25:17 +02001873 dev_warn(&udev->dev,
1874 "ERROR: Incompatible device for evaluate context command.\n");
Alex Hef6ba6fe2011-06-08 18:34:06 +08001875 ret = -ENODEV;
1876 break;
Felipe Balbi0b7c1052017-01-23 14:20:06 +02001877 case COMP_MAX_EXIT_LATENCY_TOO_LARGE_ERROR:
Alex He1bb73a82011-05-05 18:14:12 +08001878 /* Max Exit Latency too large error */
1879 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1880 ret = -EINVAL;
1881 break;
Sarah Sharpf2217e82009-08-07 14:04:43 -07001882 case COMP_SUCCESS:
Xenia Ragiadakou3a7fa5b2013-07-31 07:35:27 +03001883 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1884 "Successful evaluate context command");
Sarah Sharpf2217e82009-08-07 14:04:43 -07001885 ret = 0;
1886 break;
1887 default:
Oliver Neukum288c0f42014-06-02 15:25:17 +02001888 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1889 *cmd_status);
Sarah Sharpf2217e82009-08-07 14:04:43 -07001890 ret = -EINVAL;
1891 break;
1892 }
1893 return ret;
1894}
1895
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001896static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
Sarah Sharp92f8e762013-04-23 17:11:14 -07001897 struct xhci_input_control_ctx *ctrl_ctx)
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001898{
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001899 u32 valid_add_flags;
1900 u32 valid_drop_flags;
1901
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001902 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1903 * (bit 1). The default control endpoint is added during the Address
1904 * Device command and is never removed until the slot is disabled.
1905 */
Xenia Ragiadakouef734002013-09-09 21:03:06 +03001906 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1907 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001908
1909 /* Use hweight32 to count the number of ones in the add flags, or
1910 * number of endpoints added. Don't count endpoints that are changed
1911 * (both added and dropped).
1912 */
1913 return hweight32(valid_add_flags) -
1914 hweight32(valid_add_flags & valid_drop_flags);
1915}
1916
1917static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
Sarah Sharp92f8e762013-04-23 17:11:14 -07001918 struct xhci_input_control_ctx *ctrl_ctx)
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001919{
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001920 u32 valid_add_flags;
1921 u32 valid_drop_flags;
1922
Xenia Ragiadakou78d1ff02013-09-09 21:03:07 +03001923 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1924 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001925
1926 return hweight32(valid_drop_flags) -
1927 hweight32(valid_add_flags & valid_drop_flags);
1928}
1929
1930/*
1931 * We need to reserve the new number of endpoints before the configure endpoint
1932 * command completes. We can't subtract the dropped endpoints from the number
1933 * of active endpoints until the command completes because we can oversubscribe
1934 * the host in this case:
1935 *
1936 * - the first configure endpoint command drops more endpoints than it adds
1937 * - a second configure endpoint command that adds more endpoints is queued
1938 * - the first configure endpoint command fails, so the config is unchanged
1939 * - the second command may succeed, even though there isn't enough resources
1940 *
1941 * Must be called with xhci->lock held.
1942 */
1943static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
Sarah Sharp92f8e762013-04-23 17:11:14 -07001944 struct xhci_input_control_ctx *ctrl_ctx)
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001945{
1946 u32 added_eps;
1947
Sarah Sharp92f8e762013-04-23 17:11:14 -07001948 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001949 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +03001950 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1951 "Not enough ep ctxs: "
1952 "%u active, need to add %u, limit is %u.",
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001953 xhci->num_active_eps, added_eps,
1954 xhci->limit_active_eps);
1955 return -ENOMEM;
1956 }
1957 xhci->num_active_eps += added_eps;
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +03001958 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1959 "Adding %u ep ctxs, %u now active.", added_eps,
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001960 xhci->num_active_eps);
1961 return 0;
1962}
1963
1964/*
1965 * The configure endpoint was failed by the xHC for some other reason, so we
1966 * need to revert the resources that failed configuration would have used.
1967 *
1968 * Must be called with xhci->lock held.
1969 */
1970static void xhci_free_host_resources(struct xhci_hcd *xhci,
Sarah Sharp92f8e762013-04-23 17:11:14 -07001971 struct xhci_input_control_ctx *ctrl_ctx)
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001972{
1973 u32 num_failed_eps;
1974
Sarah Sharp92f8e762013-04-23 17:11:14 -07001975 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001976 xhci->num_active_eps -= num_failed_eps;
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +03001977 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1978 "Removing %u failed ep ctxs, %u now active.",
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001979 num_failed_eps,
1980 xhci->num_active_eps);
1981}
1982
1983/*
1984 * Now that the command has completed, clean up the active endpoint count by
1985 * subtracting out the endpoints that were dropped (but not changed).
1986 *
1987 * Must be called with xhci->lock held.
1988 */
1989static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
Sarah Sharp92f8e762013-04-23 17:11:14 -07001990 struct xhci_input_control_ctx *ctrl_ctx)
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001991{
1992 u32 num_dropped_eps;
1993
Sarah Sharp92f8e762013-04-23 17:11:14 -07001994 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001995 xhci->num_active_eps -= num_dropped_eps;
1996 if (num_dropped_eps)
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +03001997 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1998 "Removing %u dropped ep ctxs, %u now active.",
Sarah Sharp2cf95c12011-05-11 16:14:58 -07001999 num_dropped_eps,
2000 xhci->num_active_eps);
2001}
2002
Felipe Balbied384bd2012-08-07 14:10:03 +03002003static unsigned int xhci_get_block_size(struct usb_device *udev)
Sarah Sharpc29eea62011-09-02 11:05:52 -07002004{
2005 switch (udev->speed) {
2006 case USB_SPEED_LOW:
2007 case USB_SPEED_FULL:
2008 return FS_BLOCK;
2009 case USB_SPEED_HIGH:
2010 return HS_BLOCK;
2011 case USB_SPEED_SUPER:
Mathias Nyman0caf6b32016-01-25 15:30:44 +02002012 case USB_SPEED_SUPER_PLUS:
Sarah Sharpc29eea62011-09-02 11:05:52 -07002013 return SS_BLOCK;
2014 case USB_SPEED_UNKNOWN:
2015 case USB_SPEED_WIRELESS:
2016 default:
2017 /* Should never happen */
2018 return 1;
2019 }
2020}
2021
Felipe Balbied384bd2012-08-07 14:10:03 +03002022static unsigned int
2023xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
Sarah Sharpc29eea62011-09-02 11:05:52 -07002024{
2025 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2026 return LS_OVERHEAD;
2027 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2028 return FS_OVERHEAD;
2029 return HS_OVERHEAD;
2030}
2031
2032/* If we are changing a LS/FS device under a HS hub,
2033 * make sure (if we are activating a new TT) that the HS bus has enough
2034 * bandwidth for this new TT.
2035 */
2036static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2037 struct xhci_virt_device *virt_dev,
2038 int old_active_eps)
2039{
2040 struct xhci_interval_bw_table *bw_table;
2041 struct xhci_tt_bw_info *tt_info;
2042
2043 /* Find the bandwidth table for the root port this TT is attached to. */
2044 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2045 tt_info = virt_dev->tt_info;
2046 /* If this TT already had active endpoints, the bandwidth for this TT
2047 * has already been added. Removing all periodic endpoints (and thus
2048 * making the TT enactive) will only decrease the bandwidth used.
2049 */
2050 if (old_active_eps)
2051 return 0;
2052 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2053 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2054 return -ENOMEM;
2055 return 0;
2056 }
2057 /* Not sure why we would have no new active endpoints...
2058 *
2059 * Maybe because of an Evaluate Context change for a hub update or a
2060 * control endpoint 0 max packet size change?
2061 * FIXME: skip the bandwidth calculation in that case.
2062 */
2063 return 0;
2064}
2065
Sarah Sharp2b698992011-09-13 16:41:13 -07002066static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2067 struct xhci_virt_device *virt_dev)
2068{
2069 unsigned int bw_reserved;
2070
2071 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2072 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2073 return -ENOMEM;
2074
2075 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2076 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2077 return -ENOMEM;
2078
2079 return 0;
2080}
2081
Sarah Sharpc29eea62011-09-02 11:05:52 -07002082/*
2083 * This algorithm is a very conservative estimate of the worst-case scheduling
2084 * scenario for any one interval. The hardware dynamically schedules the
2085 * packets, so we can't tell which microframe could be the limiting factor in
2086 * the bandwidth scheduling. This only takes into account periodic endpoints.
2087 *
2088 * Obviously, we can't solve an NP complete problem to find the minimum worst
2089 * case scenario. Instead, we come up with an estimate that is no less than
2090 * the worst case bandwidth used for any one microframe, but may be an
2091 * over-estimate.
2092 *
2093 * We walk the requirements for each endpoint by interval, starting with the
2094 * smallest interval, and place packets in the schedule where there is only one
2095 * possible way to schedule packets for that interval. In order to simplify
2096 * this algorithm, we record the largest max packet size for each interval, and
2097 * assume all packets will be that size.
2098 *
2099 * For interval 0, we obviously must schedule all packets for each interval.
2100 * The bandwidth for interval 0 is just the amount of data to be transmitted
2101 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2102 * the number of packets).
2103 *
2104 * For interval 1, we have two possible microframes to schedule those packets
2105 * in. For this algorithm, if we can schedule the same number of packets for
2106 * each possible scheduling opportunity (each microframe), we will do so. The
2107 * remaining number of packets will be saved to be transmitted in the gaps in
2108 * the next interval's scheduling sequence.
2109 *
2110 * As we move those remaining packets to be scheduled with interval 2 packets,
2111 * we have to double the number of remaining packets to transmit. This is
2112 * because the intervals are actually powers of 2, and we would be transmitting
2113 * the previous interval's packets twice in this interval. We also have to be
2114 * sure that when we look at the largest max packet size for this interval, we
2115 * also look at the largest max packet size for the remaining packets and take
2116 * the greater of the two.
2117 *
2118 * The algorithm continues to evenly distribute packets in each scheduling
2119 * opportunity, and push the remaining packets out, until we get to the last
2120 * interval. Then those packets and their associated overhead are just added
2121 * to the bandwidth used.
Sarah Sharp2e279802011-09-02 11:05:50 -07002122 */
2123static int xhci_check_bw_table(struct xhci_hcd *xhci,
2124 struct xhci_virt_device *virt_dev,
2125 int old_active_eps)
2126{
Sarah Sharpc29eea62011-09-02 11:05:52 -07002127 unsigned int bw_reserved;
2128 unsigned int max_bandwidth;
2129 unsigned int bw_used;
2130 unsigned int block_size;
2131 struct xhci_interval_bw_table *bw_table;
2132 unsigned int packet_size = 0;
2133 unsigned int overhead = 0;
2134 unsigned int packets_transmitted = 0;
2135 unsigned int packets_remaining = 0;
2136 unsigned int i;
2137
Mathias Nyman0caf6b32016-01-25 15:30:44 +02002138 if (virt_dev->udev->speed >= USB_SPEED_SUPER)
Sarah Sharp2b698992011-09-13 16:41:13 -07002139 return xhci_check_ss_bw(xhci, virt_dev);
2140
Sarah Sharpc29eea62011-09-02 11:05:52 -07002141 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2142 max_bandwidth = HS_BW_LIMIT;
2143 /* Convert percent of bus BW reserved to blocks reserved */
2144 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2145 } else {
2146 max_bandwidth = FS_BW_LIMIT;
2147 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2148 }
2149
2150 bw_table = virt_dev->bw_table;
2151 /* We need to translate the max packet size and max ESIT payloads into
2152 * the units the hardware uses.
2153 */
2154 block_size = xhci_get_block_size(virt_dev->udev);
2155
2156 /* If we are manipulating a LS/FS device under a HS hub, double check
2157 * that the HS bus has enough bandwidth if we are activing a new TT.
2158 */
2159 if (virt_dev->tt_info) {
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +03002160 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2161 "Recalculating BW for rootport %u",
Sarah Sharpc29eea62011-09-02 11:05:52 -07002162 virt_dev->real_port);
2163 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2164 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2165 "newly activated TT.\n");
2166 return -ENOMEM;
2167 }
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +03002168 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2169 "Recalculating BW for TT slot %u port %u",
Sarah Sharpc29eea62011-09-02 11:05:52 -07002170 virt_dev->tt_info->slot_id,
2171 virt_dev->tt_info->ttport);
2172 } else {
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +03002173 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2174 "Recalculating BW for rootport %u",
Sarah Sharpc29eea62011-09-02 11:05:52 -07002175 virt_dev->real_port);
2176 }
2177
2178 /* Add in how much bandwidth will be used for interval zero, or the
2179 * rounded max ESIT payload + number of packets * largest overhead.
2180 */
2181 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2182 bw_table->interval_bw[0].num_packets *
2183 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2184
2185 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2186 unsigned int bw_added;
2187 unsigned int largest_mps;
2188 unsigned int interval_overhead;
2189
2190 /*
2191 * How many packets could we transmit in this interval?
2192 * If packets didn't fit in the previous interval, we will need
2193 * to transmit that many packets twice within this interval.
2194 */
2195 packets_remaining = 2 * packets_remaining +
2196 bw_table->interval_bw[i].num_packets;
2197
2198 /* Find the largest max packet size of this or the previous
2199 * interval.
2200 */
2201 if (list_empty(&bw_table->interval_bw[i].endpoints))
2202 largest_mps = 0;
2203 else {
2204 struct xhci_virt_ep *virt_ep;
2205 struct list_head *ep_entry;
2206
2207 ep_entry = bw_table->interval_bw[i].endpoints.next;
2208 virt_ep = list_entry(ep_entry,
2209 struct xhci_virt_ep, bw_endpoint_list);
2210 /* Convert to blocks, rounding up */
2211 largest_mps = DIV_ROUND_UP(
2212 virt_ep->bw_info.max_packet_size,
2213 block_size);
2214 }
2215 if (largest_mps > packet_size)
2216 packet_size = largest_mps;
2217
2218 /* Use the larger overhead of this or the previous interval. */
2219 interval_overhead = xhci_get_largest_overhead(
2220 &bw_table->interval_bw[i]);
2221 if (interval_overhead > overhead)
2222 overhead = interval_overhead;
2223
2224 /* How many packets can we evenly distribute across
2225 * (1 << (i + 1)) possible scheduling opportunities?
2226 */
2227 packets_transmitted = packets_remaining >> (i + 1);
2228
2229 /* Add in the bandwidth used for those scheduled packets */
2230 bw_added = packets_transmitted * (overhead + packet_size);
2231
2232 /* How many packets do we have remaining to transmit? */
2233 packets_remaining = packets_remaining % (1 << (i + 1));
2234
2235 /* What largest max packet size should those packets have? */
2236 /* If we've transmitted all packets, don't carry over the
2237 * largest packet size.
2238 */
2239 if (packets_remaining == 0) {
2240 packet_size = 0;
2241 overhead = 0;
2242 } else if (packets_transmitted > 0) {
2243 /* Otherwise if we do have remaining packets, and we've
2244 * scheduled some packets in this interval, take the
2245 * largest max packet size from endpoints with this
2246 * interval.
2247 */
2248 packet_size = largest_mps;
2249 overhead = interval_overhead;
2250 }
2251 /* Otherwise carry over packet_size and overhead from the last
2252 * time we had a remainder.
2253 */
2254 bw_used += bw_added;
2255 if (bw_used > max_bandwidth) {
2256 xhci_warn(xhci, "Not enough bandwidth. "
2257 "Proposed: %u, Max: %u\n",
2258 bw_used, max_bandwidth);
2259 return -ENOMEM;
2260 }
2261 }
2262 /*
2263 * Ok, we know we have some packets left over after even-handedly
2264 * scheduling interval 15. We don't know which microframes they will
2265 * fit into, so we over-schedule and say they will be scheduled every
2266 * microframe.
2267 */
2268 if (packets_remaining > 0)
2269 bw_used += overhead + packet_size;
2270
2271 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2272 unsigned int port_index = virt_dev->real_port - 1;
2273
2274 /* OK, we're manipulating a HS device attached to a
2275 * root port bandwidth domain. Include the number of active TTs
2276 * in the bandwidth used.
2277 */
2278 bw_used += TT_HS_OVERHEAD *
2279 xhci->rh_bw[port_index].num_active_tts;
2280 }
2281
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +03002282 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2283 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2284 "Available: %u " "percent",
Sarah Sharpc29eea62011-09-02 11:05:52 -07002285 bw_used, max_bandwidth, bw_reserved,
2286 (max_bandwidth - bw_used - bw_reserved) * 100 /
2287 max_bandwidth);
2288
2289 bw_used += bw_reserved;
2290 if (bw_used > max_bandwidth) {
2291 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2292 bw_used, max_bandwidth);
2293 return -ENOMEM;
2294 }
2295
2296 bw_table->bw_used = bw_used;
Sarah Sharp2e279802011-09-02 11:05:50 -07002297 return 0;
2298}
2299
2300static bool xhci_is_async_ep(unsigned int ep_type)
2301{
2302 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2303 ep_type != ISOC_IN_EP &&
2304 ep_type != INT_IN_EP);
2305}
2306
Sarah Sharp2b698992011-09-13 16:41:13 -07002307static bool xhci_is_sync_in_ep(unsigned int ep_type)
2308{
Sarah Sharp392a07a2012-10-25 13:44:12 -07002309 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
Sarah Sharp2b698992011-09-13 16:41:13 -07002310}
2311
2312static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2313{
2314 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2315
2316 if (ep_bw->ep_interval == 0)
2317 return SS_OVERHEAD_BURST +
2318 (ep_bw->mult * ep_bw->num_packets *
2319 (SS_OVERHEAD + mps));
2320 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2321 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2322 1 << ep_bw->ep_interval);
2323
2324}
2325
Sarah Sharp2e279802011-09-02 11:05:50 -07002326void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2327 struct xhci_bw_info *ep_bw,
2328 struct xhci_interval_bw_table *bw_table,
2329 struct usb_device *udev,
2330 struct xhci_virt_ep *virt_ep,
2331 struct xhci_tt_bw_info *tt_info)
2332{
2333 struct xhci_interval_bw *interval_bw;
2334 int normalized_interval;
2335
Sarah Sharp2b698992011-09-13 16:41:13 -07002336 if (xhci_is_async_ep(ep_bw->type))
Sarah Sharp2e279802011-09-02 11:05:50 -07002337 return;
2338
Mathias Nyman0caf6b32016-01-25 15:30:44 +02002339 if (udev->speed >= USB_SPEED_SUPER) {
Sarah Sharp2b698992011-09-13 16:41:13 -07002340 if (xhci_is_sync_in_ep(ep_bw->type))
2341 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2342 xhci_get_ss_bw_consumed(ep_bw);
2343 else
2344 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2345 xhci_get_ss_bw_consumed(ep_bw);
2346 return;
2347 }
2348
2349 /* SuperSpeed endpoints never get added to intervals in the table, so
2350 * this check is only valid for HS/FS/LS devices.
2351 */
2352 if (list_empty(&virt_ep->bw_endpoint_list))
2353 return;
Sarah Sharp2e279802011-09-02 11:05:50 -07002354 /* For LS/FS devices, we need to translate the interval expressed in
2355 * microframes to frames.
2356 */
2357 if (udev->speed == USB_SPEED_HIGH)
2358 normalized_interval = ep_bw->ep_interval;
2359 else
2360 normalized_interval = ep_bw->ep_interval - 3;
2361
2362 if (normalized_interval == 0)
2363 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2364 interval_bw = &bw_table->interval_bw[normalized_interval];
2365 interval_bw->num_packets -= ep_bw->num_packets;
2366 switch (udev->speed) {
2367 case USB_SPEED_LOW:
2368 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2369 break;
2370 case USB_SPEED_FULL:
2371 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2372 break;
2373 case USB_SPEED_HIGH:
2374 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2375 break;
2376 case USB_SPEED_SUPER:
Mathias Nyman0caf6b32016-01-25 15:30:44 +02002377 case USB_SPEED_SUPER_PLUS:
Sarah Sharp2e279802011-09-02 11:05:50 -07002378 case USB_SPEED_UNKNOWN:
2379 case USB_SPEED_WIRELESS:
2380 /* Should never happen because only LS/FS/HS endpoints will get
2381 * added to the endpoint list.
2382 */
2383 return;
2384 }
2385 if (tt_info)
2386 tt_info->active_eps -= 1;
2387 list_del_init(&virt_ep->bw_endpoint_list);
2388}
2389
2390static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2391 struct xhci_bw_info *ep_bw,
2392 struct xhci_interval_bw_table *bw_table,
2393 struct usb_device *udev,
2394 struct xhci_virt_ep *virt_ep,
2395 struct xhci_tt_bw_info *tt_info)
2396{
2397 struct xhci_interval_bw *interval_bw;
2398 struct xhci_virt_ep *smaller_ep;
2399 int normalized_interval;
2400
2401 if (xhci_is_async_ep(ep_bw->type))
2402 return;
2403
Sarah Sharp2b698992011-09-13 16:41:13 -07002404 if (udev->speed == USB_SPEED_SUPER) {
2405 if (xhci_is_sync_in_ep(ep_bw->type))
2406 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2407 xhci_get_ss_bw_consumed(ep_bw);
2408 else
2409 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2410 xhci_get_ss_bw_consumed(ep_bw);
2411 return;
2412 }
2413
Sarah Sharp2e279802011-09-02 11:05:50 -07002414 /* For LS/FS devices, we need to translate the interval expressed in
2415 * microframes to frames.
2416 */
2417 if (udev->speed == USB_SPEED_HIGH)
2418 normalized_interval = ep_bw->ep_interval;
2419 else
2420 normalized_interval = ep_bw->ep_interval - 3;
2421
2422 if (normalized_interval == 0)
2423 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2424 interval_bw = &bw_table->interval_bw[normalized_interval];
2425 interval_bw->num_packets += ep_bw->num_packets;
2426 switch (udev->speed) {
2427 case USB_SPEED_LOW:
2428 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2429 break;
2430 case USB_SPEED_FULL:
2431 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2432 break;
2433 case USB_SPEED_HIGH:
2434 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2435 break;
2436 case USB_SPEED_SUPER:
Mathias Nyman0caf6b32016-01-25 15:30:44 +02002437 case USB_SPEED_SUPER_PLUS:
Sarah Sharp2e279802011-09-02 11:05:50 -07002438 case USB_SPEED_UNKNOWN:
2439 case USB_SPEED_WIRELESS:
2440 /* Should never happen because only LS/FS/HS endpoints will get
2441 * added to the endpoint list.
2442 */
2443 return;
2444 }
2445
2446 if (tt_info)
2447 tt_info->active_eps += 1;
2448 /* Insert the endpoint into the list, largest max packet size first. */
2449 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2450 bw_endpoint_list) {
2451 if (ep_bw->max_packet_size >=
2452 smaller_ep->bw_info.max_packet_size) {
2453 /* Add the new ep before the smaller endpoint */
2454 list_add_tail(&virt_ep->bw_endpoint_list,
2455 &smaller_ep->bw_endpoint_list);
2456 return;
2457 }
2458 }
2459 /* Add the new endpoint at the end of the list. */
2460 list_add_tail(&virt_ep->bw_endpoint_list,
2461 &interval_bw->endpoints);
2462}
2463
2464void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2465 struct xhci_virt_device *virt_dev,
2466 int old_active_eps)
2467{
2468 struct xhci_root_port_bw_info *rh_bw_info;
2469 if (!virt_dev->tt_info)
2470 return;
2471
2472 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2473 if (old_active_eps == 0 &&
2474 virt_dev->tt_info->active_eps != 0) {
2475 rh_bw_info->num_active_tts += 1;
Sarah Sharpc29eea62011-09-02 11:05:52 -07002476 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
Sarah Sharp2e279802011-09-02 11:05:50 -07002477 } else if (old_active_eps != 0 &&
2478 virt_dev->tt_info->active_eps == 0) {
2479 rh_bw_info->num_active_tts -= 1;
Sarah Sharpc29eea62011-09-02 11:05:52 -07002480 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
Sarah Sharp2e279802011-09-02 11:05:50 -07002481 }
2482}
2483
2484static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2485 struct xhci_virt_device *virt_dev,
2486 struct xhci_container_ctx *in_ctx)
2487{
2488 struct xhci_bw_info ep_bw_info[31];
2489 int i;
2490 struct xhci_input_control_ctx *ctrl_ctx;
2491 int old_active_eps = 0;
2492
Sarah Sharp2e279802011-09-02 11:05:50 -07002493 if (virt_dev->tt_info)
2494 old_active_eps = virt_dev->tt_info->active_eps;
2495
Lin Wang4daf9df2015-01-09 16:06:31 +02002496 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
Sarah Sharp92f8e762013-04-23 17:11:14 -07002497 if (!ctrl_ctx) {
2498 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2499 __func__);
2500 return -ENOMEM;
2501 }
Sarah Sharp2e279802011-09-02 11:05:50 -07002502
2503 for (i = 0; i < 31; i++) {
2504 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2505 continue;
2506
2507 /* Make a copy of the BW info in case we need to revert this */
2508 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2509 sizeof(ep_bw_info[i]));
2510 /* Drop the endpoint from the interval table if the endpoint is
2511 * being dropped or changed.
2512 */
2513 if (EP_IS_DROPPED(ctrl_ctx, i))
2514 xhci_drop_ep_from_interval_table(xhci,
2515 &virt_dev->eps[i].bw_info,
2516 virt_dev->bw_table,
2517 virt_dev->udev,
2518 &virt_dev->eps[i],
2519 virt_dev->tt_info);
2520 }
2521 /* Overwrite the information stored in the endpoints' bw_info */
2522 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2523 for (i = 0; i < 31; i++) {
2524 /* Add any changed or added endpoints to the interval table */
2525 if (EP_IS_ADDED(ctrl_ctx, i))
2526 xhci_add_ep_to_interval_table(xhci,
2527 &virt_dev->eps[i].bw_info,
2528 virt_dev->bw_table,
2529 virt_dev->udev,
2530 &virt_dev->eps[i],
2531 virt_dev->tt_info);
2532 }
2533
2534 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2535 /* Ok, this fits in the bandwidth we have.
2536 * Update the number of active TTs.
2537 */
2538 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2539 return 0;
2540 }
2541
2542 /* We don't have enough bandwidth for this, revert the stored info. */
2543 for (i = 0; i < 31; i++) {
2544 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2545 continue;
2546
2547 /* Drop the new copies of any added or changed endpoints from
2548 * the interval table.
2549 */
2550 if (EP_IS_ADDED(ctrl_ctx, i)) {
2551 xhci_drop_ep_from_interval_table(xhci,
2552 &virt_dev->eps[i].bw_info,
2553 virt_dev->bw_table,
2554 virt_dev->udev,
2555 &virt_dev->eps[i],
2556 virt_dev->tt_info);
2557 }
2558 /* Revert the endpoint back to its old information */
2559 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2560 sizeof(ep_bw_info[i]));
2561 /* Add any changed or dropped endpoints back into the table */
2562 if (EP_IS_DROPPED(ctrl_ctx, i))
2563 xhci_add_ep_to_interval_table(xhci,
2564 &virt_dev->eps[i].bw_info,
2565 virt_dev->bw_table,
2566 virt_dev->udev,
2567 &virt_dev->eps[i],
2568 virt_dev->tt_info);
2569 }
2570 return -ENOMEM;
2571}
2572
2573
Sarah Sharpf2217e82009-08-07 14:04:43 -07002574/* Issue a configure endpoint command or evaluate context command
2575 * and wait for it to finish.
2576 */
2577static int xhci_configure_endpoint(struct xhci_hcd *xhci,
Sarah Sharp913a8a32009-09-04 10:53:13 -07002578 struct usb_device *udev,
2579 struct xhci_command *command,
2580 bool ctx_change, bool must_succeed)
Sarah Sharpf2217e82009-08-07 14:04:43 -07002581{
2582 int ret;
Sarah Sharpf2217e82009-08-07 14:04:43 -07002583 unsigned long flags;
Sarah Sharp92f8e762013-04-23 17:11:14 -07002584 struct xhci_input_control_ctx *ctrl_ctx;
Sarah Sharp913a8a32009-09-04 10:53:13 -07002585 struct xhci_virt_device *virt_dev;
Mathias Nymanddba5cd2014-05-08 19:26:00 +03002586
2587 if (!command)
2588 return -EINVAL;
Sarah Sharpf2217e82009-08-07 14:04:43 -07002589
2590 spin_lock_irqsave(&xhci->lock, flags);
Sarah Sharp913a8a32009-09-04 10:53:13 -07002591 virt_dev = xhci->devs[udev->slot_id];
Sarah Sharp2cf95c12011-05-11 16:14:58 -07002592
Lin Wang4daf9df2015-01-09 16:06:31 +02002593 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
Sarah Sharp92f8e762013-04-23 17:11:14 -07002594 if (!ctrl_ctx) {
Emil Goode1f215692013-06-25 15:49:36 -07002595 spin_unlock_irqrestore(&xhci->lock, flags);
Sarah Sharp92f8e762013-04-23 17:11:14 -07002596 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2597 __func__);
2598 return -ENOMEM;
2599 }
Sarah Sharp750645f2011-09-02 11:05:43 -07002600
2601 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
Sarah Sharp92f8e762013-04-23 17:11:14 -07002602 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
Sarah Sharp750645f2011-09-02 11:05:43 -07002603 spin_unlock_irqrestore(&xhci->lock, flags);
2604 xhci_warn(xhci, "Not enough host resources, "
2605 "active endpoint contexts = %u\n",
2606 xhci->num_active_eps);
2607 return -ENOMEM;
2608 }
Sarah Sharp2e279802011-09-02 11:05:50 -07002609 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
Mathias Nymanddba5cd2014-05-08 19:26:00 +03002610 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) {
Sarah Sharp2e279802011-09-02 11:05:50 -07002611 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
Sarah Sharp92f8e762013-04-23 17:11:14 -07002612 xhci_free_host_resources(xhci, ctrl_ctx);
Sarah Sharp2e279802011-09-02 11:05:50 -07002613 spin_unlock_irqrestore(&xhci->lock, flags);
2614 xhci_warn(xhci, "Not enough bandwidth\n");
2615 return -ENOMEM;
2616 }
Sarah Sharp750645f2011-09-02 11:05:43 -07002617
Sarah Sharpf2217e82009-08-07 14:04:43 -07002618 if (!ctx_change)
Mathias Nymanddba5cd2014-05-08 19:26:00 +03002619 ret = xhci_queue_configure_endpoint(xhci, command,
2620 command->in_ctx->dma,
Sarah Sharp913a8a32009-09-04 10:53:13 -07002621 udev->slot_id, must_succeed);
Sarah Sharpf2217e82009-08-07 14:04:43 -07002622 else
Mathias Nymanddba5cd2014-05-08 19:26:00 +03002623 ret = xhci_queue_evaluate_context(xhci, command,
2624 command->in_ctx->dma,
Sarah Sharp4b266542012-05-07 15:34:26 -07002625 udev->slot_id, must_succeed);
Sarah Sharpf2217e82009-08-07 14:04:43 -07002626 if (ret < 0) {
Sarah Sharp2cf95c12011-05-11 16:14:58 -07002627 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
Sarah Sharp92f8e762013-04-23 17:11:14 -07002628 xhci_free_host_resources(xhci, ctrl_ctx);
Sarah Sharpf2217e82009-08-07 14:04:43 -07002629 spin_unlock_irqrestore(&xhci->lock, flags);
Xenia Ragiadakou3a7fa5b2013-07-31 07:35:27 +03002630 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
2631 "FIXME allocate a new ring segment");
Sarah Sharpf2217e82009-08-07 14:04:43 -07002632 return -ENOMEM;
2633 }
2634 xhci_ring_cmd_db(xhci);
2635 spin_unlock_irqrestore(&xhci->lock, flags);
2636
2637 /* Wait for the configure endpoint command to complete */
Mathias Nymanc311e392014-05-08 19:26:03 +03002638 wait_for_completion(command->completion);
Sarah Sharpf2217e82009-08-07 14:04:43 -07002639
2640 if (!ctx_change)
Mathias Nymanddba5cd2014-05-08 19:26:00 +03002641 ret = xhci_configure_endpoint_result(xhci, udev,
2642 &command->status);
Sarah Sharp2cf95c12011-05-11 16:14:58 -07002643 else
Mathias Nymanddba5cd2014-05-08 19:26:00 +03002644 ret = xhci_evaluate_context_result(xhci, udev,
2645 &command->status);
Sarah Sharp2cf95c12011-05-11 16:14:58 -07002646
2647 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2648 spin_lock_irqsave(&xhci->lock, flags);
2649 /* If the command failed, remove the reserved resources.
2650 * Otherwise, clean up the estimate to include dropped eps.
2651 */
2652 if (ret)
Sarah Sharp92f8e762013-04-23 17:11:14 -07002653 xhci_free_host_resources(xhci, ctrl_ctx);
Sarah Sharp2cf95c12011-05-11 16:14:58 -07002654 else
Sarah Sharp92f8e762013-04-23 17:11:14 -07002655 xhci_finish_resource_reservation(xhci, ctrl_ctx);
Sarah Sharp2cf95c12011-05-11 16:14:58 -07002656 spin_unlock_irqrestore(&xhci->lock, flags);
2657 }
2658 return ret;
Sarah Sharpf2217e82009-08-07 14:04:43 -07002659}
2660
Hans de Goededf613832013-10-04 00:29:45 +02002661static void xhci_check_bw_drop_ep_streams(struct xhci_hcd *xhci,
2662 struct xhci_virt_device *vdev, int i)
2663{
2664 struct xhci_virt_ep *ep = &vdev->eps[i];
2665
2666 if (ep->ep_state & EP_HAS_STREAMS) {
2667 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
2668 xhci_get_endpoint_address(i));
2669 xhci_free_stream_info(xhci, ep->stream_info);
2670 ep->stream_info = NULL;
2671 ep->ep_state &= ~EP_HAS_STREAMS;
2672 }
2673}
2674
Sarah Sharpf88ba782009-05-14 11:44:22 -07002675/* Called after one or more calls to xhci_add_endpoint() or
2676 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2677 * to call xhci_reset_bandwidth().
2678 *
2679 * Since we are in the middle of changing either configuration or
2680 * installing a new alt setting, the USB core won't allow URBs to be
2681 * enqueued for any endpoint on the old config or interface. Nothing
2682 * else should be touching the xhci->devs[slot_id] structure, so we
2683 * don't need to take the xhci->lock for manipulating that.
2684 */
Sarah Sharpf94e01862009-04-27 19:58:38 -07002685int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2686{
2687 int i;
2688 int ret = 0;
Sarah Sharpf94e01862009-04-27 19:58:38 -07002689 struct xhci_hcd *xhci;
2690 struct xhci_virt_device *virt_dev;
John Yound115b042009-07-27 12:05:15 -07002691 struct xhci_input_control_ctx *ctrl_ctx;
2692 struct xhci_slot_ctx *slot_ctx;
Mathias Nymanddba5cd2014-05-08 19:26:00 +03002693 struct xhci_command *command;
Sarah Sharpf94e01862009-04-27 19:58:38 -07002694
Andiry Xu64927732010-10-14 07:22:45 -07002695 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
Sarah Sharpf94e01862009-04-27 19:58:38 -07002696 if (ret <= 0)
2697 return ret;
2698 xhci = hcd_to_xhci(hcd);
Mathias Nyman98d74f92016-04-08 16:25:10 +03002699 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
2700 (xhci->xhc_state & XHCI_STATE_REMOVING))
Sarah Sharpfe6c6c12011-05-23 16:41:17 -07002701 return -ENODEV;
Sarah Sharpf94e01862009-04-27 19:58:38 -07002702
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -07002703 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
Sarah Sharpf94e01862009-04-27 19:58:38 -07002704 virt_dev = xhci->devs[udev->slot_id];
2705
Mathias Nymanddba5cd2014-05-08 19:26:00 +03002706 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
2707 if (!command)
2708 return -ENOMEM;
2709
2710 command->in_ctx = virt_dev->in_ctx;
2711
Sarah Sharpf94e01862009-04-27 19:58:38 -07002712 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
Lin Wang4daf9df2015-01-09 16:06:31 +02002713 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
Sarah Sharp92f8e762013-04-23 17:11:14 -07002714 if (!ctrl_ctx) {
2715 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2716 __func__);
Mathias Nymanddba5cd2014-05-08 19:26:00 +03002717 ret = -ENOMEM;
2718 goto command_cleanup;
Sarah Sharp92f8e762013-04-23 17:11:14 -07002719 }
Matt Evans28ccd292011-03-29 13:40:46 +11002720 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2721 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2722 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
Sarah Sharp2dc37532011-09-02 11:05:40 -07002723
2724 /* Don't issue the command if there's no endpoints to update. */
2725 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
Mathias Nymanddba5cd2014-05-08 19:26:00 +03002726 ctrl_ctx->drop_flags == 0) {
2727 ret = 0;
2728 goto command_cleanup;
2729 }
Julius Wernerd6759132014-06-24 17:14:42 +03002730 /* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */
John Yound115b042009-07-27 12:05:15 -07002731 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
Julius Wernerd6759132014-06-24 17:14:42 +03002732 for (i = 31; i >= 1; i--) {
2733 __le32 le32 = cpu_to_le32(BIT(i));
2734
2735 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32))
2736 || (ctrl_ctx->add_flags & le32) || i == 1) {
2737 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
2738 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i));
2739 break;
2740 }
2741 }
2742 xhci_dbg(xhci, "New Input Control Context:\n");
John Yound115b042009-07-27 12:05:15 -07002743 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
Matt Evans28ccd292011-03-29 13:40:46 +11002744 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
Sarah Sharpf94e01862009-04-27 19:58:38 -07002745
Mathias Nymanddba5cd2014-05-08 19:26:00 +03002746 ret = xhci_configure_endpoint(xhci, udev, command,
Sarah Sharp913a8a32009-09-04 10:53:13 -07002747 false, false);
Mathias Nymanddba5cd2014-05-08 19:26:00 +03002748 if (ret)
Sarah Sharpf94e01862009-04-27 19:58:38 -07002749 /* Callee should call reset_bandwidth() */
Mathias Nymanddba5cd2014-05-08 19:26:00 +03002750 goto command_cleanup;
Sarah Sharpf94e01862009-04-27 19:58:38 -07002751
2752 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
John Yound115b042009-07-27 12:05:15 -07002753 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
Matt Evans28ccd292011-03-29 13:40:46 +11002754 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
Sarah Sharpf94e01862009-04-27 19:58:38 -07002755
Sarah Sharp834cb0f2011-05-12 18:06:37 -07002756 /* Free any rings that were dropped, but not changed. */
Felipe Balbi98871e92017-01-23 14:20:04 +02002757 for (i = 1; i < 31; i++) {
Matt Evans4819fef2011-06-01 13:01:07 +10002758 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
Hans de Goededf613832013-10-04 00:29:45 +02002759 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
Sarah Sharp834cb0f2011-05-12 18:06:37 -07002760 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
Hans de Goededf613832013-10-04 00:29:45 +02002761 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2762 }
Sarah Sharp834cb0f2011-05-12 18:06:37 -07002763 }
John Yound115b042009-07-27 12:05:15 -07002764 xhci_zero_in_ctx(xhci, virt_dev);
Sarah Sharp834cb0f2011-05-12 18:06:37 -07002765 /*
2766 * Install any rings for completely new endpoints or changed endpoints,
2767 * and free or cache any old rings from changed endpoints.
2768 */
Felipe Balbi98871e92017-01-23 14:20:04 +02002769 for (i = 1; i < 31; i++) {
Sarah Sharp74f9fe22009-12-03 09:44:29 -08002770 if (!virt_dev->eps[i].new_ring)
2771 continue;
2772 /* Only cache or free the old ring if it exists.
2773 * It may not if this is the first add of an endpoint.
2774 */
2775 if (virt_dev->eps[i].ring) {
Sarah Sharp412566b2009-12-09 15:59:01 -08002776 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
Sarah Sharpf94e01862009-04-27 19:58:38 -07002777 }
Hans de Goededf613832013-10-04 00:29:45 +02002778 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
Sarah Sharp74f9fe22009-12-03 09:44:29 -08002779 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2780 virt_dev->eps[i].new_ring = NULL;
Sarah Sharpf94e01862009-04-27 19:58:38 -07002781 }
Mathias Nymanddba5cd2014-05-08 19:26:00 +03002782command_cleanup:
2783 kfree(command->completion);
2784 kfree(command);
Sarah Sharpf94e01862009-04-27 19:58:38 -07002785
Sarah Sharpf94e01862009-04-27 19:58:38 -07002786 return ret;
2787}
2788
2789void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2790{
Sarah Sharpf94e01862009-04-27 19:58:38 -07002791 struct xhci_hcd *xhci;
2792 struct xhci_virt_device *virt_dev;
2793 int i, ret;
2794
Andiry Xu64927732010-10-14 07:22:45 -07002795 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
Sarah Sharpf94e01862009-04-27 19:58:38 -07002796 if (ret <= 0)
2797 return;
2798 xhci = hcd_to_xhci(hcd);
2799
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -07002800 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
Sarah Sharpf94e01862009-04-27 19:58:38 -07002801 virt_dev = xhci->devs[udev->slot_id];
2802 /* Free any rings allocated for added endpoints */
Felipe Balbi98871e92017-01-23 14:20:04 +02002803 for (i = 0; i < 31; i++) {
Sarah Sharp63a0d9a2009-09-04 10:53:09 -07002804 if (virt_dev->eps[i].new_ring) {
2805 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2806 virt_dev->eps[i].new_ring = NULL;
Sarah Sharpf94e01862009-04-27 19:58:38 -07002807 }
2808 }
John Yound115b042009-07-27 12:05:15 -07002809 xhci_zero_in_ctx(xhci, virt_dev);
Sarah Sharpf94e01862009-04-27 19:58:38 -07002810}
2811
Sarah Sharp5270b952009-09-04 10:53:11 -07002812static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
Sarah Sharp913a8a32009-09-04 10:53:13 -07002813 struct xhci_container_ctx *in_ctx,
2814 struct xhci_container_ctx *out_ctx,
Sarah Sharp92f8e762013-04-23 17:11:14 -07002815 struct xhci_input_control_ctx *ctrl_ctx,
Sarah Sharp913a8a32009-09-04 10:53:13 -07002816 u32 add_flags, u32 drop_flags)
Sarah Sharp5270b952009-09-04 10:53:11 -07002817{
Matt Evans28ccd292011-03-29 13:40:46 +11002818 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2819 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
Sarah Sharp913a8a32009-09-04 10:53:13 -07002820 xhci_slot_copy(xhci, in_ctx, out_ctx);
Matt Evans28ccd292011-03-29 13:40:46 +11002821 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
Sarah Sharp5270b952009-09-04 10:53:11 -07002822
Sarah Sharp913a8a32009-09-04 10:53:13 -07002823 xhci_dbg(xhci, "Input Context:\n");
2824 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
Sarah Sharp5270b952009-09-04 10:53:11 -07002825}
2826
Dmitry Torokhov8212a492011-02-08 13:55:59 -08002827static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
Sarah Sharpac9d8fe2009-08-07 14:04:55 -07002828 unsigned int slot_id, unsigned int ep_index,
2829 struct xhci_dequeue_state *deq_state)
2830{
Sarah Sharp92f8e762013-04-23 17:11:14 -07002831 struct xhci_input_control_ctx *ctrl_ctx;
Sarah Sharpac9d8fe2009-08-07 14:04:55 -07002832 struct xhci_container_ctx *in_ctx;
Sarah Sharpac9d8fe2009-08-07 14:04:55 -07002833 struct xhci_ep_ctx *ep_ctx;
2834 u32 added_ctxs;
2835 dma_addr_t addr;
2836
Sarah Sharp92f8e762013-04-23 17:11:14 -07002837 in_ctx = xhci->devs[slot_id]->in_ctx;
Lin Wang4daf9df2015-01-09 16:06:31 +02002838 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
Sarah Sharp92f8e762013-04-23 17:11:14 -07002839 if (!ctrl_ctx) {
2840 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2841 __func__);
2842 return;
2843 }
2844
Sarah Sharp913a8a32009-09-04 10:53:13 -07002845 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2846 xhci->devs[slot_id]->out_ctx, ep_index);
Sarah Sharpac9d8fe2009-08-07 14:04:55 -07002847 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2848 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2849 deq_state->new_deq_ptr);
2850 if (addr == 0) {
2851 xhci_warn(xhci, "WARN Cannot submit config ep after "
2852 "reset ep command\n");
2853 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2854 deq_state->new_deq_seg,
2855 deq_state->new_deq_ptr);
2856 return;
2857 }
Matt Evans28ccd292011-03-29 13:40:46 +11002858 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
Sarah Sharpac9d8fe2009-08-07 14:04:55 -07002859
Sarah Sharpac9d8fe2009-08-07 14:04:55 -07002860 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
Sarah Sharp913a8a32009-09-04 10:53:13 -07002861 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
Sarah Sharp92f8e762013-04-23 17:11:14 -07002862 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2863 added_ctxs, added_ctxs);
Sarah Sharpac9d8fe2009-08-07 14:04:55 -07002864}
2865
Sarah Sharp82d10092009-08-07 14:04:52 -07002866void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
Mathias Nymand97b4f82014-11-27 18:19:16 +02002867 unsigned int ep_index, struct xhci_td *td)
Sarah Sharp82d10092009-08-07 14:04:52 -07002868{
2869 struct xhci_dequeue_state deq_state;
Sarah Sharp63a0d9a2009-09-04 10:53:09 -07002870 struct xhci_virt_ep *ep;
Mathias Nymand97b4f82014-11-27 18:19:16 +02002871 struct usb_device *udev = td->urb->dev;
Sarah Sharp82d10092009-08-07 14:04:52 -07002872
Xenia Ragiadakoua0254322013-08-06 07:52:46 +03002873 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2874 "Cleaning up stalled endpoint ring");
Sarah Sharp63a0d9a2009-09-04 10:53:09 -07002875 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
Sarah Sharp82d10092009-08-07 14:04:52 -07002876 /* We need to move the HW's dequeue pointer past this TD,
2877 * or it will attempt to resend it on the next doorbell ring.
2878 */
2879 xhci_find_new_dequeue_state(xhci, udev->slot_id,
Mathias Nymand97b4f82014-11-27 18:19:16 +02002880 ep_index, ep->stopped_stream, td, &deq_state);
Sarah Sharp82d10092009-08-07 14:04:52 -07002881
Mathias Nyman365038d2014-08-19 15:17:58 +03002882 if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg)
2883 return;
2884
Sarah Sharpac9d8fe2009-08-07 14:04:55 -07002885 /* HW with the reset endpoint quirk will use the saved dequeue state to
2886 * issue a configure endpoint command later.
2887 */
2888 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
Xenia Ragiadakoua0254322013-08-06 07:52:46 +03002889 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2890 "Queueing new dequeue state");
Hans de Goede1e3452e2014-08-20 16:41:52 +03002891 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
Sarah Sharpe9df17e2010-04-02 15:34:43 -07002892 ep_index, ep->stopped_stream, &deq_state);
Sarah Sharpac9d8fe2009-08-07 14:04:55 -07002893 } else {
2894 /* Better hope no one uses the input context between now and the
2895 * reset endpoint completion!
Sarah Sharpe9df17e2010-04-02 15:34:43 -07002896 * XXX: No idea how this hardware will react when stream rings
2897 * are enabled.
Sarah Sharpac9d8fe2009-08-07 14:04:55 -07002898 */
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +03002899 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2900 "Setting up input context for "
2901 "configure endpoint command");
Sarah Sharpac9d8fe2009-08-07 14:04:55 -07002902 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2903 ep_index, &deq_state);
2904 }
Sarah Sharp82d10092009-08-07 14:04:52 -07002905}
2906
Mathias Nymand0167ad2015-03-10 19:49:00 +02002907/* Called when clearing halted device. The core should have sent the control
Mathias Nyman8e71a322014-11-18 11:27:12 +02002908 * message to clear the device halt condition. The host side of the halt should
Mathias Nymand0167ad2015-03-10 19:49:00 +02002909 * already be cleared with a reset endpoint command issued when the STALL tx
2910 * event was received.
2911 *
2912 * Context: in_interrupt
Sarah Sharpa1587d92009-07-27 12:03:15 -07002913 */
Mathias Nyman8e71a322014-11-18 11:27:12 +02002914
Sarah Sharpa1587d92009-07-27 12:03:15 -07002915void xhci_endpoint_reset(struct usb_hcd *hcd,
2916 struct usb_host_endpoint *ep)
2917{
2918 struct xhci_hcd *xhci;
Sarah Sharpa1587d92009-07-27 12:03:15 -07002919
2920 xhci = hcd_to_xhci(hcd);
Sarah Sharpa1587d92009-07-27 12:03:15 -07002921
Sarah Sharpc92bcfa2009-07-27 12:05:21 -07002922 /*
Mathias Nymand0167ad2015-03-10 19:49:00 +02002923 * We might need to implement the config ep cmd in xhci 4.8.1 note:
Mathias Nyman8e71a322014-11-18 11:27:12 +02002924 * The Reset Endpoint Command may only be issued to endpoints in the
2925 * Halted state. If software wishes reset the Data Toggle or Sequence
2926 * Number of an endpoint that isn't in the Halted state, then software
2927 * may issue a Configure Endpoint Command with the Drop and Add bits set
2928 * for the target endpoint. that is in the Stopped state.
Sarah Sharpc92bcfa2009-07-27 12:05:21 -07002929 */
Sarah Sharpa1587d92009-07-27 12:03:15 -07002930
Mathias Nymand0167ad2015-03-10 19:49:00 +02002931 /* For now just print debug to follow the situation */
2932 xhci_dbg(xhci, "Endpoint 0x%x ep reset callback called\n",
2933 ep->desc.bEndpointAddress);
Sarah Sharpa1587d92009-07-27 12:03:15 -07002934}
2935
Sarah Sharp8df75f42010-04-02 15:34:16 -07002936static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2937 struct usb_device *udev, struct usb_host_endpoint *ep,
2938 unsigned int slot_id)
2939{
2940 int ret;
2941 unsigned int ep_index;
2942 unsigned int ep_state;
2943
2944 if (!ep)
2945 return -EINVAL;
Andiry Xu64927732010-10-14 07:22:45 -07002946 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
Sarah Sharp8df75f42010-04-02 15:34:16 -07002947 if (ret <= 0)
2948 return -EINVAL;
Hans de Goedea3901532013-10-04 17:05:55 +02002949 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) {
Sarah Sharp8df75f42010-04-02 15:34:16 -07002950 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2951 " descriptor for ep 0x%x does not support streams\n",
2952 ep->desc.bEndpointAddress);
2953 return -EINVAL;
2954 }
2955
2956 ep_index = xhci_get_endpoint_index(&ep->desc);
2957 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2958 if (ep_state & EP_HAS_STREAMS ||
2959 ep_state & EP_GETTING_STREAMS) {
2960 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2961 "already has streams set up.\n",
2962 ep->desc.bEndpointAddress);
2963 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2964 "dynamic stream context array reallocation.\n");
2965 return -EINVAL;
2966 }
2967 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2968 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2969 "endpoint 0x%x; URBs are pending.\n",
2970 ep->desc.bEndpointAddress);
2971 return -EINVAL;
2972 }
2973 return 0;
2974}
2975
2976static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2977 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2978{
2979 unsigned int max_streams;
2980
2981 /* The stream context array size must be a power of two */
2982 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2983 /*
2984 * Find out how many primary stream array entries the host controller
2985 * supports. Later we may use secondary stream arrays (similar to 2nd
2986 * level page entries), but that's an optional feature for xHCI host
2987 * controllers. xHCs must support at least 4 stream IDs.
2988 */
2989 max_streams = HCC_MAX_PSA(xhci->hcc_params);
2990 if (*num_stream_ctxs > max_streams) {
2991 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2992 max_streams);
2993 *num_stream_ctxs = max_streams;
2994 *num_streams = max_streams;
2995 }
2996}
2997
2998/* Returns an error code if one of the endpoint already has streams.
2999 * This does not change any data structures, it only checks and gathers
3000 * information.
3001 */
3002static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
3003 struct usb_device *udev,
3004 struct usb_host_endpoint **eps, unsigned int num_eps,
3005 unsigned int *num_streams, u32 *changed_ep_bitmask)
3006{
Sarah Sharp8df75f42010-04-02 15:34:16 -07003007 unsigned int max_streams;
3008 unsigned int endpoint_flag;
3009 int i;
3010 int ret;
3011
3012 for (i = 0; i < num_eps; i++) {
3013 ret = xhci_check_streams_endpoint(xhci, udev,
3014 eps[i], udev->slot_id);
3015 if (ret < 0)
3016 return ret;
3017
Felipe Balbi18b7ede2012-01-02 13:35:41 +02003018 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
Sarah Sharp8df75f42010-04-02 15:34:16 -07003019 if (max_streams < (*num_streams - 1)) {
3020 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3021 eps[i]->desc.bEndpointAddress,
3022 max_streams);
3023 *num_streams = max_streams+1;
3024 }
3025
3026 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3027 if (*changed_ep_bitmask & endpoint_flag)
3028 return -EINVAL;
3029 *changed_ep_bitmask |= endpoint_flag;
3030 }
3031 return 0;
3032}
3033
3034static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3035 struct usb_device *udev,
3036 struct usb_host_endpoint **eps, unsigned int num_eps)
3037{
3038 u32 changed_ep_bitmask = 0;
3039 unsigned int slot_id;
3040 unsigned int ep_index;
3041 unsigned int ep_state;
3042 int i;
3043
3044 slot_id = udev->slot_id;
3045 if (!xhci->devs[slot_id])
3046 return 0;
3047
3048 for (i = 0; i < num_eps; i++) {
3049 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3050 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3051 /* Are streams already being freed for the endpoint? */
3052 if (ep_state & EP_GETTING_NO_STREAMS) {
3053 xhci_warn(xhci, "WARN Can't disable streams for "
Joe Perches03e64e92013-07-16 19:25:59 -07003054 "endpoint 0x%x, "
3055 "streams are being disabled already\n",
Sarah Sharp8df75f42010-04-02 15:34:16 -07003056 eps[i]->desc.bEndpointAddress);
3057 return 0;
3058 }
3059 /* Are there actually any streams to free? */
3060 if (!(ep_state & EP_HAS_STREAMS) &&
3061 !(ep_state & EP_GETTING_STREAMS)) {
3062 xhci_warn(xhci, "WARN Can't disable streams for "
Joe Perches03e64e92013-07-16 19:25:59 -07003063 "endpoint 0x%x, "
3064 "streams are already disabled!\n",
Sarah Sharp8df75f42010-04-02 15:34:16 -07003065 eps[i]->desc.bEndpointAddress);
3066 xhci_warn(xhci, "WARN xhci_free_streams() called "
3067 "with non-streams endpoint\n");
3068 return 0;
3069 }
3070 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3071 }
3072 return changed_ep_bitmask;
3073}
3074
3075/*
Luis de Bethencourtc2a298d2015-06-30 16:48:54 +02003076 * The USB device drivers use this function (through the HCD interface in USB
Sarah Sharp8df75f42010-04-02 15:34:16 -07003077 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3078 * coordinate mass storage command queueing across multiple endpoints (basically
3079 * a stream ID == a task ID).
3080 *
3081 * Setting up streams involves allocating the same size stream context array
3082 * for each endpoint and issuing a configure endpoint command for all endpoints.
3083 *
3084 * Don't allow the call to succeed if one endpoint only supports one stream
3085 * (which means it doesn't support streams at all).
3086 *
3087 * Drivers may get less stream IDs than they asked for, if the host controller
3088 * hardware or endpoints claim they can't support the number of requested
3089 * stream IDs.
3090 */
3091int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3092 struct usb_host_endpoint **eps, unsigned int num_eps,
3093 unsigned int num_streams, gfp_t mem_flags)
3094{
3095 int i, ret;
3096 struct xhci_hcd *xhci;
3097 struct xhci_virt_device *vdev;
3098 struct xhci_command *config_cmd;
Sarah Sharp92f8e762013-04-23 17:11:14 -07003099 struct xhci_input_control_ctx *ctrl_ctx;
Sarah Sharp8df75f42010-04-02 15:34:16 -07003100 unsigned int ep_index;
3101 unsigned int num_stream_ctxs;
Mathias Nymanf9c589e2016-06-21 10:58:02 +03003102 unsigned int max_packet;
Sarah Sharp8df75f42010-04-02 15:34:16 -07003103 unsigned long flags;
3104 u32 changed_ep_bitmask = 0;
3105
3106 if (!eps)
3107 return -EINVAL;
3108
3109 /* Add one to the number of streams requested to account for
3110 * stream 0 that is reserved for xHCI usage.
3111 */
3112 num_streams += 1;
3113 xhci = hcd_to_xhci(hcd);
3114 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3115 num_streams);
3116
Hans de Goedef7920882013-11-15 12:14:38 +01003117 /* MaxPSASize value 0 (2 streams) means streams are not supported */
Hans de Goede8f873c12014-07-25 22:01:18 +02003118 if ((xhci->quirks & XHCI_BROKEN_STREAMS) ||
3119 HCC_MAX_PSA(xhci->hcc_params) < 4) {
Hans de Goedef7920882013-11-15 12:14:38 +01003120 xhci_dbg(xhci, "xHCI controller does not support streams.\n");
3121 return -ENOSYS;
3122 }
3123
Sarah Sharp8df75f42010-04-02 15:34:16 -07003124 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3125 if (!config_cmd) {
3126 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3127 return -ENOMEM;
3128 }
Lin Wang4daf9df2015-01-09 16:06:31 +02003129 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
Sarah Sharp92f8e762013-04-23 17:11:14 -07003130 if (!ctrl_ctx) {
3131 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3132 __func__);
3133 xhci_free_command(xhci, config_cmd);
3134 return -ENOMEM;
3135 }
Sarah Sharp8df75f42010-04-02 15:34:16 -07003136
3137 /* Check to make sure all endpoints are not already configured for
3138 * streams. While we're at it, find the maximum number of streams that
3139 * all the endpoints will support and check for duplicate endpoints.
3140 */
3141 spin_lock_irqsave(&xhci->lock, flags);
3142 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3143 num_eps, &num_streams, &changed_ep_bitmask);
3144 if (ret < 0) {
3145 xhci_free_command(xhci, config_cmd);
3146 spin_unlock_irqrestore(&xhci->lock, flags);
3147 return ret;
3148 }
3149 if (num_streams <= 1) {
3150 xhci_warn(xhci, "WARN: endpoints can't handle "
3151 "more than one stream.\n");
3152 xhci_free_command(xhci, config_cmd);
3153 spin_unlock_irqrestore(&xhci->lock, flags);
3154 return -EINVAL;
3155 }
3156 vdev = xhci->devs[udev->slot_id];
Lucas De Marchi25985ed2011-03-30 22:57:33 -03003157 /* Mark each endpoint as being in transition, so
Sarah Sharp8df75f42010-04-02 15:34:16 -07003158 * xhci_urb_enqueue() will reject all URBs.
3159 */
3160 for (i = 0; i < num_eps; i++) {
3161 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3162 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3163 }
3164 spin_unlock_irqrestore(&xhci->lock, flags);
3165
3166 /* Setup internal data structures and allocate HW data structures for
3167 * streams (but don't install the HW structures in the input context
3168 * until we're sure all memory allocation succeeded).
3169 */
3170 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3171 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3172 num_stream_ctxs, num_streams);
3173
3174 for (i = 0; i < num_eps; i++) {
3175 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
Felipe Balbi734d3dd2016-09-28 13:46:37 +03003176 max_packet = usb_endpoint_maxp(&eps[i]->desc);
Sarah Sharp8df75f42010-04-02 15:34:16 -07003177 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3178 num_stream_ctxs,
Mathias Nymanf9c589e2016-06-21 10:58:02 +03003179 num_streams,
3180 max_packet, mem_flags);
Sarah Sharp8df75f42010-04-02 15:34:16 -07003181 if (!vdev->eps[ep_index].stream_info)
3182 goto cleanup;
3183 /* Set maxPstreams in endpoint context and update deq ptr to
3184 * point to stream context array. FIXME
3185 */
3186 }
3187
3188 /* Set up the input context for a configure endpoint command. */
3189 for (i = 0; i < num_eps; i++) {
3190 struct xhci_ep_ctx *ep_ctx;
3191
3192 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3193 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3194
3195 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3196 vdev->out_ctx, ep_index);
3197 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3198 vdev->eps[ep_index].stream_info);
3199 }
3200 /* Tell the HW to drop its old copy of the endpoint context info
3201 * and add the updated copy from the input context.
3202 */
3203 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
Sarah Sharp92f8e762013-04-23 17:11:14 -07003204 vdev->out_ctx, ctrl_ctx,
3205 changed_ep_bitmask, changed_ep_bitmask);
Sarah Sharp8df75f42010-04-02 15:34:16 -07003206
3207 /* Issue and wait for the configure endpoint command */
3208 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3209 false, false);
3210
3211 /* xHC rejected the configure endpoint command for some reason, so we
3212 * leave the old ring intact and free our internal streams data
3213 * structure.
3214 */
3215 if (ret < 0)
3216 goto cleanup;
3217
3218 spin_lock_irqsave(&xhci->lock, flags);
3219 for (i = 0; i < num_eps; i++) {
3220 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3221 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3222 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3223 udev->slot_id, ep_index);
3224 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3225 }
3226 xhci_free_command(xhci, config_cmd);
3227 spin_unlock_irqrestore(&xhci->lock, flags);
3228
3229 /* Subtract 1 for stream 0, which drivers can't use */
3230 return num_streams - 1;
3231
3232cleanup:
3233 /* If it didn't work, free the streams! */
3234 for (i = 0; i < num_eps; i++) {
3235 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3236 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
Sarah Sharp8a007742010-04-30 15:37:56 -07003237 vdev->eps[ep_index].stream_info = NULL;
Sarah Sharp8df75f42010-04-02 15:34:16 -07003238 /* FIXME Unset maxPstreams in endpoint context and
3239 * update deq ptr to point to normal string ring.
3240 */
3241 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3242 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3243 xhci_endpoint_zero(xhci, vdev, eps[i]);
3244 }
3245 xhci_free_command(xhci, config_cmd);
3246 return -ENOMEM;
3247}
3248
3249/* Transition the endpoint from using streams to being a "normal" endpoint
3250 * without streams.
3251 *
3252 * Modify the endpoint context state, submit a configure endpoint command,
3253 * and free all endpoint rings for streams if that completes successfully.
3254 */
3255int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3256 struct usb_host_endpoint **eps, unsigned int num_eps,
3257 gfp_t mem_flags)
3258{
3259 int i, ret;
3260 struct xhci_hcd *xhci;
3261 struct xhci_virt_device *vdev;
3262 struct xhci_command *command;
Sarah Sharp92f8e762013-04-23 17:11:14 -07003263 struct xhci_input_control_ctx *ctrl_ctx;
Sarah Sharp8df75f42010-04-02 15:34:16 -07003264 unsigned int ep_index;
3265 unsigned long flags;
3266 u32 changed_ep_bitmask;
3267
3268 xhci = hcd_to_xhci(hcd);
3269 vdev = xhci->devs[udev->slot_id];
3270
3271 /* Set up a configure endpoint command to remove the streams rings */
3272 spin_lock_irqsave(&xhci->lock, flags);
3273 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3274 udev, eps, num_eps);
3275 if (changed_ep_bitmask == 0) {
3276 spin_unlock_irqrestore(&xhci->lock, flags);
3277 return -EINVAL;
3278 }
3279
3280 /* Use the xhci_command structure from the first endpoint. We may have
3281 * allocated too many, but the driver may call xhci_free_streams() for
3282 * each endpoint it grouped into one call to xhci_alloc_streams().
3283 */
3284 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3285 command = vdev->eps[ep_index].stream_info->free_streams_command;
Lin Wang4daf9df2015-01-09 16:06:31 +02003286 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
Sarah Sharp92f8e762013-04-23 17:11:14 -07003287 if (!ctrl_ctx) {
Emil Goode1f215692013-06-25 15:49:36 -07003288 spin_unlock_irqrestore(&xhci->lock, flags);
Sarah Sharp92f8e762013-04-23 17:11:14 -07003289 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3290 __func__);
3291 return -EINVAL;
3292 }
3293
Sarah Sharp8df75f42010-04-02 15:34:16 -07003294 for (i = 0; i < num_eps; i++) {
3295 struct xhci_ep_ctx *ep_ctx;
3296
3297 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3298 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3299 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3300 EP_GETTING_NO_STREAMS;
3301
3302 xhci_endpoint_copy(xhci, command->in_ctx,
3303 vdev->out_ctx, ep_index);
Lin Wang4daf9df2015-01-09 16:06:31 +02003304 xhci_setup_no_streams_ep_input_ctx(ep_ctx,
Sarah Sharp8df75f42010-04-02 15:34:16 -07003305 &vdev->eps[ep_index]);
3306 }
3307 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
Sarah Sharp92f8e762013-04-23 17:11:14 -07003308 vdev->out_ctx, ctrl_ctx,
3309 changed_ep_bitmask, changed_ep_bitmask);
Sarah Sharp8df75f42010-04-02 15:34:16 -07003310 spin_unlock_irqrestore(&xhci->lock, flags);
3311
3312 /* Issue and wait for the configure endpoint command,
3313 * which must succeed.
3314 */
3315 ret = xhci_configure_endpoint(xhci, udev, command,
3316 false, true);
3317
3318 /* xHC rejected the configure endpoint command for some reason, so we
3319 * leave the streams rings intact.
3320 */
3321 if (ret < 0)
3322 return ret;
3323
3324 spin_lock_irqsave(&xhci->lock, flags);
3325 for (i = 0; i < num_eps; i++) {
3326 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3327 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
Sarah Sharp8a007742010-04-30 15:37:56 -07003328 vdev->eps[ep_index].stream_info = NULL;
Sarah Sharp8df75f42010-04-02 15:34:16 -07003329 /* FIXME Unset maxPstreams in endpoint context and
3330 * update deq ptr to point to normal string ring.
3331 */
3332 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3333 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3334 }
3335 spin_unlock_irqrestore(&xhci->lock, flags);
3336
3337 return 0;
3338}
3339
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003340/*
Sarah Sharp2cf95c12011-05-11 16:14:58 -07003341 * Deletes endpoint resources for endpoints that were active before a Reset
3342 * Device command, or a Disable Slot command. The Reset Device command leaves
3343 * the control endpoint intact, whereas the Disable Slot command deletes it.
3344 *
3345 * Must be called with xhci->lock held.
3346 */
3347void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3348 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3349{
3350 int i;
3351 unsigned int num_dropped_eps = 0;
3352 unsigned int drop_flags = 0;
3353
3354 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3355 if (virt_dev->eps[i].ring) {
3356 drop_flags |= 1 << i;
3357 num_dropped_eps++;
3358 }
3359 }
3360 xhci->num_active_eps -= num_dropped_eps;
3361 if (num_dropped_eps)
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +03003362 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3363 "Dropped %u ep ctxs, flags = 0x%x, "
3364 "%u now active.",
Sarah Sharp2cf95c12011-05-11 16:14:58 -07003365 num_dropped_eps, drop_flags,
3366 xhci->num_active_eps);
3367}
3368
3369/*
Sarah Sharp2a8f82c2009-12-09 15:59:13 -08003370 * This submits a Reset Device Command, which will set the device state to 0,
3371 * set the device address to 0, and disable all the endpoints except the default
3372 * control endpoint. The USB core should come back and call
3373 * xhci_address_device(), and then re-set up the configuration. If this is
3374 * called because of a usb_reset_and_verify_device(), then the old alternate
3375 * settings will be re-installed through the normal bandwidth allocation
3376 * functions.
3377 *
3378 * Wait for the Reset Device command to finish. Remove all structures
3379 * associated with the endpoints that were disabled. Clear the input device
3380 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
Andiry Xuf0615c42010-10-14 07:22:48 -07003381 *
3382 * If the virt_dev to be reset does not exist or does not match the udev,
3383 * it means the device is lost, possibly due to the xHC restore error and
3384 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3385 * re-allocate the device.
Sarah Sharp2a8f82c2009-12-09 15:59:13 -08003386 */
Andiry Xuf0615c42010-10-14 07:22:48 -07003387int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
Sarah Sharp2a8f82c2009-12-09 15:59:13 -08003388{
3389 int ret, i;
3390 unsigned long flags;
3391 struct xhci_hcd *xhci;
3392 unsigned int slot_id;
3393 struct xhci_virt_device *virt_dev;
3394 struct xhci_command *reset_device_cmd;
Sarah Sharp2a8f82c2009-12-09 15:59:13 -08003395 int last_freed_endpoint;
Maarten Lankhorst001fd382011-06-01 23:27:50 +02003396 struct xhci_slot_ctx *slot_ctx;
Sarah Sharp2e279802011-09-02 11:05:50 -07003397 int old_active_eps = 0;
Sarah Sharp2a8f82c2009-12-09 15:59:13 -08003398
Andiry Xuf0615c42010-10-14 07:22:48 -07003399 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
Sarah Sharp2a8f82c2009-12-09 15:59:13 -08003400 if (ret <= 0)
3401 return ret;
3402 xhci = hcd_to_xhci(hcd);
3403 slot_id = udev->slot_id;
3404 virt_dev = xhci->devs[slot_id];
Andiry Xuf0615c42010-10-14 07:22:48 -07003405 if (!virt_dev) {
3406 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3407 "not exist. Re-allocate the device\n", slot_id);
3408 ret = xhci_alloc_dev(hcd, udev);
3409 if (ret == 1)
3410 return 0;
3411 else
3412 return -EINVAL;
3413 }
3414
Brian Campbell326124a2015-07-21 17:20:28 +03003415 if (virt_dev->tt_info)
3416 old_active_eps = virt_dev->tt_info->active_eps;
3417
Andiry Xuf0615c42010-10-14 07:22:48 -07003418 if (virt_dev->udev != udev) {
3419 /* If the virt_dev and the udev does not match, this virt_dev
3420 * may belong to another udev.
3421 * Re-allocate the device.
3422 */
3423 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3424 "not match the udev. Re-allocate the device\n",
3425 slot_id);
3426 ret = xhci_alloc_dev(hcd, udev);
3427 if (ret == 1)
3428 return 0;
3429 else
3430 return -EINVAL;
3431 }
Sarah Sharp2a8f82c2009-12-09 15:59:13 -08003432
Maarten Lankhorst001fd382011-06-01 23:27:50 +02003433 /* If device is not setup, there is no point in resetting it */
3434 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3435 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3436 SLOT_STATE_DISABLED)
3437 return 0;
3438
Sarah Sharp2a8f82c2009-12-09 15:59:13 -08003439 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3440 /* Allocate the command structure that holds the struct completion.
3441 * Assume we're in process context, since the normal device reset
3442 * process has to wait for the device anyway. Storage devices are
3443 * reset as part of error handling, so use GFP_NOIO instead of
3444 * GFP_KERNEL.
3445 */
3446 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3447 if (!reset_device_cmd) {
3448 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3449 return -ENOMEM;
3450 }
3451
3452 /* Attempt to submit the Reset Device command to the command ring */
3453 spin_lock_irqsave(&xhci->lock, flags);
Paul Zimmerman7a3783e2010-11-17 16:26:50 -08003454
Mathias Nymanddba5cd2014-05-08 19:26:00 +03003455 ret = xhci_queue_reset_device(xhci, reset_device_cmd, slot_id);
Sarah Sharp2a8f82c2009-12-09 15:59:13 -08003456 if (ret) {
3457 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
Sarah Sharp2a8f82c2009-12-09 15:59:13 -08003458 spin_unlock_irqrestore(&xhci->lock, flags);
3459 goto command_cleanup;
3460 }
3461 xhci_ring_cmd_db(xhci);
3462 spin_unlock_irqrestore(&xhci->lock, flags);
3463
3464 /* Wait for the Reset Device command to finish */
Mathias Nymanc311e392014-05-08 19:26:03 +03003465 wait_for_completion(reset_device_cmd->completion);
Sarah Sharp2a8f82c2009-12-09 15:59:13 -08003466
3467 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3468 * unless we tried to reset a slot ID that wasn't enabled,
3469 * or the device wasn't in the addressed or configured state.
3470 */
3471 ret = reset_device_cmd->status;
3472 switch (ret) {
Felipe Balbi0b7c1052017-01-23 14:20:06 +02003473 case COMP_COMMAND_ABORTED:
3474 case COMP_STOPPED:
Mathias Nymanc311e392014-05-08 19:26:03 +03003475 xhci_warn(xhci, "Timeout waiting for reset device command\n");
3476 ret = -ETIME;
3477 goto command_cleanup;
Felipe Balbi0b7c1052017-01-23 14:20:06 +02003478 case COMP_SLOT_NOT_ENABLED_ERROR: /* 0.95 completion for bad slot ID */
3479 case COMP_CONTEXT_STATE_ERROR: /* 0.96 completion code for same thing */
Xenia Ragiadakou38a532a2013-07-02 17:49:25 +03003480 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
Sarah Sharp2a8f82c2009-12-09 15:59:13 -08003481 slot_id,
3482 xhci_get_slot_state(xhci, virt_dev->out_ctx));
Xenia Ragiadakou38a532a2013-07-02 17:49:25 +03003483 xhci_dbg(xhci, "Not freeing device rings.\n");
Sarah Sharp2a8f82c2009-12-09 15:59:13 -08003484 /* Don't treat this as an error. May change my mind later. */
3485 ret = 0;
3486 goto command_cleanup;
3487 case COMP_SUCCESS:
3488 xhci_dbg(xhci, "Successful reset device command.\n");
3489 break;
3490 default:
3491 if (xhci_is_vendor_info_code(xhci, ret))
3492 break;
3493 xhci_warn(xhci, "Unknown completion code %u for "
3494 "reset device command.\n", ret);
3495 ret = -EINVAL;
3496 goto command_cleanup;
3497 }
3498
Sarah Sharp2cf95c12011-05-11 16:14:58 -07003499 /* Free up host controller endpoint resources */
3500 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3501 spin_lock_irqsave(&xhci->lock, flags);
3502 /* Don't delete the default control endpoint resources */
3503 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3504 spin_unlock_irqrestore(&xhci->lock, flags);
3505 }
3506
Sarah Sharp2a8f82c2009-12-09 15:59:13 -08003507 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3508 last_freed_endpoint = 1;
Felipe Balbi98871e92017-01-23 14:20:04 +02003509 for (i = 1; i < 31; i++) {
Dmitry Torokhov2dea75d2011-04-12 23:06:28 -07003510 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3511
3512 if (ep->ep_state & EP_HAS_STREAMS) {
Hans de Goededf613832013-10-04 00:29:45 +02003513 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
3514 xhci_get_endpoint_address(i));
Dmitry Torokhov2dea75d2011-04-12 23:06:28 -07003515 xhci_free_stream_info(xhci, ep->stream_info);
3516 ep->stream_info = NULL;
3517 ep->ep_state &= ~EP_HAS_STREAMS;
3518 }
3519
3520 if (ep->ring) {
3521 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3522 last_freed_endpoint = i;
3523 }
Sarah Sharp2e279802011-09-02 11:05:50 -07003524 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3525 xhci_drop_ep_from_interval_table(xhci,
3526 &virt_dev->eps[i].bw_info,
3527 virt_dev->bw_table,
3528 udev,
3529 &virt_dev->eps[i],
3530 virt_dev->tt_info);
Sarah Sharp9af5d712011-09-02 11:05:48 -07003531 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
Sarah Sharp2a8f82c2009-12-09 15:59:13 -08003532 }
Sarah Sharp2e279802011-09-02 11:05:50 -07003533 /* If necessary, update the number of active TTs on this root port */
3534 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3535
Sarah Sharp2a8f82c2009-12-09 15:59:13 -08003536 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3537 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3538 ret = 0;
3539
3540command_cleanup:
3541 xhci_free_command(xhci, reset_device_cmd);
3542 return ret;
3543}
3544
3545/*
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003546 * At this point, the struct usb_device is about to go away, the device has
3547 * disconnected, and all traffic has been stopped and the endpoints have been
3548 * disabled. Free any HC data structures associated with that device.
3549 */
3550void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3551{
3552 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
Sarah Sharp6f5165c2009-10-27 10:57:01 -07003553 struct xhci_virt_device *virt_dev;
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003554 unsigned long flags;
Sarah Sharpc526d0d2009-09-16 16:42:39 -07003555 u32 state;
Andiry Xu64927732010-10-14 07:22:45 -07003556 int i, ret;
Mathias Nymanddba5cd2014-05-08 19:26:00 +03003557 struct xhci_command *command;
3558
3559 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3560 if (!command)
3561 return;
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003562
Shawn Nematbakhshc8476fb2013-08-19 10:36:13 -07003563#ifndef CONFIG_USB_DEFAULT_PERSIST
3564 /*
3565 * We called pm_runtime_get_noresume when the device was attached.
3566 * Decrement the counter here to allow controller to runtime suspend
3567 * if no devices remain.
3568 */
3569 if (xhci->quirks & XHCI_RESET_ON_RESUME)
Sarah Sharpe7ecf062013-08-28 09:31:04 -07003570 pm_runtime_put_noidle(hcd->self.controller);
Shawn Nematbakhshc8476fb2013-08-19 10:36:13 -07003571#endif
3572
Andiry Xu64927732010-10-14 07:22:45 -07003573 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
Sarah Sharp7bd89b42011-07-01 13:35:40 -07003574 /* If the host is halted due to driver unload, we still need to free the
3575 * device.
3576 */
Mathias Nymanddba5cd2014-05-08 19:26:00 +03003577 if (ret <= 0 && ret != -ENODEV) {
3578 kfree(command);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003579 return;
Mathias Nymanddba5cd2014-05-08 19:26:00 +03003580 }
Andiry Xu64927732010-10-14 07:22:45 -07003581
Sarah Sharp6f5165c2009-10-27 10:57:01 -07003582 virt_dev = xhci->devs[udev->slot_id];
Sarah Sharp6f5165c2009-10-27 10:57:01 -07003583
3584 /* Stop any wayward timer functions (which may grab the lock) */
Felipe Balbi98871e92017-01-23 14:20:04 +02003585 for (i = 0; i < 31; i++) {
Mathias Nyman9983a5f2017-01-23 14:19:52 +02003586 virt_dev->eps[i].ep_state &= ~EP_STOP_CMD_PENDING;
Sarah Sharp6f5165c2009-10-27 10:57:01 -07003587 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3588 }
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003589
3590 spin_lock_irqsave(&xhci->lock, flags);
Sarah Sharpc526d0d2009-09-16 16:42:39 -07003591 /* Don't disable the slot if the host controller is dead. */
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02003592 state = readl(&xhci->op_regs->status);
Sarah Sharp7bd89b42011-07-01 13:35:40 -07003593 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3594 (xhci->xhc_state & XHCI_STATE_HALTED)) {
Sarah Sharpc526d0d2009-09-16 16:42:39 -07003595 xhci_free_virt_device(xhci, udev->slot_id);
3596 spin_unlock_irqrestore(&xhci->lock, flags);
Mathias Nymanddba5cd2014-05-08 19:26:00 +03003597 kfree(command);
Sarah Sharpc526d0d2009-09-16 16:42:39 -07003598 return;
3599 }
3600
Mathias Nymanddba5cd2014-05-08 19:26:00 +03003601 if (xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3602 udev->slot_id)) {
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003603 spin_unlock_irqrestore(&xhci->lock, flags);
3604 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3605 return;
3606 }
Sarah Sharp23e3be12009-04-29 19:05:20 -07003607 xhci_ring_cmd_db(xhci);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003608 spin_unlock_irqrestore(&xhci->lock, flags);
Mathias Nymanddba5cd2014-05-08 19:26:00 +03003609
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003610 /*
3611 * Event command completion handler will free any data structures
Sarah Sharpf88ba782009-05-14 11:44:22 -07003612 * associated with the slot. XXX Can free sleep?
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003613 */
3614}
3615
3616/*
Sarah Sharp2cf95c12011-05-11 16:14:58 -07003617 * Checks if we have enough host controller resources for the default control
3618 * endpoint.
3619 *
3620 * Must be called with xhci->lock held.
3621 */
3622static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3623{
3624 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +03003625 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3626 "Not enough ep ctxs: "
3627 "%u active, need to add 1, limit is %u.",
Sarah Sharp2cf95c12011-05-11 16:14:58 -07003628 xhci->num_active_eps, xhci->limit_active_eps);
3629 return -ENOMEM;
3630 }
3631 xhci->num_active_eps += 1;
Xenia Ragiadakou4bdfe4c2013-08-06 07:52:45 +03003632 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3633 "Adding 1 ep ctx, %u now active.",
Sarah Sharp2cf95c12011-05-11 16:14:58 -07003634 xhci->num_active_eps);
3635 return 0;
3636}
3637
3638
3639/*
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003640 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3641 * timed out, or allocating memory failed. Returns 1 on success.
3642 */
3643int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3644{
3645 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3646 unsigned long flags;
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003647 int ret, slot_id;
Mathias Nymanddba5cd2014-05-08 19:26:00 +03003648 struct xhci_command *command;
3649
Lu Baolu87e44f22016-11-11 15:13:30 +02003650 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
Mathias Nymanddba5cd2014-05-08 19:26:00 +03003651 if (!command)
3652 return 0;
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003653
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003654 /* xhci->slot_id and xhci->addr_dev are not thread-safe */
3655 mutex_lock(&xhci->mutex);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003656 spin_lock_irqsave(&xhci->lock, flags);
Mathias Nymanddba5cd2014-05-08 19:26:00 +03003657 ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003658 if (ret) {
3659 spin_unlock_irqrestore(&xhci->lock, flags);
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003660 mutex_unlock(&xhci->mutex);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003661 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
Lu Baolu87e44f22016-11-11 15:13:30 +02003662 xhci_free_command(xhci, command);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003663 return 0;
3664 }
Sarah Sharp23e3be12009-04-29 19:05:20 -07003665 xhci_ring_cmd_db(xhci);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003666 spin_unlock_irqrestore(&xhci->lock, flags);
3667
Mathias Nymanc311e392014-05-08 19:26:03 +03003668 wait_for_completion(command->completion);
Lu Baoluc2d3d492016-11-11 15:13:31 +02003669 slot_id = command->slot_id;
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003670 mutex_unlock(&xhci->mutex);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003671
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003672 if (!slot_id || command->status != COMP_SUCCESS) {
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003673 xhci_err(xhci, "Error while assigning device slot ID\n");
Sarah Sharpbe982032014-05-08 19:25:59 +03003674 xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
3675 HCS_MAX_SLOTS(
3676 readl(&xhci->cap_regs->hcs_params1)));
Lu Baolu87e44f22016-11-11 15:13:30 +02003677 xhci_free_command(xhci, command);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003678 return 0;
3679 }
Sarah Sharp2cf95c12011-05-11 16:14:58 -07003680
3681 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3682 spin_lock_irqsave(&xhci->lock, flags);
3683 ret = xhci_reserve_host_control_ep_resources(xhci);
3684 if (ret) {
3685 spin_unlock_irqrestore(&xhci->lock, flags);
3686 xhci_warn(xhci, "Not enough host resources, "
3687 "active endpoint contexts = %u\n",
3688 xhci->num_active_eps);
3689 goto disable_slot;
3690 }
3691 spin_unlock_irqrestore(&xhci->lock, flags);
3692 }
3693 /* Use GFP_NOIO, since this function can be called from
Sarah Sharpa6d940d2010-12-28 13:08:42 -08003694 * xhci_discover_or_reset_device(), which may be called as part of
3695 * mass storage driver error handling.
3696 */
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003697 if (!xhci_alloc_virt_device(xhci, slot_id, udev, GFP_NOIO)) {
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003698 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
Sarah Sharp2cf95c12011-05-11 16:14:58 -07003699 goto disable_slot;
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003700 }
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003701 udev->slot_id = slot_id;
Shawn Nematbakhshc8476fb2013-08-19 10:36:13 -07003702
3703#ifndef CONFIG_USB_DEFAULT_PERSIST
3704 /*
3705 * If resetting upon resume, we can't put the controller into runtime
3706 * suspend if there is a device attached.
3707 */
3708 if (xhci->quirks & XHCI_RESET_ON_RESUME)
Sarah Sharpe7ecf062013-08-28 09:31:04 -07003709 pm_runtime_get_noresume(hcd->self.controller);
Shawn Nematbakhshc8476fb2013-08-19 10:36:13 -07003710#endif
3711
Mathias Nymanddba5cd2014-05-08 19:26:00 +03003712
Lu Baolu87e44f22016-11-11 15:13:30 +02003713 xhci_free_command(xhci, command);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003714 /* Is this a LS or FS device under a HS hub? */
3715 /* Hub or peripherial? */
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003716 return 1;
Sarah Sharp2cf95c12011-05-11 16:14:58 -07003717
3718disable_slot:
3719 /* Disable slot, if we can do it without mem alloc */
3720 spin_lock_irqsave(&xhci->lock, flags);
Lu Baolu87e44f22016-11-11 15:13:30 +02003721 kfree(command->completion);
Mathias Nymanddba5cd2014-05-08 19:26:00 +03003722 command->completion = NULL;
3723 command->status = 0;
3724 if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3725 udev->slot_id))
Sarah Sharp2cf95c12011-05-11 16:14:58 -07003726 xhci_ring_cmd_db(xhci);
3727 spin_unlock_irqrestore(&xhci->lock, flags);
3728 return 0;
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003729}
3730
3731/*
Dan Williams48fc7db2013-12-05 17:07:27 -08003732 * Issue an Address Device command and optionally send a corresponding
3733 * SetAddress request to the device.
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003734 */
Dan Williams48fc7db2013-12-05 17:07:27 -08003735static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3736 enum xhci_setup_dev setup)
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003737{
Dan Williams6f8ffc02013-11-22 01:20:01 -08003738 const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003739 unsigned long flags;
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003740 struct xhci_virt_device *virt_dev;
3741 int ret = 0;
3742 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
John Yound115b042009-07-27 12:05:15 -07003743 struct xhci_slot_ctx *slot_ctx;
3744 struct xhci_input_control_ctx *ctrl_ctx;
Sarah Sharp8e595a52009-07-27 12:03:31 -07003745 u64 temp_64;
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003746 struct xhci_command *command = NULL;
3747
3748 mutex_lock(&xhci->mutex);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003749
Lu Baolu90797ae2017-01-03 18:28:44 +02003750 if (xhci->xhc_state) { /* dying, removing or halted */
3751 ret = -ESHUTDOWN;
Roger Quadros448116b2015-09-21 17:46:15 +03003752 goto out;
Lu Baolu90797ae2017-01-03 18:28:44 +02003753 }
Roger Quadros448116b2015-09-21 17:46:15 +03003754
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003755 if (!udev->slot_id) {
Xenia Ragiadakou84a99f62013-08-06 00:22:15 +03003756 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3757 "Bad Slot ID %d", udev->slot_id);
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003758 ret = -EINVAL;
3759 goto out;
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003760 }
3761
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003762 virt_dev = xhci->devs[udev->slot_id];
3763
Matt Evans7ed603e2011-03-29 13:40:56 +11003764 if (WARN_ON(!virt_dev)) {
3765 /*
3766 * In plug/unplug torture test with an NEC controller,
3767 * a zero-dereference was observed once due to virt_dev = 0.
3768 * Print useful debug rather than crash if it is observed again!
3769 */
3770 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3771 udev->slot_id);
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003772 ret = -EINVAL;
3773 goto out;
Matt Evans7ed603e2011-03-29 13:40:56 +11003774 }
3775
Mathias Nymanf161ead2015-01-09 17:18:28 +02003776 if (setup == SETUP_CONTEXT_ONLY) {
3777 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3778 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3779 SLOT_STATE_DEFAULT) {
3780 xhci_dbg(xhci, "Slot already in default state\n");
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003781 goto out;
Mathias Nymanf161ead2015-01-09 17:18:28 +02003782 }
3783 }
3784
Lu Baolu87e44f22016-11-11 15:13:30 +02003785 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003786 if (!command) {
3787 ret = -ENOMEM;
3788 goto out;
3789 }
Mathias Nymanddba5cd2014-05-08 19:26:00 +03003790
3791 command->in_ctx = virt_dev->in_ctx;
Mathias Nymanddba5cd2014-05-08 19:26:00 +03003792
Andiry Xuf0615c42010-10-14 07:22:48 -07003793 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
Lin Wang4daf9df2015-01-09 16:06:31 +02003794 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
Sarah Sharp92f8e762013-04-23 17:11:14 -07003795 if (!ctrl_ctx) {
3796 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3797 __func__);
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003798 ret = -EINVAL;
3799 goto out;
Sarah Sharp92f8e762013-04-23 17:11:14 -07003800 }
Andiry Xuf0615c42010-10-14 07:22:48 -07003801 /*
3802 * If this is the first Set Address since device plug-in or
3803 * virt_device realloaction after a resume with an xHCI power loss,
3804 * then set up the slot context.
3805 */
3806 if (!slot_ctx->dev_info)
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003807 xhci_setup_addressable_virt_dev(xhci, udev);
Andiry Xuf0615c42010-10-14 07:22:48 -07003808 /* Otherwise, update the control endpoint ring enqueue pointer. */
Sarah Sharp2d1ee592010-07-09 17:08:54 +02003809 else
3810 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
Sarah Sharpd31c2852011-11-03 13:06:08 -07003811 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3812 ctrl_ctx->drop_flags = 0;
3813
Sarah Sharp66e49d82009-07-27 12:03:46 -07003814 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
John Yound115b042009-07-27 12:05:15 -07003815 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
Xenia Ragiadakou1d27fab2013-08-06 07:52:47 +03003816 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
Xenia Ragiadakou0c052aa2013-11-15 03:18:07 +02003817 le32_to_cpu(slot_ctx->dev_info) >> 27);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003818
Sarah Sharpf88ba782009-05-14 11:44:22 -07003819 spin_lock_irqsave(&xhci->lock, flags);
Felipe Balbia711ede2017-01-23 14:20:23 +02003820 trace_xhci_setup_device(virt_dev);
Mathias Nymanddba5cd2014-05-08 19:26:00 +03003821 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
Dan Williams48fc7db2013-12-05 17:07:27 -08003822 udev->slot_id, setup);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003823 if (ret) {
3824 spin_unlock_irqrestore(&xhci->lock, flags);
Xenia Ragiadakou84a99f62013-08-06 00:22:15 +03003825 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3826 "FIXME: allocate a command ring segment");
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003827 goto out;
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003828 }
Sarah Sharp23e3be12009-04-29 19:05:20 -07003829 xhci_ring_cmd_db(xhci);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003830 spin_unlock_irqrestore(&xhci->lock, flags);
3831
3832 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
Mathias Nymanc311e392014-05-08 19:26:03 +03003833 wait_for_completion(command->completion);
3834
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003835 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3836 * the SetAddress() "recovery interval" required by USB and aborting the
3837 * command on a timeout.
3838 */
Mathias Nyman9ea18332014-05-08 19:26:02 +03003839 switch (command->status) {
Felipe Balbi0b7c1052017-01-23 14:20:06 +02003840 case COMP_COMMAND_ABORTED:
3841 case COMP_STOPPED:
Mathias Nymanc311e392014-05-08 19:26:03 +03003842 xhci_warn(xhci, "Timeout while waiting for setup device command\n");
3843 ret = -ETIME;
3844 break;
Felipe Balbi0b7c1052017-01-23 14:20:06 +02003845 case COMP_CONTEXT_STATE_ERROR:
3846 case COMP_SLOT_NOT_ENABLED_ERROR:
Dan Williams6f8ffc02013-11-22 01:20:01 -08003847 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3848 act, udev->slot_id);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003849 ret = -EINVAL;
3850 break;
Felipe Balbi0b7c1052017-01-23 14:20:06 +02003851 case COMP_USB_TRANSACTION_ERROR:
Dan Williams6f8ffc02013-11-22 01:20:01 -08003852 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003853 ret = -EPROTO;
3854 break;
Felipe Balbi0b7c1052017-01-23 14:20:06 +02003855 case COMP_INCOMPATIBLE_DEVICE_ERROR:
Dan Williams6f8ffc02013-11-22 01:20:01 -08003856 dev_warn(&udev->dev,
3857 "ERROR: Incompatible device for setup %s command\n", act);
Alex Hef6ba6fe2011-06-08 18:34:06 +08003858 ret = -ENODEV;
3859 break;
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003860 case COMP_SUCCESS:
Xenia Ragiadakou84a99f62013-08-06 00:22:15 +03003861 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
Dan Williams6f8ffc02013-11-22 01:20:01 -08003862 "Successful setup %s command", act);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003863 break;
3864 default:
Dan Williams6f8ffc02013-11-22 01:20:01 -08003865 xhci_err(xhci,
3866 "ERROR: unexpected setup %s command completion code 0x%x.\n",
Mathias Nyman9ea18332014-05-08 19:26:02 +03003867 act, command->status);
Sarah Sharp66e49d82009-07-27 12:03:46 -07003868 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
John Yound115b042009-07-27 12:05:15 -07003869 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
Xenia Ragiadakou1d27fab2013-08-06 07:52:47 +03003870 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003871 ret = -EINVAL;
3872 break;
3873 }
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003874 if (ret)
3875 goto out;
Sarah Sharpf7b2e402014-01-30 13:27:49 -08003876 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
Xenia Ragiadakou84a99f62013-08-06 00:22:15 +03003877 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3878 "Op regs DCBAA ptr = %#016llx", temp_64);
3879 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3880 "Slot ID %d dcbaa entry @%p = %#016llx",
3881 udev->slot_id,
3882 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3883 (unsigned long long)
3884 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3885 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3886 "Output Context DMA address = %#08llx",
John Yound115b042009-07-27 12:05:15 -07003887 (unsigned long long)virt_dev->out_ctx->dma);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003888 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
John Yound115b042009-07-27 12:05:15 -07003889 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
Xenia Ragiadakou1d27fab2013-08-06 07:52:47 +03003890 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
Xenia Ragiadakou0c052aa2013-11-15 03:18:07 +02003891 le32_to_cpu(slot_ctx->dev_info) >> 27);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003892 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
John Yound115b042009-07-27 12:05:15 -07003893 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003894 /*
3895 * USB core uses address 1 for the roothubs, so we add one to the
3896 * address given back to us by the HC.
3897 */
John Yound115b042009-07-27 12:05:15 -07003898 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
Xenia Ragiadakou1d27fab2013-08-06 07:52:47 +03003899 trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
Xenia Ragiadakou0c052aa2013-11-15 03:18:07 +02003900 le32_to_cpu(slot_ctx->dev_info) >> 27);
Sarah Sharpf94e01862009-04-27 19:58:38 -07003901 /* Zero the input context control for later use */
John Yound115b042009-07-27 12:05:15 -07003902 ctrl_ctx->add_flags = 0;
3903 ctrl_ctx->drop_flags = 0;
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003904
Xenia Ragiadakou84a99f62013-08-06 00:22:15 +03003905 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
Dan Williamsa2cdc342013-10-16 12:25:44 -07003906 "Internal device address = %d",
3907 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003908out:
3909 mutex_unlock(&xhci->mutex);
Lu Baolu87e44f22016-11-11 15:13:30 +02003910 if (command) {
3911 kfree(command->completion);
3912 kfree(command);
3913 }
Chris Bainbridgea00918d2015-05-19 16:30:51 +03003914 return ret;
Sarah Sharp3ffbba92009-04-27 19:57:38 -07003915}
3916
Dan Williams48fc7db2013-12-05 17:07:27 -08003917int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3918{
3919 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
3920}
3921
3922int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
3923{
3924 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
3925}
3926
Lan Tianyu3f5eb142013-03-19 16:48:12 +08003927/*
3928 * Transfer the port index into real index in the HW port status
3929 * registers. Caculate offset between the port's PORTSC register
3930 * and port status base. Divide the number of per port register
3931 * to get the real index. The raw port number bases 1.
3932 */
3933int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3934{
3935 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3936 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3937 __le32 __iomem *addr;
3938 int raw_port;
3939
Mathias Nymanb50107b2015-10-01 18:40:38 +03003940 if (hcd->speed < HCD_USB3)
Lan Tianyu3f5eb142013-03-19 16:48:12 +08003941 addr = xhci->usb2_ports[port1 - 1];
3942 else
3943 addr = xhci->usb3_ports[port1 - 1];
3944
3945 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3946 return raw_port;
3947}
3948
Mathias Nymana558ccd2013-05-23 17:14:30 +03003949/*
3950 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3951 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3952 */
Olof Johanssond5c82fe2013-07-23 11:58:20 -07003953static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
Mathias Nymana558ccd2013-05-23 17:14:30 +03003954 struct usb_device *udev, u16 max_exit_latency)
3955{
3956 struct xhci_virt_device *virt_dev;
3957 struct xhci_command *command;
3958 struct xhci_input_control_ctx *ctrl_ctx;
3959 struct xhci_slot_ctx *slot_ctx;
3960 unsigned long flags;
3961 int ret;
3962
3963 spin_lock_irqsave(&xhci->lock, flags);
Mathias Nyman96044692014-09-11 13:55:50 +03003964
3965 virt_dev = xhci->devs[udev->slot_id];
3966
3967 /*
3968 * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
3969 * xHC was re-initialized. Exit latency will be set later after
3970 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
3971 */
3972
3973 if (!virt_dev || max_exit_latency == virt_dev->current_mel) {
Mathias Nymana558ccd2013-05-23 17:14:30 +03003974 spin_unlock_irqrestore(&xhci->lock, flags);
3975 return 0;
3976 }
3977
3978 /* Attempt to issue an Evaluate Context command to change the MEL. */
Mathias Nymana558ccd2013-05-23 17:14:30 +03003979 command = xhci->lpm_command;
Lin Wang4daf9df2015-01-09 16:06:31 +02003980 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
Sarah Sharp92f8e762013-04-23 17:11:14 -07003981 if (!ctrl_ctx) {
3982 spin_unlock_irqrestore(&xhci->lock, flags);
3983 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3984 __func__);
3985 return -ENOMEM;
3986 }
3987
Mathias Nymana558ccd2013-05-23 17:14:30 +03003988 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
3989 spin_unlock_irqrestore(&xhci->lock, flags);
3990
Mathias Nymana558ccd2013-05-23 17:14:30 +03003991 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3992 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
3993 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
3994 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
Mathias Nyman4801d4ea2014-11-27 18:19:15 +02003995 slot_ctx->dev_state = 0;
Mathias Nymana558ccd2013-05-23 17:14:30 +03003996
Xenia Ragiadakou3a7fa5b2013-07-31 07:35:27 +03003997 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
3998 "Set up evaluate context for LPM MEL change.");
Mathias Nymana558ccd2013-05-23 17:14:30 +03003999 xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
4000 xhci_dbg_ctx(xhci, command->in_ctx, 0);
4001
4002 /* Issue and wait for the evaluate context command. */
4003 ret = xhci_configure_endpoint(xhci, udev, command,
4004 true, true);
4005 xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
4006 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
4007
4008 if (!ret) {
4009 spin_lock_irqsave(&xhci->lock, flags);
4010 virt_dev->current_mel = max_exit_latency;
4011 spin_unlock_irqrestore(&xhci->lock, flags);
4012 }
4013 return ret;
4014}
4015
Rafael J. Wysockiceb6c9c2014-11-29 23:47:05 +01004016#ifdef CONFIG_PM
Andiry Xu95743232011-09-23 14:19:51 -07004017
4018/* BESL to HIRD Encoding array for USB2 LPM */
4019static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
4020 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
4021
4022/* Calculate HIRD/BESL for USB2 PORTPMSC*/
Andiry Xuf99298b2011-12-12 16:45:28 +08004023static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
4024 struct usb_device *udev)
Andiry Xu95743232011-09-23 14:19:51 -07004025{
Andiry Xuf99298b2011-12-12 16:45:28 +08004026 int u2del, besl, besl_host;
4027 int besl_device = 0;
4028 u32 field;
Andiry Xu95743232011-09-23 14:19:51 -07004029
Andiry Xuf99298b2011-12-12 16:45:28 +08004030 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
4031 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4032
4033 if (field & USB_BESL_SUPPORT) {
4034 for (besl_host = 0; besl_host < 16; besl_host++) {
4035 if (xhci_besl_encoding[besl_host] >= u2del)
Andiry Xu95743232011-09-23 14:19:51 -07004036 break;
4037 }
Andiry Xuf99298b2011-12-12 16:45:28 +08004038 /* Use baseline BESL value as default */
4039 if (field & USB_BESL_BASELINE_VALID)
4040 besl_device = USB_GET_BESL_BASELINE(field);
4041 else if (field & USB_BESL_DEEP_VALID)
4042 besl_device = USB_GET_BESL_DEEP(field);
Andiry Xu95743232011-09-23 14:19:51 -07004043 } else {
4044 if (u2del <= 50)
Andiry Xuf99298b2011-12-12 16:45:28 +08004045 besl_host = 0;
Andiry Xu95743232011-09-23 14:19:51 -07004046 else
Andiry Xuf99298b2011-12-12 16:45:28 +08004047 besl_host = (u2del - 51) / 75 + 1;
Andiry Xu95743232011-09-23 14:19:51 -07004048 }
4049
Andiry Xuf99298b2011-12-12 16:45:28 +08004050 besl = besl_host + besl_device;
4051 if (besl > 15)
4052 besl = 15;
4053
4054 return besl;
Andiry Xu95743232011-09-23 14:19:51 -07004055}
4056
Mathias Nymana558ccd2013-05-23 17:14:30 +03004057/* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4058static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4059{
4060 u32 field;
4061 int l1;
4062 int besld = 0;
4063 int hirdm = 0;
4064
4065 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4066
4067 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
Mathias Nyman17f34862013-05-23 17:14:31 +03004068 l1 = udev->l1_params.timeout / 256;
Mathias Nymana558ccd2013-05-23 17:14:30 +03004069
4070 /* device has preferred BESLD */
4071 if (field & USB_BESL_DEEP_VALID) {
4072 besld = USB_GET_BESL_DEEP(field);
4073 hirdm = 1;
4074 }
4075
4076 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4077}
4078
Andiry Xu65580b432011-09-23 14:19:52 -07004079int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4080 struct usb_device *udev, int enable)
4081{
4082 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4083 __le32 __iomem **port_array;
Mathias Nymana558ccd2013-05-23 17:14:30 +03004084 __le32 __iomem *pm_addr, *hlpm_addr;
4085 u32 pm_val, hlpm_val, field;
Andiry Xu65580b432011-09-23 14:19:52 -07004086 unsigned int port_num;
4087 unsigned long flags;
Mathias Nymana558ccd2013-05-23 17:14:30 +03004088 int hird, exit_latency;
4089 int ret;
Andiry Xu65580b432011-09-23 14:19:52 -07004090
Mathias Nymanb50107b2015-10-01 18:40:38 +03004091 if (hcd->speed >= HCD_USB3 || !xhci->hw_lpm_support ||
Andiry Xu65580b432011-09-23 14:19:52 -07004092 !udev->lpm_capable)
4093 return -EPERM;
4094
4095 if (!udev->parent || udev->parent->parent ||
4096 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4097 return -EPERM;
4098
4099 if (udev->usb2_hw_lpm_capable != 1)
4100 return -EPERM;
4101
4102 spin_lock_irqsave(&xhci->lock, flags);
4103
4104 port_array = xhci->usb2_ports;
4105 port_num = udev->portnum - 1;
Mathias Nymanb6e76372013-05-23 17:14:29 +03004106 pm_addr = port_array[port_num] + PORTPMSC;
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02004107 pm_val = readl(pm_addr);
Mathias Nymana558ccd2013-05-23 17:14:30 +03004108 hlpm_addr = port_array[port_num] + PORTHLPMC;
4109 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
Andiry Xu65580b432011-09-23 14:19:52 -07004110
4111 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
Lin Wang654a55d2014-05-08 19:25:54 +03004112 enable ? "enable" : "disable", port_num + 1);
Andiry Xu65580b432011-09-23 14:19:52 -07004113
Andiry Xu65580b432011-09-23 14:19:52 -07004114 if (enable) {
Mathias Nymana558ccd2013-05-23 17:14:30 +03004115 /* Host supports BESL timeout instead of HIRD */
4116 if (udev->usb2_hw_lpm_besl_capable) {
4117 /* if device doesn't have a preferred BESL value use a
4118 * default one which works with mixed HIRD and BESL
4119 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4120 */
4121 if ((field & USB_BESL_SUPPORT) &&
4122 (field & USB_BESL_BASELINE_VALID))
4123 hird = USB_GET_BESL_BASELINE(field);
4124 else
Mathias Nyman17f34862013-05-23 17:14:31 +03004125 hird = udev->l1_params.besl;
Mathias Nymana558ccd2013-05-23 17:14:30 +03004126
4127 exit_latency = xhci_besl_encoding[hird];
4128 spin_unlock_irqrestore(&xhci->lock, flags);
4129
4130 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4131 * input context for link powermanagement evaluate
4132 * context commands. It is protected by hcd->bandwidth
4133 * mutex and is shared by all devices. We need to set
4134 * the max ext latency in USB 2 BESL LPM as well, so
4135 * use the same mutex and xhci_change_max_exit_latency()
4136 */
4137 mutex_lock(hcd->bandwidth_mutex);
4138 ret = xhci_change_max_exit_latency(xhci, udev,
4139 exit_latency);
4140 mutex_unlock(hcd->bandwidth_mutex);
4141
4142 if (ret < 0)
4143 return ret;
4144 spin_lock_irqsave(&xhci->lock, flags);
4145
4146 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
Xenia Ragiadakou204b7792013-11-15 05:34:07 +02004147 writel(hlpm_val, hlpm_addr);
Mathias Nymana558ccd2013-05-23 17:14:30 +03004148 /* flush write */
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02004149 readl(hlpm_addr);
Mathias Nymana558ccd2013-05-23 17:14:30 +03004150 } else {
4151 hird = xhci_calculate_hird_besl(xhci, udev);
4152 }
4153
4154 pm_val &= ~PORT_HIRD_MASK;
Sarah Sharp58e21f72013-10-07 17:17:20 -07004155 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
Xenia Ragiadakou204b7792013-11-15 05:34:07 +02004156 writel(pm_val, pm_addr);
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02004157 pm_val = readl(pm_addr);
Mathias Nymana558ccd2013-05-23 17:14:30 +03004158 pm_val |= PORT_HLE;
Xenia Ragiadakou204b7792013-11-15 05:34:07 +02004159 writel(pm_val, pm_addr);
Mathias Nymana558ccd2013-05-23 17:14:30 +03004160 /* flush write */
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02004161 readl(pm_addr);
Andiry Xu65580b432011-09-23 14:19:52 -07004162 } else {
Sarah Sharp58e21f72013-10-07 17:17:20 -07004163 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
Xenia Ragiadakou204b7792013-11-15 05:34:07 +02004164 writel(pm_val, pm_addr);
Mathias Nymana558ccd2013-05-23 17:14:30 +03004165 /* flush write */
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02004166 readl(pm_addr);
Mathias Nymana558ccd2013-05-23 17:14:30 +03004167 if (udev->usb2_hw_lpm_besl_capable) {
4168 spin_unlock_irqrestore(&xhci->lock, flags);
4169 mutex_lock(hcd->bandwidth_mutex);
4170 xhci_change_max_exit_latency(xhci, udev, 0);
4171 mutex_unlock(hcd->bandwidth_mutex);
4172 return 0;
4173 }
Andiry Xu65580b432011-09-23 14:19:52 -07004174 }
4175
4176 spin_unlock_irqrestore(&xhci->lock, flags);
4177 return 0;
4178}
4179
Mathias Nymanb630d4b2013-05-23 17:14:28 +03004180/* check if a usb2 port supports a given extened capability protocol
4181 * only USB2 ports extended protocol capability values are cached.
4182 * Return 1 if capability is supported
4183 */
4184static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4185 unsigned capability)
4186{
4187 u32 port_offset, port_count;
4188 int i;
4189
4190 for (i = 0; i < xhci->num_ext_caps; i++) {
4191 if (xhci->ext_caps[i] & capability) {
4192 /* port offsets starts at 1 */
4193 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4194 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4195 if (port >= port_offset &&
4196 port < port_offset + port_count)
4197 return 1;
4198 }
4199 }
4200 return 0;
4201}
4202
Sarah Sharpb01bcbf2012-05-21 07:54:42 -07004203int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4204{
4205 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
Mathias Nymanb630d4b2013-05-23 17:14:28 +03004206 int portnum = udev->portnum - 1;
Sarah Sharpb01bcbf2012-05-21 07:54:42 -07004207
Mathias Nymanb50107b2015-10-01 18:40:38 +03004208 if (hcd->speed >= HCD_USB3 || !xhci->sw_lpm_support ||
Sarah Sharpde68bab2013-09-30 17:26:28 +03004209 !udev->lpm_capable)
4210 return 0;
4211
4212 /* we only support lpm for non-hub device connected to root hub yet */
4213 if (!udev->parent || udev->parent->parent ||
4214 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4215 return 0;
4216
4217 if (xhci->hw_lpm_support == 1 &&
4218 xhci_check_usb2_port_capability(
4219 xhci, portnum, XHCI_HLC)) {
4220 udev->usb2_hw_lpm_capable = 1;
4221 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4222 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4223 if (xhci_check_usb2_port_capability(xhci, portnum,
4224 XHCI_BLC))
4225 udev->usb2_hw_lpm_besl_capable = 1;
Sarah Sharpb01bcbf2012-05-21 07:54:42 -07004226 }
4227
4228 return 0;
4229}
4230
Sarah Sharp3b3db022012-05-09 10:55:03 -07004231/*---------------------- USB 3.0 Link PM functions ------------------------*/
4232
Sarah Sharpe3567d22012-05-16 13:36:24 -07004233/* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4234static unsigned long long xhci_service_interval_to_ns(
4235 struct usb_endpoint_descriptor *desc)
4236{
Oliver Neukum16b45fd2012-10-17 10:16:16 +02004237 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
Sarah Sharpe3567d22012-05-16 13:36:24 -07004238}
4239
Sarah Sharp3b3db022012-05-09 10:55:03 -07004240static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4241 enum usb3_link_state state)
4242{
4243 unsigned long long sel;
4244 unsigned long long pel;
4245 unsigned int max_sel_pel;
4246 char *state_name;
4247
4248 switch (state) {
4249 case USB3_LPM_U1:
4250 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4251 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4252 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4253 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4254 state_name = "U1";
4255 break;
4256 case USB3_LPM_U2:
4257 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4258 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4259 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4260 state_name = "U2";
4261 break;
4262 default:
4263 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4264 __func__);
Sarah Sharpe25e62a2012-06-07 11:10:32 -07004265 return USB3_LPM_DISABLED;
Sarah Sharp3b3db022012-05-09 10:55:03 -07004266 }
4267
4268 if (sel <= max_sel_pel && pel <= max_sel_pel)
4269 return USB3_LPM_DEVICE_INITIATED;
4270
4271 if (sel > max_sel_pel)
4272 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4273 "due to long SEL %llu ms\n",
4274 state_name, sel);
4275 else
4276 dev_dbg(&udev->dev, "Device-initiated %s disabled "
Joe Perches03e64e92013-07-16 19:25:59 -07004277 "due to long PEL %llu ms\n",
Sarah Sharp3b3db022012-05-09 10:55:03 -07004278 state_name, pel);
4279 return USB3_LPM_DISABLED;
4280}
4281
Pratyush Anand9502c462014-07-04 17:01:23 +03004282/* The U1 timeout should be the maximum of the following values:
Sarah Sharpe3567d22012-05-16 13:36:24 -07004283 * - For control endpoints, U1 system exit latency (SEL) * 3
4284 * - For bulk endpoints, U1 SEL * 5
4285 * - For interrupt endpoints:
4286 * - Notification EPs, U1 SEL * 3
4287 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4288 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4289 */
Pratyush Anand9502c462014-07-04 17:01:23 +03004290static unsigned long long xhci_calculate_intel_u1_timeout(
4291 struct usb_device *udev,
Sarah Sharpe3567d22012-05-16 13:36:24 -07004292 struct usb_endpoint_descriptor *desc)
4293{
4294 unsigned long long timeout_ns;
4295 int ep_type;
4296 int intr_type;
4297
4298 ep_type = usb_endpoint_type(desc);
4299 switch (ep_type) {
4300 case USB_ENDPOINT_XFER_CONTROL:
4301 timeout_ns = udev->u1_params.sel * 3;
4302 break;
4303 case USB_ENDPOINT_XFER_BULK:
4304 timeout_ns = udev->u1_params.sel * 5;
4305 break;
4306 case USB_ENDPOINT_XFER_INT:
4307 intr_type = usb_endpoint_interrupt_type(desc);
4308 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4309 timeout_ns = udev->u1_params.sel * 3;
4310 break;
4311 }
4312 /* Otherwise the calculation is the same as isoc eps */
4313 case USB_ENDPOINT_XFER_ISOC:
4314 timeout_ns = xhci_service_interval_to_ns(desc);
Sarah Sharpc88db162012-05-21 08:44:33 -07004315 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
Sarah Sharpe3567d22012-05-16 13:36:24 -07004316 if (timeout_ns < udev->u1_params.sel * 2)
4317 timeout_ns = udev->u1_params.sel * 2;
4318 break;
4319 default:
4320 return 0;
4321 }
4322
Pratyush Anand9502c462014-07-04 17:01:23 +03004323 return timeout_ns;
4324}
4325
4326/* Returns the hub-encoded U1 timeout value. */
4327static u16 xhci_calculate_u1_timeout(struct xhci_hcd *xhci,
4328 struct usb_device *udev,
4329 struct usb_endpoint_descriptor *desc)
4330{
4331 unsigned long long timeout_ns;
4332
4333 if (xhci->quirks & XHCI_INTEL_HOST)
4334 timeout_ns = xhci_calculate_intel_u1_timeout(udev, desc);
4335 else
4336 timeout_ns = udev->u1_params.sel;
4337
4338 /* The U1 timeout is encoded in 1us intervals.
4339 * Don't return a timeout of zero, because that's USB3_LPM_DISABLED.
4340 */
Sarah Sharpe3567d22012-05-16 13:36:24 -07004341 if (timeout_ns == USB3_LPM_DISABLED)
Pratyush Anand9502c462014-07-04 17:01:23 +03004342 timeout_ns = 1;
4343 else
4344 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
Sarah Sharpe3567d22012-05-16 13:36:24 -07004345
4346 /* If the necessary timeout value is bigger than what we can set in the
4347 * USB 3.0 hub, we have to disable hub-initiated U1.
4348 */
4349 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4350 return timeout_ns;
4351 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4352 "due to long timeout %llu ms\n", timeout_ns);
4353 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4354}
4355
Pratyush Anand9502c462014-07-04 17:01:23 +03004356/* The U2 timeout should be the maximum of:
Sarah Sharpe3567d22012-05-16 13:36:24 -07004357 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4358 * - largest bInterval of any active periodic endpoint (to avoid going
4359 * into lower power link states between intervals).
4360 * - the U2 Exit Latency of the device
4361 */
Pratyush Anand9502c462014-07-04 17:01:23 +03004362static unsigned long long xhci_calculate_intel_u2_timeout(
4363 struct usb_device *udev,
Sarah Sharpe3567d22012-05-16 13:36:24 -07004364 struct usb_endpoint_descriptor *desc)
4365{
4366 unsigned long long timeout_ns;
4367 unsigned long long u2_del_ns;
4368
4369 timeout_ns = 10 * 1000 * 1000;
4370
4371 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4372 (xhci_service_interval_to_ns(desc) > timeout_ns))
4373 timeout_ns = xhci_service_interval_to_ns(desc);
4374
Oliver Neukum966e7a82012-10-17 12:17:50 +02004375 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
Sarah Sharpe3567d22012-05-16 13:36:24 -07004376 if (u2_del_ns > timeout_ns)
4377 timeout_ns = u2_del_ns;
4378
Pratyush Anand9502c462014-07-04 17:01:23 +03004379 return timeout_ns;
4380}
4381
4382/* Returns the hub-encoded U2 timeout value. */
4383static u16 xhci_calculate_u2_timeout(struct xhci_hcd *xhci,
4384 struct usb_device *udev,
4385 struct usb_endpoint_descriptor *desc)
4386{
4387 unsigned long long timeout_ns;
4388
4389 if (xhci->quirks & XHCI_INTEL_HOST)
4390 timeout_ns = xhci_calculate_intel_u2_timeout(udev, desc);
4391 else
4392 timeout_ns = udev->u2_params.sel;
4393
Sarah Sharpe3567d22012-05-16 13:36:24 -07004394 /* The U2 timeout is encoded in 256us intervals */
Sarah Sharpc88db162012-05-21 08:44:33 -07004395 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
Sarah Sharpe3567d22012-05-16 13:36:24 -07004396 /* If the necessary timeout value is bigger than what we can set in the
4397 * USB 3.0 hub, we have to disable hub-initiated U2.
4398 */
4399 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4400 return timeout_ns;
4401 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4402 "due to long timeout %llu ms\n", timeout_ns);
4403 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4404}
4405
Sarah Sharp3b3db022012-05-09 10:55:03 -07004406static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4407 struct usb_device *udev,
4408 struct usb_endpoint_descriptor *desc,
4409 enum usb3_link_state state,
4410 u16 *timeout)
4411{
Pratyush Anand9502c462014-07-04 17:01:23 +03004412 if (state == USB3_LPM_U1)
4413 return xhci_calculate_u1_timeout(xhci, udev, desc);
4414 else if (state == USB3_LPM_U2)
4415 return xhci_calculate_u2_timeout(xhci, udev, desc);
Sarah Sharpe3567d22012-05-16 13:36:24 -07004416
Sarah Sharp3b3db022012-05-09 10:55:03 -07004417 return USB3_LPM_DISABLED;
4418}
4419
4420static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4421 struct usb_device *udev,
4422 struct usb_endpoint_descriptor *desc,
4423 enum usb3_link_state state,
4424 u16 *timeout)
4425{
4426 u16 alt_timeout;
4427
4428 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4429 desc, state, timeout);
4430
4431 /* If we found we can't enable hub-initiated LPM, or
4432 * the U1 or U2 exit latency was too high to allow
4433 * device-initiated LPM as well, just stop searching.
4434 */
4435 if (alt_timeout == USB3_LPM_DISABLED ||
4436 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4437 *timeout = alt_timeout;
4438 return -E2BIG;
4439 }
4440 if (alt_timeout > *timeout)
4441 *timeout = alt_timeout;
4442 return 0;
4443}
4444
4445static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4446 struct usb_device *udev,
4447 struct usb_host_interface *alt,
4448 enum usb3_link_state state,
4449 u16 *timeout)
4450{
4451 int j;
4452
4453 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4454 if (xhci_update_timeout_for_endpoint(xhci, udev,
4455 &alt->endpoint[j].desc, state, timeout))
4456 return -E2BIG;
4457 continue;
4458 }
4459 return 0;
4460}
4461
Sarah Sharpe3567d22012-05-16 13:36:24 -07004462static int xhci_check_intel_tier_policy(struct usb_device *udev,
4463 enum usb3_link_state state)
4464{
4465 struct usb_device *parent;
4466 unsigned int num_hubs;
4467
4468 if (state == USB3_LPM_U2)
4469 return 0;
4470
4471 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4472 for (parent = udev->parent, num_hubs = 0; parent->parent;
4473 parent = parent->parent)
4474 num_hubs++;
4475
4476 if (num_hubs < 2)
4477 return 0;
4478
4479 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4480 " below second-tier hub.\n");
4481 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4482 "to decrease power consumption.\n");
4483 return -E2BIG;
4484}
4485
Sarah Sharp3b3db022012-05-09 10:55:03 -07004486static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4487 struct usb_device *udev,
4488 enum usb3_link_state state)
4489{
Sarah Sharpe3567d22012-05-16 13:36:24 -07004490 if (xhci->quirks & XHCI_INTEL_HOST)
4491 return xhci_check_intel_tier_policy(udev, state);
Pratyush Anand9502c462014-07-04 17:01:23 +03004492 else
4493 return 0;
Sarah Sharp3b3db022012-05-09 10:55:03 -07004494}
4495
4496/* Returns the U1 or U2 timeout that should be enabled.
4497 * If the tier check or timeout setting functions return with a non-zero exit
4498 * code, that means the timeout value has been finalized and we shouldn't look
4499 * at any more endpoints.
4500 */
4501static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4502 struct usb_device *udev, enum usb3_link_state state)
4503{
4504 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4505 struct usb_host_config *config;
4506 char *state_name;
4507 int i;
4508 u16 timeout = USB3_LPM_DISABLED;
4509
4510 if (state == USB3_LPM_U1)
4511 state_name = "U1";
4512 else if (state == USB3_LPM_U2)
4513 state_name = "U2";
4514 else {
4515 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4516 state);
4517 return timeout;
4518 }
4519
4520 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4521 return timeout;
4522
4523 /* Gather some information about the currently installed configuration
4524 * and alternate interface settings.
4525 */
4526 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4527 state, &timeout))
4528 return timeout;
4529
4530 config = udev->actconfig;
4531 if (!config)
4532 return timeout;
4533
Xenia Ragiadakou64ba4192013-08-26 23:29:46 +03004534 for (i = 0; i < config->desc.bNumInterfaces; i++) {
Sarah Sharp3b3db022012-05-09 10:55:03 -07004535 struct usb_driver *driver;
4536 struct usb_interface *intf = config->interface[i];
4537
4538 if (!intf)
4539 continue;
4540
4541 /* Check if any currently bound drivers want hub-initiated LPM
4542 * disabled.
4543 */
4544 if (intf->dev.driver) {
4545 driver = to_usb_driver(intf->dev.driver);
4546 if (driver && driver->disable_hub_initiated_lpm) {
4547 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4548 "at request of driver %s\n",
4549 state_name, driver->name);
4550 return xhci_get_timeout_no_hub_lpm(udev, state);
4551 }
4552 }
4553
4554 /* Not sure how this could happen... */
4555 if (!intf->cur_altsetting)
4556 continue;
4557
4558 if (xhci_update_timeout_for_interface(xhci, udev,
4559 intf->cur_altsetting,
4560 state, &timeout))
4561 return timeout;
4562 }
4563 return timeout;
4564}
4565
Sarah Sharp3b3db022012-05-09 10:55:03 -07004566static int calculate_max_exit_latency(struct usb_device *udev,
4567 enum usb3_link_state state_changed,
4568 u16 hub_encoded_timeout)
4569{
4570 unsigned long long u1_mel_us = 0;
4571 unsigned long long u2_mel_us = 0;
4572 unsigned long long mel_us = 0;
4573 bool disabling_u1;
4574 bool disabling_u2;
4575 bool enabling_u1;
4576 bool enabling_u2;
4577
4578 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4579 hub_encoded_timeout == USB3_LPM_DISABLED);
4580 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4581 hub_encoded_timeout == USB3_LPM_DISABLED);
4582
4583 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4584 hub_encoded_timeout != USB3_LPM_DISABLED);
4585 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4586 hub_encoded_timeout != USB3_LPM_DISABLED);
4587
4588 /* If U1 was already enabled and we're not disabling it,
4589 * or we're going to enable U1, account for the U1 max exit latency.
4590 */
4591 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4592 enabling_u1)
4593 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4594 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4595 enabling_u2)
4596 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4597
4598 if (u1_mel_us > u2_mel_us)
4599 mel_us = u1_mel_us;
4600 else
4601 mel_us = u2_mel_us;
4602 /* xHCI host controller max exit latency field is only 16 bits wide. */
4603 if (mel_us > MAX_EXIT) {
4604 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4605 "is too big.\n", mel_us);
4606 return -E2BIG;
4607 }
4608 return mel_us;
4609}
4610
4611/* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4612int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4613 struct usb_device *udev, enum usb3_link_state state)
4614{
4615 struct xhci_hcd *xhci;
4616 u16 hub_encoded_timeout;
4617 int mel;
4618 int ret;
4619
4620 xhci = hcd_to_xhci(hcd);
4621 /* The LPM timeout values are pretty host-controller specific, so don't
4622 * enable hub-initiated timeouts unless the vendor has provided
4623 * information about their timeout algorithm.
4624 */
4625 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4626 !xhci->devs[udev->slot_id])
4627 return USB3_LPM_DISABLED;
4628
4629 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4630 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4631 if (mel < 0) {
4632 /* Max Exit Latency is too big, disable LPM. */
4633 hub_encoded_timeout = USB3_LPM_DISABLED;
4634 mel = 0;
4635 }
4636
4637 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4638 if (ret)
4639 return ret;
4640 return hub_encoded_timeout;
4641}
4642
4643int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4644 struct usb_device *udev, enum usb3_link_state state)
4645{
4646 struct xhci_hcd *xhci;
4647 u16 mel;
Sarah Sharp3b3db022012-05-09 10:55:03 -07004648
4649 xhci = hcd_to_xhci(hcd);
4650 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4651 !xhci->devs[udev->slot_id])
4652 return 0;
4653
4654 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
Saurabh Karajgaonkarf1cda542015-08-04 14:04:09 +00004655 return xhci_change_max_exit_latency(xhci, udev, mel);
Sarah Sharp3b3db022012-05-09 10:55:03 -07004656}
Sarah Sharpb01bcbf2012-05-21 07:54:42 -07004657#else /* CONFIG_PM */
4658
Rafael J. Wysockiceb6c9c2014-11-29 23:47:05 +01004659int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4660 struct usb_device *udev, int enable)
4661{
4662 return 0;
4663}
4664
4665int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4666{
4667 return 0;
4668}
4669
Sarah Sharpb01bcbf2012-05-21 07:54:42 -07004670int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4671 struct usb_device *udev, enum usb3_link_state state)
4672{
4673 return USB3_LPM_DISABLED;
4674}
4675
4676int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4677 struct usb_device *udev, enum usb3_link_state state)
4678{
4679 return 0;
4680}
4681#endif /* CONFIG_PM */
4682
Sarah Sharp3b3db022012-05-09 10:55:03 -07004683/*-------------------------------------------------------------------------*/
4684
Sarah Sharpac1c1b72009-09-04 10:53:20 -07004685/* Once a hub descriptor is fetched for a device, we need to update the xHC's
4686 * internal data structures for the device.
4687 */
4688int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4689 struct usb_tt *tt, gfp_t mem_flags)
4690{
4691 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4692 struct xhci_virt_device *vdev;
4693 struct xhci_command *config_cmd;
4694 struct xhci_input_control_ctx *ctrl_ctx;
4695 struct xhci_slot_ctx *slot_ctx;
4696 unsigned long flags;
4697 unsigned think_time;
4698 int ret;
4699
4700 /* Ignore root hubs */
4701 if (!hdev->parent)
4702 return 0;
4703
4704 vdev = xhci->devs[hdev->slot_id];
4705 if (!vdev) {
4706 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4707 return -EINVAL;
4708 }
Sarah Sharpa1d78c12009-12-09 15:59:03 -08004709 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
Sarah Sharpac1c1b72009-09-04 10:53:20 -07004710 if (!config_cmd) {
4711 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4712 return -ENOMEM;
4713 }
Lin Wang4daf9df2015-01-09 16:06:31 +02004714 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
Sarah Sharp92f8e762013-04-23 17:11:14 -07004715 if (!ctrl_ctx) {
4716 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4717 __func__);
4718 xhci_free_command(xhci, config_cmd);
4719 return -ENOMEM;
4720 }
Sarah Sharpac1c1b72009-09-04 10:53:20 -07004721
4722 spin_lock_irqsave(&xhci->lock, flags);
Sarah Sharp839c8172011-09-02 11:05:47 -07004723 if (hdev->speed == USB_SPEED_HIGH &&
4724 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4725 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4726 xhci_free_command(xhci, config_cmd);
4727 spin_unlock_irqrestore(&xhci->lock, flags);
4728 return -ENOMEM;
4729 }
4730
Sarah Sharpac1c1b72009-09-04 10:53:20 -07004731 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
Matt Evans28ccd292011-03-29 13:40:46 +11004732 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
Sarah Sharpac1c1b72009-09-04 10:53:20 -07004733 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
Matt Evans28ccd292011-03-29 13:40:46 +11004734 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
Chunfeng Yun096b1102015-12-04 15:53:43 +02004735 /*
4736 * refer to section 6.2.2: MTT should be 0 for full speed hub,
4737 * but it may be already set to 1 when setup an xHCI virtual
4738 * device, so clear it anyway.
4739 */
Sarah Sharpac1c1b72009-09-04 10:53:20 -07004740 if (tt->multi)
Matt Evans28ccd292011-03-29 13:40:46 +11004741 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
Chunfeng Yun096b1102015-12-04 15:53:43 +02004742 else if (hdev->speed == USB_SPEED_FULL)
4743 slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT);
4744
Sarah Sharpac1c1b72009-09-04 10:53:20 -07004745 if (xhci->hci_version > 0x95) {
4746 xhci_dbg(xhci, "xHCI version %x needs hub "
4747 "TT think time and number of ports\n",
4748 (unsigned int) xhci->hci_version);
Matt Evans28ccd292011-03-29 13:40:46 +11004749 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
Sarah Sharpac1c1b72009-09-04 10:53:20 -07004750 /* Set TT think time - convert from ns to FS bit times.
4751 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4752 * 2 = 24 FS bit times, 3 = 32 FS bit times.
Andiry Xu700b4172011-05-05 18:14:05 +08004753 *
4754 * xHCI 1.0: this field shall be 0 if the device is not a
4755 * High-spped hub.
Sarah Sharpac1c1b72009-09-04 10:53:20 -07004756 */
4757 think_time = tt->think_time;
4758 if (think_time != 0)
4759 think_time = (think_time / 666) - 1;
Andiry Xu700b4172011-05-05 18:14:05 +08004760 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4761 slot_ctx->tt_info |=
4762 cpu_to_le32(TT_THINK_TIME(think_time));
Sarah Sharpac1c1b72009-09-04 10:53:20 -07004763 } else {
4764 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4765 "TT think time or number of ports\n",
4766 (unsigned int) xhci->hci_version);
4767 }
4768 slot_ctx->dev_state = 0;
4769 spin_unlock_irqrestore(&xhci->lock, flags);
4770
4771 xhci_dbg(xhci, "Set up %s for hub device.\n",
4772 (xhci->hci_version > 0x95) ?
4773 "configure endpoint" : "evaluate context");
4774 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4775 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4776
4777 /* Issue and wait for the configure endpoint or
4778 * evaluate context command.
4779 */
4780 if (xhci->hci_version > 0x95)
4781 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4782 false, false);
4783 else
4784 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4785 true, false);
4786
4787 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4788 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4789
4790 xhci_free_command(xhci, config_cmd);
4791 return ret;
4792}
4793
Sarah Sharp66d4ead2009-04-27 19:52:28 -07004794int xhci_get_frame(struct usb_hcd *hcd)
4795{
4796 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4797 /* EHCI mods by the periodic size. Why? */
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02004798 return readl(&xhci->run_regs->microframe_index) >> 3;
Sarah Sharp66d4ead2009-04-27 19:52:28 -07004799}
4800
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004801int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4802{
4803 struct xhci_hcd *xhci;
4804 struct device *dev = hcd->self.controller;
4805 int retval;
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004806
Sarah Sharp1386ff72014-01-31 11:45:02 -08004807 /* Accept arbitrarily long scatter-gather lists */
4808 hcd->self.sg_tablesize = ~0;
Ming Leifc760512013-08-08 21:48:23 +08004809
Mathias Nymane2ed5112014-03-07 17:06:57 +02004810 /* support to build packet from discontinuous buffers */
4811 hcd->self.no_sg_constraint = 1;
4812
Hans de Goede19181bc2012-07-04 09:18:02 +02004813 /* XHCI controllers don't stop the ep queue on short packets :| */
4814 hcd->self.no_stop_on_short = 1;
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004815
Mathias Nymanb50107b2015-10-01 18:40:38 +03004816 xhci = hcd_to_xhci(hcd);
4817
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004818 if (usb_hcd_is_primary_hcd(hcd)) {
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004819 xhci->main_hcd = hcd;
4820 /* Mark the first roothub as being USB 2.0.
4821 * The xHCI driver will register the USB 3.0 roothub.
4822 */
4823 hcd->speed = HCD_USB2;
4824 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4825 /*
4826 * USB 2.0 roothub under xHCI has an integrated TT,
4827 * (rate matching hub) as opposed to having an OHCI/UHCI
4828 * companion controller.
4829 */
4830 hcd->has_tt = 1;
4831 } else {
Mathias Nymanb50107b2015-10-01 18:40:38 +03004832 if (xhci->sbrn == 0x31) {
4833 xhci_info(xhci, "Host supports USB 3.1 Enhanced SuperSpeed\n");
4834 hcd->speed = HCD_USB31;
Mathias Nyman2c0e06f2016-01-25 15:30:45 +02004835 hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS;
Mathias Nymanb50107b2015-10-01 18:40:38 +03004836 }
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004837 /* xHCI private pointer was set in xhci_pci_probe for the second
4838 * registered roothub.
4839 */
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004840 return 0;
4841 }
4842
Chris Bainbridgea00918d2015-05-19 16:30:51 +03004843 mutex_init(&xhci->mutex);
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004844 xhci->cap_regs = hcd->regs;
4845 xhci->op_regs = hcd->regs +
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02004846 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004847 xhci->run_regs = hcd->regs +
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02004848 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004849 /* Cache read-only capability registers */
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02004850 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4851 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4852 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4853 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004854 xhci->hci_version = HC_VERSION(xhci->hcc_params);
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02004855 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
Lu Baolu04abb6d2015-10-01 18:40:31 +03004856 if (xhci->hci_version > 0x100)
4857 xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2);
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004858 xhci_print_registers(xhci);
4859
Mathias Nyman757de492016-06-01 18:09:10 +03004860 xhci->quirks |= quirks;
Takashi Iwai4e6a1ee2013-12-09 12:42:48 +01004861
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004862 get_quirks(dev, xhci);
4863
George Cherian07f3cb72013-07-01 10:59:12 +05304864 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4865 * success event after a short transfer. This quirk will ignore such
4866 * spurious event.
4867 */
4868 if (xhci->hci_version > 0x96)
4869 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4870
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004871 /* Make sure the HC is halted. */
4872 retval = xhci_halt(xhci);
4873 if (retval)
Roger Quadroscd33a322015-05-29 17:01:46 +03004874 return retval;
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004875
4876 xhci_dbg(xhci, "Resetting HCD\n");
4877 /* Reset the internal HC memory state and registers. */
4878 retval = xhci_reset(xhci);
4879 if (retval)
Roger Quadroscd33a322015-05-29 17:01:46 +03004880 return retval;
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004881 xhci_dbg(xhci, "Reset complete\n");
4882
Yoshihiro Shimoda0a380be2016-04-08 16:25:07 +03004883 /*
4884 * On some xHCI controllers (e.g. R-Car SoCs), the AC64 bit (bit 0)
4885 * of HCCPARAMS1 is set to 1. However, the xHCs don't support 64-bit
4886 * address memory pointers actually. So, this driver clears the AC64
4887 * bit of xhci->hcc_params to call dma_set_coherent_mask(dev,
4888 * DMA_BIT_MASK(32)) in this xhci_gen_setup().
4889 */
4890 if (xhci->quirks & XHCI_NO_64BIT_SUPPORT)
4891 xhci->hcc_params &= ~BIT(0);
4892
Xenia Ragiadakouc10cf112013-08-14 05:55:19 +03004893 /* Set dma_mask and coherent_dma_mask to 64-bits,
4894 * if xHC supports 64-bit addressing */
4895 if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4896 !dma_set_mask(dev, DMA_BIT_MASK(64))) {
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004897 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
Xenia Ragiadakouc10cf112013-08-14 05:55:19 +03004898 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
Duc Dangfda182d2015-10-09 13:30:13 +03004899 } else {
4900 /*
4901 * This is to avoid error in cases where a 32-bit USB
4902 * controller is used on a 64-bit capable system.
4903 */
4904 retval = dma_set_mask(dev, DMA_BIT_MASK(32));
4905 if (retval)
4906 return retval;
4907 xhci_dbg(xhci, "Enabling 32-bit DMA addresses.\n");
4908 dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004909 }
4910
4911 xhci_dbg(xhci, "Calling HCD init\n");
4912 /* Initialize HCD and host controller data structures. */
4913 retval = xhci_init(hcd);
4914 if (retval)
Roger Quadroscd33a322015-05-29 17:01:46 +03004915 return retval;
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004916 xhci_dbg(xhci, "Called HCD init\n");
Hans de Goede99705092015-01-16 17:54:01 +02004917
4918 xhci_info(xhci, "hcc params 0x%08x hci version 0x%x quirks 0x%08x\n",
4919 xhci->hcc_params, xhci->hci_version, xhci->quirks);
4920
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004921 return 0;
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004922}
Andrew Bresticker436e8c72014-10-03 11:35:28 +03004923EXPORT_SYMBOL_GPL(xhci_gen_setup);
Sebastian Andrzej Siewior552e0c42011-09-23 14:20:01 -07004924
Andrew Bresticker1885d9a2014-10-03 11:35:26 +03004925static const struct hc_driver xhci_hc_driver = {
4926 .description = "xhci-hcd",
4927 .product_desc = "xHCI Host Controller",
Yoshihiro Shimoda32479d42015-11-24 13:09:47 +02004928 .hcd_priv_size = sizeof(struct xhci_hcd),
Andrew Bresticker1885d9a2014-10-03 11:35:26 +03004929
4930 /*
4931 * generic hardware linkage
4932 */
4933 .irq = xhci_irq,
4934 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
4935
4936 /*
4937 * basic lifecycle operations
4938 */
4939 .reset = NULL, /* set in xhci_init_driver() */
4940 .start = xhci_run,
4941 .stop = xhci_stop,
4942 .shutdown = xhci_shutdown,
4943
4944 /*
4945 * managing i/o requests and associated device resources
4946 */
4947 .urb_enqueue = xhci_urb_enqueue,
4948 .urb_dequeue = xhci_urb_dequeue,
4949 .alloc_dev = xhci_alloc_dev,
4950 .free_dev = xhci_free_dev,
4951 .alloc_streams = xhci_alloc_streams,
4952 .free_streams = xhci_free_streams,
4953 .add_endpoint = xhci_add_endpoint,
4954 .drop_endpoint = xhci_drop_endpoint,
4955 .endpoint_reset = xhci_endpoint_reset,
4956 .check_bandwidth = xhci_check_bandwidth,
4957 .reset_bandwidth = xhci_reset_bandwidth,
4958 .address_device = xhci_address_device,
4959 .enable_device = xhci_enable_device,
4960 .update_hub_device = xhci_update_hub_device,
4961 .reset_device = xhci_discover_or_reset_device,
4962
4963 /*
4964 * scheduling support
4965 */
4966 .get_frame_number = xhci_get_frame,
4967
4968 /*
4969 * root hub support
4970 */
4971 .hub_control = xhci_hub_control,
4972 .hub_status_data = xhci_hub_status_data,
4973 .bus_suspend = xhci_bus_suspend,
4974 .bus_resume = xhci_bus_resume,
4975
4976 /*
4977 * call back when device connected and addressed
4978 */
4979 .update_device = xhci_update_device,
4980 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
4981 .enable_usb3_lpm_timeout = xhci_enable_usb3_lpm_timeout,
4982 .disable_usb3_lpm_timeout = xhci_disable_usb3_lpm_timeout,
4983 .find_raw_port_number = xhci_find_raw_port_number,
4984};
4985
Roger Quadroscd33a322015-05-29 17:01:46 +03004986void xhci_init_driver(struct hc_driver *drv,
4987 const struct xhci_driver_overrides *over)
Andrew Bresticker1885d9a2014-10-03 11:35:26 +03004988{
Roger Quadroscd33a322015-05-29 17:01:46 +03004989 BUG_ON(!over);
4990
4991 /* Copy the generic table to drv then apply the overrides */
Andrew Bresticker1885d9a2014-10-03 11:35:26 +03004992 *drv = xhci_hc_driver;
Roger Quadroscd33a322015-05-29 17:01:46 +03004993
4994 if (over) {
4995 drv->hcd_priv_size += over->extra_priv_size;
4996 if (over->reset)
4997 drv->reset = over->reset;
4998 if (over->start)
4999 drv->start = over->start;
5000 }
Andrew Bresticker1885d9a2014-10-03 11:35:26 +03005001}
5002EXPORT_SYMBOL_GPL(xhci_init_driver);
5003
Sarah Sharp66d4ead2009-04-27 19:52:28 -07005004MODULE_DESCRIPTION(DRIVER_DESC);
5005MODULE_AUTHOR(DRIVER_AUTHOR);
5006MODULE_LICENSE("GPL");
5007
5008static int __init xhci_hcd_init(void)
5009{
Sarah Sharp98441972009-05-14 11:44:18 -07005010 /*
5011 * Check the compiler generated sizes of structures that must be laid
5012 * out in specific ways for hardware access.
5013 */
5014 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
5015 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
5016 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
5017 /* xhci_device_control has eight fields, and also
5018 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
5019 */
Sarah Sharp98441972009-05-14 11:44:18 -07005020 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
5021 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
5022 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
Lu Baolu04abb6d2015-10-01 18:40:31 +03005023 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 8*32/8);
Sarah Sharp98441972009-05-14 11:44:18 -07005024 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
5025 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
5026 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
Oliver Neukum1eaf35e2015-12-03 15:03:34 +01005027
5028 if (usb_disabled())
5029 return -ENODEV;
5030
Sarah Sharp66d4ead2009-04-27 19:52:28 -07005031 return 0;
5032}
Arthur Demchenkovb04c8462015-05-19 16:30:50 +03005033
5034/*
5035 * If an init function is provided, an exit function must also be provided
5036 * to allow module unload.
5037 */
5038static void __exit xhci_hcd_fini(void) { }
5039
Sarah Sharp66d4ead2009-04-27 19:52:28 -07005040module_init(xhci_hcd_init);
Arthur Demchenkovb04c8462015-05-19 16:30:50 +03005041module_exit(xhci_hcd_fini);