| Rob Herring | 21278ae | 2014-06-10 09:06:10 -0500 | [diff] [blame] | 1 | menuconfig ARCH_SIRF |
| Masahiro Yamada | e324654 | 2015-11-16 12:06:10 +0900 | [diff] [blame] | 2 | bool "CSR SiRF" |
| 3 | depends on ARCH_MULTI_V7 |
| Barry Song | e7eda91 | 2014-01-10 03:15:42 +0000 | [diff] [blame] | 4 | select ARCH_HAS_RESET_CONTROLLER |
| Arnd Bergmann | ef2b1d7 | 2015-11-28 23:56:47 +0100 | [diff] [blame] | 5 | select RESET_CONTROLLER |
| Arnd Bergmann | cf82e0e | 2013-03-19 17:45:37 +0100 | [diff] [blame] | 6 | select ARCH_REQUIRE_GPIOLIB |
| Arnd Bergmann | cf82e0e | 2013-03-19 17:45:37 +0100 | [diff] [blame] | 7 | select GENERIC_IRQ_CHIP |
| Uwe Kleine-König | ce816fa | 2014-04-07 15:39:19 -0700 | [diff] [blame] | 8 | select NO_IOPORT_MAP |
| Guo Zeng | b199947 | 2015-04-14 11:55:55 +0000 | [diff] [blame] | 9 | select REGMAP |
| Arnd Bergmann | cf82e0e | 2013-03-19 17:45:37 +0100 | [diff] [blame] | 10 | select PINCTRL |
| 11 | select PINCTRL_SIRF |
| 12 | help |
| 13 | Support for CSR SiRFprimaII/Marco/Polo platforms |
| 14 | |
| Barry Song | 156a099 | 2012-08-23 13:41:58 +0800 | [diff] [blame] | 15 | if ARCH_SIRF |
| 16 | |
| Zhiwu Song | 4cba058 | 2015-01-04 17:53:37 +0800 | [diff] [blame] | 17 | comment "CSR SiRF atlas6/primaII/Atlas7 Specific Features" |
| Barry Song | d4fe49e | 2013-03-18 15:04:38 +0800 | [diff] [blame] | 18 | |
| 19 | config ARCH_ATLAS6 |
| 20 | bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform" |
| 21 | default y |
| Barry Song | d4fe49e | 2013-03-18 15:04:38 +0800 | [diff] [blame] | 22 | select SIRF_IRQ |
| 23 | help |
| 24 | Support for CSR SiRFSoC ARM Cortex A9 Platform |
| Barry Song | 156a099 | 2012-08-23 13:41:58 +0800 | [diff] [blame] | 25 | |
| Zhiwu Song | 4cba058 | 2015-01-04 17:53:37 +0800 | [diff] [blame] | 26 | config ARCH_ATLAS7 |
| 27 | bool "CSR SiRFSoC ATLAS7 ARM Cortex A7 Platform" |
| 28 | default y |
| 29 | select ARM_GIC |
| 30 | select CPU_V7 |
| Daniel Lezcano | b56d5d2 | 2016-06-03 13:11:39 +0200 | [diff] [blame] | 31 | select ATLAS7_TIMER |
| Zhiwu Song | 4cba058 | 2015-01-04 17:53:37 +0800 | [diff] [blame] | 32 | select HAVE_ARM_SCU if SMP |
| 33 | select HAVE_SMP |
| Zhiwu Song | 4cba058 | 2015-01-04 17:53:37 +0800 | [diff] [blame] | 34 | help |
| 35 | Support for CSR SiRFSoC ARM Cortex A7 Platform |
| 36 | |
| Barry Song | 156a099 | 2012-08-23 13:41:58 +0800 | [diff] [blame] | 37 | config ARCH_PRIMA2 |
| 38 | bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" |
| 39 | default y |
| Barry Song | c1e3c11 | 2012-08-23 13:41:59 +0800 | [diff] [blame] | 40 | select SIRF_IRQ |
| Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 41 | select ZONE_DMA |
| Daniel Lezcano | f3550d4 | 2016-06-03 14:28:38 +0200 | [diff] [blame] | 42 | select PRIMA2_TIMER |
| Barry Song | 156a099 | 2012-08-23 13:41:58 +0800 | [diff] [blame] | 43 | help |
| 44 | Support for CSR SiRFSoC ARM Cortex A9 Platform |
| 45 | |
| Barry Song | c1e3c11 | 2012-08-23 13:41:59 +0800 | [diff] [blame] | 46 | config SIRF_IRQ |
| 47 | bool |
| 48 | |
| Barry Song | 156a099 | 2012-08-23 13:41:58 +0800 | [diff] [blame] | 49 | endif |