blob: a219dc310d5de545527030fe169b88a494c0578a [file] [log] [blame]
Rob Herring21278ae2014-06-10 09:06:10 -05001menuconfig ARCH_SIRF
Arnd Bergmanncf82e0e2013-03-19 17:45:37 +01002 bool "CSR SiRF" if ARCH_MULTI_V7
Barry Songe7eda912014-01-10 03:15:42 +00003 select ARCH_HAS_RESET_CONTROLLER
Arnd Bergmanncf82e0e2013-03-19 17:45:37 +01004 select ARCH_REQUIRE_GPIOLIB
Arnd Bergmanncf82e0e2013-03-19 17:45:37 +01005 select GENERIC_IRQ_CHIP
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -07006 select NO_IOPORT_MAP
Arnd Bergmanncf82e0e2013-03-19 17:45:37 +01007 select PINCTRL
8 select PINCTRL_SIRF
9 help
10 Support for CSR SiRFprimaII/Marco/Polo platforms
11
Barry Song156a0992012-08-23 13:41:58 +080012if ARCH_SIRF
13
Zhiwu Song4cba0582015-01-04 17:53:37 +080014comment "CSR SiRF atlas6/primaII/Atlas7 Specific Features"
Barry Songd4fe49e2013-03-18 15:04:38 +080015
16config ARCH_ATLAS6
17 bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform"
18 default y
Barry Songd4fe49e2013-03-18 15:04:38 +080019 select SIRF_IRQ
20 help
21 Support for CSR SiRFSoC ARM Cortex A9 Platform
Barry Song156a0992012-08-23 13:41:58 +080022
Zhiwu Song4cba0582015-01-04 17:53:37 +080023config ARCH_ATLAS7
24 bool "CSR SiRFSoC ATLAS7 ARM Cortex A7 Platform"
25 default y
26 select ARM_GIC
27 select CPU_V7
28 select HAVE_ARM_SCU if SMP
29 select HAVE_SMP
30 select SMP_ON_UP if SMP
31 help
32 Support for CSR SiRFSoC ARM Cortex A7 Platform
33
Barry Song156a0992012-08-23 13:41:58 +080034config ARCH_PRIMA2
35 bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
36 default y
Barry Songc1e3c112012-08-23 13:41:59 +080037 select SIRF_IRQ
Russell Kingb1b3f492012-10-06 17:12:25 +010038 select ZONE_DMA
Barry Song156a0992012-08-23 13:41:58 +080039 help
40 Support for CSR SiRFSoC ARM Cortex A9 Platform
41
Barry Songc1e3c112012-08-23 13:41:59 +080042config SIRF_IRQ
43 bool
44
Barry Song156a0992012-08-23 13:41:58 +080045endif