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Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05302 * Universal Flash Storage Host controller driver Core
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303 *
4 * This code is based on drivers/scsi/ufs/ufshcd.c
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053011 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053016 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053018 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053024 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030035 *
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053038 */
39
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053040#include <linux/async.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030041#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020042#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020043#include <linux/of.h>
Adrian Hunterad448372018-03-20 15:07:38 +020044#include <linux/bitfield.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053045#include "ufshcd.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020046#include "ufs_quirks.h"
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +053047#include "unipro.h"
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +020048#include "ufs-sysfs.h"
Avri Altmandf032bf2018-10-07 17:30:35 +030049#include "ufs_bsg.h"
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053050
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -080051#define CREATE_TRACE_POINTS
52#include <trace/events/ufs.h>
53
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053054#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
55 UTP_TASK_REQ_COMPL |\
56 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053057/* UIC command timeout, unit: ms */
58#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053059
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053060/* NOP OUT retries waiting for NOP IN response */
61#define NOP_OUT_RETRIES 10
62/* Timeout after 30 msecs if NOP OUT hangs without response */
63#define NOP_OUT_TIMEOUT 30 /* msecs */
64
Dolev Raviv68078d52013-07-30 00:35:58 +053065/* Query request retries */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080066#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +053067/* Query request timeout */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080068#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +053069
Sujit Reddy Thummae2933132014-05-26 10:59:12 +053070/* Task management command timeout */
71#define TM_CMD_TIMEOUT 100 /* msecs */
72
Yaniv Gardi64238fb2016-02-01 15:02:43 +020073/* maximum number of retries for a general UIC command */
74#define UFS_UIC_COMMAND_RETRIES 3
75
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030076/* maximum number of link-startup retries */
77#define DME_LINKSTARTUP_RETRIES 3
78
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +020079/* Maximum retries for Hibern8 enter */
80#define UIC_HIBERN8_ENTER_RETRIES 3
81
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030082/* maximum number of reset retries before giving up */
83#define MAX_HOST_RESET_RETRIES 5
84
Dolev Raviv68078d52013-07-30 00:35:58 +053085/* Expose the flag value from utp_upiu_query.value */
86#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
87
Seungwon Jeon7d568652013-08-31 21:40:20 +053088/* Interrupt aggregation default timeout, unit: 40us */
89#define INT_AGGR_DEF_TO 0x02
90
Stanley Chu49615ba2019-09-16 23:56:50 +080091/* default delay of autosuspend: 2000 ms */
92#define RPM_AUTOSUSPEND_DELAY_MS 2000
93
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030094#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
95 ({ \
96 int _ret; \
97 if (_on) \
98 _ret = ufshcd_enable_vreg(_dev, _vreg); \
99 else \
100 _ret = ufshcd_disable_vreg(_dev, _vreg); \
101 _ret; \
102 })
103
Tomas Winklerba809172018-06-14 11:14:09 +0300104#define ufshcd_hex_dump(prefix_str, buf, len) do { \
105 size_t __len = (len); \
106 print_hex_dump(KERN_ERR, prefix_str, \
107 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
108 16, 4, buf, __len, false); \
109} while (0)
110
111int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
112 const char *prefix)
113{
Marc Gonzalezd6724752019-01-22 18:29:22 +0100114 u32 *regs;
115 size_t pos;
116
117 if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
118 return -EINVAL;
Tomas Winklerba809172018-06-14 11:14:09 +0300119
Can Guocddaeba2019-11-14 22:09:27 -0800120 regs = kzalloc(len, GFP_ATOMIC);
Tomas Winklerba809172018-06-14 11:14:09 +0300121 if (!regs)
122 return -ENOMEM;
123
Marc Gonzalezd6724752019-01-22 18:29:22 +0100124 for (pos = 0; pos < len; pos += 4)
125 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
126
Tomas Winklerba809172018-06-14 11:14:09 +0300127 ufshcd_hex_dump(prefix, regs, len);
128 kfree(regs);
129
130 return 0;
131}
132EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800133
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530134enum {
135 UFSHCD_MAX_CHANNEL = 0,
136 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530137 UFSHCD_CMD_PER_LUN = 32,
138 UFSHCD_CAN_QUEUE = 32,
139};
140
141/* UFSHCD states */
142enum {
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530143 UFSHCD_STATE_RESET,
144 UFSHCD_STATE_ERROR,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530145 UFSHCD_STATE_OPERATIONAL,
Zang Leigang141f8162016-11-16 11:29:37 +0800146 UFSHCD_STATE_EH_SCHEDULED,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530147};
148
149/* UFSHCD error handling flags */
150enum {
151 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530152};
153
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530154/* UFSHCD UIC layer error flags */
155enum {
156 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200157 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
158 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
159 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
160 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
161 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530162};
163
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530164#define ufshcd_set_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300165 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530166#define ufshcd_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300167 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530168#define ufshcd_clear_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300169 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530170
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300171#define ufshcd_set_ufs_dev_active(h) \
172 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
173#define ufshcd_set_ufs_dev_sleep(h) \
174 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
175#define ufshcd_set_ufs_dev_poweroff(h) \
176 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
177#define ufshcd_is_ufs_dev_active(h) \
178 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
179#define ufshcd_is_ufs_dev_sleep(h) \
180 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
181#define ufshcd_is_ufs_dev_poweroff(h) \
182 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
183
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +0200184struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300185 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
186 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
187 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
188 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
189 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
190 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
191};
192
193static inline enum ufs_dev_pwr_mode
194ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
195{
196 return ufs_pm_lvl_states[lvl].dev_state;
197}
198
199static inline enum uic_link_state
200ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
201{
202 return ufs_pm_lvl_states[lvl].link_state;
203}
204
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -0800205static inline enum ufs_pm_level
206ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
207 enum uic_link_state link_state)
208{
209 enum ufs_pm_level lvl;
210
211 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
212 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
213 (ufs_pm_lvl_states[lvl].link_state == link_state))
214 return lvl;
215 }
216
217 /* if no match found, return the level 0 */
218 return UFS_PM_LVL_0;
219}
220
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800221static struct ufs_dev_fix ufs_fixups[] = {
222 /* UFS cards deviations table */
223 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
224 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800225 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
226 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
227 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800228 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
229 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
230 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
231 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
232 UFS_DEVICE_QUIRK_PA_TACTIVATE),
233 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
234 UFS_DEVICE_QUIRK_PA_TACTIVATE),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800235 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
236 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
Wei Li8e4829c2018-11-08 09:08:29 -0800237 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
238 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800239
240 END_FIX
241};
242
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -0800243static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530244static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530245static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Dolev Ravive7d38252016-12-22 18:40:07 -0800246static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530247static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300248static void ufshcd_hba_exit(struct ufs_hba *hba);
249static int ufshcd_probe_hba(struct ufs_hba *hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300250static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
251 bool skip_ref_clk);
252static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
253static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
254static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300255static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300256static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800257static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
258static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800259static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800260static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300261static irqreturn_t ufshcd_intr(int irq, void *__hba);
Yaniv Gardi874237f2015-05-17 18:55:03 +0300262static int ufshcd_change_power_mode(struct ufs_hba *hba,
263 struct ufs_pa_layer_attr *pwr_mode);
Yaniv Gardi14497322016-02-01 15:02:39 +0200264static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
265{
266 return tag >= 0 && tag < hba->nutrs;
267}
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300268
269static inline int ufshcd_enable_irq(struct ufs_hba *hba)
270{
271 int ret = 0;
272
273 if (!hba->is_irq_enabled) {
274 ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
275 hba);
276 if (ret)
277 dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
278 __func__, ret);
279 hba->is_irq_enabled = true;
280 }
281
282 return ret;
283}
284
285static inline void ufshcd_disable_irq(struct ufs_hba *hba)
286{
287 if (hba->is_irq_enabled) {
288 free_irq(hba->irq, hba);
289 hba->is_irq_enabled = false;
290 }
291}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530292
Subhash Jadavani38135532018-05-03 16:37:18 +0530293static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
294{
295 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
296 scsi_unblock_requests(hba->host);
297}
298
299static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
300{
301 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
302 scsi_block_requests(hba->host);
303}
304
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300305static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
306 const char *str)
307{
308 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
309
310 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
311}
312
313static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
314 const char *str)
315{
316 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
317
318 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
319}
320
321static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
322 const char *str)
323{
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300324 int off = (int)tag - hba->nutrs;
Christoph Hellwig391e3882018-10-07 17:30:32 +0300325 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300326
Christoph Hellwig391e3882018-10-07 17:30:32 +0300327 trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
328 &descp->input_param1);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300329}
330
Lee Susman1a07f2d2016-12-22 18:42:03 -0800331static void ufshcd_add_command_trace(struct ufs_hba *hba,
332 unsigned int tag, const char *str)
333{
334 sector_t lba = -1;
335 u8 opcode = 0;
336 u32 intr, doorbell;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300337 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
Lee Susman1a07f2d2016-12-22 18:42:03 -0800338 int transfer_len = -1;
339
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300340 if (!trace_ufshcd_command_enabled()) {
341 /* trace UPIU W/O tracing command */
342 if (lrbp->cmd)
343 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800344 return;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300345 }
Lee Susman1a07f2d2016-12-22 18:42:03 -0800346
347 if (lrbp->cmd) { /* data phase exists */
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300348 /* trace UPIU also */
349 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800350 opcode = (u8)(*lrbp->cmd->cmnd);
351 if ((opcode == READ_10) || (opcode == WRITE_10)) {
352 /*
353 * Currently we only fully trace read(10) and write(10)
354 * commands
355 */
356 if (lrbp->cmd->request && lrbp->cmd->request->bio)
357 lba =
358 lrbp->cmd->request->bio->bi_iter.bi_sector;
359 transfer_len = be32_to_cpu(
360 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
361 }
362 }
363
364 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
365 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
366 trace_ufshcd_command(dev_name(hba->dev), str, tag,
367 doorbell, transfer_len, intr, lba, opcode);
368}
369
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800370static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
371{
372 struct ufs_clk_info *clki;
373 struct list_head *head = &hba->clk_list_head;
374
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300375 if (list_empty(head))
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800376 return;
377
378 list_for_each_entry(clki, head, list) {
379 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
380 clki->max_freq)
381 dev_err(hba->dev, "clk: %s, rate: %u\n",
382 clki->name, clki->curr_freq);
383 }
384}
385
Stanley Chu48d5b972019-07-10 21:38:18 +0800386static void ufshcd_print_err_hist(struct ufs_hba *hba,
387 struct ufs_err_reg_hist *err_hist,
388 char *err_name)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800389{
390 int i;
Stanley Chu27752642019-01-28 22:04:26 +0800391 bool found = false;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800392
Stanley Chu48d5b972019-07-10 21:38:18 +0800393 for (i = 0; i < UFS_ERR_REG_HIST_LENGTH; i++) {
394 int p = (i + err_hist->pos) % UFS_ERR_REG_HIST_LENGTH;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800395
396 if (err_hist->reg[p] == 0)
397 continue;
Stanley Chuc5397f12019-07-10 21:38:20 +0800398 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800399 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
Stanley Chu27752642019-01-28 22:04:26 +0800400 found = true;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800401 }
Stanley Chu27752642019-01-28 22:04:26 +0800402
403 if (!found)
Stanley Chu48d5b972019-07-10 21:38:18 +0800404 dev_err(hba->dev, "No record of %s errors\n", err_name);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800405}
406
Dolev Raviv66cc8202016-12-22 18:39:42 -0800407static void ufshcd_print_host_regs(struct ufs_hba *hba)
408{
Tomas Winklerba809172018-06-14 11:14:09 +0300409 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
Dolev Raviv66cc8202016-12-22 18:39:42 -0800410 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
411 hba->ufs_version, hba->capabilities);
412 dev_err(hba->dev,
413 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
414 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800415 dev_err(hba->dev,
416 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
417 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
418 hba->ufs_stats.hibern8_exit_cnt);
419
Stanley Chu48d5b972019-07-10 21:38:18 +0800420 ufshcd_print_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
421 ufshcd_print_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
422 ufshcd_print_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
423 ufshcd_print_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
424 ufshcd_print_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
Stanley Chud3c615b2019-07-10 21:38:19 +0800425 ufshcd_print_err_hist(hba, &hba->ufs_stats.auto_hibern8_err,
426 "auto_hibern8_err");
Stanley Chu8808b4e2019-07-10 21:38:21 +0800427 ufshcd_print_err_hist(hba, &hba->ufs_stats.fatal_err, "fatal_err");
428 ufshcd_print_err_hist(hba, &hba->ufs_stats.link_startup_err,
429 "link_startup_fail");
430 ufshcd_print_err_hist(hba, &hba->ufs_stats.resume_err, "resume_fail");
431 ufshcd_print_err_hist(hba, &hba->ufs_stats.suspend_err,
432 "suspend_fail");
433 ufshcd_print_err_hist(hba, &hba->ufs_stats.dev_reset, "dev_reset");
434 ufshcd_print_err_hist(hba, &hba->ufs_stats.host_reset, "host_reset");
435 ufshcd_print_err_hist(hba, &hba->ufs_stats.task_abort, "task_abort");
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800436
437 ufshcd_print_clk_freqs(hba);
438
439 if (hba->vops && hba->vops->dbg_register_dump)
440 hba->vops->dbg_register_dump(hba);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800441}
442
443static
444void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
445{
446 struct ufshcd_lrb *lrbp;
Gilad Broner7fabb772017-02-03 16:56:50 -0800447 int prdt_length;
Dolev Raviv66cc8202016-12-22 18:39:42 -0800448 int tag;
449
450 for_each_set_bit(tag, &bitmap, hba->nutrs) {
451 lrbp = &hba->lrb[tag];
452
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800453 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
454 tag, ktime_to_us(lrbp->issue_time_stamp));
Zang Leigang09017182017-09-27 10:06:06 +0800455 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
456 tag, ktime_to_us(lrbp->compl_time_stamp));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800457 dev_err(hba->dev,
458 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
459 tag, (u64)lrbp->utrd_dma_addr);
460
Dolev Raviv66cc8202016-12-22 18:39:42 -0800461 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
462 sizeof(struct utp_transfer_req_desc));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800463 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
464 (u64)lrbp->ucd_req_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800465 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
466 sizeof(struct utp_upiu_req));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800467 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
468 (u64)lrbp->ucd_rsp_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800469 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
470 sizeof(struct utp_upiu_rsp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800471
Gilad Broner7fabb772017-02-03 16:56:50 -0800472 prdt_length = le16_to_cpu(
473 lrbp->utr_descriptor_ptr->prd_table_length);
474 dev_err(hba->dev,
475 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
476 tag, prdt_length,
477 (u64)lrbp->ucd_prdt_dma_addr);
478
479 if (pr_prdt)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800480 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
Gilad Broner7fabb772017-02-03 16:56:50 -0800481 sizeof(struct ufshcd_sg_entry) * prdt_length);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800482 }
483}
484
485static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
486{
Dolev Raviv66cc8202016-12-22 18:39:42 -0800487 int tag;
488
489 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
Christoph Hellwig391e3882018-10-07 17:30:32 +0300490 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
491
Dolev Raviv66cc8202016-12-22 18:39:42 -0800492 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
Christoph Hellwig391e3882018-10-07 17:30:32 +0300493 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800494 }
495}
496
Gilad Broner6ba65582017-02-03 16:57:28 -0800497static void ufshcd_print_host_state(struct ufs_hba *hba)
498{
499 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
500 dev_err(hba->dev, "lrb in use=0x%lx, outstanding reqs=0x%lx tasks=0x%lx\n",
Zang Leigange002e652017-08-24 10:57:15 +0800501 hba->lrb_in_use, hba->outstanding_reqs, hba->outstanding_tasks);
Gilad Broner6ba65582017-02-03 16:57:28 -0800502 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
503 hba->saved_err, hba->saved_uic_err);
504 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
505 hba->curr_dev_pwr_mode, hba->uic_link_state);
506 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
507 hba->pm_op_in_progress, hba->is_sys_suspended);
508 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
509 hba->auto_bkops_enabled, hba->host->host_self_blocked);
510 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
511 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
512 hba->eh_flags, hba->req_abort_count);
513 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
514 hba->capabilities, hba->caps);
515 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
516 hba->dev_quirks);
517}
518
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800519/**
520 * ufshcd_print_pwr_info - print power params as saved in hba
521 * power info
522 * @hba: per-adapter instance
523 */
524static void ufshcd_print_pwr_info(struct ufs_hba *hba)
525{
526 static const char * const names[] = {
527 "INVALID MODE",
528 "FAST MODE",
529 "SLOW_MODE",
530 "INVALID MODE",
531 "FASTAUTO_MODE",
532 "SLOWAUTO_MODE",
533 "INVALID MODE",
534 };
535
536 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
537 __func__,
538 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
539 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
540 names[hba->pwr_info.pwr_rx],
541 names[hba->pwr_info.pwr_tx],
542 hba->pwr_info.hs_rate);
543}
544
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530545/*
546 * ufshcd_wait_for_register - wait for register value to change
547 * @hba - per-adapter interface
548 * @reg - mmio register offset
549 * @mask - mask to apply to read register value
550 * @val - wait condition
551 * @interval_us - polling interval in microsecs
552 * @timeout_ms - timeout in millisecs
Yaniv Gardi596585a2016-03-10 17:37:08 +0200553 * @can_sleep - perform sleep or just spin
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530554 *
555 * Returns -ETIMEDOUT on error, zero on success
556 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200557int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
558 u32 val, unsigned long interval_us,
559 unsigned long timeout_ms, bool can_sleep)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530560{
561 int err = 0;
562 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
563
564 /* ignore bits that we don't intend to wait on */
565 val = val & mask;
566
567 while ((ufshcd_readl(hba, reg) & mask) != val) {
Yaniv Gardi596585a2016-03-10 17:37:08 +0200568 if (can_sleep)
569 usleep_range(interval_us, interval_us + 50);
570 else
571 udelay(interval_us);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530572 if (time_after(jiffies, timeout)) {
573 if ((ufshcd_readl(hba, reg) & mask) != val)
574 err = -ETIMEDOUT;
575 break;
576 }
577 }
578
579 return err;
580}
581
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530582/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530583 * ufshcd_get_intr_mask - Get the interrupt bit mask
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800584 * @hba: Pointer to adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530585 *
586 * Returns interrupt bit mask per version
587 */
588static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
589{
Yaniv Gardic01848c2016-12-05 19:25:02 -0800590 u32 intr_mask = 0;
591
592 switch (hba->ufs_version) {
593 case UFSHCI_VERSION_10:
594 intr_mask = INTERRUPT_MASK_ALL_VER_10;
595 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800596 case UFSHCI_VERSION_11:
597 case UFSHCI_VERSION_20:
598 intr_mask = INTERRUPT_MASK_ALL_VER_11;
599 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800600 case UFSHCI_VERSION_21:
601 default:
602 intr_mask = INTERRUPT_MASK_ALL_VER_21;
Tomohiro Kusumi031d1e02017-03-23 12:49:04 +0200603 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800604 }
605
606 return intr_mask;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530607}
608
609/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530610 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800611 * @hba: Pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530612 *
613 * Returns UFSHCI version supported by the controller
614 */
615static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
616{
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200617 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
618 return ufshcd_vops_get_ufs_hci_version(hba);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300619
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530620 return ufshcd_readl(hba, REG_UFS_VERSION);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530621}
622
623/**
624 * ufshcd_is_device_present - Check if any device connected to
625 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300626 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530627 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300628 * Returns true if device present, false if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530629 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300630static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530631{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300632 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300633 DEVICE_PRESENT) ? true : false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530634}
635
636/**
637 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800638 * @lrbp: pointer to local command reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530639 *
640 * This function is used to get the OCS field from UTRD
641 * Returns the OCS field in the UTRD
642 */
643static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
644{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530645 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530646}
647
648/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530649 * ufshcd_get_tm_free_slot - get a free slot for task management request
650 * @hba: per adapter instance
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530651 * @free_slot: pointer to variable with available slot value
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530652 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530653 * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
654 * Returns 0 if free slot is not available, else return 1 with tag value
655 * in @free_slot.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530656 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530657static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530658{
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530659 int tag;
660 bool ret = false;
661
662 if (!free_slot)
663 goto out;
664
665 do {
666 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
667 if (tag >= hba->nutmrs)
668 goto out;
669 } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
670
671 *free_slot = tag;
672 ret = true;
673out:
674 return ret;
675}
676
677static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
678{
679 clear_bit_unlock(slot, &hba->tm_slots_in_use);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530680}
681
682/**
683 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
684 * @hba: per adapter instance
685 * @pos: position of the bit to be cleared
686 */
687static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
688{
Alim Akhtar1399c5b2018-05-06 15:44:15 +0530689 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
690 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
691 else
692 ufshcd_writel(hba, ~(1 << pos),
693 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
694}
695
696/**
697 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
698 * @hba: per adapter instance
699 * @pos: position of the bit to be cleared
700 */
701static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
702{
703 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
704 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
705 else
706 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530707}
708
709/**
Yaniv Gardia48353f2016-02-01 15:02:40 +0200710 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
711 * @hba: per adapter instance
712 * @tag: position of the bit to be cleared
713 */
714static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
715{
716 __clear_bit(tag, &hba->outstanding_reqs);
717}
718
719/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530720 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
721 * @reg: Register value of host controller status
722 *
723 * Returns integer, 0 on Success and positive value if failed
724 */
725static inline int ufshcd_get_lists_status(u32 reg)
726{
Tomohiro Kusumi6cf16112017-04-26 20:28:58 +0300727 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530728}
729
730/**
731 * ufshcd_get_uic_cmd_result - Get the UIC command result
732 * @hba: Pointer to adapter instance
733 *
734 * This function gets the result of UIC command completion
735 * Returns 0 on success, non zero value on error
736 */
737static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
738{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530739 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530740 MASK_UIC_COMMAND_RESULT;
741}
742
743/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530744 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
745 * @hba: Pointer to adapter instance
746 *
747 * This function gets UIC command argument3
748 * Returns 0 on success, non zero value on error
749 */
750static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
751{
752 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
753}
754
755/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530756 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530757 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530758 */
759static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530760ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530761{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530762 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530763}
764
765/**
766 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
767 * @ucd_rsp_ptr: pointer to response UPIU
768 *
769 * This function gets the response status and scsi_status from response UPIU
770 * Returns the response result code.
771 */
772static inline int
773ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
774{
775 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
776}
777
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530778/*
779 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
780 * from response UPIU
781 * @ucd_rsp_ptr: pointer to response UPIU
782 *
783 * Return the data segment length.
784 */
785static inline unsigned int
786ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
787{
788 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
789 MASK_RSP_UPIU_DATA_SEG_LEN;
790}
791
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530792/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530793 * ufshcd_is_exception_event - Check if the device raised an exception event
794 * @ucd_rsp_ptr: pointer to response UPIU
795 *
796 * The function checks if the device raised an exception event indicated in
797 * the Device Information field of response UPIU.
798 *
799 * Returns true if exception is raised, false otherwise.
800 */
801static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
802{
803 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
804 MASK_RSP_EXCEPTION_EVENT ? true : false;
805}
806
807/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530808 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530809 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530810 */
811static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530812ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530813{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530814 ufshcd_writel(hba, INT_AGGR_ENABLE |
815 INT_AGGR_COUNTER_AND_TIMER_RESET,
816 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
817}
818
819/**
820 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
821 * @hba: per adapter instance
822 * @cnt: Interrupt aggregation counter threshold
823 * @tmout: Interrupt aggregation timeout value
824 */
825static inline void
826ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
827{
828 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
829 INT_AGGR_COUNTER_THLD_VAL(cnt) |
830 INT_AGGR_TIMEOUT_VAL(tmout),
831 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530832}
833
834/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300835 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
836 * @hba: per adapter instance
837 */
838static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
839{
840 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
841}
842
843/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530844 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
845 * When run-stop registers are set to 1, it indicates the
846 * host controller that it can process the requests
847 * @hba: per adapter instance
848 */
849static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
850{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530851 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
852 REG_UTP_TASK_REQ_LIST_RUN_STOP);
853 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
854 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530855}
856
857/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530858 * ufshcd_hba_start - Start controller initialization sequence
859 * @hba: per adapter instance
860 */
861static inline void ufshcd_hba_start(struct ufs_hba *hba)
862{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530863 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530864}
865
866/**
867 * ufshcd_is_hba_active - Get controller state
868 * @hba: per adapter instance
869 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300870 * Returns false if controller is active, true otherwise
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530871 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300872static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530873{
Tomohiro Kusumi4a8eec22017-03-28 16:49:25 +0300874 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
875 ? false : true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530876}
877
Yaniv Gardi37113102016-03-10 17:37:16 +0200878u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
879{
880 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
881 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
882 (hba->ufs_version == UFSHCI_VERSION_11))
883 return UFS_UNIPRO_VER_1_41;
884 else
885 return UFS_UNIPRO_VER_1_6;
886}
887EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
888
889static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
890{
891 /*
892 * If both host and device support UniPro ver1.6 or later, PA layer
893 * parameters tuning happens during link startup itself.
894 *
895 * We can manually tune PA layer parameters if either host or device
896 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
897 * logic simple, we will only do manual tuning if local unipro version
898 * doesn't support ver1.6 or later.
899 */
900 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
901 return true;
902 else
903 return false;
904}
905
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800906static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
907{
908 int ret = 0;
909 struct ufs_clk_info *clki;
910 struct list_head *head = &hba->clk_list_head;
911 ktime_t start = ktime_get();
912 bool clk_state_changed = false;
913
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300914 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800915 goto out;
916
917 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
918 if (ret)
919 return ret;
920
921 list_for_each_entry(clki, head, list) {
922 if (!IS_ERR_OR_NULL(clki->clk)) {
923 if (scale_up && clki->max_freq) {
924 if (clki->curr_freq == clki->max_freq)
925 continue;
926
927 clk_state_changed = true;
928 ret = clk_set_rate(clki->clk, clki->max_freq);
929 if (ret) {
930 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
931 __func__, clki->name,
932 clki->max_freq, ret);
933 break;
934 }
935 trace_ufshcd_clk_scaling(dev_name(hba->dev),
936 "scaled up", clki->name,
937 clki->curr_freq,
938 clki->max_freq);
939
940 clki->curr_freq = clki->max_freq;
941
942 } else if (!scale_up && clki->min_freq) {
943 if (clki->curr_freq == clki->min_freq)
944 continue;
945
946 clk_state_changed = true;
947 ret = clk_set_rate(clki->clk, clki->min_freq);
948 if (ret) {
949 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
950 __func__, clki->name,
951 clki->min_freq, ret);
952 break;
953 }
954 trace_ufshcd_clk_scaling(dev_name(hba->dev),
955 "scaled down", clki->name,
956 clki->curr_freq,
957 clki->min_freq);
958 clki->curr_freq = clki->min_freq;
959 }
960 }
961 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
962 clki->name, clk_get_rate(clki->clk));
963 }
964
965 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
966
967out:
968 if (clk_state_changed)
969 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
970 (scale_up ? "up" : "down"),
971 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
972 return ret;
973}
974
975/**
976 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
977 * @hba: per adapter instance
978 * @scale_up: True if scaling up and false if scaling down
979 *
980 * Returns true if scaling is required, false otherwise.
981 */
982static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
983 bool scale_up)
984{
985 struct ufs_clk_info *clki;
986 struct list_head *head = &hba->clk_list_head;
987
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300988 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800989 return false;
990
991 list_for_each_entry(clki, head, list) {
992 if (!IS_ERR_OR_NULL(clki->clk)) {
993 if (scale_up && clki->max_freq) {
994 if (clki->curr_freq == clki->max_freq)
995 continue;
996 return true;
997 } else if (!scale_up && clki->min_freq) {
998 if (clki->curr_freq == clki->min_freq)
999 continue;
1000 return true;
1001 }
1002 }
1003 }
1004
1005 return false;
1006}
1007
1008static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
1009 u64 wait_timeout_us)
1010{
1011 unsigned long flags;
1012 int ret = 0;
1013 u32 tm_doorbell;
1014 u32 tr_doorbell;
1015 bool timeout = false, do_last_check = false;
1016 ktime_t start;
1017
1018 ufshcd_hold(hba, false);
1019 spin_lock_irqsave(hba->host->host_lock, flags);
1020 /*
1021 * Wait for all the outstanding tasks/transfer requests.
1022 * Verify by checking the doorbell registers are clear.
1023 */
1024 start = ktime_get();
1025 do {
1026 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1027 ret = -EBUSY;
1028 goto out;
1029 }
1030
1031 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1032 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1033 if (!tm_doorbell && !tr_doorbell) {
1034 timeout = false;
1035 break;
1036 } else if (do_last_check) {
1037 break;
1038 }
1039
1040 spin_unlock_irqrestore(hba->host->host_lock, flags);
1041 schedule();
1042 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1043 wait_timeout_us) {
1044 timeout = true;
1045 /*
1046 * We might have scheduled out for long time so make
1047 * sure to check if doorbells are cleared by this time
1048 * or not.
1049 */
1050 do_last_check = true;
1051 }
1052 spin_lock_irqsave(hba->host->host_lock, flags);
1053 } while (tm_doorbell || tr_doorbell);
1054
1055 if (timeout) {
1056 dev_err(hba->dev,
1057 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1058 __func__, tm_doorbell, tr_doorbell);
1059 ret = -EBUSY;
1060 }
1061out:
1062 spin_unlock_irqrestore(hba->host->host_lock, flags);
1063 ufshcd_release(hba);
1064 return ret;
1065}
1066
1067/**
1068 * ufshcd_scale_gear - scale up/down UFS gear
1069 * @hba: per adapter instance
1070 * @scale_up: True for scaling up gear and false for scaling down
1071 *
1072 * Returns 0 for success,
1073 * Returns -EBUSY if scaling can't happen at this time
1074 * Returns non-zero for any other errors
1075 */
1076static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1077{
1078 #define UFS_MIN_GEAR_TO_SCALE_DOWN UFS_HS_G1
1079 int ret = 0;
1080 struct ufs_pa_layer_attr new_pwr_info;
1081
1082 if (scale_up) {
1083 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1084 sizeof(struct ufs_pa_layer_attr));
1085 } else {
1086 memcpy(&new_pwr_info, &hba->pwr_info,
1087 sizeof(struct ufs_pa_layer_attr));
1088
1089 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1090 || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1091 /* save the current power mode */
1092 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1093 &hba->pwr_info,
1094 sizeof(struct ufs_pa_layer_attr));
1095
1096 /* scale down gear */
1097 new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1098 new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1099 }
1100 }
1101
1102 /* check if the power mode needs to be changed or not? */
1103 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1104
1105 if (ret)
1106 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1107 __func__, ret,
1108 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1109 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1110
1111 return ret;
1112}
1113
1114static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1115{
1116 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1117 int ret = 0;
1118 /*
1119 * make sure that there are no outstanding requests when
1120 * clock scaling is in progress
1121 */
Subhash Jadavani38135532018-05-03 16:37:18 +05301122 ufshcd_scsi_block_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001123 down_write(&hba->clk_scaling_lock);
1124 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1125 ret = -EBUSY;
1126 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301127 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001128 }
1129
1130 return ret;
1131}
1132
1133static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1134{
1135 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301136 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001137}
1138
1139/**
1140 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1141 * @hba: per adapter instance
1142 * @scale_up: True for scaling up and false for scalin down
1143 *
1144 * Returns 0 for success,
1145 * Returns -EBUSY if scaling can't happen at this time
1146 * Returns non-zero for any other errors
1147 */
1148static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1149{
1150 int ret = 0;
1151
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001152 /* let's not get into low power until clock scaling is completed */
1153 ufshcd_hold(hba, false);
1154
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001155 ret = ufshcd_clock_scaling_prepare(hba);
1156 if (ret)
1157 return ret;
1158
1159 /* scale down the gear before scaling down clocks */
1160 if (!scale_up) {
1161 ret = ufshcd_scale_gear(hba, false);
1162 if (ret)
1163 goto out;
1164 }
1165
1166 ret = ufshcd_scale_clks(hba, scale_up);
1167 if (ret) {
1168 if (!scale_up)
1169 ufshcd_scale_gear(hba, true);
1170 goto out;
1171 }
1172
1173 /* scale up the gear after scaling up clocks */
1174 if (scale_up) {
1175 ret = ufshcd_scale_gear(hba, true);
1176 if (ret) {
1177 ufshcd_scale_clks(hba, false);
1178 goto out;
1179 }
1180 }
1181
1182 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1183
1184out:
1185 ufshcd_clock_scaling_unprepare(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001186 ufshcd_release(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001187 return ret;
1188}
1189
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001190static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1191{
1192 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1193 clk_scaling.suspend_work);
1194 unsigned long irq_flags;
1195
1196 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1197 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1198 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1199 return;
1200 }
1201 hba->clk_scaling.is_suspended = true;
1202 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1203
1204 __ufshcd_suspend_clkscaling(hba);
1205}
1206
1207static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1208{
1209 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1210 clk_scaling.resume_work);
1211 unsigned long irq_flags;
1212
1213 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1214 if (!hba->clk_scaling.is_suspended) {
1215 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1216 return;
1217 }
1218 hba->clk_scaling.is_suspended = false;
1219 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1220
1221 devfreq_resume_device(hba->devfreq);
1222}
1223
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001224static int ufshcd_devfreq_target(struct device *dev,
1225 unsigned long *freq, u32 flags)
1226{
1227 int ret = 0;
1228 struct ufs_hba *hba = dev_get_drvdata(dev);
1229 ktime_t start;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001230 bool scale_up, sched_clk_scaling_suspend_work = false;
Bjorn Andersson092b4552018-05-17 23:26:37 -07001231 struct list_head *clk_list = &hba->clk_list_head;
1232 struct ufs_clk_info *clki;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001233 unsigned long irq_flags;
1234
1235 if (!ufshcd_is_clkscaling_supported(hba))
1236 return -EINVAL;
1237
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001238 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1239 if (ufshcd_eh_in_progress(hba)) {
1240 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1241 return 0;
1242 }
1243
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001244 if (!hba->clk_scaling.active_reqs)
1245 sched_clk_scaling_suspend_work = true;
1246
Bjorn Andersson092b4552018-05-17 23:26:37 -07001247 if (list_empty(clk_list)) {
1248 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1249 goto out;
1250 }
1251
1252 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1253 scale_up = (*freq == clki->max_freq) ? true : false;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001254 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1255 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1256 ret = 0;
1257 goto out; /* no state change required */
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001258 }
1259 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1260
1261 start = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001262 ret = ufshcd_devfreq_scale(hba, scale_up);
1263
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001264 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1265 (scale_up ? "up" : "down"),
1266 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1267
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001268out:
1269 if (sched_clk_scaling_suspend_work)
1270 queue_work(hba->clk_scaling.workq,
1271 &hba->clk_scaling.suspend_work);
1272
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001273 return ret;
1274}
1275
1276
1277static int ufshcd_devfreq_get_dev_status(struct device *dev,
1278 struct devfreq_dev_status *stat)
1279{
1280 struct ufs_hba *hba = dev_get_drvdata(dev);
1281 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1282 unsigned long flags;
1283
1284 if (!ufshcd_is_clkscaling_supported(hba))
1285 return -EINVAL;
1286
1287 memset(stat, 0, sizeof(*stat));
1288
1289 spin_lock_irqsave(hba->host->host_lock, flags);
1290 if (!scaling->window_start_t)
1291 goto start_window;
1292
1293 if (scaling->is_busy_started)
1294 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1295 scaling->busy_start_t));
1296
1297 stat->total_time = jiffies_to_usecs((long)jiffies -
1298 (long)scaling->window_start_t);
1299 stat->busy_time = scaling->tot_busy_t;
1300start_window:
1301 scaling->window_start_t = jiffies;
1302 scaling->tot_busy_t = 0;
1303
1304 if (hba->outstanding_reqs) {
1305 scaling->busy_start_t = ktime_get();
1306 scaling->is_busy_started = true;
1307 } else {
1308 scaling->busy_start_t = 0;
1309 scaling->is_busy_started = false;
1310 }
1311 spin_unlock_irqrestore(hba->host->host_lock, flags);
1312 return 0;
1313}
1314
1315static struct devfreq_dev_profile ufs_devfreq_profile = {
1316 .polling_ms = 100,
1317 .target = ufshcd_devfreq_target,
1318 .get_dev_status = ufshcd_devfreq_get_dev_status,
1319};
1320
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001321static int ufshcd_devfreq_init(struct ufs_hba *hba)
1322{
Bjorn Andersson092b4552018-05-17 23:26:37 -07001323 struct list_head *clk_list = &hba->clk_list_head;
1324 struct ufs_clk_info *clki;
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001325 struct devfreq *devfreq;
1326 int ret;
1327
Bjorn Andersson092b4552018-05-17 23:26:37 -07001328 /* Skip devfreq if we don't have any clocks in the list */
1329 if (list_empty(clk_list))
1330 return 0;
1331
1332 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1333 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1334 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1335
1336 devfreq = devfreq_add_device(hba->dev,
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001337 &ufs_devfreq_profile,
1338 DEVFREQ_GOV_SIMPLE_ONDEMAND,
1339 NULL);
1340 if (IS_ERR(devfreq)) {
1341 ret = PTR_ERR(devfreq);
1342 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001343
1344 dev_pm_opp_remove(hba->dev, clki->min_freq);
1345 dev_pm_opp_remove(hba->dev, clki->max_freq);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001346 return ret;
1347 }
1348
1349 hba->devfreq = devfreq;
1350
1351 return 0;
1352}
1353
Bjorn Andersson092b4552018-05-17 23:26:37 -07001354static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1355{
1356 struct list_head *clk_list = &hba->clk_list_head;
1357 struct ufs_clk_info *clki;
1358
1359 if (!hba->devfreq)
1360 return;
1361
1362 devfreq_remove_device(hba->devfreq);
1363 hba->devfreq = NULL;
1364
1365 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1366 dev_pm_opp_remove(hba->dev, clki->min_freq);
1367 dev_pm_opp_remove(hba->dev, clki->max_freq);
1368}
1369
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001370static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1371{
1372 unsigned long flags;
1373
1374 devfreq_suspend_device(hba->devfreq);
1375 spin_lock_irqsave(hba->host->host_lock, flags);
1376 hba->clk_scaling.window_start_t = 0;
1377 spin_unlock_irqrestore(hba->host->host_lock, flags);
1378}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001379
Gilad Bronera5082532016-10-17 17:10:00 -07001380static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1381{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001382 unsigned long flags;
1383 bool suspend = false;
1384
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001385 if (!ufshcd_is_clkscaling_supported(hba))
1386 return;
1387
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001388 spin_lock_irqsave(hba->host->host_lock, flags);
1389 if (!hba->clk_scaling.is_suspended) {
1390 suspend = true;
1391 hba->clk_scaling.is_suspended = true;
1392 }
1393 spin_unlock_irqrestore(hba->host->host_lock, flags);
1394
1395 if (suspend)
1396 __ufshcd_suspend_clkscaling(hba);
Gilad Bronera5082532016-10-17 17:10:00 -07001397}
1398
1399static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1400{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001401 unsigned long flags;
1402 bool resume = false;
1403
1404 if (!ufshcd_is_clkscaling_supported(hba))
1405 return;
1406
1407 spin_lock_irqsave(hba->host->host_lock, flags);
1408 if (hba->clk_scaling.is_suspended) {
1409 resume = true;
1410 hba->clk_scaling.is_suspended = false;
1411 }
1412 spin_unlock_irqrestore(hba->host->host_lock, flags);
1413
1414 if (resume)
1415 devfreq_resume_device(hba->devfreq);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001416}
1417
1418static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1419 struct device_attribute *attr, char *buf)
1420{
1421 struct ufs_hba *hba = dev_get_drvdata(dev);
1422
1423 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1424}
1425
1426static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1427 struct device_attribute *attr, const char *buf, size_t count)
1428{
1429 struct ufs_hba *hba = dev_get_drvdata(dev);
1430 u32 value;
1431 int err;
1432
1433 if (kstrtou32(buf, 0, &value))
1434 return -EINVAL;
1435
1436 value = !!value;
1437 if (value == hba->clk_scaling.is_allowed)
1438 goto out;
1439
1440 pm_runtime_get_sync(hba->dev);
1441 ufshcd_hold(hba, false);
1442
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001443 cancel_work_sync(&hba->clk_scaling.suspend_work);
1444 cancel_work_sync(&hba->clk_scaling.resume_work);
1445
1446 hba->clk_scaling.is_allowed = value;
1447
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001448 if (value) {
1449 ufshcd_resume_clkscaling(hba);
1450 } else {
1451 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001452 err = ufshcd_devfreq_scale(hba, true);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001453 if (err)
1454 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1455 __func__, err);
1456 }
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001457
1458 ufshcd_release(hba);
1459 pm_runtime_put_sync(hba->dev);
1460out:
1461 return count;
Gilad Bronera5082532016-10-17 17:10:00 -07001462}
1463
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001464static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1465{
1466 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1467 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1468 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1469 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1470 hba->clk_scaling.enable_attr.attr.mode = 0644;
1471 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1472 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1473}
1474
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001475static void ufshcd_ungate_work(struct work_struct *work)
1476{
1477 int ret;
1478 unsigned long flags;
1479 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1480 clk_gating.ungate_work);
1481
1482 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1483
1484 spin_lock_irqsave(hba->host->host_lock, flags);
1485 if (hba->clk_gating.state == CLKS_ON) {
1486 spin_unlock_irqrestore(hba->host->host_lock, flags);
1487 goto unblock_reqs;
1488 }
1489
1490 spin_unlock_irqrestore(hba->host->host_lock, flags);
1491 ufshcd_setup_clocks(hba, true);
1492
1493 /* Exit from hibern8 */
1494 if (ufshcd_can_hibern8_during_gating(hba)) {
1495 /* Prevent gating in this path */
1496 hba->clk_gating.is_suspended = true;
1497 if (ufshcd_is_link_hibern8(hba)) {
1498 ret = ufshcd_uic_hibern8_exit(hba);
1499 if (ret)
1500 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1501 __func__, ret);
1502 else
1503 ufshcd_set_link_active(hba);
1504 }
1505 hba->clk_gating.is_suspended = false;
1506 }
1507unblock_reqs:
Subhash Jadavani38135532018-05-03 16:37:18 +05301508 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001509}
1510
1511/**
1512 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1513 * Also, exit from hibern8 mode and set the link as active.
1514 * @hba: per adapter instance
1515 * @async: This indicates whether caller should ungate clocks asynchronously.
1516 */
1517int ufshcd_hold(struct ufs_hba *hba, bool async)
1518{
1519 int rc = 0;
1520 unsigned long flags;
1521
1522 if (!ufshcd_is_clkgating_allowed(hba))
1523 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001524 spin_lock_irqsave(hba->host->host_lock, flags);
1525 hba->clk_gating.active_reqs++;
1526
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001527 if (ufshcd_eh_in_progress(hba)) {
1528 spin_unlock_irqrestore(hba->host->host_lock, flags);
1529 return 0;
1530 }
1531
Sahitya Tummala856b3482014-09-25 15:32:34 +03001532start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001533 switch (hba->clk_gating.state) {
1534 case CLKS_ON:
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001535 /*
1536 * Wait for the ungate work to complete if in progress.
1537 * Though the clocks may be in ON state, the link could
1538 * still be in hibner8 state if hibern8 is allowed
1539 * during clock gating.
1540 * Make sure we exit hibern8 state also in addition to
1541 * clocks being ON.
1542 */
1543 if (ufshcd_can_hibern8_during_gating(hba) &&
1544 ufshcd_is_link_hibern8(hba)) {
1545 spin_unlock_irqrestore(hba->host->host_lock, flags);
1546 flush_work(&hba->clk_gating.ungate_work);
1547 spin_lock_irqsave(hba->host->host_lock, flags);
1548 goto start;
1549 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001550 break;
1551 case REQ_CLKS_OFF:
1552 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1553 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001554 trace_ufshcd_clk_gating(dev_name(hba->dev),
1555 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001556 break;
1557 }
1558 /*
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +03001559 * If we are here, it means gating work is either done or
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001560 * currently running. Hence, fall through to cancel gating
1561 * work and to enable clocks.
1562 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001563 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001564 case CLKS_OFF:
Subhash Jadavani38135532018-05-03 16:37:18 +05301565 ufshcd_scsi_block_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001566 hba->clk_gating.state = REQ_CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001567 trace_ufshcd_clk_gating(dev_name(hba->dev),
1568 hba->clk_gating.state);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301569 queue_work(hba->clk_gating.clk_gating_workq,
1570 &hba->clk_gating.ungate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001571 /*
1572 * fall through to check if we should wait for this
1573 * work to be done or not.
1574 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001575 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001576 case REQ_CLKS_ON:
1577 if (async) {
1578 rc = -EAGAIN;
1579 hba->clk_gating.active_reqs--;
1580 break;
1581 }
1582
1583 spin_unlock_irqrestore(hba->host->host_lock, flags);
1584 flush_work(&hba->clk_gating.ungate_work);
1585 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001586 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001587 goto start;
1588 default:
1589 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1590 __func__, hba->clk_gating.state);
1591 break;
1592 }
1593 spin_unlock_irqrestore(hba->host->host_lock, flags);
1594out:
1595 return rc;
1596}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001597EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001598
1599static void ufshcd_gate_work(struct work_struct *work)
1600{
1601 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1602 clk_gating.gate_work.work);
1603 unsigned long flags;
1604
1605 spin_lock_irqsave(hba->host->host_lock, flags);
Venkat Gopalakrishnan3f0c06d2016-10-17 17:11:07 -07001606 /*
1607 * In case you are here to cancel this work the gating state
1608 * would be marked as REQ_CLKS_ON. In this case save time by
1609 * skipping the gating work and exit after changing the clock
1610 * state to CLKS_ON.
1611 */
1612 if (hba->clk_gating.is_suspended ||
Asutosh Das18f013742019-11-14 22:09:29 -08001613 (hba->clk_gating.state != REQ_CLKS_OFF)) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001614 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001615 trace_ufshcd_clk_gating(dev_name(hba->dev),
1616 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001617 goto rel_lock;
1618 }
1619
1620 if (hba->clk_gating.active_reqs
1621 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1622 || hba->lrb_in_use || hba->outstanding_tasks
1623 || hba->active_uic_cmd || hba->uic_async_done)
1624 goto rel_lock;
1625
1626 spin_unlock_irqrestore(hba->host->host_lock, flags);
1627
1628 /* put the link into hibern8 mode before turning off clocks */
1629 if (ufshcd_can_hibern8_during_gating(hba)) {
1630 if (ufshcd_uic_hibern8_enter(hba)) {
1631 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001632 trace_ufshcd_clk_gating(dev_name(hba->dev),
1633 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001634 goto out;
1635 }
1636 ufshcd_set_link_hibern8(hba);
1637 }
1638
1639 if (!ufshcd_is_link_active(hba))
1640 ufshcd_setup_clocks(hba, false);
1641 else
1642 /* If link is active, device ref_clk can't be switched off */
1643 __ufshcd_setup_clocks(hba, false, true);
1644
1645 /*
1646 * In case you are here to cancel this work the gating state
1647 * would be marked as REQ_CLKS_ON. In this case keep the state
1648 * as REQ_CLKS_ON which would anyway imply that clocks are off
1649 * and a request to turn them on is pending. By doing this way,
1650 * we keep the state machine in tact and this would ultimately
1651 * prevent from doing cancel work multiple times when there are
1652 * new requests arriving before the current cancel work is done.
1653 */
1654 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001655 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001656 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001657 trace_ufshcd_clk_gating(dev_name(hba->dev),
1658 hba->clk_gating.state);
1659 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001660rel_lock:
1661 spin_unlock_irqrestore(hba->host->host_lock, flags);
1662out:
1663 return;
1664}
1665
1666/* host lock must be held before calling this variant */
1667static void __ufshcd_release(struct ufs_hba *hba)
1668{
1669 if (!ufshcd_is_clkgating_allowed(hba))
1670 return;
1671
1672 hba->clk_gating.active_reqs--;
1673
1674 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1675 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1676 || hba->lrb_in_use || hba->outstanding_tasks
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001677 || hba->active_uic_cmd || hba->uic_async_done
1678 || ufshcd_eh_in_progress(hba))
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001679 return;
1680
1681 hba->clk_gating.state = REQ_CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001682 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Evan Greenf4bb7702018-10-05 10:27:32 -07001683 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1684 &hba->clk_gating.gate_work,
1685 msecs_to_jiffies(hba->clk_gating.delay_ms));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001686}
1687
1688void ufshcd_release(struct ufs_hba *hba)
1689{
1690 unsigned long flags;
1691
1692 spin_lock_irqsave(hba->host->host_lock, flags);
1693 __ufshcd_release(hba);
1694 spin_unlock_irqrestore(hba->host->host_lock, flags);
1695}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001696EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001697
1698static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1699 struct device_attribute *attr, char *buf)
1700{
1701 struct ufs_hba *hba = dev_get_drvdata(dev);
1702
1703 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1704}
1705
1706static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1707 struct device_attribute *attr, const char *buf, size_t count)
1708{
1709 struct ufs_hba *hba = dev_get_drvdata(dev);
1710 unsigned long flags, value;
1711
1712 if (kstrtoul(buf, 0, &value))
1713 return -EINVAL;
1714
1715 spin_lock_irqsave(hba->host->host_lock, flags);
1716 hba->clk_gating.delay_ms = value;
1717 spin_unlock_irqrestore(hba->host->host_lock, flags);
1718 return count;
1719}
1720
Sahitya Tummalab4274112016-12-22 18:40:39 -08001721static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1722 struct device_attribute *attr, char *buf)
1723{
1724 struct ufs_hba *hba = dev_get_drvdata(dev);
1725
1726 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1727}
1728
1729static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1730 struct device_attribute *attr, const char *buf, size_t count)
1731{
1732 struct ufs_hba *hba = dev_get_drvdata(dev);
1733 unsigned long flags;
1734 u32 value;
1735
1736 if (kstrtou32(buf, 0, &value))
1737 return -EINVAL;
1738
1739 value = !!value;
1740 if (value == hba->clk_gating.is_enabled)
1741 goto out;
1742
1743 if (value) {
1744 ufshcd_release(hba);
1745 } else {
1746 spin_lock_irqsave(hba->host->host_lock, flags);
1747 hba->clk_gating.active_reqs++;
1748 spin_unlock_irqrestore(hba->host->host_lock, flags);
1749 }
1750
1751 hba->clk_gating.is_enabled = value;
1752out:
1753 return count;
1754}
1755
Vivek Gautameebcc192018-08-07 23:17:39 +05301756static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1757{
1758 char wq_name[sizeof("ufs_clkscaling_00")];
1759
1760 if (!ufshcd_is_clkscaling_supported(hba))
1761 return;
1762
1763 INIT_WORK(&hba->clk_scaling.suspend_work,
1764 ufshcd_clk_scaling_suspend_work);
1765 INIT_WORK(&hba->clk_scaling.resume_work,
1766 ufshcd_clk_scaling_resume_work);
1767
1768 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1769 hba->host->host_no);
1770 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1771
1772 ufshcd_clkscaling_init_sysfs(hba);
1773}
1774
1775static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1776{
1777 if (!ufshcd_is_clkscaling_supported(hba))
1778 return;
1779
1780 destroy_workqueue(hba->clk_scaling.workq);
1781 ufshcd_devfreq_remove(hba);
1782}
1783
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001784static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1785{
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301786 char wq_name[sizeof("ufs_clk_gating_00")];
1787
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001788 if (!ufshcd_is_clkgating_allowed(hba))
1789 return;
1790
1791 hba->clk_gating.delay_ms = 150;
1792 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1793 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1794
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301795 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1796 hba->host->host_no);
1797 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1798 WQ_MEM_RECLAIM);
1799
Sahitya Tummalab4274112016-12-22 18:40:39 -08001800 hba->clk_gating.is_enabled = true;
1801
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001802 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1803 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1804 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1805 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
Sahitya Tummalab4274112016-12-22 18:40:39 -08001806 hba->clk_gating.delay_attr.attr.mode = 0644;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001807 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1808 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Sahitya Tummalab4274112016-12-22 18:40:39 -08001809
1810 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1811 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1812 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1813 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1814 hba->clk_gating.enable_attr.attr.mode = 0644;
1815 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1816 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001817}
1818
1819static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1820{
1821 if (!ufshcd_is_clkgating_allowed(hba))
1822 return;
1823 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001824 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001825 cancel_work_sync(&hba->clk_gating.ungate_work);
1826 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301827 destroy_workqueue(hba->clk_gating.clk_gating_workq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001828}
1829
Sahitya Tummala856b3482014-09-25 15:32:34 +03001830/* Must be called with host lock acquired */
1831static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1832{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001833 bool queue_resume_work = false;
1834
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001835 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001836 return;
1837
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001838 if (!hba->clk_scaling.active_reqs++)
1839 queue_resume_work = true;
1840
1841 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1842 return;
1843
1844 if (queue_resume_work)
1845 queue_work(hba->clk_scaling.workq,
1846 &hba->clk_scaling.resume_work);
1847
1848 if (!hba->clk_scaling.window_start_t) {
1849 hba->clk_scaling.window_start_t = jiffies;
1850 hba->clk_scaling.tot_busy_t = 0;
1851 hba->clk_scaling.is_busy_started = false;
1852 }
1853
Sahitya Tummala856b3482014-09-25 15:32:34 +03001854 if (!hba->clk_scaling.is_busy_started) {
1855 hba->clk_scaling.busy_start_t = ktime_get();
1856 hba->clk_scaling.is_busy_started = true;
1857 }
1858}
1859
1860static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1861{
1862 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1863
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001864 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001865 return;
1866
1867 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1868 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1869 scaling->busy_start_t));
Thomas Gleixner8b0e1952016-12-25 12:30:41 +01001870 scaling->busy_start_t = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03001871 scaling->is_busy_started = false;
1872 }
1873}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301874/**
1875 * ufshcd_send_command - Send SCSI or device management commands
1876 * @hba: per adapter instance
1877 * @task_tag: Task tag of the command
1878 */
1879static inline
1880void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1881{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08001882 hba->lrb[task_tag].issue_time_stamp = ktime_get();
Zang Leigang09017182017-09-27 10:06:06 +08001883 hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
Sahitya Tummala856b3482014-09-25 15:32:34 +03001884 ufshcd_clk_scaling_start_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301885 __set_bit(task_tag, &hba->outstanding_reqs);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301886 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07001887 /* Make sure that doorbell is committed immediately */
1888 wmb();
Lee Susman1a07f2d2016-12-22 18:42:03 -08001889 ufshcd_add_command_trace(hba, task_tag, "send");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301890}
1891
1892/**
1893 * ufshcd_copy_sense_data - Copy sense data in case of check condition
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001894 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301895 */
1896static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1897{
1898 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05301899 if (lrbp->sense_buffer &&
1900 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001901 int len_to_copy;
1902
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301903 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Avri Altman09a5a242018-11-22 20:04:56 +02001904 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001905
Avri Altman09a5a242018-11-22 20:04:56 +02001906 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
1907 len_to_copy);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301908 }
1909}
1910
1911/**
Dolev Raviv68078d52013-07-30 00:35:58 +05301912 * ufshcd_copy_query_response() - Copy the Query Response and the data
1913 * descriptor
1914 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001915 * @lrbp: pointer to local reference block
Dolev Raviv68078d52013-07-30 00:35:58 +05301916 */
1917static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001918int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05301919{
1920 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1921
Dolev Raviv68078d52013-07-30 00:35:58 +05301922 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05301923
Dolev Raviv68078d52013-07-30 00:35:58 +05301924 /* Get the descriptor */
Avri Altman1c908362019-05-21 11:24:22 +03001925 if (hba->dev_cmd.query.descriptor &&
1926 lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03001927 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05301928 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001929 u16 resp_len;
1930 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05301931
1932 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001933 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05301934 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03001935 buf_len = be16_to_cpu(
1936 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001937 if (likely(buf_len >= resp_len)) {
1938 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1939 } else {
1940 dev_warn(hba->dev,
Bean Huo3d4881d2019-11-12 23:34:35 +01001941 "%s: rsp size %d is bigger than buffer size %d",
1942 __func__, resp_len, buf_len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001943 return -EINVAL;
1944 }
Dolev Raviv68078d52013-07-30 00:35:58 +05301945 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001946
1947 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05301948}
1949
1950/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301951 * ufshcd_hba_capabilities - Read controller capabilities
1952 * @hba: per adapter instance
1953 */
1954static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1955{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301956 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301957
1958 /* nutrs and nutmrs are 0 based values */
1959 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1960 hba->nutmrs =
1961 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1962}
1963
1964/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301965 * ufshcd_ready_for_uic_cmd - Check if controller is ready
1966 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301967 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301968 * Return true on success, else false
1969 */
1970static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1971{
1972 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1973 return true;
1974 else
1975 return false;
1976}
1977
1978/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05301979 * ufshcd_get_upmcrs - Get the power mode change request status
1980 * @hba: Pointer to adapter instance
1981 *
1982 * This function gets the UPMCRS field of HCS register
1983 * Returns value of UPMCRS field
1984 */
1985static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1986{
1987 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1988}
1989
1990/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301991 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1992 * @hba: per adapter instance
1993 * @uic_cmd: UIC command
1994 *
1995 * Mutex must be held.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301996 */
1997static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301998ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301999{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302000 WARN_ON(hba->active_uic_cmd);
2001
2002 hba->active_uic_cmd = uic_cmd;
2003
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302004 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302005 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2006 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2007 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302008
2009 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302010 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302011 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302012}
2013
2014/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302015 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2016 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002017 * @uic_cmd: UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302018 *
2019 * Must be called with mutex held.
2020 * Returns 0 only if success.
2021 */
2022static int
2023ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2024{
2025 int ret;
2026 unsigned long flags;
2027
2028 if (wait_for_completion_timeout(&uic_cmd->done,
2029 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2030 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2031 else
2032 ret = -ETIMEDOUT;
2033
2034 spin_lock_irqsave(hba->host->host_lock, flags);
2035 hba->active_uic_cmd = NULL;
2036 spin_unlock_irqrestore(hba->host->host_lock, flags);
2037
2038 return ret;
2039}
2040
2041/**
2042 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2043 * @hba: per adapter instance
2044 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002045 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302046 *
2047 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002048 * with mutex held and host_lock locked.
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302049 * Returns 0 only if success.
2050 */
2051static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002052__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2053 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302054{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302055 if (!ufshcd_ready_for_uic_cmd(hba)) {
2056 dev_err(hba->dev,
2057 "Controller not ready to accept UIC commands\n");
2058 return -EIO;
2059 }
2060
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002061 if (completion)
2062 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302063
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302064 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302065
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002066 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302067}
2068
2069/**
2070 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2071 * @hba: per adapter instance
2072 * @uic_cmd: UIC command
2073 *
2074 * Returns 0 only if success.
2075 */
Avri Altmane77044c52018-10-07 17:30:39 +03002076int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302077{
2078 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002079 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302080
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002081 ufshcd_hold(hba, false);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302082 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03002083 ufshcd_add_delay_before_dme_cmd(hba);
2084
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002085 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002086 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002087 spin_unlock_irqrestore(hba->host->host_lock, flags);
2088 if (!ret)
2089 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2090
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302091 mutex_unlock(&hba->uic_cmd_mutex);
2092
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002093 ufshcd_release(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302094 return ret;
2095}
2096
2097/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302098 * ufshcd_map_sg - Map scatter-gather list to prdt
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002099 * @hba: per adapter instance
2100 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302101 *
2102 * Returns 0 in case of success, non-zero value in case of failure
2103 */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002104static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302105{
2106 struct ufshcd_sg_entry *prd_table;
2107 struct scatterlist *sg;
2108 struct scsi_cmnd *cmd;
2109 int sg_segments;
2110 int i;
2111
2112 cmd = lrbp->cmd;
2113 sg_segments = scsi_dma_map(cmd);
2114 if (sg_segments < 0)
2115 return sg_segments;
2116
2117 if (sg_segments) {
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002118 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2119 lrbp->utr_descriptor_ptr->prd_table_length =
2120 cpu_to_le16((u16)(sg_segments *
2121 sizeof(struct ufshcd_sg_entry)));
2122 else
2123 lrbp->utr_descriptor_ptr->prd_table_length =
2124 cpu_to_le16((u16) (sg_segments));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302125
2126 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2127
2128 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2129 prd_table[i].size =
2130 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2131 prd_table[i].base_addr =
2132 cpu_to_le32(lower_32_bits(sg->dma_address));
2133 prd_table[i].upper_addr =
2134 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002135 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302136 }
2137 } else {
2138 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2139 }
2140
2141 return 0;
2142}
2143
2144/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302145 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302146 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302147 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302148 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302149static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302150{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302151 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2152
2153 if (hba->ufs_version == UFSHCI_VERSION_10) {
2154 u32 rw;
2155 rw = set & INTERRUPT_MASK_RW_VER_10;
2156 set = rw | ((set ^ intrs) & intrs);
2157 } else {
2158 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302159 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302160
2161 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2162}
2163
2164/**
2165 * ufshcd_disable_intr - disable interrupts
2166 * @hba: per adapter instance
2167 * @intrs: interrupt bits
2168 */
2169static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2170{
2171 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2172
2173 if (hba->ufs_version == UFSHCI_VERSION_10) {
2174 u32 rw;
2175 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2176 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2177 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2178
2179 } else {
2180 set &= ~intrs;
2181 }
2182
2183 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302184}
2185
2186/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302187 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2188 * descriptor according to request
2189 * @lrbp: pointer to local reference block
2190 * @upiu_flags: flags required in the header
2191 * @cmd_dir: requests data direction
2192 */
2193static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
Joao Pinto300bb132016-05-11 12:21:27 +01002194 u32 *upiu_flags, enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302195{
2196 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2197 u32 data_direction;
2198 u32 dword_0;
2199
2200 if (cmd_dir == DMA_FROM_DEVICE) {
2201 data_direction = UTP_DEVICE_TO_HOST;
2202 *upiu_flags = UPIU_CMD_FLAGS_READ;
2203 } else if (cmd_dir == DMA_TO_DEVICE) {
2204 data_direction = UTP_HOST_TO_DEVICE;
2205 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2206 } else {
2207 data_direction = UTP_NO_DATA_TRANSFER;
2208 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2209 }
2210
2211 dword_0 = data_direction | (lrbp->command_type
2212 << UPIU_COMMAND_TYPE_OFFSET);
2213 if (lrbp->intr_cmd)
2214 dword_0 |= UTP_REQ_DESC_INT_CMD;
2215
2216 /* Transfer request descriptor header fields */
2217 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002218 /* dword_1 is reserved, hence it is set to 0 */
2219 req_desc->header.dword_1 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302220 /*
2221 * assigning invalid value for command status. Controller
2222 * updates OCS on command completion, with the command
2223 * status
2224 */
2225 req_desc->header.dword_2 =
2226 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002227 /* dword_3 is reserved, hence it is set to 0 */
2228 req_desc->header.dword_3 = 0;
Yaniv Gardi51047262016-02-01 15:02:38 +02002229
2230 req_desc->prd_table_length = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302231}
2232
2233/**
2234 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2235 * for scsi commands
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002236 * @lrbp: local reference block pointer
2237 * @upiu_flags: flags
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302238 */
2239static
2240void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2241{
2242 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002243 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302244
2245 /* command descriptor fields */
2246 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2247 UPIU_TRANSACTION_COMMAND, upiu_flags,
2248 lrbp->lun, lrbp->task_tag);
2249 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2250 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2251
2252 /* Total EHS length and Data segment length will be zero */
2253 ucd_req_ptr->header.dword_2 = 0;
2254
2255 ucd_req_ptr->sc.exp_data_transfer_len =
2256 cpu_to_be32(lrbp->cmd->sdb.length);
2257
Avri Altmana851b2b2018-10-07 17:30:34 +03002258 cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, UFS_CDB_SIZE);
2259 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002260 memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
2261
2262 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302263}
2264
Dolev Raviv68078d52013-07-30 00:35:58 +05302265/**
2266 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2267 * for query requsts
2268 * @hba: UFS hba
2269 * @lrbp: local reference block pointer
2270 * @upiu_flags: flags
2271 */
2272static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2273 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2274{
2275 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2276 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302277 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302278
2279 /* Query request header */
2280 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2281 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2282 lrbp->lun, lrbp->task_tag);
2283 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2284 0, query->request.query_func, 0, 0);
2285
Zang Leigang68612852016-08-25 17:39:19 +08002286 /* Data segment length only need for WRITE_DESC */
2287 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2288 ucd_req_ptr->header.dword_2 =
2289 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2290 else
2291 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302292
2293 /* Copy the Query Request buffer as is */
2294 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2295 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302296
2297 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002298 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
Avri Altman220d17a62018-10-07 17:30:36 +03002299 memcpy(ucd_req_ptr + 1, query->descriptor, len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002300
Yaniv Gardi51047262016-02-01 15:02:38 +02002301 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302302}
2303
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302304static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2305{
2306 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2307
2308 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2309
2310 /* command descriptor fields */
2311 ucd_req_ptr->header.dword_0 =
2312 UPIU_HEADER_DWORD(
2313 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002314 /* clear rest of the fields of basic header */
2315 ucd_req_ptr->header.dword_1 = 0;
2316 ucd_req_ptr->header.dword_2 = 0;
2317
2318 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302319}
2320
2321/**
Joao Pinto300bb132016-05-11 12:21:27 +01002322 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2323 * for Device Management Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002324 * @hba: per adapter instance
2325 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302326 */
Joao Pinto300bb132016-05-11 12:21:27 +01002327static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302328{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302329 u32 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302330 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302331
kehuanlin83dc7e32017-09-06 17:58:39 +08002332 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2333 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002334 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
kehuanlin83dc7e32017-09-06 17:58:39 +08002335 else
2336 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002337
2338 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2339 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2340 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2341 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2342 ufshcd_prepare_utp_nop_upiu(lrbp);
2343 else
2344 ret = -EINVAL;
2345
2346 return ret;
2347}
2348
2349/**
2350 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2351 * for SCSI Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002352 * @hba: per adapter instance
2353 * @lrbp: pointer to local reference block
Joao Pinto300bb132016-05-11 12:21:27 +01002354 */
2355static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2356{
2357 u32 upiu_flags;
2358 int ret = 0;
2359
kehuanlin83dc7e32017-09-06 17:58:39 +08002360 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2361 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002362 lrbp->command_type = UTP_CMD_TYPE_SCSI;
kehuanlin83dc7e32017-09-06 17:58:39 +08002363 else
2364 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002365
2366 if (likely(lrbp->cmd)) {
2367 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2368 lrbp->cmd->sc_data_direction);
2369 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2370 } else {
2371 ret = -EINVAL;
2372 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302373
2374 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302375}
2376
2377/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002378 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002379 * @upiu_wlun_id: UPIU W-LUN id
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002380 *
2381 * Returns SCSI W-LUN id
2382 */
2383static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2384{
2385 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2386}
2387
2388/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302389 * ufshcd_queuecommand - main entry point for SCSI requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002390 * @host: SCSI host pointer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302391 * @cmd: command from SCSI Midlayer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302392 *
2393 * Returns 0 for success, non-zero in case of failure
2394 */
2395static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2396{
2397 struct ufshcd_lrb *lrbp;
2398 struct ufs_hba *hba;
2399 unsigned long flags;
2400 int tag;
2401 int err = 0;
2402
2403 hba = shost_priv(host);
2404
2405 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02002406 if (!ufshcd_valid_tag(hba, tag)) {
2407 dev_err(hba->dev,
2408 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2409 __func__, tag, cmd, cmd->request);
2410 BUG();
2411 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302412
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002413 if (!down_read_trylock(&hba->clk_scaling_lock))
2414 return SCSI_MLQUEUE_HOST_BUSY;
2415
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302416 spin_lock_irqsave(hba->host->host_lock, flags);
2417 switch (hba->ufshcd_state) {
2418 case UFSHCD_STATE_OPERATIONAL:
2419 break;
Zang Leigang141f8162016-11-16 11:29:37 +08002420 case UFSHCD_STATE_EH_SCHEDULED:
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302421 case UFSHCD_STATE_RESET:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302422 err = SCSI_MLQUEUE_HOST_BUSY;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302423 goto out_unlock;
2424 case UFSHCD_STATE_ERROR:
2425 set_host_byte(cmd, DID_ERROR);
2426 cmd->scsi_done(cmd);
2427 goto out_unlock;
2428 default:
2429 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2430 __func__, hba->ufshcd_state);
2431 set_host_byte(cmd, DID_BAD_TARGET);
2432 cmd->scsi_done(cmd);
2433 goto out_unlock;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302434 }
Yaniv Gardi53c12d02016-02-01 15:02:45 +02002435
2436 /* if error handling is in progress, don't issue commands */
2437 if (ufshcd_eh_in_progress(hba)) {
2438 set_host_byte(cmd, DID_ERROR);
2439 cmd->scsi_done(cmd);
2440 goto out_unlock;
2441 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302442 spin_unlock_irqrestore(hba->host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302443
Gilad Broner7fabb772017-02-03 16:56:50 -08002444 hba->req_abort_count = 0;
2445
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302446 /* acquire the tag to make sure device cmds don't use it */
2447 if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
2448 /*
2449 * Dev manage command in progress, requeue the command.
2450 * Requeuing the command helps in cases where the request *may*
2451 * find different tag instead of waiting for dev manage command
2452 * completion.
2453 */
2454 err = SCSI_MLQUEUE_HOST_BUSY;
2455 goto out;
2456 }
2457
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002458 err = ufshcd_hold(hba, true);
2459 if (err) {
2460 err = SCSI_MLQUEUE_HOST_BUSY;
2461 clear_bit_unlock(tag, &hba->lrb_in_use);
2462 goto out;
2463 }
2464 WARN_ON(hba->clk_gating.state != CLKS_ON);
2465
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302466 lrbp = &hba->lrb[tag];
2467
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302468 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302469 lrbp->cmd = cmd;
Avri Altman09a5a242018-11-22 20:04:56 +02002470 lrbp->sense_bufflen = UFS_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302471 lrbp->sense_buffer = cmd->sense_buffer;
2472 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002473 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002474 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Gilad Bronere0b299e2017-02-03 16:56:40 -08002475 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302476
Joao Pinto300bb132016-05-11 12:21:27 +01002477 ufshcd_comp_scsi_upiu(hba, lrbp);
2478
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002479 err = ufshcd_map_sg(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302480 if (err) {
2481 lrbp->cmd = NULL;
2482 clear_bit_unlock(tag, &hba->lrb_in_use);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302483 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302484 }
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002485 /* Make sure descriptors are ready before ringing the doorbell */
2486 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302487
2488 /* issue command to the controller */
2489 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002490 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302491 ufshcd_send_command(hba, tag);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302492out_unlock:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302493 spin_unlock_irqrestore(hba->host->host_lock, flags);
2494out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002495 up_read(&hba->clk_scaling_lock);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302496 return err;
2497}
2498
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302499static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2500 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2501{
2502 lrbp->cmd = NULL;
2503 lrbp->sense_bufflen = 0;
2504 lrbp->sense_buffer = NULL;
2505 lrbp->task_tag = tag;
2506 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302507 lrbp->intr_cmd = true; /* No interrupt aggregation */
2508 hba->dev_cmd.type = cmd_type;
2509
Joao Pinto300bb132016-05-11 12:21:27 +01002510 return ufshcd_comp_devman_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302511}
2512
2513static int
2514ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2515{
2516 int err = 0;
2517 unsigned long flags;
2518 u32 mask = 1 << tag;
2519
2520 /* clear outstanding transaction before retry */
2521 spin_lock_irqsave(hba->host->host_lock, flags);
2522 ufshcd_utrl_clear(hba, tag);
2523 spin_unlock_irqrestore(hba->host->host_lock, flags);
2524
2525 /*
2526 * wait for for h/w to clear corresponding bit in door-bell.
2527 * max. wait is 1 sec.
2528 */
2529 err = ufshcd_wait_for_register(hba,
2530 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02002531 mask, ~mask, 1000, 1000, true);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302532
2533 return err;
2534}
2535
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002536static int
2537ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2538{
2539 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2540
2541 /* Get the UPIU response */
2542 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2543 UPIU_RSP_CODE_OFFSET;
2544 return query_res->response;
2545}
2546
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302547/**
2548 * ufshcd_dev_cmd_completion() - handles device management command responses
2549 * @hba: per adapter instance
2550 * @lrbp: pointer to local reference block
2551 */
2552static int
2553ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2554{
2555 int resp;
2556 int err = 0;
2557
Dolev Ravivff8e20c2016-12-22 18:42:18 -08002558 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302559 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2560
2561 switch (resp) {
2562 case UPIU_TRANSACTION_NOP_IN:
2563 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2564 err = -EINVAL;
2565 dev_err(hba->dev, "%s: unexpected response %x\n",
2566 __func__, resp);
2567 }
2568 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302569 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002570 err = ufshcd_check_query_response(hba, lrbp);
2571 if (!err)
2572 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302573 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302574 case UPIU_TRANSACTION_REJECT_UPIU:
2575 /* TODO: handle Reject UPIU Response */
2576 err = -EPERM;
2577 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2578 __func__);
2579 break;
2580 default:
2581 err = -EINVAL;
2582 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2583 __func__, resp);
2584 break;
2585 }
2586
2587 return err;
2588}
2589
2590static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2591 struct ufshcd_lrb *lrbp, int max_timeout)
2592{
2593 int err = 0;
2594 unsigned long time_left;
2595 unsigned long flags;
2596
2597 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2598 msecs_to_jiffies(max_timeout));
2599
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002600 /* Make sure descriptors are ready before ringing the doorbell */
2601 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302602 spin_lock_irqsave(hba->host->host_lock, flags);
2603 hba->dev_cmd.complete = NULL;
2604 if (likely(time_left)) {
2605 err = ufshcd_get_tr_ocs(lrbp);
2606 if (!err)
2607 err = ufshcd_dev_cmd_completion(hba, lrbp);
2608 }
2609 spin_unlock_irqrestore(hba->host->host_lock, flags);
2610
2611 if (!time_left) {
2612 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002613 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2614 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302615 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002616 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302617 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002618 /*
2619 * in case of an error, after clearing the doorbell,
2620 * we also need to clear the outstanding_request
2621 * field in hba
2622 */
2623 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302624 }
2625
2626 return err;
2627}
2628
2629/**
2630 * ufshcd_get_dev_cmd_tag - Get device management command tag
2631 * @hba: per-adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002632 * @tag_out: pointer to variable with available slot value
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302633 *
2634 * Get a free slot and lock it until device management command
2635 * completes.
2636 *
2637 * Returns false if free slot is unavailable for locking, else
2638 * return true with tag value in @tag.
2639 */
2640static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
2641{
2642 int tag;
2643 bool ret = false;
2644 unsigned long tmp;
2645
2646 if (!tag_out)
2647 goto out;
2648
2649 do {
2650 tmp = ~hba->lrb_in_use;
2651 tag = find_last_bit(&tmp, hba->nutrs);
2652 if (tag >= hba->nutrs)
2653 goto out;
2654 } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
2655
2656 *tag_out = tag;
2657 ret = true;
2658out:
2659 return ret;
2660}
2661
2662static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
2663{
2664 clear_bit_unlock(tag, &hba->lrb_in_use);
2665}
2666
2667/**
2668 * ufshcd_exec_dev_cmd - API for sending device management requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002669 * @hba: UFS hba
2670 * @cmd_type: specifies the type (NOP, Query...)
2671 * @timeout: time in seconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302672 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302673 * NOTE: Since there is only one available tag for device management commands,
2674 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302675 */
2676static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2677 enum dev_cmd_type cmd_type, int timeout)
2678{
2679 struct ufshcd_lrb *lrbp;
2680 int err;
2681 int tag;
2682 struct completion wait;
2683 unsigned long flags;
2684
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002685 down_read(&hba->clk_scaling_lock);
2686
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302687 /*
2688 * Get free slot, sleep if slots are unavailable.
2689 * Even though we use wait_event() which sleeps indefinitely,
2690 * the maximum wait time is bounded by SCSI request timeout.
2691 */
2692 wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
2693
2694 init_completion(&wait);
2695 lrbp = &hba->lrb[tag];
2696 WARN_ON(lrbp->cmd);
2697 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2698 if (unlikely(err))
2699 goto out_put_tag;
2700
2701 hba->dev_cmd.complete = &wait;
2702
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002703 ufshcd_add_query_upiu_trace(hba, tag, "query_send");
Yaniv Gardie3dfdc52016-02-01 15:02:49 +02002704 /* Make sure descriptors are ready before ringing the doorbell */
2705 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302706 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002707 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302708 ufshcd_send_command(hba, tag);
2709 spin_unlock_irqrestore(hba->host->host_lock, flags);
2710
2711 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2712
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002713 ufshcd_add_query_upiu_trace(hba, tag,
2714 err ? "query_complete_err" : "query_complete");
2715
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302716out_put_tag:
2717 ufshcd_put_dev_cmd_tag(hba, tag);
2718 wake_up(&hba->dev_cmd.tag_wq);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002719 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302720 return err;
2721}
2722
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302723/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002724 * ufshcd_init_query() - init the query response and request parameters
2725 * @hba: per-adapter instance
2726 * @request: address of the request pointer to be initialized
2727 * @response: address of the response pointer to be initialized
2728 * @opcode: operation to perform
2729 * @idn: flag idn to access
2730 * @index: LU number to access
2731 * @selector: query/flag/descriptor further identification
2732 */
2733static inline void ufshcd_init_query(struct ufs_hba *hba,
2734 struct ufs_query_req **request, struct ufs_query_res **response,
2735 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2736{
2737 *request = &hba->dev_cmd.query.request;
2738 *response = &hba->dev_cmd.query.response;
2739 memset(*request, 0, sizeof(struct ufs_query_req));
2740 memset(*response, 0, sizeof(struct ufs_query_res));
2741 (*request)->upiu_req.opcode = opcode;
2742 (*request)->upiu_req.idn = idn;
2743 (*request)->upiu_req.index = index;
2744 (*request)->upiu_req.selector = selector;
2745}
2746
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002747static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2748 enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2749{
2750 int ret;
2751 int retries;
2752
2753 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2754 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2755 if (ret)
2756 dev_dbg(hba->dev,
2757 "%s: failed with error %d, retries %d\n",
2758 __func__, ret, retries);
2759 else
2760 break;
2761 }
2762
2763 if (ret)
2764 dev_err(hba->dev,
2765 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2766 __func__, opcode, idn, ret, retries);
2767 return ret;
2768}
2769
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002770/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302771 * ufshcd_query_flag() - API function for sending flag query requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002772 * @hba: per-adapter instance
2773 * @opcode: flag query to perform
2774 * @idn: flag idn to access
2775 * @flag_res: the flag value after the query request completes
Dolev Raviv68078d52013-07-30 00:35:58 +05302776 *
2777 * Returns 0 for success, non-zero in case of failure
2778 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002779int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Dolev Raviv68078d52013-07-30 00:35:58 +05302780 enum flag_idn idn, bool *flag_res)
2781{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002782 struct ufs_query_req *request = NULL;
2783 struct ufs_query_res *response = NULL;
2784 int err, index = 0, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002785 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05302786
2787 BUG_ON(!hba);
2788
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002789 ufshcd_hold(hba, false);
Dolev Raviv68078d52013-07-30 00:35:58 +05302790 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002791 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2792 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05302793
2794 switch (opcode) {
2795 case UPIU_QUERY_OPCODE_SET_FLAG:
2796 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2797 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2798 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2799 break;
2800 case UPIU_QUERY_OPCODE_READ_FLAG:
2801 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2802 if (!flag_res) {
2803 /* No dummy reads */
2804 dev_err(hba->dev, "%s: Invalid argument for read request\n",
2805 __func__);
2806 err = -EINVAL;
2807 goto out_unlock;
2808 }
2809 break;
2810 default:
2811 dev_err(hba->dev,
2812 "%s: Expected query flag opcode but got = %d\n",
2813 __func__, opcode);
2814 err = -EINVAL;
2815 goto out_unlock;
2816 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302817
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002818 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05302819
2820 if (err) {
2821 dev_err(hba->dev,
2822 "%s: Sending flag query for idn %d failed, err = %d\n",
2823 __func__, idn, err);
2824 goto out_unlock;
2825 }
2826
2827 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302828 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302829 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2830
2831out_unlock:
2832 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002833 ufshcd_release(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05302834 return err;
2835}
2836
2837/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302838 * ufshcd_query_attr - API function for sending attribute requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002839 * @hba: per-adapter instance
2840 * @opcode: attribute opcode
2841 * @idn: attribute idn to access
2842 * @index: index field
2843 * @selector: selector field
2844 * @attr_val: the attribute value after the query request completes
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302845 *
2846 * Returns 0 for success, non-zero in case of failure
2847*/
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02002848int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2849 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302850{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002851 struct ufs_query_req *request = NULL;
2852 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302853 int err;
2854
2855 BUG_ON(!hba);
2856
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002857 ufshcd_hold(hba, false);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302858 if (!attr_val) {
2859 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2860 __func__, opcode);
2861 err = -EINVAL;
2862 goto out;
2863 }
2864
2865 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002866 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2867 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302868
2869 switch (opcode) {
2870 case UPIU_QUERY_OPCODE_WRITE_ATTR:
2871 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302872 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302873 break;
2874 case UPIU_QUERY_OPCODE_READ_ATTR:
2875 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2876 break;
2877 default:
2878 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2879 __func__, opcode);
2880 err = -EINVAL;
2881 goto out_unlock;
2882 }
2883
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002884 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302885
2886 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002887 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2888 __func__, opcode, idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302889 goto out_unlock;
2890 }
2891
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302892 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302893
2894out_unlock:
2895 mutex_unlock(&hba->dev_cmd.lock);
2896out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002897 ufshcd_release(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302898 return err;
2899}
2900
2901/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02002902 * ufshcd_query_attr_retry() - API function for sending query
2903 * attribute with retries
2904 * @hba: per-adapter instance
2905 * @opcode: attribute opcode
2906 * @idn: attribute idn to access
2907 * @index: index field
2908 * @selector: selector field
2909 * @attr_val: the attribute value after the query request
2910 * completes
2911 *
2912 * Returns 0 for success, non-zero in case of failure
2913*/
2914static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2915 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2916 u32 *attr_val)
2917{
2918 int ret = 0;
2919 u32 retries;
2920
2921 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2922 ret = ufshcd_query_attr(hba, opcode, idn, index,
2923 selector, attr_val);
2924 if (ret)
2925 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2926 __func__, ret, retries);
2927 else
2928 break;
2929 }
2930
2931 if (ret)
2932 dev_err(hba->dev,
2933 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2934 __func__, idn, ret, QUERY_REQ_RETRIES);
2935 return ret;
2936}
2937
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002938static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002939 enum query_opcode opcode, enum desc_idn idn, u8 index,
2940 u8 selector, u8 *desc_buf, int *buf_len)
2941{
2942 struct ufs_query_req *request = NULL;
2943 struct ufs_query_res *response = NULL;
2944 int err;
2945
2946 BUG_ON(!hba);
2947
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002948 ufshcd_hold(hba, false);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002949 if (!desc_buf) {
2950 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2951 __func__, opcode);
2952 err = -EINVAL;
2953 goto out;
2954 }
2955
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002956 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002957 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2958 __func__, *buf_len);
2959 err = -EINVAL;
2960 goto out;
2961 }
2962
2963 mutex_lock(&hba->dev_cmd.lock);
2964 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2965 selector);
2966 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002967 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002968
2969 switch (opcode) {
2970 case UPIU_QUERY_OPCODE_WRITE_DESC:
2971 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2972 break;
2973 case UPIU_QUERY_OPCODE_READ_DESC:
2974 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2975 break;
2976 default:
2977 dev_err(hba->dev,
2978 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2979 __func__, opcode);
2980 err = -EINVAL;
2981 goto out_unlock;
2982 }
2983
2984 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2985
2986 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002987 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2988 __func__, opcode, idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002989 goto out_unlock;
2990 }
2991
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002992 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002993
2994out_unlock:
Bean Huocfcbae32019-11-12 23:34:36 +01002995 hba->dev_cmd.query.descriptor = NULL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002996 mutex_unlock(&hba->dev_cmd.lock);
2997out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002998 ufshcd_release(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002999 return err;
3000}
3001
3002/**
Bart Van Assche8aa29f12018-03-01 15:07:20 -08003003 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
3004 * @hba: per-adapter instance
3005 * @opcode: attribute opcode
3006 * @idn: attribute idn to access
3007 * @index: index field
3008 * @selector: selector field
3009 * @desc_buf: the buffer that contains the descriptor
3010 * @buf_len: length parameter passed to the device
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003011 *
3012 * Returns 0 for success, non-zero in case of failure.
3013 * The buf_len parameter will contain, on return, the length parameter
3014 * received on the response.
3015 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02003016int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3017 enum query_opcode opcode,
3018 enum desc_idn idn, u8 index,
3019 u8 selector,
3020 u8 *desc_buf, int *buf_len)
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003021{
3022 int err;
3023 int retries;
3024
3025 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3026 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3027 selector, desc_buf, buf_len);
3028 if (!err || err == -EINVAL)
3029 break;
3030 }
3031
3032 return err;
3033}
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003034
3035/**
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003036 * ufshcd_read_desc_length - read the specified descriptor length from header
3037 * @hba: Pointer to adapter instance
3038 * @desc_id: descriptor idn value
3039 * @desc_index: descriptor index
3040 * @desc_length: pointer to variable to read the length of descriptor
3041 *
3042 * Return 0 in case of success, non-zero otherwise
3043 */
3044static int ufshcd_read_desc_length(struct ufs_hba *hba,
3045 enum desc_idn desc_id,
3046 int desc_index,
3047 int *desc_length)
3048{
3049 int ret;
3050 u8 header[QUERY_DESC_HDR_SIZE];
3051 int header_len = QUERY_DESC_HDR_SIZE;
3052
3053 if (desc_id >= QUERY_DESC_IDN_MAX)
3054 return -EINVAL;
3055
3056 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3057 desc_id, desc_index, 0, header,
3058 &header_len);
3059
3060 if (ret) {
3061 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
3062 __func__, desc_id);
3063 return ret;
3064 } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
3065 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
3066 __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3067 desc_id);
3068 ret = -EINVAL;
3069 }
3070
3071 *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3072 return ret;
3073
3074}
3075
3076/**
3077 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3078 * @hba: Pointer to adapter instance
3079 * @desc_id: descriptor idn value
3080 * @desc_len: mapped desc length (out)
3081 *
3082 * Return 0 in case of success, non-zero otherwise
3083 */
3084int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3085 enum desc_idn desc_id, int *desc_len)
3086{
3087 switch (desc_id) {
3088 case QUERY_DESC_IDN_DEVICE:
3089 *desc_len = hba->desc_size.dev_desc;
3090 break;
3091 case QUERY_DESC_IDN_POWER:
3092 *desc_len = hba->desc_size.pwr_desc;
3093 break;
3094 case QUERY_DESC_IDN_GEOMETRY:
3095 *desc_len = hba->desc_size.geom_desc;
3096 break;
3097 case QUERY_DESC_IDN_CONFIGURATION:
3098 *desc_len = hba->desc_size.conf_desc;
3099 break;
3100 case QUERY_DESC_IDN_UNIT:
3101 *desc_len = hba->desc_size.unit_desc;
3102 break;
3103 case QUERY_DESC_IDN_INTERCONNECT:
3104 *desc_len = hba->desc_size.interc_desc;
3105 break;
3106 case QUERY_DESC_IDN_STRING:
3107 *desc_len = QUERY_DESC_MAX_SIZE;
3108 break;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02003109 case QUERY_DESC_IDN_HEALTH:
3110 *desc_len = hba->desc_size.hlth_desc;
3111 break;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003112 case QUERY_DESC_IDN_RFU_0:
3113 case QUERY_DESC_IDN_RFU_1:
3114 *desc_len = 0;
3115 break;
3116 default:
3117 *desc_len = 0;
3118 return -EINVAL;
3119 }
3120 return 0;
3121}
3122EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3123
3124/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003125 * ufshcd_read_desc_param - read the specified descriptor parameter
3126 * @hba: Pointer to adapter instance
3127 * @desc_id: descriptor idn value
3128 * @desc_index: descriptor index
3129 * @param_offset: offset of the parameter to read
3130 * @param_read_buf: pointer to buffer where parameter would be read
3131 * @param_size: sizeof(param_read_buf)
3132 *
3133 * Return 0 in case of success, non-zero otherwise
3134 */
Stanislav Nijnikov45bced82018-02-15 14:14:02 +02003135int ufshcd_read_desc_param(struct ufs_hba *hba,
3136 enum desc_idn desc_id,
3137 int desc_index,
3138 u8 param_offset,
3139 u8 *param_read_buf,
3140 u8 param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003141{
3142 int ret;
3143 u8 *desc_buf;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003144 int buff_len;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003145 bool is_kmalloc = true;
3146
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003147 /* Safety check */
3148 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003149 return -EINVAL;
3150
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003151 /* Get the max length of descriptor from structure filled up at probe
3152 * time.
3153 */
3154 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003155
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003156 /* Sanity checks */
3157 if (ret || !buff_len) {
3158 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3159 __func__);
3160 return ret;
3161 }
3162
3163 /* Check whether we need temp memory */
3164 if (param_offset != 0 || param_size < buff_len) {
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003165 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3166 if (!desc_buf)
3167 return -ENOMEM;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003168 } else {
3169 desc_buf = param_read_buf;
3170 is_kmalloc = false;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003171 }
3172
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003173 /* Request for full descriptor */
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003174 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003175 desc_id, desc_index, 0,
3176 desc_buf, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003177
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003178 if (ret) {
3179 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3180 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003181 goto out;
3182 }
3183
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003184 /* Sanity check */
3185 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3186 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3187 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3188 ret = -EINVAL;
3189 goto out;
3190 }
3191
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003192 /* Check wherher we will not copy more data, than available */
3193 if (is_kmalloc && param_size > buff_len)
3194 param_size = buff_len;
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003195
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003196 if (is_kmalloc)
3197 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3198out:
3199 if (is_kmalloc)
3200 kfree(desc_buf);
3201 return ret;
3202}
3203
3204static inline int ufshcd_read_desc(struct ufs_hba *hba,
3205 enum desc_idn desc_id,
3206 int desc_index,
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003207 void *buf,
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003208 u32 size)
3209{
3210 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3211}
3212
3213static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3214 u8 *buf,
3215 u32 size)
3216{
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02003217 return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003218}
3219
Tomas Winkler8209b6d2017-01-05 10:45:10 +02003220static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
Yaniv Gardib573d482016-03-10 17:37:09 +02003221{
3222 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3223}
Yaniv Gardib573d482016-03-10 17:37:09 +02003224
3225/**
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003226 * struct uc_string_id - unicode string
3227 *
3228 * @len: size of this descriptor inclusive
3229 * @type: descriptor type
3230 * @uc: unicode string character
3231 */
3232struct uc_string_id {
3233 u8 len;
3234 u8 type;
3235 wchar_t uc[0];
3236} __packed;
3237
3238/* replace non-printable or non-ASCII characters with spaces */
3239static inline char ufshcd_remove_non_printable(u8 ch)
3240{
3241 return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3242}
3243
3244/**
Yaniv Gardib573d482016-03-10 17:37:09 +02003245 * ufshcd_read_string_desc - read string descriptor
3246 * @hba: pointer to adapter instance
3247 * @desc_index: descriptor index
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003248 * @buf: pointer to buffer where descriptor would be read,
3249 * the caller should free the memory.
Yaniv Gardib573d482016-03-10 17:37:09 +02003250 * @ascii: if true convert from unicode to ascii characters
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003251 * null terminated string.
Yaniv Gardib573d482016-03-10 17:37:09 +02003252 *
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003253 * Return:
3254 * * string size on success.
3255 * * -ENOMEM: on allocation failure
3256 * * -EINVAL: on a wrong parameter
Yaniv Gardib573d482016-03-10 17:37:09 +02003257 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003258int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3259 u8 **buf, bool ascii)
Yaniv Gardib573d482016-03-10 17:37:09 +02003260{
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003261 struct uc_string_id *uc_str;
3262 u8 *str;
3263 int ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003264
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003265 if (!buf)
3266 return -EINVAL;
Yaniv Gardib573d482016-03-10 17:37:09 +02003267
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003268 uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3269 if (!uc_str)
3270 return -ENOMEM;
3271
3272 ret = ufshcd_read_desc(hba, QUERY_DESC_IDN_STRING,
3273 desc_index, uc_str,
3274 QUERY_DESC_MAX_SIZE);
3275 if (ret < 0) {
3276 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3277 QUERY_REQ_RETRIES, ret);
3278 str = NULL;
3279 goto out;
3280 }
3281
3282 if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3283 dev_dbg(hba->dev, "String Desc is of zero length\n");
3284 str = NULL;
3285 ret = 0;
Yaniv Gardib573d482016-03-10 17:37:09 +02003286 goto out;
3287 }
3288
3289 if (ascii) {
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003290 ssize_t ascii_len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003291 int i;
Yaniv Gardib573d482016-03-10 17:37:09 +02003292 /* remove header and divide by 2 to move from UTF16 to UTF8 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003293 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3294 str = kzalloc(ascii_len, GFP_KERNEL);
3295 if (!str) {
3296 ret = -ENOMEM;
Tiezhu Yangfcbefc32016-06-25 12:35:22 +08003297 goto out;
Yaniv Gardib573d482016-03-10 17:37:09 +02003298 }
3299
3300 /*
3301 * the descriptor contains string in UTF16 format
3302 * we need to convert to utf-8 so it can be displayed
3303 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003304 ret = utf16s_to_utf8s(uc_str->uc,
3305 uc_str->len - QUERY_DESC_HDR_SIZE,
3306 UTF16_BIG_ENDIAN, str, ascii_len);
Yaniv Gardib573d482016-03-10 17:37:09 +02003307
3308 /* replace non-printable or non-ASCII characters with spaces */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003309 for (i = 0; i < ret; i++)
3310 str[i] = ufshcd_remove_non_printable(str[i]);
Yaniv Gardib573d482016-03-10 17:37:09 +02003311
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003312 str[ret++] = '\0';
3313
3314 } else {
YueHaibing5f577042019-08-31 12:44:24 +00003315 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003316 if (!str) {
3317 ret = -ENOMEM;
3318 goto out;
3319 }
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003320 ret = uc_str->len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003321 }
3322out:
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003323 *buf = str;
3324 kfree(uc_str);
3325 return ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003326}
Yaniv Gardib573d482016-03-10 17:37:09 +02003327
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003328/**
3329 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3330 * @hba: Pointer to adapter instance
3331 * @lun: lun id
3332 * @param_offset: offset of the parameter to read
3333 * @param_read_buf: pointer to buffer where parameter would be read
3334 * @param_size: sizeof(param_read_buf)
3335 *
3336 * Return 0 in case of success, non-zero otherwise
3337 */
3338static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3339 int lun,
3340 enum unit_desc_param param_offset,
3341 u8 *param_read_buf,
3342 u32 param_size)
3343{
3344 /*
3345 * Unit descriptors are only available for general purpose LUs (LUN id
3346 * from 0 to 7) and RPMB Well known LU.
3347 */
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02003348 if (!ufs_is_valid_unit_desc_lun(lun))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003349 return -EOPNOTSUPP;
3350
3351 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3352 param_offset, param_read_buf, param_size);
3353}
3354
3355/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303356 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3357 * @hba: per adapter instance
3358 *
3359 * 1. Allocate DMA memory for Command Descriptor array
3360 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3361 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3362 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3363 * (UTMRDL)
3364 * 4. Allocate memory for local reference block(lrb).
3365 *
3366 * Returns 0 for success, non-zero in case of failure
3367 */
3368static int ufshcd_memory_alloc(struct ufs_hba *hba)
3369{
3370 size_t utmrdl_size, utrdl_size, ucdl_size;
3371
3372 /* Allocate memory for UTP command descriptors */
3373 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003374 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3375 ucdl_size,
3376 &hba->ucdl_dma_addr,
3377 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303378
3379 /*
3380 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3381 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3382 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3383 * be aligned to 128 bytes as well
3384 */
3385 if (!hba->ucdl_base_addr ||
3386 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303387 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303388 "Command Descriptor Memory allocation failed\n");
3389 goto out;
3390 }
3391
3392 /*
3393 * Allocate memory for UTP Transfer descriptors
3394 * UFSHCI requires 1024 byte alignment of UTRD
3395 */
3396 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003397 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3398 utrdl_size,
3399 &hba->utrdl_dma_addr,
3400 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303401 if (!hba->utrdl_base_addr ||
3402 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303403 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303404 "Transfer Descriptor Memory allocation failed\n");
3405 goto out;
3406 }
3407
3408 /*
3409 * Allocate memory for UTP Task Management descriptors
3410 * UFSHCI requires 1024 byte alignment of UTMRD
3411 */
3412 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003413 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3414 utmrdl_size,
3415 &hba->utmrdl_dma_addr,
3416 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303417 if (!hba->utmrdl_base_addr ||
3418 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303419 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303420 "Task Management Descriptor Memory allocation failed\n");
3421 goto out;
3422 }
3423
3424 /* Allocate memory for local reference block */
Kees Cooka86854d2018-06-12 14:07:58 -07003425 hba->lrb = devm_kcalloc(hba->dev,
3426 hba->nutrs, sizeof(struct ufshcd_lrb),
Seungwon Jeon2953f852013-06-27 13:31:54 +09003427 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303428 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303429 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303430 goto out;
3431 }
3432 return 0;
3433out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303434 return -ENOMEM;
3435}
3436
3437/**
3438 * ufshcd_host_memory_configure - configure local reference block with
3439 * memory offsets
3440 * @hba: per adapter instance
3441 *
3442 * Configure Host memory space
3443 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3444 * address.
3445 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3446 * and PRDT offset.
3447 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3448 * into local reference block.
3449 */
3450static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3451{
3452 struct utp_transfer_cmd_desc *cmd_descp;
3453 struct utp_transfer_req_desc *utrdlp;
3454 dma_addr_t cmd_desc_dma_addr;
3455 dma_addr_t cmd_desc_element_addr;
3456 u16 response_offset;
3457 u16 prdt_offset;
3458 int cmd_desc_size;
3459 int i;
3460
3461 utrdlp = hba->utrdl_base_addr;
3462 cmd_descp = hba->ucdl_base_addr;
3463
3464 response_offset =
3465 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3466 prdt_offset =
3467 offsetof(struct utp_transfer_cmd_desc, prd_table);
3468
3469 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3470 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3471
3472 for (i = 0; i < hba->nutrs; i++) {
3473 /* Configure UTRD with command descriptor base address */
3474 cmd_desc_element_addr =
3475 (cmd_desc_dma_addr + (cmd_desc_size * i));
3476 utrdlp[i].command_desc_base_addr_lo =
3477 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3478 utrdlp[i].command_desc_base_addr_hi =
3479 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3480
3481 /* Response upiu and prdt offset should be in double words */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003482 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3483 utrdlp[i].response_upiu_offset =
3484 cpu_to_le16(response_offset);
3485 utrdlp[i].prd_table_offset =
3486 cpu_to_le16(prdt_offset);
3487 utrdlp[i].response_upiu_length =
3488 cpu_to_le16(ALIGNED_UPIU_SIZE);
3489 } else {
3490 utrdlp[i].response_upiu_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303491 cpu_to_le16((response_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003492 utrdlp[i].prd_table_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303493 cpu_to_le16((prdt_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003494 utrdlp[i].response_upiu_length =
Sujit Reddy Thumma3ca316c2013-06-26 22:39:30 +05303495 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003496 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303497
3498 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003499 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3500 (i * sizeof(struct utp_transfer_req_desc));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303501 hba->lrb[i].ucd_req_ptr =
3502 (struct utp_upiu_req *)(cmd_descp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003503 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303504 hba->lrb[i].ucd_rsp_ptr =
3505 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003506 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3507 response_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303508 hba->lrb[i].ucd_prdt_ptr =
3509 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003510 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3511 prdt_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303512 }
3513}
3514
3515/**
3516 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3517 * @hba: per adapter instance
3518 *
3519 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3520 * in order to initialize the Unipro link startup procedure.
3521 * Once the Unipro links are up, the device connected to the controller
3522 * is detected.
3523 *
3524 * Returns 0 on success, non-zero value on failure
3525 */
3526static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3527{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303528 struct uic_command uic_cmd = {0};
3529 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303530
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303531 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3532
3533 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3534 if (ret)
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003535 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303536 "dme-link-startup: error code %d\n", ret);
3537 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303538}
Alim Akhtar4404c5d2018-05-06 15:44:17 +05303539/**
3540 * ufshcd_dme_reset - UIC command for DME_RESET
3541 * @hba: per adapter instance
3542 *
3543 * DME_RESET command is issued in order to reset UniPro stack.
3544 * This function now deal with cold reset.
3545 *
3546 * Returns 0 on success, non-zero value on failure
3547 */
3548static int ufshcd_dme_reset(struct ufs_hba *hba)
3549{
3550 struct uic_command uic_cmd = {0};
3551 int ret;
3552
3553 uic_cmd.command = UIC_CMD_DME_RESET;
3554
3555 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3556 if (ret)
3557 dev_err(hba->dev,
3558 "dme-reset: error code %d\n", ret);
3559
3560 return ret;
3561}
3562
3563/**
3564 * ufshcd_dme_enable - UIC command for DME_ENABLE
3565 * @hba: per adapter instance
3566 *
3567 * DME_ENABLE command is issued in order to enable UniPro stack.
3568 *
3569 * Returns 0 on success, non-zero value on failure
3570 */
3571static int ufshcd_dme_enable(struct ufs_hba *hba)
3572{
3573 struct uic_command uic_cmd = {0};
3574 int ret;
3575
3576 uic_cmd.command = UIC_CMD_DME_ENABLE;
3577
3578 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3579 if (ret)
3580 dev_err(hba->dev,
3581 "dme-reset: error code %d\n", ret);
3582
3583 return ret;
3584}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303585
Yaniv Gardicad2e032015-03-31 17:37:14 +03003586static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3587{
3588 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3589 unsigned long min_sleep_time_us;
3590
3591 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3592 return;
3593
3594 /*
3595 * last_dme_cmd_tstamp will be 0 only for 1st call to
3596 * this function
3597 */
3598 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3599 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3600 } else {
3601 unsigned long delta =
3602 (unsigned long) ktime_to_us(
3603 ktime_sub(ktime_get(),
3604 hba->last_dme_cmd_tstamp));
3605
3606 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3607 min_sleep_time_us =
3608 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3609 else
3610 return; /* no more delay required */
3611 }
3612
3613 /* allow sleep for extra 50us if needed */
3614 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3615}
3616
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303617/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303618 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3619 * @hba: per adapter instance
3620 * @attr_sel: uic command argument1
3621 * @attr_set: attribute set type as uic command argument2
3622 * @mib_val: setting value as uic command argument3
3623 * @peer: indicate whether peer or local
3624 *
3625 * Returns 0 on success, non-zero value on failure
3626 */
3627int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3628 u8 attr_set, u32 mib_val, u8 peer)
3629{
3630 struct uic_command uic_cmd = {0};
3631 static const char *const action[] = {
3632 "dme-set",
3633 "dme-peer-set"
3634 };
3635 const char *set = action[!!peer];
3636 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003637 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303638
3639 uic_cmd.command = peer ?
3640 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3641 uic_cmd.argument1 = attr_sel;
3642 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3643 uic_cmd.argument3 = mib_val;
3644
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003645 do {
3646 /* for peer attributes we retry upon failure */
3647 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3648 if (ret)
3649 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3650 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3651 } while (ret && peer && --retries);
3652
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003653 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003654 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003655 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3656 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303657
3658 return ret;
3659}
3660EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3661
3662/**
3663 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3664 * @hba: per adapter instance
3665 * @attr_sel: uic command argument1
3666 * @mib_val: the value of the attribute as returned by the UIC command
3667 * @peer: indicate whether peer or local
3668 *
3669 * Returns 0 on success, non-zero value on failure
3670 */
3671int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3672 u32 *mib_val, u8 peer)
3673{
3674 struct uic_command uic_cmd = {0};
3675 static const char *const action[] = {
3676 "dme-get",
3677 "dme-peer-get"
3678 };
3679 const char *get = action[!!peer];
3680 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003681 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003682 struct ufs_pa_layer_attr orig_pwr_info;
3683 struct ufs_pa_layer_attr temp_pwr_info;
3684 bool pwr_mode_change = false;
3685
3686 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3687 orig_pwr_info = hba->pwr_info;
3688 temp_pwr_info = orig_pwr_info;
3689
3690 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3691 orig_pwr_info.pwr_rx == FAST_MODE) {
3692 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3693 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3694 pwr_mode_change = true;
3695 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3696 orig_pwr_info.pwr_rx == SLOW_MODE) {
3697 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3698 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3699 pwr_mode_change = true;
3700 }
3701 if (pwr_mode_change) {
3702 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3703 if (ret)
3704 goto out;
3705 }
3706 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303707
3708 uic_cmd.command = peer ?
3709 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3710 uic_cmd.argument1 = attr_sel;
3711
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003712 do {
3713 /* for peer attributes we retry upon failure */
3714 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3715 if (ret)
3716 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3717 get, UIC_GET_ATTR_ID(attr_sel), ret);
3718 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303719
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003720 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003721 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003722 get, UIC_GET_ATTR_ID(attr_sel),
3723 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003724
3725 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303726 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003727
3728 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3729 && pwr_mode_change)
3730 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303731out:
3732 return ret;
3733}
3734EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3735
3736/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003737 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3738 * state) and waits for it to take effect.
3739 *
3740 * @hba: per adapter instance
3741 * @cmd: UIC command to execute
3742 *
3743 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3744 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3745 * and device UniPro link and hence it's final completion would be indicated by
3746 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3747 * addition to normal UIC command completion Status (UCCS). This function only
3748 * returns after the relevant status bits indicate the completion.
3749 *
3750 * Returns 0 on success, non-zero value on failure
3751 */
3752static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3753{
3754 struct completion uic_async_done;
3755 unsigned long flags;
3756 u8 status;
3757 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003758 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003759
3760 mutex_lock(&hba->uic_cmd_mutex);
3761 init_completion(&uic_async_done);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003762 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003763
3764 spin_lock_irqsave(hba->host->host_lock, flags);
3765 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003766 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3767 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3768 /*
3769 * Make sure UIC command completion interrupt is disabled before
3770 * issuing UIC command.
3771 */
3772 wmb();
3773 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003774 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003775 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3776 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003777 if (ret) {
3778 dev_err(hba->dev,
3779 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3780 cmd->command, cmd->argument3, ret);
3781 goto out;
3782 }
3783
3784 if (!wait_for_completion_timeout(hba->uic_async_done,
3785 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3786 dev_err(hba->dev,
3787 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3788 cmd->command, cmd->argument3);
3789 ret = -ETIMEDOUT;
3790 goto out;
3791 }
3792
3793 status = ufshcd_get_upmcrs(hba);
3794 if (status != PWR_LOCAL) {
3795 dev_err(hba->dev,
Zang Leigang479da362017-09-19 16:50:30 +08003796 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003797 cmd->command, status);
3798 ret = (status != PWR_OK) ? status : -1;
3799 }
3800out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08003801 if (ret) {
3802 ufshcd_print_host_state(hba);
3803 ufshcd_print_pwr_info(hba);
3804 ufshcd_print_host_regs(hba);
3805 }
3806
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003807 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003808 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003809 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003810 if (reenable_intr)
3811 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003812 spin_unlock_irqrestore(hba->host->host_lock, flags);
3813 mutex_unlock(&hba->uic_cmd_mutex);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003814
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003815 return ret;
3816}
3817
3818/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303819 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3820 * using DME_SET primitives.
3821 * @hba: per adapter instance
3822 * @mode: powr mode value
3823 *
3824 * Returns 0 on success, non-zero value on failure
3825 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05303826static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303827{
3828 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003829 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303830
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003831 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3832 ret = ufshcd_dme_set(hba,
3833 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3834 if (ret) {
3835 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3836 __func__, ret);
3837 goto out;
3838 }
3839 }
3840
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303841 uic_cmd.command = UIC_CMD_DME_SET;
3842 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3843 uic_cmd.argument3 = mode;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003844 ufshcd_hold(hba, false);
3845 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3846 ufshcd_release(hba);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303847
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003848out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003849 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003850}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303851
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003852static int ufshcd_link_recovery(struct ufs_hba *hba)
3853{
3854 int ret;
3855 unsigned long flags;
3856
3857 spin_lock_irqsave(hba->host->host_lock, flags);
3858 hba->ufshcd_state = UFSHCD_STATE_RESET;
3859 ufshcd_set_eh_in_progress(hba);
3860 spin_unlock_irqrestore(hba->host->host_lock, flags);
3861
Can Guoebdd1df2019-11-14 22:09:24 -08003862 /* Reset the attached device */
3863 ufshcd_vops_device_reset(hba);
3864
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003865 ret = ufshcd_host_reset_and_restore(hba);
3866
3867 spin_lock_irqsave(hba->host->host_lock, flags);
3868 if (ret)
3869 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3870 ufshcd_clear_eh_in_progress(hba);
3871 spin_unlock_irqrestore(hba->host->host_lock, flags);
3872
3873 if (ret)
3874 dev_err(hba->dev, "%s: link recovery failed, err %d",
3875 __func__, ret);
3876
3877 return ret;
3878}
3879
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003880static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003881{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003882 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003883 struct uic_command uic_cmd = {0};
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003884 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003885
Kiwoong Kimee32c902016-11-10 21:17:43 +09003886 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3887
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003888 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003889 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003890 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3891 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003892
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003893 if (ret) {
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003894 int err;
3895
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003896 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3897 __func__, ret);
3898
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003899 /*
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003900 * If link recovery fails then return error code returned from
3901 * ufshcd_link_recovery().
3902 * If link recovery succeeds then return -EAGAIN to attempt
3903 * hibern8 enter retry again.
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003904 */
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003905 err = ufshcd_link_recovery(hba);
3906 if (err) {
3907 dev_err(hba->dev, "%s: link recovery failed", __func__);
3908 ret = err;
3909 } else {
3910 ret = -EAGAIN;
3911 }
Kiwoong Kimee32c902016-11-10 21:17:43 +09003912 } else
3913 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3914 POST_CHANGE);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003915
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003916 return ret;
3917}
3918
3919static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3920{
3921 int ret = 0, retries;
3922
3923 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3924 ret = __ufshcd_uic_hibern8_enter(hba);
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003925 if (!ret)
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003926 goto out;
3927 }
3928out:
3929 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003930}
3931
3932static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3933{
3934 struct uic_command uic_cmd = {0};
3935 int ret;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003936 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003937
Kiwoong Kimee32c902016-11-10 21:17:43 +09003938 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3939
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003940 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3941 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003942 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3943 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3944
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303945 if (ret) {
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003946 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3947 __func__, ret);
3948 ret = ufshcd_link_recovery(hba);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003949 } else {
Kiwoong Kimee32c902016-11-10 21:17:43 +09003950 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3951 POST_CHANGE);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003952 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3953 hba->ufs_stats.hibern8_exit_cnt++;
3954 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303955
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303956 return ret;
3957}
3958
Can Guo71d848b2019-11-14 22:09:26 -08003959void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
Adrian Hunterad448372018-03-20 15:07:38 +02003960{
3961 unsigned long flags;
3962
Stanley Chuee5f1042019-05-21 14:44:52 +08003963 if (!ufshcd_is_auto_hibern8_supported(hba) || !hba->ahit)
Adrian Hunterad448372018-03-20 15:07:38 +02003964 return;
3965
3966 spin_lock_irqsave(hba->host->host_lock, flags);
3967 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3968 spin_unlock_irqrestore(hba->host->host_lock, flags);
3969}
3970
Yaniv Gardi50646362014-10-23 13:25:13 +03003971 /**
3972 * ufshcd_init_pwr_info - setting the POR (power on reset)
3973 * values in hba power info
3974 * @hba: per-adapter instance
3975 */
3976static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3977{
3978 hba->pwr_info.gear_rx = UFS_PWM_G1;
3979 hba->pwr_info.gear_tx = UFS_PWM_G1;
3980 hba->pwr_info.lane_rx = 1;
3981 hba->pwr_info.lane_tx = 1;
3982 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3983 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3984 hba->pwr_info.hs_rate = 0;
3985}
3986
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303987/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003988 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3989 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303990 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003991static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303992{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003993 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3994
3995 if (hba->max_pwr_info.is_valid)
3996 return 0;
3997
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003998 pwr_info->pwr_tx = FAST_MODE;
3999 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004000 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304001
4002 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004003 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
4004 &pwr_info->lane_rx);
4005 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4006 &pwr_info->lane_tx);
4007
4008 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
4009 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
4010 __func__,
4011 pwr_info->lane_rx,
4012 pwr_info->lane_tx);
4013 return -EINVAL;
4014 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304015
4016 /*
4017 * First, get the maximum gears of HS speed.
4018 * If a zero value, it means there is no HSGEAR capability.
4019 * Then, get the maximum gears of PWM speed.
4020 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004021 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
4022 if (!pwr_info->gear_rx) {
4023 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4024 &pwr_info->gear_rx);
4025 if (!pwr_info->gear_rx) {
4026 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
4027 __func__, pwr_info->gear_rx);
4028 return -EINVAL;
4029 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004030 pwr_info->pwr_rx = SLOW_MODE;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304031 }
4032
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004033 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
4034 &pwr_info->gear_tx);
4035 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304036 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004037 &pwr_info->gear_tx);
4038 if (!pwr_info->gear_tx) {
4039 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
4040 __func__, pwr_info->gear_tx);
4041 return -EINVAL;
4042 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004043 pwr_info->pwr_tx = SLOW_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004044 }
4045
4046 hba->max_pwr_info.is_valid = true;
4047 return 0;
4048}
4049
4050static int ufshcd_change_power_mode(struct ufs_hba *hba,
4051 struct ufs_pa_layer_attr *pwr_mode)
4052{
4053 int ret;
4054
4055 /* if already configured to the requested pwr_mode */
4056 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4057 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4058 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4059 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4060 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4061 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4062 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4063 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4064 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304065 }
4066
4067 /*
4068 * Configure attributes for power mode change with below.
4069 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4070 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4071 * - PA_HSSERIES
4072 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004073 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4074 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4075 pwr_mode->lane_rx);
4076 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4077 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304078 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004079 else
4080 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304081
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004082 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4083 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4084 pwr_mode->lane_tx);
4085 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4086 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304087 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004088 else
4089 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304090
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004091 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4092 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4093 pwr_mode->pwr_rx == FAST_MODE ||
4094 pwr_mode->pwr_tx == FAST_MODE)
4095 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4096 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304097
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004098 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4099 | pwr_mode->pwr_tx);
4100
4101 if (ret) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304102 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004103 "%s: power mode change failed %d\n", __func__, ret);
4104 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004105 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4106 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004107
4108 memcpy(&hba->pwr_info, pwr_mode,
4109 sizeof(struct ufs_pa_layer_attr));
4110 }
4111
4112 return ret;
4113}
4114
4115/**
4116 * ufshcd_config_pwr_mode - configure a new power mode
4117 * @hba: per-adapter instance
4118 * @desired_pwr_mode: desired power configuration
4119 */
Alim Akhtar0d846e72018-05-06 15:44:18 +05304120int ufshcd_config_pwr_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004121 struct ufs_pa_layer_attr *desired_pwr_mode)
4122{
4123 struct ufs_pa_layer_attr final_params = { 0 };
4124 int ret;
4125
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004126 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4127 desired_pwr_mode, &final_params);
4128
4129 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004130 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4131
4132 ret = ufshcd_change_power_mode(hba, &final_params);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08004133 if (!ret)
4134 ufshcd_print_pwr_info(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304135
4136 return ret;
4137}
Alim Akhtar0d846e72018-05-06 15:44:18 +05304138EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304139
4140/**
Dolev Raviv68078d52013-07-30 00:35:58 +05304141 * ufshcd_complete_dev_init() - checks device readiness
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004142 * @hba: per-adapter instance
Dolev Raviv68078d52013-07-30 00:35:58 +05304143 *
4144 * Set fDeviceInit flag and poll until device toggles it.
4145 */
4146static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4147{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004148 int i;
4149 int err;
Dolev Raviv68078d52013-07-30 00:35:58 +05304150 bool flag_res = 1;
4151
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004152 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4153 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05304154 if (err) {
4155 dev_err(hba->dev,
4156 "%s setting fDeviceInit flag failed with error %d\n",
4157 __func__, err);
4158 goto out;
4159 }
4160
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004161 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4162 for (i = 0; i < 1000 && !err && flag_res; i++)
4163 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4164 QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4165
Dolev Raviv68078d52013-07-30 00:35:58 +05304166 if (err)
4167 dev_err(hba->dev,
4168 "%s reading fDeviceInit flag failed with error %d\n",
4169 __func__, err);
4170 else if (flag_res)
4171 dev_err(hba->dev,
4172 "%s fDeviceInit was not cleared by the device\n",
4173 __func__);
4174
4175out:
4176 return err;
4177}
4178
4179/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304180 * ufshcd_make_hba_operational - Make UFS controller operational
4181 * @hba: per adapter instance
4182 *
4183 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004184 * 1. Enable required interrupts
4185 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004186 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004187 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304188 *
4189 * Returns 0 on success, non-zero value on failure
4190 */
4191static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4192{
4193 int err = 0;
4194 u32 reg;
4195
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304196 /* Enable required interrupts */
4197 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4198
4199 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004200 if (ufshcd_is_intr_aggr_allowed(hba))
4201 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4202 else
4203 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304204
4205 /* Configure UTRL and UTMRL base address registers */
4206 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4207 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4208 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4209 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4210 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4211 REG_UTP_TASK_REQ_LIST_BASE_L);
4212 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4213 REG_UTP_TASK_REQ_LIST_BASE_H);
4214
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304215 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004216 * Make sure base address and interrupt setup are updated before
4217 * enabling the run/stop registers below.
4218 */
4219 wmb();
4220
4221 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304222 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304223 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004224 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304225 if (!(ufshcd_get_lists_status(reg))) {
4226 ufshcd_enable_run_stop_reg(hba);
4227 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304228 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304229 "Host controller not ready to process requests");
4230 err = -EIO;
4231 goto out;
4232 }
4233
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304234out:
4235 return err;
4236}
4237
4238/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02004239 * ufshcd_hba_stop - Send controller to reset state
4240 * @hba: per adapter instance
4241 * @can_sleep: perform sleep or just spin
4242 */
4243static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4244{
4245 int err;
4246
4247 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4248 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4249 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4250 10, 1, can_sleep);
4251 if (err)
4252 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4253}
4254
4255/**
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304256 * ufshcd_hba_execute_hce - initialize the controller
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304257 * @hba: per adapter instance
4258 *
4259 * The controller resets itself and controller firmware initialization
4260 * sequence kicks off. When controller is ready it will set
4261 * the Host Controller Enable bit to 1.
4262 *
4263 * Returns 0 on success, non-zero value on failure
4264 */
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304265static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304266{
4267 int retry;
4268
Yaniv Gardi596585a2016-03-10 17:37:08 +02004269 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304270 /* change controller state to "reset state" */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004271 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304272
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004273 /* UniPro link is disabled at this point */
4274 ufshcd_set_link_off(hba);
4275
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004276 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004277
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304278 /* start controller initialization sequence */
4279 ufshcd_hba_start(hba);
4280
4281 /*
4282 * To initialize a UFS host controller HCE bit must be set to 1.
4283 * During initialization the HCE bit value changes from 1->0->1.
4284 * When the host controller completes initialization sequence
4285 * it sets the value of HCE bit to 1. The same HCE bit is read back
4286 * to check if the controller has completed initialization sequence.
4287 * So without this delay the value HCE = 1, set in the previous
4288 * instruction might be read back.
4289 * This delay can be changed based on the controller.
4290 */
Bean Huo838c1ef2019-07-15 11:21:10 +00004291 usleep_range(1000, 1100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304292
4293 /* wait for the host controller to complete initialization */
4294 retry = 10;
4295 while (ufshcd_is_hba_active(hba)) {
4296 if (retry) {
4297 retry--;
4298 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304299 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304300 "Controller enable failed\n");
4301 return -EIO;
4302 }
Bean Huo838c1ef2019-07-15 11:21:10 +00004303 usleep_range(5000, 5100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304304 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004305
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004306 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004307 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004308
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004309 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004310
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304311 return 0;
4312}
4313
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304314static int ufshcd_hba_enable(struct ufs_hba *hba)
4315{
4316 int ret;
4317
4318 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4319 ufshcd_set_link_off(hba);
4320 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4321
4322 /* enable UIC related interrupts */
4323 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4324 ret = ufshcd_dme_reset(hba);
4325 if (!ret) {
4326 ret = ufshcd_dme_enable(hba);
4327 if (!ret)
4328 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4329 if (ret)
4330 dev_err(hba->dev,
4331 "Host controller enable failed with non-hce\n");
4332 }
4333 } else {
4334 ret = ufshcd_hba_execute_hce(hba);
4335 }
4336
4337 return ret;
4338}
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004339static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4340{
4341 int tx_lanes, i, err = 0;
4342
4343 if (!peer)
4344 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4345 &tx_lanes);
4346 else
4347 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4348 &tx_lanes);
4349 for (i = 0; i < tx_lanes; i++) {
4350 if (!peer)
4351 err = ufshcd_dme_set(hba,
4352 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4353 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4354 0);
4355 else
4356 err = ufshcd_dme_peer_set(hba,
4357 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4358 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4359 0);
4360 if (err) {
4361 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4362 __func__, peer, i, err);
4363 break;
4364 }
4365 }
4366
4367 return err;
4368}
4369
4370static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4371{
4372 return ufshcd_disable_tx_lcc(hba, true);
4373}
4374
Stanley Chu8808b4e2019-07-10 21:38:21 +08004375static void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist,
4376 u32 reg)
4377{
4378 reg_hist->reg[reg_hist->pos] = reg;
4379 reg_hist->tstamp[reg_hist->pos] = ktime_get();
4380 reg_hist->pos = (reg_hist->pos + 1) % UFS_ERR_REG_HIST_LENGTH;
4381}
4382
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304383/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304384 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304385 * @hba: per adapter instance
4386 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304387 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304388 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304389static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304390{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304391 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004392 int retries = DME_LINKSTARTUP_RETRIES;
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004393 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304394
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004395 /*
4396 * If UFS device isn't active then we will have to issue link startup
4397 * 2 times to make sure the device state move to active.
4398 */
4399 if (!ufshcd_is_ufs_dev_active(hba))
4400 link_startup_again = true;
4401
4402link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004403 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004404 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304405
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004406 ret = ufshcd_dme_link_startup(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004407
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004408 /* check if device is detected by inter-connect layer */
4409 if (!ret && !ufshcd_is_device_present(hba)) {
Stanley Chu8808b4e2019-07-10 21:38:21 +08004410 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4411 0);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004412 dev_err(hba->dev, "%s: Device not present\n", __func__);
4413 ret = -ENXIO;
4414 goto out;
4415 }
4416
4417 /*
4418 * DME link lost indication is only received when link is up,
4419 * but we can't be sure if the link is up until link startup
4420 * succeeds. So reset the local Uni-Pro and try again.
4421 */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004422 if (ret && ufshcd_hba_enable(hba)) {
4423 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4424 (u32)ret);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004425 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004426 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004427 } while (ret && retries--);
4428
Stanley Chu8808b4e2019-07-10 21:38:21 +08004429 if (ret) {
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004430 /* failed to get the link up... retire */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004431 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4432 (u32)ret);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304433 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004434 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304435
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004436 if (link_startup_again) {
4437 link_startup_again = false;
4438 retries = DME_LINKSTARTUP_RETRIES;
4439 goto link_startup;
4440 }
4441
subhashj@codeaurora.orgd2aebb92016-12-22 18:41:33 -08004442 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4443 ufshcd_init_pwr_info(hba);
4444 ufshcd_print_pwr_info(hba);
4445
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004446 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4447 ret = ufshcd_disable_device_tx_lcc(hba);
4448 if (ret)
4449 goto out;
4450 }
4451
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004452 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004453 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4454 if (ret)
4455 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004456
4457 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304458out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004459 if (ret) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304460 dev_err(hba->dev, "link startup failed %d\n", ret);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004461 ufshcd_print_host_state(hba);
4462 ufshcd_print_pwr_info(hba);
4463 ufshcd_print_host_regs(hba);
4464 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304465 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304466}
4467
4468/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304469 * ufshcd_verify_dev_init() - Verify device initialization
4470 * @hba: per-adapter instance
4471 *
4472 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4473 * device Transport Protocol (UTP) layer is ready after a reset.
4474 * If the UTP layer at the device side is not initialized, it may
4475 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4476 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4477 */
4478static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4479{
4480 int err = 0;
4481 int retries;
4482
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004483 ufshcd_hold(hba, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304484 mutex_lock(&hba->dev_cmd.lock);
4485 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4486 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4487 NOP_OUT_TIMEOUT);
4488
4489 if (!err || err == -ETIMEDOUT)
4490 break;
4491
4492 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4493 }
4494 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004495 ufshcd_release(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304496
4497 if (err)
4498 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4499 return err;
4500}
4501
4502/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004503 * ufshcd_set_queue_depth - set lun queue depth
4504 * @sdev: pointer to SCSI device
4505 *
4506 * Read bLUQueueDepth value and activate scsi tagged command
4507 * queueing. For WLUN, queue depth is set to 1. For best-effort
4508 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4509 * value that host can queue.
4510 */
4511static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4512{
4513 int ret = 0;
4514 u8 lun_qdepth;
4515 struct ufs_hba *hba;
4516
4517 hba = shost_priv(sdev->host);
4518
4519 lun_qdepth = hba->nutrs;
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02004520 ret = ufshcd_read_unit_desc_param(hba,
4521 ufshcd_scsi_to_upiu_lun(sdev->lun),
4522 UNIT_DESC_PARAM_LU_Q_DEPTH,
4523 &lun_qdepth,
4524 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004525
4526 /* Some WLUN doesn't support unit descriptor */
4527 if (ret == -EOPNOTSUPP)
4528 lun_qdepth = 1;
4529 else if (!lun_qdepth)
4530 /* eventually, we can figure out the real queue depth */
4531 lun_qdepth = hba->nutrs;
4532 else
4533 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4534
4535 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4536 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004537 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004538}
4539
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004540/*
4541 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4542 * @hba: per-adapter instance
4543 * @lun: UFS device lun id
4544 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4545 *
4546 * Returns 0 in case of success and b_lu_write_protect status would be returned
4547 * @b_lu_write_protect parameter.
4548 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4549 * Returns -EINVAL in case of invalid parameters passed to this function.
4550 */
4551static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4552 u8 lun,
4553 u8 *b_lu_write_protect)
4554{
4555 int ret;
4556
4557 if (!b_lu_write_protect)
4558 ret = -EINVAL;
4559 /*
4560 * According to UFS device spec, RPMB LU can't be write
4561 * protected so skip reading bLUWriteProtect parameter for
4562 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4563 */
4564 else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4565 ret = -ENOTSUPP;
4566 else
4567 ret = ufshcd_read_unit_desc_param(hba,
4568 lun,
4569 UNIT_DESC_PARAM_LU_WR_PROTECT,
4570 b_lu_write_protect,
4571 sizeof(*b_lu_write_protect));
4572 return ret;
4573}
4574
4575/**
4576 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4577 * status
4578 * @hba: per-adapter instance
4579 * @sdev: pointer to SCSI device
4580 *
4581 */
4582static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4583 struct scsi_device *sdev)
4584{
4585 if (hba->dev_info.f_power_on_wp_en &&
4586 !hba->dev_info.is_lu_power_on_wp) {
4587 u8 b_lu_write_protect;
4588
4589 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4590 &b_lu_write_protect) &&
4591 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4592 hba->dev_info.is_lu_power_on_wp = true;
4593 }
4594}
4595
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004596/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304597 * ufshcd_slave_alloc - handle initial SCSI device configurations
4598 * @sdev: pointer to SCSI device
4599 *
4600 * Returns success
4601 */
4602static int ufshcd_slave_alloc(struct scsi_device *sdev)
4603{
4604 struct ufs_hba *hba;
4605
4606 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304607
4608 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4609 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304610
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304611 /* allow SCSI layer to restart the device in case of errors */
4612 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004613
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004614 /* REPORT SUPPORTED OPERATION CODES is not supported */
4615 sdev->no_report_opcodes = 1;
4616
Sujit Reddy Thumma84af7e82018-01-24 09:52:35 +05304617 /* WRITE_SAME command is not supported */
4618 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004619
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004620 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004621
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004622 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4623
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004624 return 0;
4625}
4626
4627/**
4628 * ufshcd_change_queue_depth - change queue depth
4629 * @sdev: pointer to SCSI device
4630 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004631 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004632 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004633 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004634static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004635{
4636 struct ufs_hba *hba = shost_priv(sdev->host);
4637
4638 if (depth > hba->nutrs)
4639 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004640 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304641}
4642
4643/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004644 * ufshcd_slave_configure - adjust SCSI device configurations
4645 * @sdev: pointer to SCSI device
4646 */
4647static int ufshcd_slave_configure(struct scsi_device *sdev)
4648{
Stanley Chu49615ba2019-09-16 23:56:50 +08004649 struct ufs_hba *hba = shost_priv(sdev->host);
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004650 struct request_queue *q = sdev->request_queue;
4651
4652 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
Stanley Chu49615ba2019-09-16 23:56:50 +08004653
4654 if (ufshcd_is_rpm_autosuspend_allowed(hba))
4655 sdev->rpm_autosuspend = 1;
4656
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004657 return 0;
4658}
4659
4660/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304661 * ufshcd_slave_destroy - remove SCSI device configurations
4662 * @sdev: pointer to SCSI device
4663 */
4664static void ufshcd_slave_destroy(struct scsi_device *sdev)
4665{
4666 struct ufs_hba *hba;
4667
4668 hba = shost_priv(sdev->host);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004669 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004670 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4671 unsigned long flags;
4672
4673 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004674 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004675 spin_unlock_irqrestore(hba->host->host_lock, flags);
4676 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304677}
4678
4679/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304680 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004681 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304682 * @scsi_status: SCSI command status
4683 *
4684 * Returns value base on SCSI command status
4685 */
4686static inline int
4687ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4688{
4689 int result = 0;
4690
4691 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304692 case SAM_STAT_CHECK_CONDITION:
4693 ufshcd_copy_sense_data(lrbp);
Tomas Winkler30eb2e42018-11-26 10:10:34 +02004694 /* fallthrough */
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304695 case SAM_STAT_GOOD:
4696 result |= DID_OK << 16 |
4697 COMMAND_COMPLETE << 8 |
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304698 scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304699 break;
4700 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304701 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304702 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304703 ufshcd_copy_sense_data(lrbp);
4704 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304705 break;
4706 default:
4707 result |= DID_ERROR << 16;
4708 break;
4709 } /* end of switch */
4710
4711 return result;
4712}
4713
4714/**
4715 * ufshcd_transfer_rsp_status - Get overall status of the response
4716 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004717 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304718 *
4719 * Returns result of the command to notify SCSI midlayer
4720 */
4721static inline int
4722ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4723{
4724 int result = 0;
4725 int scsi_status;
4726 int ocs;
4727
4728 /* overall command status of utrd */
4729 ocs = ufshcd_get_tr_ocs(lrbp);
4730
4731 switch (ocs) {
4732 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304733 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004734 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304735 switch (result) {
4736 case UPIU_TRANSACTION_RESPONSE:
4737 /*
4738 * get the response UPIU result to extract
4739 * the SCSI command status
4740 */
4741 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4742
4743 /*
4744 * get the result based on SCSI status response
4745 * to notify the SCSI midlayer of the command status
4746 */
4747 scsi_status = result & MASK_SCSI_STATUS;
4748 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304749
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02004750 /*
4751 * Currently we are only supporting BKOPs exception
4752 * events hence we can ignore BKOPs exception event
4753 * during power management callbacks. BKOPs exception
4754 * event is not expected to be raised in runtime suspend
4755 * callback as it allows the urgent bkops.
4756 * During system suspend, we are anyway forcefully
4757 * disabling the bkops and if urgent bkops is needed
4758 * it will be enabled on system resume. Long term
4759 * solution could be to abort the system suspend if
4760 * UFS device needs urgent BKOPs.
4761 */
4762 if (!hba->pm_op_in_progress &&
4763 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304764 schedule_work(&hba->eeh_work);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304765 break;
4766 case UPIU_TRANSACTION_REJECT_UPIU:
4767 /* TODO: handle Reject UPIU Response */
4768 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304769 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304770 "Reject UPIU not fully implemented\n");
4771 break;
4772 default:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304773 dev_err(hba->dev,
4774 "Unexpected request response code = %x\n",
4775 result);
Stanley Chue0347d82019-04-15 20:23:38 +08004776 result = DID_ERROR << 16;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304777 break;
4778 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304779 break;
4780 case OCS_ABORTED:
4781 result |= DID_ABORT << 16;
4782 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304783 case OCS_INVALID_COMMAND_STATUS:
4784 result |= DID_REQUEUE << 16;
4785 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304786 case OCS_INVALID_CMD_TABLE_ATTR:
4787 case OCS_INVALID_PRDT_ATTR:
4788 case OCS_MISMATCH_DATA_BUF_SIZE:
4789 case OCS_MISMATCH_RESP_UPIU_SIZE:
4790 case OCS_PEER_COMM_FAILURE:
4791 case OCS_FATAL_ERROR:
4792 default:
4793 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304794 dev_err(hba->dev,
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004795 "OCS error from controller = %x for tag %d\n",
4796 ocs, lrbp->task_tag);
4797 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08004798 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304799 break;
4800 } /* end of switch */
4801
Dolev Raviv66cc8202016-12-22 18:39:42 -08004802 if (host_byte(result) != DID_OK)
4803 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304804 return result;
4805}
4806
4807/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304808 * ufshcd_uic_cmd_compl - handle completion of uic command
4809 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304810 * @intr_status: interrupt status generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004811 *
4812 * Returns
4813 * IRQ_HANDLED - If interrupt is valid
4814 * IRQ_NONE - If invalid interrupt
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304815 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004816static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304817{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004818 irqreturn_t retval = IRQ_NONE;
4819
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304820 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304821 hba->active_uic_cmd->argument2 |=
4822 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304823 hba->active_uic_cmd->argument3 =
4824 ufshcd_get_dme_attr_val(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304825 complete(&hba->active_uic_cmd->done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004826 retval = IRQ_HANDLED;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304827 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304828
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004829 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004830 complete(hba->uic_async_done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004831 retval = IRQ_HANDLED;
4832 }
4833 return retval;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304834}
4835
4836/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004837 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304838 * @hba: per adapter instance
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004839 * @completed_reqs: requests to complete
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304840 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004841static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4842 unsigned long completed_reqs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304843{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304844 struct ufshcd_lrb *lrbp;
4845 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304846 int result;
4847 int index;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004848
Dolev Ravive9d501b2014-07-01 12:22:37 +03004849 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4850 lrbp = &hba->lrb[index];
4851 cmd = lrbp->cmd;
4852 if (cmd) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004853 ufshcd_add_command_trace(hba, index, "complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004854 result = ufshcd_transfer_rsp_status(hba, lrbp);
4855 scsi_dma_unmap(cmd);
4856 cmd->result = result;
4857 /* Mark completed command as NULL in LRB */
4858 lrbp->cmd = NULL;
4859 clear_bit_unlock(index, &hba->lrb_in_use);
4860 /* Do not touch lrbp after scsi done */
4861 cmd->scsi_done(cmd);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004862 __ufshcd_release(hba);
Joao Pinto300bb132016-05-11 12:21:27 +01004863 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4864 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004865 if (hba->dev_cmd.complete) {
4866 ufshcd_add_command_trace(hba, index,
4867 "dev_complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004868 complete(hba->dev_cmd.complete);
Lee Susman1a07f2d2016-12-22 18:42:03 -08004869 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03004870 }
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08004871 if (ufshcd_is_clkscaling_supported(hba))
4872 hba->clk_scaling.active_reqs--;
Zang Leigang09017182017-09-27 10:06:06 +08004873
4874 lrbp->compl_time_stamp = ktime_get();
Dolev Ravive9d501b2014-07-01 12:22:37 +03004875 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304876
4877 /* clear corresponding bits of completed commands */
4878 hba->outstanding_reqs ^= completed_reqs;
4879
Sahitya Tummala856b3482014-09-25 15:32:34 +03004880 ufshcd_clk_scaling_update_busy(hba);
4881
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304882 /* we might have free'd some tags above */
4883 wake_up(&hba->dev_cmd.tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304884}
4885
4886/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004887 * ufshcd_transfer_req_compl - handle SCSI and query command completion
4888 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004889 *
4890 * Returns
4891 * IRQ_HANDLED - If interrupt is valid
4892 * IRQ_NONE - If invalid interrupt
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004893 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004894static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba)
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004895{
4896 unsigned long completed_reqs;
4897 u32 tr_doorbell;
4898
4899 /* Resetting interrupt aggregation counters first and reading the
4900 * DOOR_BELL afterward allows us to handle all the completed requests.
4901 * In order to prevent other interrupts starvation the DB is read once
4902 * after reset. The down side of this solution is the possibility of
4903 * false interrupt if device completes another request after resetting
4904 * aggregation and before reading the DB.
4905 */
Alim Akhtar5ac6abc2018-05-06 15:44:16 +05304906 if (ufshcd_is_intr_aggr_allowed(hba) &&
4907 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004908 ufshcd_reset_intr_aggr(hba);
4909
4910 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4911 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4912
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004913 if (completed_reqs) {
4914 __ufshcd_transfer_req_compl(hba, completed_reqs);
4915 return IRQ_HANDLED;
4916 } else {
4917 return IRQ_NONE;
4918 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004919}
4920
4921/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304922 * ufshcd_disable_ee - disable exception event
4923 * @hba: per-adapter instance
4924 * @mask: exception event to disable
4925 *
4926 * Disables exception event in the device so that the EVENT_ALERT
4927 * bit is not set.
4928 *
4929 * Returns zero on success, non-zero error value on failure.
4930 */
4931static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4932{
4933 int err = 0;
4934 u32 val;
4935
4936 if (!(hba->ee_ctrl_mask & mask))
4937 goto out;
4938
4939 val = hba->ee_ctrl_mask & ~mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004940 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004941 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304942 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4943 if (!err)
4944 hba->ee_ctrl_mask &= ~mask;
4945out:
4946 return err;
4947}
4948
4949/**
4950 * ufshcd_enable_ee - enable exception event
4951 * @hba: per-adapter instance
4952 * @mask: exception event to enable
4953 *
4954 * Enable corresponding exception event in the device to allow
4955 * device to alert host in critical scenarios.
4956 *
4957 * Returns zero on success, non-zero error value on failure.
4958 */
4959static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4960{
4961 int err = 0;
4962 u32 val;
4963
4964 if (hba->ee_ctrl_mask & mask)
4965 goto out;
4966
4967 val = hba->ee_ctrl_mask | mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004968 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004969 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304970 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4971 if (!err)
4972 hba->ee_ctrl_mask |= mask;
4973out:
4974 return err;
4975}
4976
4977/**
4978 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4979 * @hba: per-adapter instance
4980 *
4981 * Allow device to manage background operations on its own. Enabling
4982 * this might lead to inconsistent latencies during normal data transfers
4983 * as the device is allowed to manage its own way of handling background
4984 * operations.
4985 *
4986 * Returns zero on success, non-zero on failure.
4987 */
4988static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4989{
4990 int err = 0;
4991
4992 if (hba->auto_bkops_enabled)
4993 goto out;
4994
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004995 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304996 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4997 if (err) {
4998 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4999 __func__, err);
5000 goto out;
5001 }
5002
5003 hba->auto_bkops_enabled = true;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08005004 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305005
5006 /* No need of URGENT_BKOPS exception from the device */
5007 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5008 if (err)
5009 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
5010 __func__, err);
5011out:
5012 return err;
5013}
5014
5015/**
5016 * ufshcd_disable_auto_bkops - block device in doing background operations
5017 * @hba: per-adapter instance
5018 *
5019 * Disabling background operations improves command response latency but
5020 * has drawback of device moving into critical state where the device is
5021 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
5022 * host is idle so that BKOPS are managed effectively without any negative
5023 * impacts.
5024 *
5025 * Returns zero on success, non-zero on failure.
5026 */
5027static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5028{
5029 int err = 0;
5030
5031 if (!hba->auto_bkops_enabled)
5032 goto out;
5033
5034 /*
5035 * If host assisted BKOPs is to be enabled, make sure
5036 * urgent bkops exception is allowed.
5037 */
5038 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5039 if (err) {
5040 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5041 __func__, err);
5042 goto out;
5043 }
5044
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005045 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305046 QUERY_FLAG_IDN_BKOPS_EN, NULL);
5047 if (err) {
5048 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5049 __func__, err);
5050 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5051 goto out;
5052 }
5053
5054 hba->auto_bkops_enabled = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08005055 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305056out:
5057 return err;
5058}
5059
5060/**
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005061 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305062 * @hba: per adapter instance
5063 *
5064 * After a device reset the device may toggle the BKOPS_EN flag
5065 * to default value. The s/w tracking variables should be updated
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005066 * as well. This function would change the auto-bkops state based on
5067 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305068 */
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005069static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305070{
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005071 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5072 hba->auto_bkops_enabled = false;
5073 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5074 ufshcd_enable_auto_bkops(hba);
5075 } else {
5076 hba->auto_bkops_enabled = true;
5077 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5078 ufshcd_disable_auto_bkops(hba);
5079 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305080}
5081
5082static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5083{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005084 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305085 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5086}
5087
5088/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005089 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5090 * @hba: per-adapter instance
5091 * @status: bkops_status value
5092 *
5093 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5094 * flag in the device to permit background operations if the device
5095 * bkops_status is greater than or equal to "status" argument passed to
5096 * this function, disable otherwise.
5097 *
5098 * Returns 0 for success, non-zero in case of failure.
5099 *
5100 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5101 * to know whether auto bkops is enabled or disabled after this function
5102 * returns control to it.
5103 */
5104static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5105 enum bkops_status status)
5106{
5107 int err;
5108 u32 curr_status = 0;
5109
5110 err = ufshcd_get_bkops_status(hba, &curr_status);
5111 if (err) {
5112 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5113 __func__, err);
5114 goto out;
5115 } else if (curr_status > BKOPS_STATUS_MAX) {
5116 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5117 __func__, curr_status);
5118 err = -EINVAL;
5119 goto out;
5120 }
5121
5122 if (curr_status >= status)
5123 err = ufshcd_enable_auto_bkops(hba);
5124 else
5125 err = ufshcd_disable_auto_bkops(hba);
5126out:
5127 return err;
5128}
5129
5130/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305131 * ufshcd_urgent_bkops - handle urgent bkops exception event
5132 * @hba: per-adapter instance
5133 *
5134 * Enable fBackgroundOpsEn flag in the device to permit background
5135 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005136 *
5137 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5138 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305139 */
5140static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5141{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005142 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305143}
5144
5145static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5146{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005147 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305148 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5149}
5150
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005151static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5152{
5153 int err;
5154 u32 curr_status = 0;
5155
5156 if (hba->is_urgent_bkops_lvl_checked)
5157 goto enable_auto_bkops;
5158
5159 err = ufshcd_get_bkops_status(hba, &curr_status);
5160 if (err) {
5161 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5162 __func__, err);
5163 goto out;
5164 }
5165
5166 /*
5167 * We are seeing that some devices are raising the urgent bkops
5168 * exception events even when BKOPS status doesn't indicate performace
5169 * impacted or critical. Handle these device by determining their urgent
5170 * bkops status at runtime.
5171 */
5172 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5173 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5174 __func__, curr_status);
5175 /* update the current status as the urgent bkops level */
5176 hba->urgent_bkops_lvl = curr_status;
5177 hba->is_urgent_bkops_lvl_checked = true;
5178 }
5179
5180enable_auto_bkops:
5181 err = ufshcd_enable_auto_bkops(hba);
5182out:
5183 if (err < 0)
5184 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5185 __func__, err);
5186}
5187
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305188/**
5189 * ufshcd_exception_event_handler - handle exceptions raised by device
5190 * @work: pointer to work data
5191 *
5192 * Read bExceptionEventStatus attribute from the device and handle the
5193 * exception event accordingly.
5194 */
5195static void ufshcd_exception_event_handler(struct work_struct *work)
5196{
5197 struct ufs_hba *hba;
5198 int err;
5199 u32 status = 0;
5200 hba = container_of(work, struct ufs_hba, eeh_work);
5201
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305202 pm_runtime_get_sync(hba->dev);
Maya Erez2e3611e92018-05-03 16:37:16 +05305203 scsi_block_requests(hba->host);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305204 err = ufshcd_get_ee_status(hba, &status);
5205 if (err) {
5206 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5207 __func__, err);
5208 goto out;
5209 }
5210
5211 status &= hba->ee_ctrl_mask;
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005212
5213 if (status & MASK_EE_URGENT_BKOPS)
5214 ufshcd_bkops_exception_event_handler(hba);
5215
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305216out:
Maya Erez2e3611e92018-05-03 16:37:16 +05305217 scsi_unblock_requests(hba->host);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305218 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305219 return;
5220}
5221
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005222/* Complete requests that have door-bell cleared */
5223static void ufshcd_complete_requests(struct ufs_hba *hba)
5224{
5225 ufshcd_transfer_req_compl(hba);
5226 ufshcd_tmc_handler(hba);
5227}
5228
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305229/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02005230 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5231 * to recover from the DL NAC errors or not.
5232 * @hba: per-adapter instance
5233 *
5234 * Returns true if error handling is required, false otherwise
5235 */
5236static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5237{
5238 unsigned long flags;
5239 bool err_handling = true;
5240
5241 spin_lock_irqsave(hba->host->host_lock, flags);
5242 /*
5243 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5244 * device fatal error and/or DL NAC & REPLAY timeout errors.
5245 */
5246 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5247 goto out;
5248
5249 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5250 ((hba->saved_err & UIC_ERROR) &&
5251 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5252 goto out;
5253
5254 if ((hba->saved_err & UIC_ERROR) &&
5255 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5256 int err;
5257 /*
5258 * wait for 50ms to see if we can get any other errors or not.
5259 */
5260 spin_unlock_irqrestore(hba->host->host_lock, flags);
5261 msleep(50);
5262 spin_lock_irqsave(hba->host->host_lock, flags);
5263
5264 /*
5265 * now check if we have got any other severe errors other than
5266 * DL NAC error?
5267 */
5268 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5269 ((hba->saved_err & UIC_ERROR) &&
5270 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5271 goto out;
5272
5273 /*
5274 * As DL NAC is the only error received so far, send out NOP
5275 * command to confirm if link is still active or not.
5276 * - If we don't get any response then do error recovery.
5277 * - If we get response then clear the DL NAC error bit.
5278 */
5279
5280 spin_unlock_irqrestore(hba->host->host_lock, flags);
5281 err = ufshcd_verify_dev_init(hba);
5282 spin_lock_irqsave(hba->host->host_lock, flags);
5283
5284 if (err)
5285 goto out;
5286
5287 /* Link seems to be alive hence ignore the DL NAC errors */
5288 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5289 hba->saved_err &= ~UIC_ERROR;
5290 /* clear NAC error */
5291 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5292 if (!hba->saved_uic_err) {
5293 err_handling = false;
5294 goto out;
5295 }
5296 }
5297out:
5298 spin_unlock_irqrestore(hba->host->host_lock, flags);
5299 return err_handling;
5300}
5301
5302/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305303 * ufshcd_err_handler - handle UFS errors that require s/w attention
5304 * @work: pointer to work structure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305305 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305306static void ufshcd_err_handler(struct work_struct *work)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305307{
5308 struct ufs_hba *hba;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305309 unsigned long flags;
5310 u32 err_xfer = 0;
5311 u32 err_tm = 0;
5312 int err = 0;
5313 int tag;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005314 bool needs_reset = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305315
5316 hba = container_of(work, struct ufs_hba, eh_work);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305317
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305318 pm_runtime_get_sync(hba->dev);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005319 ufshcd_hold(hba, false);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305320
5321 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005322 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305323 goto out;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305324
5325 hba->ufshcd_state = UFSHCD_STATE_RESET;
5326 ufshcd_set_eh_in_progress(hba);
5327
5328 /* Complete requests that have door-bell cleared by h/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005329 ufshcd_complete_requests(hba);
Yaniv Gardi583fa622016-03-10 17:37:13 +02005330
5331 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5332 bool ret;
5333
5334 spin_unlock_irqrestore(hba->host->host_lock, flags);
5335 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5336 ret = ufshcd_quirk_dl_nac_errors(hba);
5337 spin_lock_irqsave(hba->host->host_lock, flags);
5338 if (!ret)
5339 goto skip_err_handling;
5340 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005341 if ((hba->saved_err & INT_FATAL_ERRORS) ||
Stanley Chu82174442019-05-21 14:44:54 +08005342 (hba->saved_err & UFSHCD_UIC_HIBERN8_MASK) ||
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005343 ((hba->saved_err & UIC_ERROR) &&
5344 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5345 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5346 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5347 needs_reset = true;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305348
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005349 /*
5350 * if host reset is required then skip clearing the pending
5351 * transfers forcefully because they will automatically get
5352 * cleared after link startup.
5353 */
5354 if (needs_reset)
5355 goto skip_pending_xfer_clear;
5356
5357 /* release lock as clear command might sleep */
5358 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305359 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005360 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5361 if (ufshcd_clear_cmd(hba, tag)) {
5362 err_xfer = true;
5363 goto lock_skip_pending_xfer_clear;
5364 }
5365 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305366
5367 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005368 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5369 if (ufshcd_clear_tm_cmd(hba, tag)) {
5370 err_tm = true;
5371 goto lock_skip_pending_xfer_clear;
5372 }
5373 }
5374
5375lock_skip_pending_xfer_clear:
5376 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305377
5378 /* Complete the requests that are cleared by s/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005379 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305380
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005381 if (err_xfer || err_tm)
5382 needs_reset = true;
5383
5384skip_pending_xfer_clear:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305385 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005386 if (needs_reset) {
5387 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5388
5389 /*
5390 * ufshcd_reset_and_restore() does the link reinitialization
5391 * which will need atleast one empty doorbell slot to send the
5392 * device management commands (NOP and query commands).
5393 * If there is no slot empty at this moment then free up last
5394 * slot forcefully.
5395 */
5396 if (hba->outstanding_reqs == max_doorbells)
5397 __ufshcd_transfer_req_compl(hba,
5398 (1UL << (hba->nutrs - 1)));
5399
5400 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305401 err = ufshcd_reset_and_restore(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005402 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305403 if (err) {
5404 dev_err(hba->dev, "%s: reset and restore failed\n",
5405 __func__);
5406 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5407 }
5408 /*
5409 * Inform scsi mid-layer that we did reset and allow to handle
5410 * Unit Attention properly.
5411 */
5412 scsi_report_bus_reset(hba->host, 0);
5413 hba->saved_err = 0;
5414 hba->saved_uic_err = 0;
5415 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005416
Yaniv Gardi583fa622016-03-10 17:37:13 +02005417skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005418 if (!needs_reset) {
5419 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5420 if (hba->saved_err || hba->saved_uic_err)
5421 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5422 __func__, hba->saved_err, hba->saved_uic_err);
5423 }
5424
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305425 ufshcd_clear_eh_in_progress(hba);
5426
5427out:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005428 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani38135532018-05-03 16:37:18 +05305429 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005430 ufshcd_release(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305431 pm_runtime_put_sync(hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305432}
5433
5434/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305435 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5436 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005437 *
5438 * Returns
5439 * IRQ_HANDLED - If interrupt is valid
5440 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305441 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005442static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305443{
5444 u32 reg;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005445 irqreturn_t retval = IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305446
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005447 /* PHY layer lane error */
5448 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5449 /* Ignore LINERESET indication, as this is not an error */
5450 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005451 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005452 /*
5453 * To know whether this error is fatal or not, DB timeout
5454 * must be checked but this error is handled separately.
5455 */
5456 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
Stanley Chu48d5b972019-07-10 21:38:18 +08005457 ufshcd_update_reg_hist(&hba->ufs_stats.pa_err, reg);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005458 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005459 }
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005460
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305461 /* PA_INIT_ERROR is fatal and needs UIC reset */
5462 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005463 if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
5464 (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005465 ufshcd_update_reg_hist(&hba->ufs_stats.dl_err, reg);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005466
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005467 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5468 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
5469 else if (hba->dev_quirks &
5470 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5471 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5472 hba->uic_error |=
5473 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5474 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5475 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5476 }
5477 retval |= IRQ_HANDLED;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005478 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305479
5480 /* UIC NL/TL/DME errors needs software retry */
5481 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005482 if ((reg & UIC_NETWORK_LAYER_ERROR) &&
5483 (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005484 ufshcd_update_reg_hist(&hba->ufs_stats.nl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305485 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005486 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005487 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305488
5489 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005490 if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
5491 (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005492 ufshcd_update_reg_hist(&hba->ufs_stats.tl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305493 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005494 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005495 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305496
5497 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005498 if ((reg & UIC_DME_ERROR) &&
5499 (reg & UIC_DME_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005500 ufshcd_update_reg_hist(&hba->ufs_stats.dme_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305501 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005502 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005503 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305504
5505 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5506 __func__, hba->uic_error);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005507 return retval;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305508}
5509
Stanley Chu82174442019-05-21 14:44:54 +08005510static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5511 u32 intr_mask)
5512{
5513 if (!ufshcd_is_auto_hibern8_supported(hba))
5514 return false;
5515
5516 if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5517 return false;
5518
5519 if (hba->active_uic_cmd &&
5520 (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5521 hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5522 return false;
5523
5524 return true;
5525}
5526
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305527/**
5528 * ufshcd_check_errors - Check for errors that need s/w attention
5529 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005530 *
5531 * Returns
5532 * IRQ_HANDLED - If interrupt is valid
5533 * IRQ_NONE - If invalid interrupt
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305534 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005535static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305536{
5537 bool queue_eh_work = false;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005538 irqreturn_t retval = IRQ_NONE;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305539
Stanley Chud3c615b2019-07-10 21:38:19 +08005540 if (hba->errors & INT_FATAL_ERRORS) {
5541 ufshcd_update_reg_hist(&hba->ufs_stats.fatal_err, hba->errors);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305542 queue_eh_work = true;
Stanley Chud3c615b2019-07-10 21:38:19 +08005543 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305544
5545 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305546 hba->uic_error = 0;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005547 retval = ufshcd_update_uic_error(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305548 if (hba->uic_error)
5549 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305550 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305551
Stanley Chu82174442019-05-21 14:44:54 +08005552 if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
5553 dev_err(hba->dev,
5554 "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
5555 __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
5556 "Enter" : "Exit",
5557 hba->errors, ufshcd_get_upmcrs(hba));
Stanley Chud3c615b2019-07-10 21:38:19 +08005558 ufshcd_update_reg_hist(&hba->ufs_stats.auto_hibern8_err,
5559 hba->errors);
Stanley Chu82174442019-05-21 14:44:54 +08005560 queue_eh_work = true;
5561 }
5562
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305563 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005564 /*
5565 * update the transfer error masks to sticky bits, let's do this
5566 * irrespective of current ufshcd_state.
5567 */
5568 hba->saved_err |= hba->errors;
5569 hba->saved_uic_err |= hba->uic_error;
5570
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305571 /* handle fatal errors only when link is functional */
5572 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5573 /* block commands from scsi mid-layer */
Subhash Jadavani38135532018-05-03 16:37:18 +05305574 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305575
Zang Leigang141f8162016-11-16 11:29:37 +08005576 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
Dolev Raviv66cc8202016-12-22 18:39:42 -08005577
5578 /* dump controller state before resetting */
5579 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5580 bool pr_prdt = !!(hba->saved_err &
5581 SYSTEM_BUS_FATAL_ERROR);
5582
5583 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5584 __func__, hba->saved_err,
5585 hba->saved_uic_err);
5586
5587 ufshcd_print_host_regs(hba);
5588 ufshcd_print_pwr_info(hba);
5589 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5590 ufshcd_print_trs(hba, hba->outstanding_reqs,
5591 pr_prdt);
5592 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305593 schedule_work(&hba->eh_work);
5594 }
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005595 retval |= IRQ_HANDLED;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305596 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305597 /*
5598 * if (!queue_eh_work) -
5599 * Other errors are either non-fatal where host recovers
5600 * itself without s/w intervention or errors that will be
5601 * handled by the SCSI core layer.
5602 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005603 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305604}
5605
5606/**
5607 * ufshcd_tmc_handler - handle task management function completion
5608 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005609 *
5610 * Returns
5611 * IRQ_HANDLED - If interrupt is valid
5612 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305613 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005614static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305615{
5616 u32 tm_doorbell;
5617
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305618 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305619 hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005620 if (hba->tm_condition) {
5621 wake_up(&hba->tm_wq);
5622 return IRQ_HANDLED;
5623 } else {
5624 return IRQ_NONE;
5625 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305626}
5627
5628/**
5629 * ufshcd_sl_intr - Interrupt service routine
5630 * @hba: per adapter instance
5631 * @intr_status: contains interrupts generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005632 *
5633 * Returns
5634 * IRQ_HANDLED - If interrupt is valid
5635 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305636 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005637static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305638{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005639 irqreturn_t retval = IRQ_NONE;
5640
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305641 hba->errors = UFSHCD_ERROR_MASK & intr_status;
Stanley Chu82174442019-05-21 14:44:54 +08005642
5643 if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5644 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5645
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305646 if (hba->errors)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005647 retval |= ufshcd_check_errors(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305648
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305649 if (intr_status & UFSHCD_UIC_MASK)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005650 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305651
5652 if (intr_status & UTP_TASK_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005653 retval |= ufshcd_tmc_handler(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305654
5655 if (intr_status & UTP_TRANSFER_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005656 retval |= ufshcd_transfer_req_compl(hba);
5657
5658 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305659}
5660
5661/**
5662 * ufshcd_intr - Main interrupt service routine
5663 * @irq: irq number
5664 * @__hba: pointer to adapter instance
5665 *
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005666 * Returns
5667 * IRQ_HANDLED - If interrupt is valid
5668 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305669 */
5670static irqreturn_t ufshcd_intr(int irq, void *__hba)
5671{
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005672 u32 intr_status, enabled_intr_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305673 irqreturn_t retval = IRQ_NONE;
5674 struct ufs_hba *hba = __hba;
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305675 int retries = hba->nutrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305676
5677 spin_lock(hba->host->host_lock);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305678 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305679
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305680 /*
5681 * There could be max of hba->nutrs reqs in flight and in worst case
5682 * if the reqs get finished 1 by 1 after the interrupt status is
5683 * read, make sure we handle them by checking the interrupt status
5684 * again in a loop until we process all of the reqs before returning.
5685 */
5686 do {
5687 enabled_intr_status =
5688 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5689 if (intr_status)
5690 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005691 if (enabled_intr_status)
5692 retval |= ufshcd_sl_intr(hba, enabled_intr_status);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005693
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305694 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5695 } while (intr_status && --retries);
5696
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005697 if (retval == IRQ_NONE) {
5698 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x\n",
5699 __func__, intr_status);
5700 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
5701 }
5702
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305703 spin_unlock(hba->host->host_lock);
5704 return retval;
5705}
5706
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305707static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5708{
5709 int err = 0;
5710 u32 mask = 1 << tag;
5711 unsigned long flags;
5712
5713 if (!test_bit(tag, &hba->outstanding_tasks))
5714 goto out;
5715
5716 spin_lock_irqsave(hba->host->host_lock, flags);
Alim Akhtar1399c5b2018-05-06 15:44:15 +05305717 ufshcd_utmrl_clear(hba, tag);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305718 spin_unlock_irqrestore(hba->host->host_lock, flags);
5719
5720 /* poll for max. 1 sec to clear door bell register by h/w */
5721 err = ufshcd_wait_for_register(hba,
5722 REG_UTP_TASK_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02005723 mask, 0, 1000, 1000, true);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305724out:
5725 return err;
5726}
5727
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005728static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
5729 struct utp_task_req_desc *treq, u8 tm_function)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305730{
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005731 struct Scsi_Host *host = hba->host;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305732 unsigned long flags;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005733 int free_slot, task_tag, err;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305734
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305735 /*
5736 * Get free slot, sleep if slots are unavailable.
5737 * Even though we use wait_event() which sleeps indefinitely,
5738 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5739 */
5740 wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005741 ufshcd_hold(hba, false);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305742
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305743 spin_lock_irqsave(host->host_lock, flags);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305744 task_tag = hba->nutrs + free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305745
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005746 treq->req_header.dword_0 |= cpu_to_be32(task_tag);
5747
5748 memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
Kiwoong Kimd2877be2016-11-10 21:16:15 +09005749 ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5750
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305751 /* send command to the controller */
5752 __set_bit(free_slot, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02005753
5754 /* Make sure descriptors are ready before ringing the task doorbell */
5755 wmb();
5756
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305757 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07005758 /* Make sure that doorbell is committed immediately */
5759 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305760
5761 spin_unlock_irqrestore(host->host_lock, flags);
5762
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005763 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");
5764
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305765 /* wait until the task management command is completed */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305766 err = wait_event_timeout(hba->tm_wq,
5767 test_bit(free_slot, &hba->tm_condition),
5768 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305769 if (!err) {
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005770 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305771 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5772 __func__, tm_function);
5773 if (ufshcd_clear_tm_cmd(hba, free_slot))
5774 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5775 __func__, free_slot);
5776 err = -ETIMEDOUT;
5777 } else {
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005778 err = 0;
5779 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));
5780
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005781 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305782 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305783
Stanley Chub5572172019-08-19 21:43:28 +08005784 spin_lock_irqsave(hba->host->host_lock, flags);
5785 __clear_bit(free_slot, &hba->outstanding_tasks);
5786 spin_unlock_irqrestore(hba->host->host_lock, flags);
5787
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305788 clear_bit(free_slot, &hba->tm_condition);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305789 ufshcd_put_tm_slot(hba, free_slot);
5790 wake_up(&hba->tm_tag_wq);
5791
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005792 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305793 return err;
5794}
5795
5796/**
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005797 * ufshcd_issue_tm_cmd - issues task management commands to controller
5798 * @hba: per adapter instance
5799 * @lun_id: LUN ID to which TM command is sent
5800 * @task_id: task ID to which the TM command is applicable
5801 * @tm_function: task management function opcode
5802 * @tm_response: task management service response return value
5803 *
5804 * Returns non-zero value on error, zero on success.
5805 */
5806static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5807 u8 tm_function, u8 *tm_response)
5808{
5809 struct utp_task_req_desc treq = { { 0 }, };
5810 int ocs_value, err;
5811
5812 /* Configure task request descriptor */
5813 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5814 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5815
5816 /* Configure task request UPIU */
5817 treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
5818 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
5819 treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);
5820
5821 /*
5822 * The host shall provide the same value for LUN field in the basic
5823 * header and for Input Parameter.
5824 */
5825 treq.input_param1 = cpu_to_be32(lun_id);
5826 treq.input_param2 = cpu_to_be32(task_id);
5827
5828 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
5829 if (err == -ETIMEDOUT)
5830 return err;
5831
5832 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5833 if (ocs_value != OCS_SUCCESS)
5834 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
5835 __func__, ocs_value);
5836 else if (tm_response)
5837 *tm_response = be32_to_cpu(treq.output_param1) &
5838 MASK_TM_SERVICE_RESP;
5839 return err;
5840}
5841
5842/**
Avri Altman5e0a86e2018-10-07 17:30:37 +03005843 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
5844 * @hba: per-adapter instance
5845 * @req_upiu: upiu request
5846 * @rsp_upiu: upiu reply
Avri Altman5e0a86e2018-10-07 17:30:37 +03005847 * @desc_buff: pointer to descriptor buffer, NULL if NA
5848 * @buff_len: descriptor size, 0 if NA
Bart Van Assched0e97602019-10-29 16:07:08 -07005849 * @cmd_type: specifies the type (NOP, Query...)
Avri Altman5e0a86e2018-10-07 17:30:37 +03005850 * @desc_op: descriptor operation
5851 *
5852 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
5853 * Therefore, it "rides" the device management infrastructure: uses its tag and
5854 * tasks work queues.
5855 *
5856 * Since there is only one available tag for device management commands,
5857 * the caller is expected to hold the hba->dev_cmd.lock mutex.
5858 */
5859static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
5860 struct utp_upiu_req *req_upiu,
5861 struct utp_upiu_req *rsp_upiu,
5862 u8 *desc_buff, int *buff_len,
Bart Van Assche7f674c32019-10-29 16:07:09 -07005863 enum dev_cmd_type cmd_type,
Avri Altman5e0a86e2018-10-07 17:30:37 +03005864 enum query_opcode desc_op)
5865{
5866 struct ufshcd_lrb *lrbp;
5867 int err = 0;
5868 int tag;
5869 struct completion wait;
5870 unsigned long flags;
5871 u32 upiu_flags;
5872
5873 down_read(&hba->clk_scaling_lock);
5874
5875 wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
5876
5877 init_completion(&wait);
5878 lrbp = &hba->lrb[tag];
5879 WARN_ON(lrbp->cmd);
5880
5881 lrbp->cmd = NULL;
5882 lrbp->sense_bufflen = 0;
5883 lrbp->sense_buffer = NULL;
5884 lrbp->task_tag = tag;
5885 lrbp->lun = 0;
5886 lrbp->intr_cmd = true;
5887 hba->dev_cmd.type = cmd_type;
5888
5889 switch (hba->ufs_version) {
5890 case UFSHCI_VERSION_10:
5891 case UFSHCI_VERSION_11:
5892 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
5893 break;
5894 default:
5895 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
5896 break;
5897 }
5898
5899 /* update the task tag in the request upiu */
5900 req_upiu->header.dword_0 |= cpu_to_be32(tag);
5901
5902 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
5903
5904 /* just copy the upiu request as it is */
5905 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
5906 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
5907 /* The Data Segment Area is optional depending upon the query
5908 * function value. for WRITE DESCRIPTOR, the data segment
5909 * follows right after the tsf.
5910 */
5911 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
5912 *buff_len = 0;
5913 }
5914
5915 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
5916
5917 hba->dev_cmd.complete = &wait;
5918
5919 /* Make sure descriptors are ready before ringing the doorbell */
5920 wmb();
5921 spin_lock_irqsave(hba->host->host_lock, flags);
5922 ufshcd_send_command(hba, tag);
5923 spin_unlock_irqrestore(hba->host->host_lock, flags);
5924
5925 /*
5926 * ignore the returning value here - ufshcd_check_query_response is
5927 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
5928 * read the response directly ignoring all errors.
5929 */
5930 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
5931
5932 /* just copy the upiu response as it is */
5933 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
Avri Altman4bbbe242019-02-20 09:11:13 +02005934 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
5935 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
5936 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
5937 MASK_QUERY_DATA_SEG_LEN;
5938
5939 if (*buff_len >= resp_len) {
5940 memcpy(desc_buff, descp, resp_len);
5941 *buff_len = resp_len;
5942 } else {
Bean Huo3d4881d2019-11-12 23:34:35 +01005943 dev_warn(hba->dev,
5944 "%s: rsp size %d is bigger than buffer size %d",
5945 __func__, resp_len, *buff_len);
Avri Altman4bbbe242019-02-20 09:11:13 +02005946 *buff_len = 0;
5947 err = -EINVAL;
5948 }
5949 }
Avri Altman5e0a86e2018-10-07 17:30:37 +03005950
5951 ufshcd_put_dev_cmd_tag(hba, tag);
5952 wake_up(&hba->dev_cmd.tag_wq);
5953 up_read(&hba->clk_scaling_lock);
5954 return err;
5955}
5956
5957/**
5958 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
5959 * @hba: per-adapter instance
5960 * @req_upiu: upiu request
5961 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
5962 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
5963 * @desc_buff: pointer to descriptor buffer, NULL if NA
5964 * @buff_len: descriptor size, 0 if NA
5965 * @desc_op: descriptor operation
5966 *
5967 * Supports UTP Transfer requests (nop and query), and UTP Task
5968 * Management requests.
5969 * It is up to the caller to fill the upiu conent properly, as it will
5970 * be copied without any further input validations.
5971 */
5972int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
5973 struct utp_upiu_req *req_upiu,
5974 struct utp_upiu_req *rsp_upiu,
5975 int msgcode,
5976 u8 *desc_buff, int *buff_len,
5977 enum query_opcode desc_op)
5978{
5979 int err;
Bart Van Assche7f674c32019-10-29 16:07:09 -07005980 enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
Avri Altman5e0a86e2018-10-07 17:30:37 +03005981 struct utp_task_req_desc treq = { { 0 }, };
5982 int ocs_value;
5983 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
5984
Avri Altman5e0a86e2018-10-07 17:30:37 +03005985 switch (msgcode) {
5986 case UPIU_TRANSACTION_NOP_OUT:
5987 cmd_type = DEV_CMD_TYPE_NOP;
5988 /* fall through */
5989 case UPIU_TRANSACTION_QUERY_REQ:
5990 ufshcd_hold(hba, false);
5991 mutex_lock(&hba->dev_cmd.lock);
5992 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
5993 desc_buff, buff_len,
5994 cmd_type, desc_op);
5995 mutex_unlock(&hba->dev_cmd.lock);
5996 ufshcd_release(hba);
5997
5998 break;
5999 case UPIU_TRANSACTION_TASK_REQ:
6000 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6001 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6002
6003 memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));
6004
6005 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
6006 if (err == -ETIMEDOUT)
6007 break;
6008
6009 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6010 if (ocs_value != OCS_SUCCESS) {
6011 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
6012 ocs_value);
6013 break;
6014 }
6015
6016 memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));
6017
6018 break;
6019 default:
6020 err = -EINVAL;
6021
6022 break;
6023 }
6024
Avri Altman5e0a86e2018-10-07 17:30:37 +03006025 return err;
6026}
6027
6028/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306029 * ufshcd_eh_device_reset_handler - device reset handler registered to
6030 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306031 * @cmd: SCSI command pointer
6032 *
6033 * Returns SUCCESS/FAILED
6034 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306035static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306036{
6037 struct Scsi_Host *host;
6038 struct ufs_hba *hba;
6039 unsigned int tag;
6040 u32 pos;
6041 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306042 u8 resp = 0xF;
6043 struct ufshcd_lrb *lrbp;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306044 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306045
6046 host = cmd->device->host;
6047 hba = shost_priv(host);
6048 tag = cmd->request->tag;
6049
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306050 lrbp = &hba->lrb[tag];
6051 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
6052 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306053 if (!err)
6054 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306055 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306056 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306057
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306058 /* clear the commands that were pending for corresponding LUN */
6059 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6060 if (hba->lrb[pos].lun == lrbp->lun) {
6061 err = ufshcd_clear_cmd(hba, pos);
6062 if (err)
6063 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306064 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306065 }
6066 spin_lock_irqsave(host->host_lock, flags);
6067 ufshcd_transfer_req_compl(hba);
6068 spin_unlock_irqrestore(host->host_lock, flags);
Gilad Broner7fabb772017-02-03 16:56:50 -08006069
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306070out:
Gilad Broner7fabb772017-02-03 16:56:50 -08006071 hba->req_abort_count = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08006072 ufshcd_update_reg_hist(&hba->ufs_stats.dev_reset, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306073 if (!err) {
6074 err = SUCCESS;
6075 } else {
6076 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6077 err = FAILED;
6078 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306079 return err;
6080}
6081
Gilad Bronere0b299e2017-02-03 16:56:40 -08006082static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6083{
6084 struct ufshcd_lrb *lrbp;
6085 int tag;
6086
6087 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6088 lrbp = &hba->lrb[tag];
6089 lrbp->req_abort_skip = true;
6090 }
6091}
6092
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306093/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306094 * ufshcd_abort - abort a specific command
6095 * @cmd: SCSI command pointer
6096 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306097 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6098 * command, and in host controller by clearing the door-bell register. There can
6099 * be race between controller sending the command to the device while abort is
6100 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6101 * really issued and then try to abort it.
6102 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306103 * Returns SUCCESS/FAILED
6104 */
6105static int ufshcd_abort(struct scsi_cmnd *cmd)
6106{
6107 struct Scsi_Host *host;
6108 struct ufs_hba *hba;
6109 unsigned long flags;
6110 unsigned int tag;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306111 int err = 0;
6112 int poll_cnt;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306113 u8 resp = 0xF;
6114 struct ufshcd_lrb *lrbp;
Dolev Ravive9d501b2014-07-01 12:22:37 +03006115 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306116
6117 host = cmd->device->host;
6118 hba = shost_priv(host);
6119 tag = cmd->request->tag;
Dolev Ravive7d38252016-12-22 18:40:07 -08006120 lrbp = &hba->lrb[tag];
Yaniv Gardi14497322016-02-01 15:02:39 +02006121 if (!ufshcd_valid_tag(hba, tag)) {
6122 dev_err(hba->dev,
6123 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
6124 __func__, tag, cmd, cmd->request);
6125 BUG();
6126 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306127
Dolev Ravive7d38252016-12-22 18:40:07 -08006128 /*
6129 * Task abort to the device W-LUN is illegal. When this command
6130 * will fail, due to spec violation, scsi err handling next step
6131 * will be to send LU reset which, again, is a spec violation.
6132 * To avoid these unnecessary/illegal step we skip to the last error
6133 * handling stage: reset and restore.
6134 */
6135 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
6136 return ufshcd_eh_host_reset_handler(cmd);
6137
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006138 ufshcd_hold(hba, false);
Dolev Ravive9d501b2014-07-01 12:22:37 +03006139 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Yaniv Gardi14497322016-02-01 15:02:39 +02006140 /* If command is already aborted/completed, return SUCCESS */
6141 if (!(test_bit(tag, &hba->outstanding_reqs))) {
6142 dev_err(hba->dev,
6143 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
6144 __func__, tag, hba->outstanding_reqs, reg);
6145 goto out;
6146 }
6147
Dolev Ravive9d501b2014-07-01 12:22:37 +03006148 if (!(reg & (1 << tag))) {
6149 dev_err(hba->dev,
6150 "%s: cmd was completed, but without a notifying intr, tag = %d",
6151 __func__, tag);
6152 }
6153
Dolev Raviv66cc8202016-12-22 18:39:42 -08006154 /* Print Transfer Request of aborted task */
6155 dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
Dolev Raviv66cc8202016-12-22 18:39:42 -08006156
Gilad Broner7fabb772017-02-03 16:56:50 -08006157 /*
6158 * Print detailed info about aborted request.
6159 * As more than one request might get aborted at the same time,
6160 * print full information only for the first aborted request in order
6161 * to reduce repeated printouts. For other aborted requests only print
6162 * basic details.
6163 */
6164 scsi_print_command(hba->lrb[tag].cmd);
6165 if (!hba->req_abort_count) {
Stanley Chu8808b4e2019-07-10 21:38:21 +08006166 ufshcd_update_reg_hist(&hba->ufs_stats.task_abort, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08006167 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08006168 ufshcd_print_host_state(hba);
Gilad Broner7fabb772017-02-03 16:56:50 -08006169 ufshcd_print_pwr_info(hba);
6170 ufshcd_print_trs(hba, 1 << tag, true);
6171 } else {
6172 ufshcd_print_trs(hba, 1 << tag, false);
6173 }
6174 hba->req_abort_count++;
Gilad Bronere0b299e2017-02-03 16:56:40 -08006175
6176 /* Skip task abort in case previous aborts failed and report failure */
6177 if (lrbp->req_abort_skip) {
6178 err = -EIO;
6179 goto out;
6180 }
6181
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306182 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6183 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6184 UFS_QUERY_TASK, &resp);
6185 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6186 /* cmd pending in the device */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006187 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6188 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306189 break;
6190 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306191 /*
6192 * cmd not pending in the device, check if it is
6193 * in transition.
6194 */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006195 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6196 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306197 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6198 if (reg & (1 << tag)) {
6199 /* sleep for max. 200us to stabilize */
6200 usleep_range(100, 200);
6201 continue;
6202 }
6203 /* command completed already */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006204 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6205 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306206 goto out;
6207 } else {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006208 dev_err(hba->dev,
6209 "%s: no response from device. tag = %d, err %d\n",
6210 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306211 if (!err)
6212 err = resp; /* service response error */
6213 goto out;
6214 }
6215 }
6216
6217 if (!poll_cnt) {
6218 err = -EBUSY;
6219 goto out;
6220 }
6221
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306222 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6223 UFS_ABORT_TASK, &resp);
6224 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006225 if (!err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306226 err = resp; /* service response error */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006227 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6228 __func__, tag, err);
6229 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306230 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306231 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306232
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306233 err = ufshcd_clear_cmd(hba, tag);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006234 if (err) {
6235 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6236 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306237 goto out;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006238 }
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306239
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306240 scsi_dma_unmap(cmd);
6241
6242 spin_lock_irqsave(host->host_lock, flags);
Yaniv Gardia48353f2016-02-01 15:02:40 +02006243 ufshcd_outstanding_req_clear(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306244 hba->lrb[tag].cmd = NULL;
6245 spin_unlock_irqrestore(host->host_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306246
6247 clear_bit_unlock(tag, &hba->lrb_in_use);
6248 wake_up(&hba->dev_cmd.tag_wq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006249
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306250out:
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306251 if (!err) {
6252 err = SUCCESS;
6253 } else {
6254 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Gilad Bronere0b299e2017-02-03 16:56:40 -08006255 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306256 err = FAILED;
6257 }
6258
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006259 /*
6260 * This ufshcd_release() corresponds to the original scsi cmd that got
6261 * aborted here (as we won't get any IRQ for it).
6262 */
6263 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306264 return err;
6265}
6266
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306267/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306268 * ufshcd_host_reset_and_restore - reset and restore host controller
6269 * @hba: per-adapter instance
6270 *
6271 * Note that host controller reset may issue DME_RESET to
6272 * local and remote (device) Uni-Pro stack and the attributes
6273 * are reset to default state.
6274 *
6275 * Returns zero on success, non-zero on failure
6276 */
6277static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6278{
6279 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306280 unsigned long flags;
6281
6282 /* Reset the host controller */
6283 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02006284 ufshcd_hba_stop(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306285 spin_unlock_irqrestore(hba->host->host_lock, flags);
6286
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08006287 /* scale up clocks to max frequency before full reinitialization */
6288 ufshcd_scale_clks(hba, true);
6289
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306290 err = ufshcd_hba_enable(hba);
6291 if (err)
6292 goto out;
6293
6294 /* Establish the link again and restore the device */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006295 err = ufshcd_probe_hba(hba);
6296
6297 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306298 err = -EIO;
6299out:
6300 if (err)
6301 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
Stanley Chu8808b4e2019-07-10 21:38:21 +08006302 ufshcd_update_reg_hist(&hba->ufs_stats.host_reset, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306303 return err;
6304}
6305
6306/**
6307 * ufshcd_reset_and_restore - reset and re-initialize host/device
6308 * @hba: per-adapter instance
6309 *
6310 * Reset and recover device, host and re-establish link. This
6311 * is helpful to recover the communication in fatal error conditions.
6312 *
6313 * Returns zero on success, non-zero on failure
6314 */
6315static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6316{
6317 int err = 0;
6318 unsigned long flags;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006319 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306320
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006321 do {
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07006322 /* Reset the attached device */
6323 ufshcd_vops_device_reset(hba);
6324
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006325 err = ufshcd_host_reset_and_restore(hba);
6326 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306327
6328 /*
6329 * After reset the door-bell might be cleared, complete
6330 * outstanding requests in s/w here.
6331 */
6332 spin_lock_irqsave(hba->host->host_lock, flags);
6333 ufshcd_transfer_req_compl(hba);
6334 ufshcd_tmc_handler(hba);
6335 spin_unlock_irqrestore(hba->host->host_lock, flags);
6336
6337 return err;
6338}
6339
6340/**
6341 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006342 * @cmd: SCSI command pointer
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306343 *
6344 * Returns SUCCESS/FAILED
6345 */
6346static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6347{
6348 int err;
6349 unsigned long flags;
6350 struct ufs_hba *hba;
6351
6352 hba = shost_priv(cmd->device->host);
6353
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006354 ufshcd_hold(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306355 /*
6356 * Check if there is any race with fatal error handling.
6357 * If so, wait for it to complete. Even though fatal error
6358 * handling does reset and restore in some cases, don't assume
6359 * anything out of it. We are just avoiding race here.
6360 */
6361 do {
6362 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306363 if (!(work_pending(&hba->eh_work) ||
Zang Leigang8dc0da72017-06-24 19:14:32 +08006364 hba->ufshcd_state == UFSHCD_STATE_RESET ||
6365 hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306366 break;
6367 spin_unlock_irqrestore(hba->host->host_lock, flags);
6368 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306369 flush_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306370 } while (1);
6371
6372 hba->ufshcd_state = UFSHCD_STATE_RESET;
6373 ufshcd_set_eh_in_progress(hba);
6374 spin_unlock_irqrestore(hba->host->host_lock, flags);
6375
6376 err = ufshcd_reset_and_restore(hba);
6377
6378 spin_lock_irqsave(hba->host->host_lock, flags);
6379 if (!err) {
6380 err = SUCCESS;
6381 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6382 } else {
6383 err = FAILED;
6384 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6385 }
6386 ufshcd_clear_eh_in_progress(hba);
6387 spin_unlock_irqrestore(hba->host->host_lock, flags);
6388
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006389 ufshcd_release(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306390 return err;
6391}
6392
6393/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006394 * ufshcd_get_max_icc_level - calculate the ICC level
6395 * @sup_curr_uA: max. current supported by the regulator
6396 * @start_scan: row at the desc table to start scan from
6397 * @buff: power descriptor buffer
6398 *
6399 * Returns calculated max ICC level for specific regulator
6400 */
6401static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6402{
6403 int i;
6404 int curr_uA;
6405 u16 data;
6406 u16 unit;
6407
6408 for (i = start_scan; i >= 0; i--) {
Tomas Winklerd79713f2017-01-05 10:45:11 +02006409 data = be16_to_cpup((__be16 *)&buff[2 * i]);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006410 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6411 ATTR_ICC_LVL_UNIT_OFFSET;
6412 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6413 switch (unit) {
6414 case UFSHCD_NANO_AMP:
6415 curr_uA = curr_uA / 1000;
6416 break;
6417 case UFSHCD_MILI_AMP:
6418 curr_uA = curr_uA * 1000;
6419 break;
6420 case UFSHCD_AMP:
6421 curr_uA = curr_uA * 1000 * 1000;
6422 break;
6423 case UFSHCD_MICRO_AMP:
6424 default:
6425 break;
6426 }
6427 if (sup_curr_uA >= curr_uA)
6428 break;
6429 }
6430 if (i < 0) {
6431 i = 0;
6432 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6433 }
6434
6435 return (u32)i;
6436}
6437
6438/**
6439 * ufshcd_calc_icc_level - calculate the max ICC level
6440 * In case regulators are not initialized we'll return 0
6441 * @hba: per-adapter instance
6442 * @desc_buf: power descriptor buffer to extract ICC levels from.
6443 * @len: length of desc_buff
6444 *
6445 * Returns calculated ICC level
6446 */
6447static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6448 u8 *desc_buf, int len)
6449{
6450 u32 icc_level = 0;
6451
6452 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6453 !hba->vreg_info.vccq2) {
6454 dev_err(hba->dev,
6455 "%s: Regulator capability was not set, actvIccLevel=%d",
6456 __func__, icc_level);
6457 goto out;
6458 }
6459
Stanley Chu0487fff2019-03-28 17:16:25 +08006460 if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006461 icc_level = ufshcd_get_max_icc_level(
6462 hba->vreg_info.vcc->max_uA,
6463 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6464 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6465
Stanley Chu0487fff2019-03-28 17:16:25 +08006466 if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006467 icc_level = ufshcd_get_max_icc_level(
6468 hba->vreg_info.vccq->max_uA,
6469 icc_level,
6470 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6471
Stanley Chu0487fff2019-03-28 17:16:25 +08006472 if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006473 icc_level = ufshcd_get_max_icc_level(
6474 hba->vreg_info.vccq2->max_uA,
6475 icc_level,
6476 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6477out:
6478 return icc_level;
6479}
6480
6481static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6482{
6483 int ret;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006484 int buff_len = hba->desc_size.pwr_desc;
Kees Cookbbe21d72018-05-02 16:58:09 -07006485 u8 *desc_buf;
6486
6487 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6488 if (!desc_buf)
6489 return;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006490
6491 ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6492 if (ret) {
6493 dev_err(hba->dev,
6494 "%s: Failed reading power descriptor.len = %d ret = %d",
6495 __func__, buff_len, ret);
Kees Cookbbe21d72018-05-02 16:58:09 -07006496 goto out;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006497 }
6498
6499 hba->init_prefetch_data.icc_level =
6500 ufshcd_find_max_sup_active_icc_level(hba,
6501 desc_buf, buff_len);
6502 dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6503 __func__, hba->init_prefetch_data.icc_level);
6504
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02006505 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6506 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6507 &hba->init_prefetch_data.icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006508
6509 if (ret)
6510 dev_err(hba->dev,
6511 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6512 __func__, hba->init_prefetch_data.icc_level , ret);
6513
Kees Cookbbe21d72018-05-02 16:58:09 -07006514out:
6515 kfree(desc_buf);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006516}
6517
6518/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006519 * ufshcd_scsi_add_wlus - Adds required W-LUs
6520 * @hba: per-adapter instance
6521 *
6522 * UFS device specification requires the UFS devices to support 4 well known
6523 * logical units:
6524 * "REPORT_LUNS" (address: 01h)
6525 * "UFS Device" (address: 50h)
6526 * "RPMB" (address: 44h)
6527 * "BOOT" (address: 30h)
6528 * UFS device's power management needs to be controlled by "POWER CONDITION"
6529 * field of SSU (START STOP UNIT) command. But this "power condition" field
6530 * will take effect only when its sent to "UFS device" well known logical unit
6531 * hence we require the scsi_device instance to represent this logical unit in
6532 * order for the UFS host driver to send the SSU command for power management.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006533 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006534 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6535 * Block) LU so user space process can control this LU. User space may also
6536 * want to have access to BOOT LU.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006537 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006538 * This function adds scsi device instances for each of all well known LUs
6539 * (except "REPORT LUNS" LU).
6540 *
6541 * Returns zero on success (all required W-LUs are added successfully),
6542 * non-zero error value on failure (if failed to add any of the required W-LU).
6543 */
6544static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6545{
6546 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006547 struct scsi_device *sdev_rpmb;
6548 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006549
6550 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6551 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6552 if (IS_ERR(hba->sdev_ufs_device)) {
6553 ret = PTR_ERR(hba->sdev_ufs_device);
6554 hba->sdev_ufs_device = NULL;
6555 goto out;
6556 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006557 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006558
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006559 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006560 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006561 if (IS_ERR(sdev_rpmb)) {
6562 ret = PTR_ERR(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006563 goto remove_sdev_ufs_device;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006564 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006565 scsi_device_put(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006566
6567 sdev_boot = __scsi_add_device(hba->host, 0, 0,
6568 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6569 if (IS_ERR(sdev_boot))
6570 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6571 else
6572 scsi_device_put(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006573 goto out;
6574
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006575remove_sdev_ufs_device:
6576 scsi_remove_device(hba->sdev_ufs_device);
6577out:
6578 return ret;
6579}
6580
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006581static int ufs_get_device_desc(struct ufs_hba *hba,
6582 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006583{
6584 int err;
Kees Cookbbe21d72018-05-02 16:58:09 -07006585 size_t buff_len;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006586 u8 model_index;
Kees Cookbbe21d72018-05-02 16:58:09 -07006587 u8 *desc_buf;
6588
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006589 if (!dev_desc)
6590 return -EINVAL;
6591
Kees Cookbbe21d72018-05-02 16:58:09 -07006592 buff_len = max_t(size_t, hba->desc_size.dev_desc,
6593 QUERY_DESC_MAX_SIZE + 1);
6594 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6595 if (!desc_buf) {
6596 err = -ENOMEM;
6597 goto out;
6598 }
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006599
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006600 err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006601 if (err) {
6602 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6603 __func__, err);
6604 goto out;
6605 }
6606
6607 /*
6608 * getting vendor (manufacturerID) and Bank Index in big endian
6609 * format
6610 */
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006611 dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006612 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6613
6614 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006615 err = ufshcd_read_string_desc(hba, model_index,
6616 &dev_desc->model, SD_ASCII_STD);
6617 if (err < 0) {
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006618 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6619 __func__, err);
6620 goto out;
6621 }
6622
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006623 /*
6624 * ufshcd_read_string_desc returns size of the string
6625 * reset the error value
6626 */
6627 err = 0;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006628
6629out:
Kees Cookbbe21d72018-05-02 16:58:09 -07006630 kfree(desc_buf);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006631 return err;
6632}
6633
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006634static void ufs_put_device_desc(struct ufs_dev_desc *dev_desc)
6635{
6636 kfree(dev_desc->model);
6637 dev_desc->model = NULL;
6638}
6639
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006640static void ufs_fixup_device_setup(struct ufs_hba *hba,
6641 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006642{
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006643 struct ufs_dev_fix *f;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006644
6645 for (f = ufs_fixups; f->quirk; f++) {
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006646 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
6647 f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006648 ((dev_desc->model &&
6649 STR_PRFX_EQUAL(f->card.model, dev_desc->model)) ||
6650 !strcmp(f->card.model, UFS_ANY_MODEL)))
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006651 hba->dev_quirks |= f->quirk;
6652 }
6653}
6654
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006655/**
Yaniv Gardi37113102016-03-10 17:37:16 +02006656 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6657 * @hba: per-adapter instance
6658 *
6659 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6660 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6661 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6662 * the hibern8 exit latency.
6663 *
6664 * Returns zero on success, non-zero error value on failure.
6665 */
6666static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6667{
6668 int ret = 0;
6669 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6670
6671 ret = ufshcd_dme_peer_get(hba,
6672 UIC_ARG_MIB_SEL(
6673 RX_MIN_ACTIVATETIME_CAPABILITY,
6674 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6675 &peer_rx_min_activatetime);
6676 if (ret)
6677 goto out;
6678
6679 /* make sure proper unit conversion is applied */
6680 tuned_pa_tactivate =
6681 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6682 / PA_TACTIVATE_TIME_UNIT_US);
6683 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6684 tuned_pa_tactivate);
6685
6686out:
6687 return ret;
6688}
6689
6690/**
6691 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6692 * @hba: per-adapter instance
6693 *
6694 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6695 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6696 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6697 * This optimal value can help reduce the hibern8 exit latency.
6698 *
6699 * Returns zero on success, non-zero error value on failure.
6700 */
6701static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6702{
6703 int ret = 0;
6704 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6705 u32 max_hibern8_time, tuned_pa_hibern8time;
6706
6707 ret = ufshcd_dme_get(hba,
6708 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6709 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6710 &local_tx_hibern8_time_cap);
6711 if (ret)
6712 goto out;
6713
6714 ret = ufshcd_dme_peer_get(hba,
6715 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6716 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6717 &peer_rx_hibern8_time_cap);
6718 if (ret)
6719 goto out;
6720
6721 max_hibern8_time = max(local_tx_hibern8_time_cap,
6722 peer_rx_hibern8_time_cap);
6723 /* make sure proper unit conversion is applied */
6724 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6725 / PA_HIBERN8_TIME_UNIT_US);
6726 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6727 tuned_pa_hibern8time);
6728out:
6729 return ret;
6730}
6731
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006732/**
6733 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6734 * less than device PA_TACTIVATE time.
6735 * @hba: per-adapter instance
6736 *
6737 * Some UFS devices require host PA_TACTIVATE to be lower than device
6738 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6739 * for such devices.
6740 *
6741 * Returns zero on success, non-zero error value on failure.
6742 */
6743static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6744{
6745 int ret = 0;
6746 u32 granularity, peer_granularity;
6747 u32 pa_tactivate, peer_pa_tactivate;
6748 u32 pa_tactivate_us, peer_pa_tactivate_us;
6749 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6750
6751 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6752 &granularity);
6753 if (ret)
6754 goto out;
6755
6756 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6757 &peer_granularity);
6758 if (ret)
6759 goto out;
6760
6761 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6762 (granularity > PA_GRANULARITY_MAX_VAL)) {
6763 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6764 __func__, granularity);
6765 return -EINVAL;
6766 }
6767
6768 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6769 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6770 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6771 __func__, peer_granularity);
6772 return -EINVAL;
6773 }
6774
6775 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6776 if (ret)
6777 goto out;
6778
6779 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6780 &peer_pa_tactivate);
6781 if (ret)
6782 goto out;
6783
6784 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6785 peer_pa_tactivate_us = peer_pa_tactivate *
6786 gran_to_us_table[peer_granularity - 1];
6787
6788 if (pa_tactivate_us > peer_pa_tactivate_us) {
6789 u32 new_peer_pa_tactivate;
6790
6791 new_peer_pa_tactivate = pa_tactivate_us /
6792 gran_to_us_table[peer_granularity - 1];
6793 new_peer_pa_tactivate++;
6794 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6795 new_peer_pa_tactivate);
6796 }
6797
6798out:
6799 return ret;
6800}
6801
Yaniv Gardi37113102016-03-10 17:37:16 +02006802static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6803{
6804 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6805 ufshcd_tune_pa_tactivate(hba);
6806 ufshcd_tune_pa_hibern8time(hba);
6807 }
6808
6809 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6810 /* set 1ms timeout for PA_TACTIVATE */
6811 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006812
6813 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6814 ufshcd_quirk_tune_host_pa_tactivate(hba);
Subhash Jadavani56d4a182016-12-05 19:25:32 -08006815
6816 ufshcd_vops_apply_dev_quirks(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02006817}
6818
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006819static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6820{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006821 hba->ufs_stats.hibern8_exit_cnt = 0;
6822 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08006823 hba->req_abort_count = 0;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006824}
6825
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006826static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6827{
6828 int err;
6829
6830 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6831 &hba->desc_size.dev_desc);
6832 if (err)
6833 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6834
6835 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6836 &hba->desc_size.pwr_desc);
6837 if (err)
6838 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6839
6840 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6841 &hba->desc_size.interc_desc);
6842 if (err)
6843 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6844
6845 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6846 &hba->desc_size.conf_desc);
6847 if (err)
6848 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6849
6850 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6851 &hba->desc_size.unit_desc);
6852 if (err)
6853 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6854
6855 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6856 &hba->desc_size.geom_desc);
6857 if (err)
6858 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
Bean Huo059efd82019-10-29 14:22:45 +00006859
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02006860 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
6861 &hba->desc_size.hlth_desc);
6862 if (err)
6863 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006864}
6865
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05306866static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
6867 {19200000, REF_CLK_FREQ_19_2_MHZ},
6868 {26000000, REF_CLK_FREQ_26_MHZ},
6869 {38400000, REF_CLK_FREQ_38_4_MHZ},
6870 {52000000, REF_CLK_FREQ_52_MHZ},
6871 {0, REF_CLK_FREQ_INVAL},
6872};
6873
6874static enum ufs_ref_clk_freq
6875ufs_get_bref_clk_from_hz(unsigned long freq)
6876{
6877 int i;
6878
6879 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
6880 if (ufs_ref_clk_freqs[i].freq_hz == freq)
6881 return ufs_ref_clk_freqs[i].val;
6882
6883 return REF_CLK_FREQ_INVAL;
6884}
6885
6886void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
6887{
6888 unsigned long freq;
6889
6890 freq = clk_get_rate(refclk);
6891
6892 hba->dev_ref_clk_freq =
6893 ufs_get_bref_clk_from_hz(freq);
6894
6895 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
6896 dev_err(hba->dev,
6897 "invalid ref_clk setting = %ld\n", freq);
6898}
6899
6900static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
6901{
6902 int err;
6903 u32 ref_clk;
6904 u32 freq = hba->dev_ref_clk_freq;
6905
6906 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
6907 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
6908
6909 if (err) {
6910 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
6911 err);
6912 goto out;
6913 }
6914
6915 if (ref_clk == freq)
6916 goto out; /* nothing to update */
6917
6918 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6919 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
6920
6921 if (err) {
6922 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
6923 ufs_ref_clk_freqs[freq].freq_hz);
6924 goto out;
6925 }
6926
6927 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
6928 ufs_ref_clk_freqs[freq].freq_hz);
6929
6930out:
6931 return err;
6932}
6933
Yaniv Gardi37113102016-03-10 17:37:16 +02006934/**
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006935 * ufshcd_probe_hba - probe hba to detect device and initialize
6936 * @hba: per-adapter instance
6937 *
6938 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306939 */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006940static int ufshcd_probe_hba(struct ufs_hba *hba)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306941{
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006942 struct ufs_dev_desc card = {0};
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306943 int ret;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006944 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306945
6946 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306947 if (ret)
6948 goto out;
6949
Yaniv Gardiafdfff52016-03-10 17:37:15 +02006950 /* set the default level for urgent bkops */
6951 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6952 hba->is_urgent_bkops_lvl_checked = false;
6953
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006954 /* Debug counters initialization */
6955 ufshcd_clear_dbg_ufs_stats(hba);
6956
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006957 /* UniPro link is active now */
6958 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05306959
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306960 ret = ufshcd_verify_dev_init(hba);
6961 if (ret)
6962 goto out;
6963
Dolev Raviv68078d52013-07-30 00:35:58 +05306964 ret = ufshcd_complete_dev_init(hba);
6965 if (ret)
6966 goto out;
6967
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006968 /* Init check for device descriptor sizes */
6969 ufshcd_init_desc_sizes(hba);
6970
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006971 ret = ufs_get_device_desc(hba, &card);
6972 if (ret) {
6973 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6974 __func__, ret);
6975 goto out;
6976 }
6977
6978 ufs_fixup_device_setup(hba, &card);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006979 ufs_put_device_desc(&card);
6980
Yaniv Gardi37113102016-03-10 17:37:16 +02006981 ufshcd_tune_unipro_params(hba);
Yaniv Gardi60f01872016-03-10 17:37:11 +02006982
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006983 /* UFS device is also active now */
6984 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306985 ufshcd_force_reset_auto_bkops(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006986 hba->wlun_dev_clr_ua = true;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306987
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006988 if (ufshcd_get_max_pwr_mode(hba)) {
6989 dev_err(hba->dev,
6990 "%s: Failed getting max supported power mode\n",
6991 __func__);
6992 } else {
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05306993 /*
6994 * Set the right value to bRefClkFreq before attempting to
6995 * switch to HS gears.
6996 */
6997 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
6998 ufshcd_set_dev_ref_clk(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006999 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Dov Levenglick8643ae62016-10-17 17:10:14 -07007000 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007001 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
7002 __func__, ret);
Dov Levenglick8643ae62016-10-17 17:10:14 -07007003 goto out;
7004 }
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007005 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007006
Yaniv Gardi53c12d02016-02-01 15:02:45 +02007007 /* set the state as operational after switching to desired gear */
7008 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00007009
Can Guo71d848b2019-11-14 22:09:26 -08007010 /* Enable Auto-Hibernate if configured */
7011 ufshcd_auto_hibern8_enable(hba);
7012
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007013 /*
7014 * If we are in error handling context or in power management callbacks
7015 * context, no need to scan the host
7016 */
7017 if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
7018 bool flag;
7019
7020 /* clear any previous UFS device information */
7021 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02007022 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
7023 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007024 hba->dev_info.f_power_on_wp_en = flag;
7025
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007026 if (!hba->is_init_prefetch)
7027 ufshcd_init_icc_levels(hba);
7028
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007029 /* Add required well known logical units to scsi mid layer */
7030 if (ufshcd_scsi_add_wlus(hba))
7031 goto out;
7032
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007033 /* Initialize devfreq after UFS device is detected */
7034 if (ufshcd_is_clkscaling_supported(hba)) {
7035 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7036 &hba->pwr_info,
7037 sizeof(struct ufs_pa_layer_attr));
7038 hba->clk_scaling.saved_pwr_info.is_valid = true;
7039 if (!hba->devfreq) {
Bjorn Anderssondeac4442018-05-17 23:26:36 -07007040 ret = ufshcd_devfreq_init(hba);
7041 if (ret)
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007042 goto out;
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007043 }
7044 hba->clk_scaling.is_allowed = true;
7045 }
7046
Avri Altmandf032bf2018-10-07 17:30:35 +03007047 ufs_bsg_probe(hba);
7048
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307049 scsi_scan_host(hba->host);
7050 pm_runtime_put_sync(hba->dev);
7051 }
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007052
7053 if (!hba->is_init_prefetch)
7054 hba->is_init_prefetch = true;
7055
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307056out:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007057 /*
7058 * If we failed to initialize the device or the device is not
7059 * present, turn off the power/clocks etc.
7060 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007061 if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
7062 pm_runtime_put_sync(hba->dev);
Vivek Gautameebcc192018-08-07 23:17:39 +05307063 ufshcd_exit_clk_scaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007064 ufshcd_hba_exit(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007065 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007066
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007067 trace_ufshcd_init(dev_name(hba->dev), ret,
7068 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007069 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007070 return ret;
7071}
7072
7073/**
7074 * ufshcd_async_scan - asynchronous execution for probing hba
7075 * @data: data pointer to pass to this function
7076 * @cookie: cookie data
7077 */
7078static void ufshcd_async_scan(void *data, async_cookie_t cookie)
7079{
7080 struct ufs_hba *hba = (struct ufs_hba *)data;
7081
7082 ufshcd_probe_hba(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307083}
7084
Yaniv Gardif550c652016-03-10 17:37:07 +02007085static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
7086{
7087 unsigned long flags;
7088 struct Scsi_Host *host;
7089 struct ufs_hba *hba;
7090 int index;
7091 bool found = false;
7092
7093 if (!scmd || !scmd->device || !scmd->device->host)
Christoph Hellwig66005932018-05-29 15:52:29 +02007094 return BLK_EH_DONE;
Yaniv Gardif550c652016-03-10 17:37:07 +02007095
7096 host = scmd->device->host;
7097 hba = shost_priv(host);
7098 if (!hba)
Christoph Hellwig66005932018-05-29 15:52:29 +02007099 return BLK_EH_DONE;
Yaniv Gardif550c652016-03-10 17:37:07 +02007100
7101 spin_lock_irqsave(host->host_lock, flags);
7102
7103 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
7104 if (hba->lrb[index].cmd == scmd) {
7105 found = true;
7106 break;
7107 }
7108 }
7109
7110 spin_unlock_irqrestore(host->host_lock, flags);
7111
7112 /*
7113 * Bypass SCSI error handling and reset the block layer timer if this
7114 * SCSI command was not actually dispatched to UFS driver, otherwise
7115 * let SCSI layer handle the error as usual.
7116 */
Christoph Hellwig66005932018-05-29 15:52:29 +02007117 return found ? BLK_EH_DONE : BLK_EH_RESET_TIMER;
Yaniv Gardif550c652016-03-10 17:37:07 +02007118}
7119
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007120static const struct attribute_group *ufshcd_driver_groups[] = {
7121 &ufs_sysfs_unit_descriptor_group,
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02007122 &ufs_sysfs_lun_attributes_group,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007123 NULL,
7124};
7125
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307126static struct scsi_host_template ufshcd_driver_template = {
7127 .module = THIS_MODULE,
7128 .name = UFSHCD,
7129 .proc_name = UFSHCD,
7130 .queuecommand = ufshcd_queuecommand,
7131 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09007132 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307133 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03007134 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307135 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307136 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
7137 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Yaniv Gardif550c652016-03-10 17:37:07 +02007138 .eh_timed_out = ufshcd_eh_timed_out,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307139 .this_id = -1,
7140 .sg_tablesize = SG_ALL,
7141 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
7142 .can_queue = UFSHCD_CAN_QUEUE,
Christoph Hellwig552a9902019-06-17 14:19:55 +02007143 .max_segment_size = PRDT_DATA_BYTE_COUNT_MAX,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007144 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01007145 .track_queue_depth = 1,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007146 .sdev_groups = ufshcd_driver_groups,
Christoph Hellwig4af14d12018-12-13 16:17:09 +01007147 .dma_boundary = PAGE_SIZE - 1,
Stanley Chu49615ba2019-09-16 23:56:50 +08007148 .rpm_autosuspend_delay = RPM_AUTOSUSPEND_DELAY_MS,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307149};
7150
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007151static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
7152 int ua)
7153{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007154 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007155
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007156 if (!vreg)
7157 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007158
Stanley Chu0487fff2019-03-28 17:16:25 +08007159 /*
7160 * "set_load" operation shall be required on those regulators
7161 * which specifically configured current limitation. Otherwise
7162 * zero max_uA may cause unexpected behavior when regulator is
7163 * enabled or set as high power mode.
7164 */
7165 if (!vreg->max_uA)
7166 return 0;
7167
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007168 ret = regulator_set_load(vreg->reg, ua);
7169 if (ret < 0) {
7170 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
7171 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007172 }
7173
7174 return ret;
7175}
7176
7177static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7178 struct ufs_vreg *vreg)
7179{
Marc Gonzalez73067982019-02-27 11:41:45 +01007180 return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007181}
7182
7183static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7184 struct ufs_vreg *vreg)
7185{
Adrian Hunter7c7cfdc2019-08-14 15:59:50 +03007186 if (!vreg)
7187 return 0;
7188
Marc Gonzalez73067982019-02-27 11:41:45 +01007189 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007190}
7191
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007192static int ufshcd_config_vreg(struct device *dev,
7193 struct ufs_vreg *vreg, bool on)
7194{
7195 int ret = 0;
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007196 struct regulator *reg;
7197 const char *name;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007198 int min_uV, uA_load;
7199
7200 BUG_ON(!vreg);
7201
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007202 reg = vreg->reg;
7203 name = vreg->name;
7204
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007205 if (regulator_count_voltages(reg) > 0) {
Stanley Chu3b141e82019-03-28 17:16:24 +08007206 if (vreg->min_uV && vreg->max_uV) {
7207 min_uV = on ? vreg->min_uV : 0;
7208 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7209 if (ret) {
7210 dev_err(dev,
7211 "%s: %s set voltage failed, err=%d\n",
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007212 __func__, name, ret);
Stanley Chu3b141e82019-03-28 17:16:24 +08007213 goto out;
7214 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007215 }
7216
7217 uA_load = on ? vreg->max_uA : 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007218 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7219 if (ret)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007220 goto out;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007221 }
7222out:
7223 return ret;
7224}
7225
7226static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7227{
7228 int ret = 0;
7229
Marc Gonzalez73067982019-02-27 11:41:45 +01007230 if (!vreg || vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007231 goto out;
7232
7233 ret = ufshcd_config_vreg(dev, vreg, true);
7234 if (!ret)
7235 ret = regulator_enable(vreg->reg);
7236
7237 if (!ret)
7238 vreg->enabled = true;
7239 else
7240 dev_err(dev, "%s: %s enable failed, err=%d\n",
7241 __func__, vreg->name, ret);
7242out:
7243 return ret;
7244}
7245
7246static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7247{
7248 int ret = 0;
7249
Marc Gonzalez73067982019-02-27 11:41:45 +01007250 if (!vreg || !vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007251 goto out;
7252
7253 ret = regulator_disable(vreg->reg);
7254
7255 if (!ret) {
7256 /* ignore errors on applying disable config */
7257 ufshcd_config_vreg(dev, vreg, false);
7258 vreg->enabled = false;
7259 } else {
7260 dev_err(dev, "%s: %s disable failed, err=%d\n",
7261 __func__, vreg->name, ret);
7262 }
7263out:
7264 return ret;
7265}
7266
7267static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7268{
7269 int ret = 0;
7270 struct device *dev = hba->dev;
7271 struct ufs_vreg_info *info = &hba->vreg_info;
7272
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007273 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7274 if (ret)
7275 goto out;
7276
7277 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7278 if (ret)
7279 goto out;
7280
7281 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7282 if (ret)
7283 goto out;
7284
7285out:
7286 if (ret) {
7287 ufshcd_toggle_vreg(dev, info->vccq2, false);
7288 ufshcd_toggle_vreg(dev, info->vccq, false);
7289 ufshcd_toggle_vreg(dev, info->vcc, false);
7290 }
7291 return ret;
7292}
7293
Raviv Shvili6a771a62014-09-25 15:32:24 +03007294static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7295{
7296 struct ufs_vreg_info *info = &hba->vreg_info;
7297
Zeng Guangyue60b7b822019-03-30 17:03:13 +08007298 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007299}
7300
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007301static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7302{
7303 int ret = 0;
7304
7305 if (!vreg)
7306 goto out;
7307
7308 vreg->reg = devm_regulator_get(dev, vreg->name);
7309 if (IS_ERR(vreg->reg)) {
7310 ret = PTR_ERR(vreg->reg);
7311 dev_err(dev, "%s: %s get failed, err=%d\n",
7312 __func__, vreg->name, ret);
7313 }
7314out:
7315 return ret;
7316}
7317
7318static int ufshcd_init_vreg(struct ufs_hba *hba)
7319{
7320 int ret = 0;
7321 struct device *dev = hba->dev;
7322 struct ufs_vreg_info *info = &hba->vreg_info;
7323
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007324 ret = ufshcd_get_vreg(dev, info->vcc);
7325 if (ret)
7326 goto out;
7327
7328 ret = ufshcd_get_vreg(dev, info->vccq);
7329 if (ret)
7330 goto out;
7331
7332 ret = ufshcd_get_vreg(dev, info->vccq2);
7333out:
7334 return ret;
7335}
7336
Raviv Shvili6a771a62014-09-25 15:32:24 +03007337static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7338{
7339 struct ufs_vreg_info *info = &hba->vreg_info;
7340
7341 if (info)
7342 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7343
7344 return 0;
7345}
7346
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007347static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7348 bool skip_ref_clk)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007349{
7350 int ret = 0;
7351 struct ufs_clk_info *clki;
7352 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007353 unsigned long flags;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007354 ktime_t start = ktime_get();
7355 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007356
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007357 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007358 goto out;
7359
Subhash Jadavanib3344562018-05-03 16:37:17 +05307360 /*
7361 * vendor specific setup_clocks ops may depend on clocks managed by
7362 * this standard driver hence call the vendor specific setup_clocks
7363 * before disabling the clocks managed here.
7364 */
7365 if (!on) {
7366 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
7367 if (ret)
7368 return ret;
7369 }
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007370
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007371 list_for_each_entry(clki, head, list) {
7372 if (!IS_ERR_OR_NULL(clki->clk)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007373 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7374 continue;
7375
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007376 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007377 if (on && !clki->enabled) {
7378 ret = clk_prepare_enable(clki->clk);
7379 if (ret) {
7380 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7381 __func__, clki->name, ret);
7382 goto out;
7383 }
7384 } else if (!on && clki->enabled) {
7385 clk_disable_unprepare(clki->clk);
7386 }
7387 clki->enabled = on;
7388 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7389 clki->name, on ? "en" : "dis");
7390 }
7391 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007392
Subhash Jadavanib3344562018-05-03 16:37:17 +05307393 /*
7394 * vendor specific setup_clocks ops may depend on clocks managed by
7395 * this standard driver hence call the vendor specific setup_clocks
7396 * after enabling the clocks managed here.
7397 */
7398 if (on) {
7399 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
7400 if (ret)
7401 return ret;
7402 }
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007403
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007404out:
7405 if (ret) {
7406 list_for_each_entry(clki, head, list) {
7407 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7408 clk_disable_unprepare(clki->clk);
7409 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007410 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007411 spin_lock_irqsave(hba->host->host_lock, flags);
7412 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007413 trace_ufshcd_clk_gating(dev_name(hba->dev),
7414 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007415 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007416 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007417
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007418 if (clk_state_changed)
7419 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7420 (on ? "on" : "off"),
7421 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007422 return ret;
7423}
7424
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007425static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
7426{
7427 return __ufshcd_setup_clocks(hba, on, false);
7428}
7429
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007430static int ufshcd_init_clocks(struct ufs_hba *hba)
7431{
7432 int ret = 0;
7433 struct ufs_clk_info *clki;
7434 struct device *dev = hba->dev;
7435 struct list_head *head = &hba->clk_list_head;
7436
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007437 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007438 goto out;
7439
7440 list_for_each_entry(clki, head, list) {
7441 if (!clki->name)
7442 continue;
7443
7444 clki->clk = devm_clk_get(dev, clki->name);
7445 if (IS_ERR(clki->clk)) {
7446 ret = PTR_ERR(clki->clk);
7447 dev_err(dev, "%s: %s clk get failed, %d\n",
7448 __func__, clki->name, ret);
7449 goto out;
7450 }
7451
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307452 /*
7453 * Parse device ref clk freq as per device tree "ref_clk".
7454 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
7455 * in ufshcd_alloc_host().
7456 */
7457 if (!strcmp(clki->name, "ref_clk"))
7458 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
7459
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007460 if (clki->max_freq) {
7461 ret = clk_set_rate(clki->clk, clki->max_freq);
7462 if (ret) {
7463 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7464 __func__, clki->name,
7465 clki->max_freq, ret);
7466 goto out;
7467 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03007468 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007469 }
7470 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7471 clki->name, clk_get_rate(clki->clk));
7472 }
7473out:
7474 return ret;
7475}
7476
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007477static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7478{
7479 int err = 0;
7480
7481 if (!hba->vops)
7482 goto out;
7483
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007484 err = ufshcd_vops_init(hba);
7485 if (err)
7486 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007487
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007488 err = ufshcd_vops_setup_regulators(hba, true);
7489 if (err)
7490 goto out_exit;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007491
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007492 goto out;
7493
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007494out_exit:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007495 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007496out:
7497 if (err)
7498 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007499 __func__, ufshcd_get_var_name(hba), err);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007500 return err;
7501}
7502
7503static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7504{
7505 if (!hba->vops)
7506 return;
7507
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007508 ufshcd_vops_setup_regulators(hba, false);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007509
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007510 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007511}
7512
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007513static int ufshcd_hba_init(struct ufs_hba *hba)
7514{
7515 int err;
7516
Raviv Shvili6a771a62014-09-25 15:32:24 +03007517 /*
7518 * Handle host controller power separately from the UFS device power
7519 * rails as it will help controlling the UFS host controller power
7520 * collapse easily which is different than UFS device power collapse.
7521 * Also, enable the host controller power before we go ahead with rest
7522 * of the initialization here.
7523 */
7524 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007525 if (err)
7526 goto out;
7527
Raviv Shvili6a771a62014-09-25 15:32:24 +03007528 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007529 if (err)
7530 goto out;
7531
Raviv Shvili6a771a62014-09-25 15:32:24 +03007532 err = ufshcd_init_clocks(hba);
7533 if (err)
7534 goto out_disable_hba_vreg;
7535
7536 err = ufshcd_setup_clocks(hba, true);
7537 if (err)
7538 goto out_disable_hba_vreg;
7539
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007540 err = ufshcd_init_vreg(hba);
7541 if (err)
7542 goto out_disable_clks;
7543
7544 err = ufshcd_setup_vreg(hba, true);
7545 if (err)
7546 goto out_disable_clks;
7547
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007548 err = ufshcd_variant_hba_init(hba);
7549 if (err)
7550 goto out_disable_vreg;
7551
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007552 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007553 goto out;
7554
7555out_disable_vreg:
7556 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007557out_disable_clks:
7558 ufshcd_setup_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007559out_disable_hba_vreg:
7560 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007561out:
7562 return err;
7563}
7564
7565static void ufshcd_hba_exit(struct ufs_hba *hba)
7566{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007567 if (hba->is_powered) {
7568 ufshcd_variant_hba_exit(hba);
7569 ufshcd_setup_vreg(hba, false);
Gilad Bronera5082532016-10-17 17:10:00 -07007570 ufshcd_suspend_clkscaling(hba);
Vivek Gautameebcc192018-08-07 23:17:39 +05307571 if (ufshcd_is_clkscaling_supported(hba))
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007572 if (hba->devfreq)
7573 ufshcd_suspend_clkscaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007574 ufshcd_setup_clocks(hba, false);
7575 ufshcd_setup_hba_vreg(hba, false);
7576 hba->is_powered = false;
7577 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007578}
7579
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007580static int
7581ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307582{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007583 unsigned char cmd[6] = {REQUEST_SENSE,
7584 0,
7585 0,
7586 0,
Avri Altman09a5a242018-11-22 20:04:56 +02007587 UFS_SENSE_SIZE,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007588 0};
7589 char *buffer;
7590 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307591
Avri Altman09a5a242018-11-22 20:04:56 +02007592 buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007593 if (!buffer) {
7594 ret = -ENOMEM;
7595 goto out;
7596 }
7597
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007598 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
Avri Altman09a5a242018-11-22 20:04:56 +02007599 UFS_SENSE_SIZE, NULL, NULL,
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007600 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007601 if (ret)
7602 pr_err("%s: failed with err %d\n", __func__, ret);
7603
7604 kfree(buffer);
7605out:
7606 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307607}
7608
7609/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007610 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7611 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307612 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007613 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307614 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007615 * Returns 0 if requested power mode is set successfully
7616 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307617 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007618static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7619 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307620{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007621 unsigned char cmd[6] = { START_STOP };
7622 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007623 struct scsi_device *sdp;
7624 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007625 int ret;
7626
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007627 spin_lock_irqsave(hba->host->host_lock, flags);
7628 sdp = hba->sdev_ufs_device;
7629 if (sdp) {
7630 ret = scsi_device_get(sdp);
7631 if (!ret && !scsi_device_online(sdp)) {
7632 ret = -ENODEV;
7633 scsi_device_put(sdp);
7634 }
7635 } else {
7636 ret = -ENODEV;
7637 }
7638 spin_unlock_irqrestore(hba->host->host_lock, flags);
7639
7640 if (ret)
7641 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007642
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307643 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007644 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7645 * handling, which would wait for host to be resumed. Since we know
7646 * we are functional while we are here, skip host resume in error
7647 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307648 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007649 hba->host->eh_noresume = 1;
7650 if (hba->wlun_dev_clr_ua) {
7651 ret = ufshcd_send_request_sense(hba, sdp);
7652 if (ret)
7653 goto out;
7654 /* Unit attention condition is cleared now */
7655 hba->wlun_dev_clr_ua = false;
7656 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307657
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007658 cmd[4] = pwr_mode << 4;
7659
7660 /*
7661 * Current function would be generally called from the power management
Christoph Hellwige8064022016-10-20 15:12:13 +02007662 * callbacks hence set the RQF_PM flag so that it doesn't resume the
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007663 * already suspended childs.
7664 */
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007665 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7666 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007667 if (ret) {
7668 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02007669 "START_STOP failed for power mode: %d, result %x\n",
7670 pwr_mode, ret);
Johannes Thumshirnc65be1a2018-06-25 13:20:58 +02007671 if (driver_byte(ret) == DRIVER_SENSE)
Hannes Reinecke21045512015-01-08 07:43:46 +01007672 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007673 }
7674
7675 if (!ret)
7676 hba->curr_dev_pwr_mode = pwr_mode;
7677out:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007678 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007679 hba->host->eh_noresume = 0;
7680 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307681}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307682
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007683static int ufshcd_link_state_transition(struct ufs_hba *hba,
7684 enum uic_link_state req_link_state,
7685 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307686{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007687 int ret = 0;
7688
7689 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307690 return 0;
7691
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007692 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7693 ret = ufshcd_uic_hibern8_enter(hba);
7694 if (!ret)
7695 ufshcd_set_link_hibern8(hba);
7696 else
7697 goto out;
7698 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307699 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007700 * If autobkops is enabled, link can't be turned off because
7701 * turning off the link would also turn off the device.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307702 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007703 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
7704 (!check_for_bkops || (check_for_bkops &&
7705 !hba->auto_bkops_enabled))) {
7706 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02007707 * Let's make sure that link is in low power mode, we are doing
7708 * this currently by putting the link in Hibern8. Otherway to
7709 * put the link in low power mode is to send the DME end point
7710 * to device and then send the DME reset command to local
7711 * unipro. But putting the link in hibern8 is much faster.
7712 */
7713 ret = ufshcd_uic_hibern8_enter(hba);
7714 if (ret)
7715 goto out;
7716 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007717 * Change controller state to "reset state" which
7718 * should also put the link in off/reset state
7719 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02007720 ufshcd_hba_stop(hba, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007721 /*
7722 * TODO: Check if we need any delay to make sure that
7723 * controller is reset
7724 */
7725 ufshcd_set_link_off(hba);
7726 }
7727
7728out:
7729 return ret;
7730}
7731
7732static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7733{
7734 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02007735 * It seems some UFS devices may keep drawing more than sleep current
7736 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7737 * To avoid this situation, add 2ms delay before putting these UFS
7738 * rails in LPM mode.
7739 */
7740 if (!ufshcd_is_link_active(hba) &&
7741 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7742 usleep_range(2000, 2100);
7743
7744 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007745 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7746 * power.
7747 *
7748 * If UFS device and link is in OFF state, all power supplies (VCC,
7749 * VCCQ, VCCQ2) can be turned off if power on write protect is not
7750 * required. If UFS link is inactive (Hibern8 or OFF state) and device
7751 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7752 *
7753 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7754 * in low power state which would save some power.
7755 */
7756 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7757 !hba->dev_info.is_lu_power_on_wp) {
7758 ufshcd_setup_vreg(hba, false);
7759 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7760 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7761 if (!ufshcd_is_link_active(hba)) {
7762 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7763 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7764 }
7765 }
7766}
7767
7768static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7769{
7770 int ret = 0;
7771
7772 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7773 !hba->dev_info.is_lu_power_on_wp) {
7774 ret = ufshcd_setup_vreg(hba, true);
7775 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007776 if (!ret && !ufshcd_is_link_active(hba)) {
7777 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7778 if (ret)
7779 goto vcc_disable;
7780 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7781 if (ret)
7782 goto vccq_lpm;
7783 }
Subhash Jadavani69d72ac2016-10-27 17:26:24 -07007784 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007785 }
7786 goto out;
7787
7788vccq_lpm:
7789 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7790vcc_disable:
7791 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7792out:
7793 return ret;
7794}
7795
7796static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7797{
7798 if (ufshcd_is_link_off(hba))
7799 ufshcd_setup_hba_vreg(hba, false);
7800}
7801
7802static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7803{
7804 if (ufshcd_is_link_off(hba))
7805 ufshcd_setup_hba_vreg(hba, true);
7806}
7807
7808/**
7809 * ufshcd_suspend - helper function for suspend operations
7810 * @hba: per adapter instance
7811 * @pm_op: desired low power operation type
7812 *
7813 * This function will try to put the UFS device and link into low power
7814 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7815 * (System PM level).
7816 *
7817 * If this function is called during shutdown, it will make sure that
7818 * both UFS device and UFS link is powered off.
7819 *
7820 * NOTE: UFS device & link must be active before we enter in this function.
7821 *
7822 * Returns 0 for success and non-zero for failure
7823 */
7824static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7825{
7826 int ret = 0;
7827 enum ufs_pm_level pm_lvl;
7828 enum ufs_dev_pwr_mode req_dev_pwr_mode;
7829 enum uic_link_state req_link_state;
7830
7831 hba->pm_op_in_progress = 1;
7832 if (!ufshcd_is_shutdown_pm(pm_op)) {
7833 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7834 hba->rpm_lvl : hba->spm_lvl;
7835 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7836 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7837 } else {
7838 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7839 req_link_state = UIC_LINK_OFF_STATE;
7840 }
7841
7842 /*
7843 * If we can't transition into any of the low power modes
7844 * just gate the clocks.
7845 */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007846 ufshcd_hold(hba, false);
7847 hba->clk_gating.is_suspended = true;
7848
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007849 if (hba->clk_scaling.is_allowed) {
7850 cancel_work_sync(&hba->clk_scaling.suspend_work);
7851 cancel_work_sync(&hba->clk_scaling.resume_work);
7852 ufshcd_suspend_clkscaling(hba);
7853 }
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007854
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007855 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7856 req_link_state == UIC_LINK_ACTIVE_STATE) {
7857 goto disable_clks;
7858 }
7859
7860 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7861 (req_link_state == hba->uic_link_state))
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007862 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007863
7864 /* UFS device & link must be active before we enter in this function */
7865 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7866 ret = -EINVAL;
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007867 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007868 }
7869
7870 if (ufshcd_is_runtime_pm(pm_op)) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03007871 if (ufshcd_can_autobkops_during_suspend(hba)) {
7872 /*
7873 * The device is idle with no requests in the queue,
7874 * allow background operations if bkops status shows
7875 * that performance might be impacted.
7876 */
7877 ret = ufshcd_urgent_bkops(hba);
7878 if (ret)
7879 goto enable_gating;
7880 } else {
7881 /* make sure that auto bkops is disabled */
7882 ufshcd_disable_auto_bkops(hba);
7883 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007884 }
7885
7886 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7887 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7888 !ufshcd_is_runtime_pm(pm_op))) {
7889 /* ensure that bkops is disabled */
7890 ufshcd_disable_auto_bkops(hba);
7891 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7892 if (ret)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007893 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007894 }
7895
7896 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7897 if (ret)
7898 goto set_dev_active;
7899
7900 ufshcd_vreg_set_lpm(hba);
7901
7902disable_clks:
7903 /*
7904 * Call vendor specific suspend callback. As these callbacks may access
7905 * vendor specific host controller register space call them before the
7906 * host clocks are ON.
7907 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007908 ret = ufshcd_vops_suspend(hba, pm_op);
7909 if (ret)
7910 goto set_link_active;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007911
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007912 if (!ufshcd_is_link_active(hba))
7913 ufshcd_setup_clocks(hba, false);
7914 else
7915 /* If link is active, device ref_clk can't be switched off */
7916 __ufshcd_setup_clocks(hba, false, true);
7917
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007918 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007919 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007920 /*
7921 * Disable the host irq as host controller as there won't be any
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007922 * host controller transaction expected till resume.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007923 */
7924 ufshcd_disable_irq(hba);
7925 /* Put the host controller in low power mode if possible */
7926 ufshcd_hba_vreg_set_lpm(hba);
7927 goto out;
7928
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007929set_link_active:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007930 if (hba->clk_scaling.is_allowed)
7931 ufshcd_resume_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007932 ufshcd_vreg_set_hpm(hba);
7933 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7934 ufshcd_set_link_active(hba);
7935 else if (ufshcd_is_link_off(hba))
7936 ufshcd_host_reset_and_restore(hba);
7937set_dev_active:
7938 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7939 ufshcd_disable_auto_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007940enable_gating:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007941 if (hba->clk_scaling.is_allowed)
7942 ufshcd_resume_clkscaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007943 hba->clk_gating.is_suspended = false;
7944 ufshcd_release(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007945out:
7946 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08007947 if (ret)
7948 ufshcd_update_reg_hist(&hba->ufs_stats.suspend_err, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007949 return ret;
7950}
7951
7952/**
7953 * ufshcd_resume - helper function for resume operations
7954 * @hba: per adapter instance
7955 * @pm_op: runtime PM or system PM
7956 *
7957 * This function basically brings the UFS device, UniPro link and controller
7958 * to active state.
7959 *
7960 * Returns 0 for success and non-zero for failure
7961 */
7962static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7963{
7964 int ret;
7965 enum uic_link_state old_link_state;
7966
7967 hba->pm_op_in_progress = 1;
7968 old_link_state = hba->uic_link_state;
7969
7970 ufshcd_hba_vreg_set_hpm(hba);
7971 /* Make sure clocks are enabled before accessing controller */
7972 ret = ufshcd_setup_clocks(hba, true);
7973 if (ret)
7974 goto out;
7975
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007976 /* enable the host irq as host controller would be active soon */
7977 ret = ufshcd_enable_irq(hba);
7978 if (ret)
7979 goto disable_irq_and_vops_clks;
7980
7981 ret = ufshcd_vreg_set_hpm(hba);
7982 if (ret)
7983 goto disable_irq_and_vops_clks;
7984
7985 /*
7986 * Call vendor specific resume callback. As these callbacks may access
7987 * vendor specific host controller register space call them when the
7988 * host clocks are ON.
7989 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007990 ret = ufshcd_vops_resume(hba, pm_op);
7991 if (ret)
7992 goto disable_vreg;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007993
7994 if (ufshcd_is_link_hibern8(hba)) {
7995 ret = ufshcd_uic_hibern8_exit(hba);
7996 if (!ret)
7997 ufshcd_set_link_active(hba);
7998 else
7999 goto vendor_suspend;
8000 } else if (ufshcd_is_link_off(hba)) {
8001 ret = ufshcd_host_reset_and_restore(hba);
8002 /*
8003 * ufshcd_host_reset_and_restore() should have already
8004 * set the link state as active
8005 */
8006 if (ret || !ufshcd_is_link_active(hba))
8007 goto vendor_suspend;
8008 }
8009
8010 if (!ufshcd_is_ufs_dev_active(hba)) {
8011 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
8012 if (ret)
8013 goto set_old_link_state;
8014 }
8015
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08008016 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
8017 ufshcd_enable_auto_bkops(hba);
8018 else
8019 /*
8020 * If BKOPs operations are urgently needed at this moment then
8021 * keep auto-bkops enabled or else disable it.
8022 */
8023 ufshcd_urgent_bkops(hba);
8024
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008025 hba->clk_gating.is_suspended = false;
8026
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08008027 if (hba->clk_scaling.is_allowed)
8028 ufshcd_resume_clkscaling(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03008029
Adrian Hunterad448372018-03-20 15:07:38 +02008030 /* Enable Auto-Hibernate if configured */
8031 ufshcd_auto_hibern8_enable(hba);
8032
Can Guo71d848b2019-11-14 22:09:26 -08008033 /* Schedule clock gating in case of no access to UFS device yet */
8034 ufshcd_release(hba);
8035
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008036 goto out;
8037
8038set_old_link_state:
8039 ufshcd_link_state_transition(hba, old_link_state, 0);
8040vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008041 ufshcd_vops_suspend(hba, pm_op);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008042disable_vreg:
8043 ufshcd_vreg_set_lpm(hba);
8044disable_irq_and_vops_clks:
8045 ufshcd_disable_irq(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08008046 if (hba->clk_scaling.is_allowed)
8047 ufshcd_suspend_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008048 ufshcd_setup_clocks(hba, false);
8049out:
8050 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08008051 if (ret)
8052 ufshcd_update_reg_hist(&hba->ufs_stats.resume_err, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008053 return ret;
8054}
8055
8056/**
8057 * ufshcd_system_suspend - system suspend routine
8058 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008059 *
8060 * Check the description of ufshcd_suspend() function for more details.
8061 *
8062 * Returns 0 for success and non-zero for failure
8063 */
8064int ufshcd_system_suspend(struct ufs_hba *hba)
8065{
8066 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008067 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008068
8069 if (!hba || !hba->is_powered)
Dolev Raviv233b5942014-10-23 13:25:14 +03008070 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008071
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008072 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
8073 hba->curr_dev_pwr_mode) &&
8074 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
8075 hba->uic_link_state))
8076 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008077
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008078 if (pm_runtime_suspended(hba->dev)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008079 /*
8080 * UFS device and/or UFS link low power states during runtime
8081 * suspend seems to be different than what is expected during
8082 * system suspend. Hence runtime resume the devic & link and
8083 * let the system suspend low power states to take effect.
8084 * TODO: If resume takes longer time, we might have optimize
8085 * it in future by not resuming everything if possible.
8086 */
8087 ret = ufshcd_runtime_resume(hba);
8088 if (ret)
8089 goto out;
8090 }
8091
8092 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
8093out:
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008094 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
8095 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008096 hba->curr_dev_pwr_mode, hba->uic_link_state);
Dolev Ravive7850602014-09-25 15:32:36 +03008097 if (!ret)
8098 hba->is_sys_suspended = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008099 return ret;
8100}
8101EXPORT_SYMBOL(ufshcd_system_suspend);
8102
8103/**
8104 * ufshcd_system_resume - system resume routine
8105 * @hba: per adapter instance
8106 *
8107 * Returns 0 for success and non-zero for failure
8108 */
8109
8110int ufshcd_system_resume(struct ufs_hba *hba)
8111{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008112 int ret = 0;
8113 ktime_t start = ktime_get();
8114
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008115 if (!hba)
8116 return -EINVAL;
8117
8118 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008119 /*
8120 * Let the runtime resume take care of resuming
8121 * if runtime suspended.
8122 */
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008123 goto out;
8124 else
8125 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
8126out:
8127 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
8128 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008129 hba->curr_dev_pwr_mode, hba->uic_link_state);
Stanley Chuce9e7bc2019-01-07 22:19:34 +08008130 if (!ret)
8131 hba->is_sys_suspended = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008132 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008133}
8134EXPORT_SYMBOL(ufshcd_system_resume);
8135
8136/**
8137 * ufshcd_runtime_suspend - runtime suspend routine
8138 * @hba: per adapter instance
8139 *
8140 * Check the description of ufshcd_suspend() function for more details.
8141 *
8142 * Returns 0 for success and non-zero for failure
8143 */
8144int ufshcd_runtime_suspend(struct ufs_hba *hba)
8145{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008146 int ret = 0;
8147 ktime_t start = ktime_get();
8148
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008149 if (!hba)
8150 return -EINVAL;
8151
8152 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008153 goto out;
8154 else
8155 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
8156out:
8157 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
8158 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008159 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008160 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308161}
8162EXPORT_SYMBOL(ufshcd_runtime_suspend);
8163
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008164/**
8165 * ufshcd_runtime_resume - runtime resume routine
8166 * @hba: per adapter instance
8167 *
8168 * This function basically brings the UFS device, UniPro link and controller
8169 * to active state. Following operations are done in this function:
8170 *
8171 * 1. Turn on all the controller related clocks
8172 * 2. Bring the UniPro link out of Hibernate state
8173 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
8174 * to active state.
8175 * 4. If auto-bkops is enabled on the device, disable it.
8176 *
8177 * So following would be the possible power state after this function return
8178 * successfully:
8179 * S1: UFS device in Active state with VCC rail ON
8180 * UniPro link in Active state
8181 * All the UFS/UniPro controller clocks are ON
8182 *
8183 * Returns 0 for success and non-zero for failure
8184 */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308185int ufshcd_runtime_resume(struct ufs_hba *hba)
8186{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008187 int ret = 0;
8188 ktime_t start = ktime_get();
8189
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008190 if (!hba)
8191 return -EINVAL;
8192
8193 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008194 goto out;
8195 else
8196 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8197out:
8198 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8199 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008200 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008201 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308202}
8203EXPORT_SYMBOL(ufshcd_runtime_resume);
8204
8205int ufshcd_runtime_idle(struct ufs_hba *hba)
8206{
8207 return 0;
8208}
8209EXPORT_SYMBOL(ufshcd_runtime_idle);
8210
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308211/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008212 * ufshcd_shutdown - shutdown routine
8213 * @hba: per adapter instance
8214 *
8215 * This function would power off both UFS device and UFS link.
8216 *
8217 * Returns 0 always to allow force shutdown even in case of errors.
8218 */
8219int ufshcd_shutdown(struct ufs_hba *hba)
8220{
8221 int ret = 0;
8222
Stanley Chuf51913e2019-09-18 12:20:38 +08008223 if (!hba->is_powered)
8224 goto out;
8225
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008226 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
8227 goto out;
8228
8229 if (pm_runtime_suspended(hba->dev)) {
8230 ret = ufshcd_runtime_resume(hba);
8231 if (ret)
8232 goto out;
8233 }
8234
8235 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
8236out:
8237 if (ret)
8238 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
8239 /* allow force shutdown even in case of errors */
8240 return 0;
8241}
8242EXPORT_SYMBOL(ufshcd_shutdown);
8243
8244/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308245 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308246 * data structure memory
Bart Van Assche8aa29f12018-03-01 15:07:20 -08008247 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308248 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308249void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308250{
Avri Altmandf032bf2018-10-07 17:30:35 +03008251 ufs_bsg_remove(hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008252 ufs_sysfs_remove_nodes(hba->dev);
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05308253 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308254 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308255 ufshcd_disable_intr(hba, hba->intr_mask);
Yaniv Gardi596585a2016-03-10 17:37:08 +02008256 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308257
Vivek Gautameebcc192018-08-07 23:17:39 +05308258 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008259 ufshcd_exit_clk_gating(hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08008260 if (ufshcd_is_clkscaling_supported(hba))
8261 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008262 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308263}
8264EXPORT_SYMBOL_GPL(ufshcd_remove);
8265
8266/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02008267 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8268 * @hba: pointer to Host Bus Adapter (HBA)
8269 */
8270void ufshcd_dealloc_host(struct ufs_hba *hba)
8271{
8272 scsi_host_put(hba->host);
8273}
8274EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8275
8276/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008277 * ufshcd_set_dma_mask - Set dma mask based on the controller
8278 * addressing capability
8279 * @hba: per adapter instance
8280 *
8281 * Returns 0 for success, non-zero for failure
8282 */
8283static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8284{
8285 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8286 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8287 return 0;
8288 }
8289 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8290}
8291
8292/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008293 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308294 * @dev: pointer to device handle
8295 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308296 * Returns 0 on success, non-zero value on failure
8297 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008298int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308299{
8300 struct Scsi_Host *host;
8301 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008302 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308303
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308304 if (!dev) {
8305 dev_err(dev,
8306 "Invalid memory reference for dev is NULL\n");
8307 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308308 goto out_error;
8309 }
8310
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308311 host = scsi_host_alloc(&ufshcd_driver_template,
8312 sizeof(struct ufs_hba));
8313 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308314 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308315 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308316 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308317 }
8318 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308319 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308320 hba->dev = dev;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008321 *hba_handle = hba;
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05308322 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008323
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03008324 INIT_LIST_HEAD(&hba->clk_list_head);
8325
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008326out_error:
8327 return err;
8328}
8329EXPORT_SYMBOL(ufshcd_alloc_host);
8330
8331/**
8332 * ufshcd_init - Driver initialization routine
8333 * @hba: per-adapter instance
8334 * @mmio_base: base register address
8335 * @irq: Interrupt line of device
8336 * Returns 0 on success, non-zero value on failure
8337 */
8338int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
8339{
8340 int err;
8341 struct Scsi_Host *host = hba->host;
8342 struct device *dev = hba->dev;
8343
8344 if (!mmio_base) {
8345 dev_err(hba->dev,
8346 "Invalid memory reference for mmio_base is NULL\n");
8347 err = -ENODEV;
8348 goto out_error;
8349 }
8350
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308351 hba->mmio_base = mmio_base;
8352 hba->irq = irq;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308353
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008354 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008355 if (err)
8356 goto out_error;
8357
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308358 /* Read capabilities registers */
8359 ufshcd_hba_capabilities(hba);
8360
8361 /* Get UFS version supported by the controller */
8362 hba->ufs_version = ufshcd_get_ufs_version(hba);
8363
Yaniv Gardic01848c2016-12-05 19:25:02 -08008364 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
8365 (hba->ufs_version != UFSHCI_VERSION_11) &&
8366 (hba->ufs_version != UFSHCI_VERSION_20) &&
8367 (hba->ufs_version != UFSHCI_VERSION_21))
8368 dev_err(hba->dev, "invalid UFS version 0x%x\n",
8369 hba->ufs_version);
8370
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308371 /* Get Interrupt bit mask per version */
8372 hba->intr_mask = ufshcd_get_intr_mask(hba);
8373
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008374 err = ufshcd_set_dma_mask(hba);
8375 if (err) {
8376 dev_err(hba->dev, "set dma mask failed\n");
8377 goto out_disable;
8378 }
8379
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308380 /* Allocate memory for host memory space */
8381 err = ufshcd_memory_alloc(hba);
8382 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308383 dev_err(hba->dev, "Memory allocation failed\n");
8384 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308385 }
8386
8387 /* Configure LRB */
8388 ufshcd_host_memory_configure(hba);
8389
8390 host->can_queue = hba->nutrs;
8391 host->cmd_per_lun = hba->nutrs;
8392 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03008393 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308394 host->max_channel = UFSHCD_MAX_CHANNEL;
8395 host->unique_id = host->host_no;
Avri Altmana851b2b2018-10-07 17:30:34 +03008396 host->max_cmd_len = UFS_CDB_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308397
Dolev Raviv7eb584d2014-09-25 15:32:31 +03008398 hba->max_pwr_info.is_valid = false;
8399
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308400 /* Initailize wait queue for task management */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05308401 init_waitqueue_head(&hba->tm_wq);
8402 init_waitqueue_head(&hba->tm_tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308403
8404 /* Initialize work queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05308405 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308406 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308407
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308408 /* Initialize UIC command mutex */
8409 mutex_init(&hba->uic_cmd_mutex);
8410
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308411 /* Initialize mutex for device management commands */
8412 mutex_init(&hba->dev_cmd.lock);
8413
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08008414 init_rwsem(&hba->clk_scaling_lock);
8415
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308416 /* Initialize device management tag acquire wait queue */
8417 init_waitqueue_head(&hba->dev_cmd.tag_wq);
8418
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008419 ufshcd_init_clk_gating(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02008420
Vivek Gautameebcc192018-08-07 23:17:39 +05308421 ufshcd_init_clk_scaling(hba);
8422
Yaniv Gardi199ef132016-03-10 17:37:06 +02008423 /*
8424 * In order to avoid any spurious interrupt immediately after
8425 * registering UFS controller interrupt handler, clear any pending UFS
8426 * interrupt status and disable all the UFS interrupts.
8427 */
8428 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
8429 REG_INTERRUPT_STATUS);
8430 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
8431 /*
8432 * Make sure that UFS interrupts are disabled and any pending interrupt
8433 * status is cleared before registering UFS interrupt handler.
8434 */
8435 mb();
8436
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308437 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09008438 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308439 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308440 dev_err(hba->dev, "request irq failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008441 goto exit_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008442 } else {
8443 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308444 }
8445
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308446 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308447 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308448 dev_err(hba->dev, "scsi_add_host failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008449 goto exit_gating;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308450 }
8451
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07008452 /* Reset the attached device */
8453 ufshcd_vops_device_reset(hba);
8454
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308455 /* Host controller enable */
8456 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308457 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308458 dev_err(hba->dev, "Host controller enable failed\n");
Dolev Raviv66cc8202016-12-22 18:39:42 -08008459 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08008460 ufshcd_print_host_state(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308461 goto out_remove_scsi_host;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308462 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308463
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -08008464 /*
8465 * Set the default power management level for runtime and system PM.
8466 * Default power saving mode is to keep UFS link in Hibern8 state
8467 * and UFS device in sleep state.
8468 */
8469 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8470 UFS_SLEEP_PWR_MODE,
8471 UIC_LINK_HIBERN8_STATE);
8472 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8473 UFS_SLEEP_PWR_MODE,
8474 UIC_LINK_HIBERN8_STATE);
8475
Adrian Hunterad448372018-03-20 15:07:38 +02008476 /* Set the default auto-hiberate idle timer value to 150 ms */
Stanley Chuf571b372019-05-21 14:44:53 +08008477 if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
Adrian Hunterad448372018-03-20 15:07:38 +02008478 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8479 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8480 }
8481
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05308482 /* Hold auto suspend until async scan completes */
8483 pm_runtime_get_sync(dev);
Subhash Jadavani38135532018-05-03 16:37:18 +05308484 atomic_set(&hba->scsi_block_reqs_cnt, 0);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008485 /*
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008486 * We are assuming that device wasn't put in sleep/power-down
8487 * state exclusively during the boot stage before kernel.
8488 * This assumption helps avoid doing link startup twice during
8489 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008490 */
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008491 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008492
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308493 async_schedule(ufshcd_async_scan, hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008494 ufs_sysfs_add_nodes(hba->dev);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308495
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308496 return 0;
8497
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308498out_remove_scsi_host:
8499 scsi_remove_host(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008500exit_gating:
Vivek Gautameebcc192018-08-07 23:17:39 +05308501 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008502 ufshcd_exit_clk_gating(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308503out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008504 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008505 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308506out_error:
8507 return err;
8508}
8509EXPORT_SYMBOL_GPL(ufshcd_init);
8510
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308511MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8512MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05308513MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308514MODULE_LICENSE("GPL");
8515MODULE_VERSION(UFSHCD_DRIVER_VERSION);