blob: e7621a0a54b88e9a51b383fff93c43cb08983416 [file] [log] [blame]
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05302 * Universal Flash Storage Host controller driver Core
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303 *
4 * This code is based on drivers/scsi/ufs/ufshcd.c
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053011 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053016 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053018 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053024 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030035 *
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053038 */
39
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053040#include <linux/async.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030041#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020042#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020043#include <linux/of.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053044#include "ufshcd.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020045#include "ufs_quirks.h"
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +053046#include "unipro.h"
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +020047#include "ufs-sysfs.h"
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053048
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -080049#define CREATE_TRACE_POINTS
50#include <trace/events/ufs.h>
51
Gilad Bronerdcea0bf2016-10-17 17:09:48 -070052#define UFSHCD_REQ_SENSE_SIZE 18
53
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053054#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
55 UTP_TASK_REQ_COMPL |\
56 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053057/* UIC command timeout, unit: ms */
58#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053059
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053060/* NOP OUT retries waiting for NOP IN response */
61#define NOP_OUT_RETRIES 10
62/* Timeout after 30 msecs if NOP OUT hangs without response */
63#define NOP_OUT_TIMEOUT 30 /* msecs */
64
Dolev Raviv68078d52013-07-30 00:35:58 +053065/* Query request retries */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080066#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +053067/* Query request timeout */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080068#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +053069
Sujit Reddy Thummae2933132014-05-26 10:59:12 +053070/* Task management command timeout */
71#define TM_CMD_TIMEOUT 100 /* msecs */
72
Yaniv Gardi64238fb2016-02-01 15:02:43 +020073/* maximum number of retries for a general UIC command */
74#define UFS_UIC_COMMAND_RETRIES 3
75
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030076/* maximum number of link-startup retries */
77#define DME_LINKSTARTUP_RETRIES 3
78
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +020079/* Maximum retries for Hibern8 enter */
80#define UIC_HIBERN8_ENTER_RETRIES 3
81
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030082/* maximum number of reset retries before giving up */
83#define MAX_HOST_RESET_RETRIES 5
84
Dolev Raviv68078d52013-07-30 00:35:58 +053085/* Expose the flag value from utp_upiu_query.value */
86#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
87
Seungwon Jeon7d568652013-08-31 21:40:20 +053088/* Interrupt aggregation default timeout, unit: 40us */
89#define INT_AGGR_DEF_TO 0x02
90
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030091#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
92 ({ \
93 int _ret; \
94 if (_on) \
95 _ret = ufshcd_enable_vreg(_dev, _vreg); \
96 else \
97 _ret = ufshcd_disable_vreg(_dev, _vreg); \
98 _ret; \
99 })
100
Dolev Raviv66cc8202016-12-22 18:39:42 -0800101#define ufshcd_hex_dump(prefix_str, buf, len) \
102print_hex_dump(KERN_ERR, prefix_str, DUMP_PREFIX_OFFSET, 16, 4, buf, len, false)
103
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530104enum {
105 UFSHCD_MAX_CHANNEL = 0,
106 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530107 UFSHCD_CMD_PER_LUN = 32,
108 UFSHCD_CAN_QUEUE = 32,
109};
110
111/* UFSHCD states */
112enum {
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530113 UFSHCD_STATE_RESET,
114 UFSHCD_STATE_ERROR,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530115 UFSHCD_STATE_OPERATIONAL,
Zang Leigang141f8162016-11-16 11:29:37 +0800116 UFSHCD_STATE_EH_SCHEDULED,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530117};
118
119/* UFSHCD error handling flags */
120enum {
121 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530122};
123
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530124/* UFSHCD UIC layer error flags */
125enum {
126 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200127 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
128 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
129 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
130 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
131 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530132};
133
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530134#define ufshcd_set_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300135 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530136#define ufshcd_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300137 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530138#define ufshcd_clear_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300139 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530140
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300141#define ufshcd_set_ufs_dev_active(h) \
142 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
143#define ufshcd_set_ufs_dev_sleep(h) \
144 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
145#define ufshcd_set_ufs_dev_poweroff(h) \
146 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
147#define ufshcd_is_ufs_dev_active(h) \
148 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
149#define ufshcd_is_ufs_dev_sleep(h) \
150 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
151#define ufshcd_is_ufs_dev_poweroff(h) \
152 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
153
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +0200154struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300155 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
156 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
157 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
158 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
159 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
160 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
161};
162
163static inline enum ufs_dev_pwr_mode
164ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
165{
166 return ufs_pm_lvl_states[lvl].dev_state;
167}
168
169static inline enum uic_link_state
170ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
171{
172 return ufs_pm_lvl_states[lvl].link_state;
173}
174
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -0800175static inline enum ufs_pm_level
176ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
177 enum uic_link_state link_state)
178{
179 enum ufs_pm_level lvl;
180
181 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
182 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
183 (ufs_pm_lvl_states[lvl].link_state == link_state))
184 return lvl;
185 }
186
187 /* if no match found, return the level 0 */
188 return UFS_PM_LVL_0;
189}
190
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800191static struct ufs_dev_fix ufs_fixups[] = {
192 /* UFS cards deviations table */
193 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
194 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
195 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
196 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
197 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
198 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
199 UFS_DEVICE_NO_FASTAUTO),
200 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
201 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
202 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
203 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
204 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
205 UFS_DEVICE_QUIRK_PA_TACTIVATE),
206 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
207 UFS_DEVICE_QUIRK_PA_TACTIVATE),
208 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
209 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
210 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
211
212 END_FIX
213};
214
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530215static void ufshcd_tmc_handler(struct ufs_hba *hba);
216static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530217static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Dolev Ravive7d38252016-12-22 18:40:07 -0800218static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530219static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300220static void ufshcd_hba_exit(struct ufs_hba *hba);
221static int ufshcd_probe_hba(struct ufs_hba *hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300222static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
223 bool skip_ref_clk);
224static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
Yaniv Gardi60f01872016-03-10 17:37:11 +0200225static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300226static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
227static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300228static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300229static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800230static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
231static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800232static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800233static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300234static irqreturn_t ufshcd_intr(int irq, void *__hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300235static int ufshcd_config_pwr_mode(struct ufs_hba *hba,
236 struct ufs_pa_layer_attr *desired_pwr_mode);
Yaniv Gardi874237f2015-05-17 18:55:03 +0300237static int ufshcd_change_power_mode(struct ufs_hba *hba,
238 struct ufs_pa_layer_attr *pwr_mode);
Yaniv Gardi14497322016-02-01 15:02:39 +0200239static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
240{
241 return tag >= 0 && tag < hba->nutrs;
242}
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300243
244static inline int ufshcd_enable_irq(struct ufs_hba *hba)
245{
246 int ret = 0;
247
248 if (!hba->is_irq_enabled) {
249 ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
250 hba);
251 if (ret)
252 dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
253 __func__, ret);
254 hba->is_irq_enabled = true;
255 }
256
257 return ret;
258}
259
260static inline void ufshcd_disable_irq(struct ufs_hba *hba)
261{
262 if (hba->is_irq_enabled) {
263 free_irq(hba->irq, hba);
264 hba->is_irq_enabled = false;
265 }
266}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530267
Yaniv Gardib573d482016-03-10 17:37:09 +0200268/* replace non-printable or non-ASCII characters with spaces */
269static inline void ufshcd_remove_non_printable(char *val)
270{
271 if (!val)
272 return;
273
274 if (*val < 0x20 || *val > 0x7e)
275 *val = ' ';
276}
277
Lee Susman1a07f2d2016-12-22 18:42:03 -0800278static void ufshcd_add_command_trace(struct ufs_hba *hba,
279 unsigned int tag, const char *str)
280{
281 sector_t lba = -1;
282 u8 opcode = 0;
283 u32 intr, doorbell;
284 struct ufshcd_lrb *lrbp;
285 int transfer_len = -1;
286
287 if (!trace_ufshcd_command_enabled())
288 return;
289
290 lrbp = &hba->lrb[tag];
291
292 if (lrbp->cmd) { /* data phase exists */
293 opcode = (u8)(*lrbp->cmd->cmnd);
294 if ((opcode == READ_10) || (opcode == WRITE_10)) {
295 /*
296 * Currently we only fully trace read(10) and write(10)
297 * commands
298 */
299 if (lrbp->cmd->request && lrbp->cmd->request->bio)
300 lba =
301 lrbp->cmd->request->bio->bi_iter.bi_sector;
302 transfer_len = be32_to_cpu(
303 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
304 }
305 }
306
307 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
308 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
309 trace_ufshcd_command(dev_name(hba->dev), str, tag,
310 doorbell, transfer_len, intr, lba, opcode);
311}
312
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800313static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
314{
315 struct ufs_clk_info *clki;
316 struct list_head *head = &hba->clk_list_head;
317
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300318 if (list_empty(head))
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800319 return;
320
321 list_for_each_entry(clki, head, list) {
322 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
323 clki->max_freq)
324 dev_err(hba->dev, "clk: %s, rate: %u\n",
325 clki->name, clki->curr_freq);
326 }
327}
328
329static void ufshcd_print_uic_err_hist(struct ufs_hba *hba,
330 struct ufs_uic_err_reg_hist *err_hist, char *err_name)
331{
332 int i;
333
334 for (i = 0; i < UIC_ERR_REG_HIST_LENGTH; i++) {
335 int p = (i + err_hist->pos - 1) % UIC_ERR_REG_HIST_LENGTH;
336
337 if (err_hist->reg[p] == 0)
338 continue;
339 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, i,
340 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
341 }
342}
343
Dolev Raviv66cc8202016-12-22 18:39:42 -0800344static void ufshcd_print_host_regs(struct ufs_hba *hba)
345{
346 /*
347 * hex_dump reads its data without the readl macro. This might
348 * cause inconsistency issues on some platform, as the printed
349 * values may be from cache and not the most recent value.
350 * To know whether you are looking at an un-cached version verify
351 * that IORESOURCE_MEM flag is on when xxx_get_resource() is invoked
352 * during platform/pci probe function.
353 */
354 ufshcd_hex_dump("host regs: ", hba->mmio_base, UFSHCI_REG_SPACE_SIZE);
355 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
356 hba->ufs_version, hba->capabilities);
357 dev_err(hba->dev,
358 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
359 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800360 dev_err(hba->dev,
361 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
362 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
363 hba->ufs_stats.hibern8_exit_cnt);
364
365 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
366 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
367 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
368 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
369 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
370
371 ufshcd_print_clk_freqs(hba);
372
373 if (hba->vops && hba->vops->dbg_register_dump)
374 hba->vops->dbg_register_dump(hba);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800375}
376
377static
378void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
379{
380 struct ufshcd_lrb *lrbp;
Gilad Broner7fabb772017-02-03 16:56:50 -0800381 int prdt_length;
Dolev Raviv66cc8202016-12-22 18:39:42 -0800382 int tag;
383
384 for_each_set_bit(tag, &bitmap, hba->nutrs) {
385 lrbp = &hba->lrb[tag];
386
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800387 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
388 tag, ktime_to_us(lrbp->issue_time_stamp));
Zang Leigang09017182017-09-27 10:06:06 +0800389 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
390 tag, ktime_to_us(lrbp->compl_time_stamp));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800391 dev_err(hba->dev,
392 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
393 tag, (u64)lrbp->utrd_dma_addr);
394
Dolev Raviv66cc8202016-12-22 18:39:42 -0800395 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
396 sizeof(struct utp_transfer_req_desc));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800397 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
398 (u64)lrbp->ucd_req_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800399 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
400 sizeof(struct utp_upiu_req));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800401 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
402 (u64)lrbp->ucd_rsp_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800403 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
404 sizeof(struct utp_upiu_rsp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800405
Gilad Broner7fabb772017-02-03 16:56:50 -0800406 prdt_length = le16_to_cpu(
407 lrbp->utr_descriptor_ptr->prd_table_length);
408 dev_err(hba->dev,
409 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
410 tag, prdt_length,
411 (u64)lrbp->ucd_prdt_dma_addr);
412
413 if (pr_prdt)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800414 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
Gilad Broner7fabb772017-02-03 16:56:50 -0800415 sizeof(struct ufshcd_sg_entry) * prdt_length);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800416 }
417}
418
419static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
420{
421 struct utp_task_req_desc *tmrdp;
422 int tag;
423
424 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
425 tmrdp = &hba->utmrdl_base_addr[tag];
426 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
427 ufshcd_hex_dump("TM TRD: ", &tmrdp->header,
428 sizeof(struct request_desc_header));
429 dev_err(hba->dev, "TM[%d] - Task Management Request UPIU\n",
430 tag);
431 ufshcd_hex_dump("TM REQ: ", tmrdp->task_req_upiu,
432 sizeof(struct utp_upiu_req));
433 dev_err(hba->dev, "TM[%d] - Task Management Response UPIU\n",
434 tag);
435 ufshcd_hex_dump("TM RSP: ", tmrdp->task_rsp_upiu,
436 sizeof(struct utp_task_req_desc));
437 }
438}
439
Gilad Broner6ba65582017-02-03 16:57:28 -0800440static void ufshcd_print_host_state(struct ufs_hba *hba)
441{
442 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
443 dev_err(hba->dev, "lrb in use=0x%lx, outstanding reqs=0x%lx tasks=0x%lx\n",
Zang Leigange002e652017-08-24 10:57:15 +0800444 hba->lrb_in_use, hba->outstanding_reqs, hba->outstanding_tasks);
Gilad Broner6ba65582017-02-03 16:57:28 -0800445 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
446 hba->saved_err, hba->saved_uic_err);
447 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
448 hba->curr_dev_pwr_mode, hba->uic_link_state);
449 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
450 hba->pm_op_in_progress, hba->is_sys_suspended);
451 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
452 hba->auto_bkops_enabled, hba->host->host_self_blocked);
453 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
454 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
455 hba->eh_flags, hba->req_abort_count);
456 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
457 hba->capabilities, hba->caps);
458 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
459 hba->dev_quirks);
460}
461
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800462/**
463 * ufshcd_print_pwr_info - print power params as saved in hba
464 * power info
465 * @hba: per-adapter instance
466 */
467static void ufshcd_print_pwr_info(struct ufs_hba *hba)
468{
469 static const char * const names[] = {
470 "INVALID MODE",
471 "FAST MODE",
472 "SLOW_MODE",
473 "INVALID MODE",
474 "FASTAUTO_MODE",
475 "SLOWAUTO_MODE",
476 "INVALID MODE",
477 };
478
479 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
480 __func__,
481 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
482 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
483 names[hba->pwr_info.pwr_rx],
484 names[hba->pwr_info.pwr_tx],
485 hba->pwr_info.hs_rate);
486}
487
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530488/*
489 * ufshcd_wait_for_register - wait for register value to change
490 * @hba - per-adapter interface
491 * @reg - mmio register offset
492 * @mask - mask to apply to read register value
493 * @val - wait condition
494 * @interval_us - polling interval in microsecs
495 * @timeout_ms - timeout in millisecs
Yaniv Gardi596585a2016-03-10 17:37:08 +0200496 * @can_sleep - perform sleep or just spin
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530497 *
498 * Returns -ETIMEDOUT on error, zero on success
499 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200500int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
501 u32 val, unsigned long interval_us,
502 unsigned long timeout_ms, bool can_sleep)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530503{
504 int err = 0;
505 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
506
507 /* ignore bits that we don't intend to wait on */
508 val = val & mask;
509
510 while ((ufshcd_readl(hba, reg) & mask) != val) {
Yaniv Gardi596585a2016-03-10 17:37:08 +0200511 if (can_sleep)
512 usleep_range(interval_us, interval_us + 50);
513 else
514 udelay(interval_us);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530515 if (time_after(jiffies, timeout)) {
516 if ((ufshcd_readl(hba, reg) & mask) != val)
517 err = -ETIMEDOUT;
518 break;
519 }
520 }
521
522 return err;
523}
524
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530525/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530526 * ufshcd_get_intr_mask - Get the interrupt bit mask
527 * @hba - Pointer to adapter instance
528 *
529 * Returns interrupt bit mask per version
530 */
531static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
532{
Yaniv Gardic01848c2016-12-05 19:25:02 -0800533 u32 intr_mask = 0;
534
535 switch (hba->ufs_version) {
536 case UFSHCI_VERSION_10:
537 intr_mask = INTERRUPT_MASK_ALL_VER_10;
538 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800539 case UFSHCI_VERSION_11:
540 case UFSHCI_VERSION_20:
541 intr_mask = INTERRUPT_MASK_ALL_VER_11;
542 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800543 case UFSHCI_VERSION_21:
544 default:
545 intr_mask = INTERRUPT_MASK_ALL_VER_21;
Tomohiro Kusumi031d1e02017-03-23 12:49:04 +0200546 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800547 }
548
549 return intr_mask;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530550}
551
552/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530553 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
554 * @hba - Pointer to adapter instance
555 *
556 * Returns UFSHCI version supported by the controller
557 */
558static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
559{
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200560 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
561 return ufshcd_vops_get_ufs_hci_version(hba);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300562
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530563 return ufshcd_readl(hba, REG_UFS_VERSION);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530564}
565
566/**
567 * ufshcd_is_device_present - Check if any device connected to
568 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300569 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530570 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300571 * Returns true if device present, false if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530572 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300573static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530574{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300575 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300576 DEVICE_PRESENT) ? true : false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530577}
578
579/**
580 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
581 * @lrb: pointer to local command reference block
582 *
583 * This function is used to get the OCS field from UTRD
584 * Returns the OCS field in the UTRD
585 */
586static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
587{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530588 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530589}
590
591/**
592 * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
593 * @task_req_descp: pointer to utp_task_req_desc structure
594 *
595 * This function is used to get the OCS field from UTMRD
596 * Returns the OCS field in the UTMRD
597 */
598static inline int
599ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp)
600{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530601 return le32_to_cpu(task_req_descp->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530602}
603
604/**
605 * ufshcd_get_tm_free_slot - get a free slot for task management request
606 * @hba: per adapter instance
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530607 * @free_slot: pointer to variable with available slot value
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530608 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530609 * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
610 * Returns 0 if free slot is not available, else return 1 with tag value
611 * in @free_slot.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530612 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530613static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530614{
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530615 int tag;
616 bool ret = false;
617
618 if (!free_slot)
619 goto out;
620
621 do {
622 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
623 if (tag >= hba->nutmrs)
624 goto out;
625 } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
626
627 *free_slot = tag;
628 ret = true;
629out:
630 return ret;
631}
632
633static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
634{
635 clear_bit_unlock(slot, &hba->tm_slots_in_use);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530636}
637
638/**
639 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
640 * @hba: per adapter instance
641 * @pos: position of the bit to be cleared
642 */
643static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
644{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530645 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530646}
647
648/**
Yaniv Gardia48353f2016-02-01 15:02:40 +0200649 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
650 * @hba: per adapter instance
651 * @tag: position of the bit to be cleared
652 */
653static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
654{
655 __clear_bit(tag, &hba->outstanding_reqs);
656}
657
658/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530659 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
660 * @reg: Register value of host controller status
661 *
662 * Returns integer, 0 on Success and positive value if failed
663 */
664static inline int ufshcd_get_lists_status(u32 reg)
665{
Tomohiro Kusumi6cf16112017-04-26 20:28:58 +0300666 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530667}
668
669/**
670 * ufshcd_get_uic_cmd_result - Get the UIC command result
671 * @hba: Pointer to adapter instance
672 *
673 * This function gets the result of UIC command completion
674 * Returns 0 on success, non zero value on error
675 */
676static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
677{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530678 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530679 MASK_UIC_COMMAND_RESULT;
680}
681
682/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530683 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
684 * @hba: Pointer to adapter instance
685 *
686 * This function gets UIC command argument3
687 * Returns 0 on success, non zero value on error
688 */
689static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
690{
691 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
692}
693
694/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530695 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530696 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530697 */
698static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530699ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530700{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530701 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530702}
703
704/**
705 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
706 * @ucd_rsp_ptr: pointer to response UPIU
707 *
708 * This function gets the response status and scsi_status from response UPIU
709 * Returns the response result code.
710 */
711static inline int
712ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
713{
714 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
715}
716
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530717/*
718 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
719 * from response UPIU
720 * @ucd_rsp_ptr: pointer to response UPIU
721 *
722 * Return the data segment length.
723 */
724static inline unsigned int
725ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
726{
727 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
728 MASK_RSP_UPIU_DATA_SEG_LEN;
729}
730
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530731/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530732 * ufshcd_is_exception_event - Check if the device raised an exception event
733 * @ucd_rsp_ptr: pointer to response UPIU
734 *
735 * The function checks if the device raised an exception event indicated in
736 * the Device Information field of response UPIU.
737 *
738 * Returns true if exception is raised, false otherwise.
739 */
740static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
741{
742 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
743 MASK_RSP_EXCEPTION_EVENT ? true : false;
744}
745
746/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530747 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530748 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530749 */
750static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530751ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530752{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530753 ufshcd_writel(hba, INT_AGGR_ENABLE |
754 INT_AGGR_COUNTER_AND_TIMER_RESET,
755 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
756}
757
758/**
759 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
760 * @hba: per adapter instance
761 * @cnt: Interrupt aggregation counter threshold
762 * @tmout: Interrupt aggregation timeout value
763 */
764static inline void
765ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
766{
767 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
768 INT_AGGR_COUNTER_THLD_VAL(cnt) |
769 INT_AGGR_TIMEOUT_VAL(tmout),
770 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530771}
772
773/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300774 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
775 * @hba: per adapter instance
776 */
777static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
778{
779 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
780}
781
782/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530783 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
784 * When run-stop registers are set to 1, it indicates the
785 * host controller that it can process the requests
786 * @hba: per adapter instance
787 */
788static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
789{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530790 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
791 REG_UTP_TASK_REQ_LIST_RUN_STOP);
792 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
793 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530794}
795
796/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530797 * ufshcd_hba_start - Start controller initialization sequence
798 * @hba: per adapter instance
799 */
800static inline void ufshcd_hba_start(struct ufs_hba *hba)
801{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530802 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530803}
804
805/**
806 * ufshcd_is_hba_active - Get controller state
807 * @hba: per adapter instance
808 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300809 * Returns false if controller is active, true otherwise
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530810 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300811static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530812{
Tomohiro Kusumi4a8eec22017-03-28 16:49:25 +0300813 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
814 ? false : true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530815}
816
Yaniv Gardi37113102016-03-10 17:37:16 +0200817u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
818{
819 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
820 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
821 (hba->ufs_version == UFSHCI_VERSION_11))
822 return UFS_UNIPRO_VER_1_41;
823 else
824 return UFS_UNIPRO_VER_1_6;
825}
826EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
827
828static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
829{
830 /*
831 * If both host and device support UniPro ver1.6 or later, PA layer
832 * parameters tuning happens during link startup itself.
833 *
834 * We can manually tune PA layer parameters if either host or device
835 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
836 * logic simple, we will only do manual tuning if local unipro version
837 * doesn't support ver1.6 or later.
838 */
839 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
840 return true;
841 else
842 return false;
843}
844
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800845static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
846{
847 int ret = 0;
848 struct ufs_clk_info *clki;
849 struct list_head *head = &hba->clk_list_head;
850 ktime_t start = ktime_get();
851 bool clk_state_changed = false;
852
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300853 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800854 goto out;
855
856 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
857 if (ret)
858 return ret;
859
860 list_for_each_entry(clki, head, list) {
861 if (!IS_ERR_OR_NULL(clki->clk)) {
862 if (scale_up && clki->max_freq) {
863 if (clki->curr_freq == clki->max_freq)
864 continue;
865
866 clk_state_changed = true;
867 ret = clk_set_rate(clki->clk, clki->max_freq);
868 if (ret) {
869 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
870 __func__, clki->name,
871 clki->max_freq, ret);
872 break;
873 }
874 trace_ufshcd_clk_scaling(dev_name(hba->dev),
875 "scaled up", clki->name,
876 clki->curr_freq,
877 clki->max_freq);
878
879 clki->curr_freq = clki->max_freq;
880
881 } else if (!scale_up && clki->min_freq) {
882 if (clki->curr_freq == clki->min_freq)
883 continue;
884
885 clk_state_changed = true;
886 ret = clk_set_rate(clki->clk, clki->min_freq);
887 if (ret) {
888 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
889 __func__, clki->name,
890 clki->min_freq, ret);
891 break;
892 }
893 trace_ufshcd_clk_scaling(dev_name(hba->dev),
894 "scaled down", clki->name,
895 clki->curr_freq,
896 clki->min_freq);
897 clki->curr_freq = clki->min_freq;
898 }
899 }
900 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
901 clki->name, clk_get_rate(clki->clk));
902 }
903
904 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
905
906out:
907 if (clk_state_changed)
908 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
909 (scale_up ? "up" : "down"),
910 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
911 return ret;
912}
913
914/**
915 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
916 * @hba: per adapter instance
917 * @scale_up: True if scaling up and false if scaling down
918 *
919 * Returns true if scaling is required, false otherwise.
920 */
921static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
922 bool scale_up)
923{
924 struct ufs_clk_info *clki;
925 struct list_head *head = &hba->clk_list_head;
926
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300927 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800928 return false;
929
930 list_for_each_entry(clki, head, list) {
931 if (!IS_ERR_OR_NULL(clki->clk)) {
932 if (scale_up && clki->max_freq) {
933 if (clki->curr_freq == clki->max_freq)
934 continue;
935 return true;
936 } else if (!scale_up && clki->min_freq) {
937 if (clki->curr_freq == clki->min_freq)
938 continue;
939 return true;
940 }
941 }
942 }
943
944 return false;
945}
946
947static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
948 u64 wait_timeout_us)
949{
950 unsigned long flags;
951 int ret = 0;
952 u32 tm_doorbell;
953 u32 tr_doorbell;
954 bool timeout = false, do_last_check = false;
955 ktime_t start;
956
957 ufshcd_hold(hba, false);
958 spin_lock_irqsave(hba->host->host_lock, flags);
959 /*
960 * Wait for all the outstanding tasks/transfer requests.
961 * Verify by checking the doorbell registers are clear.
962 */
963 start = ktime_get();
964 do {
965 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
966 ret = -EBUSY;
967 goto out;
968 }
969
970 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
971 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
972 if (!tm_doorbell && !tr_doorbell) {
973 timeout = false;
974 break;
975 } else if (do_last_check) {
976 break;
977 }
978
979 spin_unlock_irqrestore(hba->host->host_lock, flags);
980 schedule();
981 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
982 wait_timeout_us) {
983 timeout = true;
984 /*
985 * We might have scheduled out for long time so make
986 * sure to check if doorbells are cleared by this time
987 * or not.
988 */
989 do_last_check = true;
990 }
991 spin_lock_irqsave(hba->host->host_lock, flags);
992 } while (tm_doorbell || tr_doorbell);
993
994 if (timeout) {
995 dev_err(hba->dev,
996 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
997 __func__, tm_doorbell, tr_doorbell);
998 ret = -EBUSY;
999 }
1000out:
1001 spin_unlock_irqrestore(hba->host->host_lock, flags);
1002 ufshcd_release(hba);
1003 return ret;
1004}
1005
1006/**
1007 * ufshcd_scale_gear - scale up/down UFS gear
1008 * @hba: per adapter instance
1009 * @scale_up: True for scaling up gear and false for scaling down
1010 *
1011 * Returns 0 for success,
1012 * Returns -EBUSY if scaling can't happen at this time
1013 * Returns non-zero for any other errors
1014 */
1015static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1016{
1017 #define UFS_MIN_GEAR_TO_SCALE_DOWN UFS_HS_G1
1018 int ret = 0;
1019 struct ufs_pa_layer_attr new_pwr_info;
1020
1021 if (scale_up) {
1022 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1023 sizeof(struct ufs_pa_layer_attr));
1024 } else {
1025 memcpy(&new_pwr_info, &hba->pwr_info,
1026 sizeof(struct ufs_pa_layer_attr));
1027
1028 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1029 || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1030 /* save the current power mode */
1031 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1032 &hba->pwr_info,
1033 sizeof(struct ufs_pa_layer_attr));
1034
1035 /* scale down gear */
1036 new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1037 new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1038 }
1039 }
1040
1041 /* check if the power mode needs to be changed or not? */
1042 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1043
1044 if (ret)
1045 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1046 __func__, ret,
1047 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1048 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1049
1050 return ret;
1051}
1052
1053static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1054{
1055 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1056 int ret = 0;
1057 /*
1058 * make sure that there are no outstanding requests when
1059 * clock scaling is in progress
1060 */
1061 scsi_block_requests(hba->host);
1062 down_write(&hba->clk_scaling_lock);
1063 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1064 ret = -EBUSY;
1065 up_write(&hba->clk_scaling_lock);
1066 scsi_unblock_requests(hba->host);
1067 }
1068
1069 return ret;
1070}
1071
1072static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1073{
1074 up_write(&hba->clk_scaling_lock);
1075 scsi_unblock_requests(hba->host);
1076}
1077
1078/**
1079 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1080 * @hba: per adapter instance
1081 * @scale_up: True for scaling up and false for scalin down
1082 *
1083 * Returns 0 for success,
1084 * Returns -EBUSY if scaling can't happen at this time
1085 * Returns non-zero for any other errors
1086 */
1087static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1088{
1089 int ret = 0;
1090
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001091 /* let's not get into low power until clock scaling is completed */
1092 ufshcd_hold(hba, false);
1093
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001094 ret = ufshcd_clock_scaling_prepare(hba);
1095 if (ret)
1096 return ret;
1097
1098 /* scale down the gear before scaling down clocks */
1099 if (!scale_up) {
1100 ret = ufshcd_scale_gear(hba, false);
1101 if (ret)
1102 goto out;
1103 }
1104
1105 ret = ufshcd_scale_clks(hba, scale_up);
1106 if (ret) {
1107 if (!scale_up)
1108 ufshcd_scale_gear(hba, true);
1109 goto out;
1110 }
1111
1112 /* scale up the gear after scaling up clocks */
1113 if (scale_up) {
1114 ret = ufshcd_scale_gear(hba, true);
1115 if (ret) {
1116 ufshcd_scale_clks(hba, false);
1117 goto out;
1118 }
1119 }
1120
1121 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1122
1123out:
1124 ufshcd_clock_scaling_unprepare(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001125 ufshcd_release(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001126 return ret;
1127}
1128
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001129static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1130{
1131 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1132 clk_scaling.suspend_work);
1133 unsigned long irq_flags;
1134
1135 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1136 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1137 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1138 return;
1139 }
1140 hba->clk_scaling.is_suspended = true;
1141 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1142
1143 __ufshcd_suspend_clkscaling(hba);
1144}
1145
1146static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1147{
1148 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1149 clk_scaling.resume_work);
1150 unsigned long irq_flags;
1151
1152 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1153 if (!hba->clk_scaling.is_suspended) {
1154 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1155 return;
1156 }
1157 hba->clk_scaling.is_suspended = false;
1158 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1159
1160 devfreq_resume_device(hba->devfreq);
1161}
1162
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001163static int ufshcd_devfreq_target(struct device *dev,
1164 unsigned long *freq, u32 flags)
1165{
1166 int ret = 0;
1167 struct ufs_hba *hba = dev_get_drvdata(dev);
1168 ktime_t start;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001169 bool scale_up, sched_clk_scaling_suspend_work = false;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001170 unsigned long irq_flags;
1171
1172 if (!ufshcd_is_clkscaling_supported(hba))
1173 return -EINVAL;
1174
1175 if ((*freq > 0) && (*freq < UINT_MAX)) {
1176 dev_err(hba->dev, "%s: invalid freq = %lu\n", __func__, *freq);
1177 return -EINVAL;
1178 }
1179
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001180 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1181 if (ufshcd_eh_in_progress(hba)) {
1182 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1183 return 0;
1184 }
1185
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001186 if (!hba->clk_scaling.active_reqs)
1187 sched_clk_scaling_suspend_work = true;
1188
1189 scale_up = (*freq == UINT_MAX) ? true : false;
1190 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1191 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1192 ret = 0;
1193 goto out; /* no state change required */
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001194 }
1195 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1196
1197 start = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001198 ret = ufshcd_devfreq_scale(hba, scale_up);
1199
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001200 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1201 (scale_up ? "up" : "down"),
1202 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1203
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001204out:
1205 if (sched_clk_scaling_suspend_work)
1206 queue_work(hba->clk_scaling.workq,
1207 &hba->clk_scaling.suspend_work);
1208
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001209 return ret;
1210}
1211
1212
1213static int ufshcd_devfreq_get_dev_status(struct device *dev,
1214 struct devfreq_dev_status *stat)
1215{
1216 struct ufs_hba *hba = dev_get_drvdata(dev);
1217 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1218 unsigned long flags;
1219
1220 if (!ufshcd_is_clkscaling_supported(hba))
1221 return -EINVAL;
1222
1223 memset(stat, 0, sizeof(*stat));
1224
1225 spin_lock_irqsave(hba->host->host_lock, flags);
1226 if (!scaling->window_start_t)
1227 goto start_window;
1228
1229 if (scaling->is_busy_started)
1230 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1231 scaling->busy_start_t));
1232
1233 stat->total_time = jiffies_to_usecs((long)jiffies -
1234 (long)scaling->window_start_t);
1235 stat->busy_time = scaling->tot_busy_t;
1236start_window:
1237 scaling->window_start_t = jiffies;
1238 scaling->tot_busy_t = 0;
1239
1240 if (hba->outstanding_reqs) {
1241 scaling->busy_start_t = ktime_get();
1242 scaling->is_busy_started = true;
1243 } else {
1244 scaling->busy_start_t = 0;
1245 scaling->is_busy_started = false;
1246 }
1247 spin_unlock_irqrestore(hba->host->host_lock, flags);
1248 return 0;
1249}
1250
1251static struct devfreq_dev_profile ufs_devfreq_profile = {
1252 .polling_ms = 100,
1253 .target = ufshcd_devfreq_target,
1254 .get_dev_status = ufshcd_devfreq_get_dev_status,
1255};
1256
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001257static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1258{
1259 unsigned long flags;
1260
1261 devfreq_suspend_device(hba->devfreq);
1262 spin_lock_irqsave(hba->host->host_lock, flags);
1263 hba->clk_scaling.window_start_t = 0;
1264 spin_unlock_irqrestore(hba->host->host_lock, flags);
1265}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001266
Gilad Bronera5082532016-10-17 17:10:00 -07001267static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1268{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001269 unsigned long flags;
1270 bool suspend = false;
1271
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001272 if (!ufshcd_is_clkscaling_supported(hba))
1273 return;
1274
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001275 spin_lock_irqsave(hba->host->host_lock, flags);
1276 if (!hba->clk_scaling.is_suspended) {
1277 suspend = true;
1278 hba->clk_scaling.is_suspended = true;
1279 }
1280 spin_unlock_irqrestore(hba->host->host_lock, flags);
1281
1282 if (suspend)
1283 __ufshcd_suspend_clkscaling(hba);
Gilad Bronera5082532016-10-17 17:10:00 -07001284}
1285
1286static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1287{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001288 unsigned long flags;
1289 bool resume = false;
1290
1291 if (!ufshcd_is_clkscaling_supported(hba))
1292 return;
1293
1294 spin_lock_irqsave(hba->host->host_lock, flags);
1295 if (hba->clk_scaling.is_suspended) {
1296 resume = true;
1297 hba->clk_scaling.is_suspended = false;
1298 }
1299 spin_unlock_irqrestore(hba->host->host_lock, flags);
1300
1301 if (resume)
1302 devfreq_resume_device(hba->devfreq);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001303}
1304
1305static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1306 struct device_attribute *attr, char *buf)
1307{
1308 struct ufs_hba *hba = dev_get_drvdata(dev);
1309
1310 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1311}
1312
1313static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1314 struct device_attribute *attr, const char *buf, size_t count)
1315{
1316 struct ufs_hba *hba = dev_get_drvdata(dev);
1317 u32 value;
1318 int err;
1319
1320 if (kstrtou32(buf, 0, &value))
1321 return -EINVAL;
1322
1323 value = !!value;
1324 if (value == hba->clk_scaling.is_allowed)
1325 goto out;
1326
1327 pm_runtime_get_sync(hba->dev);
1328 ufshcd_hold(hba, false);
1329
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001330 cancel_work_sync(&hba->clk_scaling.suspend_work);
1331 cancel_work_sync(&hba->clk_scaling.resume_work);
1332
1333 hba->clk_scaling.is_allowed = value;
1334
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001335 if (value) {
1336 ufshcd_resume_clkscaling(hba);
1337 } else {
1338 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001339 err = ufshcd_devfreq_scale(hba, true);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001340 if (err)
1341 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1342 __func__, err);
1343 }
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001344
1345 ufshcd_release(hba);
1346 pm_runtime_put_sync(hba->dev);
1347out:
1348 return count;
Gilad Bronera5082532016-10-17 17:10:00 -07001349}
1350
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001351static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1352{
1353 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1354 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1355 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1356 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1357 hba->clk_scaling.enable_attr.attr.mode = 0644;
1358 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1359 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1360}
1361
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001362static void ufshcd_ungate_work(struct work_struct *work)
1363{
1364 int ret;
1365 unsigned long flags;
1366 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1367 clk_gating.ungate_work);
1368
1369 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1370
1371 spin_lock_irqsave(hba->host->host_lock, flags);
1372 if (hba->clk_gating.state == CLKS_ON) {
1373 spin_unlock_irqrestore(hba->host->host_lock, flags);
1374 goto unblock_reqs;
1375 }
1376
1377 spin_unlock_irqrestore(hba->host->host_lock, flags);
1378 ufshcd_setup_clocks(hba, true);
1379
1380 /* Exit from hibern8 */
1381 if (ufshcd_can_hibern8_during_gating(hba)) {
1382 /* Prevent gating in this path */
1383 hba->clk_gating.is_suspended = true;
1384 if (ufshcd_is_link_hibern8(hba)) {
1385 ret = ufshcd_uic_hibern8_exit(hba);
1386 if (ret)
1387 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1388 __func__, ret);
1389 else
1390 ufshcd_set_link_active(hba);
1391 }
1392 hba->clk_gating.is_suspended = false;
1393 }
1394unblock_reqs:
1395 scsi_unblock_requests(hba->host);
1396}
1397
1398/**
1399 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1400 * Also, exit from hibern8 mode and set the link as active.
1401 * @hba: per adapter instance
1402 * @async: This indicates whether caller should ungate clocks asynchronously.
1403 */
1404int ufshcd_hold(struct ufs_hba *hba, bool async)
1405{
1406 int rc = 0;
1407 unsigned long flags;
1408
1409 if (!ufshcd_is_clkgating_allowed(hba))
1410 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001411 spin_lock_irqsave(hba->host->host_lock, flags);
1412 hba->clk_gating.active_reqs++;
1413
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001414 if (ufshcd_eh_in_progress(hba)) {
1415 spin_unlock_irqrestore(hba->host->host_lock, flags);
1416 return 0;
1417 }
1418
Sahitya Tummala856b3482014-09-25 15:32:34 +03001419start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001420 switch (hba->clk_gating.state) {
1421 case CLKS_ON:
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001422 /*
1423 * Wait for the ungate work to complete if in progress.
1424 * Though the clocks may be in ON state, the link could
1425 * still be in hibner8 state if hibern8 is allowed
1426 * during clock gating.
1427 * Make sure we exit hibern8 state also in addition to
1428 * clocks being ON.
1429 */
1430 if (ufshcd_can_hibern8_during_gating(hba) &&
1431 ufshcd_is_link_hibern8(hba)) {
1432 spin_unlock_irqrestore(hba->host->host_lock, flags);
1433 flush_work(&hba->clk_gating.ungate_work);
1434 spin_lock_irqsave(hba->host->host_lock, flags);
1435 goto start;
1436 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001437 break;
1438 case REQ_CLKS_OFF:
1439 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1440 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001441 trace_ufshcd_clk_gating(dev_name(hba->dev),
1442 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001443 break;
1444 }
1445 /*
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +03001446 * If we are here, it means gating work is either done or
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001447 * currently running. Hence, fall through to cancel gating
1448 * work and to enable clocks.
1449 */
1450 case CLKS_OFF:
1451 scsi_block_requests(hba->host);
1452 hba->clk_gating.state = REQ_CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001453 trace_ufshcd_clk_gating(dev_name(hba->dev),
1454 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001455 schedule_work(&hba->clk_gating.ungate_work);
1456 /*
1457 * fall through to check if we should wait for this
1458 * work to be done or not.
1459 */
1460 case REQ_CLKS_ON:
1461 if (async) {
1462 rc = -EAGAIN;
1463 hba->clk_gating.active_reqs--;
1464 break;
1465 }
1466
1467 spin_unlock_irqrestore(hba->host->host_lock, flags);
1468 flush_work(&hba->clk_gating.ungate_work);
1469 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001470 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001471 goto start;
1472 default:
1473 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1474 __func__, hba->clk_gating.state);
1475 break;
1476 }
1477 spin_unlock_irqrestore(hba->host->host_lock, flags);
1478out:
1479 return rc;
1480}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001481EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001482
1483static void ufshcd_gate_work(struct work_struct *work)
1484{
1485 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1486 clk_gating.gate_work.work);
1487 unsigned long flags;
1488
1489 spin_lock_irqsave(hba->host->host_lock, flags);
Venkat Gopalakrishnan3f0c06d2016-10-17 17:11:07 -07001490 /*
1491 * In case you are here to cancel this work the gating state
1492 * would be marked as REQ_CLKS_ON. In this case save time by
1493 * skipping the gating work and exit after changing the clock
1494 * state to CLKS_ON.
1495 */
1496 if (hba->clk_gating.is_suspended ||
1497 (hba->clk_gating.state == REQ_CLKS_ON)) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001498 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001499 trace_ufshcd_clk_gating(dev_name(hba->dev),
1500 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001501 goto rel_lock;
1502 }
1503
1504 if (hba->clk_gating.active_reqs
1505 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1506 || hba->lrb_in_use || hba->outstanding_tasks
1507 || hba->active_uic_cmd || hba->uic_async_done)
1508 goto rel_lock;
1509
1510 spin_unlock_irqrestore(hba->host->host_lock, flags);
1511
1512 /* put the link into hibern8 mode before turning off clocks */
1513 if (ufshcd_can_hibern8_during_gating(hba)) {
1514 if (ufshcd_uic_hibern8_enter(hba)) {
1515 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001516 trace_ufshcd_clk_gating(dev_name(hba->dev),
1517 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001518 goto out;
1519 }
1520 ufshcd_set_link_hibern8(hba);
1521 }
1522
1523 if (!ufshcd_is_link_active(hba))
1524 ufshcd_setup_clocks(hba, false);
1525 else
1526 /* If link is active, device ref_clk can't be switched off */
1527 __ufshcd_setup_clocks(hba, false, true);
1528
1529 /*
1530 * In case you are here to cancel this work the gating state
1531 * would be marked as REQ_CLKS_ON. In this case keep the state
1532 * as REQ_CLKS_ON which would anyway imply that clocks are off
1533 * and a request to turn them on is pending. By doing this way,
1534 * we keep the state machine in tact and this would ultimately
1535 * prevent from doing cancel work multiple times when there are
1536 * new requests arriving before the current cancel work is done.
1537 */
1538 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001539 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001540 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001541 trace_ufshcd_clk_gating(dev_name(hba->dev),
1542 hba->clk_gating.state);
1543 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001544rel_lock:
1545 spin_unlock_irqrestore(hba->host->host_lock, flags);
1546out:
1547 return;
1548}
1549
1550/* host lock must be held before calling this variant */
1551static void __ufshcd_release(struct ufs_hba *hba)
1552{
1553 if (!ufshcd_is_clkgating_allowed(hba))
1554 return;
1555
1556 hba->clk_gating.active_reqs--;
1557
1558 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1559 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1560 || hba->lrb_in_use || hba->outstanding_tasks
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001561 || hba->active_uic_cmd || hba->uic_async_done
1562 || ufshcd_eh_in_progress(hba))
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001563 return;
1564
1565 hba->clk_gating.state = REQ_CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001566 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001567 schedule_delayed_work(&hba->clk_gating.gate_work,
1568 msecs_to_jiffies(hba->clk_gating.delay_ms));
1569}
1570
1571void ufshcd_release(struct ufs_hba *hba)
1572{
1573 unsigned long flags;
1574
1575 spin_lock_irqsave(hba->host->host_lock, flags);
1576 __ufshcd_release(hba);
1577 spin_unlock_irqrestore(hba->host->host_lock, flags);
1578}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001579EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001580
1581static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1582 struct device_attribute *attr, char *buf)
1583{
1584 struct ufs_hba *hba = dev_get_drvdata(dev);
1585
1586 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1587}
1588
1589static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1590 struct device_attribute *attr, const char *buf, size_t count)
1591{
1592 struct ufs_hba *hba = dev_get_drvdata(dev);
1593 unsigned long flags, value;
1594
1595 if (kstrtoul(buf, 0, &value))
1596 return -EINVAL;
1597
1598 spin_lock_irqsave(hba->host->host_lock, flags);
1599 hba->clk_gating.delay_ms = value;
1600 spin_unlock_irqrestore(hba->host->host_lock, flags);
1601 return count;
1602}
1603
Sahitya Tummalab4274112016-12-22 18:40:39 -08001604static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1605 struct device_attribute *attr, char *buf)
1606{
1607 struct ufs_hba *hba = dev_get_drvdata(dev);
1608
1609 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1610}
1611
1612static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1613 struct device_attribute *attr, const char *buf, size_t count)
1614{
1615 struct ufs_hba *hba = dev_get_drvdata(dev);
1616 unsigned long flags;
1617 u32 value;
1618
1619 if (kstrtou32(buf, 0, &value))
1620 return -EINVAL;
1621
1622 value = !!value;
1623 if (value == hba->clk_gating.is_enabled)
1624 goto out;
1625
1626 if (value) {
1627 ufshcd_release(hba);
1628 } else {
1629 spin_lock_irqsave(hba->host->host_lock, flags);
1630 hba->clk_gating.active_reqs++;
1631 spin_unlock_irqrestore(hba->host->host_lock, flags);
1632 }
1633
1634 hba->clk_gating.is_enabled = value;
1635out:
1636 return count;
1637}
1638
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001639static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1640{
1641 if (!ufshcd_is_clkgating_allowed(hba))
1642 return;
1643
1644 hba->clk_gating.delay_ms = 150;
1645 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1646 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1647
Sahitya Tummalab4274112016-12-22 18:40:39 -08001648 hba->clk_gating.is_enabled = true;
1649
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001650 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1651 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1652 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1653 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
Sahitya Tummalab4274112016-12-22 18:40:39 -08001654 hba->clk_gating.delay_attr.attr.mode = 0644;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001655 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1656 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Sahitya Tummalab4274112016-12-22 18:40:39 -08001657
1658 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1659 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1660 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1661 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1662 hba->clk_gating.enable_attr.attr.mode = 0644;
1663 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1664 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001665}
1666
1667static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1668{
1669 if (!ufshcd_is_clkgating_allowed(hba))
1670 return;
1671 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001672 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001673 cancel_work_sync(&hba->clk_gating.ungate_work);
1674 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001675}
1676
Sahitya Tummala856b3482014-09-25 15:32:34 +03001677/* Must be called with host lock acquired */
1678static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1679{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001680 bool queue_resume_work = false;
1681
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001682 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001683 return;
1684
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001685 if (!hba->clk_scaling.active_reqs++)
1686 queue_resume_work = true;
1687
1688 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1689 return;
1690
1691 if (queue_resume_work)
1692 queue_work(hba->clk_scaling.workq,
1693 &hba->clk_scaling.resume_work);
1694
1695 if (!hba->clk_scaling.window_start_t) {
1696 hba->clk_scaling.window_start_t = jiffies;
1697 hba->clk_scaling.tot_busy_t = 0;
1698 hba->clk_scaling.is_busy_started = false;
1699 }
1700
Sahitya Tummala856b3482014-09-25 15:32:34 +03001701 if (!hba->clk_scaling.is_busy_started) {
1702 hba->clk_scaling.busy_start_t = ktime_get();
1703 hba->clk_scaling.is_busy_started = true;
1704 }
1705}
1706
1707static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1708{
1709 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1710
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001711 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001712 return;
1713
1714 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1715 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1716 scaling->busy_start_t));
Thomas Gleixner8b0e1952016-12-25 12:30:41 +01001717 scaling->busy_start_t = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03001718 scaling->is_busy_started = false;
1719 }
1720}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301721/**
1722 * ufshcd_send_command - Send SCSI or device management commands
1723 * @hba: per adapter instance
1724 * @task_tag: Task tag of the command
1725 */
1726static inline
1727void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1728{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08001729 hba->lrb[task_tag].issue_time_stamp = ktime_get();
Zang Leigang09017182017-09-27 10:06:06 +08001730 hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
Sahitya Tummala856b3482014-09-25 15:32:34 +03001731 ufshcd_clk_scaling_start_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301732 __set_bit(task_tag, &hba->outstanding_reqs);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301733 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07001734 /* Make sure that doorbell is committed immediately */
1735 wmb();
Lee Susman1a07f2d2016-12-22 18:42:03 -08001736 ufshcd_add_command_trace(hba, task_tag, "send");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301737}
1738
1739/**
1740 * ufshcd_copy_sense_data - Copy sense data in case of check condition
1741 * @lrb - pointer to local reference block
1742 */
1743static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1744{
1745 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05301746 if (lrbp->sense_buffer &&
1747 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001748 int len_to_copy;
1749
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301750 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001751 len_to_copy = min_t(int, RESPONSE_UPIU_SENSE_DATA_LENGTH, len);
1752
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301753 memcpy(lrbp->sense_buffer,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301754 lrbp->ucd_rsp_ptr->sr.sense_data,
Gilad Bronerdcea0bf2016-10-17 17:09:48 -07001755 min_t(int, len_to_copy, UFSHCD_REQ_SENSE_SIZE));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301756 }
1757}
1758
1759/**
Dolev Raviv68078d52013-07-30 00:35:58 +05301760 * ufshcd_copy_query_response() - Copy the Query Response and the data
1761 * descriptor
1762 * @hba: per adapter instance
1763 * @lrb - pointer to local reference block
1764 */
1765static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001766int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05301767{
1768 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1769
Dolev Raviv68078d52013-07-30 00:35:58 +05301770 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05301771
Dolev Raviv68078d52013-07-30 00:35:58 +05301772 /* Get the descriptor */
1773 if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03001774 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05301775 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001776 u16 resp_len;
1777 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05301778
1779 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001780 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05301781 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03001782 buf_len = be16_to_cpu(
1783 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001784 if (likely(buf_len >= resp_len)) {
1785 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1786 } else {
1787 dev_warn(hba->dev,
1788 "%s: Response size is bigger than buffer",
1789 __func__);
1790 return -EINVAL;
1791 }
Dolev Raviv68078d52013-07-30 00:35:58 +05301792 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001793
1794 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05301795}
1796
1797/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301798 * ufshcd_hba_capabilities - Read controller capabilities
1799 * @hba: per adapter instance
1800 */
1801static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1802{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301803 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301804
1805 /* nutrs and nutmrs are 0 based values */
1806 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1807 hba->nutmrs =
1808 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1809}
1810
1811/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301812 * ufshcd_ready_for_uic_cmd - Check if controller is ready
1813 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301814 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301815 * Return true on success, else false
1816 */
1817static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1818{
1819 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1820 return true;
1821 else
1822 return false;
1823}
1824
1825/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05301826 * ufshcd_get_upmcrs - Get the power mode change request status
1827 * @hba: Pointer to adapter instance
1828 *
1829 * This function gets the UPMCRS field of HCS register
1830 * Returns value of UPMCRS field
1831 */
1832static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1833{
1834 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1835}
1836
1837/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301838 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1839 * @hba: per adapter instance
1840 * @uic_cmd: UIC command
1841 *
1842 * Mutex must be held.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301843 */
1844static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301845ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301846{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301847 WARN_ON(hba->active_uic_cmd);
1848
1849 hba->active_uic_cmd = uic_cmd;
1850
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301851 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301852 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
1853 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
1854 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301855
1856 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301857 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301858 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301859}
1860
1861/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301862 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
1863 * @hba: per adapter instance
1864 * @uic_command: UIC command
1865 *
1866 * Must be called with mutex held.
1867 * Returns 0 only if success.
1868 */
1869static int
1870ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
1871{
1872 int ret;
1873 unsigned long flags;
1874
1875 if (wait_for_completion_timeout(&uic_cmd->done,
1876 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
1877 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
1878 else
1879 ret = -ETIMEDOUT;
1880
1881 spin_lock_irqsave(hba->host->host_lock, flags);
1882 hba->active_uic_cmd = NULL;
1883 spin_unlock_irqrestore(hba->host->host_lock, flags);
1884
1885 return ret;
1886}
1887
1888/**
1889 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
1890 * @hba: per adapter instance
1891 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02001892 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301893 *
1894 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
Subhash Jadavani57d104c2014-09-25 15:32:30 +03001895 * with mutex held and host_lock locked.
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301896 * Returns 0 only if success.
1897 */
1898static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02001899__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
1900 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301901{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301902 if (!ufshcd_ready_for_uic_cmd(hba)) {
1903 dev_err(hba->dev,
1904 "Controller not ready to accept UIC commands\n");
1905 return -EIO;
1906 }
1907
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02001908 if (completion)
1909 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301910
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301911 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301912
Subhash Jadavani57d104c2014-09-25 15:32:30 +03001913 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301914}
1915
1916/**
1917 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
1918 * @hba: per adapter instance
1919 * @uic_cmd: UIC command
1920 *
1921 * Returns 0 only if success.
1922 */
1923static int
1924ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
1925{
1926 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03001927 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301928
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001929 ufshcd_hold(hba, false);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301930 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03001931 ufshcd_add_delay_before_dme_cmd(hba);
1932
Subhash Jadavani57d104c2014-09-25 15:32:30 +03001933 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02001934 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03001935 spin_unlock_irqrestore(hba->host->host_lock, flags);
1936 if (!ret)
1937 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
1938
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301939 mutex_unlock(&hba->uic_cmd_mutex);
1940
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001941 ufshcd_release(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301942 return ret;
1943}
1944
1945/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301946 * ufshcd_map_sg - Map scatter-gather list to prdt
1947 * @lrbp - pointer to local reference block
1948 *
1949 * Returns 0 in case of success, non-zero value in case of failure
1950 */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09001951static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301952{
1953 struct ufshcd_sg_entry *prd_table;
1954 struct scatterlist *sg;
1955 struct scsi_cmnd *cmd;
1956 int sg_segments;
1957 int i;
1958
1959 cmd = lrbp->cmd;
1960 sg_segments = scsi_dma_map(cmd);
1961 if (sg_segments < 0)
1962 return sg_segments;
1963
1964 if (sg_segments) {
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09001965 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
1966 lrbp->utr_descriptor_ptr->prd_table_length =
1967 cpu_to_le16((u16)(sg_segments *
1968 sizeof(struct ufshcd_sg_entry)));
1969 else
1970 lrbp->utr_descriptor_ptr->prd_table_length =
1971 cpu_to_le16((u16) (sg_segments));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301972
1973 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
1974
1975 scsi_for_each_sg(cmd, sg, sg_segments, i) {
1976 prd_table[i].size =
1977 cpu_to_le32(((u32) sg_dma_len(sg))-1);
1978 prd_table[i].base_addr =
1979 cpu_to_le32(lower_32_bits(sg->dma_address));
1980 prd_table[i].upper_addr =
1981 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02001982 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301983 }
1984 } else {
1985 lrbp->utr_descriptor_ptr->prd_table_length = 0;
1986 }
1987
1988 return 0;
1989}
1990
1991/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05301992 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301993 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05301994 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301995 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05301996static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301997{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05301998 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
1999
2000 if (hba->ufs_version == UFSHCI_VERSION_10) {
2001 u32 rw;
2002 rw = set & INTERRUPT_MASK_RW_VER_10;
2003 set = rw | ((set ^ intrs) & intrs);
2004 } else {
2005 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302006 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302007
2008 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2009}
2010
2011/**
2012 * ufshcd_disable_intr - disable interrupts
2013 * @hba: per adapter instance
2014 * @intrs: interrupt bits
2015 */
2016static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2017{
2018 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2019
2020 if (hba->ufs_version == UFSHCI_VERSION_10) {
2021 u32 rw;
2022 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2023 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2024 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2025
2026 } else {
2027 set &= ~intrs;
2028 }
2029
2030 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302031}
2032
2033/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302034 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2035 * descriptor according to request
2036 * @lrbp: pointer to local reference block
2037 * @upiu_flags: flags required in the header
2038 * @cmd_dir: requests data direction
2039 */
2040static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
Joao Pinto300bb132016-05-11 12:21:27 +01002041 u32 *upiu_flags, enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302042{
2043 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2044 u32 data_direction;
2045 u32 dword_0;
2046
2047 if (cmd_dir == DMA_FROM_DEVICE) {
2048 data_direction = UTP_DEVICE_TO_HOST;
2049 *upiu_flags = UPIU_CMD_FLAGS_READ;
2050 } else if (cmd_dir == DMA_TO_DEVICE) {
2051 data_direction = UTP_HOST_TO_DEVICE;
2052 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2053 } else {
2054 data_direction = UTP_NO_DATA_TRANSFER;
2055 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2056 }
2057
2058 dword_0 = data_direction | (lrbp->command_type
2059 << UPIU_COMMAND_TYPE_OFFSET);
2060 if (lrbp->intr_cmd)
2061 dword_0 |= UTP_REQ_DESC_INT_CMD;
2062
2063 /* Transfer request descriptor header fields */
2064 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002065 /* dword_1 is reserved, hence it is set to 0 */
2066 req_desc->header.dword_1 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302067 /*
2068 * assigning invalid value for command status. Controller
2069 * updates OCS on command completion, with the command
2070 * status
2071 */
2072 req_desc->header.dword_2 =
2073 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002074 /* dword_3 is reserved, hence it is set to 0 */
2075 req_desc->header.dword_3 = 0;
Yaniv Gardi51047262016-02-01 15:02:38 +02002076
2077 req_desc->prd_table_length = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302078}
2079
2080/**
2081 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2082 * for scsi commands
2083 * @lrbp - local reference block pointer
2084 * @upiu_flags - flags
2085 */
2086static
2087void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2088{
2089 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002090 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302091
2092 /* command descriptor fields */
2093 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2094 UPIU_TRANSACTION_COMMAND, upiu_flags,
2095 lrbp->lun, lrbp->task_tag);
2096 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2097 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2098
2099 /* Total EHS length and Data segment length will be zero */
2100 ucd_req_ptr->header.dword_2 = 0;
2101
2102 ucd_req_ptr->sc.exp_data_transfer_len =
2103 cpu_to_be32(lrbp->cmd->sdb.length);
2104
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002105 cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, MAX_CDB_SIZE);
2106 memset(ucd_req_ptr->sc.cdb, 0, MAX_CDB_SIZE);
2107 memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
2108
2109 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302110}
2111
Dolev Raviv68078d52013-07-30 00:35:58 +05302112/**
2113 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2114 * for query requsts
2115 * @hba: UFS hba
2116 * @lrbp: local reference block pointer
2117 * @upiu_flags: flags
2118 */
2119static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2120 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2121{
2122 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2123 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302124 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302125 u8 *descp = (u8 *)lrbp->ucd_req_ptr + GENERAL_UPIU_REQUEST_SIZE;
2126
2127 /* Query request header */
2128 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2129 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2130 lrbp->lun, lrbp->task_tag);
2131 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2132 0, query->request.query_func, 0, 0);
2133
Zang Leigang68612852016-08-25 17:39:19 +08002134 /* Data segment length only need for WRITE_DESC */
2135 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2136 ucd_req_ptr->header.dword_2 =
2137 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2138 else
2139 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302140
2141 /* Copy the Query Request buffer as is */
2142 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2143 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302144
2145 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002146 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2147 memcpy(descp, query->descriptor, len);
2148
Yaniv Gardi51047262016-02-01 15:02:38 +02002149 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302150}
2151
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302152static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2153{
2154 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2155
2156 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2157
2158 /* command descriptor fields */
2159 ucd_req_ptr->header.dword_0 =
2160 UPIU_HEADER_DWORD(
2161 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002162 /* clear rest of the fields of basic header */
2163 ucd_req_ptr->header.dword_1 = 0;
2164 ucd_req_ptr->header.dword_2 = 0;
2165
2166 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302167}
2168
2169/**
Joao Pinto300bb132016-05-11 12:21:27 +01002170 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2171 * for Device Management Purposes
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302172 * @hba - per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302173 * @lrb - pointer to local reference block
2174 */
Joao Pinto300bb132016-05-11 12:21:27 +01002175static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302176{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302177 u32 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302178 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302179
kehuanlin83dc7e32017-09-06 17:58:39 +08002180 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2181 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002182 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
kehuanlin83dc7e32017-09-06 17:58:39 +08002183 else
2184 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002185
2186 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2187 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2188 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2189 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2190 ufshcd_prepare_utp_nop_upiu(lrbp);
2191 else
2192 ret = -EINVAL;
2193
2194 return ret;
2195}
2196
2197/**
2198 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2199 * for SCSI Purposes
2200 * @hba - per adapter instance
2201 * @lrb - pointer to local reference block
2202 */
2203static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2204{
2205 u32 upiu_flags;
2206 int ret = 0;
2207
kehuanlin83dc7e32017-09-06 17:58:39 +08002208 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2209 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002210 lrbp->command_type = UTP_CMD_TYPE_SCSI;
kehuanlin83dc7e32017-09-06 17:58:39 +08002211 else
2212 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002213
2214 if (likely(lrbp->cmd)) {
2215 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2216 lrbp->cmd->sc_data_direction);
2217 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2218 } else {
2219 ret = -EINVAL;
2220 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302221
2222 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302223}
2224
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002225/*
2226 * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
2227 * @scsi_lun: scsi LUN id
2228 *
2229 * Returns UPIU LUN id
2230 */
2231static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
2232{
2233 if (scsi_is_wlun(scsi_lun))
2234 return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
2235 | UFS_UPIU_WLUN_ID;
2236 else
2237 return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
2238}
2239
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302240/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002241 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2242 * @scsi_lun: UPIU W-LUN id
2243 *
2244 * Returns SCSI W-LUN id
2245 */
2246static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2247{
2248 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2249}
2250
2251/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302252 * ufshcd_queuecommand - main entry point for SCSI requests
2253 * @cmd: command from SCSI Midlayer
2254 * @done: call back function
2255 *
2256 * Returns 0 for success, non-zero in case of failure
2257 */
2258static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2259{
2260 struct ufshcd_lrb *lrbp;
2261 struct ufs_hba *hba;
2262 unsigned long flags;
2263 int tag;
2264 int err = 0;
2265
2266 hba = shost_priv(host);
2267
2268 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02002269 if (!ufshcd_valid_tag(hba, tag)) {
2270 dev_err(hba->dev,
2271 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2272 __func__, tag, cmd, cmd->request);
2273 BUG();
2274 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302275
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002276 if (!down_read_trylock(&hba->clk_scaling_lock))
2277 return SCSI_MLQUEUE_HOST_BUSY;
2278
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302279 spin_lock_irqsave(hba->host->host_lock, flags);
2280 switch (hba->ufshcd_state) {
2281 case UFSHCD_STATE_OPERATIONAL:
2282 break;
Zang Leigang141f8162016-11-16 11:29:37 +08002283 case UFSHCD_STATE_EH_SCHEDULED:
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302284 case UFSHCD_STATE_RESET:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302285 err = SCSI_MLQUEUE_HOST_BUSY;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302286 goto out_unlock;
2287 case UFSHCD_STATE_ERROR:
2288 set_host_byte(cmd, DID_ERROR);
2289 cmd->scsi_done(cmd);
2290 goto out_unlock;
2291 default:
2292 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2293 __func__, hba->ufshcd_state);
2294 set_host_byte(cmd, DID_BAD_TARGET);
2295 cmd->scsi_done(cmd);
2296 goto out_unlock;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302297 }
Yaniv Gardi53c12d02016-02-01 15:02:45 +02002298
2299 /* if error handling is in progress, don't issue commands */
2300 if (ufshcd_eh_in_progress(hba)) {
2301 set_host_byte(cmd, DID_ERROR);
2302 cmd->scsi_done(cmd);
2303 goto out_unlock;
2304 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302305 spin_unlock_irqrestore(hba->host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302306
Gilad Broner7fabb772017-02-03 16:56:50 -08002307 hba->req_abort_count = 0;
2308
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302309 /* acquire the tag to make sure device cmds don't use it */
2310 if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
2311 /*
2312 * Dev manage command in progress, requeue the command.
2313 * Requeuing the command helps in cases where the request *may*
2314 * find different tag instead of waiting for dev manage command
2315 * completion.
2316 */
2317 err = SCSI_MLQUEUE_HOST_BUSY;
2318 goto out;
2319 }
2320
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002321 err = ufshcd_hold(hba, true);
2322 if (err) {
2323 err = SCSI_MLQUEUE_HOST_BUSY;
2324 clear_bit_unlock(tag, &hba->lrb_in_use);
2325 goto out;
2326 }
2327 WARN_ON(hba->clk_gating.state != CLKS_ON);
2328
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302329 lrbp = &hba->lrb[tag];
2330
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302331 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302332 lrbp->cmd = cmd;
Gilad Bronerdcea0bf2016-10-17 17:09:48 -07002333 lrbp->sense_bufflen = UFSHCD_REQ_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302334 lrbp->sense_buffer = cmd->sense_buffer;
2335 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002336 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002337 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Gilad Bronere0b299e2017-02-03 16:56:40 -08002338 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302339
Joao Pinto300bb132016-05-11 12:21:27 +01002340 ufshcd_comp_scsi_upiu(hba, lrbp);
2341
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002342 err = ufshcd_map_sg(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302343 if (err) {
2344 lrbp->cmd = NULL;
2345 clear_bit_unlock(tag, &hba->lrb_in_use);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302346 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302347 }
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002348 /* Make sure descriptors are ready before ringing the doorbell */
2349 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302350
2351 /* issue command to the controller */
2352 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002353 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302354 ufshcd_send_command(hba, tag);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302355out_unlock:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302356 spin_unlock_irqrestore(hba->host->host_lock, flags);
2357out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002358 up_read(&hba->clk_scaling_lock);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302359 return err;
2360}
2361
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302362static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2363 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2364{
2365 lrbp->cmd = NULL;
2366 lrbp->sense_bufflen = 0;
2367 lrbp->sense_buffer = NULL;
2368 lrbp->task_tag = tag;
2369 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302370 lrbp->intr_cmd = true; /* No interrupt aggregation */
2371 hba->dev_cmd.type = cmd_type;
2372
Joao Pinto300bb132016-05-11 12:21:27 +01002373 return ufshcd_comp_devman_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302374}
2375
2376static int
2377ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2378{
2379 int err = 0;
2380 unsigned long flags;
2381 u32 mask = 1 << tag;
2382
2383 /* clear outstanding transaction before retry */
2384 spin_lock_irqsave(hba->host->host_lock, flags);
2385 ufshcd_utrl_clear(hba, tag);
2386 spin_unlock_irqrestore(hba->host->host_lock, flags);
2387
2388 /*
2389 * wait for for h/w to clear corresponding bit in door-bell.
2390 * max. wait is 1 sec.
2391 */
2392 err = ufshcd_wait_for_register(hba,
2393 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02002394 mask, ~mask, 1000, 1000, true);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302395
2396 return err;
2397}
2398
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002399static int
2400ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2401{
2402 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2403
2404 /* Get the UPIU response */
2405 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2406 UPIU_RSP_CODE_OFFSET;
2407 return query_res->response;
2408}
2409
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302410/**
2411 * ufshcd_dev_cmd_completion() - handles device management command responses
2412 * @hba: per adapter instance
2413 * @lrbp: pointer to local reference block
2414 */
2415static int
2416ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2417{
2418 int resp;
2419 int err = 0;
2420
Dolev Ravivff8e20c2016-12-22 18:42:18 -08002421 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302422 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2423
2424 switch (resp) {
2425 case UPIU_TRANSACTION_NOP_IN:
2426 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2427 err = -EINVAL;
2428 dev_err(hba->dev, "%s: unexpected response %x\n",
2429 __func__, resp);
2430 }
2431 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302432 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002433 err = ufshcd_check_query_response(hba, lrbp);
2434 if (!err)
2435 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302436 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302437 case UPIU_TRANSACTION_REJECT_UPIU:
2438 /* TODO: handle Reject UPIU Response */
2439 err = -EPERM;
2440 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2441 __func__);
2442 break;
2443 default:
2444 err = -EINVAL;
2445 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2446 __func__, resp);
2447 break;
2448 }
2449
2450 return err;
2451}
2452
2453static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2454 struct ufshcd_lrb *lrbp, int max_timeout)
2455{
2456 int err = 0;
2457 unsigned long time_left;
2458 unsigned long flags;
2459
2460 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2461 msecs_to_jiffies(max_timeout));
2462
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002463 /* Make sure descriptors are ready before ringing the doorbell */
2464 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302465 spin_lock_irqsave(hba->host->host_lock, flags);
2466 hba->dev_cmd.complete = NULL;
2467 if (likely(time_left)) {
2468 err = ufshcd_get_tr_ocs(lrbp);
2469 if (!err)
2470 err = ufshcd_dev_cmd_completion(hba, lrbp);
2471 }
2472 spin_unlock_irqrestore(hba->host->host_lock, flags);
2473
2474 if (!time_left) {
2475 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002476 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2477 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302478 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002479 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302480 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002481 /*
2482 * in case of an error, after clearing the doorbell,
2483 * we also need to clear the outstanding_request
2484 * field in hba
2485 */
2486 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302487 }
2488
2489 return err;
2490}
2491
2492/**
2493 * ufshcd_get_dev_cmd_tag - Get device management command tag
2494 * @hba: per-adapter instance
2495 * @tag: pointer to variable with available slot value
2496 *
2497 * Get a free slot and lock it until device management command
2498 * completes.
2499 *
2500 * Returns false if free slot is unavailable for locking, else
2501 * return true with tag value in @tag.
2502 */
2503static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
2504{
2505 int tag;
2506 bool ret = false;
2507 unsigned long tmp;
2508
2509 if (!tag_out)
2510 goto out;
2511
2512 do {
2513 tmp = ~hba->lrb_in_use;
2514 tag = find_last_bit(&tmp, hba->nutrs);
2515 if (tag >= hba->nutrs)
2516 goto out;
2517 } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
2518
2519 *tag_out = tag;
2520 ret = true;
2521out:
2522 return ret;
2523}
2524
2525static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
2526{
2527 clear_bit_unlock(tag, &hba->lrb_in_use);
2528}
2529
2530/**
2531 * ufshcd_exec_dev_cmd - API for sending device management requests
2532 * @hba - UFS hba
2533 * @cmd_type - specifies the type (NOP, Query...)
2534 * @timeout - time in seconds
2535 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302536 * NOTE: Since there is only one available tag for device management commands,
2537 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302538 */
2539static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2540 enum dev_cmd_type cmd_type, int timeout)
2541{
2542 struct ufshcd_lrb *lrbp;
2543 int err;
2544 int tag;
2545 struct completion wait;
2546 unsigned long flags;
2547
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002548 down_read(&hba->clk_scaling_lock);
2549
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302550 /*
2551 * Get free slot, sleep if slots are unavailable.
2552 * Even though we use wait_event() which sleeps indefinitely,
2553 * the maximum wait time is bounded by SCSI request timeout.
2554 */
2555 wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
2556
2557 init_completion(&wait);
2558 lrbp = &hba->lrb[tag];
2559 WARN_ON(lrbp->cmd);
2560 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2561 if (unlikely(err))
2562 goto out_put_tag;
2563
2564 hba->dev_cmd.complete = &wait;
2565
Yaniv Gardie3dfdc52016-02-01 15:02:49 +02002566 /* Make sure descriptors are ready before ringing the doorbell */
2567 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302568 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002569 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302570 ufshcd_send_command(hba, tag);
2571 spin_unlock_irqrestore(hba->host->host_lock, flags);
2572
2573 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2574
2575out_put_tag:
2576 ufshcd_put_dev_cmd_tag(hba, tag);
2577 wake_up(&hba->dev_cmd.tag_wq);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002578 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302579 return err;
2580}
2581
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302582/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002583 * ufshcd_init_query() - init the query response and request parameters
2584 * @hba: per-adapter instance
2585 * @request: address of the request pointer to be initialized
2586 * @response: address of the response pointer to be initialized
2587 * @opcode: operation to perform
2588 * @idn: flag idn to access
2589 * @index: LU number to access
2590 * @selector: query/flag/descriptor further identification
2591 */
2592static inline void ufshcd_init_query(struct ufs_hba *hba,
2593 struct ufs_query_req **request, struct ufs_query_res **response,
2594 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2595{
2596 *request = &hba->dev_cmd.query.request;
2597 *response = &hba->dev_cmd.query.response;
2598 memset(*request, 0, sizeof(struct ufs_query_req));
2599 memset(*response, 0, sizeof(struct ufs_query_res));
2600 (*request)->upiu_req.opcode = opcode;
2601 (*request)->upiu_req.idn = idn;
2602 (*request)->upiu_req.index = index;
2603 (*request)->upiu_req.selector = selector;
2604}
2605
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002606static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2607 enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2608{
2609 int ret;
2610 int retries;
2611
2612 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2613 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2614 if (ret)
2615 dev_dbg(hba->dev,
2616 "%s: failed with error %d, retries %d\n",
2617 __func__, ret, retries);
2618 else
2619 break;
2620 }
2621
2622 if (ret)
2623 dev_err(hba->dev,
2624 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2625 __func__, opcode, idn, ret, retries);
2626 return ret;
2627}
2628
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002629/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302630 * ufshcd_query_flag() - API function for sending flag query requests
2631 * hba: per-adapter instance
2632 * query_opcode: flag query to perform
2633 * idn: flag idn to access
2634 * flag_res: the flag value after the query request completes
2635 *
2636 * Returns 0 for success, non-zero in case of failure
2637 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002638int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Dolev Raviv68078d52013-07-30 00:35:58 +05302639 enum flag_idn idn, bool *flag_res)
2640{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002641 struct ufs_query_req *request = NULL;
2642 struct ufs_query_res *response = NULL;
2643 int err, index = 0, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002644 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05302645
2646 BUG_ON(!hba);
2647
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002648 ufshcd_hold(hba, false);
Dolev Raviv68078d52013-07-30 00:35:58 +05302649 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002650 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2651 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05302652
2653 switch (opcode) {
2654 case UPIU_QUERY_OPCODE_SET_FLAG:
2655 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2656 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2657 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2658 break;
2659 case UPIU_QUERY_OPCODE_READ_FLAG:
2660 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2661 if (!flag_res) {
2662 /* No dummy reads */
2663 dev_err(hba->dev, "%s: Invalid argument for read request\n",
2664 __func__);
2665 err = -EINVAL;
2666 goto out_unlock;
2667 }
2668 break;
2669 default:
2670 dev_err(hba->dev,
2671 "%s: Expected query flag opcode but got = %d\n",
2672 __func__, opcode);
2673 err = -EINVAL;
2674 goto out_unlock;
2675 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302676
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002677 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05302678
2679 if (err) {
2680 dev_err(hba->dev,
2681 "%s: Sending flag query for idn %d failed, err = %d\n",
2682 __func__, idn, err);
2683 goto out_unlock;
2684 }
2685
2686 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302687 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302688 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2689
2690out_unlock:
2691 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002692 ufshcd_release(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05302693 return err;
2694}
2695
2696/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302697 * ufshcd_query_attr - API function for sending attribute requests
2698 * hba: per-adapter instance
2699 * opcode: attribute opcode
2700 * idn: attribute idn to access
2701 * index: index field
2702 * selector: selector field
2703 * attr_val: the attribute value after the query request completes
2704 *
2705 * Returns 0 for success, non-zero in case of failure
2706*/
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05302707static int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302708 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
2709{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002710 struct ufs_query_req *request = NULL;
2711 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302712 int err;
2713
2714 BUG_ON(!hba);
2715
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002716 ufshcd_hold(hba, false);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302717 if (!attr_val) {
2718 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2719 __func__, opcode);
2720 err = -EINVAL;
2721 goto out;
2722 }
2723
2724 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002725 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2726 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302727
2728 switch (opcode) {
2729 case UPIU_QUERY_OPCODE_WRITE_ATTR:
2730 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302731 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302732 break;
2733 case UPIU_QUERY_OPCODE_READ_ATTR:
2734 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2735 break;
2736 default:
2737 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2738 __func__, opcode);
2739 err = -EINVAL;
2740 goto out_unlock;
2741 }
2742
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002743 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302744
2745 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002746 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2747 __func__, opcode, idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302748 goto out_unlock;
2749 }
2750
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302751 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302752
2753out_unlock:
2754 mutex_unlock(&hba->dev_cmd.lock);
2755out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002756 ufshcd_release(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302757 return err;
2758}
2759
2760/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02002761 * ufshcd_query_attr_retry() - API function for sending query
2762 * attribute with retries
2763 * @hba: per-adapter instance
2764 * @opcode: attribute opcode
2765 * @idn: attribute idn to access
2766 * @index: index field
2767 * @selector: selector field
2768 * @attr_val: the attribute value after the query request
2769 * completes
2770 *
2771 * Returns 0 for success, non-zero in case of failure
2772*/
2773static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2774 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2775 u32 *attr_val)
2776{
2777 int ret = 0;
2778 u32 retries;
2779
2780 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2781 ret = ufshcd_query_attr(hba, opcode, idn, index,
2782 selector, attr_val);
2783 if (ret)
2784 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2785 __func__, ret, retries);
2786 else
2787 break;
2788 }
2789
2790 if (ret)
2791 dev_err(hba->dev,
2792 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2793 __func__, idn, ret, QUERY_REQ_RETRIES);
2794 return ret;
2795}
2796
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002797static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002798 enum query_opcode opcode, enum desc_idn idn, u8 index,
2799 u8 selector, u8 *desc_buf, int *buf_len)
2800{
2801 struct ufs_query_req *request = NULL;
2802 struct ufs_query_res *response = NULL;
2803 int err;
2804
2805 BUG_ON(!hba);
2806
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002807 ufshcd_hold(hba, false);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002808 if (!desc_buf) {
2809 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2810 __func__, opcode);
2811 err = -EINVAL;
2812 goto out;
2813 }
2814
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002815 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002816 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2817 __func__, *buf_len);
2818 err = -EINVAL;
2819 goto out;
2820 }
2821
2822 mutex_lock(&hba->dev_cmd.lock);
2823 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2824 selector);
2825 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002826 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002827
2828 switch (opcode) {
2829 case UPIU_QUERY_OPCODE_WRITE_DESC:
2830 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2831 break;
2832 case UPIU_QUERY_OPCODE_READ_DESC:
2833 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2834 break;
2835 default:
2836 dev_err(hba->dev,
2837 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2838 __func__, opcode);
2839 err = -EINVAL;
2840 goto out_unlock;
2841 }
2842
2843 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2844
2845 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002846 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2847 __func__, opcode, idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002848 goto out_unlock;
2849 }
2850
2851 hba->dev_cmd.query.descriptor = NULL;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002852 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002853
2854out_unlock:
2855 mutex_unlock(&hba->dev_cmd.lock);
2856out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002857 ufshcd_release(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002858 return err;
2859}
2860
2861/**
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002862 * ufshcd_query_descriptor_retry - API function for sending descriptor
2863 * requests
2864 * hba: per-adapter instance
2865 * opcode: attribute opcode
2866 * idn: attribute idn to access
2867 * index: index field
2868 * selector: selector field
2869 * desc_buf: the buffer that contains the descriptor
2870 * buf_len: length parameter passed to the device
2871 *
2872 * Returns 0 for success, non-zero in case of failure.
2873 * The buf_len parameter will contain, on return, the length parameter
2874 * received on the response.
2875 */
Tomas Winkler26cf9152017-01-05 10:45:09 +02002876static int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
2877 enum query_opcode opcode,
2878 enum desc_idn idn, u8 index,
2879 u8 selector,
2880 u8 *desc_buf, int *buf_len)
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002881{
2882 int err;
2883 int retries;
2884
2885 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2886 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
2887 selector, desc_buf, buf_len);
2888 if (!err || err == -EINVAL)
2889 break;
2890 }
2891
2892 return err;
2893}
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002894
2895/**
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002896 * ufshcd_read_desc_length - read the specified descriptor length from header
2897 * @hba: Pointer to adapter instance
2898 * @desc_id: descriptor idn value
2899 * @desc_index: descriptor index
2900 * @desc_length: pointer to variable to read the length of descriptor
2901 *
2902 * Return 0 in case of success, non-zero otherwise
2903 */
2904static int ufshcd_read_desc_length(struct ufs_hba *hba,
2905 enum desc_idn desc_id,
2906 int desc_index,
2907 int *desc_length)
2908{
2909 int ret;
2910 u8 header[QUERY_DESC_HDR_SIZE];
2911 int header_len = QUERY_DESC_HDR_SIZE;
2912
2913 if (desc_id >= QUERY_DESC_IDN_MAX)
2914 return -EINVAL;
2915
2916 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
2917 desc_id, desc_index, 0, header,
2918 &header_len);
2919
2920 if (ret) {
2921 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
2922 __func__, desc_id);
2923 return ret;
2924 } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
2925 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
2926 __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
2927 desc_id);
2928 ret = -EINVAL;
2929 }
2930
2931 *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
2932 return ret;
2933
2934}
2935
2936/**
2937 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
2938 * @hba: Pointer to adapter instance
2939 * @desc_id: descriptor idn value
2940 * @desc_len: mapped desc length (out)
2941 *
2942 * Return 0 in case of success, non-zero otherwise
2943 */
2944int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
2945 enum desc_idn desc_id, int *desc_len)
2946{
2947 switch (desc_id) {
2948 case QUERY_DESC_IDN_DEVICE:
2949 *desc_len = hba->desc_size.dev_desc;
2950 break;
2951 case QUERY_DESC_IDN_POWER:
2952 *desc_len = hba->desc_size.pwr_desc;
2953 break;
2954 case QUERY_DESC_IDN_GEOMETRY:
2955 *desc_len = hba->desc_size.geom_desc;
2956 break;
2957 case QUERY_DESC_IDN_CONFIGURATION:
2958 *desc_len = hba->desc_size.conf_desc;
2959 break;
2960 case QUERY_DESC_IDN_UNIT:
2961 *desc_len = hba->desc_size.unit_desc;
2962 break;
2963 case QUERY_DESC_IDN_INTERCONNECT:
2964 *desc_len = hba->desc_size.interc_desc;
2965 break;
2966 case QUERY_DESC_IDN_STRING:
2967 *desc_len = QUERY_DESC_MAX_SIZE;
2968 break;
2969 case QUERY_DESC_IDN_RFU_0:
2970 case QUERY_DESC_IDN_RFU_1:
2971 *desc_len = 0;
2972 break;
2973 default:
2974 *desc_len = 0;
2975 return -EINVAL;
2976 }
2977 return 0;
2978}
2979EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
2980
2981/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03002982 * ufshcd_read_desc_param - read the specified descriptor parameter
2983 * @hba: Pointer to adapter instance
2984 * @desc_id: descriptor idn value
2985 * @desc_index: descriptor index
2986 * @param_offset: offset of the parameter to read
2987 * @param_read_buf: pointer to buffer where parameter would be read
2988 * @param_size: sizeof(param_read_buf)
2989 *
2990 * Return 0 in case of success, non-zero otherwise
2991 */
2992static int ufshcd_read_desc_param(struct ufs_hba *hba,
2993 enum desc_idn desc_id,
2994 int desc_index,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002995 u8 param_offset,
Subhash Jadavanida461ce2014-09-25 15:32:25 +03002996 u8 *param_read_buf,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002997 u8 param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03002998{
2999 int ret;
3000 u8 *desc_buf;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003001 int buff_len;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003002 bool is_kmalloc = true;
3003
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003004 /* Safety check */
3005 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003006 return -EINVAL;
3007
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003008 /* Get the max length of descriptor from structure filled up at probe
3009 * time.
3010 */
3011 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003012
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003013 /* Sanity checks */
3014 if (ret || !buff_len) {
3015 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3016 __func__);
3017 return ret;
3018 }
3019
3020 /* Check whether we need temp memory */
3021 if (param_offset != 0 || param_size < buff_len) {
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003022 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3023 if (!desc_buf)
3024 return -ENOMEM;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003025 } else {
3026 desc_buf = param_read_buf;
3027 is_kmalloc = false;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003028 }
3029
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003030 /* Request for full descriptor */
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003031 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003032 desc_id, desc_index, 0,
3033 desc_buf, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003034
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003035 if (ret) {
3036 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3037 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003038 goto out;
3039 }
3040
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003041 /* Sanity check */
3042 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3043 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3044 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3045 ret = -EINVAL;
3046 goto out;
3047 }
3048
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003049 /* Check wherher we will not copy more data, than available */
3050 if (is_kmalloc && param_size > buff_len)
3051 param_size = buff_len;
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003052
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003053 if (is_kmalloc)
3054 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3055out:
3056 if (is_kmalloc)
3057 kfree(desc_buf);
3058 return ret;
3059}
3060
3061static inline int ufshcd_read_desc(struct ufs_hba *hba,
3062 enum desc_idn desc_id,
3063 int desc_index,
3064 u8 *buf,
3065 u32 size)
3066{
3067 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3068}
3069
3070static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3071 u8 *buf,
3072 u32 size)
3073{
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02003074 return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003075}
3076
Tomas Winkler8209b6d2017-01-05 10:45:10 +02003077static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
Yaniv Gardib573d482016-03-10 17:37:09 +02003078{
3079 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3080}
Yaniv Gardib573d482016-03-10 17:37:09 +02003081
3082/**
3083 * ufshcd_read_string_desc - read string descriptor
3084 * @hba: pointer to adapter instance
3085 * @desc_index: descriptor index
3086 * @buf: pointer to buffer where descriptor would be read
3087 * @size: size of buf
3088 * @ascii: if true convert from unicode to ascii characters
3089 *
3090 * Return 0 in case of success, non-zero otherwise
3091 */
Tomas Winkler8209b6d2017-01-05 10:45:10 +02003092#define ASCII_STD true
3093static int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index,
3094 u8 *buf, u32 size, bool ascii)
Yaniv Gardib573d482016-03-10 17:37:09 +02003095{
3096 int err = 0;
3097
3098 err = ufshcd_read_desc(hba,
3099 QUERY_DESC_IDN_STRING, desc_index, buf, size);
3100
3101 if (err) {
3102 dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n",
3103 __func__, QUERY_REQ_RETRIES, err);
3104 goto out;
3105 }
3106
3107 if (ascii) {
3108 int desc_len;
3109 int ascii_len;
3110 int i;
3111 char *buff_ascii;
3112
3113 desc_len = buf[0];
3114 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3115 ascii_len = (desc_len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3116 if (size < ascii_len + QUERY_DESC_HDR_SIZE) {
3117 dev_err(hba->dev, "%s: buffer allocated size is too small\n",
3118 __func__);
3119 err = -ENOMEM;
3120 goto out;
3121 }
3122
3123 buff_ascii = kmalloc(ascii_len, GFP_KERNEL);
3124 if (!buff_ascii) {
3125 err = -ENOMEM;
Tiezhu Yangfcbefc32016-06-25 12:35:22 +08003126 goto out;
Yaniv Gardib573d482016-03-10 17:37:09 +02003127 }
3128
3129 /*
3130 * the descriptor contains string in UTF16 format
3131 * we need to convert to utf-8 so it can be displayed
3132 */
3133 utf16s_to_utf8s((wchar_t *)&buf[QUERY_DESC_HDR_SIZE],
3134 desc_len - QUERY_DESC_HDR_SIZE,
3135 UTF16_BIG_ENDIAN, buff_ascii, ascii_len);
3136
3137 /* replace non-printable or non-ASCII characters with spaces */
3138 for (i = 0; i < ascii_len; i++)
3139 ufshcd_remove_non_printable(&buff_ascii[i]);
3140
3141 memset(buf + QUERY_DESC_HDR_SIZE, 0,
3142 size - QUERY_DESC_HDR_SIZE);
3143 memcpy(buf + QUERY_DESC_HDR_SIZE, buff_ascii, ascii_len);
3144 buf[QUERY_DESC_LENGTH_OFFSET] = ascii_len + QUERY_DESC_HDR_SIZE;
Yaniv Gardib573d482016-03-10 17:37:09 +02003145 kfree(buff_ascii);
3146 }
3147out:
3148 return err;
3149}
Yaniv Gardib573d482016-03-10 17:37:09 +02003150
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003151/**
3152 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3153 * @hba: Pointer to adapter instance
3154 * @lun: lun id
3155 * @param_offset: offset of the parameter to read
3156 * @param_read_buf: pointer to buffer where parameter would be read
3157 * @param_size: sizeof(param_read_buf)
3158 *
3159 * Return 0 in case of success, non-zero otherwise
3160 */
3161static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3162 int lun,
3163 enum unit_desc_param param_offset,
3164 u8 *param_read_buf,
3165 u32 param_size)
3166{
3167 /*
3168 * Unit descriptors are only available for general purpose LUs (LUN id
3169 * from 0 to 7) and RPMB Well known LU.
3170 */
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03003171 if (lun != UFS_UPIU_RPMB_WLUN && (lun >= UFS_UPIU_MAX_GENERAL_LUN))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003172 return -EOPNOTSUPP;
3173
3174 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3175 param_offset, param_read_buf, param_size);
3176}
3177
3178/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303179 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3180 * @hba: per adapter instance
3181 *
3182 * 1. Allocate DMA memory for Command Descriptor array
3183 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3184 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3185 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3186 * (UTMRDL)
3187 * 4. Allocate memory for local reference block(lrb).
3188 *
3189 * Returns 0 for success, non-zero in case of failure
3190 */
3191static int ufshcd_memory_alloc(struct ufs_hba *hba)
3192{
3193 size_t utmrdl_size, utrdl_size, ucdl_size;
3194
3195 /* Allocate memory for UTP command descriptors */
3196 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003197 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3198 ucdl_size,
3199 &hba->ucdl_dma_addr,
3200 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303201
3202 /*
3203 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3204 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3205 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3206 * be aligned to 128 bytes as well
3207 */
3208 if (!hba->ucdl_base_addr ||
3209 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303210 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303211 "Command Descriptor Memory allocation failed\n");
3212 goto out;
3213 }
3214
3215 /*
3216 * Allocate memory for UTP Transfer descriptors
3217 * UFSHCI requires 1024 byte alignment of UTRD
3218 */
3219 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003220 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3221 utrdl_size,
3222 &hba->utrdl_dma_addr,
3223 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303224 if (!hba->utrdl_base_addr ||
3225 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303226 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303227 "Transfer Descriptor Memory allocation failed\n");
3228 goto out;
3229 }
3230
3231 /*
3232 * Allocate memory for UTP Task Management descriptors
3233 * UFSHCI requires 1024 byte alignment of UTMRD
3234 */
3235 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003236 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3237 utmrdl_size,
3238 &hba->utmrdl_dma_addr,
3239 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303240 if (!hba->utmrdl_base_addr ||
3241 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303242 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303243 "Task Management Descriptor Memory allocation failed\n");
3244 goto out;
3245 }
3246
3247 /* Allocate memory for local reference block */
Seungwon Jeon2953f852013-06-27 13:31:54 +09003248 hba->lrb = devm_kzalloc(hba->dev,
3249 hba->nutrs * sizeof(struct ufshcd_lrb),
3250 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303251 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303252 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303253 goto out;
3254 }
3255 return 0;
3256out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303257 return -ENOMEM;
3258}
3259
3260/**
3261 * ufshcd_host_memory_configure - configure local reference block with
3262 * memory offsets
3263 * @hba: per adapter instance
3264 *
3265 * Configure Host memory space
3266 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3267 * address.
3268 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3269 * and PRDT offset.
3270 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3271 * into local reference block.
3272 */
3273static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3274{
3275 struct utp_transfer_cmd_desc *cmd_descp;
3276 struct utp_transfer_req_desc *utrdlp;
3277 dma_addr_t cmd_desc_dma_addr;
3278 dma_addr_t cmd_desc_element_addr;
3279 u16 response_offset;
3280 u16 prdt_offset;
3281 int cmd_desc_size;
3282 int i;
3283
3284 utrdlp = hba->utrdl_base_addr;
3285 cmd_descp = hba->ucdl_base_addr;
3286
3287 response_offset =
3288 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3289 prdt_offset =
3290 offsetof(struct utp_transfer_cmd_desc, prd_table);
3291
3292 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3293 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3294
3295 for (i = 0; i < hba->nutrs; i++) {
3296 /* Configure UTRD with command descriptor base address */
3297 cmd_desc_element_addr =
3298 (cmd_desc_dma_addr + (cmd_desc_size * i));
3299 utrdlp[i].command_desc_base_addr_lo =
3300 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3301 utrdlp[i].command_desc_base_addr_hi =
3302 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3303
3304 /* Response upiu and prdt offset should be in double words */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003305 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3306 utrdlp[i].response_upiu_offset =
3307 cpu_to_le16(response_offset);
3308 utrdlp[i].prd_table_offset =
3309 cpu_to_le16(prdt_offset);
3310 utrdlp[i].response_upiu_length =
3311 cpu_to_le16(ALIGNED_UPIU_SIZE);
3312 } else {
3313 utrdlp[i].response_upiu_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303314 cpu_to_le16((response_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003315 utrdlp[i].prd_table_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303316 cpu_to_le16((prdt_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003317 utrdlp[i].response_upiu_length =
Sujit Reddy Thumma3ca316c2013-06-26 22:39:30 +05303318 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003319 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303320
3321 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003322 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3323 (i * sizeof(struct utp_transfer_req_desc));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303324 hba->lrb[i].ucd_req_ptr =
3325 (struct utp_upiu_req *)(cmd_descp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003326 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303327 hba->lrb[i].ucd_rsp_ptr =
3328 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003329 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3330 response_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303331 hba->lrb[i].ucd_prdt_ptr =
3332 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003333 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3334 prdt_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303335 }
3336}
3337
3338/**
3339 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3340 * @hba: per adapter instance
3341 *
3342 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3343 * in order to initialize the Unipro link startup procedure.
3344 * Once the Unipro links are up, the device connected to the controller
3345 * is detected.
3346 *
3347 * Returns 0 on success, non-zero value on failure
3348 */
3349static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3350{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303351 struct uic_command uic_cmd = {0};
3352 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303353
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303354 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3355
3356 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3357 if (ret)
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003358 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303359 "dme-link-startup: error code %d\n", ret);
3360 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303361}
3362
Yaniv Gardicad2e032015-03-31 17:37:14 +03003363static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3364{
3365 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3366 unsigned long min_sleep_time_us;
3367
3368 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3369 return;
3370
3371 /*
3372 * last_dme_cmd_tstamp will be 0 only for 1st call to
3373 * this function
3374 */
3375 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3376 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3377 } else {
3378 unsigned long delta =
3379 (unsigned long) ktime_to_us(
3380 ktime_sub(ktime_get(),
3381 hba->last_dme_cmd_tstamp));
3382
3383 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3384 min_sleep_time_us =
3385 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3386 else
3387 return; /* no more delay required */
3388 }
3389
3390 /* allow sleep for extra 50us if needed */
3391 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3392}
3393
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303394/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303395 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3396 * @hba: per adapter instance
3397 * @attr_sel: uic command argument1
3398 * @attr_set: attribute set type as uic command argument2
3399 * @mib_val: setting value as uic command argument3
3400 * @peer: indicate whether peer or local
3401 *
3402 * Returns 0 on success, non-zero value on failure
3403 */
3404int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3405 u8 attr_set, u32 mib_val, u8 peer)
3406{
3407 struct uic_command uic_cmd = {0};
3408 static const char *const action[] = {
3409 "dme-set",
3410 "dme-peer-set"
3411 };
3412 const char *set = action[!!peer];
3413 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003414 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303415
3416 uic_cmd.command = peer ?
3417 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3418 uic_cmd.argument1 = attr_sel;
3419 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3420 uic_cmd.argument3 = mib_val;
3421
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003422 do {
3423 /* for peer attributes we retry upon failure */
3424 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3425 if (ret)
3426 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3427 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3428 } while (ret && peer && --retries);
3429
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003430 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003431 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003432 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3433 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303434
3435 return ret;
3436}
3437EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3438
3439/**
3440 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3441 * @hba: per adapter instance
3442 * @attr_sel: uic command argument1
3443 * @mib_val: the value of the attribute as returned by the UIC command
3444 * @peer: indicate whether peer or local
3445 *
3446 * Returns 0 on success, non-zero value on failure
3447 */
3448int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3449 u32 *mib_val, u8 peer)
3450{
3451 struct uic_command uic_cmd = {0};
3452 static const char *const action[] = {
3453 "dme-get",
3454 "dme-peer-get"
3455 };
3456 const char *get = action[!!peer];
3457 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003458 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003459 struct ufs_pa_layer_attr orig_pwr_info;
3460 struct ufs_pa_layer_attr temp_pwr_info;
3461 bool pwr_mode_change = false;
3462
3463 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3464 orig_pwr_info = hba->pwr_info;
3465 temp_pwr_info = orig_pwr_info;
3466
3467 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3468 orig_pwr_info.pwr_rx == FAST_MODE) {
3469 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3470 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3471 pwr_mode_change = true;
3472 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3473 orig_pwr_info.pwr_rx == SLOW_MODE) {
3474 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3475 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3476 pwr_mode_change = true;
3477 }
3478 if (pwr_mode_change) {
3479 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3480 if (ret)
3481 goto out;
3482 }
3483 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303484
3485 uic_cmd.command = peer ?
3486 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3487 uic_cmd.argument1 = attr_sel;
3488
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003489 do {
3490 /* for peer attributes we retry upon failure */
3491 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3492 if (ret)
3493 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3494 get, UIC_GET_ATTR_ID(attr_sel), ret);
3495 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303496
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003497 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003498 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003499 get, UIC_GET_ATTR_ID(attr_sel),
3500 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003501
3502 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303503 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003504
3505 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3506 && pwr_mode_change)
3507 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303508out:
3509 return ret;
3510}
3511EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3512
3513/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003514 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3515 * state) and waits for it to take effect.
3516 *
3517 * @hba: per adapter instance
3518 * @cmd: UIC command to execute
3519 *
3520 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3521 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3522 * and device UniPro link and hence it's final completion would be indicated by
3523 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3524 * addition to normal UIC command completion Status (UCCS). This function only
3525 * returns after the relevant status bits indicate the completion.
3526 *
3527 * Returns 0 on success, non-zero value on failure
3528 */
3529static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3530{
3531 struct completion uic_async_done;
3532 unsigned long flags;
3533 u8 status;
3534 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003535 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003536
3537 mutex_lock(&hba->uic_cmd_mutex);
3538 init_completion(&uic_async_done);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003539 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003540
3541 spin_lock_irqsave(hba->host->host_lock, flags);
3542 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003543 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3544 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3545 /*
3546 * Make sure UIC command completion interrupt is disabled before
3547 * issuing UIC command.
3548 */
3549 wmb();
3550 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003551 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003552 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3553 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003554 if (ret) {
3555 dev_err(hba->dev,
3556 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3557 cmd->command, cmd->argument3, ret);
3558 goto out;
3559 }
3560
3561 if (!wait_for_completion_timeout(hba->uic_async_done,
3562 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3563 dev_err(hba->dev,
3564 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3565 cmd->command, cmd->argument3);
3566 ret = -ETIMEDOUT;
3567 goto out;
3568 }
3569
3570 status = ufshcd_get_upmcrs(hba);
3571 if (status != PWR_LOCAL) {
3572 dev_err(hba->dev,
Zang Leigang479da362017-09-19 16:50:30 +08003573 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003574 cmd->command, status);
3575 ret = (status != PWR_OK) ? status : -1;
3576 }
3577out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08003578 if (ret) {
3579 ufshcd_print_host_state(hba);
3580 ufshcd_print_pwr_info(hba);
3581 ufshcd_print_host_regs(hba);
3582 }
3583
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003584 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003585 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003586 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003587 if (reenable_intr)
3588 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003589 spin_unlock_irqrestore(hba->host->host_lock, flags);
3590 mutex_unlock(&hba->uic_cmd_mutex);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003591
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003592 return ret;
3593}
3594
3595/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303596 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3597 * using DME_SET primitives.
3598 * @hba: per adapter instance
3599 * @mode: powr mode value
3600 *
3601 * Returns 0 on success, non-zero value on failure
3602 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05303603static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303604{
3605 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003606 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303607
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003608 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3609 ret = ufshcd_dme_set(hba,
3610 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3611 if (ret) {
3612 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3613 __func__, ret);
3614 goto out;
3615 }
3616 }
3617
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303618 uic_cmd.command = UIC_CMD_DME_SET;
3619 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3620 uic_cmd.argument3 = mode;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003621 ufshcd_hold(hba, false);
3622 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3623 ufshcd_release(hba);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303624
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003625out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003626 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003627}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303628
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003629static int ufshcd_link_recovery(struct ufs_hba *hba)
3630{
3631 int ret;
3632 unsigned long flags;
3633
3634 spin_lock_irqsave(hba->host->host_lock, flags);
3635 hba->ufshcd_state = UFSHCD_STATE_RESET;
3636 ufshcd_set_eh_in_progress(hba);
3637 spin_unlock_irqrestore(hba->host->host_lock, flags);
3638
3639 ret = ufshcd_host_reset_and_restore(hba);
3640
3641 spin_lock_irqsave(hba->host->host_lock, flags);
3642 if (ret)
3643 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3644 ufshcd_clear_eh_in_progress(hba);
3645 spin_unlock_irqrestore(hba->host->host_lock, flags);
3646
3647 if (ret)
3648 dev_err(hba->dev, "%s: link recovery failed, err %d",
3649 __func__, ret);
3650
3651 return ret;
3652}
3653
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003654static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003655{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003656 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003657 struct uic_command uic_cmd = {0};
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003658 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003659
Kiwoong Kimee32c902016-11-10 21:17:43 +09003660 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3661
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003662 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003663 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003664 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3665 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003666
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003667 if (ret) {
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003668 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3669 __func__, ret);
3670
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003671 /*
3672 * If link recovery fails then return error so that caller
3673 * don't retry the hibern8 enter again.
3674 */
3675 if (ufshcd_link_recovery(hba))
3676 ret = -ENOLINK;
Kiwoong Kimee32c902016-11-10 21:17:43 +09003677 } else
3678 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3679 POST_CHANGE);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003680
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003681 return ret;
3682}
3683
3684static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3685{
3686 int ret = 0, retries;
3687
3688 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3689 ret = __ufshcd_uic_hibern8_enter(hba);
3690 if (!ret || ret == -ENOLINK)
3691 goto out;
3692 }
3693out:
3694 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003695}
3696
3697static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3698{
3699 struct uic_command uic_cmd = {0};
3700 int ret;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003701 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003702
Kiwoong Kimee32c902016-11-10 21:17:43 +09003703 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3704
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003705 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3706 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003707 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3708 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3709
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303710 if (ret) {
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003711 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3712 __func__, ret);
3713 ret = ufshcd_link_recovery(hba);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003714 } else {
Kiwoong Kimee32c902016-11-10 21:17:43 +09003715 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3716 POST_CHANGE);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003717 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3718 hba->ufs_stats.hibern8_exit_cnt++;
3719 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303720
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303721 return ret;
3722}
3723
Yaniv Gardi50646362014-10-23 13:25:13 +03003724 /**
3725 * ufshcd_init_pwr_info - setting the POR (power on reset)
3726 * values in hba power info
3727 * @hba: per-adapter instance
3728 */
3729static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3730{
3731 hba->pwr_info.gear_rx = UFS_PWM_G1;
3732 hba->pwr_info.gear_tx = UFS_PWM_G1;
3733 hba->pwr_info.lane_rx = 1;
3734 hba->pwr_info.lane_tx = 1;
3735 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3736 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3737 hba->pwr_info.hs_rate = 0;
3738}
3739
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303740/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003741 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3742 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303743 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003744static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303745{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003746 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3747
3748 if (hba->max_pwr_info.is_valid)
3749 return 0;
3750
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003751 pwr_info->pwr_tx = FAST_MODE;
3752 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003753 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303754
3755 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003756 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3757 &pwr_info->lane_rx);
3758 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3759 &pwr_info->lane_tx);
3760
3761 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
3762 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
3763 __func__,
3764 pwr_info->lane_rx,
3765 pwr_info->lane_tx);
3766 return -EINVAL;
3767 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303768
3769 /*
3770 * First, get the maximum gears of HS speed.
3771 * If a zero value, it means there is no HSGEAR capability.
3772 * Then, get the maximum gears of PWM speed.
3773 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003774 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
3775 if (!pwr_info->gear_rx) {
3776 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3777 &pwr_info->gear_rx);
3778 if (!pwr_info->gear_rx) {
3779 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
3780 __func__, pwr_info->gear_rx);
3781 return -EINVAL;
3782 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003783 pwr_info->pwr_rx = SLOW_MODE;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303784 }
3785
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003786 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
3787 &pwr_info->gear_tx);
3788 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303789 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003790 &pwr_info->gear_tx);
3791 if (!pwr_info->gear_tx) {
3792 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
3793 __func__, pwr_info->gear_tx);
3794 return -EINVAL;
3795 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003796 pwr_info->pwr_tx = SLOW_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003797 }
3798
3799 hba->max_pwr_info.is_valid = true;
3800 return 0;
3801}
3802
3803static int ufshcd_change_power_mode(struct ufs_hba *hba,
3804 struct ufs_pa_layer_attr *pwr_mode)
3805{
3806 int ret;
3807
3808 /* if already configured to the requested pwr_mode */
3809 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
3810 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
3811 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
3812 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
3813 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
3814 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
3815 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
3816 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
3817 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303818 }
3819
3820 /*
3821 * Configure attributes for power mode change with below.
3822 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
3823 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
3824 * - PA_HSSERIES
3825 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003826 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
3827 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
3828 pwr_mode->lane_rx);
3829 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
3830 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303831 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003832 else
3833 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303834
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003835 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
3836 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
3837 pwr_mode->lane_tx);
3838 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
3839 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303840 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003841 else
3842 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303843
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003844 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
3845 pwr_mode->pwr_tx == FASTAUTO_MODE ||
3846 pwr_mode->pwr_rx == FAST_MODE ||
3847 pwr_mode->pwr_tx == FAST_MODE)
3848 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
3849 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303850
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003851 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
3852 | pwr_mode->pwr_tx);
3853
3854 if (ret) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303855 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003856 "%s: power mode change failed %d\n", __func__, ret);
3857 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02003858 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
3859 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003860
3861 memcpy(&hba->pwr_info, pwr_mode,
3862 sizeof(struct ufs_pa_layer_attr));
3863 }
3864
3865 return ret;
3866}
3867
3868/**
3869 * ufshcd_config_pwr_mode - configure a new power mode
3870 * @hba: per-adapter instance
3871 * @desired_pwr_mode: desired power configuration
3872 */
3873static int ufshcd_config_pwr_mode(struct ufs_hba *hba,
3874 struct ufs_pa_layer_attr *desired_pwr_mode)
3875{
3876 struct ufs_pa_layer_attr final_params = { 0 };
3877 int ret;
3878
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02003879 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
3880 desired_pwr_mode, &final_params);
3881
3882 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003883 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
3884
3885 ret = ufshcd_change_power_mode(hba, &final_params);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08003886 if (!ret)
3887 ufshcd_print_pwr_info(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303888
3889 return ret;
3890}
3891
3892/**
Dolev Raviv68078d52013-07-30 00:35:58 +05303893 * ufshcd_complete_dev_init() - checks device readiness
3894 * hba: per-adapter instance
3895 *
3896 * Set fDeviceInit flag and poll until device toggles it.
3897 */
3898static int ufshcd_complete_dev_init(struct ufs_hba *hba)
3899{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02003900 int i;
3901 int err;
Dolev Raviv68078d52013-07-30 00:35:58 +05303902 bool flag_res = 1;
3903
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02003904 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
3905 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05303906 if (err) {
3907 dev_err(hba->dev,
3908 "%s setting fDeviceInit flag failed with error %d\n",
3909 __func__, err);
3910 goto out;
3911 }
3912
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02003913 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
3914 for (i = 0; i < 1000 && !err && flag_res; i++)
3915 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
3916 QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
3917
Dolev Raviv68078d52013-07-30 00:35:58 +05303918 if (err)
3919 dev_err(hba->dev,
3920 "%s reading fDeviceInit flag failed with error %d\n",
3921 __func__, err);
3922 else if (flag_res)
3923 dev_err(hba->dev,
3924 "%s fDeviceInit was not cleared by the device\n",
3925 __func__);
3926
3927out:
3928 return err;
3929}
3930
3931/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303932 * ufshcd_make_hba_operational - Make UFS controller operational
3933 * @hba: per adapter instance
3934 *
3935 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03003936 * 1. Enable required interrupts
3937 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02003938 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03003939 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303940 *
3941 * Returns 0 on success, non-zero value on failure
3942 */
3943static int ufshcd_make_hba_operational(struct ufs_hba *hba)
3944{
3945 int err = 0;
3946 u32 reg;
3947
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303948 /* Enable required interrupts */
3949 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
3950
3951 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03003952 if (ufshcd_is_intr_aggr_allowed(hba))
3953 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
3954 else
3955 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303956
3957 /* Configure UTRL and UTMRL base address registers */
3958 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
3959 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
3960 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
3961 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
3962 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
3963 REG_UTP_TASK_REQ_LIST_BASE_L);
3964 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
3965 REG_UTP_TASK_REQ_LIST_BASE_H);
3966
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303967 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02003968 * Make sure base address and interrupt setup are updated before
3969 * enabling the run/stop registers below.
3970 */
3971 wmb();
3972
3973 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303974 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303975 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03003976 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303977 if (!(ufshcd_get_lists_status(reg))) {
3978 ufshcd_enable_run_stop_reg(hba);
3979 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303980 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303981 "Host controller not ready to process requests");
3982 err = -EIO;
3983 goto out;
3984 }
3985
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303986out:
3987 return err;
3988}
3989
3990/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02003991 * ufshcd_hba_stop - Send controller to reset state
3992 * @hba: per adapter instance
3993 * @can_sleep: perform sleep or just spin
3994 */
3995static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
3996{
3997 int err;
3998
3999 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4000 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4001 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4002 10, 1, can_sleep);
4003 if (err)
4004 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4005}
4006
4007/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304008 * ufshcd_hba_enable - initialize the controller
4009 * @hba: per adapter instance
4010 *
4011 * The controller resets itself and controller firmware initialization
4012 * sequence kicks off. When controller is ready it will set
4013 * the Host Controller Enable bit to 1.
4014 *
4015 * Returns 0 on success, non-zero value on failure
4016 */
4017static int ufshcd_hba_enable(struct ufs_hba *hba)
4018{
4019 int retry;
4020
4021 /*
4022 * msleep of 1 and 5 used in this function might result in msleep(20),
4023 * but it was necessary to send the UFS FPGA to reset mode during
4024 * development and testing of this driver. msleep can be changed to
4025 * mdelay and retry count can be reduced based on the controller.
4026 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004027 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304028 /* change controller state to "reset state" */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004029 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304030
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004031 /* UniPro link is disabled at this point */
4032 ufshcd_set_link_off(hba);
4033
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004034 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004035
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304036 /* start controller initialization sequence */
4037 ufshcd_hba_start(hba);
4038
4039 /*
4040 * To initialize a UFS host controller HCE bit must be set to 1.
4041 * During initialization the HCE bit value changes from 1->0->1.
4042 * When the host controller completes initialization sequence
4043 * it sets the value of HCE bit to 1. The same HCE bit is read back
4044 * to check if the controller has completed initialization sequence.
4045 * So without this delay the value HCE = 1, set in the previous
4046 * instruction might be read back.
4047 * This delay can be changed based on the controller.
4048 */
4049 msleep(1);
4050
4051 /* wait for the host controller to complete initialization */
4052 retry = 10;
4053 while (ufshcd_is_hba_active(hba)) {
4054 if (retry) {
4055 retry--;
4056 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304057 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304058 "Controller enable failed\n");
4059 return -EIO;
4060 }
4061 msleep(5);
4062 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004063
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004064 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004065 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004066
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004067 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004068
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304069 return 0;
4070}
4071
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004072static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4073{
4074 int tx_lanes, i, err = 0;
4075
4076 if (!peer)
4077 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4078 &tx_lanes);
4079 else
4080 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4081 &tx_lanes);
4082 for (i = 0; i < tx_lanes; i++) {
4083 if (!peer)
4084 err = ufshcd_dme_set(hba,
4085 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4086 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4087 0);
4088 else
4089 err = ufshcd_dme_peer_set(hba,
4090 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4091 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4092 0);
4093 if (err) {
4094 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4095 __func__, peer, i, err);
4096 break;
4097 }
4098 }
4099
4100 return err;
4101}
4102
4103static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4104{
4105 return ufshcd_disable_tx_lcc(hba, true);
4106}
4107
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304108/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304109 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304110 * @hba: per adapter instance
4111 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304112 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304113 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304114static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304115{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304116 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004117 int retries = DME_LINKSTARTUP_RETRIES;
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004118 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304119
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004120 /*
4121 * If UFS device isn't active then we will have to issue link startup
4122 * 2 times to make sure the device state move to active.
4123 */
4124 if (!ufshcd_is_ufs_dev_active(hba))
4125 link_startup_again = true;
4126
4127link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004128 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004129 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304130
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004131 ret = ufshcd_dme_link_startup(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004132
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004133 /* check if device is detected by inter-connect layer */
4134 if (!ret && !ufshcd_is_device_present(hba)) {
4135 dev_err(hba->dev, "%s: Device not present\n", __func__);
4136 ret = -ENXIO;
4137 goto out;
4138 }
4139
4140 /*
4141 * DME link lost indication is only received when link is up,
4142 * but we can't be sure if the link is up until link startup
4143 * succeeds. So reset the local Uni-Pro and try again.
4144 */
4145 if (ret && ufshcd_hba_enable(hba))
4146 goto out;
4147 } while (ret && retries--);
4148
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304149 if (ret)
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004150 /* failed to get the link up... retire */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304151 goto out;
4152
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004153 if (link_startup_again) {
4154 link_startup_again = false;
4155 retries = DME_LINKSTARTUP_RETRIES;
4156 goto link_startup;
4157 }
4158
subhashj@codeaurora.orgd2aebb92016-12-22 18:41:33 -08004159 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4160 ufshcd_init_pwr_info(hba);
4161 ufshcd_print_pwr_info(hba);
4162
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004163 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4164 ret = ufshcd_disable_device_tx_lcc(hba);
4165 if (ret)
4166 goto out;
4167 }
4168
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004169 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004170 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4171 if (ret)
4172 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004173
4174 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304175out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004176 if (ret) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304177 dev_err(hba->dev, "link startup failed %d\n", ret);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004178 ufshcd_print_host_state(hba);
4179 ufshcd_print_pwr_info(hba);
4180 ufshcd_print_host_regs(hba);
4181 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304182 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304183}
4184
4185/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304186 * ufshcd_verify_dev_init() - Verify device initialization
4187 * @hba: per-adapter instance
4188 *
4189 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4190 * device Transport Protocol (UTP) layer is ready after a reset.
4191 * If the UTP layer at the device side is not initialized, it may
4192 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4193 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4194 */
4195static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4196{
4197 int err = 0;
4198 int retries;
4199
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004200 ufshcd_hold(hba, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304201 mutex_lock(&hba->dev_cmd.lock);
4202 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4203 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4204 NOP_OUT_TIMEOUT);
4205
4206 if (!err || err == -ETIMEDOUT)
4207 break;
4208
4209 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4210 }
4211 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004212 ufshcd_release(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304213
4214 if (err)
4215 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4216 return err;
4217}
4218
4219/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004220 * ufshcd_set_queue_depth - set lun queue depth
4221 * @sdev: pointer to SCSI device
4222 *
4223 * Read bLUQueueDepth value and activate scsi tagged command
4224 * queueing. For WLUN, queue depth is set to 1. For best-effort
4225 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4226 * value that host can queue.
4227 */
4228static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4229{
4230 int ret = 0;
4231 u8 lun_qdepth;
4232 struct ufs_hba *hba;
4233
4234 hba = shost_priv(sdev->host);
4235
4236 lun_qdepth = hba->nutrs;
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02004237 ret = ufshcd_read_unit_desc_param(hba,
4238 ufshcd_scsi_to_upiu_lun(sdev->lun),
4239 UNIT_DESC_PARAM_LU_Q_DEPTH,
4240 &lun_qdepth,
4241 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004242
4243 /* Some WLUN doesn't support unit descriptor */
4244 if (ret == -EOPNOTSUPP)
4245 lun_qdepth = 1;
4246 else if (!lun_qdepth)
4247 /* eventually, we can figure out the real queue depth */
4248 lun_qdepth = hba->nutrs;
4249 else
4250 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4251
4252 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4253 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004254 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004255}
4256
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004257/*
4258 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4259 * @hba: per-adapter instance
4260 * @lun: UFS device lun id
4261 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4262 *
4263 * Returns 0 in case of success and b_lu_write_protect status would be returned
4264 * @b_lu_write_protect parameter.
4265 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4266 * Returns -EINVAL in case of invalid parameters passed to this function.
4267 */
4268static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4269 u8 lun,
4270 u8 *b_lu_write_protect)
4271{
4272 int ret;
4273
4274 if (!b_lu_write_protect)
4275 ret = -EINVAL;
4276 /*
4277 * According to UFS device spec, RPMB LU can't be write
4278 * protected so skip reading bLUWriteProtect parameter for
4279 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4280 */
4281 else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4282 ret = -ENOTSUPP;
4283 else
4284 ret = ufshcd_read_unit_desc_param(hba,
4285 lun,
4286 UNIT_DESC_PARAM_LU_WR_PROTECT,
4287 b_lu_write_protect,
4288 sizeof(*b_lu_write_protect));
4289 return ret;
4290}
4291
4292/**
4293 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4294 * status
4295 * @hba: per-adapter instance
4296 * @sdev: pointer to SCSI device
4297 *
4298 */
4299static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4300 struct scsi_device *sdev)
4301{
4302 if (hba->dev_info.f_power_on_wp_en &&
4303 !hba->dev_info.is_lu_power_on_wp) {
4304 u8 b_lu_write_protect;
4305
4306 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4307 &b_lu_write_protect) &&
4308 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4309 hba->dev_info.is_lu_power_on_wp = true;
4310 }
4311}
4312
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004313/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304314 * ufshcd_slave_alloc - handle initial SCSI device configurations
4315 * @sdev: pointer to SCSI device
4316 *
4317 * Returns success
4318 */
4319static int ufshcd_slave_alloc(struct scsi_device *sdev)
4320{
4321 struct ufs_hba *hba;
4322
4323 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304324
4325 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4326 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304327
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304328 /* allow SCSI layer to restart the device in case of errors */
4329 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004330
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004331 /* REPORT SUPPORTED OPERATION CODES is not supported */
4332 sdev->no_report_opcodes = 1;
4333
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004334
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004335 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004336
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004337 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4338
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004339 return 0;
4340}
4341
4342/**
4343 * ufshcd_change_queue_depth - change queue depth
4344 * @sdev: pointer to SCSI device
4345 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004346 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004347 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004348 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004349static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004350{
4351 struct ufs_hba *hba = shost_priv(sdev->host);
4352
4353 if (depth > hba->nutrs)
4354 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004355 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304356}
4357
4358/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004359 * ufshcd_slave_configure - adjust SCSI device configurations
4360 * @sdev: pointer to SCSI device
4361 */
4362static int ufshcd_slave_configure(struct scsi_device *sdev)
4363{
4364 struct request_queue *q = sdev->request_queue;
4365
4366 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
4367 blk_queue_max_segment_size(q, PRDT_DATA_BYTE_COUNT_MAX);
4368
4369 return 0;
4370}
4371
4372/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304373 * ufshcd_slave_destroy - remove SCSI device configurations
4374 * @sdev: pointer to SCSI device
4375 */
4376static void ufshcd_slave_destroy(struct scsi_device *sdev)
4377{
4378 struct ufs_hba *hba;
4379
4380 hba = shost_priv(sdev->host);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004381 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004382 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4383 unsigned long flags;
4384
4385 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004386 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004387 spin_unlock_irqrestore(hba->host->host_lock, flags);
4388 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304389}
4390
4391/**
4392 * ufshcd_task_req_compl - handle task management request completion
4393 * @hba: per adapter instance
4394 * @index: index of the completed request
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304395 * @resp: task management service response
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304396 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304397 * Returns non-zero value on error, zero on success
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304398 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304399static int ufshcd_task_req_compl(struct ufs_hba *hba, u32 index, u8 *resp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304400{
4401 struct utp_task_req_desc *task_req_descp;
4402 struct utp_upiu_task_rsp *task_rsp_upiup;
4403 unsigned long flags;
4404 int ocs_value;
4405 int task_result;
4406
4407 spin_lock_irqsave(hba->host->host_lock, flags);
4408
4409 /* Clear completed tasks from outstanding_tasks */
4410 __clear_bit(index, &hba->outstanding_tasks);
4411
4412 task_req_descp = hba->utmrdl_base_addr;
4413 ocs_value = ufshcd_get_tmr_ocs(&task_req_descp[index]);
4414
4415 if (ocs_value == OCS_SUCCESS) {
4416 task_rsp_upiup = (struct utp_upiu_task_rsp *)
4417 task_req_descp[index].task_rsp_upiu;
Kiwoong Kim8794ee02016-09-09 08:22:22 +09004418 task_result = be32_to_cpu(task_rsp_upiup->output_param1);
4419 task_result = task_result & MASK_TM_SERVICE_RESP;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304420 if (resp)
4421 *resp = (u8)task_result;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304422 } else {
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304423 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
4424 __func__, ocs_value);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304425 }
4426 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304427
4428 return ocs_value;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304429}
4430
4431/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304432 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
4433 * @lrb: pointer to local reference block of completed command
4434 * @scsi_status: SCSI command status
4435 *
4436 * Returns value base on SCSI command status
4437 */
4438static inline int
4439ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4440{
4441 int result = 0;
4442
4443 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304444 case SAM_STAT_CHECK_CONDITION:
4445 ufshcd_copy_sense_data(lrbp);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304446 case SAM_STAT_GOOD:
4447 result |= DID_OK << 16 |
4448 COMMAND_COMPLETE << 8 |
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304449 scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304450 break;
4451 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304452 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304453 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304454 ufshcd_copy_sense_data(lrbp);
4455 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304456 break;
4457 default:
4458 result |= DID_ERROR << 16;
4459 break;
4460 } /* end of switch */
4461
4462 return result;
4463}
4464
4465/**
4466 * ufshcd_transfer_rsp_status - Get overall status of the response
4467 * @hba: per adapter instance
4468 * @lrb: pointer to local reference block of completed command
4469 *
4470 * Returns result of the command to notify SCSI midlayer
4471 */
4472static inline int
4473ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4474{
4475 int result = 0;
4476 int scsi_status;
4477 int ocs;
4478
4479 /* overall command status of utrd */
4480 ocs = ufshcd_get_tr_ocs(lrbp);
4481
4482 switch (ocs) {
4483 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304484 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004485 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304486 switch (result) {
4487 case UPIU_TRANSACTION_RESPONSE:
4488 /*
4489 * get the response UPIU result to extract
4490 * the SCSI command status
4491 */
4492 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4493
4494 /*
4495 * get the result based on SCSI status response
4496 * to notify the SCSI midlayer of the command status
4497 */
4498 scsi_status = result & MASK_SCSI_STATUS;
4499 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304500
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02004501 /*
4502 * Currently we are only supporting BKOPs exception
4503 * events hence we can ignore BKOPs exception event
4504 * during power management callbacks. BKOPs exception
4505 * event is not expected to be raised in runtime suspend
4506 * callback as it allows the urgent bkops.
4507 * During system suspend, we are anyway forcefully
4508 * disabling the bkops and if urgent bkops is needed
4509 * it will be enabled on system resume. Long term
4510 * solution could be to abort the system suspend if
4511 * UFS device needs urgent BKOPs.
4512 */
4513 if (!hba->pm_op_in_progress &&
4514 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304515 schedule_work(&hba->eeh_work);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304516 break;
4517 case UPIU_TRANSACTION_REJECT_UPIU:
4518 /* TODO: handle Reject UPIU Response */
4519 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304520 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304521 "Reject UPIU not fully implemented\n");
4522 break;
4523 default:
4524 result = DID_ERROR << 16;
4525 dev_err(hba->dev,
4526 "Unexpected request response code = %x\n",
4527 result);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304528 break;
4529 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304530 break;
4531 case OCS_ABORTED:
4532 result |= DID_ABORT << 16;
4533 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304534 case OCS_INVALID_COMMAND_STATUS:
4535 result |= DID_REQUEUE << 16;
4536 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304537 case OCS_INVALID_CMD_TABLE_ATTR:
4538 case OCS_INVALID_PRDT_ATTR:
4539 case OCS_MISMATCH_DATA_BUF_SIZE:
4540 case OCS_MISMATCH_RESP_UPIU_SIZE:
4541 case OCS_PEER_COMM_FAILURE:
4542 case OCS_FATAL_ERROR:
4543 default:
4544 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304545 dev_err(hba->dev,
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004546 "OCS error from controller = %x for tag %d\n",
4547 ocs, lrbp->task_tag);
4548 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08004549 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304550 break;
4551 } /* end of switch */
4552
Dolev Raviv66cc8202016-12-22 18:39:42 -08004553 if (host_byte(result) != DID_OK)
4554 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304555 return result;
4556}
4557
4558/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304559 * ufshcd_uic_cmd_compl - handle completion of uic command
4560 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304561 * @intr_status: interrupt status generated by the controller
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304562 */
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304563static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304564{
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304565 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304566 hba->active_uic_cmd->argument2 |=
4567 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304568 hba->active_uic_cmd->argument3 =
4569 ufshcd_get_dme_attr_val(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304570 complete(&hba->active_uic_cmd->done);
4571 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304572
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004573 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done)
4574 complete(hba->uic_async_done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304575}
4576
4577/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004578 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304579 * @hba: per adapter instance
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004580 * @completed_reqs: requests to complete
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304581 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004582static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4583 unsigned long completed_reqs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304584{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304585 struct ufshcd_lrb *lrbp;
4586 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304587 int result;
4588 int index;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004589
Dolev Ravive9d501b2014-07-01 12:22:37 +03004590 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4591 lrbp = &hba->lrb[index];
4592 cmd = lrbp->cmd;
4593 if (cmd) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004594 ufshcd_add_command_trace(hba, index, "complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004595 result = ufshcd_transfer_rsp_status(hba, lrbp);
4596 scsi_dma_unmap(cmd);
4597 cmd->result = result;
4598 /* Mark completed command as NULL in LRB */
4599 lrbp->cmd = NULL;
4600 clear_bit_unlock(index, &hba->lrb_in_use);
4601 /* Do not touch lrbp after scsi done */
4602 cmd->scsi_done(cmd);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004603 __ufshcd_release(hba);
Joao Pinto300bb132016-05-11 12:21:27 +01004604 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4605 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004606 if (hba->dev_cmd.complete) {
4607 ufshcd_add_command_trace(hba, index,
4608 "dev_complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004609 complete(hba->dev_cmd.complete);
Lee Susman1a07f2d2016-12-22 18:42:03 -08004610 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03004611 }
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08004612 if (ufshcd_is_clkscaling_supported(hba))
4613 hba->clk_scaling.active_reqs--;
Zang Leigang09017182017-09-27 10:06:06 +08004614
4615 lrbp->compl_time_stamp = ktime_get();
Dolev Ravive9d501b2014-07-01 12:22:37 +03004616 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304617
4618 /* clear corresponding bits of completed commands */
4619 hba->outstanding_reqs ^= completed_reqs;
4620
Sahitya Tummala856b3482014-09-25 15:32:34 +03004621 ufshcd_clk_scaling_update_busy(hba);
4622
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304623 /* we might have free'd some tags above */
4624 wake_up(&hba->dev_cmd.tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304625}
4626
4627/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004628 * ufshcd_transfer_req_compl - handle SCSI and query command completion
4629 * @hba: per adapter instance
4630 */
4631static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
4632{
4633 unsigned long completed_reqs;
4634 u32 tr_doorbell;
4635
4636 /* Resetting interrupt aggregation counters first and reading the
4637 * DOOR_BELL afterward allows us to handle all the completed requests.
4638 * In order to prevent other interrupts starvation the DB is read once
4639 * after reset. The down side of this solution is the possibility of
4640 * false interrupt if device completes another request after resetting
4641 * aggregation and before reading the DB.
4642 */
4643 if (ufshcd_is_intr_aggr_allowed(hba))
4644 ufshcd_reset_intr_aggr(hba);
4645
4646 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4647 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4648
4649 __ufshcd_transfer_req_compl(hba, completed_reqs);
4650}
4651
4652/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304653 * ufshcd_disable_ee - disable exception event
4654 * @hba: per-adapter instance
4655 * @mask: exception event to disable
4656 *
4657 * Disables exception event in the device so that the EVENT_ALERT
4658 * bit is not set.
4659 *
4660 * Returns zero on success, non-zero error value on failure.
4661 */
4662static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4663{
4664 int err = 0;
4665 u32 val;
4666
4667 if (!(hba->ee_ctrl_mask & mask))
4668 goto out;
4669
4670 val = hba->ee_ctrl_mask & ~mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004671 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004672 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304673 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4674 if (!err)
4675 hba->ee_ctrl_mask &= ~mask;
4676out:
4677 return err;
4678}
4679
4680/**
4681 * ufshcd_enable_ee - enable exception event
4682 * @hba: per-adapter instance
4683 * @mask: exception event to enable
4684 *
4685 * Enable corresponding exception event in the device to allow
4686 * device to alert host in critical scenarios.
4687 *
4688 * Returns zero on success, non-zero error value on failure.
4689 */
4690static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4691{
4692 int err = 0;
4693 u32 val;
4694
4695 if (hba->ee_ctrl_mask & mask)
4696 goto out;
4697
4698 val = hba->ee_ctrl_mask | mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004699 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004700 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304701 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4702 if (!err)
4703 hba->ee_ctrl_mask |= mask;
4704out:
4705 return err;
4706}
4707
4708/**
4709 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4710 * @hba: per-adapter instance
4711 *
4712 * Allow device to manage background operations on its own. Enabling
4713 * this might lead to inconsistent latencies during normal data transfers
4714 * as the device is allowed to manage its own way of handling background
4715 * operations.
4716 *
4717 * Returns zero on success, non-zero on failure.
4718 */
4719static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4720{
4721 int err = 0;
4722
4723 if (hba->auto_bkops_enabled)
4724 goto out;
4725
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004726 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304727 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4728 if (err) {
4729 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4730 __func__, err);
4731 goto out;
4732 }
4733
4734 hba->auto_bkops_enabled = true;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08004735 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304736
4737 /* No need of URGENT_BKOPS exception from the device */
4738 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4739 if (err)
4740 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
4741 __func__, err);
4742out:
4743 return err;
4744}
4745
4746/**
4747 * ufshcd_disable_auto_bkops - block device in doing background operations
4748 * @hba: per-adapter instance
4749 *
4750 * Disabling background operations improves command response latency but
4751 * has drawback of device moving into critical state where the device is
4752 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
4753 * host is idle so that BKOPS are managed effectively without any negative
4754 * impacts.
4755 *
4756 * Returns zero on success, non-zero on failure.
4757 */
4758static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
4759{
4760 int err = 0;
4761
4762 if (!hba->auto_bkops_enabled)
4763 goto out;
4764
4765 /*
4766 * If host assisted BKOPs is to be enabled, make sure
4767 * urgent bkops exception is allowed.
4768 */
4769 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
4770 if (err) {
4771 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
4772 __func__, err);
4773 goto out;
4774 }
4775
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004776 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304777 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4778 if (err) {
4779 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
4780 __func__, err);
4781 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4782 goto out;
4783 }
4784
4785 hba->auto_bkops_enabled = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08004786 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304787out:
4788 return err;
4789}
4790
4791/**
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004792 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304793 * @hba: per adapter instance
4794 *
4795 * After a device reset the device may toggle the BKOPS_EN flag
4796 * to default value. The s/w tracking variables should be updated
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004797 * as well. This function would change the auto-bkops state based on
4798 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304799 */
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004800static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304801{
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004802 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
4803 hba->auto_bkops_enabled = false;
4804 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
4805 ufshcd_enable_auto_bkops(hba);
4806 } else {
4807 hba->auto_bkops_enabled = true;
4808 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
4809 ufshcd_disable_auto_bkops(hba);
4810 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304811}
4812
4813static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
4814{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004815 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304816 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
4817}
4818
4819/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004820 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
4821 * @hba: per-adapter instance
4822 * @status: bkops_status value
4823 *
4824 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
4825 * flag in the device to permit background operations if the device
4826 * bkops_status is greater than or equal to "status" argument passed to
4827 * this function, disable otherwise.
4828 *
4829 * Returns 0 for success, non-zero in case of failure.
4830 *
4831 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
4832 * to know whether auto bkops is enabled or disabled after this function
4833 * returns control to it.
4834 */
4835static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
4836 enum bkops_status status)
4837{
4838 int err;
4839 u32 curr_status = 0;
4840
4841 err = ufshcd_get_bkops_status(hba, &curr_status);
4842 if (err) {
4843 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
4844 __func__, err);
4845 goto out;
4846 } else if (curr_status > BKOPS_STATUS_MAX) {
4847 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
4848 __func__, curr_status);
4849 err = -EINVAL;
4850 goto out;
4851 }
4852
4853 if (curr_status >= status)
4854 err = ufshcd_enable_auto_bkops(hba);
4855 else
4856 err = ufshcd_disable_auto_bkops(hba);
4857out:
4858 return err;
4859}
4860
4861/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304862 * ufshcd_urgent_bkops - handle urgent bkops exception event
4863 * @hba: per-adapter instance
4864 *
4865 * Enable fBackgroundOpsEn flag in the device to permit background
4866 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004867 *
4868 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
4869 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304870 */
4871static int ufshcd_urgent_bkops(struct ufs_hba *hba)
4872{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02004873 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304874}
4875
4876static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
4877{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004878 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304879 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
4880}
4881
Yaniv Gardiafdfff52016-03-10 17:37:15 +02004882static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
4883{
4884 int err;
4885 u32 curr_status = 0;
4886
4887 if (hba->is_urgent_bkops_lvl_checked)
4888 goto enable_auto_bkops;
4889
4890 err = ufshcd_get_bkops_status(hba, &curr_status);
4891 if (err) {
4892 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
4893 __func__, err);
4894 goto out;
4895 }
4896
4897 /*
4898 * We are seeing that some devices are raising the urgent bkops
4899 * exception events even when BKOPS status doesn't indicate performace
4900 * impacted or critical. Handle these device by determining their urgent
4901 * bkops status at runtime.
4902 */
4903 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
4904 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
4905 __func__, curr_status);
4906 /* update the current status as the urgent bkops level */
4907 hba->urgent_bkops_lvl = curr_status;
4908 hba->is_urgent_bkops_lvl_checked = true;
4909 }
4910
4911enable_auto_bkops:
4912 err = ufshcd_enable_auto_bkops(hba);
4913out:
4914 if (err < 0)
4915 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
4916 __func__, err);
4917}
4918
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304919/**
4920 * ufshcd_exception_event_handler - handle exceptions raised by device
4921 * @work: pointer to work data
4922 *
4923 * Read bExceptionEventStatus attribute from the device and handle the
4924 * exception event accordingly.
4925 */
4926static void ufshcd_exception_event_handler(struct work_struct *work)
4927{
4928 struct ufs_hba *hba;
4929 int err;
4930 u32 status = 0;
4931 hba = container_of(work, struct ufs_hba, eeh_work);
4932
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05304933 pm_runtime_get_sync(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304934 err = ufshcd_get_ee_status(hba, &status);
4935 if (err) {
4936 dev_err(hba->dev, "%s: failed to get exception status %d\n",
4937 __func__, err);
4938 goto out;
4939 }
4940
4941 status &= hba->ee_ctrl_mask;
Yaniv Gardiafdfff52016-03-10 17:37:15 +02004942
4943 if (status & MASK_EE_URGENT_BKOPS)
4944 ufshcd_bkops_exception_event_handler(hba);
4945
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304946out:
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05304947 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304948 return;
4949}
4950
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004951/* Complete requests that have door-bell cleared */
4952static void ufshcd_complete_requests(struct ufs_hba *hba)
4953{
4954 ufshcd_transfer_req_compl(hba);
4955 ufshcd_tmc_handler(hba);
4956}
4957
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304958/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02004959 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
4960 * to recover from the DL NAC errors or not.
4961 * @hba: per-adapter instance
4962 *
4963 * Returns true if error handling is required, false otherwise
4964 */
4965static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
4966{
4967 unsigned long flags;
4968 bool err_handling = true;
4969
4970 spin_lock_irqsave(hba->host->host_lock, flags);
4971 /*
4972 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
4973 * device fatal error and/or DL NAC & REPLAY timeout errors.
4974 */
4975 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
4976 goto out;
4977
4978 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
4979 ((hba->saved_err & UIC_ERROR) &&
4980 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
4981 goto out;
4982
4983 if ((hba->saved_err & UIC_ERROR) &&
4984 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
4985 int err;
4986 /*
4987 * wait for 50ms to see if we can get any other errors or not.
4988 */
4989 spin_unlock_irqrestore(hba->host->host_lock, flags);
4990 msleep(50);
4991 spin_lock_irqsave(hba->host->host_lock, flags);
4992
4993 /*
4994 * now check if we have got any other severe errors other than
4995 * DL NAC error?
4996 */
4997 if ((hba->saved_err & INT_FATAL_ERRORS) ||
4998 ((hba->saved_err & UIC_ERROR) &&
4999 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5000 goto out;
5001
5002 /*
5003 * As DL NAC is the only error received so far, send out NOP
5004 * command to confirm if link is still active or not.
5005 * - If we don't get any response then do error recovery.
5006 * - If we get response then clear the DL NAC error bit.
5007 */
5008
5009 spin_unlock_irqrestore(hba->host->host_lock, flags);
5010 err = ufshcd_verify_dev_init(hba);
5011 spin_lock_irqsave(hba->host->host_lock, flags);
5012
5013 if (err)
5014 goto out;
5015
5016 /* Link seems to be alive hence ignore the DL NAC errors */
5017 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5018 hba->saved_err &= ~UIC_ERROR;
5019 /* clear NAC error */
5020 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5021 if (!hba->saved_uic_err) {
5022 err_handling = false;
5023 goto out;
5024 }
5025 }
5026out:
5027 spin_unlock_irqrestore(hba->host->host_lock, flags);
5028 return err_handling;
5029}
5030
5031/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305032 * ufshcd_err_handler - handle UFS errors that require s/w attention
5033 * @work: pointer to work structure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305034 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305035static void ufshcd_err_handler(struct work_struct *work)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305036{
5037 struct ufs_hba *hba;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305038 unsigned long flags;
5039 u32 err_xfer = 0;
5040 u32 err_tm = 0;
5041 int err = 0;
5042 int tag;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005043 bool needs_reset = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305044
5045 hba = container_of(work, struct ufs_hba, eh_work);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305046
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305047 pm_runtime_get_sync(hba->dev);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005048 ufshcd_hold(hba, false);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305049
5050 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005051 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305052 goto out;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305053
5054 hba->ufshcd_state = UFSHCD_STATE_RESET;
5055 ufshcd_set_eh_in_progress(hba);
5056
5057 /* Complete requests that have door-bell cleared by h/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005058 ufshcd_complete_requests(hba);
Yaniv Gardi583fa622016-03-10 17:37:13 +02005059
5060 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5061 bool ret;
5062
5063 spin_unlock_irqrestore(hba->host->host_lock, flags);
5064 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5065 ret = ufshcd_quirk_dl_nac_errors(hba);
5066 spin_lock_irqsave(hba->host->host_lock, flags);
5067 if (!ret)
5068 goto skip_err_handling;
5069 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005070 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5071 ((hba->saved_err & UIC_ERROR) &&
5072 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5073 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5074 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5075 needs_reset = true;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305076
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005077 /*
5078 * if host reset is required then skip clearing the pending
5079 * transfers forcefully because they will automatically get
5080 * cleared after link startup.
5081 */
5082 if (needs_reset)
5083 goto skip_pending_xfer_clear;
5084
5085 /* release lock as clear command might sleep */
5086 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305087 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005088 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5089 if (ufshcd_clear_cmd(hba, tag)) {
5090 err_xfer = true;
5091 goto lock_skip_pending_xfer_clear;
5092 }
5093 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305094
5095 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005096 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5097 if (ufshcd_clear_tm_cmd(hba, tag)) {
5098 err_tm = true;
5099 goto lock_skip_pending_xfer_clear;
5100 }
5101 }
5102
5103lock_skip_pending_xfer_clear:
5104 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305105
5106 /* Complete the requests that are cleared by s/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005107 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305108
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005109 if (err_xfer || err_tm)
5110 needs_reset = true;
5111
5112skip_pending_xfer_clear:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305113 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005114 if (needs_reset) {
5115 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5116
5117 /*
5118 * ufshcd_reset_and_restore() does the link reinitialization
5119 * which will need atleast one empty doorbell slot to send the
5120 * device management commands (NOP and query commands).
5121 * If there is no slot empty at this moment then free up last
5122 * slot forcefully.
5123 */
5124 if (hba->outstanding_reqs == max_doorbells)
5125 __ufshcd_transfer_req_compl(hba,
5126 (1UL << (hba->nutrs - 1)));
5127
5128 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305129 err = ufshcd_reset_and_restore(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005130 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305131 if (err) {
5132 dev_err(hba->dev, "%s: reset and restore failed\n",
5133 __func__);
5134 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5135 }
5136 /*
5137 * Inform scsi mid-layer that we did reset and allow to handle
5138 * Unit Attention properly.
5139 */
5140 scsi_report_bus_reset(hba->host, 0);
5141 hba->saved_err = 0;
5142 hba->saved_uic_err = 0;
5143 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005144
Yaniv Gardi583fa622016-03-10 17:37:13 +02005145skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005146 if (!needs_reset) {
5147 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5148 if (hba->saved_err || hba->saved_uic_err)
5149 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5150 __func__, hba->saved_err, hba->saved_uic_err);
5151 }
5152
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305153 ufshcd_clear_eh_in_progress(hba);
5154
5155out:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005156 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305157 scsi_unblock_requests(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005158 ufshcd_release(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305159 pm_runtime_put_sync(hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305160}
5161
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005162static void ufshcd_update_uic_reg_hist(struct ufs_uic_err_reg_hist *reg_hist,
5163 u32 reg)
5164{
5165 reg_hist->reg[reg_hist->pos] = reg;
5166 reg_hist->tstamp[reg_hist->pos] = ktime_get();
5167 reg_hist->pos = (reg_hist->pos + 1) % UIC_ERR_REG_HIST_LENGTH;
5168}
5169
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305170/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305171 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5172 * @hba: per-adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305173 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305174static void ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305175{
5176 u32 reg;
5177
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005178 /* PHY layer lane error */
5179 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5180 /* Ignore LINERESET indication, as this is not an error */
5181 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005182 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005183 /*
5184 * To know whether this error is fatal or not, DB timeout
5185 * must be checked but this error is handled separately.
5186 */
5187 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005188 ufshcd_update_uic_reg_hist(&hba->ufs_stats.pa_err, reg);
5189 }
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005190
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305191 /* PA_INIT_ERROR is fatal and needs UIC reset */
5192 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005193 if (reg)
5194 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dl_err, reg);
5195
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305196 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5197 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005198 else if (hba->dev_quirks &
5199 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5200 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5201 hba->uic_error |=
5202 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5203 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5204 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5205 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305206
5207 /* UIC NL/TL/DME errors needs software retry */
5208 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005209 if (reg) {
5210 ufshcd_update_uic_reg_hist(&hba->ufs_stats.nl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305211 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005212 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305213
5214 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005215 if (reg) {
5216 ufshcd_update_uic_reg_hist(&hba->ufs_stats.tl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305217 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005218 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305219
5220 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005221 if (reg) {
5222 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dme_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305223 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005224 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305225
5226 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5227 __func__, hba->uic_error);
5228}
5229
5230/**
5231 * ufshcd_check_errors - Check for errors that need s/w attention
5232 * @hba: per-adapter instance
5233 */
5234static void ufshcd_check_errors(struct ufs_hba *hba)
5235{
5236 bool queue_eh_work = false;
5237
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305238 if (hba->errors & INT_FATAL_ERRORS)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305239 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305240
5241 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305242 hba->uic_error = 0;
5243 ufshcd_update_uic_error(hba);
5244 if (hba->uic_error)
5245 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305246 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305247
5248 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005249 /*
5250 * update the transfer error masks to sticky bits, let's do this
5251 * irrespective of current ufshcd_state.
5252 */
5253 hba->saved_err |= hba->errors;
5254 hba->saved_uic_err |= hba->uic_error;
5255
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305256 /* handle fatal errors only when link is functional */
5257 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5258 /* block commands from scsi mid-layer */
5259 scsi_block_requests(hba->host);
5260
Zang Leigang141f8162016-11-16 11:29:37 +08005261 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
Dolev Raviv66cc8202016-12-22 18:39:42 -08005262
5263 /* dump controller state before resetting */
5264 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5265 bool pr_prdt = !!(hba->saved_err &
5266 SYSTEM_BUS_FATAL_ERROR);
5267
5268 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5269 __func__, hba->saved_err,
5270 hba->saved_uic_err);
5271
5272 ufshcd_print_host_regs(hba);
5273 ufshcd_print_pwr_info(hba);
5274 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5275 ufshcd_print_trs(hba, hba->outstanding_reqs,
5276 pr_prdt);
5277 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305278 schedule_work(&hba->eh_work);
5279 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305280 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305281 /*
5282 * if (!queue_eh_work) -
5283 * Other errors are either non-fatal where host recovers
5284 * itself without s/w intervention or errors that will be
5285 * handled by the SCSI core layer.
5286 */
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305287}
5288
5289/**
5290 * ufshcd_tmc_handler - handle task management function completion
5291 * @hba: per adapter instance
5292 */
5293static void ufshcd_tmc_handler(struct ufs_hba *hba)
5294{
5295 u32 tm_doorbell;
5296
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305297 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305298 hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305299 wake_up(&hba->tm_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305300}
5301
5302/**
5303 * ufshcd_sl_intr - Interrupt service routine
5304 * @hba: per adapter instance
5305 * @intr_status: contains interrupts generated by the controller
5306 */
5307static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
5308{
5309 hba->errors = UFSHCD_ERROR_MASK & intr_status;
5310 if (hba->errors)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305311 ufshcd_check_errors(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305312
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305313 if (intr_status & UFSHCD_UIC_MASK)
5314 ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305315
5316 if (intr_status & UTP_TASK_REQ_COMPL)
5317 ufshcd_tmc_handler(hba);
5318
5319 if (intr_status & UTP_TRANSFER_REQ_COMPL)
5320 ufshcd_transfer_req_compl(hba);
5321}
5322
5323/**
5324 * ufshcd_intr - Main interrupt service routine
5325 * @irq: irq number
5326 * @__hba: pointer to adapter instance
5327 *
5328 * Returns IRQ_HANDLED - If interrupt is valid
5329 * IRQ_NONE - If invalid interrupt
5330 */
5331static irqreturn_t ufshcd_intr(int irq, void *__hba)
5332{
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005333 u32 intr_status, enabled_intr_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305334 irqreturn_t retval = IRQ_NONE;
5335 struct ufs_hba *hba = __hba;
5336
5337 spin_lock(hba->host->host_lock);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305338 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005339 enabled_intr_status =
5340 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305341
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005342 if (intr_status)
Seungwon Jeon261ea452013-06-26 22:39:28 +05305343 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005344
5345 if (enabled_intr_status) {
5346 ufshcd_sl_intr(hba, enabled_intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305347 retval = IRQ_HANDLED;
5348 }
5349 spin_unlock(hba->host->host_lock);
5350 return retval;
5351}
5352
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305353static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5354{
5355 int err = 0;
5356 u32 mask = 1 << tag;
5357 unsigned long flags;
5358
5359 if (!test_bit(tag, &hba->outstanding_tasks))
5360 goto out;
5361
5362 spin_lock_irqsave(hba->host->host_lock, flags);
5363 ufshcd_writel(hba, ~(1 << tag), REG_UTP_TASK_REQ_LIST_CLEAR);
5364 spin_unlock_irqrestore(hba->host->host_lock, flags);
5365
5366 /* poll for max. 1 sec to clear door bell register by h/w */
5367 err = ufshcd_wait_for_register(hba,
5368 REG_UTP_TASK_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02005369 mask, 0, 1000, 1000, true);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305370out:
5371 return err;
5372}
5373
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305374/**
5375 * ufshcd_issue_tm_cmd - issues task management commands to controller
5376 * @hba: per adapter instance
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305377 * @lun_id: LUN ID to which TM command is sent
5378 * @task_id: task ID to which the TM command is applicable
5379 * @tm_function: task management function opcode
5380 * @tm_response: task management service response return value
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305381 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305382 * Returns non-zero value on error, zero on success.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305383 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305384static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5385 u8 tm_function, u8 *tm_response)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305386{
5387 struct utp_task_req_desc *task_req_descp;
5388 struct utp_upiu_task_req *task_req_upiup;
5389 struct Scsi_Host *host;
5390 unsigned long flags;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305391 int free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305392 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305393 int task_tag;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305394
5395 host = hba->host;
5396
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305397 /*
5398 * Get free slot, sleep if slots are unavailable.
5399 * Even though we use wait_event() which sleeps indefinitely,
5400 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5401 */
5402 wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005403 ufshcd_hold(hba, false);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305404
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305405 spin_lock_irqsave(host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305406 task_req_descp = hba->utmrdl_base_addr;
5407 task_req_descp += free_slot;
5408
5409 /* Configure task request descriptor */
5410 task_req_descp->header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5411 task_req_descp->header.dword_2 =
5412 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5413
5414 /* Configure task request UPIU */
5415 task_req_upiup =
5416 (struct utp_upiu_task_req *) task_req_descp->task_req_upiu;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305417 task_tag = hba->nutrs + free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305418 task_req_upiup->header.dword_0 =
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305419 UPIU_HEADER_DWORD(UPIU_TRANSACTION_TASK_REQ, 0,
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305420 lun_id, task_tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305421 task_req_upiup->header.dword_1 =
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305422 UPIU_HEADER_DWORD(0, tm_function, 0, 0);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03005423 /*
5424 * The host shall provide the same value for LUN field in the basic
5425 * header and for Input Parameter.
5426 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305427 task_req_upiup->input_param1 = cpu_to_be32(lun_id);
5428 task_req_upiup->input_param2 = cpu_to_be32(task_id);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305429
Kiwoong Kimd2877be2016-11-10 21:16:15 +09005430 ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5431
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305432 /* send command to the controller */
5433 __set_bit(free_slot, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02005434
5435 /* Make sure descriptors are ready before ringing the task doorbell */
5436 wmb();
5437
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305438 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07005439 /* Make sure that doorbell is committed immediately */
5440 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305441
5442 spin_unlock_irqrestore(host->host_lock, flags);
5443
5444 /* wait until the task management command is completed */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305445 err = wait_event_timeout(hba->tm_wq,
5446 test_bit(free_slot, &hba->tm_condition),
5447 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305448 if (!err) {
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305449 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5450 __func__, tm_function);
5451 if (ufshcd_clear_tm_cmd(hba, free_slot))
5452 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5453 __func__, free_slot);
5454 err = -ETIMEDOUT;
5455 } else {
5456 err = ufshcd_task_req_compl(hba, free_slot, tm_response);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305457 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305458
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305459 clear_bit(free_slot, &hba->tm_condition);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305460 ufshcd_put_tm_slot(hba, free_slot);
5461 wake_up(&hba->tm_tag_wq);
5462
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005463 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305464 return err;
5465}
5466
5467/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305468 * ufshcd_eh_device_reset_handler - device reset handler registered to
5469 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305470 * @cmd: SCSI command pointer
5471 *
5472 * Returns SUCCESS/FAILED
5473 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305474static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305475{
5476 struct Scsi_Host *host;
5477 struct ufs_hba *hba;
5478 unsigned int tag;
5479 u32 pos;
5480 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305481 u8 resp = 0xF;
5482 struct ufshcd_lrb *lrbp;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305483 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305484
5485 host = cmd->device->host;
5486 hba = shost_priv(host);
5487 tag = cmd->request->tag;
5488
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305489 lrbp = &hba->lrb[tag];
5490 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
5491 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305492 if (!err)
5493 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305494 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305495 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305496
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305497 /* clear the commands that were pending for corresponding LUN */
5498 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
5499 if (hba->lrb[pos].lun == lrbp->lun) {
5500 err = ufshcd_clear_cmd(hba, pos);
5501 if (err)
5502 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305503 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305504 }
5505 spin_lock_irqsave(host->host_lock, flags);
5506 ufshcd_transfer_req_compl(hba);
5507 spin_unlock_irqrestore(host->host_lock, flags);
Gilad Broner7fabb772017-02-03 16:56:50 -08005508
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305509out:
Gilad Broner7fabb772017-02-03 16:56:50 -08005510 hba->req_abort_count = 0;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305511 if (!err) {
5512 err = SUCCESS;
5513 } else {
5514 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
5515 err = FAILED;
5516 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305517 return err;
5518}
5519
Gilad Bronere0b299e2017-02-03 16:56:40 -08005520static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
5521{
5522 struct ufshcd_lrb *lrbp;
5523 int tag;
5524
5525 for_each_set_bit(tag, &bitmap, hba->nutrs) {
5526 lrbp = &hba->lrb[tag];
5527 lrbp->req_abort_skip = true;
5528 }
5529}
5530
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305531/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305532 * ufshcd_abort - abort a specific command
5533 * @cmd: SCSI command pointer
5534 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305535 * Abort the pending command in device by sending UFS_ABORT_TASK task management
5536 * command, and in host controller by clearing the door-bell register. There can
5537 * be race between controller sending the command to the device while abort is
5538 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
5539 * really issued and then try to abort it.
5540 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305541 * Returns SUCCESS/FAILED
5542 */
5543static int ufshcd_abort(struct scsi_cmnd *cmd)
5544{
5545 struct Scsi_Host *host;
5546 struct ufs_hba *hba;
5547 unsigned long flags;
5548 unsigned int tag;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305549 int err = 0;
5550 int poll_cnt;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305551 u8 resp = 0xF;
5552 struct ufshcd_lrb *lrbp;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005553 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305554
5555 host = cmd->device->host;
5556 hba = shost_priv(host);
5557 tag = cmd->request->tag;
Dolev Ravive7d38252016-12-22 18:40:07 -08005558 lrbp = &hba->lrb[tag];
Yaniv Gardi14497322016-02-01 15:02:39 +02005559 if (!ufshcd_valid_tag(hba, tag)) {
5560 dev_err(hba->dev,
5561 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
5562 __func__, tag, cmd, cmd->request);
5563 BUG();
5564 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305565
Dolev Ravive7d38252016-12-22 18:40:07 -08005566 /*
5567 * Task abort to the device W-LUN is illegal. When this command
5568 * will fail, due to spec violation, scsi err handling next step
5569 * will be to send LU reset which, again, is a spec violation.
5570 * To avoid these unnecessary/illegal step we skip to the last error
5571 * handling stage: reset and restore.
5572 */
5573 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
5574 return ufshcd_eh_host_reset_handler(cmd);
5575
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005576 ufshcd_hold(hba, false);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005577 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Yaniv Gardi14497322016-02-01 15:02:39 +02005578 /* If command is already aborted/completed, return SUCCESS */
5579 if (!(test_bit(tag, &hba->outstanding_reqs))) {
5580 dev_err(hba->dev,
5581 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
5582 __func__, tag, hba->outstanding_reqs, reg);
5583 goto out;
5584 }
5585
Dolev Ravive9d501b2014-07-01 12:22:37 +03005586 if (!(reg & (1 << tag))) {
5587 dev_err(hba->dev,
5588 "%s: cmd was completed, but without a notifying intr, tag = %d",
5589 __func__, tag);
5590 }
5591
Dolev Raviv66cc8202016-12-22 18:39:42 -08005592 /* Print Transfer Request of aborted task */
5593 dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
Dolev Raviv66cc8202016-12-22 18:39:42 -08005594
Gilad Broner7fabb772017-02-03 16:56:50 -08005595 /*
5596 * Print detailed info about aborted request.
5597 * As more than one request might get aborted at the same time,
5598 * print full information only for the first aborted request in order
5599 * to reduce repeated printouts. For other aborted requests only print
5600 * basic details.
5601 */
5602 scsi_print_command(hba->lrb[tag].cmd);
5603 if (!hba->req_abort_count) {
5604 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08005605 ufshcd_print_host_state(hba);
Gilad Broner7fabb772017-02-03 16:56:50 -08005606 ufshcd_print_pwr_info(hba);
5607 ufshcd_print_trs(hba, 1 << tag, true);
5608 } else {
5609 ufshcd_print_trs(hba, 1 << tag, false);
5610 }
5611 hba->req_abort_count++;
Gilad Bronere0b299e2017-02-03 16:56:40 -08005612
5613 /* Skip task abort in case previous aborts failed and report failure */
5614 if (lrbp->req_abort_skip) {
5615 err = -EIO;
5616 goto out;
5617 }
5618
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305619 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
5620 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
5621 UFS_QUERY_TASK, &resp);
5622 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
5623 /* cmd pending in the device */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005624 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
5625 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305626 break;
5627 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305628 /*
5629 * cmd not pending in the device, check if it is
5630 * in transition.
5631 */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005632 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
5633 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305634 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
5635 if (reg & (1 << tag)) {
5636 /* sleep for max. 200us to stabilize */
5637 usleep_range(100, 200);
5638 continue;
5639 }
5640 /* command completed already */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005641 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
5642 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305643 goto out;
5644 } else {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005645 dev_err(hba->dev,
5646 "%s: no response from device. tag = %d, err %d\n",
5647 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305648 if (!err)
5649 err = resp; /* service response error */
5650 goto out;
5651 }
5652 }
5653
5654 if (!poll_cnt) {
5655 err = -EBUSY;
5656 goto out;
5657 }
5658
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305659 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
5660 UFS_ABORT_TASK, &resp);
5661 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005662 if (!err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305663 err = resp; /* service response error */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005664 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
5665 __func__, tag, err);
5666 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305667 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305668 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305669
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305670 err = ufshcd_clear_cmd(hba, tag);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005671 if (err) {
5672 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
5673 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305674 goto out;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005675 }
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305676
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305677 scsi_dma_unmap(cmd);
5678
5679 spin_lock_irqsave(host->host_lock, flags);
Yaniv Gardia48353f2016-02-01 15:02:40 +02005680 ufshcd_outstanding_req_clear(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305681 hba->lrb[tag].cmd = NULL;
5682 spin_unlock_irqrestore(host->host_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305683
5684 clear_bit_unlock(tag, &hba->lrb_in_use);
5685 wake_up(&hba->dev_cmd.tag_wq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005686
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305687out:
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305688 if (!err) {
5689 err = SUCCESS;
5690 } else {
5691 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Gilad Bronere0b299e2017-02-03 16:56:40 -08005692 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305693 err = FAILED;
5694 }
5695
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005696 /*
5697 * This ufshcd_release() corresponds to the original scsi cmd that got
5698 * aborted here (as we won't get any IRQ for it).
5699 */
5700 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305701 return err;
5702}
5703
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305704/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305705 * ufshcd_host_reset_and_restore - reset and restore host controller
5706 * @hba: per-adapter instance
5707 *
5708 * Note that host controller reset may issue DME_RESET to
5709 * local and remote (device) Uni-Pro stack and the attributes
5710 * are reset to default state.
5711 *
5712 * Returns zero on success, non-zero on failure
5713 */
5714static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
5715{
5716 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305717 unsigned long flags;
5718
5719 /* Reset the host controller */
5720 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02005721 ufshcd_hba_stop(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305722 spin_unlock_irqrestore(hba->host->host_lock, flags);
5723
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08005724 /* scale up clocks to max frequency before full reinitialization */
5725 ufshcd_scale_clks(hba, true);
5726
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305727 err = ufshcd_hba_enable(hba);
5728 if (err)
5729 goto out;
5730
5731 /* Establish the link again and restore the device */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03005732 err = ufshcd_probe_hba(hba);
5733
5734 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305735 err = -EIO;
5736out:
5737 if (err)
5738 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
5739
5740 return err;
5741}
5742
5743/**
5744 * ufshcd_reset_and_restore - reset and re-initialize host/device
5745 * @hba: per-adapter instance
5746 *
5747 * Reset and recover device, host and re-establish link. This
5748 * is helpful to recover the communication in fatal error conditions.
5749 *
5750 * Returns zero on success, non-zero on failure
5751 */
5752static int ufshcd_reset_and_restore(struct ufs_hba *hba)
5753{
5754 int err = 0;
5755 unsigned long flags;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03005756 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305757
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03005758 do {
5759 err = ufshcd_host_reset_and_restore(hba);
5760 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305761
5762 /*
5763 * After reset the door-bell might be cleared, complete
5764 * outstanding requests in s/w here.
5765 */
5766 spin_lock_irqsave(hba->host->host_lock, flags);
5767 ufshcd_transfer_req_compl(hba);
5768 ufshcd_tmc_handler(hba);
5769 spin_unlock_irqrestore(hba->host->host_lock, flags);
5770
5771 return err;
5772}
5773
5774/**
5775 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
5776 * @cmd - SCSI command pointer
5777 *
5778 * Returns SUCCESS/FAILED
5779 */
5780static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
5781{
5782 int err;
5783 unsigned long flags;
5784 struct ufs_hba *hba;
5785
5786 hba = shost_priv(cmd->device->host);
5787
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005788 ufshcd_hold(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305789 /*
5790 * Check if there is any race with fatal error handling.
5791 * If so, wait for it to complete. Even though fatal error
5792 * handling does reset and restore in some cases, don't assume
5793 * anything out of it. We are just avoiding race here.
5794 */
5795 do {
5796 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305797 if (!(work_pending(&hba->eh_work) ||
Zang Leigang8dc0da72017-06-24 19:14:32 +08005798 hba->ufshcd_state == UFSHCD_STATE_RESET ||
5799 hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305800 break;
5801 spin_unlock_irqrestore(hba->host->host_lock, flags);
5802 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305803 flush_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305804 } while (1);
5805
5806 hba->ufshcd_state = UFSHCD_STATE_RESET;
5807 ufshcd_set_eh_in_progress(hba);
5808 spin_unlock_irqrestore(hba->host->host_lock, flags);
5809
5810 err = ufshcd_reset_and_restore(hba);
5811
5812 spin_lock_irqsave(hba->host->host_lock, flags);
5813 if (!err) {
5814 err = SUCCESS;
5815 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5816 } else {
5817 err = FAILED;
5818 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5819 }
5820 ufshcd_clear_eh_in_progress(hba);
5821 spin_unlock_irqrestore(hba->host->host_lock, flags);
5822
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005823 ufshcd_release(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305824 return err;
5825}
5826
5827/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03005828 * ufshcd_get_max_icc_level - calculate the ICC level
5829 * @sup_curr_uA: max. current supported by the regulator
5830 * @start_scan: row at the desc table to start scan from
5831 * @buff: power descriptor buffer
5832 *
5833 * Returns calculated max ICC level for specific regulator
5834 */
5835static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
5836{
5837 int i;
5838 int curr_uA;
5839 u16 data;
5840 u16 unit;
5841
5842 for (i = start_scan; i >= 0; i--) {
Tomas Winklerd79713f2017-01-05 10:45:11 +02005843 data = be16_to_cpup((__be16 *)&buff[2 * i]);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03005844 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
5845 ATTR_ICC_LVL_UNIT_OFFSET;
5846 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
5847 switch (unit) {
5848 case UFSHCD_NANO_AMP:
5849 curr_uA = curr_uA / 1000;
5850 break;
5851 case UFSHCD_MILI_AMP:
5852 curr_uA = curr_uA * 1000;
5853 break;
5854 case UFSHCD_AMP:
5855 curr_uA = curr_uA * 1000 * 1000;
5856 break;
5857 case UFSHCD_MICRO_AMP:
5858 default:
5859 break;
5860 }
5861 if (sup_curr_uA >= curr_uA)
5862 break;
5863 }
5864 if (i < 0) {
5865 i = 0;
5866 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
5867 }
5868
5869 return (u32)i;
5870}
5871
5872/**
5873 * ufshcd_calc_icc_level - calculate the max ICC level
5874 * In case regulators are not initialized we'll return 0
5875 * @hba: per-adapter instance
5876 * @desc_buf: power descriptor buffer to extract ICC levels from.
5877 * @len: length of desc_buff
5878 *
5879 * Returns calculated ICC level
5880 */
5881static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
5882 u8 *desc_buf, int len)
5883{
5884 u32 icc_level = 0;
5885
5886 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
5887 !hba->vreg_info.vccq2) {
5888 dev_err(hba->dev,
5889 "%s: Regulator capability was not set, actvIccLevel=%d",
5890 __func__, icc_level);
5891 goto out;
5892 }
5893
5894 if (hba->vreg_info.vcc)
5895 icc_level = ufshcd_get_max_icc_level(
5896 hba->vreg_info.vcc->max_uA,
5897 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
5898 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
5899
5900 if (hba->vreg_info.vccq)
5901 icc_level = ufshcd_get_max_icc_level(
5902 hba->vreg_info.vccq->max_uA,
5903 icc_level,
5904 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
5905
5906 if (hba->vreg_info.vccq2)
5907 icc_level = ufshcd_get_max_icc_level(
5908 hba->vreg_info.vccq2->max_uA,
5909 icc_level,
5910 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
5911out:
5912 return icc_level;
5913}
5914
5915static void ufshcd_init_icc_levels(struct ufs_hba *hba)
5916{
5917 int ret;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00005918 int buff_len = hba->desc_size.pwr_desc;
5919 u8 desc_buf[hba->desc_size.pwr_desc];
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03005920
5921 ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
5922 if (ret) {
5923 dev_err(hba->dev,
5924 "%s: Failed reading power descriptor.len = %d ret = %d",
5925 __func__, buff_len, ret);
5926 return;
5927 }
5928
5929 hba->init_prefetch_data.icc_level =
5930 ufshcd_find_max_sup_active_icc_level(hba,
5931 desc_buf, buff_len);
5932 dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
5933 __func__, hba->init_prefetch_data.icc_level);
5934
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02005935 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
5936 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
5937 &hba->init_prefetch_data.icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03005938
5939 if (ret)
5940 dev_err(hba->dev,
5941 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
5942 __func__, hba->init_prefetch_data.icc_level , ret);
5943
5944}
5945
5946/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03005947 * ufshcd_scsi_add_wlus - Adds required W-LUs
5948 * @hba: per-adapter instance
5949 *
5950 * UFS device specification requires the UFS devices to support 4 well known
5951 * logical units:
5952 * "REPORT_LUNS" (address: 01h)
5953 * "UFS Device" (address: 50h)
5954 * "RPMB" (address: 44h)
5955 * "BOOT" (address: 30h)
5956 * UFS device's power management needs to be controlled by "POWER CONDITION"
5957 * field of SSU (START STOP UNIT) command. But this "power condition" field
5958 * will take effect only when its sent to "UFS device" well known logical unit
5959 * hence we require the scsi_device instance to represent this logical unit in
5960 * order for the UFS host driver to send the SSU command for power management.
5961
5962 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
5963 * Block) LU so user space process can control this LU. User space may also
5964 * want to have access to BOOT LU.
5965
5966 * This function adds scsi device instances for each of all well known LUs
5967 * (except "REPORT LUNS" LU).
5968 *
5969 * Returns zero on success (all required W-LUs are added successfully),
5970 * non-zero error value on failure (if failed to add any of the required W-LU).
5971 */
5972static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
5973{
5974 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03005975 struct scsi_device *sdev_rpmb;
5976 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03005977
5978 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
5979 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
5980 if (IS_ERR(hba->sdev_ufs_device)) {
5981 ret = PTR_ERR(hba->sdev_ufs_device);
5982 hba->sdev_ufs_device = NULL;
5983 goto out;
5984 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03005985 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03005986
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03005987 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03005988 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03005989 if (IS_ERR(sdev_rpmb)) {
5990 ret = PTR_ERR(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08005991 goto remove_sdev_ufs_device;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03005992 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03005993 scsi_device_put(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08005994
5995 sdev_boot = __scsi_add_device(hba->host, 0, 0,
5996 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
5997 if (IS_ERR(sdev_boot))
5998 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
5999 else
6000 scsi_device_put(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006001 goto out;
6002
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006003remove_sdev_ufs_device:
6004 scsi_remove_device(hba->sdev_ufs_device);
6005out:
6006 return ret;
6007}
6008
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006009static int ufs_get_device_desc(struct ufs_hba *hba,
6010 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006011{
6012 int err;
6013 u8 model_index;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006014 u8 str_desc_buf[QUERY_DESC_MAX_SIZE + 1] = {0};
6015 u8 desc_buf[hba->desc_size.dev_desc];
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006016
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006017 err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006018 if (err) {
6019 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6020 __func__, err);
6021 goto out;
6022 }
6023
6024 /*
6025 * getting vendor (manufacturerID) and Bank Index in big endian
6026 * format
6027 */
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006028 dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006029 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6030
6031 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
6032
6033 err = ufshcd_read_string_desc(hba, model_index, str_desc_buf,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006034 QUERY_DESC_MAX_SIZE, ASCII_STD);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006035 if (err) {
6036 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6037 __func__, err);
6038 goto out;
6039 }
6040
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006041 str_desc_buf[QUERY_DESC_MAX_SIZE] = '\0';
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006042 strlcpy(dev_desc->model, (str_desc_buf + QUERY_DESC_HDR_SIZE),
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006043 min_t(u8, str_desc_buf[QUERY_DESC_LENGTH_OFFSET],
6044 MAX_MODEL_LEN));
6045
6046 /* Null terminate the model string */
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006047 dev_desc->model[MAX_MODEL_LEN] = '\0';
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006048
6049out:
6050 return err;
6051}
6052
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006053static void ufs_fixup_device_setup(struct ufs_hba *hba,
6054 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006055{
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006056 struct ufs_dev_fix *f;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006057
6058 for (f = ufs_fixups; f->quirk; f++) {
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006059 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
6060 f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
6061 (STR_PRFX_EQUAL(f->card.model, dev_desc->model) ||
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006062 !strcmp(f->card.model, UFS_ANY_MODEL)))
6063 hba->dev_quirks |= f->quirk;
6064 }
6065}
6066
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006067/**
Yaniv Gardi37113102016-03-10 17:37:16 +02006068 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6069 * @hba: per-adapter instance
6070 *
6071 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6072 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6073 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6074 * the hibern8 exit latency.
6075 *
6076 * Returns zero on success, non-zero error value on failure.
6077 */
6078static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6079{
6080 int ret = 0;
6081 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6082
6083 ret = ufshcd_dme_peer_get(hba,
6084 UIC_ARG_MIB_SEL(
6085 RX_MIN_ACTIVATETIME_CAPABILITY,
6086 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6087 &peer_rx_min_activatetime);
6088 if (ret)
6089 goto out;
6090
6091 /* make sure proper unit conversion is applied */
6092 tuned_pa_tactivate =
6093 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6094 / PA_TACTIVATE_TIME_UNIT_US);
6095 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6096 tuned_pa_tactivate);
6097
6098out:
6099 return ret;
6100}
6101
6102/**
6103 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6104 * @hba: per-adapter instance
6105 *
6106 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6107 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6108 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6109 * This optimal value can help reduce the hibern8 exit latency.
6110 *
6111 * Returns zero on success, non-zero error value on failure.
6112 */
6113static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6114{
6115 int ret = 0;
6116 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6117 u32 max_hibern8_time, tuned_pa_hibern8time;
6118
6119 ret = ufshcd_dme_get(hba,
6120 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6121 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6122 &local_tx_hibern8_time_cap);
6123 if (ret)
6124 goto out;
6125
6126 ret = ufshcd_dme_peer_get(hba,
6127 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6128 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6129 &peer_rx_hibern8_time_cap);
6130 if (ret)
6131 goto out;
6132
6133 max_hibern8_time = max(local_tx_hibern8_time_cap,
6134 peer_rx_hibern8_time_cap);
6135 /* make sure proper unit conversion is applied */
6136 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6137 / PA_HIBERN8_TIME_UNIT_US);
6138 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6139 tuned_pa_hibern8time);
6140out:
6141 return ret;
6142}
6143
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006144/**
6145 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6146 * less than device PA_TACTIVATE time.
6147 * @hba: per-adapter instance
6148 *
6149 * Some UFS devices require host PA_TACTIVATE to be lower than device
6150 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6151 * for such devices.
6152 *
6153 * Returns zero on success, non-zero error value on failure.
6154 */
6155static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6156{
6157 int ret = 0;
6158 u32 granularity, peer_granularity;
6159 u32 pa_tactivate, peer_pa_tactivate;
6160 u32 pa_tactivate_us, peer_pa_tactivate_us;
6161 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6162
6163 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6164 &granularity);
6165 if (ret)
6166 goto out;
6167
6168 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6169 &peer_granularity);
6170 if (ret)
6171 goto out;
6172
6173 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6174 (granularity > PA_GRANULARITY_MAX_VAL)) {
6175 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6176 __func__, granularity);
6177 return -EINVAL;
6178 }
6179
6180 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6181 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6182 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6183 __func__, peer_granularity);
6184 return -EINVAL;
6185 }
6186
6187 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6188 if (ret)
6189 goto out;
6190
6191 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6192 &peer_pa_tactivate);
6193 if (ret)
6194 goto out;
6195
6196 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6197 peer_pa_tactivate_us = peer_pa_tactivate *
6198 gran_to_us_table[peer_granularity - 1];
6199
6200 if (pa_tactivate_us > peer_pa_tactivate_us) {
6201 u32 new_peer_pa_tactivate;
6202
6203 new_peer_pa_tactivate = pa_tactivate_us /
6204 gran_to_us_table[peer_granularity - 1];
6205 new_peer_pa_tactivate++;
6206 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6207 new_peer_pa_tactivate);
6208 }
6209
6210out:
6211 return ret;
6212}
6213
Yaniv Gardi37113102016-03-10 17:37:16 +02006214static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6215{
6216 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6217 ufshcd_tune_pa_tactivate(hba);
6218 ufshcd_tune_pa_hibern8time(hba);
6219 }
6220
6221 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6222 /* set 1ms timeout for PA_TACTIVATE */
6223 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006224
6225 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6226 ufshcd_quirk_tune_host_pa_tactivate(hba);
Subhash Jadavani56d4a182016-12-05 19:25:32 -08006227
6228 ufshcd_vops_apply_dev_quirks(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02006229}
6230
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006231static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6232{
6233 int err_reg_hist_size = sizeof(struct ufs_uic_err_reg_hist);
6234
6235 hba->ufs_stats.hibern8_exit_cnt = 0;
6236 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
6237
6238 memset(&hba->ufs_stats.pa_err, 0, err_reg_hist_size);
6239 memset(&hba->ufs_stats.dl_err, 0, err_reg_hist_size);
6240 memset(&hba->ufs_stats.nl_err, 0, err_reg_hist_size);
6241 memset(&hba->ufs_stats.tl_err, 0, err_reg_hist_size);
6242 memset(&hba->ufs_stats.dme_err, 0, err_reg_hist_size);
Gilad Broner7fabb772017-02-03 16:56:50 -08006243
6244 hba->req_abort_count = 0;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006245}
6246
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006247static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6248{
6249 int err;
6250
6251 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6252 &hba->desc_size.dev_desc);
6253 if (err)
6254 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6255
6256 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6257 &hba->desc_size.pwr_desc);
6258 if (err)
6259 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6260
6261 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6262 &hba->desc_size.interc_desc);
6263 if (err)
6264 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6265
6266 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6267 &hba->desc_size.conf_desc);
6268 if (err)
6269 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6270
6271 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6272 &hba->desc_size.unit_desc);
6273 if (err)
6274 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6275
6276 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6277 &hba->desc_size.geom_desc);
6278 if (err)
6279 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
6280}
6281
6282static void ufshcd_def_desc_sizes(struct ufs_hba *hba)
6283{
6284 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6285 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6286 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6287 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6288 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6289 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
6290}
6291
Yaniv Gardi37113102016-03-10 17:37:16 +02006292/**
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006293 * ufshcd_probe_hba - probe hba to detect device and initialize
6294 * @hba: per-adapter instance
6295 *
6296 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306297 */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006298static int ufshcd_probe_hba(struct ufs_hba *hba)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306299{
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006300 struct ufs_dev_desc card = {0};
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306301 int ret;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006302 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306303
6304 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306305 if (ret)
6306 goto out;
6307
Yaniv Gardiafdfff52016-03-10 17:37:15 +02006308 /* set the default level for urgent bkops */
6309 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6310 hba->is_urgent_bkops_lvl_checked = false;
6311
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006312 /* Debug counters initialization */
6313 ufshcd_clear_dbg_ufs_stats(hba);
6314
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006315 /* UniPro link is active now */
6316 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05306317
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306318 ret = ufshcd_verify_dev_init(hba);
6319 if (ret)
6320 goto out;
6321
Dolev Raviv68078d52013-07-30 00:35:58 +05306322 ret = ufshcd_complete_dev_init(hba);
6323 if (ret)
6324 goto out;
6325
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006326 /* Init check for device descriptor sizes */
6327 ufshcd_init_desc_sizes(hba);
6328
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006329 ret = ufs_get_device_desc(hba, &card);
6330 if (ret) {
6331 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6332 __func__, ret);
6333 goto out;
6334 }
6335
6336 ufs_fixup_device_setup(hba, &card);
Yaniv Gardi37113102016-03-10 17:37:16 +02006337 ufshcd_tune_unipro_params(hba);
Yaniv Gardi60f01872016-03-10 17:37:11 +02006338
6339 ret = ufshcd_set_vccq_rail_unused(hba,
6340 (hba->dev_quirks & UFS_DEVICE_NO_VCCQ) ? true : false);
6341 if (ret)
6342 goto out;
6343
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006344 /* UFS device is also active now */
6345 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306346 ufshcd_force_reset_auto_bkops(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006347 hba->wlun_dev_clr_ua = true;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306348
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006349 if (ufshcd_get_max_pwr_mode(hba)) {
6350 dev_err(hba->dev,
6351 "%s: Failed getting max supported power mode\n",
6352 __func__);
6353 } else {
6354 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Dov Levenglick8643ae62016-10-17 17:10:14 -07006355 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006356 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6357 __func__, ret);
Dov Levenglick8643ae62016-10-17 17:10:14 -07006358 goto out;
6359 }
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006360 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006361
Yaniv Gardi53c12d02016-02-01 15:02:45 +02006362 /* set the state as operational after switching to desired gear */
6363 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006364
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006365 /*
6366 * If we are in error handling context or in power management callbacks
6367 * context, no need to scan the host
6368 */
6369 if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6370 bool flag;
6371
6372 /* clear any previous UFS device information */
6373 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02006374 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
6375 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006376 hba->dev_info.f_power_on_wp_en = flag;
6377
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006378 if (!hba->is_init_prefetch)
6379 ufshcd_init_icc_levels(hba);
6380
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006381 /* Add required well known logical units to scsi mid layer */
6382 if (ufshcd_scsi_add_wlus(hba))
6383 goto out;
6384
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08006385 /* Initialize devfreq after UFS device is detected */
6386 if (ufshcd_is_clkscaling_supported(hba)) {
6387 memcpy(&hba->clk_scaling.saved_pwr_info.info,
6388 &hba->pwr_info,
6389 sizeof(struct ufs_pa_layer_attr));
6390 hba->clk_scaling.saved_pwr_info.is_valid = true;
6391 if (!hba->devfreq) {
6392 hba->devfreq = devm_devfreq_add_device(hba->dev,
6393 &ufs_devfreq_profile,
6394 "simple_ondemand",
6395 NULL);
6396 if (IS_ERR(hba->devfreq)) {
6397 ret = PTR_ERR(hba->devfreq);
6398 dev_err(hba->dev, "Unable to register with devfreq %d\n",
6399 ret);
6400 goto out;
6401 }
6402 }
6403 hba->clk_scaling.is_allowed = true;
6404 }
6405
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306406 scsi_scan_host(hba->host);
6407 pm_runtime_put_sync(hba->dev);
6408 }
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006409
6410 if (!hba->is_init_prefetch)
6411 hba->is_init_prefetch = true;
6412
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306413out:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006414 /*
6415 * If we failed to initialize the device or the device is not
6416 * present, turn off the power/clocks etc.
6417 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006418 if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6419 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006420 ufshcd_hba_exit(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006421 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006422
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006423 trace_ufshcd_init(dev_name(hba->dev), ret,
6424 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08006425 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006426 return ret;
6427}
6428
6429/**
6430 * ufshcd_async_scan - asynchronous execution for probing hba
6431 * @data: data pointer to pass to this function
6432 * @cookie: cookie data
6433 */
6434static void ufshcd_async_scan(void *data, async_cookie_t cookie)
6435{
6436 struct ufs_hba *hba = (struct ufs_hba *)data;
6437
6438 ufshcd_probe_hba(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306439}
6440
Yaniv Gardif550c652016-03-10 17:37:07 +02006441static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
6442{
6443 unsigned long flags;
6444 struct Scsi_Host *host;
6445 struct ufs_hba *hba;
6446 int index;
6447 bool found = false;
6448
6449 if (!scmd || !scmd->device || !scmd->device->host)
6450 return BLK_EH_NOT_HANDLED;
6451
6452 host = scmd->device->host;
6453 hba = shost_priv(host);
6454 if (!hba)
6455 return BLK_EH_NOT_HANDLED;
6456
6457 spin_lock_irqsave(host->host_lock, flags);
6458
6459 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
6460 if (hba->lrb[index].cmd == scmd) {
6461 found = true;
6462 break;
6463 }
6464 }
6465
6466 spin_unlock_irqrestore(host->host_lock, flags);
6467
6468 /*
6469 * Bypass SCSI error handling and reset the block layer timer if this
6470 * SCSI command was not actually dispatched to UFS driver, otherwise
6471 * let SCSI layer handle the error as usual.
6472 */
6473 return found ? BLK_EH_NOT_HANDLED : BLK_EH_RESET_TIMER;
6474}
6475
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306476static struct scsi_host_template ufshcd_driver_template = {
6477 .module = THIS_MODULE,
6478 .name = UFSHCD,
6479 .proc_name = UFSHCD,
6480 .queuecommand = ufshcd_queuecommand,
6481 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09006482 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306483 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03006484 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306485 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306486 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
6487 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Yaniv Gardif550c652016-03-10 17:37:07 +02006488 .eh_timed_out = ufshcd_eh_timed_out,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306489 .this_id = -1,
6490 .sg_tablesize = SG_ALL,
6491 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
6492 .can_queue = UFSHCD_CAN_QUEUE,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006493 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01006494 .track_queue_depth = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306495};
6496
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006497static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
6498 int ua)
6499{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08006500 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006501
Bjorn Andersson7b16a072015-02-11 19:35:28 -08006502 if (!vreg)
6503 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006504
Bjorn Andersson7b16a072015-02-11 19:35:28 -08006505 ret = regulator_set_load(vreg->reg, ua);
6506 if (ret < 0) {
6507 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
6508 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006509 }
6510
6511 return ret;
6512}
6513
6514static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
6515 struct ufs_vreg *vreg)
6516{
Yaniv Gardi60f01872016-03-10 17:37:11 +02006517 if (!vreg)
6518 return 0;
6519 else if (vreg->unused)
6520 return 0;
6521 else
6522 return ufshcd_config_vreg_load(hba->dev, vreg,
6523 UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006524}
6525
6526static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
6527 struct ufs_vreg *vreg)
6528{
Yaniv Gardi60f01872016-03-10 17:37:11 +02006529 if (!vreg)
6530 return 0;
6531 else if (vreg->unused)
6532 return 0;
6533 else
6534 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006535}
6536
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006537static int ufshcd_config_vreg(struct device *dev,
6538 struct ufs_vreg *vreg, bool on)
6539{
6540 int ret = 0;
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06006541 struct regulator *reg;
6542 const char *name;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006543 int min_uV, uA_load;
6544
6545 BUG_ON(!vreg);
6546
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06006547 reg = vreg->reg;
6548 name = vreg->name;
6549
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006550 if (regulator_count_voltages(reg) > 0) {
6551 min_uV = on ? vreg->min_uV : 0;
6552 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
6553 if (ret) {
6554 dev_err(dev, "%s: %s set voltage failed, err=%d\n",
6555 __func__, name, ret);
6556 goto out;
6557 }
6558
6559 uA_load = on ? vreg->max_uA : 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006560 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
6561 if (ret)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006562 goto out;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006563 }
6564out:
6565 return ret;
6566}
6567
6568static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
6569{
6570 int ret = 0;
6571
Yaniv Gardi60f01872016-03-10 17:37:11 +02006572 if (!vreg)
6573 goto out;
6574 else if (vreg->enabled || vreg->unused)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006575 goto out;
6576
6577 ret = ufshcd_config_vreg(dev, vreg, true);
6578 if (!ret)
6579 ret = regulator_enable(vreg->reg);
6580
6581 if (!ret)
6582 vreg->enabled = true;
6583 else
6584 dev_err(dev, "%s: %s enable failed, err=%d\n",
6585 __func__, vreg->name, ret);
6586out:
6587 return ret;
6588}
6589
6590static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
6591{
6592 int ret = 0;
6593
Yaniv Gardi60f01872016-03-10 17:37:11 +02006594 if (!vreg)
6595 goto out;
6596 else if (!vreg->enabled || vreg->unused)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006597 goto out;
6598
6599 ret = regulator_disable(vreg->reg);
6600
6601 if (!ret) {
6602 /* ignore errors on applying disable config */
6603 ufshcd_config_vreg(dev, vreg, false);
6604 vreg->enabled = false;
6605 } else {
6606 dev_err(dev, "%s: %s disable failed, err=%d\n",
6607 __func__, vreg->name, ret);
6608 }
6609out:
6610 return ret;
6611}
6612
6613static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
6614{
6615 int ret = 0;
6616 struct device *dev = hba->dev;
6617 struct ufs_vreg_info *info = &hba->vreg_info;
6618
6619 if (!info)
6620 goto out;
6621
6622 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
6623 if (ret)
6624 goto out;
6625
6626 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
6627 if (ret)
6628 goto out;
6629
6630 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
6631 if (ret)
6632 goto out;
6633
6634out:
6635 if (ret) {
6636 ufshcd_toggle_vreg(dev, info->vccq2, false);
6637 ufshcd_toggle_vreg(dev, info->vccq, false);
6638 ufshcd_toggle_vreg(dev, info->vcc, false);
6639 }
6640 return ret;
6641}
6642
Raviv Shvili6a771a62014-09-25 15:32:24 +03006643static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
6644{
6645 struct ufs_vreg_info *info = &hba->vreg_info;
6646
6647 if (info)
6648 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
6649
6650 return 0;
6651}
6652
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006653static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
6654{
6655 int ret = 0;
6656
6657 if (!vreg)
6658 goto out;
6659
6660 vreg->reg = devm_regulator_get(dev, vreg->name);
6661 if (IS_ERR(vreg->reg)) {
6662 ret = PTR_ERR(vreg->reg);
6663 dev_err(dev, "%s: %s get failed, err=%d\n",
6664 __func__, vreg->name, ret);
6665 }
6666out:
6667 return ret;
6668}
6669
6670static int ufshcd_init_vreg(struct ufs_hba *hba)
6671{
6672 int ret = 0;
6673 struct device *dev = hba->dev;
6674 struct ufs_vreg_info *info = &hba->vreg_info;
6675
6676 if (!info)
6677 goto out;
6678
6679 ret = ufshcd_get_vreg(dev, info->vcc);
6680 if (ret)
6681 goto out;
6682
6683 ret = ufshcd_get_vreg(dev, info->vccq);
6684 if (ret)
6685 goto out;
6686
6687 ret = ufshcd_get_vreg(dev, info->vccq2);
6688out:
6689 return ret;
6690}
6691
Raviv Shvili6a771a62014-09-25 15:32:24 +03006692static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
6693{
6694 struct ufs_vreg_info *info = &hba->vreg_info;
6695
6696 if (info)
6697 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
6698
6699 return 0;
6700}
6701
Yaniv Gardi60f01872016-03-10 17:37:11 +02006702static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused)
6703{
6704 int ret = 0;
6705 struct ufs_vreg_info *info = &hba->vreg_info;
6706
6707 if (!info)
6708 goto out;
6709 else if (!info->vccq)
6710 goto out;
6711
6712 if (unused) {
6713 /* shut off the rail here */
6714 ret = ufshcd_toggle_vreg(hba->dev, info->vccq, false);
6715 /*
6716 * Mark this rail as no longer used, so it doesn't get enabled
6717 * later by mistake
6718 */
6719 if (!ret)
6720 info->vccq->unused = true;
6721 } else {
6722 /*
6723 * rail should have been already enabled hence just make sure
6724 * that unused flag is cleared.
6725 */
6726 info->vccq->unused = false;
6727 }
6728out:
6729 return ret;
6730}
6731
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006732static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
6733 bool skip_ref_clk)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006734{
6735 int ret = 0;
6736 struct ufs_clk_info *clki;
6737 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006738 unsigned long flags;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08006739 ktime_t start = ktime_get();
6740 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006741
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03006742 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006743 goto out;
6744
Subhash Jadavani1e879e82016-10-06 21:48:22 -07006745 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
6746 if (ret)
6747 return ret;
6748
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006749 list_for_each_entry(clki, head, list) {
6750 if (!IS_ERR_OR_NULL(clki->clk)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006751 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
6752 continue;
6753
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08006754 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006755 if (on && !clki->enabled) {
6756 ret = clk_prepare_enable(clki->clk);
6757 if (ret) {
6758 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
6759 __func__, clki->name, ret);
6760 goto out;
6761 }
6762 } else if (!on && clki->enabled) {
6763 clk_disable_unprepare(clki->clk);
6764 }
6765 clki->enabled = on;
6766 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
6767 clki->name, on ? "en" : "dis");
6768 }
6769 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006770
Subhash Jadavani1e879e82016-10-06 21:48:22 -07006771 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
6772 if (ret)
6773 return ret;
6774
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006775out:
6776 if (ret) {
6777 list_for_each_entry(clki, head, list) {
6778 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
6779 clk_disable_unprepare(clki->clk);
6780 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006781 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006782 spin_lock_irqsave(hba->host->host_lock, flags);
6783 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006784 trace_ufshcd_clk_gating(dev_name(hba->dev),
6785 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006786 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006787 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006788
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08006789 if (clk_state_changed)
6790 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
6791 (on ? "on" : "off"),
6792 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006793 return ret;
6794}
6795
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006796static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
6797{
6798 return __ufshcd_setup_clocks(hba, on, false);
6799}
6800
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006801static int ufshcd_init_clocks(struct ufs_hba *hba)
6802{
6803 int ret = 0;
6804 struct ufs_clk_info *clki;
6805 struct device *dev = hba->dev;
6806 struct list_head *head = &hba->clk_list_head;
6807
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03006808 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006809 goto out;
6810
6811 list_for_each_entry(clki, head, list) {
6812 if (!clki->name)
6813 continue;
6814
6815 clki->clk = devm_clk_get(dev, clki->name);
6816 if (IS_ERR(clki->clk)) {
6817 ret = PTR_ERR(clki->clk);
6818 dev_err(dev, "%s: %s clk get failed, %d\n",
6819 __func__, clki->name, ret);
6820 goto out;
6821 }
6822
6823 if (clki->max_freq) {
6824 ret = clk_set_rate(clki->clk, clki->max_freq);
6825 if (ret) {
6826 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
6827 __func__, clki->name,
6828 clki->max_freq, ret);
6829 goto out;
6830 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03006831 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006832 }
6833 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
6834 clki->name, clk_get_rate(clki->clk));
6835 }
6836out:
6837 return ret;
6838}
6839
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03006840static int ufshcd_variant_hba_init(struct ufs_hba *hba)
6841{
6842 int err = 0;
6843
6844 if (!hba->vops)
6845 goto out;
6846
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02006847 err = ufshcd_vops_init(hba);
6848 if (err)
6849 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03006850
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02006851 err = ufshcd_vops_setup_regulators(hba, true);
6852 if (err)
6853 goto out_exit;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03006854
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03006855 goto out;
6856
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03006857out_exit:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02006858 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03006859out:
6860 if (err)
6861 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02006862 __func__, ufshcd_get_var_name(hba), err);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03006863 return err;
6864}
6865
6866static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
6867{
6868 if (!hba->vops)
6869 return;
6870
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02006871 ufshcd_vops_setup_regulators(hba, false);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03006872
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02006873 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03006874}
6875
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006876static int ufshcd_hba_init(struct ufs_hba *hba)
6877{
6878 int err;
6879
Raviv Shvili6a771a62014-09-25 15:32:24 +03006880 /*
6881 * Handle host controller power separately from the UFS device power
6882 * rails as it will help controlling the UFS host controller power
6883 * collapse easily which is different than UFS device power collapse.
6884 * Also, enable the host controller power before we go ahead with rest
6885 * of the initialization here.
6886 */
6887 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006888 if (err)
6889 goto out;
6890
Raviv Shvili6a771a62014-09-25 15:32:24 +03006891 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006892 if (err)
6893 goto out;
6894
Raviv Shvili6a771a62014-09-25 15:32:24 +03006895 err = ufshcd_init_clocks(hba);
6896 if (err)
6897 goto out_disable_hba_vreg;
6898
6899 err = ufshcd_setup_clocks(hba, true);
6900 if (err)
6901 goto out_disable_hba_vreg;
6902
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006903 err = ufshcd_init_vreg(hba);
6904 if (err)
6905 goto out_disable_clks;
6906
6907 err = ufshcd_setup_vreg(hba, true);
6908 if (err)
6909 goto out_disable_clks;
6910
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006911 err = ufshcd_variant_hba_init(hba);
6912 if (err)
6913 goto out_disable_vreg;
6914
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006915 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006916 goto out;
6917
6918out_disable_vreg:
6919 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03006920out_disable_clks:
6921 ufshcd_setup_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03006922out_disable_hba_vreg:
6923 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006924out:
6925 return err;
6926}
6927
6928static void ufshcd_hba_exit(struct ufs_hba *hba)
6929{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006930 if (hba->is_powered) {
6931 ufshcd_variant_hba_exit(hba);
6932 ufshcd_setup_vreg(hba, false);
Gilad Bronera5082532016-10-17 17:10:00 -07006933 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08006934 if (ufshcd_is_clkscaling_supported(hba)) {
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08006935 if (hba->devfreq)
6936 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08006937 destroy_workqueue(hba->clk_scaling.workq);
6938 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006939 ufshcd_setup_clocks(hba, false);
6940 ufshcd_setup_hba_vreg(hba, false);
6941 hba->is_powered = false;
6942 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03006943}
6944
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006945static int
6946ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306947{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006948 unsigned char cmd[6] = {REQUEST_SENSE,
6949 0,
6950 0,
6951 0,
Gilad Bronerdcea0bf2016-10-17 17:09:48 -07006952 UFSHCD_REQ_SENSE_SIZE,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006953 0};
6954 char *buffer;
6955 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306956
Gilad Bronerdcea0bf2016-10-17 17:09:48 -07006957 buffer = kzalloc(UFSHCD_REQ_SENSE_SIZE, GFP_KERNEL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006958 if (!buffer) {
6959 ret = -ENOMEM;
6960 goto out;
6961 }
6962
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01006963 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
6964 UFSHCD_REQ_SENSE_SIZE, NULL, NULL,
6965 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006966 if (ret)
6967 pr_err("%s: failed with err %d\n", __func__, ret);
6968
6969 kfree(buffer);
6970out:
6971 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306972}
6973
6974/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006975 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
6976 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05306977 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006978 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306979 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006980 * Returns 0 if requested power mode is set successfully
6981 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306982 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006983static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
6984 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306985{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006986 unsigned char cmd[6] = { START_STOP };
6987 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006988 struct scsi_device *sdp;
6989 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006990 int ret;
6991
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006992 spin_lock_irqsave(hba->host->host_lock, flags);
6993 sdp = hba->sdev_ufs_device;
6994 if (sdp) {
6995 ret = scsi_device_get(sdp);
6996 if (!ret && !scsi_device_online(sdp)) {
6997 ret = -ENODEV;
6998 scsi_device_put(sdp);
6999 }
7000 } else {
7001 ret = -ENODEV;
7002 }
7003 spin_unlock_irqrestore(hba->host->host_lock, flags);
7004
7005 if (ret)
7006 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007007
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307008 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007009 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7010 * handling, which would wait for host to be resumed. Since we know
7011 * we are functional while we are here, skip host resume in error
7012 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307013 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007014 hba->host->eh_noresume = 1;
7015 if (hba->wlun_dev_clr_ua) {
7016 ret = ufshcd_send_request_sense(hba, sdp);
7017 if (ret)
7018 goto out;
7019 /* Unit attention condition is cleared now */
7020 hba->wlun_dev_clr_ua = false;
7021 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307022
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007023 cmd[4] = pwr_mode << 4;
7024
7025 /*
7026 * Current function would be generally called from the power management
Christoph Hellwige8064022016-10-20 15:12:13 +02007027 * callbacks hence set the RQF_PM flag so that it doesn't resume the
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007028 * already suspended childs.
7029 */
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007030 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7031 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007032 if (ret) {
7033 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02007034 "START_STOP failed for power mode: %d, result %x\n",
7035 pwr_mode, ret);
Hannes Reinecke21045512015-01-08 07:43:46 +01007036 if (driver_byte(ret) & DRIVER_SENSE)
7037 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007038 }
7039
7040 if (!ret)
7041 hba->curr_dev_pwr_mode = pwr_mode;
7042out:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007043 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007044 hba->host->eh_noresume = 0;
7045 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307046}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307047
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007048static int ufshcd_link_state_transition(struct ufs_hba *hba,
7049 enum uic_link_state req_link_state,
7050 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307051{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007052 int ret = 0;
7053
7054 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307055 return 0;
7056
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007057 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7058 ret = ufshcd_uic_hibern8_enter(hba);
7059 if (!ret)
7060 ufshcd_set_link_hibern8(hba);
7061 else
7062 goto out;
7063 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307064 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007065 * If autobkops is enabled, link can't be turned off because
7066 * turning off the link would also turn off the device.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307067 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007068 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
7069 (!check_for_bkops || (check_for_bkops &&
7070 !hba->auto_bkops_enabled))) {
7071 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02007072 * Let's make sure that link is in low power mode, we are doing
7073 * this currently by putting the link in Hibern8. Otherway to
7074 * put the link in low power mode is to send the DME end point
7075 * to device and then send the DME reset command to local
7076 * unipro. But putting the link in hibern8 is much faster.
7077 */
7078 ret = ufshcd_uic_hibern8_enter(hba);
7079 if (ret)
7080 goto out;
7081 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007082 * Change controller state to "reset state" which
7083 * should also put the link in off/reset state
7084 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02007085 ufshcd_hba_stop(hba, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007086 /*
7087 * TODO: Check if we need any delay to make sure that
7088 * controller is reset
7089 */
7090 ufshcd_set_link_off(hba);
7091 }
7092
7093out:
7094 return ret;
7095}
7096
7097static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7098{
7099 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02007100 * It seems some UFS devices may keep drawing more than sleep current
7101 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7102 * To avoid this situation, add 2ms delay before putting these UFS
7103 * rails in LPM mode.
7104 */
7105 if (!ufshcd_is_link_active(hba) &&
7106 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7107 usleep_range(2000, 2100);
7108
7109 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007110 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7111 * power.
7112 *
7113 * If UFS device and link is in OFF state, all power supplies (VCC,
7114 * VCCQ, VCCQ2) can be turned off if power on write protect is not
7115 * required. If UFS link is inactive (Hibern8 or OFF state) and device
7116 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7117 *
7118 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7119 * in low power state which would save some power.
7120 */
7121 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7122 !hba->dev_info.is_lu_power_on_wp) {
7123 ufshcd_setup_vreg(hba, false);
7124 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7125 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7126 if (!ufshcd_is_link_active(hba)) {
7127 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7128 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7129 }
7130 }
7131}
7132
7133static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7134{
7135 int ret = 0;
7136
7137 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7138 !hba->dev_info.is_lu_power_on_wp) {
7139 ret = ufshcd_setup_vreg(hba, true);
7140 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007141 if (!ret && !ufshcd_is_link_active(hba)) {
7142 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7143 if (ret)
7144 goto vcc_disable;
7145 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7146 if (ret)
7147 goto vccq_lpm;
7148 }
Subhash Jadavani69d72ac2016-10-27 17:26:24 -07007149 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007150 }
7151 goto out;
7152
7153vccq_lpm:
7154 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7155vcc_disable:
7156 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7157out:
7158 return ret;
7159}
7160
7161static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7162{
7163 if (ufshcd_is_link_off(hba))
7164 ufshcd_setup_hba_vreg(hba, false);
7165}
7166
7167static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7168{
7169 if (ufshcd_is_link_off(hba))
7170 ufshcd_setup_hba_vreg(hba, true);
7171}
7172
7173/**
7174 * ufshcd_suspend - helper function for suspend operations
7175 * @hba: per adapter instance
7176 * @pm_op: desired low power operation type
7177 *
7178 * This function will try to put the UFS device and link into low power
7179 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7180 * (System PM level).
7181 *
7182 * If this function is called during shutdown, it will make sure that
7183 * both UFS device and UFS link is powered off.
7184 *
7185 * NOTE: UFS device & link must be active before we enter in this function.
7186 *
7187 * Returns 0 for success and non-zero for failure
7188 */
7189static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7190{
7191 int ret = 0;
7192 enum ufs_pm_level pm_lvl;
7193 enum ufs_dev_pwr_mode req_dev_pwr_mode;
7194 enum uic_link_state req_link_state;
7195
7196 hba->pm_op_in_progress = 1;
7197 if (!ufshcd_is_shutdown_pm(pm_op)) {
7198 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7199 hba->rpm_lvl : hba->spm_lvl;
7200 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7201 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7202 } else {
7203 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7204 req_link_state = UIC_LINK_OFF_STATE;
7205 }
7206
7207 /*
7208 * If we can't transition into any of the low power modes
7209 * just gate the clocks.
7210 */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007211 ufshcd_hold(hba, false);
7212 hba->clk_gating.is_suspended = true;
7213
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007214 if (hba->clk_scaling.is_allowed) {
7215 cancel_work_sync(&hba->clk_scaling.suspend_work);
7216 cancel_work_sync(&hba->clk_scaling.resume_work);
7217 ufshcd_suspend_clkscaling(hba);
7218 }
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007219
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007220 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7221 req_link_state == UIC_LINK_ACTIVE_STATE) {
7222 goto disable_clks;
7223 }
7224
7225 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7226 (req_link_state == hba->uic_link_state))
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007227 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007228
7229 /* UFS device & link must be active before we enter in this function */
7230 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7231 ret = -EINVAL;
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007232 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007233 }
7234
7235 if (ufshcd_is_runtime_pm(pm_op)) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03007236 if (ufshcd_can_autobkops_during_suspend(hba)) {
7237 /*
7238 * The device is idle with no requests in the queue,
7239 * allow background operations if bkops status shows
7240 * that performance might be impacted.
7241 */
7242 ret = ufshcd_urgent_bkops(hba);
7243 if (ret)
7244 goto enable_gating;
7245 } else {
7246 /* make sure that auto bkops is disabled */
7247 ufshcd_disable_auto_bkops(hba);
7248 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007249 }
7250
7251 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7252 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7253 !ufshcd_is_runtime_pm(pm_op))) {
7254 /* ensure that bkops is disabled */
7255 ufshcd_disable_auto_bkops(hba);
7256 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7257 if (ret)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007258 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007259 }
7260
7261 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7262 if (ret)
7263 goto set_dev_active;
7264
7265 ufshcd_vreg_set_lpm(hba);
7266
7267disable_clks:
7268 /*
7269 * Call vendor specific suspend callback. As these callbacks may access
7270 * vendor specific host controller register space call them before the
7271 * host clocks are ON.
7272 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007273 ret = ufshcd_vops_suspend(hba, pm_op);
7274 if (ret)
7275 goto set_link_active;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007276
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007277 if (!ufshcd_is_link_active(hba))
7278 ufshcd_setup_clocks(hba, false);
7279 else
7280 /* If link is active, device ref_clk can't be switched off */
7281 __ufshcd_setup_clocks(hba, false, true);
7282
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007283 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007284 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007285 /*
7286 * Disable the host irq as host controller as there won't be any
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007287 * host controller transaction expected till resume.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007288 */
7289 ufshcd_disable_irq(hba);
7290 /* Put the host controller in low power mode if possible */
7291 ufshcd_hba_vreg_set_lpm(hba);
7292 goto out;
7293
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007294set_link_active:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007295 if (hba->clk_scaling.is_allowed)
7296 ufshcd_resume_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007297 ufshcd_vreg_set_hpm(hba);
7298 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7299 ufshcd_set_link_active(hba);
7300 else if (ufshcd_is_link_off(hba))
7301 ufshcd_host_reset_and_restore(hba);
7302set_dev_active:
7303 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7304 ufshcd_disable_auto_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007305enable_gating:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007306 if (hba->clk_scaling.is_allowed)
7307 ufshcd_resume_clkscaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007308 hba->clk_gating.is_suspended = false;
7309 ufshcd_release(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007310out:
7311 hba->pm_op_in_progress = 0;
7312 return ret;
7313}
7314
7315/**
7316 * ufshcd_resume - helper function for resume operations
7317 * @hba: per adapter instance
7318 * @pm_op: runtime PM or system PM
7319 *
7320 * This function basically brings the UFS device, UniPro link and controller
7321 * to active state.
7322 *
7323 * Returns 0 for success and non-zero for failure
7324 */
7325static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7326{
7327 int ret;
7328 enum uic_link_state old_link_state;
7329
7330 hba->pm_op_in_progress = 1;
7331 old_link_state = hba->uic_link_state;
7332
7333 ufshcd_hba_vreg_set_hpm(hba);
7334 /* Make sure clocks are enabled before accessing controller */
7335 ret = ufshcd_setup_clocks(hba, true);
7336 if (ret)
7337 goto out;
7338
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007339 /* enable the host irq as host controller would be active soon */
7340 ret = ufshcd_enable_irq(hba);
7341 if (ret)
7342 goto disable_irq_and_vops_clks;
7343
7344 ret = ufshcd_vreg_set_hpm(hba);
7345 if (ret)
7346 goto disable_irq_and_vops_clks;
7347
7348 /*
7349 * Call vendor specific resume callback. As these callbacks may access
7350 * vendor specific host controller register space call them when the
7351 * host clocks are ON.
7352 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007353 ret = ufshcd_vops_resume(hba, pm_op);
7354 if (ret)
7355 goto disable_vreg;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007356
7357 if (ufshcd_is_link_hibern8(hba)) {
7358 ret = ufshcd_uic_hibern8_exit(hba);
7359 if (!ret)
7360 ufshcd_set_link_active(hba);
7361 else
7362 goto vendor_suspend;
7363 } else if (ufshcd_is_link_off(hba)) {
7364 ret = ufshcd_host_reset_and_restore(hba);
7365 /*
7366 * ufshcd_host_reset_and_restore() should have already
7367 * set the link state as active
7368 */
7369 if (ret || !ufshcd_is_link_active(hba))
7370 goto vendor_suspend;
7371 }
7372
7373 if (!ufshcd_is_ufs_dev_active(hba)) {
7374 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
7375 if (ret)
7376 goto set_old_link_state;
7377 }
7378
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08007379 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
7380 ufshcd_enable_auto_bkops(hba);
7381 else
7382 /*
7383 * If BKOPs operations are urgently needed at this moment then
7384 * keep auto-bkops enabled or else disable it.
7385 */
7386 ufshcd_urgent_bkops(hba);
7387
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007388 hba->clk_gating.is_suspended = false;
7389
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08007390 if (hba->clk_scaling.is_allowed)
7391 ufshcd_resume_clkscaling(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03007392
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007393 /* Schedule clock gating in case of no access to UFS device yet */
7394 ufshcd_release(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007395 goto out;
7396
7397set_old_link_state:
7398 ufshcd_link_state_transition(hba, old_link_state, 0);
7399vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007400 ufshcd_vops_suspend(hba, pm_op);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007401disable_vreg:
7402 ufshcd_vreg_set_lpm(hba);
7403disable_irq_and_vops_clks:
7404 ufshcd_disable_irq(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007405 if (hba->clk_scaling.is_allowed)
7406 ufshcd_suspend_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007407 ufshcd_setup_clocks(hba, false);
7408out:
7409 hba->pm_op_in_progress = 0;
7410 return ret;
7411}
7412
7413/**
7414 * ufshcd_system_suspend - system suspend routine
7415 * @hba: per adapter instance
7416 * @pm_op: runtime PM or system PM
7417 *
7418 * Check the description of ufshcd_suspend() function for more details.
7419 *
7420 * Returns 0 for success and non-zero for failure
7421 */
7422int ufshcd_system_suspend(struct ufs_hba *hba)
7423{
7424 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007425 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007426
7427 if (!hba || !hba->is_powered)
Dolev Raviv233b5942014-10-23 13:25:14 +03007428 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007429
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08007430 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
7431 hba->curr_dev_pwr_mode) &&
7432 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
7433 hba->uic_link_state))
7434 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007435
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08007436 if (pm_runtime_suspended(hba->dev)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007437 /*
7438 * UFS device and/or UFS link low power states during runtime
7439 * suspend seems to be different than what is expected during
7440 * system suspend. Hence runtime resume the devic & link and
7441 * let the system suspend low power states to take effect.
7442 * TODO: If resume takes longer time, we might have optimize
7443 * it in future by not resuming everything if possible.
7444 */
7445 ret = ufshcd_runtime_resume(hba);
7446 if (ret)
7447 goto out;
7448 }
7449
7450 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
7451out:
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007452 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
7453 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007454 hba->curr_dev_pwr_mode, hba->uic_link_state);
Dolev Ravive7850602014-09-25 15:32:36 +03007455 if (!ret)
7456 hba->is_sys_suspended = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007457 return ret;
7458}
7459EXPORT_SYMBOL(ufshcd_system_suspend);
7460
7461/**
7462 * ufshcd_system_resume - system resume routine
7463 * @hba: per adapter instance
7464 *
7465 * Returns 0 for success and non-zero for failure
7466 */
7467
7468int ufshcd_system_resume(struct ufs_hba *hba)
7469{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007470 int ret = 0;
7471 ktime_t start = ktime_get();
7472
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07007473 if (!hba)
7474 return -EINVAL;
7475
7476 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007477 /*
7478 * Let the runtime resume take care of resuming
7479 * if runtime suspended.
7480 */
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007481 goto out;
7482 else
7483 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
7484out:
7485 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
7486 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007487 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007488 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007489}
7490EXPORT_SYMBOL(ufshcd_system_resume);
7491
7492/**
7493 * ufshcd_runtime_suspend - runtime suspend routine
7494 * @hba: per adapter instance
7495 *
7496 * Check the description of ufshcd_suspend() function for more details.
7497 *
7498 * Returns 0 for success and non-zero for failure
7499 */
7500int ufshcd_runtime_suspend(struct ufs_hba *hba)
7501{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007502 int ret = 0;
7503 ktime_t start = ktime_get();
7504
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07007505 if (!hba)
7506 return -EINVAL;
7507
7508 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007509 goto out;
7510 else
7511 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
7512out:
7513 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
7514 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007515 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007516 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307517}
7518EXPORT_SYMBOL(ufshcd_runtime_suspend);
7519
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007520/**
7521 * ufshcd_runtime_resume - runtime resume routine
7522 * @hba: per adapter instance
7523 *
7524 * This function basically brings the UFS device, UniPro link and controller
7525 * to active state. Following operations are done in this function:
7526 *
7527 * 1. Turn on all the controller related clocks
7528 * 2. Bring the UniPro link out of Hibernate state
7529 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
7530 * to active state.
7531 * 4. If auto-bkops is enabled on the device, disable it.
7532 *
7533 * So following would be the possible power state after this function return
7534 * successfully:
7535 * S1: UFS device in Active state with VCC rail ON
7536 * UniPro link in Active state
7537 * All the UFS/UniPro controller clocks are ON
7538 *
7539 * Returns 0 for success and non-zero for failure
7540 */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307541int ufshcd_runtime_resume(struct ufs_hba *hba)
7542{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007543 int ret = 0;
7544 ktime_t start = ktime_get();
7545
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07007546 if (!hba)
7547 return -EINVAL;
7548
7549 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007550 goto out;
7551 else
7552 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
7553out:
7554 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
7555 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007556 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007557 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307558}
7559EXPORT_SYMBOL(ufshcd_runtime_resume);
7560
7561int ufshcd_runtime_idle(struct ufs_hba *hba)
7562{
7563 return 0;
7564}
7565EXPORT_SYMBOL(ufshcd_runtime_idle);
7566
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307567/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007568 * ufshcd_shutdown - shutdown routine
7569 * @hba: per adapter instance
7570 *
7571 * This function would power off both UFS device and UFS link.
7572 *
7573 * Returns 0 always to allow force shutdown even in case of errors.
7574 */
7575int ufshcd_shutdown(struct ufs_hba *hba)
7576{
7577 int ret = 0;
7578
7579 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
7580 goto out;
7581
7582 if (pm_runtime_suspended(hba->dev)) {
7583 ret = ufshcd_runtime_resume(hba);
7584 if (ret)
7585 goto out;
7586 }
7587
7588 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
7589out:
7590 if (ret)
7591 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
7592 /* allow force shutdown even in case of errors */
7593 return 0;
7594}
7595EXPORT_SYMBOL(ufshcd_shutdown);
7596
7597/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307598 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307599 * data structure memory
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307600 * @hba - per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307601 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307602void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307603{
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02007604 ufs_sysfs_remove_nodes(hba->dev);
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05307605 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307606 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05307607 ufshcd_disable_intr(hba, hba->intr_mask);
Yaniv Gardi596585a2016-03-10 17:37:08 +02007608 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307609
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007610 ufshcd_exit_clk_gating(hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08007611 if (ufshcd_is_clkscaling_supported(hba))
7612 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007613 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307614}
7615EXPORT_SYMBOL_GPL(ufshcd_remove);
7616
7617/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02007618 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
7619 * @hba: pointer to Host Bus Adapter (HBA)
7620 */
7621void ufshcd_dealloc_host(struct ufs_hba *hba)
7622{
7623 scsi_host_put(hba->host);
7624}
7625EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
7626
7627/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09007628 * ufshcd_set_dma_mask - Set dma mask based on the controller
7629 * addressing capability
7630 * @hba: per adapter instance
7631 *
7632 * Returns 0 for success, non-zero for failure
7633 */
7634static int ufshcd_set_dma_mask(struct ufs_hba *hba)
7635{
7636 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
7637 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
7638 return 0;
7639 }
7640 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
7641}
7642
7643/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007644 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307645 * @dev: pointer to device handle
7646 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307647 * Returns 0 on success, non-zero value on failure
7648 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007649int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307650{
7651 struct Scsi_Host *host;
7652 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007653 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307654
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307655 if (!dev) {
7656 dev_err(dev,
7657 "Invalid memory reference for dev is NULL\n");
7658 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307659 goto out_error;
7660 }
7661
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307662 host = scsi_host_alloc(&ufshcd_driver_template,
7663 sizeof(struct ufs_hba));
7664 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307665 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307666 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307667 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307668 }
7669 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307670 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307671 hba->dev = dev;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007672 *hba_handle = hba;
7673
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007674 INIT_LIST_HEAD(&hba->clk_list_head);
7675
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007676out_error:
7677 return err;
7678}
7679EXPORT_SYMBOL(ufshcd_alloc_host);
7680
7681/**
7682 * ufshcd_init - Driver initialization routine
7683 * @hba: per-adapter instance
7684 * @mmio_base: base register address
7685 * @irq: Interrupt line of device
7686 * Returns 0 on success, non-zero value on failure
7687 */
7688int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
7689{
7690 int err;
7691 struct Scsi_Host *host = hba->host;
7692 struct device *dev = hba->dev;
7693
7694 if (!mmio_base) {
7695 dev_err(hba->dev,
7696 "Invalid memory reference for mmio_base is NULL\n");
7697 err = -ENODEV;
7698 goto out_error;
7699 }
7700
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307701 hba->mmio_base = mmio_base;
7702 hba->irq = irq;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307703
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00007704 /* Set descriptor lengths to specification defaults */
7705 ufshcd_def_desc_sizes(hba);
7706
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007707 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007708 if (err)
7709 goto out_error;
7710
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307711 /* Read capabilities registers */
7712 ufshcd_hba_capabilities(hba);
7713
7714 /* Get UFS version supported by the controller */
7715 hba->ufs_version = ufshcd_get_ufs_version(hba);
7716
Yaniv Gardic01848c2016-12-05 19:25:02 -08007717 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
7718 (hba->ufs_version != UFSHCI_VERSION_11) &&
7719 (hba->ufs_version != UFSHCI_VERSION_20) &&
7720 (hba->ufs_version != UFSHCI_VERSION_21))
7721 dev_err(hba->dev, "invalid UFS version 0x%x\n",
7722 hba->ufs_version);
7723
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05307724 /* Get Interrupt bit mask per version */
7725 hba->intr_mask = ufshcd_get_intr_mask(hba);
7726
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09007727 err = ufshcd_set_dma_mask(hba);
7728 if (err) {
7729 dev_err(hba->dev, "set dma mask failed\n");
7730 goto out_disable;
7731 }
7732
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307733 /* Allocate memory for host memory space */
7734 err = ufshcd_memory_alloc(hba);
7735 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307736 dev_err(hba->dev, "Memory allocation failed\n");
7737 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307738 }
7739
7740 /* Configure LRB */
7741 ufshcd_host_memory_configure(hba);
7742
7743 host->can_queue = hba->nutrs;
7744 host->cmd_per_lun = hba->nutrs;
7745 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03007746 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307747 host->max_channel = UFSHCD_MAX_CHANNEL;
7748 host->unique_id = host->host_no;
7749 host->max_cmd_len = MAX_CDB_SIZE;
7750
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007751 hba->max_pwr_info.is_valid = false;
7752
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307753 /* Initailize wait queue for task management */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05307754 init_waitqueue_head(&hba->tm_wq);
7755 init_waitqueue_head(&hba->tm_tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307756
7757 /* Initialize work queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05307758 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307759 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307760
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307761 /* Initialize UIC command mutex */
7762 mutex_init(&hba->uic_cmd_mutex);
7763
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307764 /* Initialize mutex for device management commands */
7765 mutex_init(&hba->dev_cmd.lock);
7766
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08007767 init_rwsem(&hba->clk_scaling_lock);
7768
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307769 /* Initialize device management tag acquire wait queue */
7770 init_waitqueue_head(&hba->dev_cmd.tag_wq);
7771
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007772 ufshcd_init_clk_gating(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02007773
7774 /*
7775 * In order to avoid any spurious interrupt immediately after
7776 * registering UFS controller interrupt handler, clear any pending UFS
7777 * interrupt status and disable all the UFS interrupts.
7778 */
7779 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
7780 REG_INTERRUPT_STATUS);
7781 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
7782 /*
7783 * Make sure that UFS interrupts are disabled and any pending interrupt
7784 * status is cleared before registering UFS interrupt handler.
7785 */
7786 mb();
7787
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307788 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09007789 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307790 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307791 dev_err(hba->dev, "request irq failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007792 goto exit_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007793 } else {
7794 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307795 }
7796
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307797 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307798 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307799 dev_err(hba->dev, "scsi_add_host failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007800 goto exit_gating;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307801 }
7802
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307803 /* Host controller enable */
7804 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307805 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307806 dev_err(hba->dev, "Host controller enable failed\n");
Dolev Raviv66cc8202016-12-22 18:39:42 -08007807 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08007808 ufshcd_print_host_state(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307809 goto out_remove_scsi_host;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307810 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307811
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08007812 if (ufshcd_is_clkscaling_supported(hba)) {
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007813 char wq_name[sizeof("ufs_clkscaling_00")];
7814
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007815 INIT_WORK(&hba->clk_scaling.suspend_work,
7816 ufshcd_clk_scaling_suspend_work);
7817 INIT_WORK(&hba->clk_scaling.resume_work,
7818 ufshcd_clk_scaling_resume_work);
7819
Tomohiro Kusumid985c6ea2017-03-28 16:49:29 +03007820 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007821 host->host_no);
7822 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
7823
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08007824 ufshcd_clkscaling_init_sysfs(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03007825 }
7826
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -08007827 /*
7828 * Set the default power management level for runtime and system PM.
7829 * Default power saving mode is to keep UFS link in Hibern8 state
7830 * and UFS device in sleep state.
7831 */
7832 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
7833 UFS_SLEEP_PWR_MODE,
7834 UIC_LINK_HIBERN8_STATE);
7835 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
7836 UFS_SLEEP_PWR_MODE,
7837 UIC_LINK_HIBERN8_STATE);
7838
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05307839 /* Hold auto suspend until async scan completes */
7840 pm_runtime_get_sync(dev);
7841
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007842 /*
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08007843 * We are assuming that device wasn't put in sleep/power-down
7844 * state exclusively during the boot stage before kernel.
7845 * This assumption helps avoid doing link startup twice during
7846 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007847 */
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08007848 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007849
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307850 async_schedule(ufshcd_async_scan, hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02007851 ufs_sysfs_add_nodes(hba->dev);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307852
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307853 return 0;
7854
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307855out_remove_scsi_host:
7856 scsi_remove_host(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007857exit_gating:
7858 ufshcd_exit_clk_gating(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307859out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007860 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007861 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307862out_error:
7863 return err;
7864}
7865EXPORT_SYMBOL_GPL(ufshcd_init);
7866
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307867MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
7868MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05307869MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307870MODULE_LICENSE("GPL");
7871MODULE_VERSION(UFSHCD_DRIVER_VERSION);