blob: 23c0a6a2ef10de585cc8d93178cef2283191cfc2 [file] [log] [blame]
Banajit Goswami0530e2f2016-12-09 21:34:37 -08001/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/input.h>
14#include <linux/of_gpio.h>
15#include <linux/mfd/msm-cdc-pinctrl.h>
16#include <sound/pcm_params.h>
17#include <sound/q6afe-v2.h>
18#include "qdsp6v2/msm-pcm-routing-v2.h"
Neeraj Upadhyay49934422016-12-27 19:03:35 +053019#include "sdm660-common.h"
20#include "sdm660-internal.h"
21#include "sdm660-external.h"
22#include "../codecs/sdm660_cdc/msm-analog-cdc.h"
Banajit Goswami0530e2f2016-12-09 21:34:37 -080023#include "../codecs/wsa881x.h"
24
Neeraj Upadhyay49934422016-12-27 19:03:35 +053025#define DRV_NAME "sdm660-asoc-snd"
Banajit Goswami0530e2f2016-12-09 21:34:37 -080026
Laxminath Kasame68e94f2016-12-09 12:08:00 +053027#define MSM_INT_DIGITAL_CODEC "msm-dig-codec"
28#define PMIC_INT_ANALOG_CODEC "analog-codec"
29
Banajit Goswami0530e2f2016-12-09 21:34:37 -080030#define DEV_NAME_STR_LEN 32
31#define DEFAULT_MCLK_RATE 9600000
32
33struct dev_config {
34 u32 sample_rate;
35 u32 bit_format;
36 u32 channels;
37};
38
39/* TDM default config */
40static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
41 { /* PRI TDM */
42 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
43 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
44 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
45 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
46 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
47 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
48 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
49 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
50 },
51 { /* SEC TDM */
52 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
53 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
54 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
55 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
56 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
57 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
58 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
59 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
60 },
61 { /* TERT TDM */
62 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
63 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
64 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
65 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
66 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
67 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
68 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
69 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
70 },
71 { /* QUAT TDM */
72 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
73 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
74 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
75 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
76 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
77 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
78 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
79 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
80 }
81};
82
83/* TDM default config */
84static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
85 { /* PRI TDM */
86 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
87 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
88 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
89 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
90 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
91 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
92 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
93 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
94 },
95 { /* SEC TDM */
96 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
97 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
98 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
99 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
100 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
101 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
102 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
103 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
104 },
105 { /* TERT TDM */
106 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
107 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
108 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
109 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
110 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
111 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
112 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
113 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
114 },
115 { /* QUAT TDM */
116 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
117 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
118 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
119 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
120 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
121 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
122 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
123 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
124 }
125};
126
127static struct dev_config usb_rx_cfg = {
128 .sample_rate = SAMPLING_RATE_48KHZ,
129 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
130 .channels = 2,
131};
132
133static struct dev_config usb_tx_cfg = {
134 .sample_rate = SAMPLING_RATE_48KHZ,
135 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
136 .channels = 1,
137};
138
139enum {
140 PRIM_MI2S = 0,
141 SEC_MI2S,
142 TERT_MI2S,
143 QUAT_MI2S,
144 MI2S_MAX,
145};
146
147enum {
148 PRIM_AUX_PCM = 0,
149 SEC_AUX_PCM,
150 TERT_AUX_PCM,
151 QUAT_AUX_PCM,
152 AUX_PCM_MAX,
153};
154
155enum {
156 PCM_I2S_SEL_PRIM = 0,
157 PCM_I2S_SEL_SEC,
158 PCM_I2S_SEL_TERT,
159 PCM_I2S_SEL_QUAT,
160 PCM_I2S_SEL_MAX,
161};
162
163struct mi2s_aux_pcm_common_conf {
164 struct mutex lock;
165 void *pcm_i2s_sel_vt_addr;
166};
167
168struct mi2s_conf {
169 struct mutex lock;
170 u32 ref_cnt;
171 u32 msm_is_mi2s_master;
Tanya Dixit73a3a262016-12-08 22:25:56 +0530172 u32 msm_is_ext_mclk;
Banajit Goswami0530e2f2016-12-09 21:34:37 -0800173};
174
175struct auxpcm_conf {
176 struct mutex lock;
177 u32 ref_cnt;
178};
179
Tanya Dixit73a3a262016-12-08 22:25:56 +0530180static u32 mi2s_ebit_clk[MI2S_MAX] = {
181 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
182 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
183 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
184 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT
185};
186
Banajit Goswami0530e2f2016-12-09 21:34:37 -0800187struct msm_wsa881x_dev_info {
188 struct device_node *of_node;
189 u32 index;
190};
191static struct snd_soc_aux_dev *msm_aux_dev;
192static struct snd_soc_codec_conf *msm_codec_conf;
193
194static bool msm_swap_gnd_mic(struct snd_soc_codec *codec);
195
196static struct wcd_mbhc_config mbhc_cfg = {
197 .read_fw_bin = false,
198 .calibration = NULL,
199 .detect_extn_cable = true,
200 .mono_stero_detection = false,
201 .swap_gnd_mic = NULL,
Laxminath Kasame68e94f2016-12-09 12:08:00 +0530202 .hs_ext_micbias = true,
Banajit Goswami0530e2f2016-12-09 21:34:37 -0800203 .key_code[0] = KEY_MEDIA,
204 .key_code[1] = KEY_VOICECOMMAND,
205 .key_code[2] = KEY_VOLUMEUP,
206 .key_code[3] = KEY_VOLUMEDOWN,
207 .key_code[4] = 0,
208 .key_code[5] = 0,
209 .key_code[6] = 0,
210 .key_code[7] = 0,
211 .linein_th = 5000,
212 .moisture_en = false,
213 .mbhc_micbias = 0,
214 .anc_micbias = 0,
215 .enable_anc_mic_detect = false,
216};
217
218static struct dev_config proxy_rx_cfg = {
219 .sample_rate = SAMPLING_RATE_48KHZ,
220 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
221 .channels = 2,
222};
223
224/* Default configuration of MI2S channels */
225static struct dev_config mi2s_rx_cfg[] = {
226 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
227 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
228 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
229 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
230};
231
232static struct dev_config mi2s_tx_cfg[] = {
233 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
234 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
235 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
236 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
237};
238
239static struct dev_config aux_pcm_rx_cfg[] = {
240 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
241 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
242 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
243 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
244};
245
246static struct dev_config aux_pcm_tx_cfg[] = {
247 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
248 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
249 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
250 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
251};
252
253static char const *ch_text[] = {"Two", "Three", "Four", "Five",
254 "Six", "Seven", "Eight"};
255static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
256static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_16",
257 "KHZ_32", "KHZ_44P1", "KHZ_48",
258 "KHZ_96", "KHZ_192"};
259static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
260 "Five", "Six", "Seven",
261 "Eight"};
262static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
263 "S32_LE"};
264static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
265 "Five", "Six", "Seven", "Eight"};
266static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
267static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
268 "KHZ_44P1", "KHZ_48", "KHZ_96",
269 "KHZ_192", "KHZ_352P8", "KHZ_384"};
270static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
271 "Five", "Six", "Seven",
272 "Eight"};
273static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
274 "KHZ_16", "KHZ_22P05",
275 "KHZ_32", "KHZ_44P1", "KHZ_48",
276 "KHZ_96", "KHZ_192", "KHZ_384"};
277
278static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
279static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
280static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
281static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
282static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
283static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
284static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
285static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
286static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
287static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
288static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
289static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
290static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
291static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
292static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
293static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
294static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
295static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
296static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
297static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
298static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
299static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
300static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
301static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
302static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
303static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
304static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
305static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
306static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
307static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
308static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
309static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
310static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
311static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
312static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
313static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
314static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
315
316static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
317 {
318 AFE_API_VERSION_I2S_CONFIG,
319 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
320 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
321 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
322 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
323 0,
324 },
325 {
326 AFE_API_VERSION_I2S_CONFIG,
327 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
328 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
329 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
330 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
331 0,
332 },
333 {
334 AFE_API_VERSION_I2S_CONFIG,
335 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
336 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
337 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
338 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
339 0,
340 },
341 {
342 AFE_API_VERSION_I2S_CONFIG,
343 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
344 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
345 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
346 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
347 0,
348 }
349};
350
Tanya Dixit73a3a262016-12-08 22:25:56 +0530351static struct afe_clk_set mi2s_mclk[MI2S_MAX] = {
352 {
353 AFE_API_VERSION_I2S_CONFIG,
Tanya Dixit73a3a262016-12-08 22:25:56 +0530354 Q6AFE_LPASS_CLK_ID_MCLK_3,
355 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
356 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
357 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
358 0,
359 },
360 {
361 AFE_API_VERSION_I2S_CONFIG,
362 Q6AFE_LPASS_CLK_ID_MCLK_4,
363 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
364 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
365 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
366 0,
Laxminath Kasam4e444572017-01-15 20:00:11 +0530367 },
368 {
369 AFE_API_VERSION_I2S_CONFIG,
370 Q6AFE_LPASS_CLK_ID_MCLK_1,
371 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
372 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
373 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
374 0,
375 },
376 {
377 AFE_API_VERSION_I2S_CONFIG,
378 Q6AFE_LPASS_CLK_ID_MCLK_2,
379 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
380 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
381 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
382 0,
Tanya Dixit73a3a262016-12-08 22:25:56 +0530383 }
384};
385
386
387
Banajit Goswami0530e2f2016-12-09 21:34:37 -0800388static struct mi2s_aux_pcm_common_conf mi2s_auxpcm_conf[PCM_I2S_SEL_MAX];
389static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
390static struct auxpcm_conf auxpcm_intf_conf[AUX_PCM_MAX];
391
392static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
393 struct snd_ctl_elem_value *ucontrol)
394{
395 pr_debug("%s: proxy_rx channels = %d\n",
396 __func__, proxy_rx_cfg.channels);
397 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
398
399 return 0;
400}
401
402static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
403 struct snd_ctl_elem_value *ucontrol)
404{
405 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
406 pr_debug("%s: proxy_rx channels = %d\n",
407 __func__, proxy_rx_cfg.channels);
408
409 return 1;
410}
411
412static int tdm_get_sample_rate(int value)
413{
414 int sample_rate = 0;
415
416 switch (value) {
417 case 0:
418 sample_rate = SAMPLING_RATE_8KHZ;
419 break;
420 case 1:
421 sample_rate = SAMPLING_RATE_16KHZ;
422 break;
423 case 2:
424 sample_rate = SAMPLING_RATE_32KHZ;
425 break;
426 case 3:
427 sample_rate = SAMPLING_RATE_44P1KHZ;
428 break;
429 case 4:
430 sample_rate = SAMPLING_RATE_48KHZ;
431 break;
432 case 5:
433 sample_rate = SAMPLING_RATE_96KHZ;
434 break;
435 case 6:
436 sample_rate = SAMPLING_RATE_192KHZ;
437 break;
438 case 7:
439 sample_rate = SAMPLING_RATE_352P8KHZ;
440 break;
441 case 8:
442 sample_rate = SAMPLING_RATE_384KHZ;
443 break;
444 default:
445 sample_rate = SAMPLING_RATE_48KHZ;
446 break;
447 }
448 return sample_rate;
449}
450
451static int tdm_get_sample_rate_val(int sample_rate)
452{
453 int sample_rate_val = 0;
454
455 switch (sample_rate) {
456 case SAMPLING_RATE_8KHZ:
457 sample_rate_val = 0;
458 break;
459 case SAMPLING_RATE_16KHZ:
460 sample_rate_val = 1;
461 break;
462 case SAMPLING_RATE_32KHZ:
463 sample_rate_val = 2;
464 break;
465 case SAMPLING_RATE_44P1KHZ:
466 sample_rate_val = 3;
467 break;
468 case SAMPLING_RATE_48KHZ:
469 sample_rate_val = 4;
470 break;
471 case SAMPLING_RATE_96KHZ:
472 sample_rate_val = 5;
473 break;
474 case SAMPLING_RATE_192KHZ:
475 sample_rate_val = 6;
476 break;
477 case SAMPLING_RATE_352P8KHZ:
478 sample_rate_val = 7;
479 break;
480 case SAMPLING_RATE_384KHZ:
481 sample_rate_val = 8;
482 break;
483 default:
484 sample_rate_val = 4;
485 break;
486 }
487 return sample_rate_val;
488}
489
490static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
491 struct tdm_port *port)
492{
493 if (port) {
494 if (strnstr(kcontrol->id.name, "PRI",
495 sizeof(kcontrol->id.name))) {
496 port->mode = TDM_PRI;
497 } else if (strnstr(kcontrol->id.name, "SEC",
498 sizeof(kcontrol->id.name))) {
499 port->mode = TDM_SEC;
500 } else if (strnstr(kcontrol->id.name, "TERT",
501 sizeof(kcontrol->id.name))) {
502 port->mode = TDM_TERT;
503 } else if (strnstr(kcontrol->id.name, "QUAT",
504 sizeof(kcontrol->id.name))) {
505 port->mode = TDM_QUAT;
506 } else {
507 pr_err("%s: unsupported mode in: %s",
508 __func__, kcontrol->id.name);
509 return -EINVAL;
510 }
511
512 if (strnstr(kcontrol->id.name, "RX_0",
513 sizeof(kcontrol->id.name)) ||
514 strnstr(kcontrol->id.name, "TX_0",
515 sizeof(kcontrol->id.name))) {
516 port->channel = TDM_0;
517 } else if (strnstr(kcontrol->id.name, "RX_1",
518 sizeof(kcontrol->id.name)) ||
519 strnstr(kcontrol->id.name, "TX_1",
520 sizeof(kcontrol->id.name))) {
521 port->channel = TDM_1;
522 } else if (strnstr(kcontrol->id.name, "RX_2",
523 sizeof(kcontrol->id.name)) ||
524 strnstr(kcontrol->id.name, "TX_2",
525 sizeof(kcontrol->id.name))) {
526 port->channel = TDM_2;
527 } else if (strnstr(kcontrol->id.name, "RX_3",
528 sizeof(kcontrol->id.name)) ||
529 strnstr(kcontrol->id.name, "TX_3",
530 sizeof(kcontrol->id.name))) {
531 port->channel = TDM_3;
532 } else if (strnstr(kcontrol->id.name, "RX_4",
533 sizeof(kcontrol->id.name)) ||
534 strnstr(kcontrol->id.name, "TX_4",
535 sizeof(kcontrol->id.name))) {
536 port->channel = TDM_4;
537 } else if (strnstr(kcontrol->id.name, "RX_5",
538 sizeof(kcontrol->id.name)) ||
539 strnstr(kcontrol->id.name, "TX_5",
540 sizeof(kcontrol->id.name))) {
541 port->channel = TDM_5;
542 } else if (strnstr(kcontrol->id.name, "RX_6",
543 sizeof(kcontrol->id.name)) ||
544 strnstr(kcontrol->id.name, "TX_6",
545 sizeof(kcontrol->id.name))) {
546 port->channel = TDM_6;
547 } else if (strnstr(kcontrol->id.name, "RX_7",
548 sizeof(kcontrol->id.name)) ||
549 strnstr(kcontrol->id.name, "TX_7",
550 sizeof(kcontrol->id.name))) {
551 port->channel = TDM_7;
552 } else {
553 pr_err("%s: unsupported channel in: %s",
554 __func__, kcontrol->id.name);
555 return -EINVAL;
556 }
557 } else
558 return -EINVAL;
559 return 0;
560}
561
562static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
563 struct snd_ctl_elem_value *ucontrol)
564{
565 struct tdm_port port;
566 int ret = tdm_get_port_idx(kcontrol, &port);
567
568 if (ret) {
569 pr_err("%s: unsupported control: %s",
570 __func__, kcontrol->id.name);
571 } else {
572 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
573 tdm_rx_cfg[port.mode][port.channel].sample_rate);
574
575 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
576 tdm_rx_cfg[port.mode][port.channel].sample_rate,
577 ucontrol->value.enumerated.item[0]);
578 }
579 return ret;
580}
581
582static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
583 struct snd_ctl_elem_value *ucontrol)
584{
585 struct tdm_port port;
586 int ret = tdm_get_port_idx(kcontrol, &port);
587
588 if (ret) {
589 pr_err("%s: unsupported control: %s",
590 __func__, kcontrol->id.name);
591 } else {
592 tdm_rx_cfg[port.mode][port.channel].sample_rate =
593 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
594
595 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
596 tdm_rx_cfg[port.mode][port.channel].sample_rate,
597 ucontrol->value.enumerated.item[0]);
598 }
599 return ret;
600}
601
602static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
603 struct snd_ctl_elem_value *ucontrol)
604{
605 struct tdm_port port;
606 int ret = tdm_get_port_idx(kcontrol, &port);
607
608 if (ret) {
609 pr_err("%s: unsupported control: %s",
610 __func__, kcontrol->id.name);
611 } else {
612 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
613 tdm_tx_cfg[port.mode][port.channel].sample_rate);
614
615 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
616 tdm_tx_cfg[port.mode][port.channel].sample_rate,
617 ucontrol->value.enumerated.item[0]);
618 }
619 return ret;
620}
621
622static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
623 struct snd_ctl_elem_value *ucontrol)
624{
625 struct tdm_port port;
626 int ret = tdm_get_port_idx(kcontrol, &port);
627
628 if (ret) {
629 pr_err("%s: unsupported control: %s",
630 __func__, kcontrol->id.name);
631 } else {
632 tdm_tx_cfg[port.mode][port.channel].sample_rate =
633 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
634
635 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
636 tdm_tx_cfg[port.mode][port.channel].sample_rate,
637 ucontrol->value.enumerated.item[0]);
638 }
639 return ret;
640}
641
642static int tdm_get_format(int value)
643{
644 int format = 0;
645
646 switch (value) {
647 case 0:
648 format = SNDRV_PCM_FORMAT_S16_LE;
649 break;
650 case 1:
651 format = SNDRV_PCM_FORMAT_S24_LE;
652 break;
653 case 2:
654 format = SNDRV_PCM_FORMAT_S32_LE;
655 break;
656 default:
657 format = SNDRV_PCM_FORMAT_S16_LE;
658 break;
659 }
660 return format;
661}
662
663static int tdm_get_format_val(int format)
664{
665 int value = 0;
666
667 switch (format) {
668 case SNDRV_PCM_FORMAT_S16_LE:
669 value = 0;
670 break;
671 case SNDRV_PCM_FORMAT_S24_LE:
672 value = 1;
673 break;
674 case SNDRV_PCM_FORMAT_S32_LE:
675 value = 2;
676 break;
677 default:
678 value = 0;
679 break;
680 }
681 return value;
682}
683
684static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
685 struct snd_ctl_elem_value *ucontrol)
686{
687 struct tdm_port port;
688 int ret = tdm_get_port_idx(kcontrol, &port);
689
690 if (ret) {
691 pr_err("%s: unsupported control: %s",
692 __func__, kcontrol->id.name);
693 } else {
694 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
695 tdm_rx_cfg[port.mode][port.channel].bit_format);
696
697 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
698 tdm_rx_cfg[port.mode][port.channel].bit_format,
699 ucontrol->value.enumerated.item[0]);
700 }
701 return ret;
702}
703
704static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
705 struct snd_ctl_elem_value *ucontrol)
706{
707 struct tdm_port port;
708 int ret = tdm_get_port_idx(kcontrol, &port);
709
710 if (ret) {
711 pr_err("%s: unsupported control: %s",
712 __func__, kcontrol->id.name);
713 } else {
714 tdm_rx_cfg[port.mode][port.channel].bit_format =
715 tdm_get_format(ucontrol->value.enumerated.item[0]);
716
717 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
718 tdm_rx_cfg[port.mode][port.channel].bit_format,
719 ucontrol->value.enumerated.item[0]);
720 }
721 return ret;
722}
723
724static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
725 struct snd_ctl_elem_value *ucontrol)
726{
727 struct tdm_port port;
728 int ret = tdm_get_port_idx(kcontrol, &port);
729
730 if (ret) {
731 pr_err("%s: unsupported control: %s",
732 __func__, kcontrol->id.name);
733 } else {
734 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
735 tdm_tx_cfg[port.mode][port.channel].bit_format);
736
737 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
738 tdm_tx_cfg[port.mode][port.channel].bit_format,
739 ucontrol->value.enumerated.item[0]);
740 }
741 return ret;
742}
743
744static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
745 struct snd_ctl_elem_value *ucontrol)
746{
747 struct tdm_port port;
748 int ret = tdm_get_port_idx(kcontrol, &port);
749
750 if (ret) {
751 pr_err("%s: unsupported control: %s",
752 __func__, kcontrol->id.name);
753 } else {
754 tdm_tx_cfg[port.mode][port.channel].bit_format =
755 tdm_get_format(ucontrol->value.enumerated.item[0]);
756
757 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
758 tdm_tx_cfg[port.mode][port.channel].bit_format,
759 ucontrol->value.enumerated.item[0]);
760 }
761 return ret;
762}
763
764static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
765 struct snd_ctl_elem_value *ucontrol)
766{
767 struct tdm_port port;
768 int ret = tdm_get_port_idx(kcontrol, &port);
769
770 if (ret) {
771 pr_err("%s: unsupported control: %s",
772 __func__, kcontrol->id.name);
773 } else {
774
775 ucontrol->value.enumerated.item[0] =
776 tdm_rx_cfg[port.mode][port.channel].channels - 1;
777
778 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
779 tdm_rx_cfg[port.mode][port.channel].channels - 1,
780 ucontrol->value.enumerated.item[0]);
781 }
782 return ret;
783}
784
785static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
786 struct snd_ctl_elem_value *ucontrol)
787{
788 struct tdm_port port;
789 int ret = tdm_get_port_idx(kcontrol, &port);
790
791 if (ret) {
792 pr_err("%s: unsupported control: %s",
793 __func__, kcontrol->id.name);
794 } else {
795 tdm_rx_cfg[port.mode][port.channel].channels =
796 ucontrol->value.enumerated.item[0] + 1;
797
798 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
799 tdm_rx_cfg[port.mode][port.channel].channels,
800 ucontrol->value.enumerated.item[0] + 1);
801 }
802 return ret;
803}
804
805static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
806 struct snd_ctl_elem_value *ucontrol)
807{
808 struct tdm_port port;
809 int ret = tdm_get_port_idx(kcontrol, &port);
810
811 if (ret) {
812 pr_err("%s: unsupported control: %s",
813 __func__, kcontrol->id.name);
814 } else {
815 ucontrol->value.enumerated.item[0] =
816 tdm_tx_cfg[port.mode][port.channel].channels - 1;
817
818 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
819 tdm_tx_cfg[port.mode][port.channel].channels - 1,
820 ucontrol->value.enumerated.item[0]);
821 }
822 return ret;
823}
824
825static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
826 struct snd_ctl_elem_value *ucontrol)
827{
828 struct tdm_port port;
829 int ret = tdm_get_port_idx(kcontrol, &port);
830
831 if (ret) {
832 pr_err("%s: unsupported control: %s",
833 __func__, kcontrol->id.name);
834 } else {
835 tdm_tx_cfg[port.mode][port.channel].channels =
836 ucontrol->value.enumerated.item[0] + 1;
837
838 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
839 tdm_tx_cfg[port.mode][port.channel].channels,
840 ucontrol->value.enumerated.item[0] + 1);
841 }
842 return ret;
843}
844
845static int aux_pcm_get_sample_rate(int value)
846{
847 int sample_rate;
848
849 switch (value) {
850 case 1:
851 sample_rate = SAMPLING_RATE_16KHZ;
852 break;
853 case 0:
854 default:
855 sample_rate = SAMPLING_RATE_8KHZ;
856 break;
857 }
858 return sample_rate;
859}
860
861static int aux_pcm_get_sample_rate_val(int sample_rate)
862{
863 int sample_rate_val;
864
865 switch (sample_rate) {
866 case SAMPLING_RATE_16KHZ:
867 sample_rate_val = 1;
868 break;
869 case SAMPLING_RATE_8KHZ:
870 default:
871 sample_rate_val = 0;
872 break;
873 }
874 return sample_rate_val;
875}
876
877static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
878{
879 int idx;
880
881 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
882 sizeof("PRIM_AUX_PCM")))
883 idx = PRIM_AUX_PCM;
884 else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
885 sizeof("SEC_AUX_PCM")))
886 idx = SEC_AUX_PCM;
887 else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
888 sizeof("TERT_AUX_PCM")))
889 idx = TERT_AUX_PCM;
890 else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
891 sizeof("QUAT_AUX_PCM")))
892 idx = QUAT_AUX_PCM;
893 else {
894 pr_err("%s: unsupported port: %s",
895 __func__, kcontrol->id.name);
896 idx = -EINVAL;
897 }
898
899 return idx;
900}
901
902static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
903 struct snd_ctl_elem_value *ucontrol)
904{
905 int idx = aux_pcm_get_port_idx(kcontrol);
906
907 if (idx < 0)
908 return idx;
909
910 aux_pcm_rx_cfg[idx].sample_rate =
911 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
912
913 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
914 idx, aux_pcm_rx_cfg[idx].sample_rate,
915 ucontrol->value.enumerated.item[0]);
916
917 return 0;
918}
919
920static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
921 struct snd_ctl_elem_value *ucontrol)
922{
923 int idx = aux_pcm_get_port_idx(kcontrol);
924
925 if (idx < 0)
926 return idx;
927
928 ucontrol->value.enumerated.item[0] =
929 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
930
931 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
932 idx, aux_pcm_rx_cfg[idx].sample_rate,
933 ucontrol->value.enumerated.item[0]);
934
935 return 0;
936}
937
938static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
939 struct snd_ctl_elem_value *ucontrol)
940{
941 int idx = aux_pcm_get_port_idx(kcontrol);
942
943 if (idx < 0)
944 return idx;
945
946 aux_pcm_tx_cfg[idx].sample_rate =
947 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
948
949 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
950 idx, aux_pcm_tx_cfg[idx].sample_rate,
951 ucontrol->value.enumerated.item[0]);
952
953 return 0;
954}
955
956static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
957 struct snd_ctl_elem_value *ucontrol)
958{
959 int idx = aux_pcm_get_port_idx(kcontrol);
960
961 if (idx < 0)
962 return idx;
963
964 ucontrol->value.enumerated.item[0] =
965 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
966
967 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
968 idx, aux_pcm_tx_cfg[idx].sample_rate,
969 ucontrol->value.enumerated.item[0]);
970
971 return 0;
972}
973
974static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
975{
976 int idx;
977
978 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
979 sizeof("PRIM_MI2S_RX")))
980 idx = PRIM_MI2S;
981 else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
982 sizeof("SEC_MI2S_RX")))
983 idx = SEC_MI2S;
984 else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
985 sizeof("TERT_MI2S_RX")))
986 idx = TERT_MI2S;
987 else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
988 sizeof("QUAT_MI2S_RX")))
989 idx = QUAT_MI2S;
990 else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
991 sizeof("PRIM_MI2S_TX")))
992 idx = PRIM_MI2S;
993 else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
994 sizeof("SEC_MI2S_TX")))
995 idx = SEC_MI2S;
996 else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
997 sizeof("TERT_MI2S_TX")))
998 idx = TERT_MI2S;
999 else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
1000 sizeof("QUAT_MI2S_TX")))
1001 idx = QUAT_MI2S;
1002 else {
1003 pr_err("%s: unsupported channel: %s",
1004 __func__, kcontrol->id.name);
1005 idx = -EINVAL;
1006 }
1007
1008 return idx;
1009}
1010
1011static int mi2s_get_sample_rate_val(int sample_rate)
1012{
1013 int sample_rate_val;
1014
1015 switch (sample_rate) {
1016 case SAMPLING_RATE_8KHZ:
1017 sample_rate_val = 0;
1018 break;
1019 case SAMPLING_RATE_16KHZ:
1020 sample_rate_val = 1;
1021 break;
1022 case SAMPLING_RATE_32KHZ:
1023 sample_rate_val = 2;
1024 break;
1025 case SAMPLING_RATE_44P1KHZ:
1026 sample_rate_val = 3;
1027 break;
1028 case SAMPLING_RATE_48KHZ:
1029 sample_rate_val = 4;
1030 break;
1031 case SAMPLING_RATE_96KHZ:
1032 sample_rate_val = 5;
1033 break;
1034 case SAMPLING_RATE_192KHZ:
1035 sample_rate_val = 6;
1036 break;
1037 default:
1038 sample_rate_val = 4;
1039 break;
1040 }
1041 return sample_rate_val;
1042}
1043
1044static int mi2s_get_sample_rate(int value)
1045{
1046 int sample_rate;
1047
1048 switch (value) {
1049 case 0:
1050 sample_rate = SAMPLING_RATE_8KHZ;
1051 break;
1052 case 1:
1053 sample_rate = SAMPLING_RATE_16KHZ;
1054 break;
1055 case 2:
1056 sample_rate = SAMPLING_RATE_32KHZ;
1057 break;
1058 case 3:
1059 sample_rate = SAMPLING_RATE_44P1KHZ;
1060 break;
1061 case 4:
1062 sample_rate = SAMPLING_RATE_48KHZ;
1063 break;
1064 case 5:
1065 sample_rate = SAMPLING_RATE_96KHZ;
1066 break;
1067 case 6:
1068 sample_rate = SAMPLING_RATE_192KHZ;
1069 break;
1070 default:
1071 sample_rate = SAMPLING_RATE_48KHZ;
1072 break;
1073 }
1074 return sample_rate;
1075}
1076
1077static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1078 struct snd_ctl_elem_value *ucontrol)
1079{
1080 int idx = mi2s_get_port_idx(kcontrol);
1081
1082 if (idx < 0)
1083 return idx;
1084
1085 mi2s_rx_cfg[idx].sample_rate =
1086 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1087
1088 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1089 idx, mi2s_rx_cfg[idx].sample_rate,
1090 ucontrol->value.enumerated.item[0]);
1091
1092 return 0;
1093}
1094
1095static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1096 struct snd_ctl_elem_value *ucontrol)
1097{
1098 int idx = mi2s_get_port_idx(kcontrol);
1099
1100 if (idx < 0)
1101 return idx;
1102
1103 ucontrol->value.enumerated.item[0] =
1104 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
1105
1106 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1107 idx, mi2s_rx_cfg[idx].sample_rate,
1108 ucontrol->value.enumerated.item[0]);
1109
1110 return 0;
1111}
1112
1113static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1114 struct snd_ctl_elem_value *ucontrol)
1115{
1116 int idx = mi2s_get_port_idx(kcontrol);
1117
1118 if (idx < 0)
1119 return idx;
1120
1121 mi2s_tx_cfg[idx].sample_rate =
1122 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1123
1124 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1125 idx, mi2s_tx_cfg[idx].sample_rate,
1126 ucontrol->value.enumerated.item[0]);
1127
1128 return 0;
1129}
1130
1131static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1132 struct snd_ctl_elem_value *ucontrol)
1133{
1134 int idx = mi2s_get_port_idx(kcontrol);
1135
1136 if (idx < 0)
1137 return idx;
1138
1139 ucontrol->value.enumerated.item[0] =
1140 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
1141
1142 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1143 idx, mi2s_tx_cfg[idx].sample_rate,
1144 ucontrol->value.enumerated.item[0]);
1145
1146 return 0;
1147}
1148
1149static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
1150 struct snd_ctl_elem_value *ucontrol)
1151{
1152 int idx = mi2s_get_port_idx(kcontrol);
1153
1154 if (idx < 0)
1155 return idx;
1156
1157 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1158 idx, mi2s_rx_cfg[idx].channels);
1159 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
1160
1161 return 0;
1162}
1163
1164static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
1165 struct snd_ctl_elem_value *ucontrol)
1166{
1167 int idx = mi2s_get_port_idx(kcontrol);
1168
1169 if (idx < 0)
1170 return idx;
1171
1172 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
1173 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1174 idx, mi2s_rx_cfg[idx].channels);
1175
1176 return 1;
1177}
1178
1179static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
1180 struct snd_ctl_elem_value *ucontrol)
1181{
1182 int idx = mi2s_get_port_idx(kcontrol);
1183
1184 if (idx < 0)
1185 return idx;
1186
1187 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
1188 idx, mi2s_tx_cfg[idx].channels);
1189 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
1190
1191 return 0;
1192}
1193
1194static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
1195 struct snd_ctl_elem_value *ucontrol)
1196{
1197 int idx = mi2s_get_port_idx(kcontrol);
1198
1199 if (idx < 0)
1200 return idx;
1201
1202 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
1203 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
1204 idx, mi2s_tx_cfg[idx].channels);
1205
1206 return 1;
1207}
1208
1209static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1210 struct snd_ctl_elem_value *ucontrol)
1211{
1212 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1213 usb_rx_cfg.channels);
1214 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1215 return 0;
1216}
1217
1218static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1219 struct snd_ctl_elem_value *ucontrol)
1220{
1221 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1222
1223 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1224 return 1;
1225}
1226
1227static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1228 struct snd_ctl_elem_value *ucontrol)
1229{
1230 int sample_rate_val;
1231
1232 switch (usb_rx_cfg.sample_rate) {
1233 case SAMPLING_RATE_384KHZ:
1234 sample_rate_val = 9;
1235 break;
1236 case SAMPLING_RATE_192KHZ:
1237 sample_rate_val = 8;
1238 break;
1239 case SAMPLING_RATE_96KHZ:
1240 sample_rate_val = 7;
1241 break;
1242 case SAMPLING_RATE_48KHZ:
1243 sample_rate_val = 6;
1244 break;
1245 case SAMPLING_RATE_44P1KHZ:
1246 sample_rate_val = 5;
1247 break;
1248 case SAMPLING_RATE_32KHZ:
1249 sample_rate_val = 4;
1250 break;
1251 case SAMPLING_RATE_22P05KHZ:
1252 sample_rate_val = 3;
1253 break;
1254 case SAMPLING_RATE_16KHZ:
1255 sample_rate_val = 2;
1256 break;
1257 case SAMPLING_RATE_11P025KHZ:
1258 sample_rate_val = 1;
1259 break;
1260 case SAMPLING_RATE_8KHZ:
1261 default:
1262 sample_rate_val = 0;
1263 break;
1264 }
1265
1266 ucontrol->value.integer.value[0] = sample_rate_val;
1267 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1268 usb_rx_cfg.sample_rate);
1269 return 0;
1270}
1271
1272static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1273 struct snd_ctl_elem_value *ucontrol)
1274{
1275 switch (ucontrol->value.integer.value[0]) {
1276 case 9:
1277 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1278 break;
1279 case 8:
1280 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1281 break;
1282 case 7:
1283 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1284 break;
1285 case 6:
1286 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1287 break;
1288 case 5:
1289 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1290 break;
1291 case 4:
1292 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1293 break;
1294 case 3:
1295 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1296 break;
1297 case 2:
1298 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1299 break;
1300 case 1:
1301 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1302 break;
1303 case 0:
1304 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1305 break;
1306 default:
1307 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1308 break;
1309 }
1310
1311 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1312 __func__, ucontrol->value.integer.value[0],
1313 usb_rx_cfg.sample_rate);
1314 return 0;
1315}
1316
1317static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1318 struct snd_ctl_elem_value *ucontrol)
1319{
1320 switch (usb_rx_cfg.bit_format) {
1321 case SNDRV_PCM_FORMAT_S32_LE:
1322 ucontrol->value.integer.value[0] = 3;
1323 break;
1324 case SNDRV_PCM_FORMAT_S24_3LE:
1325 ucontrol->value.integer.value[0] = 2;
1326 break;
1327 case SNDRV_PCM_FORMAT_S24_LE:
1328 ucontrol->value.integer.value[0] = 1;
1329 break;
1330 case SNDRV_PCM_FORMAT_S16_LE:
1331 default:
1332 ucontrol->value.integer.value[0] = 0;
1333 break;
1334 }
1335
1336 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1337 __func__, usb_rx_cfg.bit_format,
1338 ucontrol->value.integer.value[0]);
1339 return 0;
1340}
1341
1342static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1343 struct snd_ctl_elem_value *ucontrol)
1344{
1345 int rc = 0;
1346
1347 switch (ucontrol->value.integer.value[0]) {
1348 case 3:
1349 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1350 break;
1351 case 2:
1352 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1353 break;
1354 case 1:
1355 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1356 break;
1357 case 0:
1358 default:
1359 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1360 break;
1361 }
1362 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1363 __func__, usb_rx_cfg.bit_format,
1364 ucontrol->value.integer.value[0]);
1365
1366 return rc;
1367}
1368
1369static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1370 struct snd_ctl_elem_value *ucontrol)
1371{
1372 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1373 usb_tx_cfg.channels);
1374 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1375 return 0;
1376}
1377
1378static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1379 struct snd_ctl_elem_value *ucontrol)
1380{
1381 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1382
1383 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1384 return 1;
1385}
1386
1387static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1388 struct snd_ctl_elem_value *ucontrol)
1389{
1390 int sample_rate_val;
1391
1392 switch (usb_tx_cfg.sample_rate) {
1393 case SAMPLING_RATE_384KHZ:
1394 sample_rate_val = 9;
1395 break;
1396 case SAMPLING_RATE_192KHZ:
1397 sample_rate_val = 8;
1398 break;
1399 case SAMPLING_RATE_96KHZ:
1400 sample_rate_val = 7;
1401 break;
1402 case SAMPLING_RATE_48KHZ:
1403 sample_rate_val = 6;
1404 break;
1405 case SAMPLING_RATE_44P1KHZ:
1406 sample_rate_val = 5;
1407 break;
1408 case SAMPLING_RATE_32KHZ:
1409 sample_rate_val = 4;
1410 break;
1411 case SAMPLING_RATE_22P05KHZ:
1412 sample_rate_val = 3;
1413 break;
1414 case SAMPLING_RATE_16KHZ:
1415 sample_rate_val = 2;
1416 break;
1417 case SAMPLING_RATE_11P025KHZ:
1418 sample_rate_val = 1;
1419 break;
1420 case SAMPLING_RATE_8KHZ:
1421 sample_rate_val = 0;
1422 break;
1423 default:
1424 sample_rate_val = 6;
1425 break;
1426 }
1427
1428 ucontrol->value.integer.value[0] = sample_rate_val;
1429 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1430 usb_tx_cfg.sample_rate);
1431 return 0;
1432}
1433
1434static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1435 struct snd_ctl_elem_value *ucontrol)
1436{
1437 switch (ucontrol->value.integer.value[0]) {
1438 case 9:
1439 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1440 break;
1441 case 8:
1442 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1443 break;
1444 case 7:
1445 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1446 break;
1447 case 6:
1448 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1449 break;
1450 case 5:
1451 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1452 break;
1453 case 4:
1454 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1455 break;
1456 case 3:
1457 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1458 break;
1459 case 2:
1460 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1461 break;
1462 case 1:
1463 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1464 break;
1465 case 0:
1466 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1467 break;
1468 default:
1469 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1470 break;
1471 }
1472
1473 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1474 __func__, ucontrol->value.integer.value[0],
1475 usb_tx_cfg.sample_rate);
1476 return 0;
1477}
1478
1479static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1480 struct snd_ctl_elem_value *ucontrol)
1481{
1482 switch (usb_tx_cfg.bit_format) {
1483 case SNDRV_PCM_FORMAT_S32_LE:
1484 ucontrol->value.integer.value[0] = 3;
1485 break;
1486 case SNDRV_PCM_FORMAT_S24_3LE:
1487 ucontrol->value.integer.value[0] = 2;
1488 break;
1489 case SNDRV_PCM_FORMAT_S24_LE:
1490 ucontrol->value.integer.value[0] = 1;
1491 break;
1492 case SNDRV_PCM_FORMAT_S16_LE:
1493 default:
1494 ucontrol->value.integer.value[0] = 0;
1495 break;
1496 }
1497
1498 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1499 __func__, usb_tx_cfg.bit_format,
1500 ucontrol->value.integer.value[0]);
1501 return 0;
1502}
1503
1504static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1505 struct snd_ctl_elem_value *ucontrol)
1506{
1507 int rc = 0;
1508
1509 switch (ucontrol->value.integer.value[0]) {
1510 case 3:
1511 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1512 break;
1513 case 2:
1514 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1515 break;
1516 case 1:
1517 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1518 break;
1519 case 0:
1520 default:
1521 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1522 break;
1523 }
1524 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1525 __func__, usb_tx_cfg.bit_format,
1526 ucontrol->value.integer.value[0]);
1527
1528 return rc;
1529}
1530
1531const struct snd_kcontrol_new msm_common_snd_controls[] = {
1532 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
1533 proxy_rx_ch_get, proxy_rx_ch_put),
1534 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
1535 aux_pcm_rx_sample_rate_get,
1536 aux_pcm_rx_sample_rate_put),
1537 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
1538 aux_pcm_rx_sample_rate_get,
1539 aux_pcm_rx_sample_rate_put),
1540 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
1541 aux_pcm_rx_sample_rate_get,
1542 aux_pcm_rx_sample_rate_put),
1543 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
1544 aux_pcm_rx_sample_rate_get,
1545 aux_pcm_rx_sample_rate_put),
1546 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
1547 aux_pcm_tx_sample_rate_get,
1548 aux_pcm_tx_sample_rate_put),
1549 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
1550 aux_pcm_tx_sample_rate_get,
1551 aux_pcm_tx_sample_rate_put),
1552 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
1553 aux_pcm_tx_sample_rate_get,
1554 aux_pcm_tx_sample_rate_put),
1555 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
1556 aux_pcm_tx_sample_rate_get,
1557 aux_pcm_tx_sample_rate_put),
1558 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
1559 mi2s_rx_sample_rate_get,
1560 mi2s_rx_sample_rate_put),
1561 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
1562 mi2s_rx_sample_rate_get,
1563 mi2s_rx_sample_rate_put),
1564 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
1565 mi2s_rx_sample_rate_get,
1566 mi2s_rx_sample_rate_put),
1567 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
1568 mi2s_rx_sample_rate_get,
1569 mi2s_rx_sample_rate_put),
1570 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
1571 mi2s_tx_sample_rate_get,
1572 mi2s_tx_sample_rate_put),
1573 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
1574 mi2s_tx_sample_rate_get,
1575 mi2s_tx_sample_rate_put),
1576 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
1577 mi2s_tx_sample_rate_get,
1578 mi2s_tx_sample_rate_put),
1579 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
1580 mi2s_tx_sample_rate_get,
1581 mi2s_tx_sample_rate_put),
1582 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
1583 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1584 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
1585 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1586 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
1587 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1588 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
1589 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1590 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
1591 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1592 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
1593 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1594 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
1595 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1596 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
1597 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1598 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
1599 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
1600 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
1601 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
1602 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
1603 usb_audio_rx_format_get, usb_audio_rx_format_put),
1604 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
1605 usb_audio_tx_format_get, usb_audio_tx_format_put),
1606 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
1607 usb_audio_rx_sample_rate_get,
1608 usb_audio_rx_sample_rate_put),
1609 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
1610 usb_audio_tx_sample_rate_get,
1611 usb_audio_tx_sample_rate_put),
1612 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1613 tdm_rx_sample_rate_get,
1614 tdm_rx_sample_rate_put),
1615 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1616 tdm_tx_sample_rate_get,
1617 tdm_tx_sample_rate_put),
1618 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
1619 tdm_rx_format_get,
1620 tdm_rx_format_put),
1621 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
1622 tdm_tx_format_get,
1623 tdm_tx_format_put),
1624 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
1625 tdm_rx_ch_get,
1626 tdm_rx_ch_put),
1627 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
1628 tdm_tx_ch_get,
1629 tdm_tx_ch_put),
1630 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1631 tdm_rx_sample_rate_get,
1632 tdm_rx_sample_rate_put),
1633 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1634 tdm_tx_sample_rate_get,
1635 tdm_tx_sample_rate_put),
1636 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
1637 tdm_rx_format_get,
1638 tdm_rx_format_put),
1639 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
1640 tdm_tx_format_get,
1641 tdm_tx_format_put),
1642 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
1643 tdm_rx_ch_get,
1644 tdm_rx_ch_put),
1645 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
1646 tdm_tx_ch_get,
1647 tdm_tx_ch_put),
1648 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1649 tdm_rx_sample_rate_get,
1650 tdm_rx_sample_rate_put),
1651 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1652 tdm_tx_sample_rate_get,
1653 tdm_tx_sample_rate_put),
1654 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
1655 tdm_rx_format_get,
1656 tdm_rx_format_put),
1657 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
1658 tdm_tx_format_get,
1659 tdm_tx_format_put),
1660 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
1661 tdm_rx_ch_get,
1662 tdm_rx_ch_put),
1663 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
1664 tdm_tx_ch_get,
1665 tdm_tx_ch_put),
1666 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1667 tdm_rx_sample_rate_get,
1668 tdm_rx_sample_rate_put),
1669 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1670 tdm_tx_sample_rate_get,
1671 tdm_tx_sample_rate_put),
1672 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
1673 tdm_rx_format_get,
1674 tdm_rx_format_put),
1675 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
1676 tdm_tx_format_get,
1677 tdm_tx_format_put),
1678 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
1679 tdm_rx_ch_get,
1680 tdm_rx_ch_put),
1681 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
1682 tdm_tx_ch_get,
1683 tdm_tx_ch_put),
1684};
1685
Laxminath Kasam35a610e2016-12-30 15:02:33 +05301686/**
1687 * msm_common_snd_controls_size - to return controls size
1688 *
1689 * Return: returns size of common controls array
1690 */
1691int msm_common_snd_controls_size(void)
1692{
1693 return ARRAY_SIZE(msm_common_snd_controls);
1694}
1695EXPORT_SYMBOL(msm_common_snd_controls_size);
1696
Banajit Goswami0530e2f2016-12-09 21:34:37 -08001697static inline int param_is_mask(int p)
1698{
1699 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
1700 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
1701}
1702
1703static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
1704 int n)
1705{
1706 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
1707}
1708
1709static void param_set_mask(struct snd_pcm_hw_params *p, int n, unsigned int bit)
1710{
1711 if (bit >= SNDRV_MASK_MAX)
1712 return;
1713 if (param_is_mask(n)) {
1714 struct snd_mask *m = param_to_mask(p, n);
1715
1716 m->bits[0] = 0;
1717 m->bits[1] = 0;
1718 m->bits[bit >> 5] |= (1 << (bit & 31));
1719 }
1720}
1721
1722/**
1723 * msm_common_be_hw_params_fixup - updates settings of ALSA BE hw params.
1724 *
1725 * @rtd: runtime dailink instance
1726 * @params: HW params of associated backend dailink.
1727 *
1728 * Returns 0.
1729 */
1730int msm_common_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
1731 struct snd_pcm_hw_params *params)
1732{
1733 struct snd_soc_dai_link *dai_link = rtd->dai_link;
1734 struct snd_interval *rate = hw_param_interval(params,
1735 SNDRV_PCM_HW_PARAM_RATE);
1736 struct snd_interval *channels = hw_param_interval(params,
1737 SNDRV_PCM_HW_PARAM_CHANNELS);
1738 int rc = 0;
1739
1740 pr_debug("%s: format = %d, rate = %d\n",
1741 __func__, params_format(params), params_rate(params));
1742
1743 switch (dai_link->be_id) {
1744 case MSM_BACKEND_DAI_USB_RX:
1745 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1746 usb_rx_cfg.bit_format);
1747 rate->min = rate->max = usb_rx_cfg.sample_rate;
1748 channels->min = channels->max = usb_rx_cfg.channels;
1749 break;
1750
1751 case MSM_BACKEND_DAI_USB_TX:
1752 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1753 usb_tx_cfg.bit_format);
1754 rate->min = rate->max = usb_tx_cfg.sample_rate;
1755 channels->min = channels->max = usb_tx_cfg.channels;
1756 break;
1757
1758 case MSM_BACKEND_DAI_AFE_PCM_RX:
1759 channels->min = channels->max = proxy_rx_cfg.channels;
1760 rate->min = rate->max = SAMPLING_RATE_48KHZ;
1761 break;
1762
1763 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
1764 channels->min = channels->max =
1765 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
1766 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1767 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
1768 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
1769 break;
1770
1771 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
1772 channels->min = channels->max =
1773 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
1774 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1775 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
1776 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
1777 break;
1778
1779 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
1780 channels->min = channels->max =
1781 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
1782 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1783 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
1784 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
1785 break;
1786
1787 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
1788 channels->min = channels->max =
1789 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
1790 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1791 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
1792 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
1793 break;
1794
1795 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
1796 channels->min = channels->max =
1797 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
1798 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1799 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
1800 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
1801 break;
1802
1803 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
1804 channels->min = channels->max =
1805 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
1806 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1807 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
1808 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
1809 break;
1810
1811 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
1812 channels->min = channels->max =
1813 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
1814 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1815 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
1816 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
1817 break;
1818
1819 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
1820 channels->min = channels->max =
1821 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
1822 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1823 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
1824 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
1825 break;
1826
1827 case MSM_BACKEND_DAI_AUXPCM_RX:
1828 rate->min = rate->max =
1829 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
1830 channels->min = channels->max =
1831 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
1832 break;
1833
1834 case MSM_BACKEND_DAI_AUXPCM_TX:
1835 rate->min = rate->max =
1836 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
1837 channels->min = channels->max =
1838 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
1839 break;
1840
1841 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
1842 rate->min = rate->max =
1843 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
1844 channels->min = channels->max =
1845 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
1846 break;
1847
1848 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
1849 rate->min = rate->max =
1850 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
1851 channels->min = channels->max =
1852 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
1853 break;
1854
1855 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
1856 rate->min = rate->max =
1857 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
1858 channels->min = channels->max =
1859 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
1860 break;
1861
1862 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
1863 rate->min = rate->max =
1864 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
1865 channels->min = channels->max =
1866 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
1867 break;
1868
1869 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
1870 rate->min = rate->max =
1871 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
1872 channels->min = channels->max =
1873 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
1874 break;
1875
1876 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
1877 rate->min = rate->max =
1878 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
1879 channels->min = channels->max =
1880 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
1881 break;
1882
1883 case MSM_BACKEND_DAI_PRI_MI2S_RX:
1884 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
1885 channels->min = channels->max =
1886 mi2s_rx_cfg[PRIM_MI2S].channels;
1887 break;
1888
1889 case MSM_BACKEND_DAI_PRI_MI2S_TX:
1890 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
1891 channels->min = channels->max =
1892 mi2s_tx_cfg[PRIM_MI2S].channels;
1893 break;
1894
1895 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
1896 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
1897 channels->min = channels->max =
1898 mi2s_rx_cfg[SEC_MI2S].channels;
1899 break;
1900
1901 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
1902 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
1903 channels->min = channels->max =
1904 mi2s_tx_cfg[SEC_MI2S].channels;
1905 break;
1906
1907 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
1908 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
1909 channels->min = channels->max =
1910 mi2s_rx_cfg[TERT_MI2S].channels;
1911 break;
1912
1913 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
1914 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
1915 channels->min = channels->max =
1916 mi2s_tx_cfg[TERT_MI2S].channels;
1917 break;
1918
1919 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
1920 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
1921 channels->min = channels->max =
1922 mi2s_rx_cfg[QUAT_MI2S].channels;
1923 break;
1924
1925 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
1926 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
1927 channels->min = channels->max =
1928 mi2s_tx_cfg[QUAT_MI2S].channels;
1929 break;
1930
1931 default:
1932 rate->min = rate->max = SAMPLING_RATE_48KHZ;
1933 break;
1934 }
1935 return rc;
1936}
1937EXPORT_SYMBOL(msm_common_be_hw_params_fixup);
1938
1939/**
1940 * msm_aux_pcm_snd_startup - startup ops of auxpcm.
1941 *
1942 * @substream: PCM stream pointer of associated backend dailink
1943 *
1944 * Returns 0 on success or -EINVAL on error.
1945 */
1946int msm_aux_pcm_snd_startup(struct snd_pcm_substream *substream)
1947{
1948 int ret = 0;
1949 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1950 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
1951 int index = cpu_dai->id - 1;
1952 return ret = 0;
1953
1954 dev_dbg(rtd->card->dev,
1955 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
1956 __func__, substream->name, substream->stream,
1957 cpu_dai->name, cpu_dai->id);
1958
1959 if (index < PRIM_AUX_PCM || index > QUAT_AUX_PCM) {
1960 ret = -EINVAL;
1961 dev_err(rtd->card->dev,
1962 "%s: CPU DAI id (%d) out of range\n",
1963 __func__, cpu_dai->id);
1964 goto done;
1965 }
1966
1967 mutex_lock(&auxpcm_intf_conf[index].lock);
1968 if (++auxpcm_intf_conf[index].ref_cnt == 1) {
1969 if (mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr != NULL) {
1970 mutex_lock(&mi2s_auxpcm_conf[index].lock);
1971 iowrite32(1,
1972 mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr);
1973 mutex_unlock(&mi2s_auxpcm_conf[index].lock);
1974 } else {
1975 dev_err(rtd->card->dev,
1976 "%s lpaif_tert_muxsel_virt_addr is NULL\n",
1977 __func__);
1978 ret = -EINVAL;
1979 }
1980 }
Xiaoyu Ye1a2d8bd92017-01-31 18:54:15 -08001981 if (ret < 0)
Banajit Goswami0530e2f2016-12-09 21:34:37 -08001982 auxpcm_intf_conf[index].ref_cnt--;
1983
1984 mutex_unlock(&auxpcm_intf_conf[index].lock);
1985
1986done:
1987 return ret;
1988}
1989EXPORT_SYMBOL(msm_aux_pcm_snd_startup);
1990
1991/**
1992 * msm_aux_pcm_snd_shutdown - shutdown ops of auxpcm.
1993 *
1994 * @substream: PCM stream pointer of associated backend dailink
1995 */
1996void msm_aux_pcm_snd_shutdown(struct snd_pcm_substream *substream)
1997{
1998 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1999 int index = rtd->cpu_dai->id - 1;
2000
2001 dev_dbg(rtd->card->dev,
2002 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
2003 __func__,
2004 substream->name, substream->stream,
2005 rtd->cpu_dai->name, rtd->cpu_dai->id);
2006
2007 if (index < PRIM_AUX_PCM || index > QUAT_AUX_PCM) {
2008 dev_err(rtd->card->dev,
2009 "%s: CPU DAI id (%d) out of range\n",
2010 __func__, rtd->cpu_dai->id);
2011 return;
2012 }
2013
2014 mutex_lock(&auxpcm_intf_conf[index].lock);
2015 if (--auxpcm_intf_conf[index].ref_cnt == 0) {
2016 if (mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr != NULL) {
2017 mutex_lock(&mi2s_auxpcm_conf[index].lock);
2018 iowrite32(0,
2019 mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr);
2020 mutex_unlock(&mi2s_auxpcm_conf[index].lock);
2021 } else {
2022 dev_err(rtd->card->dev,
2023 "%s lpaif_tert_muxsel_virt_addr is NULL\n",
2024 __func__);
2025 auxpcm_intf_conf[index].ref_cnt++;
2026 }
2027 }
2028 mutex_unlock(&auxpcm_intf_conf[index].lock);
2029}
2030EXPORT_SYMBOL(msm_aux_pcm_snd_shutdown);
2031
2032static int msm_get_port_id(int be_id)
2033{
2034 int afe_port_id;
2035
2036 switch (be_id) {
2037 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2038 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2039 break;
2040 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2041 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2042 break;
2043 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2044 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2045 break;
2046 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2047 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2048 break;
2049 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2050 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2051 break;
2052 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2053 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2054 break;
2055 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2056 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2057 break;
2058 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2059 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2060 break;
2061 default:
2062 pr_err("%s: Invalid be_id: %d\n", __func__, be_id);
2063 afe_port_id = -EINVAL;
2064 }
2065
2066 return afe_port_id;
2067}
2068
2069static u32 get_mi2s_bits_per_sample(u32 bit_format)
2070{
2071 u32 bit_per_sample;
2072
2073 switch (bit_format) {
2074 case SNDRV_PCM_FORMAT_S24_3LE:
2075 case SNDRV_PCM_FORMAT_S24_LE:
2076 bit_per_sample = 32;
2077 break;
2078 case SNDRV_PCM_FORMAT_S16_LE:
2079 default:
2080 bit_per_sample = 16;
2081 break;
2082 }
2083
2084 return bit_per_sample;
2085}
2086
2087static void update_mi2s_clk_val(int dai_id, int stream)
2088{
2089 u32 bit_per_sample;
2090
2091 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2092 bit_per_sample =
2093 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2094 mi2s_clk[dai_id].clk_freq_in_hz =
2095 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2096 } else {
2097 bit_per_sample =
2098 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2099 mi2s_clk[dai_id].clk_freq_in_hz =
2100 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2101 }
2102
2103 if (!mi2s_intf_conf[dai_id].msm_is_mi2s_master)
2104 mi2s_clk[dai_id].clk_freq_in_hz = 0;
2105}
2106
2107static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2108{
2109 int ret = 0;
2110 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2111 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2112 int port_id = 0;
2113 int index = cpu_dai->id;
2114
2115 port_id = msm_get_port_id(rtd->dai_link->be_id);
Xiaoyu Ye1a2d8bd92017-01-31 18:54:15 -08002116 if (port_id < 0) {
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002117 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2118 ret = port_id;
2119 goto done;
2120 }
2121
2122 if (enable) {
2123 update_mi2s_clk_val(index, substream->stream);
2124 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2125 mi2s_clk[index].clk_freq_in_hz);
2126 }
2127
2128 mi2s_clk[index].enable = enable;
2129 ret = afe_set_lpass_clock_v2(port_id,
2130 &mi2s_clk[index]);
2131 if (ret < 0) {
2132 dev_err(rtd->card->dev,
2133 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2134 __func__, port_id, ret);
2135 goto done;
2136 }
2137
2138done:
2139 return ret;
2140}
2141
2142/**
2143 * msm_mi2s_snd_startup - startup ops of mi2s.
2144 *
2145 * @substream: PCM stream pointer of associated backend dailink
2146 *
2147 * Returns 0 on success or -EINVAL on error.
2148 */
2149int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
2150{
2151 int ret = 0;
2152 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2153 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
Tanya Dixit73a3a262016-12-08 22:25:56 +05302154 int port_id = msm_get_port_id(rtd->dai_link->be_id);
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002155 int index = cpu_dai->id;
2156 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
2157
2158 dev_dbg(rtd->card->dev,
2159 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
2160 __func__, substream->name, substream->stream,
2161 cpu_dai->name, cpu_dai->id);
2162
2163 if (index < PRIM_MI2S || index > QUAT_MI2S) {
2164 ret = -EINVAL;
2165 dev_err(rtd->card->dev,
2166 "%s: CPU DAI id (%d) out of range\n",
2167 __func__, cpu_dai->id);
2168 goto done;
2169 }
2170 /*
2171 * Muxtex protection in case the same MI2S
2172 * interface using for both TX and RX so
2173 * that the same clock won't be enable twice.
2174 */
2175 mutex_lock(&mi2s_intf_conf[index].lock);
2176 if (++mi2s_intf_conf[index].ref_cnt == 1) {
Tanya Dixit73a3a262016-12-08 22:25:56 +05302177 /* Check if msm needs to provide the clock to the interface */
2178 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
2179 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
2180 fmt = SND_SOC_DAIFMT_CBM_CFM;
2181 }
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002182 ret = msm_mi2s_set_sclk(substream, true);
Xiaoyu Ye1a2d8bd92017-01-31 18:54:15 -08002183 if (ret < 0) {
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002184 dev_err(rtd->card->dev,
2185 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
2186 __func__, ret);
2187 goto clean_up;
2188 }
2189 if (mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr != NULL) {
2190 mutex_lock(&mi2s_auxpcm_conf[index].lock);
2191 iowrite32(0,
2192 mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr);
2193 mutex_unlock(&mi2s_auxpcm_conf[index].lock);
2194 } else {
2195 dev_err(rtd->card->dev,
2196 "%s lpaif_muxsel_virt_addr is NULL for dai %d\n",
2197 __func__, index);
2198 ret = -EINVAL;
2199 goto clk_off;
2200 }
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002201 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
Xiaoyu Ye1a2d8bd92017-01-31 18:54:15 -08002202 if (ret < 0) {
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002203 dev_err(rtd->card->dev,
2204 "%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
2205 __func__, index, ret);
2206 goto clk_off;
2207 }
Tanya Dixit73a3a262016-12-08 22:25:56 +05302208 if (mi2s_intf_conf[index].msm_is_ext_mclk) {
2209 mi2s_mclk[index].enable = 1;
2210 pr_debug("%s: Enabling mclk, clk_freq_in_hz = %u\n",
2211 __func__, mi2s_mclk[index].clk_freq_in_hz);
2212 ret = afe_set_lpass_clock_v2(port_id,
2213 &mi2s_mclk[index]);
2214 if (ret < 0) {
2215 pr_err("%s: afe lpass mclk failed, err:%d\n",
2216 __func__, ret);
2217 goto clk_off;
2218 }
2219 }
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002220 }
Tanya Dixit73a3a262016-12-08 22:25:56 +05302221 mutex_unlock(&mi2s_intf_conf[index].lock);
2222 return 0;
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002223clk_off:
Xiaoyu Ye1a2d8bd92017-01-31 18:54:15 -08002224 if (ret < 0)
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002225 msm_mi2s_set_sclk(substream, false);
2226clean_up:
Xiaoyu Ye1a2d8bd92017-01-31 18:54:15 -08002227 if (ret < 0)
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002228 mi2s_intf_conf[index].ref_cnt--;
2229 mutex_unlock(&mi2s_intf_conf[index].lock);
2230done:
2231 return ret;
2232}
2233EXPORT_SYMBOL(msm_mi2s_snd_startup);
2234
2235/**
2236 * msm_mi2s_snd_shutdown - shutdown ops of mi2s.
2237 *
2238 * @substream: PCM stream pointer of associated backend dailink
2239 */
2240void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
2241{
2242 int ret;
2243 struct snd_soc_pcm_runtime *rtd = substream->private_data;
Tanya Dixit73a3a262016-12-08 22:25:56 +05302244 int port_id = msm_get_port_id(rtd->dai_link->be_id);
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002245 int index = rtd->cpu_dai->id;
2246
2247 pr_debug("%s(): substream = %s stream = %d\n", __func__,
2248 substream->name, substream->stream);
2249 if (index < PRIM_MI2S || index > QUAT_MI2S) {
2250 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
2251 return;
2252 }
2253
2254 mutex_lock(&mi2s_intf_conf[index].lock);
2255 if (--mi2s_intf_conf[index].ref_cnt == 0) {
2256 ret = msm_mi2s_set_sclk(substream, false);
2257 if (ret < 0) {
2258 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
2259 __func__, index, ret);
2260 mi2s_intf_conf[index].ref_cnt++;
2261 }
Tanya Dixit73a3a262016-12-08 22:25:56 +05302262 if (mi2s_intf_conf[index].msm_is_ext_mclk) {
2263 mi2s_mclk[index].enable = 0;
2264 pr_debug("%s: Disabling mclk, clk_freq_in_hz = %u\n",
2265 __func__, mi2s_mclk[index].clk_freq_in_hz);
2266 ret = afe_set_lpass_clock_v2(port_id,
2267 &mi2s_mclk[index]);
2268 if (ret < 0) {
2269 pr_err("%s: mclk disable failed for MCLK (%d); ret=%d\n",
2270 __func__, index, ret);
2271 }
2272 }
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002273 }
2274 mutex_unlock(&mi2s_intf_conf[index].lock);
2275}
2276EXPORT_SYMBOL(msm_mi2s_snd_shutdown);
2277
2278/* Validate whether US EU switch is present or not */
2279static int msm_prepare_us_euro(struct snd_soc_card *card)
2280{
2281 struct msm_asoc_mach_data *pdata =
2282 snd_soc_card_get_drvdata(card);
2283 int ret = 0;
2284
2285 if (pdata->us_euro_gpio >= 0) {
2286 dev_dbg(card->dev, "%s: us_euro gpio request %d", __func__,
2287 pdata->us_euro_gpio);
2288 ret = gpio_request(pdata->us_euro_gpio, "TASHA_CODEC_US_EURO");
2289 if (ret) {
2290 dev_err(card->dev,
2291 "%s: Failed to request codec US/EURO gpio %d error %d\n",
2292 __func__, pdata->us_euro_gpio, ret);
2293 }
2294 }
2295
2296 return ret;
2297}
2298
2299static bool msm_swap_gnd_mic(struct snd_soc_codec *codec)
2300{
2301 struct snd_soc_card *card = codec->component.card;
2302 struct msm_asoc_mach_data *pdata =
2303 snd_soc_card_get_drvdata(card);
2304 int value = 0;
2305
2306 if (pdata->us_euro_gpio_p) {
2307 value = msm_cdc_pinctrl_get_state(pdata->us_euro_gpio_p);
2308 if (value)
2309 msm_cdc_pinctrl_select_sleep_state(
2310 pdata->us_euro_gpio_p);
2311 else
2312 msm_cdc_pinctrl_select_active_state(
2313 pdata->us_euro_gpio_p);
2314 } else if (pdata->us_euro_gpio >= 0) {
2315 value = gpio_get_value_cansleep(pdata->us_euro_gpio);
2316 gpio_set_value_cansleep(pdata->us_euro_gpio, !value);
2317 }
2318 pr_debug("%s: swap select switch %d to %d\n", __func__, value, !value);
2319 return true;
2320}
2321
2322static int msm_populate_dai_link_component_of_node(
Laxminath Kasame68e94f2016-12-09 12:08:00 +05302323 struct msm_asoc_mach_data *pdata,
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002324 struct snd_soc_card *card)
2325{
2326 int i, index, ret = 0;
2327 struct device *cdev = card->dev;
2328 struct snd_soc_dai_link *dai_link = card->dai_link;
2329 struct device_node *phandle;
2330
2331 if (!cdev) {
2332 pr_err("%s: Sound card device memory NULL\n", __func__);
2333 return -ENODEV;
2334 }
2335
2336 for (i = 0; i < card->num_links; i++) {
2337 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
2338 continue;
2339
2340 /* populate platform_of_node for snd card dai links */
2341 if (dai_link[i].platform_name &&
2342 !dai_link[i].platform_of_node) {
2343 index = of_property_match_string(cdev->of_node,
2344 "asoc-platform-names",
2345 dai_link[i].platform_name);
2346 if (index < 0) {
2347 pr_err("%s: No match found for platform name: %s\n",
2348 __func__, dai_link[i].platform_name);
2349 ret = index;
2350 goto cpu_dai;
2351 }
2352 phandle = of_parse_phandle(cdev->of_node,
2353 "asoc-platform",
2354 index);
2355 if (!phandle) {
2356 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
2357 __func__, dai_link[i].platform_name,
2358 index);
2359 ret = -ENODEV;
2360 goto err;
2361 }
2362 dai_link[i].platform_of_node = phandle;
2363 dai_link[i].platform_name = NULL;
2364 }
2365cpu_dai:
2366 /* populate cpu_of_node for snd card dai links */
2367 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
2368 index = of_property_match_string(cdev->of_node,
2369 "asoc-cpu-names",
2370 dai_link[i].cpu_dai_name);
2371 if (index < 0)
2372 goto codec_dai;
2373 phandle = of_parse_phandle(cdev->of_node, "asoc-cpu",
2374 index);
2375 if (!phandle) {
2376 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
2377 __func__, dai_link[i].cpu_dai_name);
2378 ret = -ENODEV;
2379 goto err;
2380 }
2381 dai_link[i].cpu_of_node = phandle;
2382 dai_link[i].cpu_dai_name = NULL;
2383 }
2384codec_dai:
2385 /* populate codec_of_node for snd card dai links */
2386 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
2387 index = of_property_match_string(cdev->of_node,
2388 "asoc-codec-names",
2389 dai_link[i].codec_name);
2390 if (index < 0)
2391 continue;
2392 phandle = of_parse_phandle(cdev->of_node, "asoc-codec",
2393 index);
2394 if (!phandle) {
2395 pr_err("%s: retrieving phandle for codec dai %s failed\n",
2396 __func__, dai_link[i].codec_name);
2397 ret = -ENODEV;
2398 goto err;
2399 }
2400 dai_link[i].codec_of_node = phandle;
2401 dai_link[i].codec_name = NULL;
2402 }
Laxminath Kasamad0f6962016-12-14 20:00:35 +05302403 if (pdata->snd_card_val == INT_SND_CARD) {
Laxminath Kasame68e94f2016-12-09 12:08:00 +05302404 if ((dai_link[i].be_id ==
2405 MSM_BACKEND_DAI_INT0_MI2S_RX) ||
2406 (dai_link[i].be_id ==
2407 MSM_BACKEND_DAI_INT1_MI2S_RX) ||
2408 (dai_link[i].be_id ==
2409 MSM_BACKEND_DAI_INT2_MI2S_TX) ||
2410 (dai_link[i].be_id ==
2411 MSM_BACKEND_DAI_INT3_MI2S_TX)) {
2412 index = of_property_match_string(cdev->of_node,
2413 "asoc-codec-names",
2414 MSM_INT_DIGITAL_CODEC);
2415 phandle = of_parse_phandle(cdev->of_node,
2416 "asoc-codec",
2417 index);
2418 dai_link[i].codecs[DIG_CDC].of_node = phandle;
2419 index = of_property_match_string(cdev->of_node,
2420 "asoc-codec-names",
2421 PMIC_INT_ANALOG_CODEC);
2422 phandle = of_parse_phandle(cdev->of_node,
2423 "asoc-codec",
2424 index);
2425 dai_link[i].codecs[ANA_CDC].of_node = phandle;
2426 }
2427 }
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002428 }
2429err:
2430 return ret;
2431}
2432
2433static int msm_wsa881x_init(struct snd_soc_component *component)
2434{
2435 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {100, 101, 102, 106};
2436 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {103, 104, 105, 107};
2437 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
2438 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
2439 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
2440 struct msm_asoc_mach_data *pdata;
2441 struct snd_soc_dapm_context *dapm =
2442 snd_soc_codec_get_dapm(codec);
2443
2444 if (!codec) {
2445 pr_err("%s codec is NULL\n", __func__);
2446 return -EINVAL;
2447 }
2448
2449 if (!strcmp(component->name_prefix, "SpkrLeft")) {
2450 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
2451 __func__, codec->component.name);
2452 wsa881x_set_channel_map(codec, &spkleft_ports[0],
2453 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
2454 &ch_rate[0]);
2455 if (dapm->component) {
2456 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
2457 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
2458 }
2459 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
2460 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
2461 __func__, codec->component.name);
2462 wsa881x_set_channel_map(codec, &spkright_ports[0],
2463 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
2464 &ch_rate[0]);
2465 if (dapm->component) {
2466 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
2467 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
2468 }
2469 } else {
2470 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
2471 codec->component.name);
2472 return -EINVAL;
2473 }
2474
2475
2476 pdata = snd_soc_card_get_drvdata(component->card);
2477 if (pdata && pdata->codec_root)
2478 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
2479 codec);
2480 return 0;
2481}
2482
2483
2484static int msm_init_wsa_dev(struct platform_device *pdev,
2485 struct snd_soc_card *card)
2486{
2487 struct device_node *wsa_of_node;
2488 u32 wsa_max_devs;
2489 u32 wsa_dev_cnt;
2490 char *dev_name_str = NULL;
2491 struct msm_wsa881x_dev_info *wsa881x_dev_info;
2492 const char *wsa_auxdev_name_prefix[1];
2493 int found = 0;
2494 int i;
2495 int ret;
2496
2497 /* Get maximum WSA device count for this platform */
2498 ret = of_property_read_u32(pdev->dev.of_node,
2499 "qcom,wsa-max-devs", &wsa_max_devs);
2500 if (ret) {
2501 dev_dbg(&pdev->dev,
2502 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
2503 __func__, pdev->dev.of_node->full_name, ret);
2504 goto err_dt;
2505 }
2506 if (wsa_max_devs == 0) {
2507 dev_warn(&pdev->dev,
2508 "%s: Max WSA devices is 0 for this target?\n",
2509 __func__);
2510 goto err_dt;
2511 }
2512
2513 /* Get count of WSA device phandles for this platform */
2514 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
2515 "qcom,wsa-devs", NULL);
2516 if (wsa_dev_cnt == -ENOENT) {
2517 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
2518 __func__);
2519 goto err_dt;
2520 } else if (wsa_dev_cnt <= 0) {
2521 dev_err(&pdev->dev,
2522 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
2523 __func__, wsa_dev_cnt);
2524 ret = -EINVAL;
2525 goto err_dt;
2526 }
2527
2528 /*
2529 * Expect total phandles count to be NOT less than maximum possible
2530 * WSA count. However, if it is less, then assign same value to
2531 * max count as well.
2532 */
2533 if (wsa_dev_cnt < wsa_max_devs) {
2534 dev_dbg(&pdev->dev,
2535 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
2536 __func__, wsa_max_devs, wsa_dev_cnt);
2537 wsa_max_devs = wsa_dev_cnt;
2538 }
2539
2540 /* Make sure prefix string passed for each WSA device */
2541 ret = of_property_count_strings(pdev->dev.of_node,
2542 "qcom,wsa-aux-dev-prefix");
2543 if (ret != wsa_dev_cnt) {
2544 dev_err(&pdev->dev,
2545 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
2546 __func__, wsa_dev_cnt, ret);
2547 ret = -EINVAL;
2548 goto err_dt;
2549 }
2550
2551 /*
2552 * Alloc mem to store phandle and index info of WSA device, if already
2553 * registered with ALSA core
2554 */
2555 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
2556 sizeof(struct msm_wsa881x_dev_info),
2557 GFP_KERNEL);
2558 if (!wsa881x_dev_info) {
2559 ret = -ENOMEM;
2560 goto err_mem;
2561 }
2562
2563 /*
2564 * search and check whether all WSA devices are already
2565 * registered with ALSA core or not. If found a node, store
2566 * the node and the index in a local array of struct for later
2567 * use.
2568 */
2569 for (i = 0; i < wsa_dev_cnt; i++) {
2570 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
2571 "qcom,wsa-devs", i);
2572 if (unlikely(!wsa_of_node)) {
2573 /* we should not be here */
2574 dev_err(&pdev->dev,
2575 "%s: wsa dev node is not present\n",
2576 __func__);
2577 ret = -EINVAL;
2578 goto err_dev_node;
2579 }
2580 if (soc_find_component(wsa_of_node, NULL)) {
2581 /* WSA device registered with ALSA core */
2582 wsa881x_dev_info[found].of_node = wsa_of_node;
2583 wsa881x_dev_info[found].index = i;
2584 found++;
2585 if (found == wsa_max_devs)
2586 break;
2587 }
2588 }
2589
2590 if (found < wsa_max_devs) {
2591 dev_dbg(&pdev->dev,
2592 "%s: failed to find %d components. Found only %d\n",
2593 __func__, wsa_max_devs, found);
2594 return -EPROBE_DEFER;
2595 }
2596 dev_info(&pdev->dev,
2597 "%s: found %d wsa881x devices registered with ALSA core\n",
2598 __func__, found);
2599
2600 card->num_aux_devs = wsa_max_devs;
2601 card->num_configs = wsa_max_devs;
2602
2603 /* Alloc array of AUX devs struct */
2604 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
2605 sizeof(struct snd_soc_aux_dev),
2606 GFP_KERNEL);
2607 if (!msm_aux_dev) {
2608 ret = -ENOMEM;
2609 goto err_auxdev_mem;
2610 }
2611
2612 /* Alloc array of codec conf struct */
2613 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_aux_devs,
2614 sizeof(struct snd_soc_codec_conf),
2615 GFP_KERNEL);
2616 if (!msm_codec_conf) {
2617 ret = -ENOMEM;
2618 goto err_codec_conf;
2619 }
2620
2621 for (i = 0; i < card->num_aux_devs; i++) {
2622 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
2623 GFP_KERNEL);
2624 if (!dev_name_str) {
2625 ret = -ENOMEM;
2626 goto err_dev_str;
2627 }
2628
2629 ret = of_property_read_string_index(pdev->dev.of_node,
2630 "qcom,wsa-aux-dev-prefix",
2631 wsa881x_dev_info[i].index,
2632 wsa_auxdev_name_prefix);
2633 if (ret) {
2634 dev_err(&pdev->dev,
2635 "%s: failed to read wsa aux dev prefix, ret = %d\n",
2636 __func__, ret);
2637 ret = -EINVAL;
2638 goto err_dt_prop;
2639 }
2640
2641 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
2642 msm_aux_dev[i].name = dev_name_str;
2643 msm_aux_dev[i].codec_name = NULL;
2644 msm_aux_dev[i].codec_of_node =
2645 wsa881x_dev_info[i].of_node;
2646 msm_aux_dev[i].init = msm_wsa881x_init;
2647 msm_codec_conf[i].dev_name = NULL;
2648 msm_codec_conf[i].name_prefix = wsa_auxdev_name_prefix[0];
2649 msm_codec_conf[i].of_node = wsa881x_dev_info[i].of_node;
2650 }
2651 card->codec_conf = msm_codec_conf;
2652 card->aux_dev = msm_aux_dev;
2653
2654 return 0;
2655
2656err_dt_prop:
2657 devm_kfree(&pdev->dev, dev_name_str);
2658err_dev_str:
2659 devm_kfree(&pdev->dev, msm_codec_conf);
2660err_codec_conf:
2661 devm_kfree(&pdev->dev, msm_aux_dev);
2662err_auxdev_mem:
2663err_dev_node:
2664 devm_kfree(&pdev->dev, wsa881x_dev_info);
2665err_mem:
2666err_dt:
2667 return ret;
2668}
2669
2670static void msm_free_auxdev_mem(struct platform_device *pdev)
2671{
2672 struct snd_soc_card *card = platform_get_drvdata(pdev);
2673 int i;
2674
2675 if (card->num_aux_devs > 0) {
2676 for (i = 0; i < card->num_aux_devs; i++) {
2677 kfree(msm_aux_dev[i].codec_name);
2678 kfree(msm_codec_conf[i].dev_name);
2679 kfree(msm_codec_conf[i].name_prefix);
2680 }
2681 }
2682}
2683
2684static void i2s_auxpcm_init(struct platform_device *pdev)
2685{
2686 struct resource *muxsel;
2687 int count;
2688 u32 mi2s_master_slave[MI2S_MAX];
Tanya Dixit73a3a262016-12-08 22:25:56 +05302689 u32 mi2s_ext_mclk[MI2S_MAX];
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002690 int ret;
2691 char *str[PCM_I2S_SEL_MAX] = {
2692 "lpaif_pri_mode_muxsel",
2693 "lpaif_sec_mode_muxsel",
2694 "lpaif_tert_mode_muxsel",
2695 "lpaif_quat_mode_muxsel"
2696 };
2697
2698 for (count = 0; count < MI2S_MAX; count++) {
2699 mutex_init(&mi2s_intf_conf[count].lock);
2700 mi2s_intf_conf[count].ref_cnt = 0;
2701 }
2702
2703 for (count = 0; count < AUX_PCM_MAX; count++) {
2704 mutex_init(&auxpcm_intf_conf[count].lock);
2705 auxpcm_intf_conf[count].ref_cnt = 0;
2706 }
2707
2708 for (count = 0; count < PCM_I2S_SEL_MAX; count++) {
2709 mutex_init(&mi2s_auxpcm_conf[count].lock);
2710 mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr = NULL;
2711 }
2712
2713 for (count = 0; count < PCM_I2S_SEL_MAX; count++) {
2714 muxsel = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2715 str[count]);
2716 if (muxsel) {
2717 mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr
2718 = ioremap(muxsel->start, resource_size(muxsel));
2719 }
2720 }
2721
2722 ret = of_property_read_u32_array(pdev->dev.of_node,
Tanya Dixit73a3a262016-12-08 22:25:56 +05302723 "qcom,msm-mi2s-master",
2724 mi2s_master_slave, MI2S_MAX);
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002725 if (ret) {
2726 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
2727 __func__);
2728 } else {
2729 for (count = 0; count < MI2S_MAX; count++) {
2730 mi2s_intf_conf[count].msm_is_mi2s_master =
2731 mi2s_master_slave[count];
2732 }
2733 }
Tanya Dixit73a3a262016-12-08 22:25:56 +05302734
2735 ret = of_property_read_u32_array(pdev->dev.of_node,
2736 "qcom,msm-mi2s-ext-mclk",
2737 mi2s_ext_mclk, MI2S_MAX);
2738 if (ret) {
2739 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-ext-mclk in DT node\n",
2740 __func__);
2741 } else {
2742 for (count = 0; count < MI2S_MAX; count++)
2743 mi2s_intf_conf[count].msm_is_ext_mclk =
2744 mi2s_ext_mclk[count];
2745 }
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002746}
2747
2748static void i2s_auxpcm_deinit(void)
2749{
2750 int count;
2751
2752 for (count = 0; count < PCM_I2S_SEL_MAX; count++)
2753 if (mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr !=
2754 NULL)
2755 iounmap(
2756 mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr);
2757}
2758
Neeraj Upadhyay49934422016-12-27 19:03:35 +05302759static const struct of_device_id sdm660_asoc_machine_of_match[] = {
2760 { .compatible = "qcom,sdm660-asoc-snd",
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002761 .data = "internal_codec"},
Neeraj Upadhyay49934422016-12-27 19:03:35 +05302762 { .compatible = "qcom,sdm660-asoc-snd-tasha",
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002763 .data = "tasha_codec"},
Neeraj Upadhyay49934422016-12-27 19:03:35 +05302764 { .compatible = "qcom,sdm660-asoc-snd-tavil",
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002765 .data = "tavil_codec"},
2766 {},
2767};
2768
2769static int msm_asoc_machine_probe(struct platform_device *pdev)
2770{
2771 struct snd_soc_card *card = NULL;
2772 struct msm_asoc_mach_data *pdata = NULL;
2773 const char *mclk = "qcom,msm-mclk-freq";
2774 int ret = -EINVAL, id;
2775 const struct of_device_id *match;
2776
2777 pdata = devm_kzalloc(&pdev->dev,
2778 sizeof(struct msm_asoc_mach_data),
2779 GFP_KERNEL);
2780 if (!pdata)
2781 return -ENOMEM;
2782
Neeraj Upadhyay49934422016-12-27 19:03:35 +05302783 match = of_match_node(sdm660_asoc_machine_of_match,
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002784 pdev->dev.of_node);
2785 if (!match)
2786 goto err;
2787
2788 ret = of_property_read_u32(pdev->dev.of_node, mclk, &id);
2789 if (ret) {
2790 dev_err(&pdev->dev,
2791 "%s: missing %s in dt node\n", __func__, mclk);
2792 id = DEFAULT_MCLK_RATE;
2793 }
2794 pdata->mclk_freq = id;
2795
2796 if (!strcmp(match->data, "tasha_codec") ||
2797 !strcmp(match->data, "tavil_codec")) {
2798 if (!strcmp(match->data, "tasha_codec"))
2799 pdata->snd_card_val = EXT_SND_CARD_TASHA;
2800 else
2801 pdata->snd_card_val = EXT_SND_CARD_TAVIL;
2802 ret = msm_ext_cdc_init(pdev, pdata, &card, &mbhc_cfg);
2803 if (ret)
2804 goto err;
2805 } else if (!strcmp(match->data, "internal_codec")) {
2806 pdata->snd_card_val = INT_SND_CARD;
2807 ret = msm_int_cdc_init(pdev, pdata, &card, &mbhc_cfg);
2808 if (ret)
2809 goto err;
2810 } else {
2811 dev_err(&pdev->dev,
2812 "%s: Not a matching DT sound node\n", __func__);
2813 goto err;
2814 }
2815 if (!card)
2816 goto err;
2817
2818 if (pdata->snd_card_val == INT_SND_CARD) {
2819 /*reading the gpio configurations from dtsi file*/
Laxminath Kasamad0f6962016-12-14 20:00:35 +05302820 pdata->pdm_gpio_p = of_parse_phandle(pdev->dev.of_node,
2821 "qcom,cdc-pdm-gpios", 0);
2822 pdata->comp_gpio_p = of_parse_phandle(pdev->dev.of_node,
2823 "qcom,cdc-comp-gpios", 0);
2824 pdata->sdw_gpio_p = of_parse_phandle(pdev->dev.of_node,
2825 "qcom,cdc-sdw-gpios", 0);
2826 pdata->dmic_gpio_p = of_parse_phandle(pdev->dev.of_node,
2827 "qcom,cdc-dmic-gpios", 0);
2828 pdata->ext_spk_gpio_p = of_parse_phandle(pdev->dev.of_node,
2829 "qcom,cdc-ext-spk-gpios", 0);
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002830 }
2831
2832 /*
2833 * Parse US-Euro gpio info from DT. Report no error if us-euro
2834 * entry is not found in DT file as some targets do not support
2835 * US-Euro detection
2836 */
2837 pdata->us_euro_gpio = of_get_named_gpio(pdev->dev.of_node,
2838 "qcom,us-euro-gpios", 0);
2839 if (!gpio_is_valid(pdata->us_euro_gpio))
2840 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
2841 "qcom,us-euro-gpios", 0);
2842 if (!gpio_is_valid(pdata->us_euro_gpio) && (!pdata->us_euro_gpio_p)) {
2843 dev_dbg(&pdev->dev, "property %s not detected in node %s",
2844 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
2845 } else {
2846 dev_dbg(&pdev->dev, "%s detected",
2847 "qcom,us-euro-gpios");
2848 mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
2849 }
2850
2851 ret = msm_prepare_us_euro(card);
2852 if (ret)
2853 dev_dbg(&pdev->dev, "msm_prepare_us_euro failed (%d)\n",
2854 ret);
2855
2856 i2s_auxpcm_init(pdev);
2857
2858 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
2859 if (ret)
2860 goto err;
2861
Laxminath Kasame68e94f2016-12-09 12:08:00 +05302862 ret = msm_populate_dai_link_component_of_node(pdata, card);
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002863 if (ret) {
2864 ret = -EPROBE_DEFER;
2865 goto err;
2866 }
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002867
Laxminath Kasam82f136f2017-01-24 00:52:55 +05302868 if (!of_property_read_bool(pdev->dev.of_node, "qcom,wsa-disable")) {
2869 ret = msm_init_wsa_dev(pdev, card);
2870 if (ret)
2871 goto err;
2872 }
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002873
2874 ret = devm_snd_soc_register_card(&pdev->dev, card);
Laxminath Kasam54dc88a2016-12-22 19:44:52 +05302875 if (ret == -EPROBE_DEFER) {
2876 if (codec_reg_done) {
2877 /*
2878 * return failure as EINVAL since other codec
2879 * registered sound card successfully.
2880 * This avoids any further probe calls.
2881 */
2882 ret = -EINVAL;
2883 }
2884 goto err;
2885 } else if (ret) {
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002886 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
2887 ret);
2888 goto err;
2889 }
Laxminath Kasam54dc88a2016-12-22 19:44:52 +05302890 if (pdata->snd_card_val != INT_SND_CARD)
2891 msm_ext_register_audio_notifier(pdev);
2892
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002893 return 0;
2894err:
2895 if (pdata->us_euro_gpio > 0) {
2896 dev_dbg(&pdev->dev, "%s free us_euro gpio %d\n",
2897 __func__, pdata->us_euro_gpio);
2898 pdata->us_euro_gpio = 0;
2899 }
2900 if (pdata->hph_en1_gpio > 0) {
2901 dev_dbg(&pdev->dev, "%s free hph_en1_gpio %d\n",
2902 __func__, pdata->hph_en1_gpio);
2903 gpio_free(pdata->hph_en1_gpio);
2904 pdata->hph_en1_gpio = 0;
2905 }
2906 if (pdata->hph_en0_gpio > 0) {
2907 dev_dbg(&pdev->dev, "%s free hph_en0_gpio %d\n",
2908 __func__, pdata->hph_en0_gpio);
2909 gpio_free(pdata->hph_en0_gpio);
2910 pdata->hph_en0_gpio = 0;
2911 }
Laxminath Kasamfb36dc12016-11-28 23:04:47 +05302912 if (pdata->snd_card_val != INT_SND_CARD)
Laxminath Kasamc1a8f7c2017-01-23 13:33:31 +05302913 msm_ext_cdc_deinit(pdata);
Laxminath Kasam421cf77c2017-01-30 14:57:13 +05302914 devm_kfree(&pdev->dev, pdata);
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002915 return ret;
2916}
2917
2918static int msm_asoc_machine_remove(struct platform_device *pdev)
2919{
2920 struct snd_soc_card *card = platform_get_drvdata(pdev);
2921 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
2922
2923 if (pdata->snd_card_val == INT_SND_CARD)
2924 mutex_destroy(&pdata->cdc_int_mclk0_mutex);
Laxminath Kasamfb36dc12016-11-28 23:04:47 +05302925 else
Laxminath Kasamc1a8f7c2017-01-23 13:33:31 +05302926 msm_ext_cdc_deinit(pdata);
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002927 msm_free_auxdev_mem(pdev);
2928
2929 gpio_free(pdata->us_euro_gpio);
2930 gpio_free(pdata->hph_en1_gpio);
2931 gpio_free(pdata->hph_en0_gpio);
2932 i2s_auxpcm_deinit();
2933 snd_soc_unregister_card(card);
2934 return 0;
2935}
2936
Neeraj Upadhyay49934422016-12-27 19:03:35 +05302937static struct platform_driver sdm660_asoc_machine_driver = {
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002938 .driver = {
2939 .name = DRV_NAME,
2940 .owner = THIS_MODULE,
2941 .pm = &snd_soc_pm_ops,
Neeraj Upadhyay49934422016-12-27 19:03:35 +05302942 .of_match_table = sdm660_asoc_machine_of_match,
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002943 },
2944 .probe = msm_asoc_machine_probe,
2945 .remove = msm_asoc_machine_remove,
2946};
Neeraj Upadhyay49934422016-12-27 19:03:35 +05302947module_platform_driver(sdm660_asoc_machine_driver);
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002948
2949MODULE_DESCRIPTION("ALSA SoC msm");
2950MODULE_LICENSE("GPL v2");
2951MODULE_ALIAS("platform:" DRV_NAME);
Neeraj Upadhyay49934422016-12-27 19:03:35 +05302952MODULE_DEVICE_TABLE(of, sdm660_asoc_machine_of_match);