blob: 262fe910fe584cdfc318c9e0b6ffb35e63dd1251 [file] [log] [blame]
Banajit Goswami0530e2f2016-12-09 21:34:37 -08001/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/input.h>
14#include <linux/of_gpio.h>
15#include <linux/mfd/msm-cdc-pinctrl.h>
16#include <sound/pcm_params.h>
17#include <sound/q6afe-v2.h>
18#include "qdsp6v2/msm-pcm-routing-v2.h"
Neeraj Upadhyay49934422016-12-27 19:03:35 +053019#include "sdm660-common.h"
20#include "sdm660-internal.h"
21#include "sdm660-external.h"
22#include "../codecs/sdm660_cdc/msm-analog-cdc.h"
Banajit Goswami0530e2f2016-12-09 21:34:37 -080023#include "../codecs/wsa881x.h"
24
Neeraj Upadhyay49934422016-12-27 19:03:35 +053025#define DRV_NAME "sdm660-asoc-snd"
Banajit Goswami0530e2f2016-12-09 21:34:37 -080026
Laxminath Kasame68e94f2016-12-09 12:08:00 +053027#define MSM_INT_DIGITAL_CODEC "msm-dig-codec"
28#define PMIC_INT_ANALOG_CODEC "analog-codec"
29
Banajit Goswami0530e2f2016-12-09 21:34:37 -080030#define DEV_NAME_STR_LEN 32
31#define DEFAULT_MCLK_RATE 9600000
32
33struct dev_config {
34 u32 sample_rate;
35 u32 bit_format;
36 u32 channels;
37};
38
39/* TDM default config */
40static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
41 { /* PRI TDM */
42 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
43 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
44 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
45 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
46 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
47 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
48 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
49 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
50 },
51 { /* SEC TDM */
52 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
53 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
54 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
55 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
56 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
57 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
58 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
59 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
60 },
61 { /* TERT TDM */
62 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
63 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
64 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
65 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
66 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
67 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
68 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
69 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
70 },
71 { /* QUAT TDM */
72 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
73 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
74 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
75 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
76 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
77 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
78 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
79 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
80 }
81};
82
83/* TDM default config */
84static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
85 { /* PRI TDM */
86 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
87 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
88 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
89 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
90 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
91 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
92 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
93 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
94 },
95 { /* SEC TDM */
96 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
97 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
98 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
99 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
100 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
101 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
102 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
103 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
104 },
105 { /* TERT TDM */
106 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
107 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
108 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
109 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
110 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
111 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
112 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
113 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
114 },
115 { /* QUAT TDM */
116 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
117 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
118 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
119 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
120 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
121 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
122 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
123 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
124 }
125};
126
127static struct dev_config usb_rx_cfg = {
128 .sample_rate = SAMPLING_RATE_48KHZ,
129 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
130 .channels = 2,
131};
132
133static struct dev_config usb_tx_cfg = {
134 .sample_rate = SAMPLING_RATE_48KHZ,
135 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
136 .channels = 1,
137};
138
139enum {
140 PRIM_MI2S = 0,
141 SEC_MI2S,
142 TERT_MI2S,
143 QUAT_MI2S,
144 MI2S_MAX,
145};
146
147enum {
148 PRIM_AUX_PCM = 0,
149 SEC_AUX_PCM,
150 TERT_AUX_PCM,
151 QUAT_AUX_PCM,
152 AUX_PCM_MAX,
153};
154
155enum {
156 PCM_I2S_SEL_PRIM = 0,
157 PCM_I2S_SEL_SEC,
158 PCM_I2S_SEL_TERT,
159 PCM_I2S_SEL_QUAT,
160 PCM_I2S_SEL_MAX,
161};
162
163struct mi2s_aux_pcm_common_conf {
164 struct mutex lock;
165 void *pcm_i2s_sel_vt_addr;
166};
167
168struct mi2s_conf {
169 struct mutex lock;
170 u32 ref_cnt;
171 u32 msm_is_mi2s_master;
Tanya Dixit73a3a262016-12-08 22:25:56 +0530172 u32 msm_is_ext_mclk;
Banajit Goswami0530e2f2016-12-09 21:34:37 -0800173};
174
175struct auxpcm_conf {
176 struct mutex lock;
177 u32 ref_cnt;
178};
179
Tanya Dixit73a3a262016-12-08 22:25:56 +0530180static u32 mi2s_ebit_clk[MI2S_MAX] = {
181 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
182 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
183 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
184 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT
185};
186
Banajit Goswami0530e2f2016-12-09 21:34:37 -0800187struct msm_wsa881x_dev_info {
188 struct device_node *of_node;
189 u32 index;
190};
191static struct snd_soc_aux_dev *msm_aux_dev;
192static struct snd_soc_codec_conf *msm_codec_conf;
193
194static bool msm_swap_gnd_mic(struct snd_soc_codec *codec);
195
196static struct wcd_mbhc_config mbhc_cfg = {
197 .read_fw_bin = false,
198 .calibration = NULL,
199 .detect_extn_cable = true,
200 .mono_stero_detection = false,
201 .swap_gnd_mic = NULL,
Laxminath Kasame68e94f2016-12-09 12:08:00 +0530202 .hs_ext_micbias = true,
Banajit Goswami0530e2f2016-12-09 21:34:37 -0800203 .key_code[0] = KEY_MEDIA,
204 .key_code[1] = KEY_VOICECOMMAND,
205 .key_code[2] = KEY_VOLUMEUP,
206 .key_code[3] = KEY_VOLUMEDOWN,
207 .key_code[4] = 0,
208 .key_code[5] = 0,
209 .key_code[6] = 0,
210 .key_code[7] = 0,
211 .linein_th = 5000,
212 .moisture_en = false,
213 .mbhc_micbias = 0,
214 .anc_micbias = 0,
215 .enable_anc_mic_detect = false,
216};
217
218static struct dev_config proxy_rx_cfg = {
219 .sample_rate = SAMPLING_RATE_48KHZ,
220 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
221 .channels = 2,
222};
223
224/* Default configuration of MI2S channels */
225static struct dev_config mi2s_rx_cfg[] = {
226 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
227 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
228 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
229 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
230};
231
232static struct dev_config mi2s_tx_cfg[] = {
233 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
234 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
235 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
236 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
237};
238
239static struct dev_config aux_pcm_rx_cfg[] = {
240 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
241 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
242 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
243 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
244};
245
246static struct dev_config aux_pcm_tx_cfg[] = {
247 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
248 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
249 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
250 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
251};
252
253static char const *ch_text[] = {"Two", "Three", "Four", "Five",
254 "Six", "Seven", "Eight"};
255static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
256static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_16",
257 "KHZ_32", "KHZ_44P1", "KHZ_48",
258 "KHZ_96", "KHZ_192"};
259static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
260 "Five", "Six", "Seven",
261 "Eight"};
262static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
263 "S32_LE"};
264static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
265 "Five", "Six", "Seven", "Eight"};
266static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
267static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
268 "KHZ_44P1", "KHZ_48", "KHZ_96",
269 "KHZ_192", "KHZ_352P8", "KHZ_384"};
270static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
271 "Five", "Six", "Seven",
272 "Eight"};
273static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
274 "KHZ_16", "KHZ_22P05",
275 "KHZ_32", "KHZ_44P1", "KHZ_48",
276 "KHZ_96", "KHZ_192", "KHZ_384"};
277
278static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
279static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
280static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
281static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
282static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
283static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
284static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
285static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
286static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
287static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
288static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
289static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
290static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
291static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
292static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
293static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
294static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
295static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
296static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
297static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
298static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
299static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
300static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
301static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
302static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
303static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
304static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
305static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
306static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
307static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
308static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
309static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
310static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
311static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
312static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
313static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
314static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
315
316static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
317 {
318 AFE_API_VERSION_I2S_CONFIG,
319 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
320 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
321 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
322 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
323 0,
324 },
325 {
326 AFE_API_VERSION_I2S_CONFIG,
327 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
328 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
329 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
330 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
331 0,
332 },
333 {
334 AFE_API_VERSION_I2S_CONFIG,
335 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
336 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
337 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
338 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
339 0,
340 },
341 {
342 AFE_API_VERSION_I2S_CONFIG,
343 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
344 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
345 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
346 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
347 0,
348 }
349};
350
Tanya Dixit73a3a262016-12-08 22:25:56 +0530351static struct afe_clk_set mi2s_mclk[MI2S_MAX] = {
352 {
353 AFE_API_VERSION_I2S_CONFIG,
354 Q6AFE_LPASS_CLK_ID_MCLK_1,
355 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
356 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
357 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
358 0,
359 },
360 {
361 AFE_API_VERSION_I2S_CONFIG,
362 Q6AFE_LPASS_CLK_ID_MCLK_2,
363 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
364 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
365 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
366 0,
367 },
368 {
369 AFE_API_VERSION_I2S_CONFIG,
370 Q6AFE_LPASS_CLK_ID_MCLK_3,
371 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
372 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
373 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
374 0,
375 },
376 {
377 AFE_API_VERSION_I2S_CONFIG,
378 Q6AFE_LPASS_CLK_ID_MCLK_4,
379 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
380 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
381 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
382 0,
383 }
384};
385
386
387
Banajit Goswami0530e2f2016-12-09 21:34:37 -0800388static struct mi2s_aux_pcm_common_conf mi2s_auxpcm_conf[PCM_I2S_SEL_MAX];
389static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
390static struct auxpcm_conf auxpcm_intf_conf[AUX_PCM_MAX];
391
392static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
393 struct snd_ctl_elem_value *ucontrol)
394{
395 pr_debug("%s: proxy_rx channels = %d\n",
396 __func__, proxy_rx_cfg.channels);
397 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
398
399 return 0;
400}
401
402static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
403 struct snd_ctl_elem_value *ucontrol)
404{
405 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
406 pr_debug("%s: proxy_rx channels = %d\n",
407 __func__, proxy_rx_cfg.channels);
408
409 return 1;
410}
411
412static int tdm_get_sample_rate(int value)
413{
414 int sample_rate = 0;
415
416 switch (value) {
417 case 0:
418 sample_rate = SAMPLING_RATE_8KHZ;
419 break;
420 case 1:
421 sample_rate = SAMPLING_RATE_16KHZ;
422 break;
423 case 2:
424 sample_rate = SAMPLING_RATE_32KHZ;
425 break;
426 case 3:
427 sample_rate = SAMPLING_RATE_44P1KHZ;
428 break;
429 case 4:
430 sample_rate = SAMPLING_RATE_48KHZ;
431 break;
432 case 5:
433 sample_rate = SAMPLING_RATE_96KHZ;
434 break;
435 case 6:
436 sample_rate = SAMPLING_RATE_192KHZ;
437 break;
438 case 7:
439 sample_rate = SAMPLING_RATE_352P8KHZ;
440 break;
441 case 8:
442 sample_rate = SAMPLING_RATE_384KHZ;
443 break;
444 default:
445 sample_rate = SAMPLING_RATE_48KHZ;
446 break;
447 }
448 return sample_rate;
449}
450
451static int tdm_get_sample_rate_val(int sample_rate)
452{
453 int sample_rate_val = 0;
454
455 switch (sample_rate) {
456 case SAMPLING_RATE_8KHZ:
457 sample_rate_val = 0;
458 break;
459 case SAMPLING_RATE_16KHZ:
460 sample_rate_val = 1;
461 break;
462 case SAMPLING_RATE_32KHZ:
463 sample_rate_val = 2;
464 break;
465 case SAMPLING_RATE_44P1KHZ:
466 sample_rate_val = 3;
467 break;
468 case SAMPLING_RATE_48KHZ:
469 sample_rate_val = 4;
470 break;
471 case SAMPLING_RATE_96KHZ:
472 sample_rate_val = 5;
473 break;
474 case SAMPLING_RATE_192KHZ:
475 sample_rate_val = 6;
476 break;
477 case SAMPLING_RATE_352P8KHZ:
478 sample_rate_val = 7;
479 break;
480 case SAMPLING_RATE_384KHZ:
481 sample_rate_val = 8;
482 break;
483 default:
484 sample_rate_val = 4;
485 break;
486 }
487 return sample_rate_val;
488}
489
490static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
491 struct tdm_port *port)
492{
493 if (port) {
494 if (strnstr(kcontrol->id.name, "PRI",
495 sizeof(kcontrol->id.name))) {
496 port->mode = TDM_PRI;
497 } else if (strnstr(kcontrol->id.name, "SEC",
498 sizeof(kcontrol->id.name))) {
499 port->mode = TDM_SEC;
500 } else if (strnstr(kcontrol->id.name, "TERT",
501 sizeof(kcontrol->id.name))) {
502 port->mode = TDM_TERT;
503 } else if (strnstr(kcontrol->id.name, "QUAT",
504 sizeof(kcontrol->id.name))) {
505 port->mode = TDM_QUAT;
506 } else {
507 pr_err("%s: unsupported mode in: %s",
508 __func__, kcontrol->id.name);
509 return -EINVAL;
510 }
511
512 if (strnstr(kcontrol->id.name, "RX_0",
513 sizeof(kcontrol->id.name)) ||
514 strnstr(kcontrol->id.name, "TX_0",
515 sizeof(kcontrol->id.name))) {
516 port->channel = TDM_0;
517 } else if (strnstr(kcontrol->id.name, "RX_1",
518 sizeof(kcontrol->id.name)) ||
519 strnstr(kcontrol->id.name, "TX_1",
520 sizeof(kcontrol->id.name))) {
521 port->channel = TDM_1;
522 } else if (strnstr(kcontrol->id.name, "RX_2",
523 sizeof(kcontrol->id.name)) ||
524 strnstr(kcontrol->id.name, "TX_2",
525 sizeof(kcontrol->id.name))) {
526 port->channel = TDM_2;
527 } else if (strnstr(kcontrol->id.name, "RX_3",
528 sizeof(kcontrol->id.name)) ||
529 strnstr(kcontrol->id.name, "TX_3",
530 sizeof(kcontrol->id.name))) {
531 port->channel = TDM_3;
532 } else if (strnstr(kcontrol->id.name, "RX_4",
533 sizeof(kcontrol->id.name)) ||
534 strnstr(kcontrol->id.name, "TX_4",
535 sizeof(kcontrol->id.name))) {
536 port->channel = TDM_4;
537 } else if (strnstr(kcontrol->id.name, "RX_5",
538 sizeof(kcontrol->id.name)) ||
539 strnstr(kcontrol->id.name, "TX_5",
540 sizeof(kcontrol->id.name))) {
541 port->channel = TDM_5;
542 } else if (strnstr(kcontrol->id.name, "RX_6",
543 sizeof(kcontrol->id.name)) ||
544 strnstr(kcontrol->id.name, "TX_6",
545 sizeof(kcontrol->id.name))) {
546 port->channel = TDM_6;
547 } else if (strnstr(kcontrol->id.name, "RX_7",
548 sizeof(kcontrol->id.name)) ||
549 strnstr(kcontrol->id.name, "TX_7",
550 sizeof(kcontrol->id.name))) {
551 port->channel = TDM_7;
552 } else {
553 pr_err("%s: unsupported channel in: %s",
554 __func__, kcontrol->id.name);
555 return -EINVAL;
556 }
557 } else
558 return -EINVAL;
559 return 0;
560}
561
562static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
563 struct snd_ctl_elem_value *ucontrol)
564{
565 struct tdm_port port;
566 int ret = tdm_get_port_idx(kcontrol, &port);
567
568 if (ret) {
569 pr_err("%s: unsupported control: %s",
570 __func__, kcontrol->id.name);
571 } else {
572 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
573 tdm_rx_cfg[port.mode][port.channel].sample_rate);
574
575 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
576 tdm_rx_cfg[port.mode][port.channel].sample_rate,
577 ucontrol->value.enumerated.item[0]);
578 }
579 return ret;
580}
581
582static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
583 struct snd_ctl_elem_value *ucontrol)
584{
585 struct tdm_port port;
586 int ret = tdm_get_port_idx(kcontrol, &port);
587
588 if (ret) {
589 pr_err("%s: unsupported control: %s",
590 __func__, kcontrol->id.name);
591 } else {
592 tdm_rx_cfg[port.mode][port.channel].sample_rate =
593 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
594
595 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
596 tdm_rx_cfg[port.mode][port.channel].sample_rate,
597 ucontrol->value.enumerated.item[0]);
598 }
599 return ret;
600}
601
602static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
603 struct snd_ctl_elem_value *ucontrol)
604{
605 struct tdm_port port;
606 int ret = tdm_get_port_idx(kcontrol, &port);
607
608 if (ret) {
609 pr_err("%s: unsupported control: %s",
610 __func__, kcontrol->id.name);
611 } else {
612 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
613 tdm_tx_cfg[port.mode][port.channel].sample_rate);
614
615 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
616 tdm_tx_cfg[port.mode][port.channel].sample_rate,
617 ucontrol->value.enumerated.item[0]);
618 }
619 return ret;
620}
621
622static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
623 struct snd_ctl_elem_value *ucontrol)
624{
625 struct tdm_port port;
626 int ret = tdm_get_port_idx(kcontrol, &port);
627
628 if (ret) {
629 pr_err("%s: unsupported control: %s",
630 __func__, kcontrol->id.name);
631 } else {
632 tdm_tx_cfg[port.mode][port.channel].sample_rate =
633 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
634
635 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
636 tdm_tx_cfg[port.mode][port.channel].sample_rate,
637 ucontrol->value.enumerated.item[0]);
638 }
639 return ret;
640}
641
642static int tdm_get_format(int value)
643{
644 int format = 0;
645
646 switch (value) {
647 case 0:
648 format = SNDRV_PCM_FORMAT_S16_LE;
649 break;
650 case 1:
651 format = SNDRV_PCM_FORMAT_S24_LE;
652 break;
653 case 2:
654 format = SNDRV_PCM_FORMAT_S32_LE;
655 break;
656 default:
657 format = SNDRV_PCM_FORMAT_S16_LE;
658 break;
659 }
660 return format;
661}
662
663static int tdm_get_format_val(int format)
664{
665 int value = 0;
666
667 switch (format) {
668 case SNDRV_PCM_FORMAT_S16_LE:
669 value = 0;
670 break;
671 case SNDRV_PCM_FORMAT_S24_LE:
672 value = 1;
673 break;
674 case SNDRV_PCM_FORMAT_S32_LE:
675 value = 2;
676 break;
677 default:
678 value = 0;
679 break;
680 }
681 return value;
682}
683
684static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
685 struct snd_ctl_elem_value *ucontrol)
686{
687 struct tdm_port port;
688 int ret = tdm_get_port_idx(kcontrol, &port);
689
690 if (ret) {
691 pr_err("%s: unsupported control: %s",
692 __func__, kcontrol->id.name);
693 } else {
694 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
695 tdm_rx_cfg[port.mode][port.channel].bit_format);
696
697 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
698 tdm_rx_cfg[port.mode][port.channel].bit_format,
699 ucontrol->value.enumerated.item[0]);
700 }
701 return ret;
702}
703
704static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
705 struct snd_ctl_elem_value *ucontrol)
706{
707 struct tdm_port port;
708 int ret = tdm_get_port_idx(kcontrol, &port);
709
710 if (ret) {
711 pr_err("%s: unsupported control: %s",
712 __func__, kcontrol->id.name);
713 } else {
714 tdm_rx_cfg[port.mode][port.channel].bit_format =
715 tdm_get_format(ucontrol->value.enumerated.item[0]);
716
717 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
718 tdm_rx_cfg[port.mode][port.channel].bit_format,
719 ucontrol->value.enumerated.item[0]);
720 }
721 return ret;
722}
723
724static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
725 struct snd_ctl_elem_value *ucontrol)
726{
727 struct tdm_port port;
728 int ret = tdm_get_port_idx(kcontrol, &port);
729
730 if (ret) {
731 pr_err("%s: unsupported control: %s",
732 __func__, kcontrol->id.name);
733 } else {
734 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
735 tdm_tx_cfg[port.mode][port.channel].bit_format);
736
737 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
738 tdm_tx_cfg[port.mode][port.channel].bit_format,
739 ucontrol->value.enumerated.item[0]);
740 }
741 return ret;
742}
743
744static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
745 struct snd_ctl_elem_value *ucontrol)
746{
747 struct tdm_port port;
748 int ret = tdm_get_port_idx(kcontrol, &port);
749
750 if (ret) {
751 pr_err("%s: unsupported control: %s",
752 __func__, kcontrol->id.name);
753 } else {
754 tdm_tx_cfg[port.mode][port.channel].bit_format =
755 tdm_get_format(ucontrol->value.enumerated.item[0]);
756
757 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
758 tdm_tx_cfg[port.mode][port.channel].bit_format,
759 ucontrol->value.enumerated.item[0]);
760 }
761 return ret;
762}
763
764static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
765 struct snd_ctl_elem_value *ucontrol)
766{
767 struct tdm_port port;
768 int ret = tdm_get_port_idx(kcontrol, &port);
769
770 if (ret) {
771 pr_err("%s: unsupported control: %s",
772 __func__, kcontrol->id.name);
773 } else {
774
775 ucontrol->value.enumerated.item[0] =
776 tdm_rx_cfg[port.mode][port.channel].channels - 1;
777
778 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
779 tdm_rx_cfg[port.mode][port.channel].channels - 1,
780 ucontrol->value.enumerated.item[0]);
781 }
782 return ret;
783}
784
785static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
786 struct snd_ctl_elem_value *ucontrol)
787{
788 struct tdm_port port;
789 int ret = tdm_get_port_idx(kcontrol, &port);
790
791 if (ret) {
792 pr_err("%s: unsupported control: %s",
793 __func__, kcontrol->id.name);
794 } else {
795 tdm_rx_cfg[port.mode][port.channel].channels =
796 ucontrol->value.enumerated.item[0] + 1;
797
798 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
799 tdm_rx_cfg[port.mode][port.channel].channels,
800 ucontrol->value.enumerated.item[0] + 1);
801 }
802 return ret;
803}
804
805static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
806 struct snd_ctl_elem_value *ucontrol)
807{
808 struct tdm_port port;
809 int ret = tdm_get_port_idx(kcontrol, &port);
810
811 if (ret) {
812 pr_err("%s: unsupported control: %s",
813 __func__, kcontrol->id.name);
814 } else {
815 ucontrol->value.enumerated.item[0] =
816 tdm_tx_cfg[port.mode][port.channel].channels - 1;
817
818 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
819 tdm_tx_cfg[port.mode][port.channel].channels - 1,
820 ucontrol->value.enumerated.item[0]);
821 }
822 return ret;
823}
824
825static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
826 struct snd_ctl_elem_value *ucontrol)
827{
828 struct tdm_port port;
829 int ret = tdm_get_port_idx(kcontrol, &port);
830
831 if (ret) {
832 pr_err("%s: unsupported control: %s",
833 __func__, kcontrol->id.name);
834 } else {
835 tdm_tx_cfg[port.mode][port.channel].channels =
836 ucontrol->value.enumerated.item[0] + 1;
837
838 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
839 tdm_tx_cfg[port.mode][port.channel].channels,
840 ucontrol->value.enumerated.item[0] + 1);
841 }
842 return ret;
843}
844
845static int aux_pcm_get_sample_rate(int value)
846{
847 int sample_rate;
848
849 switch (value) {
850 case 1:
851 sample_rate = SAMPLING_RATE_16KHZ;
852 break;
853 case 0:
854 default:
855 sample_rate = SAMPLING_RATE_8KHZ;
856 break;
857 }
858 return sample_rate;
859}
860
861static int aux_pcm_get_sample_rate_val(int sample_rate)
862{
863 int sample_rate_val;
864
865 switch (sample_rate) {
866 case SAMPLING_RATE_16KHZ:
867 sample_rate_val = 1;
868 break;
869 case SAMPLING_RATE_8KHZ:
870 default:
871 sample_rate_val = 0;
872 break;
873 }
874 return sample_rate_val;
875}
876
877static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
878{
879 int idx;
880
881 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
882 sizeof("PRIM_AUX_PCM")))
883 idx = PRIM_AUX_PCM;
884 else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
885 sizeof("SEC_AUX_PCM")))
886 idx = SEC_AUX_PCM;
887 else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
888 sizeof("TERT_AUX_PCM")))
889 idx = TERT_AUX_PCM;
890 else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
891 sizeof("QUAT_AUX_PCM")))
892 idx = QUAT_AUX_PCM;
893 else {
894 pr_err("%s: unsupported port: %s",
895 __func__, kcontrol->id.name);
896 idx = -EINVAL;
897 }
898
899 return idx;
900}
901
902static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
903 struct snd_ctl_elem_value *ucontrol)
904{
905 int idx = aux_pcm_get_port_idx(kcontrol);
906
907 if (idx < 0)
908 return idx;
909
910 aux_pcm_rx_cfg[idx].sample_rate =
911 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
912
913 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
914 idx, aux_pcm_rx_cfg[idx].sample_rate,
915 ucontrol->value.enumerated.item[0]);
916
917 return 0;
918}
919
920static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
921 struct snd_ctl_elem_value *ucontrol)
922{
923 int idx = aux_pcm_get_port_idx(kcontrol);
924
925 if (idx < 0)
926 return idx;
927
928 ucontrol->value.enumerated.item[0] =
929 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
930
931 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
932 idx, aux_pcm_rx_cfg[idx].sample_rate,
933 ucontrol->value.enumerated.item[0]);
934
935 return 0;
936}
937
938static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
939 struct snd_ctl_elem_value *ucontrol)
940{
941 int idx = aux_pcm_get_port_idx(kcontrol);
942
943 if (idx < 0)
944 return idx;
945
946 aux_pcm_tx_cfg[idx].sample_rate =
947 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
948
949 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
950 idx, aux_pcm_tx_cfg[idx].sample_rate,
951 ucontrol->value.enumerated.item[0]);
952
953 return 0;
954}
955
956static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
957 struct snd_ctl_elem_value *ucontrol)
958{
959 int idx = aux_pcm_get_port_idx(kcontrol);
960
961 if (idx < 0)
962 return idx;
963
964 ucontrol->value.enumerated.item[0] =
965 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
966
967 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
968 idx, aux_pcm_tx_cfg[idx].sample_rate,
969 ucontrol->value.enumerated.item[0]);
970
971 return 0;
972}
973
974static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
975{
976 int idx;
977
978 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
979 sizeof("PRIM_MI2S_RX")))
980 idx = PRIM_MI2S;
981 else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
982 sizeof("SEC_MI2S_RX")))
983 idx = SEC_MI2S;
984 else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
985 sizeof("TERT_MI2S_RX")))
986 idx = TERT_MI2S;
987 else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
988 sizeof("QUAT_MI2S_RX")))
989 idx = QUAT_MI2S;
990 else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
991 sizeof("PRIM_MI2S_TX")))
992 idx = PRIM_MI2S;
993 else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
994 sizeof("SEC_MI2S_TX")))
995 idx = SEC_MI2S;
996 else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
997 sizeof("TERT_MI2S_TX")))
998 idx = TERT_MI2S;
999 else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
1000 sizeof("QUAT_MI2S_TX")))
1001 idx = QUAT_MI2S;
1002 else {
1003 pr_err("%s: unsupported channel: %s",
1004 __func__, kcontrol->id.name);
1005 idx = -EINVAL;
1006 }
1007
1008 return idx;
1009}
1010
1011static int mi2s_get_sample_rate_val(int sample_rate)
1012{
1013 int sample_rate_val;
1014
1015 switch (sample_rate) {
1016 case SAMPLING_RATE_8KHZ:
1017 sample_rate_val = 0;
1018 break;
1019 case SAMPLING_RATE_16KHZ:
1020 sample_rate_val = 1;
1021 break;
1022 case SAMPLING_RATE_32KHZ:
1023 sample_rate_val = 2;
1024 break;
1025 case SAMPLING_RATE_44P1KHZ:
1026 sample_rate_val = 3;
1027 break;
1028 case SAMPLING_RATE_48KHZ:
1029 sample_rate_val = 4;
1030 break;
1031 case SAMPLING_RATE_96KHZ:
1032 sample_rate_val = 5;
1033 break;
1034 case SAMPLING_RATE_192KHZ:
1035 sample_rate_val = 6;
1036 break;
1037 default:
1038 sample_rate_val = 4;
1039 break;
1040 }
1041 return sample_rate_val;
1042}
1043
1044static int mi2s_get_sample_rate(int value)
1045{
1046 int sample_rate;
1047
1048 switch (value) {
1049 case 0:
1050 sample_rate = SAMPLING_RATE_8KHZ;
1051 break;
1052 case 1:
1053 sample_rate = SAMPLING_RATE_16KHZ;
1054 break;
1055 case 2:
1056 sample_rate = SAMPLING_RATE_32KHZ;
1057 break;
1058 case 3:
1059 sample_rate = SAMPLING_RATE_44P1KHZ;
1060 break;
1061 case 4:
1062 sample_rate = SAMPLING_RATE_48KHZ;
1063 break;
1064 case 5:
1065 sample_rate = SAMPLING_RATE_96KHZ;
1066 break;
1067 case 6:
1068 sample_rate = SAMPLING_RATE_192KHZ;
1069 break;
1070 default:
1071 sample_rate = SAMPLING_RATE_48KHZ;
1072 break;
1073 }
1074 return sample_rate;
1075}
1076
1077static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1078 struct snd_ctl_elem_value *ucontrol)
1079{
1080 int idx = mi2s_get_port_idx(kcontrol);
1081
1082 if (idx < 0)
1083 return idx;
1084
1085 mi2s_rx_cfg[idx].sample_rate =
1086 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1087
1088 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1089 idx, mi2s_rx_cfg[idx].sample_rate,
1090 ucontrol->value.enumerated.item[0]);
1091
1092 return 0;
1093}
1094
1095static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1096 struct snd_ctl_elem_value *ucontrol)
1097{
1098 int idx = mi2s_get_port_idx(kcontrol);
1099
1100 if (idx < 0)
1101 return idx;
1102
1103 ucontrol->value.enumerated.item[0] =
1104 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
1105
1106 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1107 idx, mi2s_rx_cfg[idx].sample_rate,
1108 ucontrol->value.enumerated.item[0]);
1109
1110 return 0;
1111}
1112
1113static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1114 struct snd_ctl_elem_value *ucontrol)
1115{
1116 int idx = mi2s_get_port_idx(kcontrol);
1117
1118 if (idx < 0)
1119 return idx;
1120
1121 mi2s_tx_cfg[idx].sample_rate =
1122 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1123
1124 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1125 idx, mi2s_tx_cfg[idx].sample_rate,
1126 ucontrol->value.enumerated.item[0]);
1127
1128 return 0;
1129}
1130
1131static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1132 struct snd_ctl_elem_value *ucontrol)
1133{
1134 int idx = mi2s_get_port_idx(kcontrol);
1135
1136 if (idx < 0)
1137 return idx;
1138
1139 ucontrol->value.enumerated.item[0] =
1140 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
1141
1142 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1143 idx, mi2s_tx_cfg[idx].sample_rate,
1144 ucontrol->value.enumerated.item[0]);
1145
1146 return 0;
1147}
1148
1149static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
1150 struct snd_ctl_elem_value *ucontrol)
1151{
1152 int idx = mi2s_get_port_idx(kcontrol);
1153
1154 if (idx < 0)
1155 return idx;
1156
1157 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1158 idx, mi2s_rx_cfg[idx].channels);
1159 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
1160
1161 return 0;
1162}
1163
1164static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
1165 struct snd_ctl_elem_value *ucontrol)
1166{
1167 int idx = mi2s_get_port_idx(kcontrol);
1168
1169 if (idx < 0)
1170 return idx;
1171
1172 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
1173 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1174 idx, mi2s_rx_cfg[idx].channels);
1175
1176 return 1;
1177}
1178
1179static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
1180 struct snd_ctl_elem_value *ucontrol)
1181{
1182 int idx = mi2s_get_port_idx(kcontrol);
1183
1184 if (idx < 0)
1185 return idx;
1186
1187 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
1188 idx, mi2s_tx_cfg[idx].channels);
1189 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
1190
1191 return 0;
1192}
1193
1194static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
1195 struct snd_ctl_elem_value *ucontrol)
1196{
1197 int idx = mi2s_get_port_idx(kcontrol);
1198
1199 if (idx < 0)
1200 return idx;
1201
1202 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
1203 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
1204 idx, mi2s_tx_cfg[idx].channels);
1205
1206 return 1;
1207}
1208
1209static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1210 struct snd_ctl_elem_value *ucontrol)
1211{
1212 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1213 usb_rx_cfg.channels);
1214 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1215 return 0;
1216}
1217
1218static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1219 struct snd_ctl_elem_value *ucontrol)
1220{
1221 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1222
1223 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1224 return 1;
1225}
1226
1227static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1228 struct snd_ctl_elem_value *ucontrol)
1229{
1230 int sample_rate_val;
1231
1232 switch (usb_rx_cfg.sample_rate) {
1233 case SAMPLING_RATE_384KHZ:
1234 sample_rate_val = 9;
1235 break;
1236 case SAMPLING_RATE_192KHZ:
1237 sample_rate_val = 8;
1238 break;
1239 case SAMPLING_RATE_96KHZ:
1240 sample_rate_val = 7;
1241 break;
1242 case SAMPLING_RATE_48KHZ:
1243 sample_rate_val = 6;
1244 break;
1245 case SAMPLING_RATE_44P1KHZ:
1246 sample_rate_val = 5;
1247 break;
1248 case SAMPLING_RATE_32KHZ:
1249 sample_rate_val = 4;
1250 break;
1251 case SAMPLING_RATE_22P05KHZ:
1252 sample_rate_val = 3;
1253 break;
1254 case SAMPLING_RATE_16KHZ:
1255 sample_rate_val = 2;
1256 break;
1257 case SAMPLING_RATE_11P025KHZ:
1258 sample_rate_val = 1;
1259 break;
1260 case SAMPLING_RATE_8KHZ:
1261 default:
1262 sample_rate_val = 0;
1263 break;
1264 }
1265
1266 ucontrol->value.integer.value[0] = sample_rate_val;
1267 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1268 usb_rx_cfg.sample_rate);
1269 return 0;
1270}
1271
1272static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1273 struct snd_ctl_elem_value *ucontrol)
1274{
1275 switch (ucontrol->value.integer.value[0]) {
1276 case 9:
1277 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1278 break;
1279 case 8:
1280 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1281 break;
1282 case 7:
1283 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1284 break;
1285 case 6:
1286 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1287 break;
1288 case 5:
1289 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1290 break;
1291 case 4:
1292 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1293 break;
1294 case 3:
1295 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1296 break;
1297 case 2:
1298 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1299 break;
1300 case 1:
1301 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1302 break;
1303 case 0:
1304 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1305 break;
1306 default:
1307 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1308 break;
1309 }
1310
1311 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1312 __func__, ucontrol->value.integer.value[0],
1313 usb_rx_cfg.sample_rate);
1314 return 0;
1315}
1316
1317static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1318 struct snd_ctl_elem_value *ucontrol)
1319{
1320 switch (usb_rx_cfg.bit_format) {
1321 case SNDRV_PCM_FORMAT_S32_LE:
1322 ucontrol->value.integer.value[0] = 3;
1323 break;
1324 case SNDRV_PCM_FORMAT_S24_3LE:
1325 ucontrol->value.integer.value[0] = 2;
1326 break;
1327 case SNDRV_PCM_FORMAT_S24_LE:
1328 ucontrol->value.integer.value[0] = 1;
1329 break;
1330 case SNDRV_PCM_FORMAT_S16_LE:
1331 default:
1332 ucontrol->value.integer.value[0] = 0;
1333 break;
1334 }
1335
1336 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1337 __func__, usb_rx_cfg.bit_format,
1338 ucontrol->value.integer.value[0]);
1339 return 0;
1340}
1341
1342static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1343 struct snd_ctl_elem_value *ucontrol)
1344{
1345 int rc = 0;
1346
1347 switch (ucontrol->value.integer.value[0]) {
1348 case 3:
1349 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1350 break;
1351 case 2:
1352 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1353 break;
1354 case 1:
1355 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1356 break;
1357 case 0:
1358 default:
1359 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1360 break;
1361 }
1362 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1363 __func__, usb_rx_cfg.bit_format,
1364 ucontrol->value.integer.value[0]);
1365
1366 return rc;
1367}
1368
1369static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1370 struct snd_ctl_elem_value *ucontrol)
1371{
1372 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1373 usb_tx_cfg.channels);
1374 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1375 return 0;
1376}
1377
1378static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1379 struct snd_ctl_elem_value *ucontrol)
1380{
1381 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1382
1383 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1384 return 1;
1385}
1386
1387static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1388 struct snd_ctl_elem_value *ucontrol)
1389{
1390 int sample_rate_val;
1391
1392 switch (usb_tx_cfg.sample_rate) {
1393 case SAMPLING_RATE_384KHZ:
1394 sample_rate_val = 9;
1395 break;
1396 case SAMPLING_RATE_192KHZ:
1397 sample_rate_val = 8;
1398 break;
1399 case SAMPLING_RATE_96KHZ:
1400 sample_rate_val = 7;
1401 break;
1402 case SAMPLING_RATE_48KHZ:
1403 sample_rate_val = 6;
1404 break;
1405 case SAMPLING_RATE_44P1KHZ:
1406 sample_rate_val = 5;
1407 break;
1408 case SAMPLING_RATE_32KHZ:
1409 sample_rate_val = 4;
1410 break;
1411 case SAMPLING_RATE_22P05KHZ:
1412 sample_rate_val = 3;
1413 break;
1414 case SAMPLING_RATE_16KHZ:
1415 sample_rate_val = 2;
1416 break;
1417 case SAMPLING_RATE_11P025KHZ:
1418 sample_rate_val = 1;
1419 break;
1420 case SAMPLING_RATE_8KHZ:
1421 sample_rate_val = 0;
1422 break;
1423 default:
1424 sample_rate_val = 6;
1425 break;
1426 }
1427
1428 ucontrol->value.integer.value[0] = sample_rate_val;
1429 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1430 usb_tx_cfg.sample_rate);
1431 return 0;
1432}
1433
1434static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1435 struct snd_ctl_elem_value *ucontrol)
1436{
1437 switch (ucontrol->value.integer.value[0]) {
1438 case 9:
1439 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1440 break;
1441 case 8:
1442 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1443 break;
1444 case 7:
1445 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1446 break;
1447 case 6:
1448 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1449 break;
1450 case 5:
1451 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1452 break;
1453 case 4:
1454 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1455 break;
1456 case 3:
1457 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1458 break;
1459 case 2:
1460 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1461 break;
1462 case 1:
1463 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1464 break;
1465 case 0:
1466 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1467 break;
1468 default:
1469 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1470 break;
1471 }
1472
1473 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1474 __func__, ucontrol->value.integer.value[0],
1475 usb_tx_cfg.sample_rate);
1476 return 0;
1477}
1478
1479static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1480 struct snd_ctl_elem_value *ucontrol)
1481{
1482 switch (usb_tx_cfg.bit_format) {
1483 case SNDRV_PCM_FORMAT_S32_LE:
1484 ucontrol->value.integer.value[0] = 3;
1485 break;
1486 case SNDRV_PCM_FORMAT_S24_3LE:
1487 ucontrol->value.integer.value[0] = 2;
1488 break;
1489 case SNDRV_PCM_FORMAT_S24_LE:
1490 ucontrol->value.integer.value[0] = 1;
1491 break;
1492 case SNDRV_PCM_FORMAT_S16_LE:
1493 default:
1494 ucontrol->value.integer.value[0] = 0;
1495 break;
1496 }
1497
1498 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1499 __func__, usb_tx_cfg.bit_format,
1500 ucontrol->value.integer.value[0]);
1501 return 0;
1502}
1503
1504static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1505 struct snd_ctl_elem_value *ucontrol)
1506{
1507 int rc = 0;
1508
1509 switch (ucontrol->value.integer.value[0]) {
1510 case 3:
1511 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1512 break;
1513 case 2:
1514 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1515 break;
1516 case 1:
1517 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1518 break;
1519 case 0:
1520 default:
1521 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1522 break;
1523 }
1524 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1525 __func__, usb_tx_cfg.bit_format,
1526 ucontrol->value.integer.value[0]);
1527
1528 return rc;
1529}
1530
1531const struct snd_kcontrol_new msm_common_snd_controls[] = {
1532 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
1533 proxy_rx_ch_get, proxy_rx_ch_put),
1534 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
1535 aux_pcm_rx_sample_rate_get,
1536 aux_pcm_rx_sample_rate_put),
1537 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
1538 aux_pcm_rx_sample_rate_get,
1539 aux_pcm_rx_sample_rate_put),
1540 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
1541 aux_pcm_rx_sample_rate_get,
1542 aux_pcm_rx_sample_rate_put),
1543 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
1544 aux_pcm_rx_sample_rate_get,
1545 aux_pcm_rx_sample_rate_put),
1546 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
1547 aux_pcm_tx_sample_rate_get,
1548 aux_pcm_tx_sample_rate_put),
1549 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
1550 aux_pcm_tx_sample_rate_get,
1551 aux_pcm_tx_sample_rate_put),
1552 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
1553 aux_pcm_tx_sample_rate_get,
1554 aux_pcm_tx_sample_rate_put),
1555 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
1556 aux_pcm_tx_sample_rate_get,
1557 aux_pcm_tx_sample_rate_put),
1558 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
1559 mi2s_rx_sample_rate_get,
1560 mi2s_rx_sample_rate_put),
1561 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
1562 mi2s_rx_sample_rate_get,
1563 mi2s_rx_sample_rate_put),
1564 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
1565 mi2s_rx_sample_rate_get,
1566 mi2s_rx_sample_rate_put),
1567 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
1568 mi2s_rx_sample_rate_get,
1569 mi2s_rx_sample_rate_put),
1570 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
1571 mi2s_tx_sample_rate_get,
1572 mi2s_tx_sample_rate_put),
1573 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
1574 mi2s_tx_sample_rate_get,
1575 mi2s_tx_sample_rate_put),
1576 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
1577 mi2s_tx_sample_rate_get,
1578 mi2s_tx_sample_rate_put),
1579 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
1580 mi2s_tx_sample_rate_get,
1581 mi2s_tx_sample_rate_put),
1582 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
1583 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1584 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
1585 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1586 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
1587 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1588 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
1589 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1590 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
1591 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1592 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
1593 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1594 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
1595 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1596 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
1597 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1598 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
1599 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
1600 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
1601 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
1602 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
1603 usb_audio_rx_format_get, usb_audio_rx_format_put),
1604 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
1605 usb_audio_tx_format_get, usb_audio_tx_format_put),
1606 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
1607 usb_audio_rx_sample_rate_get,
1608 usb_audio_rx_sample_rate_put),
1609 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
1610 usb_audio_tx_sample_rate_get,
1611 usb_audio_tx_sample_rate_put),
1612 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1613 tdm_rx_sample_rate_get,
1614 tdm_rx_sample_rate_put),
1615 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1616 tdm_tx_sample_rate_get,
1617 tdm_tx_sample_rate_put),
1618 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
1619 tdm_rx_format_get,
1620 tdm_rx_format_put),
1621 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
1622 tdm_tx_format_get,
1623 tdm_tx_format_put),
1624 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
1625 tdm_rx_ch_get,
1626 tdm_rx_ch_put),
1627 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
1628 tdm_tx_ch_get,
1629 tdm_tx_ch_put),
1630 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1631 tdm_rx_sample_rate_get,
1632 tdm_rx_sample_rate_put),
1633 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1634 tdm_tx_sample_rate_get,
1635 tdm_tx_sample_rate_put),
1636 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
1637 tdm_rx_format_get,
1638 tdm_rx_format_put),
1639 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
1640 tdm_tx_format_get,
1641 tdm_tx_format_put),
1642 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
1643 tdm_rx_ch_get,
1644 tdm_rx_ch_put),
1645 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
1646 tdm_tx_ch_get,
1647 tdm_tx_ch_put),
1648 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1649 tdm_rx_sample_rate_get,
1650 tdm_rx_sample_rate_put),
1651 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1652 tdm_tx_sample_rate_get,
1653 tdm_tx_sample_rate_put),
1654 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
1655 tdm_rx_format_get,
1656 tdm_rx_format_put),
1657 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
1658 tdm_tx_format_get,
1659 tdm_tx_format_put),
1660 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
1661 tdm_rx_ch_get,
1662 tdm_rx_ch_put),
1663 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
1664 tdm_tx_ch_get,
1665 tdm_tx_ch_put),
1666 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1667 tdm_rx_sample_rate_get,
1668 tdm_rx_sample_rate_put),
1669 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1670 tdm_tx_sample_rate_get,
1671 tdm_tx_sample_rate_put),
1672 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
1673 tdm_rx_format_get,
1674 tdm_rx_format_put),
1675 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
1676 tdm_tx_format_get,
1677 tdm_tx_format_put),
1678 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
1679 tdm_rx_ch_get,
1680 tdm_rx_ch_put),
1681 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
1682 tdm_tx_ch_get,
1683 tdm_tx_ch_put),
1684};
1685
1686static inline int param_is_mask(int p)
1687{
1688 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
1689 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
1690}
1691
1692static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
1693 int n)
1694{
1695 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
1696}
1697
1698static void param_set_mask(struct snd_pcm_hw_params *p, int n, unsigned int bit)
1699{
1700 if (bit >= SNDRV_MASK_MAX)
1701 return;
1702 if (param_is_mask(n)) {
1703 struct snd_mask *m = param_to_mask(p, n);
1704
1705 m->bits[0] = 0;
1706 m->bits[1] = 0;
1707 m->bits[bit >> 5] |= (1 << (bit & 31));
1708 }
1709}
1710
1711/**
1712 * msm_common_be_hw_params_fixup - updates settings of ALSA BE hw params.
1713 *
1714 * @rtd: runtime dailink instance
1715 * @params: HW params of associated backend dailink.
1716 *
1717 * Returns 0.
1718 */
1719int msm_common_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
1720 struct snd_pcm_hw_params *params)
1721{
1722 struct snd_soc_dai_link *dai_link = rtd->dai_link;
1723 struct snd_interval *rate = hw_param_interval(params,
1724 SNDRV_PCM_HW_PARAM_RATE);
1725 struct snd_interval *channels = hw_param_interval(params,
1726 SNDRV_PCM_HW_PARAM_CHANNELS);
1727 int rc = 0;
1728
1729 pr_debug("%s: format = %d, rate = %d\n",
1730 __func__, params_format(params), params_rate(params));
1731
1732 switch (dai_link->be_id) {
1733 case MSM_BACKEND_DAI_USB_RX:
1734 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1735 usb_rx_cfg.bit_format);
1736 rate->min = rate->max = usb_rx_cfg.sample_rate;
1737 channels->min = channels->max = usb_rx_cfg.channels;
1738 break;
1739
1740 case MSM_BACKEND_DAI_USB_TX:
1741 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1742 usb_tx_cfg.bit_format);
1743 rate->min = rate->max = usb_tx_cfg.sample_rate;
1744 channels->min = channels->max = usb_tx_cfg.channels;
1745 break;
1746
1747 case MSM_BACKEND_DAI_AFE_PCM_RX:
1748 channels->min = channels->max = proxy_rx_cfg.channels;
1749 rate->min = rate->max = SAMPLING_RATE_48KHZ;
1750 break;
1751
1752 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
1753 channels->min = channels->max =
1754 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
1755 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1756 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
1757 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
1758 break;
1759
1760 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
1761 channels->min = channels->max =
1762 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
1763 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1764 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
1765 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
1766 break;
1767
1768 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
1769 channels->min = channels->max =
1770 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
1771 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1772 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
1773 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
1774 break;
1775
1776 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
1777 channels->min = channels->max =
1778 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
1779 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1780 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
1781 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
1782 break;
1783
1784 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
1785 channels->min = channels->max =
1786 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
1787 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1788 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
1789 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
1790 break;
1791
1792 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
1793 channels->min = channels->max =
1794 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
1795 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1796 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
1797 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
1798 break;
1799
1800 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
1801 channels->min = channels->max =
1802 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
1803 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1804 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
1805 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
1806 break;
1807
1808 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
1809 channels->min = channels->max =
1810 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
1811 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
1812 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
1813 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
1814 break;
1815
1816 case MSM_BACKEND_DAI_AUXPCM_RX:
1817 rate->min = rate->max =
1818 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
1819 channels->min = channels->max =
1820 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
1821 break;
1822
1823 case MSM_BACKEND_DAI_AUXPCM_TX:
1824 rate->min = rate->max =
1825 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
1826 channels->min = channels->max =
1827 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
1828 break;
1829
1830 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
1831 rate->min = rate->max =
1832 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
1833 channels->min = channels->max =
1834 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
1835 break;
1836
1837 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
1838 rate->min = rate->max =
1839 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
1840 channels->min = channels->max =
1841 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
1842 break;
1843
1844 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
1845 rate->min = rate->max =
1846 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
1847 channels->min = channels->max =
1848 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
1849 break;
1850
1851 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
1852 rate->min = rate->max =
1853 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
1854 channels->min = channels->max =
1855 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
1856 break;
1857
1858 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
1859 rate->min = rate->max =
1860 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
1861 channels->min = channels->max =
1862 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
1863 break;
1864
1865 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
1866 rate->min = rate->max =
1867 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
1868 channels->min = channels->max =
1869 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
1870 break;
1871
1872 case MSM_BACKEND_DAI_PRI_MI2S_RX:
1873 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
1874 channels->min = channels->max =
1875 mi2s_rx_cfg[PRIM_MI2S].channels;
1876 break;
1877
1878 case MSM_BACKEND_DAI_PRI_MI2S_TX:
1879 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
1880 channels->min = channels->max =
1881 mi2s_tx_cfg[PRIM_MI2S].channels;
1882 break;
1883
1884 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
1885 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
1886 channels->min = channels->max =
1887 mi2s_rx_cfg[SEC_MI2S].channels;
1888 break;
1889
1890 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
1891 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
1892 channels->min = channels->max =
1893 mi2s_tx_cfg[SEC_MI2S].channels;
1894 break;
1895
1896 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
1897 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
1898 channels->min = channels->max =
1899 mi2s_rx_cfg[TERT_MI2S].channels;
1900 break;
1901
1902 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
1903 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
1904 channels->min = channels->max =
1905 mi2s_tx_cfg[TERT_MI2S].channels;
1906 break;
1907
1908 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
1909 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
1910 channels->min = channels->max =
1911 mi2s_rx_cfg[QUAT_MI2S].channels;
1912 break;
1913
1914 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
1915 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
1916 channels->min = channels->max =
1917 mi2s_tx_cfg[QUAT_MI2S].channels;
1918 break;
1919
1920 default:
1921 rate->min = rate->max = SAMPLING_RATE_48KHZ;
1922 break;
1923 }
1924 return rc;
1925}
1926EXPORT_SYMBOL(msm_common_be_hw_params_fixup);
1927
1928/**
1929 * msm_aux_pcm_snd_startup - startup ops of auxpcm.
1930 *
1931 * @substream: PCM stream pointer of associated backend dailink
1932 *
1933 * Returns 0 on success or -EINVAL on error.
1934 */
1935int msm_aux_pcm_snd_startup(struct snd_pcm_substream *substream)
1936{
1937 int ret = 0;
1938 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1939 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
1940 int index = cpu_dai->id - 1;
1941 return ret = 0;
1942
1943 dev_dbg(rtd->card->dev,
1944 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
1945 __func__, substream->name, substream->stream,
1946 cpu_dai->name, cpu_dai->id);
1947
1948 if (index < PRIM_AUX_PCM || index > QUAT_AUX_PCM) {
1949 ret = -EINVAL;
1950 dev_err(rtd->card->dev,
1951 "%s: CPU DAI id (%d) out of range\n",
1952 __func__, cpu_dai->id);
1953 goto done;
1954 }
1955
1956 mutex_lock(&auxpcm_intf_conf[index].lock);
1957 if (++auxpcm_intf_conf[index].ref_cnt == 1) {
1958 if (mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr != NULL) {
1959 mutex_lock(&mi2s_auxpcm_conf[index].lock);
1960 iowrite32(1,
1961 mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr);
1962 mutex_unlock(&mi2s_auxpcm_conf[index].lock);
1963 } else {
1964 dev_err(rtd->card->dev,
1965 "%s lpaif_tert_muxsel_virt_addr is NULL\n",
1966 __func__);
1967 ret = -EINVAL;
1968 }
1969 }
Xiaoyu Ye1a2d8bd92017-01-31 18:54:15 -08001970 if (ret < 0)
Banajit Goswami0530e2f2016-12-09 21:34:37 -08001971 auxpcm_intf_conf[index].ref_cnt--;
1972
1973 mutex_unlock(&auxpcm_intf_conf[index].lock);
1974
1975done:
1976 return ret;
1977}
1978EXPORT_SYMBOL(msm_aux_pcm_snd_startup);
1979
1980/**
1981 * msm_aux_pcm_snd_shutdown - shutdown ops of auxpcm.
1982 *
1983 * @substream: PCM stream pointer of associated backend dailink
1984 */
1985void msm_aux_pcm_snd_shutdown(struct snd_pcm_substream *substream)
1986{
1987 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1988 int index = rtd->cpu_dai->id - 1;
1989
1990 dev_dbg(rtd->card->dev,
1991 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
1992 __func__,
1993 substream->name, substream->stream,
1994 rtd->cpu_dai->name, rtd->cpu_dai->id);
1995
1996 if (index < PRIM_AUX_PCM || index > QUAT_AUX_PCM) {
1997 dev_err(rtd->card->dev,
1998 "%s: CPU DAI id (%d) out of range\n",
1999 __func__, rtd->cpu_dai->id);
2000 return;
2001 }
2002
2003 mutex_lock(&auxpcm_intf_conf[index].lock);
2004 if (--auxpcm_intf_conf[index].ref_cnt == 0) {
2005 if (mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr != NULL) {
2006 mutex_lock(&mi2s_auxpcm_conf[index].lock);
2007 iowrite32(0,
2008 mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr);
2009 mutex_unlock(&mi2s_auxpcm_conf[index].lock);
2010 } else {
2011 dev_err(rtd->card->dev,
2012 "%s lpaif_tert_muxsel_virt_addr is NULL\n",
2013 __func__);
2014 auxpcm_intf_conf[index].ref_cnt++;
2015 }
2016 }
2017 mutex_unlock(&auxpcm_intf_conf[index].lock);
2018}
2019EXPORT_SYMBOL(msm_aux_pcm_snd_shutdown);
2020
2021static int msm_get_port_id(int be_id)
2022{
2023 int afe_port_id;
2024
2025 switch (be_id) {
2026 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2027 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2028 break;
2029 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2030 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2031 break;
2032 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2033 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2034 break;
2035 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2036 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2037 break;
2038 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2039 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2040 break;
2041 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2042 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2043 break;
2044 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2045 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2046 break;
2047 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2048 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2049 break;
2050 default:
2051 pr_err("%s: Invalid be_id: %d\n", __func__, be_id);
2052 afe_port_id = -EINVAL;
2053 }
2054
2055 return afe_port_id;
2056}
2057
2058static u32 get_mi2s_bits_per_sample(u32 bit_format)
2059{
2060 u32 bit_per_sample;
2061
2062 switch (bit_format) {
2063 case SNDRV_PCM_FORMAT_S24_3LE:
2064 case SNDRV_PCM_FORMAT_S24_LE:
2065 bit_per_sample = 32;
2066 break;
2067 case SNDRV_PCM_FORMAT_S16_LE:
2068 default:
2069 bit_per_sample = 16;
2070 break;
2071 }
2072
2073 return bit_per_sample;
2074}
2075
2076static void update_mi2s_clk_val(int dai_id, int stream)
2077{
2078 u32 bit_per_sample;
2079
2080 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2081 bit_per_sample =
2082 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2083 mi2s_clk[dai_id].clk_freq_in_hz =
2084 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2085 } else {
2086 bit_per_sample =
2087 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2088 mi2s_clk[dai_id].clk_freq_in_hz =
2089 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2090 }
2091
2092 if (!mi2s_intf_conf[dai_id].msm_is_mi2s_master)
2093 mi2s_clk[dai_id].clk_freq_in_hz = 0;
2094}
2095
2096static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2097{
2098 int ret = 0;
2099 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2100 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2101 int port_id = 0;
2102 int index = cpu_dai->id;
2103
2104 port_id = msm_get_port_id(rtd->dai_link->be_id);
Xiaoyu Ye1a2d8bd92017-01-31 18:54:15 -08002105 if (port_id < 0) {
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002106 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2107 ret = port_id;
2108 goto done;
2109 }
2110
2111 if (enable) {
2112 update_mi2s_clk_val(index, substream->stream);
2113 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2114 mi2s_clk[index].clk_freq_in_hz);
2115 }
2116
2117 mi2s_clk[index].enable = enable;
2118 ret = afe_set_lpass_clock_v2(port_id,
2119 &mi2s_clk[index]);
2120 if (ret < 0) {
2121 dev_err(rtd->card->dev,
2122 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2123 __func__, port_id, ret);
2124 goto done;
2125 }
2126
2127done:
2128 return ret;
2129}
2130
2131/**
2132 * msm_mi2s_snd_startup - startup ops of mi2s.
2133 *
2134 * @substream: PCM stream pointer of associated backend dailink
2135 *
2136 * Returns 0 on success or -EINVAL on error.
2137 */
2138int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
2139{
2140 int ret = 0;
2141 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2142 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
Tanya Dixit73a3a262016-12-08 22:25:56 +05302143 int port_id = msm_get_port_id(rtd->dai_link->be_id);
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002144 int index = cpu_dai->id;
2145 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
2146
2147 dev_dbg(rtd->card->dev,
2148 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
2149 __func__, substream->name, substream->stream,
2150 cpu_dai->name, cpu_dai->id);
2151
2152 if (index < PRIM_MI2S || index > QUAT_MI2S) {
2153 ret = -EINVAL;
2154 dev_err(rtd->card->dev,
2155 "%s: CPU DAI id (%d) out of range\n",
2156 __func__, cpu_dai->id);
2157 goto done;
2158 }
2159 /*
2160 * Muxtex protection in case the same MI2S
2161 * interface using for both TX and RX so
2162 * that the same clock won't be enable twice.
2163 */
2164 mutex_lock(&mi2s_intf_conf[index].lock);
2165 if (++mi2s_intf_conf[index].ref_cnt == 1) {
Tanya Dixit73a3a262016-12-08 22:25:56 +05302166 /* Check if msm needs to provide the clock to the interface */
2167 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
2168 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
2169 fmt = SND_SOC_DAIFMT_CBM_CFM;
2170 }
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002171 ret = msm_mi2s_set_sclk(substream, true);
Xiaoyu Ye1a2d8bd92017-01-31 18:54:15 -08002172 if (ret < 0) {
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002173 dev_err(rtd->card->dev,
2174 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
2175 __func__, ret);
2176 goto clean_up;
2177 }
2178 if (mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr != NULL) {
2179 mutex_lock(&mi2s_auxpcm_conf[index].lock);
2180 iowrite32(0,
2181 mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr);
2182 mutex_unlock(&mi2s_auxpcm_conf[index].lock);
2183 } else {
2184 dev_err(rtd->card->dev,
2185 "%s lpaif_muxsel_virt_addr is NULL for dai %d\n",
2186 __func__, index);
2187 ret = -EINVAL;
2188 goto clk_off;
2189 }
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002190 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
Xiaoyu Ye1a2d8bd92017-01-31 18:54:15 -08002191 if (ret < 0) {
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002192 dev_err(rtd->card->dev,
2193 "%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
2194 __func__, index, ret);
2195 goto clk_off;
2196 }
Tanya Dixit73a3a262016-12-08 22:25:56 +05302197 if (mi2s_intf_conf[index].msm_is_ext_mclk) {
2198 mi2s_mclk[index].enable = 1;
2199 pr_debug("%s: Enabling mclk, clk_freq_in_hz = %u\n",
2200 __func__, mi2s_mclk[index].clk_freq_in_hz);
2201 ret = afe_set_lpass_clock_v2(port_id,
2202 &mi2s_mclk[index]);
2203 if (ret < 0) {
2204 pr_err("%s: afe lpass mclk failed, err:%d\n",
2205 __func__, ret);
2206 goto clk_off;
2207 }
2208 }
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002209 }
Tanya Dixit73a3a262016-12-08 22:25:56 +05302210 mutex_unlock(&mi2s_intf_conf[index].lock);
2211 return 0;
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002212clk_off:
Xiaoyu Ye1a2d8bd92017-01-31 18:54:15 -08002213 if (ret < 0)
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002214 msm_mi2s_set_sclk(substream, false);
2215clean_up:
Xiaoyu Ye1a2d8bd92017-01-31 18:54:15 -08002216 if (ret < 0)
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002217 mi2s_intf_conf[index].ref_cnt--;
2218 mutex_unlock(&mi2s_intf_conf[index].lock);
2219done:
2220 return ret;
2221}
2222EXPORT_SYMBOL(msm_mi2s_snd_startup);
2223
2224/**
2225 * msm_mi2s_snd_shutdown - shutdown ops of mi2s.
2226 *
2227 * @substream: PCM stream pointer of associated backend dailink
2228 */
2229void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
2230{
2231 int ret;
2232 struct snd_soc_pcm_runtime *rtd = substream->private_data;
Tanya Dixit73a3a262016-12-08 22:25:56 +05302233 int port_id = msm_get_port_id(rtd->dai_link->be_id);
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002234 int index = rtd->cpu_dai->id;
2235
2236 pr_debug("%s(): substream = %s stream = %d\n", __func__,
2237 substream->name, substream->stream);
2238 if (index < PRIM_MI2S || index > QUAT_MI2S) {
2239 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
2240 return;
2241 }
2242
2243 mutex_lock(&mi2s_intf_conf[index].lock);
2244 if (--mi2s_intf_conf[index].ref_cnt == 0) {
2245 ret = msm_mi2s_set_sclk(substream, false);
2246 if (ret < 0) {
2247 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
2248 __func__, index, ret);
2249 mi2s_intf_conf[index].ref_cnt++;
2250 }
Tanya Dixit73a3a262016-12-08 22:25:56 +05302251 if (mi2s_intf_conf[index].msm_is_ext_mclk) {
2252 mi2s_mclk[index].enable = 0;
2253 pr_debug("%s: Disabling mclk, clk_freq_in_hz = %u\n",
2254 __func__, mi2s_mclk[index].clk_freq_in_hz);
2255 ret = afe_set_lpass_clock_v2(port_id,
2256 &mi2s_mclk[index]);
2257 if (ret < 0) {
2258 pr_err("%s: mclk disable failed for MCLK (%d); ret=%d\n",
2259 __func__, index, ret);
2260 }
2261 }
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002262 }
2263 mutex_unlock(&mi2s_intf_conf[index].lock);
2264}
2265EXPORT_SYMBOL(msm_mi2s_snd_shutdown);
2266
2267/* Validate whether US EU switch is present or not */
2268static int msm_prepare_us_euro(struct snd_soc_card *card)
2269{
2270 struct msm_asoc_mach_data *pdata =
2271 snd_soc_card_get_drvdata(card);
2272 int ret = 0;
2273
2274 if (pdata->us_euro_gpio >= 0) {
2275 dev_dbg(card->dev, "%s: us_euro gpio request %d", __func__,
2276 pdata->us_euro_gpio);
2277 ret = gpio_request(pdata->us_euro_gpio, "TASHA_CODEC_US_EURO");
2278 if (ret) {
2279 dev_err(card->dev,
2280 "%s: Failed to request codec US/EURO gpio %d error %d\n",
2281 __func__, pdata->us_euro_gpio, ret);
2282 }
2283 }
2284
2285 return ret;
2286}
2287
2288static bool msm_swap_gnd_mic(struct snd_soc_codec *codec)
2289{
2290 struct snd_soc_card *card = codec->component.card;
2291 struct msm_asoc_mach_data *pdata =
2292 snd_soc_card_get_drvdata(card);
2293 int value = 0;
2294
2295 if (pdata->us_euro_gpio_p) {
2296 value = msm_cdc_pinctrl_get_state(pdata->us_euro_gpio_p);
2297 if (value)
2298 msm_cdc_pinctrl_select_sleep_state(
2299 pdata->us_euro_gpio_p);
2300 else
2301 msm_cdc_pinctrl_select_active_state(
2302 pdata->us_euro_gpio_p);
2303 } else if (pdata->us_euro_gpio >= 0) {
2304 value = gpio_get_value_cansleep(pdata->us_euro_gpio);
2305 gpio_set_value_cansleep(pdata->us_euro_gpio, !value);
2306 }
2307 pr_debug("%s: swap select switch %d to %d\n", __func__, value, !value);
2308 return true;
2309}
2310
2311static int msm_populate_dai_link_component_of_node(
Laxminath Kasame68e94f2016-12-09 12:08:00 +05302312 struct msm_asoc_mach_data *pdata,
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002313 struct snd_soc_card *card)
2314{
2315 int i, index, ret = 0;
2316 struct device *cdev = card->dev;
2317 struct snd_soc_dai_link *dai_link = card->dai_link;
2318 struct device_node *phandle;
2319
2320 if (!cdev) {
2321 pr_err("%s: Sound card device memory NULL\n", __func__);
2322 return -ENODEV;
2323 }
2324
2325 for (i = 0; i < card->num_links; i++) {
2326 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
2327 continue;
2328
2329 /* populate platform_of_node for snd card dai links */
2330 if (dai_link[i].platform_name &&
2331 !dai_link[i].platform_of_node) {
2332 index = of_property_match_string(cdev->of_node,
2333 "asoc-platform-names",
2334 dai_link[i].platform_name);
2335 if (index < 0) {
2336 pr_err("%s: No match found for platform name: %s\n",
2337 __func__, dai_link[i].platform_name);
2338 ret = index;
2339 goto cpu_dai;
2340 }
2341 phandle = of_parse_phandle(cdev->of_node,
2342 "asoc-platform",
2343 index);
2344 if (!phandle) {
2345 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
2346 __func__, dai_link[i].platform_name,
2347 index);
2348 ret = -ENODEV;
2349 goto err;
2350 }
2351 dai_link[i].platform_of_node = phandle;
2352 dai_link[i].platform_name = NULL;
2353 }
2354cpu_dai:
2355 /* populate cpu_of_node for snd card dai links */
2356 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
2357 index = of_property_match_string(cdev->of_node,
2358 "asoc-cpu-names",
2359 dai_link[i].cpu_dai_name);
2360 if (index < 0)
2361 goto codec_dai;
2362 phandle = of_parse_phandle(cdev->of_node, "asoc-cpu",
2363 index);
2364 if (!phandle) {
2365 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
2366 __func__, dai_link[i].cpu_dai_name);
2367 ret = -ENODEV;
2368 goto err;
2369 }
2370 dai_link[i].cpu_of_node = phandle;
2371 dai_link[i].cpu_dai_name = NULL;
2372 }
2373codec_dai:
2374 /* populate codec_of_node for snd card dai links */
2375 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
2376 index = of_property_match_string(cdev->of_node,
2377 "asoc-codec-names",
2378 dai_link[i].codec_name);
2379 if (index < 0)
2380 continue;
2381 phandle = of_parse_phandle(cdev->of_node, "asoc-codec",
2382 index);
2383 if (!phandle) {
2384 pr_err("%s: retrieving phandle for codec dai %s failed\n",
2385 __func__, dai_link[i].codec_name);
2386 ret = -ENODEV;
2387 goto err;
2388 }
2389 dai_link[i].codec_of_node = phandle;
2390 dai_link[i].codec_name = NULL;
2391 }
Laxminath Kasamad0f6962016-12-14 20:00:35 +05302392 if (pdata->snd_card_val == INT_SND_CARD) {
Laxminath Kasame68e94f2016-12-09 12:08:00 +05302393 if ((dai_link[i].be_id ==
2394 MSM_BACKEND_DAI_INT0_MI2S_RX) ||
2395 (dai_link[i].be_id ==
2396 MSM_BACKEND_DAI_INT1_MI2S_RX) ||
2397 (dai_link[i].be_id ==
2398 MSM_BACKEND_DAI_INT2_MI2S_TX) ||
2399 (dai_link[i].be_id ==
2400 MSM_BACKEND_DAI_INT3_MI2S_TX)) {
2401 index = of_property_match_string(cdev->of_node,
2402 "asoc-codec-names",
2403 MSM_INT_DIGITAL_CODEC);
2404 phandle = of_parse_phandle(cdev->of_node,
2405 "asoc-codec",
2406 index);
2407 dai_link[i].codecs[DIG_CDC].of_node = phandle;
2408 index = of_property_match_string(cdev->of_node,
2409 "asoc-codec-names",
2410 PMIC_INT_ANALOG_CODEC);
2411 phandle = of_parse_phandle(cdev->of_node,
2412 "asoc-codec",
2413 index);
2414 dai_link[i].codecs[ANA_CDC].of_node = phandle;
2415 }
2416 }
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002417 }
2418err:
2419 return ret;
2420}
2421
2422static int msm_wsa881x_init(struct snd_soc_component *component)
2423{
2424 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {100, 101, 102, 106};
2425 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {103, 104, 105, 107};
2426 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
2427 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
2428 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
2429 struct msm_asoc_mach_data *pdata;
2430 struct snd_soc_dapm_context *dapm =
2431 snd_soc_codec_get_dapm(codec);
2432
2433 if (!codec) {
2434 pr_err("%s codec is NULL\n", __func__);
2435 return -EINVAL;
2436 }
2437
2438 if (!strcmp(component->name_prefix, "SpkrLeft")) {
2439 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
2440 __func__, codec->component.name);
2441 wsa881x_set_channel_map(codec, &spkleft_ports[0],
2442 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
2443 &ch_rate[0]);
2444 if (dapm->component) {
2445 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
2446 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
2447 }
2448 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
2449 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
2450 __func__, codec->component.name);
2451 wsa881x_set_channel_map(codec, &spkright_ports[0],
2452 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
2453 &ch_rate[0]);
2454 if (dapm->component) {
2455 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
2456 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
2457 }
2458 } else {
2459 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
2460 codec->component.name);
2461 return -EINVAL;
2462 }
2463
2464
2465 pdata = snd_soc_card_get_drvdata(component->card);
2466 if (pdata && pdata->codec_root)
2467 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
2468 codec);
2469 return 0;
2470}
2471
2472
2473static int msm_init_wsa_dev(struct platform_device *pdev,
2474 struct snd_soc_card *card)
2475{
2476 struct device_node *wsa_of_node;
2477 u32 wsa_max_devs;
2478 u32 wsa_dev_cnt;
2479 char *dev_name_str = NULL;
2480 struct msm_wsa881x_dev_info *wsa881x_dev_info;
2481 const char *wsa_auxdev_name_prefix[1];
2482 int found = 0;
2483 int i;
2484 int ret;
2485
2486 /* Get maximum WSA device count for this platform */
2487 ret = of_property_read_u32(pdev->dev.of_node,
2488 "qcom,wsa-max-devs", &wsa_max_devs);
2489 if (ret) {
2490 dev_dbg(&pdev->dev,
2491 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
2492 __func__, pdev->dev.of_node->full_name, ret);
2493 goto err_dt;
2494 }
2495 if (wsa_max_devs == 0) {
2496 dev_warn(&pdev->dev,
2497 "%s: Max WSA devices is 0 for this target?\n",
2498 __func__);
2499 goto err_dt;
2500 }
2501
2502 /* Get count of WSA device phandles for this platform */
2503 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
2504 "qcom,wsa-devs", NULL);
2505 if (wsa_dev_cnt == -ENOENT) {
2506 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
2507 __func__);
2508 goto err_dt;
2509 } else if (wsa_dev_cnt <= 0) {
2510 dev_err(&pdev->dev,
2511 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
2512 __func__, wsa_dev_cnt);
2513 ret = -EINVAL;
2514 goto err_dt;
2515 }
2516
2517 /*
2518 * Expect total phandles count to be NOT less than maximum possible
2519 * WSA count. However, if it is less, then assign same value to
2520 * max count as well.
2521 */
2522 if (wsa_dev_cnt < wsa_max_devs) {
2523 dev_dbg(&pdev->dev,
2524 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
2525 __func__, wsa_max_devs, wsa_dev_cnt);
2526 wsa_max_devs = wsa_dev_cnt;
2527 }
2528
2529 /* Make sure prefix string passed for each WSA device */
2530 ret = of_property_count_strings(pdev->dev.of_node,
2531 "qcom,wsa-aux-dev-prefix");
2532 if (ret != wsa_dev_cnt) {
2533 dev_err(&pdev->dev,
2534 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
2535 __func__, wsa_dev_cnt, ret);
2536 ret = -EINVAL;
2537 goto err_dt;
2538 }
2539
2540 /*
2541 * Alloc mem to store phandle and index info of WSA device, if already
2542 * registered with ALSA core
2543 */
2544 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
2545 sizeof(struct msm_wsa881x_dev_info),
2546 GFP_KERNEL);
2547 if (!wsa881x_dev_info) {
2548 ret = -ENOMEM;
2549 goto err_mem;
2550 }
2551
2552 /*
2553 * search and check whether all WSA devices are already
2554 * registered with ALSA core or not. If found a node, store
2555 * the node and the index in a local array of struct for later
2556 * use.
2557 */
2558 for (i = 0; i < wsa_dev_cnt; i++) {
2559 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
2560 "qcom,wsa-devs", i);
2561 if (unlikely(!wsa_of_node)) {
2562 /* we should not be here */
2563 dev_err(&pdev->dev,
2564 "%s: wsa dev node is not present\n",
2565 __func__);
2566 ret = -EINVAL;
2567 goto err_dev_node;
2568 }
2569 if (soc_find_component(wsa_of_node, NULL)) {
2570 /* WSA device registered with ALSA core */
2571 wsa881x_dev_info[found].of_node = wsa_of_node;
2572 wsa881x_dev_info[found].index = i;
2573 found++;
2574 if (found == wsa_max_devs)
2575 break;
2576 }
2577 }
2578
2579 if (found < wsa_max_devs) {
2580 dev_dbg(&pdev->dev,
2581 "%s: failed to find %d components. Found only %d\n",
2582 __func__, wsa_max_devs, found);
2583 return -EPROBE_DEFER;
2584 }
2585 dev_info(&pdev->dev,
2586 "%s: found %d wsa881x devices registered with ALSA core\n",
2587 __func__, found);
2588
2589 card->num_aux_devs = wsa_max_devs;
2590 card->num_configs = wsa_max_devs;
2591
2592 /* Alloc array of AUX devs struct */
2593 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
2594 sizeof(struct snd_soc_aux_dev),
2595 GFP_KERNEL);
2596 if (!msm_aux_dev) {
2597 ret = -ENOMEM;
2598 goto err_auxdev_mem;
2599 }
2600
2601 /* Alloc array of codec conf struct */
2602 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_aux_devs,
2603 sizeof(struct snd_soc_codec_conf),
2604 GFP_KERNEL);
2605 if (!msm_codec_conf) {
2606 ret = -ENOMEM;
2607 goto err_codec_conf;
2608 }
2609
2610 for (i = 0; i < card->num_aux_devs; i++) {
2611 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
2612 GFP_KERNEL);
2613 if (!dev_name_str) {
2614 ret = -ENOMEM;
2615 goto err_dev_str;
2616 }
2617
2618 ret = of_property_read_string_index(pdev->dev.of_node,
2619 "qcom,wsa-aux-dev-prefix",
2620 wsa881x_dev_info[i].index,
2621 wsa_auxdev_name_prefix);
2622 if (ret) {
2623 dev_err(&pdev->dev,
2624 "%s: failed to read wsa aux dev prefix, ret = %d\n",
2625 __func__, ret);
2626 ret = -EINVAL;
2627 goto err_dt_prop;
2628 }
2629
2630 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
2631 msm_aux_dev[i].name = dev_name_str;
2632 msm_aux_dev[i].codec_name = NULL;
2633 msm_aux_dev[i].codec_of_node =
2634 wsa881x_dev_info[i].of_node;
2635 msm_aux_dev[i].init = msm_wsa881x_init;
2636 msm_codec_conf[i].dev_name = NULL;
2637 msm_codec_conf[i].name_prefix = wsa_auxdev_name_prefix[0];
2638 msm_codec_conf[i].of_node = wsa881x_dev_info[i].of_node;
2639 }
2640 card->codec_conf = msm_codec_conf;
2641 card->aux_dev = msm_aux_dev;
2642
2643 return 0;
2644
2645err_dt_prop:
2646 devm_kfree(&pdev->dev, dev_name_str);
2647err_dev_str:
2648 devm_kfree(&pdev->dev, msm_codec_conf);
2649err_codec_conf:
2650 devm_kfree(&pdev->dev, msm_aux_dev);
2651err_auxdev_mem:
2652err_dev_node:
2653 devm_kfree(&pdev->dev, wsa881x_dev_info);
2654err_mem:
2655err_dt:
2656 return ret;
2657}
2658
2659static void msm_free_auxdev_mem(struct platform_device *pdev)
2660{
2661 struct snd_soc_card *card = platform_get_drvdata(pdev);
2662 int i;
2663
2664 if (card->num_aux_devs > 0) {
2665 for (i = 0; i < card->num_aux_devs; i++) {
2666 kfree(msm_aux_dev[i].codec_name);
2667 kfree(msm_codec_conf[i].dev_name);
2668 kfree(msm_codec_conf[i].name_prefix);
2669 }
2670 }
2671}
2672
2673static void i2s_auxpcm_init(struct platform_device *pdev)
2674{
2675 struct resource *muxsel;
2676 int count;
2677 u32 mi2s_master_slave[MI2S_MAX];
Tanya Dixit73a3a262016-12-08 22:25:56 +05302678 u32 mi2s_ext_mclk[MI2S_MAX];
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002679 int ret;
2680 char *str[PCM_I2S_SEL_MAX] = {
2681 "lpaif_pri_mode_muxsel",
2682 "lpaif_sec_mode_muxsel",
2683 "lpaif_tert_mode_muxsel",
2684 "lpaif_quat_mode_muxsel"
2685 };
2686
2687 for (count = 0; count < MI2S_MAX; count++) {
2688 mutex_init(&mi2s_intf_conf[count].lock);
2689 mi2s_intf_conf[count].ref_cnt = 0;
2690 }
2691
2692 for (count = 0; count < AUX_PCM_MAX; count++) {
2693 mutex_init(&auxpcm_intf_conf[count].lock);
2694 auxpcm_intf_conf[count].ref_cnt = 0;
2695 }
2696
2697 for (count = 0; count < PCM_I2S_SEL_MAX; count++) {
2698 mutex_init(&mi2s_auxpcm_conf[count].lock);
2699 mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr = NULL;
2700 }
2701
2702 for (count = 0; count < PCM_I2S_SEL_MAX; count++) {
2703 muxsel = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2704 str[count]);
2705 if (muxsel) {
2706 mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr
2707 = ioremap(muxsel->start, resource_size(muxsel));
2708 }
2709 }
2710
2711 ret = of_property_read_u32_array(pdev->dev.of_node,
Tanya Dixit73a3a262016-12-08 22:25:56 +05302712 "qcom,msm-mi2s-master",
2713 mi2s_master_slave, MI2S_MAX);
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002714 if (ret) {
2715 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
2716 __func__);
2717 } else {
2718 for (count = 0; count < MI2S_MAX; count++) {
2719 mi2s_intf_conf[count].msm_is_mi2s_master =
2720 mi2s_master_slave[count];
2721 }
2722 }
Tanya Dixit73a3a262016-12-08 22:25:56 +05302723
2724 ret = of_property_read_u32_array(pdev->dev.of_node,
2725 "qcom,msm-mi2s-ext-mclk",
2726 mi2s_ext_mclk, MI2S_MAX);
2727 if (ret) {
2728 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-ext-mclk in DT node\n",
2729 __func__);
2730 } else {
2731 for (count = 0; count < MI2S_MAX; count++)
2732 mi2s_intf_conf[count].msm_is_ext_mclk =
2733 mi2s_ext_mclk[count];
2734 }
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002735}
2736
2737static void i2s_auxpcm_deinit(void)
2738{
2739 int count;
2740
2741 for (count = 0; count < PCM_I2S_SEL_MAX; count++)
2742 if (mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr !=
2743 NULL)
2744 iounmap(
2745 mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr);
2746}
2747
Neeraj Upadhyay49934422016-12-27 19:03:35 +05302748static const struct of_device_id sdm660_asoc_machine_of_match[] = {
2749 { .compatible = "qcom,sdm660-asoc-snd",
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002750 .data = "internal_codec"},
Neeraj Upadhyay49934422016-12-27 19:03:35 +05302751 { .compatible = "qcom,sdm660-asoc-snd-tasha",
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002752 .data = "tasha_codec"},
Neeraj Upadhyay49934422016-12-27 19:03:35 +05302753 { .compatible = "qcom,sdm660-asoc-snd-tavil",
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002754 .data = "tavil_codec"},
2755 {},
2756};
2757
2758static int msm_asoc_machine_probe(struct platform_device *pdev)
2759{
2760 struct snd_soc_card *card = NULL;
2761 struct msm_asoc_mach_data *pdata = NULL;
2762 const char *mclk = "qcom,msm-mclk-freq";
2763 int ret = -EINVAL, id;
2764 const struct of_device_id *match;
2765
2766 pdata = devm_kzalloc(&pdev->dev,
2767 sizeof(struct msm_asoc_mach_data),
2768 GFP_KERNEL);
2769 if (!pdata)
2770 return -ENOMEM;
2771
Neeraj Upadhyay49934422016-12-27 19:03:35 +05302772 match = of_match_node(sdm660_asoc_machine_of_match,
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002773 pdev->dev.of_node);
2774 if (!match)
2775 goto err;
2776
2777 ret = of_property_read_u32(pdev->dev.of_node, mclk, &id);
2778 if (ret) {
2779 dev_err(&pdev->dev,
2780 "%s: missing %s in dt node\n", __func__, mclk);
2781 id = DEFAULT_MCLK_RATE;
2782 }
2783 pdata->mclk_freq = id;
2784
2785 if (!strcmp(match->data, "tasha_codec") ||
2786 !strcmp(match->data, "tavil_codec")) {
2787 if (!strcmp(match->data, "tasha_codec"))
2788 pdata->snd_card_val = EXT_SND_CARD_TASHA;
2789 else
2790 pdata->snd_card_val = EXT_SND_CARD_TAVIL;
2791 ret = msm_ext_cdc_init(pdev, pdata, &card, &mbhc_cfg);
2792 if (ret)
2793 goto err;
2794 } else if (!strcmp(match->data, "internal_codec")) {
2795 pdata->snd_card_val = INT_SND_CARD;
2796 ret = msm_int_cdc_init(pdev, pdata, &card, &mbhc_cfg);
2797 if (ret)
2798 goto err;
2799 } else {
2800 dev_err(&pdev->dev,
2801 "%s: Not a matching DT sound node\n", __func__);
2802 goto err;
2803 }
2804 if (!card)
2805 goto err;
2806
2807 if (pdata->snd_card_val == INT_SND_CARD) {
2808 /*reading the gpio configurations from dtsi file*/
Laxminath Kasamad0f6962016-12-14 20:00:35 +05302809 pdata->pdm_gpio_p = of_parse_phandle(pdev->dev.of_node,
2810 "qcom,cdc-pdm-gpios", 0);
2811 pdata->comp_gpio_p = of_parse_phandle(pdev->dev.of_node,
2812 "qcom,cdc-comp-gpios", 0);
2813 pdata->sdw_gpio_p = of_parse_phandle(pdev->dev.of_node,
2814 "qcom,cdc-sdw-gpios", 0);
2815 pdata->dmic_gpio_p = of_parse_phandle(pdev->dev.of_node,
2816 "qcom,cdc-dmic-gpios", 0);
2817 pdata->ext_spk_gpio_p = of_parse_phandle(pdev->dev.of_node,
2818 "qcom,cdc-ext-spk-gpios", 0);
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002819 }
2820
2821 /*
2822 * Parse US-Euro gpio info from DT. Report no error if us-euro
2823 * entry is not found in DT file as some targets do not support
2824 * US-Euro detection
2825 */
2826 pdata->us_euro_gpio = of_get_named_gpio(pdev->dev.of_node,
2827 "qcom,us-euro-gpios", 0);
2828 if (!gpio_is_valid(pdata->us_euro_gpio))
2829 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
2830 "qcom,us-euro-gpios", 0);
2831 if (!gpio_is_valid(pdata->us_euro_gpio) && (!pdata->us_euro_gpio_p)) {
2832 dev_dbg(&pdev->dev, "property %s not detected in node %s",
2833 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
2834 } else {
2835 dev_dbg(&pdev->dev, "%s detected",
2836 "qcom,us-euro-gpios");
2837 mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
2838 }
2839
2840 ret = msm_prepare_us_euro(card);
2841 if (ret)
2842 dev_dbg(&pdev->dev, "msm_prepare_us_euro failed (%d)\n",
2843 ret);
2844
2845 i2s_auxpcm_init(pdev);
2846
2847 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
2848 if (ret)
2849 goto err;
2850
Laxminath Kasame68e94f2016-12-09 12:08:00 +05302851 ret = msm_populate_dai_link_component_of_node(pdata, card);
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002852 if (ret) {
2853 ret = -EPROBE_DEFER;
2854 goto err;
2855 }
2856 ret = msm_init_wsa_dev(pdev, card);
2857 if (ret)
2858 goto err;
2859
2860
2861 ret = devm_snd_soc_register_card(&pdev->dev, card);
Laxminath Kasam54dc88a2016-12-22 19:44:52 +05302862 if (ret == -EPROBE_DEFER) {
2863 if (codec_reg_done) {
2864 /*
2865 * return failure as EINVAL since other codec
2866 * registered sound card successfully.
2867 * This avoids any further probe calls.
2868 */
2869 ret = -EINVAL;
2870 }
2871 goto err;
2872 } else if (ret) {
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002873 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
2874 ret);
2875 goto err;
2876 }
Laxminath Kasam54dc88a2016-12-22 19:44:52 +05302877 if (pdata->snd_card_val != INT_SND_CARD)
2878 msm_ext_register_audio_notifier(pdev);
2879
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002880 return 0;
2881err:
2882 if (pdata->us_euro_gpio > 0) {
2883 dev_dbg(&pdev->dev, "%s free us_euro gpio %d\n",
2884 __func__, pdata->us_euro_gpio);
2885 pdata->us_euro_gpio = 0;
2886 }
2887 if (pdata->hph_en1_gpio > 0) {
2888 dev_dbg(&pdev->dev, "%s free hph_en1_gpio %d\n",
2889 __func__, pdata->hph_en1_gpio);
2890 gpio_free(pdata->hph_en1_gpio);
2891 pdata->hph_en1_gpio = 0;
2892 }
2893 if (pdata->hph_en0_gpio > 0) {
2894 dev_dbg(&pdev->dev, "%s free hph_en0_gpio %d\n",
2895 __func__, pdata->hph_en0_gpio);
2896 gpio_free(pdata->hph_en0_gpio);
2897 pdata->hph_en0_gpio = 0;
2898 }
2899 devm_kfree(&pdev->dev, pdata);
Laxminath Kasamfb36dc12016-11-28 23:04:47 +05302900 if (pdata->snd_card_val != INT_SND_CARD)
2901 msm_ext_cdc_deinit();
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002902 return ret;
2903}
2904
2905static int msm_asoc_machine_remove(struct platform_device *pdev)
2906{
2907 struct snd_soc_card *card = platform_get_drvdata(pdev);
2908 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
2909
2910 if (pdata->snd_card_val == INT_SND_CARD)
2911 mutex_destroy(&pdata->cdc_int_mclk0_mutex);
Laxminath Kasamfb36dc12016-11-28 23:04:47 +05302912 else
2913 msm_ext_cdc_deinit();
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002914 msm_free_auxdev_mem(pdev);
2915
2916 gpio_free(pdata->us_euro_gpio);
2917 gpio_free(pdata->hph_en1_gpio);
2918 gpio_free(pdata->hph_en0_gpio);
2919 i2s_auxpcm_deinit();
2920 snd_soc_unregister_card(card);
2921 return 0;
2922}
2923
Neeraj Upadhyay49934422016-12-27 19:03:35 +05302924static struct platform_driver sdm660_asoc_machine_driver = {
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002925 .driver = {
2926 .name = DRV_NAME,
2927 .owner = THIS_MODULE,
2928 .pm = &snd_soc_pm_ops,
Neeraj Upadhyay49934422016-12-27 19:03:35 +05302929 .of_match_table = sdm660_asoc_machine_of_match,
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002930 },
2931 .probe = msm_asoc_machine_probe,
2932 .remove = msm_asoc_machine_remove,
2933};
Neeraj Upadhyay49934422016-12-27 19:03:35 +05302934module_platform_driver(sdm660_asoc_machine_driver);
Banajit Goswami0530e2f2016-12-09 21:34:37 -08002935
2936MODULE_DESCRIPTION("ALSA SoC msm");
2937MODULE_LICENSE("GPL v2");
2938MODULE_ALIAS("platform:" DRV_NAME);
Neeraj Upadhyay49934422016-12-27 19:03:35 +05302939MODULE_DEVICE_TABLE(of, sdm660_asoc_machine_of_match);