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andrewfish1fde2f62010-02-25 20:31:00 +00001#------------------------------------------------------------------------------
2#
andrewfish4ade93d2010-05-19 01:44:13 +00003# ARM EB Entry point. Reset vector in FV header will brach to
4# _ModuleEntryPoint.
5#
6# We use crazy macros, like LoadConstantToReg, since Xcode assembler
7# does not support = assembly syntax for ldr.
8#
hhtiancf748a12010-04-29 11:32:42 +00009# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
andrewfish1fde2f62010-02-25 20:31:00 +000010#
hhtiancf748a12010-04-29 11:32:42 +000011# This program and the accompanying materials
andrewfish1fde2f62010-02-25 20:31:00 +000012# are licensed and made available under the terms and conditions of the BSD License
13# which accompanies this distribution. The full text of the license may be found at
14# http://opensource.org/licenses/bsd-license.php
15#
16# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
17# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18#
19#------------------------------------------------------------------------------
20
21#include <AsmMacroIoLib.h>
andrewfish4ade93d2010-05-19 01:44:13 +000022#include <Base.h>
andrewfish1fde2f62010-02-25 20:31:00 +000023#include <Library/PcdLib.h>
andrewfish4ade93d2010-05-19 01:44:13 +000024#include <ArmEb/ArmEb.h>
andrewfish1fde2f62010-02-25 20:31:00 +000025
26.text
27.align 3
28
29.globl ASM_PFX(CEntryPoint)
30.globl ASM_PFX(_ModuleEntryPoint)
31
32ASM_PFX(_ModuleEntryPoint):
andrewfish4ade93d2010-05-19 01:44:13 +000033
34 // Turn off remapping NOR to 0. We can now use DRAM in low memory
andrewfishafdfe8f2010-07-02 12:00:00 +000035 // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR
36 //MmioOr32 (EB_SP810_CTRL_BASE ,BIT8)
andrewfish4ade93d2010-05-19 01:44:13 +000037
38 // Enable NEON register in case folks want to use them for optimizations (CopyMem)
39 mrc p15, 0, r0, c1, c0, 2
40 orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
41 mcr p15, 0, r0, c1, c0, 2
42 mov r0, #0x40000000 // Set EN bit in FPEXC
andrewfishfe211122010-05-20 05:36:46 +000043 mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
andrewfish4ade93d2010-05-19 01:44:13 +000044
andrewfishafdfe8f2010-07-02 12:00:00 +000045 // Set CPU vectors to 0 (which is currently flash)
andrewfish4ade93d2010-05-19 01:44:13 +000046 LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
47 mcr p15, 0, r0, c12, c0, 0
48 isb // Sync changes to control registers
49
andrewfish1fde2f62010-02-25 20:31:00 +000050 //
51 // Set stack based on PCD values. Need to do it this way to make C code work
52 // when it runs from FLASH.
53 //
andrewfish4ade93d2010-05-19 01:44:13 +000054 LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2
55 LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3
andrewfish1fde2f62010-02-25 20:31:00 +000056 add r4, r2, r3
andrewfish4ade93d2010-05-19 01:44:13 +000057 mov r13, r4
andrewfish1fde2f62010-02-25 20:31:00 +000058
59 // Call C entry point
andrewfish4ade93d2010-05-19 01:44:13 +000060 LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1
61 LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0
62 blx ASM_PFX(CEntryPoint)
andrewfish1fde2f62010-02-25 20:31:00 +000063
64ShouldNeverGetHere:
andrewfish4ade93d2010-05-19 01:44:13 +000065 // _CEntryPoint should never return
andrewfish1fde2f62010-02-25 20:31:00 +000066 b ShouldNeverGetHere
67
andrewfish4ade93d2010-05-19 01:44:13 +000068