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SHIFTPHONES
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mainline
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linux
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bb5c64c879e5684d8e65421ae3c3d3094ecb71c3
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drivers
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clk
/
tegra
/
clk-dfll.c
6160aca
clk: tegra: Do not return 0 on failure
by Nicolin Chen
· 4 years, 2 months ago
d8edf52
clk: tegra: clk-dfll: Remove call to pm_runtime_irq_safe()
by Sowjanya Komatineni
· 5 years ago
a99d744
clk: tegra: clk-dfll: Add suspend and resume support
by Sowjanya Komatineni
· 5 years ago
1802d0b
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
by Thomas Gleixner
· 6 years ago
dc2535b
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
by Linus Torvalds
· 6 years ago
e7e6198
clk: tegra: dfll: Fix debugfs_simple_attr.cocci warnings
by YueHaibing
· 6 years ago
f7ebf88
clk: tegra: dfll: round down voltages based on alignment
by Joseph Lo
· 6 years ago
36541f0
clk: tegra: dfll: support PWM regulator control
by Joseph Lo
· 6 years ago
e374e06
clk: tegra: Change to use DEFINE_SHOW_ATTRIBUTE macro
by Yangtao Li
· 6 years ago
923ca13
clk: tegra: probe deferral error reporting
by Marcel Ziswiler
· 6 years ago
df500f2
clk: tegra: no need to check return value of debugfs_create functions
by Greg Kroah-Hartman
· 7 years ago
1752c9e
clk: tegra: dfll: Fix drvdata overwriting issue
by Nicolin Chen
· 7 years ago
8a31d9d9
PM / OPP: Update OPP users to put reference
by Viresh Kumar
· 8 years ago
27ed2f7
clk: tegra: dfll: Reference CVB table instead of copying data
by Thierry Reding
· 9 years ago
f6da46a
clk: tegra: Remove CLK_IS_ROOT
by Stephen Boyd
· 9 years ago
eae14465
Merge tag 'tegra-for-4.4-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next
by Michael Turquette
· 9 years ago
4182b8d
clk: tegra: dfll: Monitor code is DEBUG_FS only
by Thierry Reding
· 9 years ago
e1595d8
clk: tegra: dfll: Properly protect OPP list
by Thierry Reding
· 9 years ago
10d9be6
clk: tegra: Unlock top rates for Tegra124 DFLL clock
by Mikko Perttunen
· 9 years ago
c5a132a
clk: tegra: Fix some static checker problems
by Stephen Boyd
· 9 years ago
62a8a09
clk: tegra: Add Tegra124 DFLL clocksource platform driver
by Tuomas Tynkkynen
· 10 years ago
c4fe70a
clk: tegra: Add closed loop support for the DFLL
by Tuomas Tynkkynen
· 10 years ago
d8d7a08
clk: tegra: Add library for the DFLL clock source (open-loop mode)
by Tuomas Tynkkynen
· 10 years ago