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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / refs/heads/master / . / Documentation / powerpc / cpu_families.rst
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Mauro Carvalho Chehab4d2e26a2019-04-10 08:32:42 -0300[diff] [blame]1============
Michael Ellerman91a61512014-05-26 21:44:25 +1000[diff] [blame]2CPU Families
3============
4
5This document tries to summarise some of the different cpu families that exist
6and are supported by arch/powerpc.
7
8
9Book3S (aka sPAPR)
10------------------
11
Christophe Leroy7d38f082020-07-02 14:09:21 +0000[diff] [blame]12- Hash MMU (except 603 and e300)
13- Software loaded TLB (603 and e300)
14- Selectable Software loaded TLB in addition to hash MMU (755, 7450, e600)
Mauro Carvalho Chehab4d2e26a2019-04-10 08:32:42 -0300[diff] [blame]15- Mix of 32 & 64 bit::
Michael Ellerman91a61512014-05-26 21:44:25 +1000[diff] [blame]16
17 +--------------+ +----------------+
18 | Old POWER | --------------> | RS64 (threads) |
19 +--------------+ +----------------+
20 |
21 |
22 v
23 +--------------+ +----------------+ +------+
24 | 601 | --------------> | 603 | ---> | e300 |
25 +--------------+ +----------------+ +------+
26 | |
27 | |
28 v v
Christophe Leroy7d38f082020-07-02 14:09:21 +0000[diff] [blame]29 +--------------+ +-----+ +----------------+ +-------+
30 | 604 | | 755 | <--- | 750 (G3) | ---> | 750CX |
31 +--------------+ +-----+ +----------------+ +-------+
Michael Ellerman91a61512014-05-26 21:44:25 +1000[diff] [blame]32 | | |
33 | | |
34 v v v
35 +--------------+ +----------------+ +-------+
36 | 620 (64 bit) | | 7400 | | 750CL |
37 +--------------+ +----------------+ +-------+
38 | | |
39 | | |
40 v v v
41 +--------------+ +----------------+ +-------+
42 | POWER3/630 | | 7410 | | 750FX |
43 +--------------+ +----------------+ +-------+
44 | |
45 | |
46 v v
47 +--------------+ +----------------+
48 | POWER3+ | | 7450 |
49 +--------------+ +----------------+
50 | |
51 | |
52 v v
53 +--------------+ +----------------+
54 | POWER4 | | 7455 |
55 +--------------+ +----------------+
56 | |
57 | |
58 v v
59 +--------------+ +-------+ +----------------+
60 | POWER4+ | --> | 970 | | 7447 |
61 +--------------+ +-------+ +----------------+
62 | | |
63 | | |
64 v v v
65 +--------------+ +-------+ +----------------+
66 | POWER5 | | 970FX | | 7448 |
67 +--------------+ +-------+ +----------------+
68 | | |
69 | | |
70 v v v
71 +--------------+ +-------+ +----------------+
72 | POWER5+ | | 970MP | | e600 |
73 +--------------+ +-------+ +----------------+
74 |
75 |
76 v
77 +--------------+
78 | POWER5++ |
79 +--------------+
80 |
81 |
82 v
83 +--------------+ +-------+
84 | POWER6 | <-?-> | Cell |
85 +--------------+ +-------+
86 |
87 |
88 v
89 +--------------+
90 | POWER7 |
91 +--------------+
92 |
93 |
94 v
95 +--------------+
96 | POWER7+ |
97 +--------------+
98 |
99 |
100 v
101 +--------------+
102 | POWER8 |
103 +--------------+
104
105
106 +---------------+
107 | PA6T (64 bit) |
108 +---------------+
109
110
111IBM BookE
112---------
113
Mauro Carvalho Chehab4d2e26a2019-04-10 08:32:42 -0300[diff] [blame]114- Software loaded TLB.
115- All 32 bit::
Michael Ellerman91a61512014-05-26 21:44:25 +1000[diff] [blame]116
117 +--------------+
118 | 401 |
119 +--------------+
120 |
121 |
122 v
123 +--------------+
124 | 403 |
125 +--------------+
126 |
127 |
128 v
129 +--------------+
130 | 405 |
131 +--------------+
132 |
133 |
134 v
135 +--------------+
136 | 440 |
137 +--------------+
138 |
139 |
140 v
141 +--------------+ +----------------+
142 | 450 | --> | BG/P |
143 +--------------+ +----------------+
144 |
145 |
146 v
147 +--------------+
148 | 460 |
149 +--------------+
150 |
151 |
152 v
153 +--------------+
154 | 476 |
155 +--------------+
156
157
158Motorola/Freescale 8xx
159----------------------
160
Mauro Carvalho Chehab4d2e26a2019-04-10 08:32:42 -0300[diff] [blame]161- Software loaded with hardware assist.
162- All 32 bit::
Michael Ellerman91a61512014-05-26 21:44:25 +1000[diff] [blame]163
164 +-------------+
165 | MPC8xx Core |
166 +-------------+
167
168
169Freescale BookE
170---------------
171
Mauro Carvalho Chehab4d2e26a2019-04-10 08:32:42 -0300[diff] [blame]172- Software loaded TLB.
173- e6500 adds HW loaded indirect TLB entries.
174- Mix of 32 & 64 bit::
Michael Ellerman91a61512014-05-26 21:44:25 +1000[diff] [blame]175
176 +--------------+
177 | e200 |
178 +--------------+
179
180
181 +--------------------------------+
182 | e500 |
183 +--------------------------------+
184 |
185 |
186 v
187 +--------------------------------+
188 | e500v2 |
189 +--------------------------------+
190 |
191 |
192 v
193 +--------------------------------+
194 | e500mc (Book3e) |
195 +--------------------------------+
196 |
197 |
198 v
199 +--------------------------------+
200 | e5500 (64 bit) |
201 +--------------------------------+
202 |
203 |
204 v
205 +--------------------------------+
206 | e6500 (HW TLB) (Multithreaded) |
207 +--------------------------------+
208
209
210IBM A2 core
211-----------
212
Mauro Carvalho Chehab4d2e26a2019-04-10 08:32:42 -0300[diff] [blame]213- Book3E, software loaded TLB + HW loaded indirect TLB entries.
214- 64 bit::
Michael Ellerman91a61512014-05-26 21:44:25 +1000[diff] [blame]215
216 +--------------+ +----------------+
217 | A2 core | --> | WSP |
218 +--------------+ +----------------+
219 |
220 |
221 v
222 +--------------+
223 | BG/Q |
224 +--------------+