blob: 850f84d204d053632241bac939726584f965e290 [file] [log] [blame]
Christoph Hellwig5d8762d2019-02-18 09:34:21 +01001// SPDX-License-Identifier: GPL-2.0
Christoph Hellwig71102302016-07-06 21:55:52 +09002/*
3 * NVMe over Fabrics RDMA host code.
4 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
Christoph Hellwig71102302016-07-06 21:55:52 +09005 */
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
Christoph Hellwig71102302016-07-06 21:55:52 +09007#include <linux/module.h>
8#include <linux/init.h>
9#include <linux/slab.h>
Israel Rukshinf41725b2017-11-26 10:40:55 +000010#include <rdma/mr_pool.h>
Christoph Hellwig71102302016-07-06 21:55:52 +090011#include <linux/err.h>
12#include <linux/string.h>
Christoph Hellwig71102302016-07-06 21:55:52 +090013#include <linux/atomic.h>
14#include <linux/blk-mq.h>
Sagi Grimberg0b366582017-07-13 11:09:44 +030015#include <linux/blk-mq-rdma.h>
Christoph Hellwigfe45e632021-09-20 14:33:27 +020016#include <linux/blk-integrity.h>
Christoph Hellwig71102302016-07-06 21:55:52 +090017#include <linux/types.h>
18#include <linux/list.h>
19#include <linux/mutex.h>
20#include <linux/scatterlist.h>
21#include <linux/nvme.h>
Christoph Hellwig71102302016-07-06 21:55:52 +090022#include <asm/unaligned.h>
23
24#include <rdma/ib_verbs.h>
25#include <rdma/rdma_cm.h>
Christoph Hellwig71102302016-07-06 21:55:52 +090026#include <linux/nvme-rdma.h>
27
28#include "nvme.h"
29#include "fabrics.h"
30
31
Sagi Grimberg782d8202017-03-21 16:32:38 +020032#define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */
Christoph Hellwig71102302016-07-06 21:55:52 +090033
Christoph Hellwig71102302016-07-06 21:55:52 +090034#define NVME_RDMA_MAX_SEGMENTS 256
35
Steve Wise64a741c2018-06-20 07:15:05 -070036#define NVME_RDMA_MAX_INLINE_SEGMENTS 4
Christoph Hellwig71102302016-07-06 21:55:52 +090037
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +030038#define NVME_RDMA_DATA_SGL_SIZE \
39 (sizeof(struct scatterlist) * NVME_INLINE_SG_CNT)
40#define NVME_RDMA_METADATA_SGL_SIZE \
41 (sizeof(struct scatterlist) * NVME_INLINE_METADATA_SG_CNT)
42
Christoph Hellwig71102302016-07-06 21:55:52 +090043struct nvme_rdma_device {
Max Gurtovoyf87c89a2017-10-23 12:59:27 +030044 struct ib_device *dev;
45 struct ib_pd *pd;
Christoph Hellwig71102302016-07-06 21:55:52 +090046 struct kref ref;
47 struct list_head entry;
Steve Wise64a741c2018-06-20 07:15:05 -070048 unsigned int num_inline_segments;
Christoph Hellwig71102302016-07-06 21:55:52 +090049};
50
51struct nvme_rdma_qe {
52 struct ib_cqe cqe;
53 void *data;
54 u64 dma;
55};
56
Israel Rukshin324d9e72020-05-19 17:05:55 +030057struct nvme_rdma_sgl {
58 int nents;
59 struct sg_table sg_table;
60};
61
Christoph Hellwig71102302016-07-06 21:55:52 +090062struct nvme_rdma_queue;
63struct nvme_rdma_request {
Christoph Hellwigd49187e2016-11-10 07:32:33 -080064 struct nvme_request req;
Christoph Hellwig71102302016-07-06 21:55:52 +090065 struct ib_mr *mr;
66 struct nvme_rdma_qe sqe;
Sagi Grimberg4af7f7f2017-11-23 17:35:22 +020067 union nvme_result result;
68 __le16 status;
69 refcount_t ref;
Christoph Hellwig71102302016-07-06 21:55:52 +090070 struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
71 u32 num_sge;
Christoph Hellwig71102302016-07-06 21:55:52 +090072 struct ib_reg_wr reg_wr;
73 struct ib_cqe reg_cqe;
74 struct nvme_rdma_queue *queue;
Israel Rukshin324d9e72020-05-19 17:05:55 +030075 struct nvme_rdma_sgl data_sgl;
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +030076 struct nvme_rdma_sgl *metadata_sgl;
77 bool use_sig_mr;
Christoph Hellwig71102302016-07-06 21:55:52 +090078};
79
80enum nvme_rdma_queue_flags {
Sagi Grimberg5013e982017-10-11 15:29:12 +030081 NVME_RDMA_Q_ALLOCATED = 0,
82 NVME_RDMA_Q_LIVE = 1,
Max Gurtovoyeb1bd242017-11-28 18:28:44 +020083 NVME_RDMA_Q_TR_READY = 2,
Christoph Hellwig71102302016-07-06 21:55:52 +090084};
85
86struct nvme_rdma_queue {
87 struct nvme_rdma_qe *rsp_ring;
Christoph Hellwig71102302016-07-06 21:55:52 +090088 int queue_size;
89 size_t cmnd_capsule_len;
90 struct nvme_rdma_ctrl *ctrl;
91 struct nvme_rdma_device *device;
92 struct ib_cq *ib_cq;
93 struct ib_qp *qp;
94
95 unsigned long flags;
96 struct rdma_cm_id *cm_id;
97 int cm_error;
98 struct completion cm_done;
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +030099 bool pi_support;
Yamin Friedman287f3292020-07-13 11:53:29 +0300100 int cq_size;
Chao Leng76740732021-01-14 17:09:25 +0800101 struct mutex queue_lock;
Christoph Hellwig71102302016-07-06 21:55:52 +0900102};
103
104struct nvme_rdma_ctrl {
Christoph Hellwig71102302016-07-06 21:55:52 +0900105 /* read only in the hot path */
106 struct nvme_rdma_queue *queues;
Christoph Hellwig71102302016-07-06 21:55:52 +0900107
108 /* other member variables */
Christoph Hellwig71102302016-07-06 21:55:52 +0900109 struct blk_mq_tag_set tag_set;
Christoph Hellwig71102302016-07-06 21:55:52 +0900110 struct work_struct err_work;
111
112 struct nvme_rdma_qe async_event_sqe;
113
Christoph Hellwig71102302016-07-06 21:55:52 +0900114 struct delayed_work reconnect_work;
115
116 struct list_head list;
117
118 struct blk_mq_tag_set admin_tag_set;
119 struct nvme_rdma_device *device;
120
Christoph Hellwig71102302016-07-06 21:55:52 +0900121 u32 max_fr_pages;
122
Sagi Grimberg0928f9b2017-02-05 21:49:32 +0200123 struct sockaddr_storage addr;
124 struct sockaddr_storage src_addr;
Christoph Hellwig71102302016-07-06 21:55:52 +0900125
126 struct nvme_ctrl ctrl;
Steve Wise64a741c2018-06-20 07:15:05 -0700127 bool use_inline_data;
Sagi Grimbergb1064d32019-01-18 16:43:24 -0800128 u32 io_queues[HCTX_MAX_TYPES];
Christoph Hellwig71102302016-07-06 21:55:52 +0900129};
130
131static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
132{
133 return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
134}
135
136static LIST_HEAD(device_list);
137static DEFINE_MUTEX(device_list_mutex);
138
139static LIST_HEAD(nvme_rdma_ctrl_list);
140static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
141
Christoph Hellwig71102302016-07-06 21:55:52 +0900142/*
143 * Disabling this option makes small I/O goes faster, but is fundamentally
144 * unsafe. With it turned off we will have to register a global rkey that
145 * allows read and write access to all physical memory.
146 */
147static bool register_always = true;
148module_param(register_always, bool, 0444);
149MODULE_PARM_DESC(register_always,
150 "Use memory registration even for contiguous memory regions");
151
152static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
153 struct rdma_cm_event *event);
154static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
Christoph Hellwigff029452020-06-11 08:44:52 +0200155static void nvme_rdma_complete_rq(struct request *rq);
Christoph Hellwig71102302016-07-06 21:55:52 +0900156
Sagi Grimberg90af3512017-07-10 09:22:28 +0300157static const struct blk_mq_ops nvme_rdma_mq_ops;
158static const struct blk_mq_ops nvme_rdma_admin_mq_ops;
159
Christoph Hellwig71102302016-07-06 21:55:52 +0900160static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
161{
162 return queue - queue->ctrl->queues;
163}
164
Sagi Grimbergff8519f2018-12-14 11:06:10 -0800165static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue)
166{
167 return nvme_rdma_queue_idx(queue) >
Sagi Grimbergb1064d32019-01-18 16:43:24 -0800168 queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] +
169 queue->ctrl->io_queues[HCTX_TYPE_READ];
Sagi Grimbergff8519f2018-12-14 11:06:10 -0800170}
171
Christoph Hellwig71102302016-07-06 21:55:52 +0900172static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
173{
174 return queue->cmnd_capsule_len - sizeof(struct nvme_command);
175}
176
177static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
178 size_t capsule_size, enum dma_data_direction dir)
179{
180 ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
181 kfree(qe->data);
182}
183
184static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
185 size_t capsule_size, enum dma_data_direction dir)
186{
187 qe->data = kzalloc(capsule_size, GFP_KERNEL);
188 if (!qe->data)
189 return -ENOMEM;
190
191 qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
192 if (ib_dma_mapping_error(ibdev, qe->dma)) {
193 kfree(qe->data);
Prabhath Sajeepa6344d022018-11-28 11:11:29 -0700194 qe->data = NULL;
Christoph Hellwig71102302016-07-06 21:55:52 +0900195 return -ENOMEM;
196 }
197
198 return 0;
199}
200
201static void nvme_rdma_free_ring(struct ib_device *ibdev,
202 struct nvme_rdma_qe *ring, size_t ib_queue_size,
203 size_t capsule_size, enum dma_data_direction dir)
204{
205 int i;
206
207 for (i = 0; i < ib_queue_size; i++)
208 nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
209 kfree(ring);
210}
211
212static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
213 size_t ib_queue_size, size_t capsule_size,
214 enum dma_data_direction dir)
215{
216 struct nvme_rdma_qe *ring;
217 int i;
218
219 ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
220 if (!ring)
221 return NULL;
222
Max Gurtovoy62f99b62019-06-06 12:27:36 +0300223 /*
224 * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue
225 * lifetime. It's safe, since any chage in the underlying RDMA device
226 * will issue error recovery and queue re-creation.
227 */
Christoph Hellwig71102302016-07-06 21:55:52 +0900228 for (i = 0; i < ib_queue_size; i++) {
229 if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
230 goto out_free_ring;
231 }
232
233 return ring;
234
235out_free_ring:
236 nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
237 return NULL;
238}
239
240static void nvme_rdma_qp_event(struct ib_event *event, void *context)
241{
Max Gurtovoy27a4bee2016-11-23 11:38:48 +0200242 pr_debug("QP event %s (%d)\n",
243 ib_event_msg(event->event), event->event);
244
Christoph Hellwig71102302016-07-06 21:55:52 +0900245}
246
247static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
248{
Bart Van Assche35da77d2018-10-08 14:28:54 -0700249 int ret;
250
251 ret = wait_for_completion_interruptible_timeout(&queue->cm_done,
Christoph Hellwig71102302016-07-06 21:55:52 +0900252 msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1);
Bart Van Assche35da77d2018-10-08 14:28:54 -0700253 if (ret < 0)
254 return ret;
255 if (ret == 0)
256 return -ETIMEDOUT;
257 WARN_ON_ONCE(queue->cm_error > 0);
Christoph Hellwig71102302016-07-06 21:55:52 +0900258 return queue->cm_error;
259}
260
261static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
262{
263 struct nvme_rdma_device *dev = queue->device;
264 struct ib_qp_init_attr init_attr;
265 int ret;
266
267 memset(&init_attr, 0, sizeof(init_attr));
268 init_attr.event_handler = nvme_rdma_qp_event;
269 /* +1 for drain */
270 init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
271 /* +1 for drain */
272 init_attr.cap.max_recv_wr = queue->queue_size + 1;
273 init_attr.cap.max_recv_sge = 1;
Steve Wise64a741c2018-06-20 07:15:05 -0700274 init_attr.cap.max_send_sge = 1 + dev->num_inline_segments;
Christoph Hellwig71102302016-07-06 21:55:52 +0900275 init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
276 init_attr.qp_type = IB_QPT_RC;
277 init_attr.send_cq = queue->ib_cq;
278 init_attr.recv_cq = queue->ib_cq;
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +0300279 if (queue->pi_support)
280 init_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN;
Yamin Friedman287f3292020-07-13 11:53:29 +0300281 init_attr.qp_context = queue;
Christoph Hellwig71102302016-07-06 21:55:52 +0900282
283 ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
284
285 queue->qp = queue->cm_id->qp;
286 return ret;
287}
288
Christoph Hellwig385475e2017-06-13 09:15:19 +0200289static void nvme_rdma_exit_request(struct blk_mq_tag_set *set,
290 struct request *rq, unsigned int hctx_idx)
Christoph Hellwig71102302016-07-06 21:55:52 +0900291{
292 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
Christoph Hellwig71102302016-07-06 21:55:52 +0900293
Max Gurtovoy62f99b62019-06-06 12:27:36 +0300294 kfree(req->sqe.data);
Christoph Hellwig71102302016-07-06 21:55:52 +0900295}
296
Christoph Hellwig385475e2017-06-13 09:15:19 +0200297static int nvme_rdma_init_request(struct blk_mq_tag_set *set,
298 struct request *rq, unsigned int hctx_idx,
299 unsigned int numa_node)
Christoph Hellwig71102302016-07-06 21:55:52 +0900300{
Christoph Hellwig385475e2017-06-13 09:15:19 +0200301 struct nvme_rdma_ctrl *ctrl = set->driver_data;
Christoph Hellwig71102302016-07-06 21:55:52 +0900302 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
Christoph Hellwig385475e2017-06-13 09:15:19 +0200303 int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
Christoph Hellwig71102302016-07-06 21:55:52 +0900304 struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
Christoph Hellwig71102302016-07-06 21:55:52 +0900305
Sagi Grimberg59e29ce2018-06-29 16:50:00 -0600306 nvme_req(rq)->ctrl = &ctrl->ctrl;
Max Gurtovoy62f99b62019-06-06 12:27:36 +0300307 req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL);
308 if (!req->sqe.data)
309 return -ENOMEM;
Christoph Hellwig71102302016-07-06 21:55:52 +0900310
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +0300311 /* metadata nvme_rdma_sgl struct is located after command's data SGL */
312 if (queue->pi_support)
313 req->metadata_sgl = (void *)nvme_req(rq) +
314 sizeof(struct nvme_rdma_request) +
315 NVME_RDMA_DATA_SGL_SIZE;
316
Christoph Hellwig71102302016-07-06 21:55:52 +0900317 req->queue = queue;
Keith Buschf4b9e6c2021-03-17 13:37:03 -0700318 nvme_req(rq)->cmd = req->sqe.data;
Christoph Hellwig71102302016-07-06 21:55:52 +0900319
320 return 0;
Christoph Hellwig71102302016-07-06 21:55:52 +0900321}
322
Christoph Hellwig71102302016-07-06 21:55:52 +0900323static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
324 unsigned int hctx_idx)
325{
326 struct nvme_rdma_ctrl *ctrl = data;
327 struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
328
Sagi Grimbergd858e5f2017-04-24 10:58:29 +0300329 BUG_ON(hctx_idx >= ctrl->ctrl.queue_count);
Christoph Hellwig71102302016-07-06 21:55:52 +0900330
331 hctx->driver_data = queue;
332 return 0;
333}
334
335static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
336 unsigned int hctx_idx)
337{
338 struct nvme_rdma_ctrl *ctrl = data;
339 struct nvme_rdma_queue *queue = &ctrl->queues[0];
340
341 BUG_ON(hctx_idx != 0);
342
343 hctx->driver_data = queue;
344 return 0;
345}
346
347static void nvme_rdma_free_dev(struct kref *ref)
348{
349 struct nvme_rdma_device *ndev =
350 container_of(ref, struct nvme_rdma_device, ref);
351
352 mutex_lock(&device_list_mutex);
353 list_del(&ndev->entry);
354 mutex_unlock(&device_list_mutex);
355
Christoph Hellwig71102302016-07-06 21:55:52 +0900356 ib_dealloc_pd(ndev->pd);
Christoph Hellwig71102302016-07-06 21:55:52 +0900357 kfree(ndev);
358}
359
360static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
361{
362 kref_put(&dev->ref, nvme_rdma_free_dev);
363}
364
365static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
366{
367 return kref_get_unless_zero(&dev->ref);
368}
369
370static struct nvme_rdma_device *
371nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
372{
373 struct nvme_rdma_device *ndev;
374
375 mutex_lock(&device_list_mutex);
376 list_for_each_entry(ndev, &device_list, entry) {
377 if (ndev->dev->node_guid == cm_id->device->node_guid &&
378 nvme_rdma_dev_get(ndev))
379 goto out_unlock;
380 }
381
382 ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
383 if (!ndev)
384 goto out_err;
385
386 ndev->dev = cm_id->device;
387 kref_init(&ndev->ref);
388
Christoph Hellwig11975e02016-09-05 12:56:20 +0200389 ndev->pd = ib_alloc_pd(ndev->dev,
390 register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
Christoph Hellwig71102302016-07-06 21:55:52 +0900391 if (IS_ERR(ndev->pd))
392 goto out_free_dev;
393
Christoph Hellwig71102302016-07-06 21:55:52 +0900394 if (!(ndev->dev->attrs.device_cap_flags &
395 IB_DEVICE_MEM_MGT_EXTENSIONS)) {
396 dev_err(&ndev->dev->dev,
397 "Memory registrations not supported.\n");
Christoph Hellwig11975e02016-09-05 12:56:20 +0200398 goto out_free_pd;
Christoph Hellwig71102302016-07-06 21:55:52 +0900399 }
400
Steve Wise64a741c2018-06-20 07:15:05 -0700401 ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS,
Jason Gunthorpe0a3173a2018-08-16 14:13:03 -0600402 ndev->dev->attrs.max_send_sge - 1);
Christoph Hellwig71102302016-07-06 21:55:52 +0900403 list_add(&ndev->entry, &device_list);
404out_unlock:
405 mutex_unlock(&device_list_mutex);
406 return ndev;
407
Christoph Hellwig71102302016-07-06 21:55:52 +0900408out_free_pd:
409 ib_dealloc_pd(ndev->pd);
410out_free_dev:
411 kfree(ndev);
412out_err:
413 mutex_unlock(&device_list_mutex);
414 return NULL;
415}
416
Yamin Friedman287f3292020-07-13 11:53:29 +0300417static void nvme_rdma_free_cq(struct nvme_rdma_queue *queue)
418{
419 if (nvme_rdma_poll_queue(queue))
420 ib_free_cq(queue->ib_cq);
421 else
422 ib_cq_pool_put(queue->ib_cq, queue->cq_size);
423}
424
Christoph Hellwig71102302016-07-06 21:55:52 +0900425static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
426{
Max Gurtovoyeb1bd242017-11-28 18:28:44 +0200427 struct nvme_rdma_device *dev;
428 struct ib_device *ibdev;
429
430 if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags))
431 return;
432
433 dev = queue->device;
434 ibdev = dev->dev;
Christoph Hellwig71102302016-07-06 21:55:52 +0900435
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +0300436 if (queue->pi_support)
437 ib_mr_pool_destroy(queue->qp, &queue->qp->sig_mrs);
Israel Rukshinf41725b2017-11-26 10:40:55 +0000438 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
439
Max Gurtovoyeb1bd242017-11-28 18:28:44 +0200440 /*
441 * The cm_id object might have been destroyed during RDMA connection
442 * establishment error flow to avoid getting other cma events, thus
443 * the destruction of the QP shouldn't use rdma_cm API.
444 */
445 ib_destroy_qp(queue->qp);
Yamin Friedman287f3292020-07-13 11:53:29 +0300446 nvme_rdma_free_cq(queue);
Christoph Hellwig71102302016-07-06 21:55:52 +0900447
448 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
449 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
450
451 nvme_rdma_dev_put(dev);
452}
453
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +0300454static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev, bool pi_support)
Israel Rukshinf41725b2017-11-26 10:40:55 +0000455{
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +0300456 u32 max_page_list_len;
457
458 if (pi_support)
459 max_page_list_len = ibdev->attrs.max_pi_fast_reg_page_list_len;
460 else
461 max_page_list_len = ibdev->attrs.max_fast_reg_page_list_len;
462
463 return min_t(u32, NVME_RDMA_MAX_SEGMENTS, max_page_list_len - 1);
Israel Rukshinf41725b2017-11-26 10:40:55 +0000464}
465
Yamin Friedman287f3292020-07-13 11:53:29 +0300466static int nvme_rdma_create_cq(struct ib_device *ibdev,
467 struct nvme_rdma_queue *queue)
468{
469 int ret, comp_vector, idx = nvme_rdma_queue_idx(queue);
470 enum ib_poll_context poll_ctx;
471
472 /*
473 * Spread I/O queues completion vectors according their queue index.
474 * Admin queues can always go on completion vector 0.
475 */
476 comp_vector = (idx == 0 ? idx : idx - 1) % ibdev->num_comp_vectors;
477
478 /* Polling queues need direct cq polling context */
479 if (nvme_rdma_poll_queue(queue)) {
480 poll_ctx = IB_POLL_DIRECT;
481 queue->ib_cq = ib_alloc_cq(ibdev, queue, queue->cq_size,
482 comp_vector, poll_ctx);
483 } else {
484 poll_ctx = IB_POLL_SOFTIRQ;
485 queue->ib_cq = ib_cq_pool_get(ibdev, queue->cq_size,
486 comp_vector, poll_ctx);
487 }
488
489 if (IS_ERR(queue->ib_cq)) {
490 ret = PTR_ERR(queue->ib_cq);
491 return ret;
492 }
493
494 return 0;
495}
496
Sagi Grimbergca6e95b2017-05-04 13:33:09 +0300497static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
Christoph Hellwig71102302016-07-06 21:55:52 +0900498{
Sagi Grimbergca6e95b2017-05-04 13:33:09 +0300499 struct ib_device *ibdev;
Christoph Hellwig71102302016-07-06 21:55:52 +0900500 const int send_wr_factor = 3; /* MR, SEND, INV */
501 const int cq_factor = send_wr_factor + 1; /* + RECV */
Max Gurtovoyff13c1b2019-09-21 23:58:19 +0300502 int ret, pages_per_mr;
Christoph Hellwig71102302016-07-06 21:55:52 +0900503
Sagi Grimbergca6e95b2017-05-04 13:33:09 +0300504 queue->device = nvme_rdma_find_get_device(queue->cm_id);
505 if (!queue->device) {
506 dev_err(queue->cm_id->device->dev.parent,
507 "no client data found!\n");
508 return -ECONNREFUSED;
509 }
510 ibdev = queue->device->dev;
Christoph Hellwig71102302016-07-06 21:55:52 +0900511
Christoph Hellwig71102302016-07-06 21:55:52 +0900512 /* +1 for ib_stop_cq */
Yamin Friedman287f3292020-07-13 11:53:29 +0300513 queue->cq_size = cq_factor * queue->queue_size + 1;
514
515 ret = nvme_rdma_create_cq(ibdev, queue);
516 if (ret)
Sagi Grimbergca6e95b2017-05-04 13:33:09 +0300517 goto out_put_dev;
Christoph Hellwig71102302016-07-06 21:55:52 +0900518
519 ret = nvme_rdma_create_qp(queue, send_wr_factor);
520 if (ret)
521 goto out_destroy_ib_cq;
522
523 queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
524 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
525 if (!queue->rsp_ring) {
526 ret = -ENOMEM;
527 goto out_destroy_qp;
528 }
529
Max Gurtovoyff13c1b2019-09-21 23:58:19 +0300530 /*
531 * Currently we don't use SG_GAPS MR's so if the first entry is
532 * misaligned we'll end up using two entries for a single data page,
533 * so one additional entry is required.
534 */
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +0300535 pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev, queue->pi_support) + 1;
Israel Rukshinf41725b2017-11-26 10:40:55 +0000536 ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs,
537 queue->queue_size,
538 IB_MR_TYPE_MEM_REG,
Max Gurtovoyff13c1b2019-09-21 23:58:19 +0300539 pages_per_mr, 0);
Israel Rukshinf41725b2017-11-26 10:40:55 +0000540 if (ret) {
541 dev_err(queue->ctrl->ctrl.device,
542 "failed to initialize MR pool sized %d for QID %d\n",
Yamin Friedman287f3292020-07-13 11:53:29 +0300543 queue->queue_size, nvme_rdma_queue_idx(queue));
Israel Rukshinf41725b2017-11-26 10:40:55 +0000544 goto out_destroy_ring;
545 }
546
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +0300547 if (queue->pi_support) {
548 ret = ib_mr_pool_init(queue->qp, &queue->qp->sig_mrs,
549 queue->queue_size, IB_MR_TYPE_INTEGRITY,
550 pages_per_mr, pages_per_mr);
551 if (ret) {
552 dev_err(queue->ctrl->ctrl.device,
553 "failed to initialize PI MR pool sized %d for QID %d\n",
Yamin Friedman287f3292020-07-13 11:53:29 +0300554 queue->queue_size, nvme_rdma_queue_idx(queue));
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +0300555 goto out_destroy_mr_pool;
556 }
557 }
558
Max Gurtovoyeb1bd242017-11-28 18:28:44 +0200559 set_bit(NVME_RDMA_Q_TR_READY, &queue->flags);
560
Christoph Hellwig71102302016-07-06 21:55:52 +0900561 return 0;
562
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +0300563out_destroy_mr_pool:
564 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
Israel Rukshinf41725b2017-11-26 10:40:55 +0000565out_destroy_ring:
566 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
567 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
Christoph Hellwig71102302016-07-06 21:55:52 +0900568out_destroy_qp:
Max Gurtovoy1f61def2017-11-06 16:18:51 +0200569 rdma_destroy_qp(queue->cm_id);
Christoph Hellwig71102302016-07-06 21:55:52 +0900570out_destroy_ib_cq:
Yamin Friedman287f3292020-07-13 11:53:29 +0300571 nvme_rdma_free_cq(queue);
Sagi Grimbergca6e95b2017-05-04 13:33:09 +0300572out_put_dev:
573 nvme_rdma_dev_put(queue->device);
Christoph Hellwig71102302016-07-06 21:55:52 +0900574 return ret;
575}
576
Sagi Grimberg41e8cfa2017-07-10 09:22:36 +0300577static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
Christoph Hellwig71102302016-07-06 21:55:52 +0900578 int idx, size_t queue_size)
579{
580 struct nvme_rdma_queue *queue;
Max Gurtovoy8f4e8da2017-02-19 20:08:03 +0200581 struct sockaddr *src_addr = NULL;
Christoph Hellwig71102302016-07-06 21:55:52 +0900582 int ret;
583
584 queue = &ctrl->queues[idx];
Chao Leng76740732021-01-14 17:09:25 +0800585 mutex_init(&queue->queue_lock);
Christoph Hellwig71102302016-07-06 21:55:52 +0900586 queue->ctrl = ctrl;
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +0300587 if (idx && ctrl->ctrl.max_integrity_segments)
588 queue->pi_support = true;
589 else
590 queue->pi_support = false;
Christoph Hellwig71102302016-07-06 21:55:52 +0900591 init_completion(&queue->cm_done);
592
593 if (idx > 0)
594 queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
595 else
596 queue->cmnd_capsule_len = sizeof(struct nvme_command);
597
598 queue->queue_size = queue_size;
599
600 queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
601 RDMA_PS_TCP, IB_QPT_RC);
602 if (IS_ERR(queue->cm_id)) {
603 dev_info(ctrl->ctrl.device,
604 "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
Chao Leng76740732021-01-14 17:09:25 +0800605 ret = PTR_ERR(queue->cm_id);
606 goto out_destroy_mutex;
Christoph Hellwig71102302016-07-06 21:55:52 +0900607 }
608
Max Gurtovoy8f4e8da2017-02-19 20:08:03 +0200609 if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
Sagi Grimberg0928f9b2017-02-05 21:49:32 +0200610 src_addr = (struct sockaddr *)&ctrl->src_addr;
Max Gurtovoy8f4e8da2017-02-19 20:08:03 +0200611
Sagi Grimberg0928f9b2017-02-05 21:49:32 +0200612 queue->cm_error = -ETIMEDOUT;
613 ret = rdma_resolve_addr(queue->cm_id, src_addr,
614 (struct sockaddr *)&ctrl->addr,
Christoph Hellwig71102302016-07-06 21:55:52 +0900615 NVME_RDMA_CONNECT_TIMEOUT_MS);
616 if (ret) {
617 dev_info(ctrl->ctrl.device,
618 "rdma_resolve_addr failed (%d).\n", ret);
619 goto out_destroy_cm_id;
620 }
621
622 ret = nvme_rdma_wait_for_cm(queue);
623 if (ret) {
624 dev_info(ctrl->ctrl.device,
Sagi Grimbergd8bfcee2017-10-11 15:29:07 +0300625 "rdma connection establishment failed (%d)\n", ret);
Christoph Hellwig71102302016-07-06 21:55:52 +0900626 goto out_destroy_cm_id;
627 }
628
Sagi Grimberg5013e982017-10-11 15:29:12 +0300629 set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags);
Christoph Hellwig71102302016-07-06 21:55:52 +0900630
631 return 0;
632
633out_destroy_cm_id:
634 rdma_destroy_id(queue->cm_id);
Max Gurtovoyeb1bd242017-11-28 18:28:44 +0200635 nvme_rdma_destroy_queue_ib(queue);
Chao Leng76740732021-01-14 17:09:25 +0800636out_destroy_mutex:
637 mutex_destroy(&queue->queue_lock);
Christoph Hellwig71102302016-07-06 21:55:52 +0900638 return ret;
639}
640
Sagi Grimbergd94211b2019-07-26 10:29:49 -0700641static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
642{
643 rdma_disconnect(queue->cm_id);
644 ib_drain_qp(queue->qp);
645}
646
Christoph Hellwig71102302016-07-06 21:55:52 +0900647static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
648{
Chao Leng76740732021-01-14 17:09:25 +0800649 mutex_lock(&queue->queue_lock);
650 if (test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
651 __nvme_rdma_stop_queue(queue);
652 mutex_unlock(&queue->queue_lock);
Christoph Hellwig71102302016-07-06 21:55:52 +0900653}
654
655static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
656{
Sagi Grimberg5013e982017-10-11 15:29:12 +0300657 if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
Christoph Hellwig71102302016-07-06 21:55:52 +0900658 return;
Sagi Grimberga57bd542017-08-28 21:41:10 +0200659
Sagi Grimberga57bd542017-08-28 21:41:10 +0200660 rdma_destroy_id(queue->cm_id);
Ruozhu Li9817d762021-09-06 11:51:34 +0800661 nvme_rdma_destroy_queue_ib(queue);
Chao Leng76740732021-01-14 17:09:25 +0800662 mutex_destroy(&queue->queue_lock);
Christoph Hellwig71102302016-07-06 21:55:52 +0900663}
664
665static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
666{
667 int i;
668
Sagi Grimbergd858e5f2017-04-24 10:58:29 +0300669 for (i = 1; i < ctrl->ctrl.queue_count; i++)
Sagi Grimberga57bd542017-08-28 21:41:10 +0200670 nvme_rdma_free_queue(&ctrl->queues[i]);
Christoph Hellwig71102302016-07-06 21:55:52 +0900671}
672
Sagi Grimberga57bd542017-08-28 21:41:10 +0200673static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl)
674{
675 int i;
676
677 for (i = 1; i < ctrl->ctrl.queue_count; i++)
678 nvme_rdma_stop_queue(&ctrl->queues[i]);
Christoph Hellwig71102302016-07-06 21:55:52 +0900679}
680
Sagi Grimberg68e16fc2017-07-10 09:22:37 +0300681static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
682{
Sagi Grimbergff8519f2018-12-14 11:06:10 -0800683 struct nvme_rdma_queue *queue = &ctrl->queues[idx];
Sagi Grimberg68e16fc2017-07-10 09:22:37 +0300684 int ret;
685
686 if (idx)
Keith Buschbe42a332021-06-10 14:44:35 -0700687 ret = nvmf_connect_io_queue(&ctrl->ctrl, idx);
Sagi Grimberg68e16fc2017-07-10 09:22:37 +0300688 else
689 ret = nvmf_connect_admin_queue(&ctrl->ctrl);
690
Sagi Grimbergd94211b2019-07-26 10:29:49 -0700691 if (!ret) {
Sagi Grimbergff8519f2018-12-14 11:06:10 -0800692 set_bit(NVME_RDMA_Q_LIVE, &queue->flags);
Sagi Grimbergd94211b2019-07-26 10:29:49 -0700693 } else {
Sagi Grimberg67b483d2019-09-24 11:27:05 -0700694 if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
695 __nvme_rdma_stop_queue(queue);
Sagi Grimberg68e16fc2017-07-10 09:22:37 +0300696 dev_info(ctrl->ctrl.device,
697 "failed to connect queue: %d ret=%d\n", idx, ret);
Sagi Grimbergd94211b2019-07-26 10:29:49 -0700698 }
Sagi Grimberg68e16fc2017-07-10 09:22:37 +0300699 return ret;
700}
701
702static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl)
Christoph Hellwig71102302016-07-06 21:55:52 +0900703{
704 int i, ret = 0;
705
Sagi Grimbergd858e5f2017-04-24 10:58:29 +0300706 for (i = 1; i < ctrl->ctrl.queue_count; i++) {
Sagi Grimberg68e16fc2017-07-10 09:22:37 +0300707 ret = nvme_rdma_start_queue(ctrl, i);
708 if (ret)
Sagi Grimberga57bd542017-08-28 21:41:10 +0200709 goto out_stop_queues;
Christoph Hellwig71102302016-07-06 21:55:52 +0900710 }
711
Steve Wisec8dbc372016-11-08 09:16:02 -0800712 return 0;
713
Sagi Grimberga57bd542017-08-28 21:41:10 +0200714out_stop_queues:
Sagi Grimberg68e16fc2017-07-10 09:22:37 +0300715 for (i--; i >= 1; i--)
716 nvme_rdma_stop_queue(&ctrl->queues[i]);
Christoph Hellwig71102302016-07-06 21:55:52 +0900717 return ret;
718}
719
Sagi Grimberg41e8cfa2017-07-10 09:22:36 +0300720static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl)
Christoph Hellwig71102302016-07-06 21:55:52 +0900721{
Sagi Grimbergc248c642017-03-09 13:26:07 +0200722 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
Sagi Grimberg0b366582017-07-13 11:09:44 +0300723 struct ib_device *ibdev = ctrl->device->dev;
Sagi Grimberg5651cd32019-05-28 22:49:04 -0700724 unsigned int nr_io_queues, nr_default_queues;
725 unsigned int nr_read_queues, nr_poll_queues;
Christoph Hellwig71102302016-07-06 21:55:52 +0900726 int i, ret;
727
Sagi Grimberg5651cd32019-05-28 22:49:04 -0700728 nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors,
729 min(opts->nr_io_queues, num_online_cpus()));
730 nr_default_queues = min_t(unsigned int, ibdev->num_comp_vectors,
731 min(opts->nr_write_queues, num_online_cpus()));
732 nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus());
733 nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues;
Sagi Grimbergb65bb772018-12-11 23:38:58 -0800734
Sagi Grimbergc248c642017-03-09 13:26:07 +0200735 ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
736 if (ret)
737 return ret;
738
Ruozhu Li85032872021-07-28 17:41:20 +0800739 if (nr_io_queues == 0) {
Sagi Grimbergc4c6df52021-03-15 14:04:27 -0700740 dev_err(ctrl->ctrl.device,
741 "unable to set any I/O queues\n");
742 return -ENOMEM;
743 }
Sagi Grimbergc248c642017-03-09 13:26:07 +0200744
Ruozhu Li85032872021-07-28 17:41:20 +0800745 ctrl->ctrl.queue_count = nr_io_queues + 1;
Sagi Grimbergc248c642017-03-09 13:26:07 +0200746 dev_info(ctrl->ctrl.device,
747 "creating %d I/O queues.\n", nr_io_queues);
748
Sagi Grimberg5651cd32019-05-28 22:49:04 -0700749 if (opts->nr_write_queues && nr_read_queues < nr_io_queues) {
750 /*
751 * separate read/write queues
752 * hand out dedicated default queues only after we have
753 * sufficient read queues.
754 */
755 ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues;
756 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ];
757 ctrl->io_queues[HCTX_TYPE_DEFAULT] =
758 min(nr_default_queues, nr_io_queues);
759 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
760 } else {
761 /*
762 * shared read/write queues
763 * either no write queues were requested, or we don't have
764 * sufficient queue count to have dedicated default queues.
765 */
766 ctrl->io_queues[HCTX_TYPE_DEFAULT] =
767 min(nr_read_queues, nr_io_queues);
768 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
769 }
770
771 if (opts->nr_poll_queues && nr_io_queues) {
772 /* map dedicated poll queues only if we have queues left */
773 ctrl->io_queues[HCTX_TYPE_POLL] =
774 min(nr_poll_queues, nr_io_queues);
775 }
776
Sagi Grimbergd858e5f2017-04-24 10:58:29 +0300777 for (i = 1; i < ctrl->ctrl.queue_count; i++) {
Sagi Grimberg41e8cfa2017-07-10 09:22:36 +0300778 ret = nvme_rdma_alloc_queue(ctrl, i,
779 ctrl->ctrl.sqsize + 1);
780 if (ret)
Christoph Hellwig71102302016-07-06 21:55:52 +0900781 goto out_free_queues;
Christoph Hellwig71102302016-07-06 21:55:52 +0900782 }
783
784 return 0;
785
786out_free_queues:
Steve Wisef361e5a2016-09-02 09:01:27 -0700787 for (i--; i >= 1; i--)
Sagi Grimberga57bd542017-08-28 21:41:10 +0200788 nvme_rdma_free_queue(&ctrl->queues[i]);
Christoph Hellwig71102302016-07-06 21:55:52 +0900789
790 return ret;
791}
792
Sagi Grimbergb28a3082017-07-10 09:22:30 +0300793static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl,
794 bool admin)
795{
796 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
797 struct blk_mq_tag_set *set;
798 int ret;
799
800 if (admin) {
801 set = &ctrl->admin_tag_set;
802 memset(set, 0, sizeof(*set));
803 set->ops = &nvme_rdma_admin_mq_ops;
Keith Busch38dabe22017-11-07 15:13:10 -0700804 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
Christoph Hellwiged01fee2021-03-03 13:28:22 +0100805 set->reserved_tags = NVMF_RESERVED_TAGS;
Hannes Reinecke103e5152018-11-16 09:22:29 +0100806 set->numa_node = nctrl->numa_node;
Sagi Grimbergb28a3082017-07-10 09:22:30 +0300807 set->cmd_size = sizeof(struct nvme_rdma_request) +
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +0300808 NVME_RDMA_DATA_SGL_SIZE;
Sagi Grimbergb28a3082017-07-10 09:22:30 +0300809 set->driver_data = ctrl;
810 set->nr_hw_queues = 1;
Chaitanya Kulkarnidc96f932020-11-09 16:33:45 -0800811 set->timeout = NVME_ADMIN_TIMEOUT;
Israel Rukshin94f29d42017-10-18 12:38:24 +0000812 set->flags = BLK_MQ_F_NO_SCHED;
Sagi Grimbergb28a3082017-07-10 09:22:30 +0300813 } else {
814 set = &ctrl->tag_set;
815 memset(set, 0, sizeof(*set));
816 set->ops = &nvme_rdma_mq_ops;
Sagi Grimberg5e77d612018-06-19 15:34:13 +0300817 set->queue_depth = nctrl->sqsize + 1;
Christoph Hellwiged01fee2021-03-03 13:28:22 +0100818 set->reserved_tags = NVMF_RESERVED_TAGS;
Hannes Reinecke103e5152018-11-16 09:22:29 +0100819 set->numa_node = nctrl->numa_node;
Sagi Grimbergb28a3082017-07-10 09:22:30 +0300820 set->flags = BLK_MQ_F_SHOULD_MERGE;
821 set->cmd_size = sizeof(struct nvme_rdma_request) +
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +0300822 NVME_RDMA_DATA_SGL_SIZE;
823 if (nctrl->max_integrity_segments)
824 set->cmd_size += sizeof(struct nvme_rdma_sgl) +
825 NVME_RDMA_METADATA_SGL_SIZE;
Sagi Grimbergb28a3082017-07-10 09:22:30 +0300826 set->driver_data = ctrl;
827 set->nr_hw_queues = nctrl->queue_count - 1;
828 set->timeout = NVME_IO_TIMEOUT;
Sagi Grimbergff8519f2018-12-14 11:06:10 -0800829 set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2;
Sagi Grimbergb28a3082017-07-10 09:22:30 +0300830 }
831
832 ret = blk_mq_alloc_tag_set(set);
833 if (ret)
Max Gurtovoy87fd1252019-05-06 13:47:55 +0300834 return ERR_PTR(ret);
Sagi Grimbergb28a3082017-07-10 09:22:30 +0300835
836 return set;
Sagi Grimbergb28a3082017-07-10 09:22:30 +0300837}
838
Sagi Grimberg3f02fff2017-07-10 09:22:32 +0300839static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl,
840 bool remove)
Christoph Hellwig71102302016-07-06 21:55:52 +0900841{
Sagi Grimberg3f02fff2017-07-10 09:22:32 +0300842 if (remove) {
843 blk_cleanup_queue(ctrl->ctrl.admin_q);
Sagi Grimberge7832cb2019-08-02 19:33:59 -0700844 blk_cleanup_queue(ctrl->ctrl.fabrics_q);
Max Gurtovoy87fd1252019-05-06 13:47:55 +0300845 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
Sagi Grimberg3f02fff2017-07-10 09:22:32 +0300846 }
Sagi Grimberg682630f2018-06-25 20:58:17 +0300847 if (ctrl->async_event_sqe.data) {
David Milburn925dd042020-09-02 17:42:52 -0500848 cancel_work_sync(&ctrl->ctrl.async_event_work);
Sagi Grimberg682630f2018-06-25 20:58:17 +0300849 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
850 sizeof(struct nvme_command), DMA_TO_DEVICE);
851 ctrl->async_event_sqe.data = NULL;
852 }
Sagi Grimberga57bd542017-08-28 21:41:10 +0200853 nvme_rdma_free_queue(&ctrl->queues[0]);
Christoph Hellwig71102302016-07-06 21:55:52 +0900854}
855
Sagi Grimberg3f02fff2017-07-10 09:22:32 +0300856static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
857 bool new)
Sagi Grimberg90af3512017-07-10 09:22:28 +0300858{
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +0300859 bool pi_capable = false;
Sagi Grimberg90af3512017-07-10 09:22:28 +0300860 int error;
861
Sagi Grimberg41e8cfa2017-07-10 09:22:36 +0300862 error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH);
Sagi Grimberg90af3512017-07-10 09:22:28 +0300863 if (error)
864 return error;
865
866 ctrl->device = ctrl->queues[0].device;
Christoph Hellwig22dd4c72020-11-06 19:19:35 +0100867 ctrl->ctrl.numa_node = ibdev_to_node(ctrl->device->dev);
Sagi Grimberg90af3512017-07-10 09:22:28 +0300868
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +0300869 /* T10-PI support */
870 if (ctrl->device->dev->attrs.device_cap_flags &
871 IB_DEVICE_INTEGRITY_HANDOVER)
872 pi_capable = true;
873
874 ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev,
875 pi_capable);
Sagi Grimberg90af3512017-07-10 09:22:28 +0300876
Max Gurtovoy62f99b62019-06-06 12:27:36 +0300877 /*
878 * Bind the async event SQE DMA mapping to the admin queue lifetime.
879 * It's safe, since any chage in the underlying RDMA device will issue
880 * error recovery and queue re-creation.
881 */
Sagi Grimberg94e42212018-06-19 15:34:10 +0300882 error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe,
883 sizeof(struct nvme_command), DMA_TO_DEVICE);
884 if (error)
885 goto out_free_queue;
886
Sagi Grimberg3f02fff2017-07-10 09:22:32 +0300887 if (new) {
888 ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true);
Sagi Grimbergf04b9cc2017-10-19 18:10:53 +0300889 if (IS_ERR(ctrl->ctrl.admin_tagset)) {
890 error = PTR_ERR(ctrl->ctrl.admin_tagset);
Sagi Grimberg94e42212018-06-19 15:34:10 +0300891 goto out_free_async_qe;
Sagi Grimbergf04b9cc2017-10-19 18:10:53 +0300892 }
Sagi Grimberg90af3512017-07-10 09:22:28 +0300893
Sagi Grimberge7832cb2019-08-02 19:33:59 -0700894 ctrl->ctrl.fabrics_q = blk_mq_init_queue(&ctrl->admin_tag_set);
895 if (IS_ERR(ctrl->ctrl.fabrics_q)) {
896 error = PTR_ERR(ctrl->ctrl.fabrics_q);
897 goto out_free_tagset;
898 }
899
Sagi Grimberg3f02fff2017-07-10 09:22:32 +0300900 ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set);
901 if (IS_ERR(ctrl->ctrl.admin_q)) {
902 error = PTR_ERR(ctrl->ctrl.admin_q);
Sagi Grimberge7832cb2019-08-02 19:33:59 -0700903 goto out_cleanup_fabrics_q;
Sagi Grimberg3f02fff2017-07-10 09:22:32 +0300904 }
Sagi Grimberg90af3512017-07-10 09:22:28 +0300905 }
906
Sagi Grimberg68e16fc2017-07-10 09:22:37 +0300907 error = nvme_rdma_start_queue(ctrl, 0);
Sagi Grimberg90af3512017-07-10 09:22:28 +0300908 if (error)
909 goto out_cleanup_queue;
910
Sagi Grimbergc0f2f452019-07-22 17:06:53 -0700911 error = nvme_enable_ctrl(&ctrl->ctrl);
Sagi Grimberg90af3512017-07-10 09:22:28 +0300912 if (error)
Jianchao Wang2e050f02018-05-24 09:27:38 +0800913 goto out_stop_queue;
Sagi Grimberg90af3512017-07-10 09:22:28 +0300914
Max Gurtovoyff13c1b2019-09-21 23:58:19 +0300915 ctrl->ctrl.max_segments = ctrl->max_fr_pages;
916 ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9);
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +0300917 if (pi_capable)
918 ctrl->ctrl.max_integrity_segments = ctrl->max_fr_pages;
919 else
920 ctrl->ctrl.max_integrity_segments = 0;
Sagi Grimberg90af3512017-07-10 09:22:28 +0300921
Ming Lei6ca1d902021-10-14 16:17:06 +0800922 nvme_start_admin_queue(&ctrl->ctrl);
Sagi Grimberge7832cb2019-08-02 19:33:59 -0700923
Chaitanya Kulkarnif21c47692021-02-28 18:06:04 -0800924 error = nvme_init_ctrl_finish(&ctrl->ctrl);
Sagi Grimberg90af3512017-07-10 09:22:28 +0300925 if (error)
Chao Leng958dc1d2021-01-21 11:32:37 +0800926 goto out_quiesce_queue;
Sagi Grimberg90af3512017-07-10 09:22:28 +0300927
Sagi Grimberg90af3512017-07-10 09:22:28 +0300928 return 0;
929
Chao Leng958dc1d2021-01-21 11:32:37 +0800930out_quiesce_queue:
Ming Lei6ca1d902021-10-14 16:17:06 +0800931 nvme_stop_admin_queue(&ctrl->ctrl);
Chao Leng958dc1d2021-01-21 11:32:37 +0800932 blk_sync_queue(ctrl->ctrl.admin_q);
Jianchao Wang2e050f02018-05-24 09:27:38 +0800933out_stop_queue:
934 nvme_rdma_stop_queue(&ctrl->queues[0]);
Chao Leng958dc1d2021-01-21 11:32:37 +0800935 nvme_cancel_admin_tagset(&ctrl->ctrl);
Sagi Grimberg90af3512017-07-10 09:22:28 +0300936out_cleanup_queue:
Sagi Grimberg3f02fff2017-07-10 09:22:32 +0300937 if (new)
938 blk_cleanup_queue(ctrl->ctrl.admin_q);
Sagi Grimberge7832cb2019-08-02 19:33:59 -0700939out_cleanup_fabrics_q:
940 if (new)
941 blk_cleanup_queue(ctrl->ctrl.fabrics_q);
Sagi Grimberg90af3512017-07-10 09:22:28 +0300942out_free_tagset:
Sagi Grimberg3f02fff2017-07-10 09:22:32 +0300943 if (new)
Max Gurtovoy87fd1252019-05-06 13:47:55 +0300944 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
Sagi Grimberg94e42212018-06-19 15:34:10 +0300945out_free_async_qe:
Prabhath Sajeepa9134ae22020-03-09 15:07:53 -0600946 if (ctrl->async_event_sqe.data) {
947 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
948 sizeof(struct nvme_command), DMA_TO_DEVICE);
949 ctrl->async_event_sqe.data = NULL;
950 }
Sagi Grimberg90af3512017-07-10 09:22:28 +0300951out_free_queue:
952 nvme_rdma_free_queue(&ctrl->queues[0]);
953 return error;
954}
955
Sagi Grimberga57bd542017-08-28 21:41:10 +0200956static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl,
957 bool remove)
958{
Sagi Grimberga57bd542017-08-28 21:41:10 +0200959 if (remove) {
960 blk_cleanup_queue(ctrl->ctrl.connect_q);
Max Gurtovoy87fd1252019-05-06 13:47:55 +0300961 blk_mq_free_tag_set(ctrl->ctrl.tagset);
Sagi Grimberga57bd542017-08-28 21:41:10 +0200962 }
963 nvme_rdma_free_io_queues(ctrl);
964}
965
966static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
967{
968 int ret;
969
Sagi Grimberg41e8cfa2017-07-10 09:22:36 +0300970 ret = nvme_rdma_alloc_io_queues(ctrl);
Sagi Grimberga57bd542017-08-28 21:41:10 +0200971 if (ret)
972 return ret;
973
974 if (new) {
975 ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false);
Sagi Grimbergf04b9cc2017-10-19 18:10:53 +0300976 if (IS_ERR(ctrl->ctrl.tagset)) {
977 ret = PTR_ERR(ctrl->ctrl.tagset);
Sagi Grimberga57bd542017-08-28 21:41:10 +0200978 goto out_free_io_queues;
Sagi Grimbergf04b9cc2017-10-19 18:10:53 +0300979 }
Sagi Grimberga57bd542017-08-28 21:41:10 +0200980
981 ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set);
982 if (IS_ERR(ctrl->ctrl.connect_q)) {
983 ret = PTR_ERR(ctrl->ctrl.connect_q);
984 goto out_free_tag_set;
985 }
Sagi Grimberga57bd542017-08-28 21:41:10 +0200986 }
987
Sagi Grimberg68e16fc2017-07-10 09:22:37 +0300988 ret = nvme_rdma_start_io_queues(ctrl);
Sagi Grimberga57bd542017-08-28 21:41:10 +0200989 if (ret)
990 goto out_cleanup_connect_q;
991
Sagi Grimberg9f987722020-07-27 17:32:09 -0700992 if (!new) {
993 nvme_start_queues(&ctrl->ctrl);
Sagi Grimberg2362acb2020-07-30 13:42:42 -0700994 if (!nvme_wait_freeze_timeout(&ctrl->ctrl, NVME_IO_TIMEOUT)) {
995 /*
996 * If we timed out waiting for freeze we are likely to
997 * be stuck. Fail the controller initialization just
998 * to be safe.
999 */
1000 ret = -ENODEV;
1001 goto out_wait_freeze_timed_out;
1002 }
Sagi Grimberg9f987722020-07-27 17:32:09 -07001003 blk_mq_update_nr_hw_queues(ctrl->ctrl.tagset,
1004 ctrl->ctrl.queue_count - 1);
1005 nvme_unfreeze(&ctrl->ctrl);
1006 }
1007
Sagi Grimberga57bd542017-08-28 21:41:10 +02001008 return 0;
1009
Sagi Grimberg2362acb2020-07-30 13:42:42 -07001010out_wait_freeze_timed_out:
1011 nvme_stop_queues(&ctrl->ctrl);
Chao Leng958dc1d2021-01-21 11:32:37 +08001012 nvme_sync_io_queues(&ctrl->ctrl);
Sagi Grimberg2362acb2020-07-30 13:42:42 -07001013 nvme_rdma_stop_io_queues(ctrl);
Sagi Grimberga57bd542017-08-28 21:41:10 +02001014out_cleanup_connect_q:
Chao Leng958dc1d2021-01-21 11:32:37 +08001015 nvme_cancel_tagset(&ctrl->ctrl);
Sagi Grimberga57bd542017-08-28 21:41:10 +02001016 if (new)
1017 blk_cleanup_queue(ctrl->ctrl.connect_q);
1018out_free_tag_set:
1019 if (new)
Max Gurtovoy87fd1252019-05-06 13:47:55 +03001020 blk_mq_free_tag_set(ctrl->ctrl.tagset);
Sagi Grimberga57bd542017-08-28 21:41:10 +02001021out_free_io_queues:
1022 nvme_rdma_free_io_queues(ctrl);
1023 return ret;
Christoph Hellwig71102302016-07-06 21:55:52 +09001024}
1025
Sagi Grimberg75862c72018-07-09 12:49:07 +03001026static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
1027 bool remove)
1028{
Ming Lei6ca1d902021-10-14 16:17:06 +08001029 nvme_stop_admin_queue(&ctrl->ctrl);
Chao Leng30170132020-10-22 10:15:08 +08001030 blk_sync_queue(ctrl->ctrl.admin_q);
Sagi Grimberg75862c72018-07-09 12:49:07 +03001031 nvme_rdma_stop_queue(&ctrl->queues[0]);
Chao Lengc4189d62021-01-21 11:32:39 +08001032 nvme_cancel_admin_tagset(&ctrl->ctrl);
Sagi Grimberge7832cb2019-08-02 19:33:59 -07001033 if (remove)
Ming Lei6ca1d902021-10-14 16:17:06 +08001034 nvme_start_admin_queue(&ctrl->ctrl);
Sagi Grimberg75862c72018-07-09 12:49:07 +03001035 nvme_rdma_destroy_admin_queue(ctrl, remove);
1036}
1037
1038static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
1039 bool remove)
1040{
1041 if (ctrl->ctrl.queue_count > 1) {
Sagi Grimberg9f987722020-07-27 17:32:09 -07001042 nvme_start_freeze(&ctrl->ctrl);
Sagi Grimberg75862c72018-07-09 12:49:07 +03001043 nvme_stop_queues(&ctrl->ctrl);
Chao Leng30170132020-10-22 10:15:08 +08001044 nvme_sync_io_queues(&ctrl->ctrl);
Sagi Grimberg75862c72018-07-09 12:49:07 +03001045 nvme_rdma_stop_io_queues(ctrl);
Chao Lengc4189d62021-01-21 11:32:39 +08001046 nvme_cancel_tagset(&ctrl->ctrl);
Sagi Grimberg75862c72018-07-09 12:49:07 +03001047 if (remove)
1048 nvme_start_queues(&ctrl->ctrl);
1049 nvme_rdma_destroy_io_queues(ctrl, remove);
1050 }
1051}
1052
Christoph Hellwig71102302016-07-06 21:55:52 +09001053static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
1054{
1055 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
1056
1057 if (list_empty(&ctrl->list))
1058 goto free_ctrl;
1059
1060 mutex_lock(&nvme_rdma_ctrl_mutex);
1061 list_del(&ctrl->list);
1062 mutex_unlock(&nvme_rdma_ctrl_mutex);
1063
Christoph Hellwig71102302016-07-06 21:55:52 +09001064 nvmf_free_options(nctrl->opts);
1065free_ctrl:
Sagi Grimberg3d064102018-06-19 15:34:09 +03001066 kfree(ctrl->queues);
Christoph Hellwig71102302016-07-06 21:55:52 +09001067 kfree(ctrl);
1068}
1069
Sagi Grimbergfd8563c2017-03-18 20:58:29 +02001070static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl)
1071{
1072 /* If we are resetting/deleting then do nothing */
Max Gurtovoyad6a0a52018-01-31 18:31:24 +02001073 if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) {
Sagi Grimbergfd8563c2017-03-18 20:58:29 +02001074 WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW ||
1075 ctrl->ctrl.state == NVME_CTRL_LIVE);
1076 return;
1077 }
1078
1079 if (nvmf_should_reconnect(&ctrl->ctrl)) {
1080 dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n",
1081 ctrl->ctrl.opts->reconnect_delay);
Sagi Grimberg9a6327d2017-06-07 20:31:55 +02001082 queue_delayed_work(nvme_wq, &ctrl->reconnect_work,
Sagi Grimbergfd8563c2017-03-18 20:58:29 +02001083 ctrl->ctrl.opts->reconnect_delay * HZ);
1084 } else {
Sagi Grimberg12fa1302017-10-29 14:21:01 +02001085 nvme_delete_ctrl(&ctrl->ctrl);
Sagi Grimbergfd8563c2017-03-18 20:58:29 +02001086 }
1087}
1088
Sagi Grimbergc66e2992018-07-09 12:49:06 +03001089static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new)
Christoph Hellwig71102302016-07-06 21:55:52 +09001090{
Colin Ian King13ce7e6252021-05-13 12:59:52 +01001091 int ret;
Christoph Hellwig71102302016-07-06 21:55:52 +09001092 bool changed;
Christoph Hellwig71102302016-07-06 21:55:52 +09001093
Sagi Grimbergc66e2992018-07-09 12:49:06 +03001094 ret = nvme_rdma_configure_admin_queue(ctrl, new);
Christoph Hellwig71102302016-07-06 21:55:52 +09001095 if (ret)
Sagi Grimbergc66e2992018-07-09 12:49:06 +03001096 return ret;
1097
1098 if (ctrl->ctrl.icdoff) {
Max Gurtovoy09748122021-10-17 11:58:16 +03001099 ret = -EOPNOTSUPP;
Sagi Grimbergc66e2992018-07-09 12:49:06 +03001100 dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
1101 goto destroy_admin;
1102 }
1103
1104 if (!(ctrl->ctrl.sgls & (1 << 2))) {
Max Gurtovoy09748122021-10-17 11:58:16 +03001105 ret = -EOPNOTSUPP;
Sagi Grimbergc66e2992018-07-09 12:49:06 +03001106 dev_err(ctrl->ctrl.device,
1107 "Mandatory keyed sgls are not supported!\n");
1108 goto destroy_admin;
1109 }
1110
1111 if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) {
1112 dev_warn(ctrl->ctrl.device,
1113 "queue_size %zu > ctrl sqsize %u, clamping down\n",
1114 ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1);
1115 }
1116
Max Gurtovoy44c3c622021-09-23 00:55:35 +03001117 if (ctrl->ctrl.sqsize + 1 > NVME_RDMA_MAX_QUEUE_SIZE) {
1118 dev_warn(ctrl->ctrl.device,
1119 "ctrl sqsize %u > max queue size %u, clamping down\n",
1120 ctrl->ctrl.sqsize + 1, NVME_RDMA_MAX_QUEUE_SIZE);
1121 ctrl->ctrl.sqsize = NVME_RDMA_MAX_QUEUE_SIZE - 1;
1122 }
1123
Sagi Grimbergc66e2992018-07-09 12:49:06 +03001124 if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) {
1125 dev_warn(ctrl->ctrl.device,
1126 "sqsize %u > ctrl maxcmd %u, clamping down\n",
1127 ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd);
1128 ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1;
1129 }
Christoph Hellwig71102302016-07-06 21:55:52 +09001130
Steve Wise64a741c2018-06-20 07:15:05 -07001131 if (ctrl->ctrl.sgls & (1 << 20))
1132 ctrl->use_inline_data = true;
Christoph Hellwig71102302016-07-06 21:55:52 +09001133
Sagi Grimbergd858e5f2017-04-24 10:58:29 +03001134 if (ctrl->ctrl.queue_count > 1) {
Sagi Grimbergc66e2992018-07-09 12:49:06 +03001135 ret = nvme_rdma_configure_io_queues(ctrl, new);
Christoph Hellwig71102302016-07-06 21:55:52 +09001136 if (ret)
Sagi Grimberg5e1fe612017-10-11 15:29:11 +03001137 goto destroy_admin;
Christoph Hellwig71102302016-07-06 21:55:52 +09001138 }
1139
1140 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
Sagi Grimberg0a960afd2017-09-21 17:01:37 +03001141 if (!changed) {
Israel Rukshin96135862020-03-24 17:29:44 +02001142 /*
Sagi Grimbergecca390e2020-07-22 16:32:19 -07001143 * state change failure is ok if we started ctrl delete,
Israel Rukshin96135862020-03-24 17:29:44 +02001144 * unless we're during creation of a new controller to
1145 * avoid races with teardown flow.
1146 */
Sagi Grimbergecca390e2020-07-22 16:32:19 -07001147 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING &&
1148 ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO);
Israel Rukshin96135862020-03-24 17:29:44 +02001149 WARN_ON_ONCE(new);
Sagi Grimbergc66e2992018-07-09 12:49:06 +03001150 ret = -EINVAL;
1151 goto destroy_io;
Sagi Grimberg0a960afd2017-09-21 17:01:37 +03001152 }
1153
Sagi Grimbergd09f2b42017-07-02 10:56:43 +03001154 nvme_start_ctrl(&ctrl->ctrl);
Sagi Grimbergc66e2992018-07-09 12:49:06 +03001155 return 0;
1156
1157destroy_io:
Chao Leng958dc1d2021-01-21 11:32:37 +08001158 if (ctrl->ctrl.queue_count > 1) {
1159 nvme_stop_queues(&ctrl->ctrl);
1160 nvme_sync_io_queues(&ctrl->ctrl);
1161 nvme_rdma_stop_io_queues(ctrl);
1162 nvme_cancel_tagset(&ctrl->ctrl);
Sagi Grimbergc66e2992018-07-09 12:49:06 +03001163 nvme_rdma_destroy_io_queues(ctrl, new);
Chao Leng958dc1d2021-01-21 11:32:37 +08001164 }
Sagi Grimbergc66e2992018-07-09 12:49:06 +03001165destroy_admin:
Ming Lei6ca1d902021-10-14 16:17:06 +08001166 nvme_stop_admin_queue(&ctrl->ctrl);
Chao Leng958dc1d2021-01-21 11:32:37 +08001167 blk_sync_queue(ctrl->ctrl.admin_q);
Sagi Grimbergc66e2992018-07-09 12:49:06 +03001168 nvme_rdma_stop_queue(&ctrl->queues[0]);
Chao Leng958dc1d2021-01-21 11:32:37 +08001169 nvme_cancel_admin_tagset(&ctrl->ctrl);
Sagi Grimbergc66e2992018-07-09 12:49:06 +03001170 nvme_rdma_destroy_admin_queue(ctrl, new);
1171 return ret;
1172}
1173
1174static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
1175{
1176 struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
1177 struct nvme_rdma_ctrl, reconnect_work);
1178
1179 ++ctrl->ctrl.nr_reconnects;
1180
1181 if (nvme_rdma_setup_ctrl(ctrl, false))
1182 goto requeue;
Christoph Hellwig71102302016-07-06 21:55:52 +09001183
Sagi Grimberg5e1fe612017-10-11 15:29:11 +03001184 dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n",
1185 ctrl->ctrl.nr_reconnects);
1186
1187 ctrl->ctrl.nr_reconnects = 0;
Christoph Hellwig71102302016-07-06 21:55:52 +09001188
1189 return;
1190
Christoph Hellwig71102302016-07-06 21:55:52 +09001191requeue:
Sagi Grimbergfd8563c2017-03-18 20:58:29 +02001192 dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n",
Sagi Grimbergfdf9dfa2017-05-04 13:33:15 +03001193 ctrl->ctrl.nr_reconnects);
Sagi Grimbergfd8563c2017-03-18 20:58:29 +02001194 nvme_rdma_reconnect_or_remove(ctrl);
Christoph Hellwig71102302016-07-06 21:55:52 +09001195}
1196
1197static void nvme_rdma_error_recovery_work(struct work_struct *work)
1198{
1199 struct nvme_rdma_ctrl *ctrl = container_of(work,
1200 struct nvme_rdma_ctrl, err_work);
1201
Sagi Grimberge4d753d2017-09-21 17:01:38 +03001202 nvme_stop_keep_alive(&ctrl->ctrl);
Sagi Grimberg75862c72018-07-09 12:49:07 +03001203 nvme_rdma_teardown_io_queues(ctrl, false);
Sagi Grimberge818a5b2017-06-05 20:35:56 +03001204 nvme_start_queues(&ctrl->ctrl);
Sagi Grimberg75862c72018-07-09 12:49:07 +03001205 nvme_rdma_teardown_admin_queue(ctrl, false);
Ming Lei6ca1d902021-10-14 16:17:06 +08001206 nvme_start_admin_queue(&ctrl->ctrl);
Sagi Grimberge818a5b2017-06-05 20:35:56 +03001207
Max Gurtovoyad6a0a52018-01-31 18:31:24 +02001208 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
Sagi Grimbergecca390e2020-07-22 16:32:19 -07001209 /* state change failure is ok if we started ctrl delete */
1210 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING &&
1211 ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO);
Sagi Grimbergd5bf4b72017-12-21 14:54:15 +02001212 return;
1213 }
1214
Sagi Grimbergfd8563c2017-03-18 20:58:29 +02001215 nvme_rdma_reconnect_or_remove(ctrl);
Christoph Hellwig71102302016-07-06 21:55:52 +09001216}
1217
1218static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
1219{
Sagi Grimbergd5bf4b72017-12-21 14:54:15 +02001220 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
Christoph Hellwig71102302016-07-06 21:55:52 +09001221 return;
1222
Sagi Grimberg0475a8d2020-07-29 02:36:03 -07001223 dev_warn(ctrl->ctrl.device, "starting error recovery\n");
Nigel Kirkland97b25122020-02-10 16:01:45 -08001224 queue_work(nvme_reset_wq, &ctrl->err_work);
Christoph Hellwig71102302016-07-06 21:55:52 +09001225}
1226
Christoph Hellwig84465462020-06-11 08:44:51 +02001227static void nvme_rdma_end_request(struct nvme_rdma_request *req)
1228{
1229 struct request *rq = blk_mq_rq_from_pdu(req);
1230
1231 if (!refcount_dec_and_test(&req->ref))
1232 return;
Christoph Hellwig2eb81a32020-08-18 09:11:29 +02001233 if (!nvme_try_complete_req(rq, req->status, req->result))
Christoph Hellwigff029452020-06-11 08:44:52 +02001234 nvme_rdma_complete_rq(rq);
Christoph Hellwig84465462020-06-11 08:44:51 +02001235}
1236
Christoph Hellwig71102302016-07-06 21:55:52 +09001237static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
1238 const char *op)
1239{
Yamin Friedman287f3292020-07-13 11:53:29 +03001240 struct nvme_rdma_queue *queue = wc->qp->qp_context;
Christoph Hellwig71102302016-07-06 21:55:52 +09001241 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1242
1243 if (ctrl->ctrl.state == NVME_CTRL_LIVE)
1244 dev_info(ctrl->ctrl.device,
1245 "%s for CQE 0x%p failed with status %s (%d)\n",
1246 op, wc->wr_cqe,
1247 ib_wc_status_msg(wc->status), wc->status);
1248 nvme_rdma_error_recovery(ctrl);
1249}
1250
1251static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
1252{
1253 if (unlikely(wc->status != IB_WC_SUCCESS))
1254 nvme_rdma_wr_error(cq, wc, "MEMREG");
1255}
1256
1257static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
1258{
Sagi Grimberg2f122e42017-11-23 17:35:23 +02001259 struct nvme_rdma_request *req =
1260 container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe);
Sagi Grimberg2f122e42017-11-23 17:35:23 +02001261
Christoph Hellwig84465462020-06-11 08:44:51 +02001262 if (unlikely(wc->status != IB_WC_SUCCESS))
Christoph Hellwig71102302016-07-06 21:55:52 +09001263 nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
Christoph Hellwig84465462020-06-11 08:44:51 +02001264 else
1265 nvme_rdma_end_request(req);
Christoph Hellwig71102302016-07-06 21:55:52 +09001266}
1267
1268static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
1269 struct nvme_rdma_request *req)
1270{
Christoph Hellwig71102302016-07-06 21:55:52 +09001271 struct ib_send_wr wr = {
1272 .opcode = IB_WR_LOCAL_INV,
1273 .next = NULL,
1274 .num_sge = 0,
Sagi Grimberg2f122e42017-11-23 17:35:23 +02001275 .send_flags = IB_SEND_SIGNALED,
Christoph Hellwig71102302016-07-06 21:55:52 +09001276 .ex.invalidate_rkey = req->mr->rkey,
1277 };
1278
1279 req->reg_cqe.done = nvme_rdma_inv_rkey_done;
1280 wr.wr_cqe = &req->reg_cqe;
1281
Bart Van Assche45e3cc1a2018-07-18 09:25:23 -07001282 return ib_post_send(queue->qp, &wr, NULL);
Christoph Hellwig71102302016-07-06 21:55:52 +09001283}
1284
1285static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
1286 struct request *rq)
1287{
1288 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
Christoph Hellwig71102302016-07-06 21:55:52 +09001289 struct nvme_rdma_device *dev = queue->device;
1290 struct ib_device *ibdev = dev->dev;
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +03001291 struct list_head *pool = &queue->qp->rdma_mrs;
Christoph Hellwig71102302016-07-06 21:55:52 +09001292
Chaitanya Kulkarni34e08192019-02-20 20:13:34 -08001293 if (!blk_rq_nr_phys_segments(rq))
Christoph Hellwig71102302016-07-06 21:55:52 +09001294 return;
1295
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +03001296 if (blk_integrity_rq(rq)) {
1297 ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl,
1298 req->metadata_sgl->nents, rq_dma_dir(rq));
1299 sg_free_table_chained(&req->metadata_sgl->sg_table,
1300 NVME_INLINE_METADATA_SG_CNT);
1301 }
1302
1303 if (req->use_sig_mr)
1304 pool = &queue->qp->sig_mrs;
1305
Israel Rukshinf41725b2017-11-26 10:40:55 +00001306 if (req->mr) {
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +03001307 ib_mr_pool_put(queue->qp, pool, req->mr);
Israel Rukshinf41725b2017-11-26 10:40:55 +00001308 req->mr = NULL;
1309 }
1310
Israel Rukshin324d9e72020-05-19 17:05:55 +03001311 ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents,
1312 rq_dma_dir(rq));
1313 sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT);
Christoph Hellwig71102302016-07-06 21:55:52 +09001314}
1315
1316static int nvme_rdma_set_sg_null(struct nvme_command *c)
1317{
1318 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1319
1320 sg->addr = 0;
1321 put_unaligned_le24(0, sg->length);
1322 put_unaligned_le32(0, sg->key);
1323 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1324 return 0;
1325}
1326
1327static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
Steve Wise64a741c2018-06-20 07:15:05 -07001328 struct nvme_rdma_request *req, struct nvme_command *c,
1329 int count)
Christoph Hellwig71102302016-07-06 21:55:52 +09001330{
1331 struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
Steve Wise64a741c2018-06-20 07:15:05 -07001332 struct ib_sge *sge = &req->sge[1];
Sagi Grimberg12b2aaa2021-05-27 18:16:38 -07001333 struct scatterlist *sgl;
Steve Wise64a741c2018-06-20 07:15:05 -07001334 u32 len = 0;
1335 int i;
Christoph Hellwig71102302016-07-06 21:55:52 +09001336
Sagi Grimberg12b2aaa2021-05-27 18:16:38 -07001337 for_each_sg(req->data_sgl.sg_table.sgl, sgl, count, i) {
Steve Wise64a741c2018-06-20 07:15:05 -07001338 sge->addr = sg_dma_address(sgl);
1339 sge->length = sg_dma_len(sgl);
1340 sge->lkey = queue->device->pd->local_dma_lkey;
1341 len += sge->length;
Sagi Grimberg12b2aaa2021-05-27 18:16:38 -07001342 sge++;
Steve Wise64a741c2018-06-20 07:15:05 -07001343 }
Christoph Hellwig71102302016-07-06 21:55:52 +09001344
1345 sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
Steve Wise64a741c2018-06-20 07:15:05 -07001346 sg->length = cpu_to_le32(len);
Christoph Hellwig71102302016-07-06 21:55:52 +09001347 sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
1348
Steve Wise64a741c2018-06-20 07:15:05 -07001349 req->num_sge += count;
Christoph Hellwig71102302016-07-06 21:55:52 +09001350 return 0;
1351}
1352
1353static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
1354 struct nvme_rdma_request *req, struct nvme_command *c)
1355{
1356 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1357
Israel Rukshin324d9e72020-05-19 17:05:55 +03001358 sg->addr = cpu_to_le64(sg_dma_address(req->data_sgl.sg_table.sgl));
1359 put_unaligned_le24(sg_dma_len(req->data_sgl.sg_table.sgl), sg->length);
Christoph Hellwig11975e02016-09-05 12:56:20 +02001360 put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
Christoph Hellwig71102302016-07-06 21:55:52 +09001361 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1362 return 0;
1363}
1364
1365static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
1366 struct nvme_rdma_request *req, struct nvme_command *c,
1367 int count)
1368{
1369 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1370 int nr;
1371
Israel Rukshinf41725b2017-11-26 10:40:55 +00001372 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs);
1373 if (WARN_ON_ONCE(!req->mr))
1374 return -EAGAIN;
1375
Max Gurtovoyb925a2d2017-08-28 12:52:27 +03001376 /*
1377 * Align the MR to a 4K page size to match the ctrl page size and
1378 * the block virtual boundary.
1379 */
Israel Rukshin324d9e72020-05-19 17:05:55 +03001380 nr = ib_map_mr_sg(req->mr, req->data_sgl.sg_table.sgl, count, NULL,
1381 SZ_4K);
Max Gurtovoya7b7c7a2017-08-14 15:29:26 +03001382 if (unlikely(nr < count)) {
Israel Rukshinf41725b2017-11-26 10:40:55 +00001383 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1384 req->mr = NULL;
Christoph Hellwig71102302016-07-06 21:55:52 +09001385 if (nr < 0)
1386 return nr;
1387 return -EINVAL;
1388 }
1389
1390 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1391
1392 req->reg_cqe.done = nvme_rdma_memreg_done;
1393 memset(&req->reg_wr, 0, sizeof(req->reg_wr));
1394 req->reg_wr.wr.opcode = IB_WR_REG_MR;
1395 req->reg_wr.wr.wr_cqe = &req->reg_cqe;
1396 req->reg_wr.wr.num_sge = 0;
1397 req->reg_wr.mr = req->mr;
1398 req->reg_wr.key = req->mr->rkey;
1399 req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
1400 IB_ACCESS_REMOTE_READ |
1401 IB_ACCESS_REMOTE_WRITE;
1402
Christoph Hellwig71102302016-07-06 21:55:52 +09001403 sg->addr = cpu_to_le64(req->mr->iova);
1404 put_unaligned_le24(req->mr->length, sg->length);
1405 put_unaligned_le32(req->mr->rkey, sg->key);
1406 sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
1407 NVME_SGL_FMT_INVALIDATE;
1408
1409 return 0;
1410}
1411
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +03001412static void nvme_rdma_set_sig_domain(struct blk_integrity *bi,
1413 struct nvme_command *cmd, struct ib_sig_domain *domain,
1414 u16 control, u8 pi_type)
1415{
1416 domain->sig_type = IB_SIG_TYPE_T10_DIF;
1417 domain->sig.dif.bg_type = IB_T10DIF_CRC;
1418 domain->sig.dif.pi_interval = 1 << bi->interval_exp;
1419 domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag);
1420 if (control & NVME_RW_PRINFO_PRCHK_REF)
1421 domain->sig.dif.ref_remap = true;
1422
1423 domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag);
1424 domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask);
1425 domain->sig.dif.app_escape = true;
1426 if (pi_type == NVME_NS_DPS_PI_TYPE3)
1427 domain->sig.dif.ref_escape = true;
1428}
1429
1430static void nvme_rdma_set_sig_attrs(struct blk_integrity *bi,
1431 struct nvme_command *cmd, struct ib_sig_attrs *sig_attrs,
1432 u8 pi_type)
1433{
1434 u16 control = le16_to_cpu(cmd->rw.control);
1435
1436 memset(sig_attrs, 0, sizeof(*sig_attrs));
1437 if (control & NVME_RW_PRINFO_PRACT) {
1438 /* for WRITE_INSERT/READ_STRIP no memory domain */
1439 sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE;
1440 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
1441 pi_type);
1442 /* Clear the PRACT bit since HCA will generate/verify the PI */
1443 control &= ~NVME_RW_PRINFO_PRACT;
1444 cmd->rw.control = cpu_to_le16(control);
1445 } else {
1446 /* for WRITE_PASS/READ_PASS both wire/memory domains exist */
1447 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
1448 pi_type);
1449 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control,
1450 pi_type);
1451 }
1452}
1453
1454static void nvme_rdma_set_prot_checks(struct nvme_command *cmd, u8 *mask)
1455{
1456 *mask = 0;
1457 if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_REF)
1458 *mask |= IB_SIG_CHECK_REFTAG;
1459 if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_GUARD)
1460 *mask |= IB_SIG_CHECK_GUARD;
1461}
1462
1463static void nvme_rdma_sig_done(struct ib_cq *cq, struct ib_wc *wc)
1464{
1465 if (unlikely(wc->status != IB_WC_SUCCESS))
1466 nvme_rdma_wr_error(cq, wc, "SIG");
1467}
1468
1469static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue,
1470 struct nvme_rdma_request *req, struct nvme_command *c,
1471 int count, int pi_count)
1472{
1473 struct nvme_rdma_sgl *sgl = &req->data_sgl;
1474 struct ib_reg_wr *wr = &req->reg_wr;
1475 struct request *rq = blk_mq_rq_from_pdu(req);
1476 struct nvme_ns *ns = rq->q->queuedata;
1477 struct bio *bio = rq->bio;
1478 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1479 int nr;
1480
1481 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs);
1482 if (WARN_ON_ONCE(!req->mr))
1483 return -EAGAIN;
1484
1485 nr = ib_map_mr_sg_pi(req->mr, sgl->sg_table.sgl, count, NULL,
1486 req->metadata_sgl->sg_table.sgl, pi_count, NULL,
1487 SZ_4K);
1488 if (unlikely(nr))
1489 goto mr_put;
1490
Christoph Hellwig309dca302021-01-24 11:02:34 +01001491 nvme_rdma_set_sig_attrs(blk_get_integrity(bio->bi_bdev->bd_disk), c,
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +03001492 req->mr->sig_attrs, ns->pi_type);
1493 nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask);
1494
1495 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1496
1497 req->reg_cqe.done = nvme_rdma_sig_done;
1498 memset(wr, 0, sizeof(*wr));
1499 wr->wr.opcode = IB_WR_REG_MR_INTEGRITY;
1500 wr->wr.wr_cqe = &req->reg_cqe;
1501 wr->wr.num_sge = 0;
1502 wr->wr.send_flags = 0;
1503 wr->mr = req->mr;
1504 wr->key = req->mr->rkey;
1505 wr->access = IB_ACCESS_LOCAL_WRITE |
1506 IB_ACCESS_REMOTE_READ |
1507 IB_ACCESS_REMOTE_WRITE;
1508
1509 sg->addr = cpu_to_le64(req->mr->iova);
1510 put_unaligned_le24(req->mr->length, sg->length);
1511 put_unaligned_le32(req->mr->rkey, sg->key);
1512 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1513
1514 return 0;
1515
1516mr_put:
1517 ib_mr_pool_put(queue->qp, &queue->qp->sig_mrs, req->mr);
1518 req->mr = NULL;
1519 if (nr < 0)
1520 return nr;
1521 return -EINVAL;
1522}
1523
Christoph Hellwig71102302016-07-06 21:55:52 +09001524static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
Christoph Hellwigb131c612017-01-13 12:29:12 +01001525 struct request *rq, struct nvme_command *c)
Christoph Hellwig71102302016-07-06 21:55:52 +09001526{
1527 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1528 struct nvme_rdma_device *dev = queue->device;
1529 struct ib_device *ibdev = dev->dev;
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +03001530 int pi_count = 0;
Christoph Hellwigf9d03f92016-12-08 15:20:32 -07001531 int count, ret;
Christoph Hellwig71102302016-07-06 21:55:52 +09001532
1533 req->num_sge = 1;
Sagi Grimberg4af7f7f2017-11-23 17:35:22 +02001534 refcount_set(&req->ref, 2); /* send and recv completions */
Christoph Hellwig71102302016-07-06 21:55:52 +09001535
1536 c->common.flags |= NVME_CMD_SGL_METABUF;
1537
Chaitanya Kulkarni34e08192019-02-20 20:13:34 -08001538 if (!blk_rq_nr_phys_segments(rq))
Christoph Hellwig71102302016-07-06 21:55:52 +09001539 return nvme_rdma_set_sg_null(c);
1540
Israel Rukshin324d9e72020-05-19 17:05:55 +03001541 req->data_sgl.sg_table.sgl = (struct scatterlist *)(req + 1);
1542 ret = sg_alloc_table_chained(&req->data_sgl.sg_table,
1543 blk_rq_nr_phys_segments(rq), req->data_sgl.sg_table.sgl,
Israel Rukshin38e18002019-11-24 18:38:30 +02001544 NVME_INLINE_SG_CNT);
Christoph Hellwig71102302016-07-06 21:55:52 +09001545 if (ret)
1546 return -ENOMEM;
1547
Israel Rukshin324d9e72020-05-19 17:05:55 +03001548 req->data_sgl.nents = blk_rq_map_sg(rq->q, rq,
1549 req->data_sgl.sg_table.sgl);
Christoph Hellwig71102302016-07-06 21:55:52 +09001550
Israel Rukshin324d9e72020-05-19 17:05:55 +03001551 count = ib_dma_map_sg(ibdev, req->data_sgl.sg_table.sgl,
1552 req->data_sgl.nents, rq_dma_dir(rq));
Christoph Hellwig71102302016-07-06 21:55:52 +09001553 if (unlikely(count <= 0)) {
Max Gurtovoy94423a82018-06-10 16:58:29 +03001554 ret = -EIO;
1555 goto out_free_table;
Christoph Hellwig71102302016-07-06 21:55:52 +09001556 }
1557
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +03001558 if (blk_integrity_rq(rq)) {
1559 req->metadata_sgl->sg_table.sgl =
1560 (struct scatterlist *)(req->metadata_sgl + 1);
1561 ret = sg_alloc_table_chained(&req->metadata_sgl->sg_table,
1562 blk_rq_count_integrity_sg(rq->q, rq->bio),
1563 req->metadata_sgl->sg_table.sgl,
1564 NVME_INLINE_METADATA_SG_CNT);
1565 if (unlikely(ret)) {
1566 ret = -ENOMEM;
1567 goto out_unmap_sg;
1568 }
1569
1570 req->metadata_sgl->nents = blk_rq_map_integrity_sg(rq->q,
1571 rq->bio, req->metadata_sgl->sg_table.sgl);
1572 pi_count = ib_dma_map_sg(ibdev,
1573 req->metadata_sgl->sg_table.sgl,
1574 req->metadata_sgl->nents,
1575 rq_dma_dir(rq));
1576 if (unlikely(pi_count <= 0)) {
1577 ret = -EIO;
1578 goto out_free_pi_table;
1579 }
1580 }
1581
1582 if (req->use_sig_mr) {
1583 ret = nvme_rdma_map_sg_pi(queue, req, c, count, pi_count);
1584 goto out;
1585 }
1586
Steve Wise64a741c2018-06-20 07:15:05 -07001587 if (count <= dev->num_inline_segments) {
Christoph Hellwigb131c612017-01-13 12:29:12 +01001588 if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
Steve Wise64a741c2018-06-20 07:15:05 -07001589 queue->ctrl->use_inline_data &&
Christoph Hellwigb131c612017-01-13 12:29:12 +01001590 blk_rq_payload_bytes(rq) <=
Max Gurtovoy94423a82018-06-10 16:58:29 +03001591 nvme_rdma_inline_data_size(queue)) {
Steve Wise64a741c2018-06-20 07:15:05 -07001592 ret = nvme_rdma_map_sg_inline(queue, req, c, count);
Max Gurtovoy94423a82018-06-10 16:58:29 +03001593 goto out;
1594 }
Christoph Hellwig71102302016-07-06 21:55:52 +09001595
Steve Wise64a741c2018-06-20 07:15:05 -07001596 if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
Max Gurtovoy94423a82018-06-10 16:58:29 +03001597 ret = nvme_rdma_map_sg_single(queue, req, c);
1598 goto out;
1599 }
Christoph Hellwig71102302016-07-06 21:55:52 +09001600 }
1601
Max Gurtovoy94423a82018-06-10 16:58:29 +03001602 ret = nvme_rdma_map_sg_fr(queue, req, c, count);
1603out:
1604 if (unlikely(ret))
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +03001605 goto out_unmap_pi_sg;
Max Gurtovoy94423a82018-06-10 16:58:29 +03001606
1607 return 0;
1608
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +03001609out_unmap_pi_sg:
1610 if (blk_integrity_rq(rq))
1611 ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl,
1612 req->metadata_sgl->nents, rq_dma_dir(rq));
1613out_free_pi_table:
1614 if (blk_integrity_rq(rq))
1615 sg_free_table_chained(&req->metadata_sgl->sg_table,
1616 NVME_INLINE_METADATA_SG_CNT);
Max Gurtovoy94423a82018-06-10 16:58:29 +03001617out_unmap_sg:
Israel Rukshin324d9e72020-05-19 17:05:55 +03001618 ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents,
1619 rq_dma_dir(rq));
Max Gurtovoy94423a82018-06-10 16:58:29 +03001620out_free_table:
Israel Rukshin324d9e72020-05-19 17:05:55 +03001621 sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT);
Max Gurtovoy94423a82018-06-10 16:58:29 +03001622 return ret;
Christoph Hellwig71102302016-07-06 21:55:52 +09001623}
1624
1625static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
1626{
Sagi Grimberg4af7f7f2017-11-23 17:35:22 +02001627 struct nvme_rdma_qe *qe =
1628 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1629 struct nvme_rdma_request *req =
1630 container_of(qe, struct nvme_rdma_request, sqe);
Sagi Grimberg4af7f7f2017-11-23 17:35:22 +02001631
Christoph Hellwig84465462020-06-11 08:44:51 +02001632 if (unlikely(wc->status != IB_WC_SUCCESS))
Christoph Hellwig71102302016-07-06 21:55:52 +09001633 nvme_rdma_wr_error(cq, wc, "SEND");
Christoph Hellwig84465462020-06-11 08:44:51 +02001634 else
1635 nvme_rdma_end_request(req);
Christoph Hellwig71102302016-07-06 21:55:52 +09001636}
1637
1638static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
1639 struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
Sagi Grimbergb4b591c2017-11-23 17:35:21 +02001640 struct ib_send_wr *first)
Christoph Hellwig71102302016-07-06 21:55:52 +09001641{
Bart Van Assche45e3cc1a2018-07-18 09:25:23 -07001642 struct ib_send_wr wr;
Christoph Hellwig71102302016-07-06 21:55:52 +09001643 int ret;
1644
1645 sge->addr = qe->dma;
Israel Rukshina62315b2020-03-31 15:46:33 +03001646 sge->length = sizeof(struct nvme_command);
Christoph Hellwig71102302016-07-06 21:55:52 +09001647 sge->lkey = queue->device->pd->local_dma_lkey;
1648
Christoph Hellwig71102302016-07-06 21:55:52 +09001649 wr.next = NULL;
1650 wr.wr_cqe = &qe->cqe;
1651 wr.sg_list = sge;
1652 wr.num_sge = num_sge;
1653 wr.opcode = IB_WR_SEND;
Sagi Grimbergb4b591c2017-11-23 17:35:21 +02001654 wr.send_flags = IB_SEND_SIGNALED;
Christoph Hellwig71102302016-07-06 21:55:52 +09001655
1656 if (first)
1657 first->next = &wr;
1658 else
1659 first = &wr;
1660
Bart Van Assche45e3cc1a2018-07-18 09:25:23 -07001661 ret = ib_post_send(queue->qp, first, NULL);
Max Gurtovoya7b7c7a2017-08-14 15:29:26 +03001662 if (unlikely(ret)) {
Christoph Hellwig71102302016-07-06 21:55:52 +09001663 dev_err(queue->ctrl->ctrl.device,
1664 "%s failed with error code %d\n", __func__, ret);
1665 }
1666 return ret;
1667}
1668
1669static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
1670 struct nvme_rdma_qe *qe)
1671{
Bart Van Assche45e3cc1a2018-07-18 09:25:23 -07001672 struct ib_recv_wr wr;
Christoph Hellwig71102302016-07-06 21:55:52 +09001673 struct ib_sge list;
1674 int ret;
1675
1676 list.addr = qe->dma;
1677 list.length = sizeof(struct nvme_completion);
1678 list.lkey = queue->device->pd->local_dma_lkey;
1679
1680 qe->cqe.done = nvme_rdma_recv_done;
1681
1682 wr.next = NULL;
1683 wr.wr_cqe = &qe->cqe;
1684 wr.sg_list = &list;
1685 wr.num_sge = 1;
1686
Bart Van Assche45e3cc1a2018-07-18 09:25:23 -07001687 ret = ib_post_recv(queue->qp, &wr, NULL);
Max Gurtovoya7b7c7a2017-08-14 15:29:26 +03001688 if (unlikely(ret)) {
Christoph Hellwig71102302016-07-06 21:55:52 +09001689 dev_err(queue->ctrl->ctrl.device,
1690 "%s failed with error code %d\n", __func__, ret);
1691 }
1692 return ret;
1693}
1694
1695static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
1696{
1697 u32 queue_idx = nvme_rdma_queue_idx(queue);
1698
1699 if (queue_idx == 0)
1700 return queue->ctrl->admin_tag_set.tags[queue_idx];
1701 return queue->ctrl->tag_set.tags[queue_idx - 1];
1702}
1703
Sagi Grimbergb4b591c2017-11-23 17:35:21 +02001704static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc)
1705{
1706 if (unlikely(wc->status != IB_WC_SUCCESS))
1707 nvme_rdma_wr_error(cq, wc, "ASYNC");
1708}
1709
Keith Buschad22c352017-11-07 15:13:12 -07001710static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg)
Christoph Hellwig71102302016-07-06 21:55:52 +09001711{
1712 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
1713 struct nvme_rdma_queue *queue = &ctrl->queues[0];
1714 struct ib_device *dev = queue->device->dev;
1715 struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
1716 struct nvme_command *cmd = sqe->data;
1717 struct ib_sge sge;
1718 int ret;
1719
Christoph Hellwig71102302016-07-06 21:55:52 +09001720 ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
1721
1722 memset(cmd, 0, sizeof(*cmd));
1723 cmd->common.opcode = nvme_admin_async_event;
Keith Busch38dabe22017-11-07 15:13:10 -07001724 cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH;
Christoph Hellwig71102302016-07-06 21:55:52 +09001725 cmd->common.flags |= NVME_CMD_SGL_METABUF;
1726 nvme_rdma_set_sg_null(cmd);
1727
Sagi Grimbergb4b591c2017-11-23 17:35:21 +02001728 sqe->cqe.done = nvme_rdma_async_done;
1729
Christoph Hellwig71102302016-07-06 21:55:52 +09001730 ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
1731 DMA_TO_DEVICE);
1732
Sagi Grimbergb4b591c2017-11-23 17:35:21 +02001733 ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL);
Christoph Hellwig71102302016-07-06 21:55:52 +09001734 WARN_ON_ONCE(ret);
1735}
1736
Jens Axboe1052b8a2018-11-26 08:21:49 -07001737static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
1738 struct nvme_completion *cqe, struct ib_wc *wc)
Christoph Hellwig71102302016-07-06 21:55:52 +09001739{
Christoph Hellwig71102302016-07-06 21:55:52 +09001740 struct request *rq;
1741 struct nvme_rdma_request *req;
Christoph Hellwig71102302016-07-06 21:55:52 +09001742
Sagi Grimberge7006de2021-06-16 14:19:36 -07001743 rq = nvme_find_rq(nvme_rdma_tagset(queue), cqe->command_id);
Christoph Hellwig71102302016-07-06 21:55:52 +09001744 if (!rq) {
1745 dev_err(queue->ctrl->ctrl.device,
Sagi Grimberge7006de2021-06-16 14:19:36 -07001746 "got bad command_id %#x on QP %#x\n",
Christoph Hellwig71102302016-07-06 21:55:52 +09001747 cqe->command_id, queue->qp->qp_num);
1748 nvme_rdma_error_recovery(queue->ctrl);
Jens Axboe1052b8a2018-11-26 08:21:49 -07001749 return;
Christoph Hellwig71102302016-07-06 21:55:52 +09001750 }
1751 req = blk_mq_rq_to_pdu(rq);
1752
Sagi Grimberg4af7f7f2017-11-23 17:35:22 +02001753 req->status = cqe->status;
1754 req->result = cqe->result;
Christoph Hellwig71102302016-07-06 21:55:52 +09001755
Sagi Grimberg3ef02792017-11-23 17:35:24 +02001756 if (wc->wc_flags & IB_WC_WITH_INVALIDATE) {
Chao Lenga87da502020-10-12 16:55:37 +08001757 if (unlikely(!req->mr ||
1758 wc->ex.invalidate_rkey != req->mr->rkey)) {
Sagi Grimberg3ef02792017-11-23 17:35:24 +02001759 dev_err(queue->ctrl->ctrl.device,
1760 "Bogus remote invalidation for rkey %#x\n",
Chao Lenga87da502020-10-12 16:55:37 +08001761 req->mr ? req->mr->rkey : 0);
Sagi Grimberg3ef02792017-11-23 17:35:24 +02001762 nvme_rdma_error_recovery(queue->ctrl);
1763 }
Israel Rukshinf41725b2017-11-26 10:40:55 +00001764 } else if (req->mr) {
Jens Axboe1052b8a2018-11-26 08:21:49 -07001765 int ret;
1766
Sagi Grimberg2f122e42017-11-23 17:35:23 +02001767 ret = nvme_rdma_inv_rkey(queue, req);
1768 if (unlikely(ret < 0)) {
1769 dev_err(queue->ctrl->ctrl.device,
1770 "Queueing INV WR for rkey %#x failed (%d)\n",
1771 req->mr->rkey, ret);
1772 nvme_rdma_error_recovery(queue->ctrl);
1773 }
1774 /* the local invalidation completion will end the request */
Christoph Hellwig7a804c32020-06-23 18:22:39 +02001775 return;
Sagi Grimberg2f122e42017-11-23 17:35:23 +02001776 }
Christoph Hellwig7a804c32020-06-23 18:22:39 +02001777
1778 nvme_rdma_end_request(req);
Christoph Hellwig71102302016-07-06 21:55:52 +09001779}
1780
Jens Axboe1052b8a2018-11-26 08:21:49 -07001781static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
Christoph Hellwig71102302016-07-06 21:55:52 +09001782{
1783 struct nvme_rdma_qe *qe =
1784 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
Yamin Friedman287f3292020-07-13 11:53:29 +03001785 struct nvme_rdma_queue *queue = wc->qp->qp_context;
Christoph Hellwig71102302016-07-06 21:55:52 +09001786 struct ib_device *ibdev = queue->device->dev;
1787 struct nvme_completion *cqe = qe->data;
1788 const size_t len = sizeof(struct nvme_completion);
Christoph Hellwig71102302016-07-06 21:55:52 +09001789
1790 if (unlikely(wc->status != IB_WC_SUCCESS)) {
1791 nvme_rdma_wr_error(cq, wc, "RECV");
Jens Axboe1052b8a2018-11-26 08:21:49 -07001792 return;
Christoph Hellwig71102302016-07-06 21:55:52 +09001793 }
1794
zhenwei pi25c1ca62020-10-25 19:51:24 +08001795 /* sanity checking for received data length */
1796 if (unlikely(wc->byte_len < len)) {
1797 dev_err(queue->ctrl->ctrl.device,
1798 "Unexpected nvme completion length(%d)\n", wc->byte_len);
1799 nvme_rdma_error_recovery(queue->ctrl);
1800 return;
1801 }
1802
Christoph Hellwig71102302016-07-06 21:55:52 +09001803 ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1804 /*
1805 * AEN requests are special as they don't time out and can
1806 * survive any kind of queue freeze and often don't respond to
1807 * aborts. We don't even bother to allocate a struct request
1808 * for them but rather special case them here.
1809 */
Israel Rukshin58a8df62019-10-13 19:57:31 +03001810 if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue),
1811 cqe->command_id)))
Christoph Hellwig7bf58532016-11-10 07:32:34 -08001812 nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
1813 &cqe->result);
Christoph Hellwig71102302016-07-06 21:55:52 +09001814 else
Jens Axboe1052b8a2018-11-26 08:21:49 -07001815 nvme_rdma_process_nvme_rsp(queue, cqe, wc);
Christoph Hellwig71102302016-07-06 21:55:52 +09001816 ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1817
1818 nvme_rdma_post_recv(queue, qe);
Christoph Hellwig71102302016-07-06 21:55:52 +09001819}
1820
1821static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
1822{
1823 int ret, i;
1824
1825 for (i = 0; i < queue->queue_size; i++) {
1826 ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
1827 if (ret)
Ruozhu Li9817d762021-09-06 11:51:34 +08001828 return ret;
Christoph Hellwig71102302016-07-06 21:55:52 +09001829 }
1830
1831 return 0;
Christoph Hellwig71102302016-07-06 21:55:52 +09001832}
1833
1834static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
1835 struct rdma_cm_event *ev)
1836{
Steve Wise7f039532016-10-26 12:36:47 -07001837 struct rdma_cm_id *cm_id = queue->cm_id;
1838 int status = ev->status;
1839 const char *rej_msg;
1840 const struct nvme_rdma_cm_rej *rej_data;
1841 u8 rej_data_len;
1842
1843 rej_msg = rdma_reject_msg(cm_id, status);
1844 rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
1845
1846 if (rej_data && rej_data_len >= sizeof(u16)) {
1847 u16 sts = le16_to_cpu(rej_data->sts);
Christoph Hellwig71102302016-07-06 21:55:52 +09001848
1849 dev_err(queue->ctrl->ctrl.device,
Steve Wise7f039532016-10-26 12:36:47 -07001850 "Connect rejected: status %d (%s) nvme status %d (%s).\n",
1851 status, rej_msg, sts, nvme_rdma_cm_msg(sts));
Christoph Hellwig71102302016-07-06 21:55:52 +09001852 } else {
1853 dev_err(queue->ctrl->ctrl.device,
Steve Wise7f039532016-10-26 12:36:47 -07001854 "Connect rejected: status %d (%s).\n", status, rej_msg);
Christoph Hellwig71102302016-07-06 21:55:52 +09001855 }
1856
1857 return -ECONNRESET;
1858}
1859
1860static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
1861{
Israel Rukshine63440d2019-08-18 12:08:52 +03001862 struct nvme_ctrl *ctrl = &queue->ctrl->ctrl;
Christoph Hellwig71102302016-07-06 21:55:52 +09001863 int ret;
1864
Sagi Grimbergca6e95b2017-05-04 13:33:09 +03001865 ret = nvme_rdma_create_queue_ib(queue);
1866 if (ret)
1867 return ret;
Christoph Hellwig71102302016-07-06 21:55:52 +09001868
Israel Rukshine63440d2019-08-18 12:08:52 +03001869 if (ctrl->opts->tos >= 0)
1870 rdma_set_service_type(queue->cm_id, ctrl->opts->tos);
Christoph Hellwig71102302016-07-06 21:55:52 +09001871 ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS);
1872 if (ret) {
Israel Rukshine63440d2019-08-18 12:08:52 +03001873 dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n",
Christoph Hellwig71102302016-07-06 21:55:52 +09001874 queue->cm_error);
1875 goto out_destroy_queue;
1876 }
1877
1878 return 0;
1879
1880out_destroy_queue:
1881 nvme_rdma_destroy_queue_ib(queue);
Christoph Hellwig71102302016-07-06 21:55:52 +09001882 return ret;
1883}
1884
1885static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
1886{
1887 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1888 struct rdma_conn_param param = { };
Roland Dreier0b857b42016-07-31 00:27:39 -07001889 struct nvme_rdma_cm_req priv = { };
Christoph Hellwig71102302016-07-06 21:55:52 +09001890 int ret;
1891
1892 param.qp_num = queue->qp->qp_num;
1893 param.flow_control = 1;
1894
1895 param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
Sagi Grimberg2ac17c22016-06-22 15:06:00 +03001896 /* maximum retry count */
1897 param.retry_count = 7;
Christoph Hellwig71102302016-07-06 21:55:52 +09001898 param.rnr_retry_count = 7;
1899 param.private_data = &priv;
1900 param.private_data_len = sizeof(priv);
1901
1902 priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
1903 priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
Jay Freyenseef994d9d2016-08-17 15:00:26 -07001904 /*
1905 * set the admin queue depth to the minimum size
1906 * specified by the Fabrics standard.
1907 */
1908 if (priv.qid == 0) {
Sagi Grimberg7aa1f422017-06-18 16:15:59 +03001909 priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH);
1910 priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1);
Jay Freyenseef994d9d2016-08-17 15:00:26 -07001911 } else {
Jay Freyenseec5af8652016-08-17 15:00:27 -07001912 /*
1913 * current interpretation of the fabrics spec
1914 * is at minimum you make hrqsize sqsize+1, or a
1915 * 1's based representation of sqsize.
1916 */
Jay Freyenseef994d9d2016-08-17 15:00:26 -07001917 priv.hrqsize = cpu_to_le16(queue->queue_size);
Jay Freyenseec5af8652016-08-17 15:00:27 -07001918 priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
Jay Freyenseef994d9d2016-08-17 15:00:26 -07001919 }
Christoph Hellwig71102302016-07-06 21:55:52 +09001920
Jason Gunthorpe071ba4c2020-10-26 11:25:49 -03001921 ret = rdma_connect_locked(queue->cm_id, &param);
Christoph Hellwig71102302016-07-06 21:55:52 +09001922 if (ret) {
1923 dev_err(ctrl->ctrl.device,
Jason Gunthorpe071ba4c2020-10-26 11:25:49 -03001924 "rdma_connect_locked failed (%d).\n", ret);
Ruozhu Li9817d762021-09-06 11:51:34 +08001925 return ret;
Christoph Hellwig71102302016-07-06 21:55:52 +09001926 }
1927
1928 return 0;
Christoph Hellwig71102302016-07-06 21:55:52 +09001929}
1930
Christoph Hellwig71102302016-07-06 21:55:52 +09001931static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
1932 struct rdma_cm_event *ev)
1933{
1934 struct nvme_rdma_queue *queue = cm_id->context;
1935 int cm_error = 0;
1936
1937 dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
1938 rdma_event_msg(ev->event), ev->event,
1939 ev->status, cm_id);
1940
1941 switch (ev->event) {
1942 case RDMA_CM_EVENT_ADDR_RESOLVED:
1943 cm_error = nvme_rdma_addr_resolved(queue);
1944 break;
1945 case RDMA_CM_EVENT_ROUTE_RESOLVED:
1946 cm_error = nvme_rdma_route_resolved(queue);
1947 break;
1948 case RDMA_CM_EVENT_ESTABLISHED:
1949 queue->cm_error = nvme_rdma_conn_established(queue);
1950 /* complete cm_done regardless of success/failure */
1951 complete(&queue->cm_done);
1952 return 0;
1953 case RDMA_CM_EVENT_REJECTED:
1954 cm_error = nvme_rdma_conn_rejected(queue, ev);
1955 break;
Christoph Hellwig71102302016-07-06 21:55:52 +09001956 case RDMA_CM_EVENT_ROUTE_ERROR:
1957 case RDMA_CM_EVENT_CONNECT_ERROR:
1958 case RDMA_CM_EVENT_UNREACHABLE:
Sagi Grimbergabf87d52017-05-04 13:33:10 +03001959 case RDMA_CM_EVENT_ADDR_ERROR:
Christoph Hellwig71102302016-07-06 21:55:52 +09001960 dev_dbg(queue->ctrl->ctrl.device,
1961 "CM error event %d\n", ev->event);
1962 cm_error = -ECONNRESET;
1963 break;
1964 case RDMA_CM_EVENT_DISCONNECTED:
1965 case RDMA_CM_EVENT_ADDR_CHANGE:
1966 case RDMA_CM_EVENT_TIMEWAIT_EXIT:
1967 dev_dbg(queue->ctrl->ctrl.device,
1968 "disconnect received - connection closed\n");
1969 nvme_rdma_error_recovery(queue->ctrl);
1970 break;
1971 case RDMA_CM_EVENT_DEVICE_REMOVAL:
Steve Wisee87a9112016-09-02 09:01:54 -07001972 /* device removal is handled via the ib_client API */
1973 break;
Christoph Hellwig71102302016-07-06 21:55:52 +09001974 default:
1975 dev_err(queue->ctrl->ctrl.device,
1976 "Unexpected RDMA CM event (%d)\n", ev->event);
1977 nvme_rdma_error_recovery(queue->ctrl);
1978 break;
1979 }
1980
1981 if (cm_error) {
1982 queue->cm_error = cm_error;
1983 complete(&queue->cm_done);
1984 }
1985
1986 return 0;
1987}
1988
Sagi Grimberg0475a8d2020-07-29 02:36:03 -07001989static void nvme_rdma_complete_timed_out(struct request *rq)
1990{
1991 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1992 struct nvme_rdma_queue *queue = req->queue;
Sagi Grimberg0475a8d2020-07-29 02:36:03 -07001993
Sagi Grimberg0475a8d2020-07-29 02:36:03 -07001994 nvme_rdma_stop_queue(queue);
Sagi Grimbergfdf58e02020-10-22 10:15:23 +08001995 if (blk_mq_request_started(rq) && !blk_mq_request_completed(rq)) {
Sagi Grimberg0475a8d2020-07-29 02:36:03 -07001996 nvme_req(rq)->status = NVME_SC_HOST_ABORTED_CMD;
1997 blk_mq_complete_request(rq);
1998 }
Sagi Grimberg0475a8d2020-07-29 02:36:03 -07001999}
2000
Christoph Hellwig71102302016-07-06 21:55:52 +09002001static enum blk_eh_timer_return
2002nvme_rdma_timeout(struct request *rq, bool reserved)
2003{
2004 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
Sagi Grimberg4c174e62019-01-08 00:53:22 -08002005 struct nvme_rdma_queue *queue = req->queue;
2006 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
Christoph Hellwig71102302016-07-06 21:55:52 +09002007
Sagi Grimberg4c174e62019-01-08 00:53:22 -08002008 dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n",
2009 rq->tag, nvme_rdma_queue_idx(queue));
Nitzan Carmie62a5382017-10-22 09:37:04 +00002010
Sagi Grimberg4c174e62019-01-08 00:53:22 -08002011 if (ctrl->ctrl.state != NVME_CTRL_LIVE) {
2012 /*
Sagi Grimberg0475a8d2020-07-29 02:36:03 -07002013 * If we are resetting, connecting or deleting we should
2014 * complete immediately because we may block controller
2015 * teardown or setup sequence
2016 * - ctrl disable/shutdown fabrics requests
2017 * - connect requests
2018 * - initialization admin requests
2019 * - I/O requests that entered after unquiescing and
2020 * the controller stopped responding
2021 *
2022 * All other requests should be cancelled by the error
2023 * recovery work, so it's fine that we fail it here.
Sagi Grimberg4c174e62019-01-08 00:53:22 -08002024 */
Sagi Grimberg0475a8d2020-07-29 02:36:03 -07002025 nvme_rdma_complete_timed_out(rq);
Sagi Grimberg4c174e62019-01-08 00:53:22 -08002026 return BLK_EH_DONE;
2027 }
Christoph Hellwig71102302016-07-06 21:55:52 +09002028
Sagi Grimberg0475a8d2020-07-29 02:36:03 -07002029 /*
2030 * LIVE state should trigger the normal error recovery which will
2031 * handle completing this request.
2032 */
Sagi Grimberg4c174e62019-01-08 00:53:22 -08002033 nvme_rdma_error_recovery(ctrl);
Sagi Grimberg4c174e62019-01-08 00:53:22 -08002034 return BLK_EH_RESET_TIMER;
Christoph Hellwig71102302016-07-06 21:55:52 +09002035}
2036
Christoph Hellwigfc17b652017-06-03 09:38:05 +02002037static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
Christoph Hellwig71102302016-07-06 21:55:52 +09002038 const struct blk_mq_queue_data *bd)
2039{
2040 struct nvme_ns *ns = hctx->queue->queuedata;
2041 struct nvme_rdma_queue *queue = hctx->driver_data;
2042 struct request *rq = bd->rq;
2043 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
2044 struct nvme_rdma_qe *sqe = &req->sqe;
Keith Buschf4b9e6c2021-03-17 13:37:03 -07002045 struct nvme_command *c = nvme_req(rq)->cmd;
Christoph Hellwig71102302016-07-06 21:55:52 +09002046 struct ib_device *dev;
Christoph Hellwig3bc32bb2018-06-11 17:34:06 +02002047 bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags);
Christoph Hellwigfc17b652017-06-03 09:38:05 +02002048 blk_status_t ret;
2049 int err;
Christoph Hellwig71102302016-07-06 21:55:52 +09002050
2051 WARN_ON_ONCE(rq->tag < 0);
2052
Tao Chiua9715742021-04-26 10:53:10 +08002053 if (!nvme_check_ready(&queue->ctrl->ctrl, rq, queue_ready))
2054 return nvme_fail_nonready_command(&queue->ctrl->ctrl, rq);
Christoph Hellwig553cd9e2016-11-02 08:49:18 -06002055
Christoph Hellwig71102302016-07-06 21:55:52 +09002056 dev = queue->device->dev;
Max Gurtovoy62f99b62019-06-06 12:27:36 +03002057
2058 req->sqe.dma = ib_dma_map_single(dev, req->sqe.data,
2059 sizeof(struct nvme_command),
2060 DMA_TO_DEVICE);
2061 err = ib_dma_mapping_error(dev, req->sqe.dma);
2062 if (unlikely(err))
2063 return BLK_STS_RESOURCE;
2064
Christoph Hellwig71102302016-07-06 21:55:52 +09002065 ib_dma_sync_single_for_cpu(dev, sqe->dma,
2066 sizeof(struct nvme_command), DMA_TO_DEVICE);
2067
Keith Buschf4b9e6c2021-03-17 13:37:03 -07002068 ret = nvme_setup_cmd(ns, rq);
Christoph Hellwigfc17b652017-06-03 09:38:05 +02002069 if (ret)
Max Gurtovoy62f99b62019-06-06 12:27:36 +03002070 goto unmap_qe;
Christoph Hellwig71102302016-07-06 21:55:52 +09002071
Christoph Hellwig71102302016-07-06 21:55:52 +09002072 blk_mq_start_request(rq);
2073
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +03002074 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) &&
2075 queue->pi_support &&
2076 (c->common.opcode == nvme_cmd_write ||
2077 c->common.opcode == nvme_cmd_read) &&
2078 nvme_ns_has_pi(ns))
2079 req->use_sig_mr = true;
2080 else
2081 req->use_sig_mr = false;
2082
Christoph Hellwigfc17b652017-06-03 09:38:05 +02002083 err = nvme_rdma_map_data(queue, rq, c);
Max Gurtovoya7b7c7a2017-08-14 15:29:26 +03002084 if (unlikely(err < 0)) {
Christoph Hellwig71102302016-07-06 21:55:52 +09002085 dev_err(queue->ctrl->ctrl.device,
Christoph Hellwigfc17b652017-06-03 09:38:05 +02002086 "Failed to map data (%d)\n", err);
Christoph Hellwig71102302016-07-06 21:55:52 +09002087 goto err;
2088 }
2089
Sagi Grimbergb4b591c2017-11-23 17:35:21 +02002090 sqe->cqe.done = nvme_rdma_send_done;
2091
Christoph Hellwig71102302016-07-06 21:55:52 +09002092 ib_dma_sync_single_for_device(dev, sqe->dma,
2093 sizeof(struct nvme_command), DMA_TO_DEVICE);
2094
Christoph Hellwigfc17b652017-06-03 09:38:05 +02002095 err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
Israel Rukshinf41725b2017-11-26 10:40:55 +00002096 req->mr ? &req->reg_wr.wr : NULL);
Max Gurtovoy16686f32019-10-13 19:57:36 +03002097 if (unlikely(err))
2098 goto err_unmap;
Christoph Hellwig71102302016-07-06 21:55:52 +09002099
Christoph Hellwigfc17b652017-06-03 09:38:05 +02002100 return BLK_STS_OK;
Max Gurtovoy62f99b62019-06-06 12:27:36 +03002101
Max Gurtovoy16686f32019-10-13 19:57:36 +03002102err_unmap:
2103 nvme_rdma_unmap_data(queue, rq);
Christoph Hellwig71102302016-07-06 21:55:52 +09002104err:
Chao Leng62eca392021-02-01 11:49:40 +08002105 if (err == -EIO)
2106 ret = nvme_host_path_error(rq);
2107 else if (err == -ENOMEM || err == -EAGAIN)
Max Gurtovoy62f99b62019-06-06 12:27:36 +03002108 ret = BLK_STS_RESOURCE;
2109 else
2110 ret = BLK_STS_IOERR;
Max Gurtovoy16686f32019-10-13 19:57:36 +03002111 nvme_cleanup_cmd(rq);
Max Gurtovoy62f99b62019-06-06 12:27:36 +03002112unmap_qe:
2113 ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command),
2114 DMA_TO_DEVICE);
2115 return ret;
Christoph Hellwig71102302016-07-06 21:55:52 +09002116}
2117
Jens Axboe5a72e892021-10-12 09:24:29 -06002118static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, struct io_comp_batch *iob)
Sagi Grimbergff8519f2018-12-14 11:06:10 -08002119{
2120 struct nvme_rdma_queue *queue = hctx->driver_data;
2121
2122 return ib_process_cq_direct(queue->ib_cq, -1);
2123}
2124
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +03002125static void nvme_rdma_check_pi_status(struct nvme_rdma_request *req)
2126{
2127 struct request *rq = blk_mq_rq_from_pdu(req);
2128 struct ib_mr_status mr_status;
2129 int ret;
2130
2131 ret = ib_check_mr_status(req->mr, IB_MR_CHECK_SIG_STATUS, &mr_status);
2132 if (ret) {
2133 pr_err("ib_check_mr_status failed, ret %d\n", ret);
2134 nvme_req(rq)->status = NVME_SC_INVALID_PI;
2135 return;
2136 }
2137
2138 if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) {
2139 switch (mr_status.sig_err.err_type) {
2140 case IB_SIG_BAD_GUARD:
2141 nvme_req(rq)->status = NVME_SC_GUARD_CHECK;
2142 break;
2143 case IB_SIG_BAD_REFTAG:
2144 nvme_req(rq)->status = NVME_SC_REFTAG_CHECK;
2145 break;
2146 case IB_SIG_BAD_APPTAG:
2147 nvme_req(rq)->status = NVME_SC_APPTAG_CHECK;
2148 break;
2149 }
2150 pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n",
2151 mr_status.sig_err.err_type, mr_status.sig_err.expected,
2152 mr_status.sig_err.actual);
2153 }
2154}
2155
Christoph Hellwig71102302016-07-06 21:55:52 +09002156static void nvme_rdma_complete_rq(struct request *rq)
2157{
2158 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
Max Gurtovoy62f99b62019-06-06 12:27:36 +03002159 struct nvme_rdma_queue *queue = req->queue;
2160 struct ib_device *ibdev = queue->device->dev;
Christoph Hellwig71102302016-07-06 21:55:52 +09002161
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +03002162 if (req->use_sig_mr)
2163 nvme_rdma_check_pi_status(req);
2164
Max Gurtovoy62f99b62019-06-06 12:27:36 +03002165 nvme_rdma_unmap_data(queue, rq);
2166 ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command),
2167 DMA_TO_DEVICE);
Christoph Hellwig77f02a72017-03-30 13:41:32 +02002168 nvme_complete_rq(rq);
Christoph Hellwig71102302016-07-06 21:55:52 +09002169}
2170
Sagi Grimberg0b366582017-07-13 11:09:44 +03002171static int nvme_rdma_map_queues(struct blk_mq_tag_set *set)
2172{
2173 struct nvme_rdma_ctrl *ctrl = set->driver_data;
Sagi Grimberg5651cd32019-05-28 22:49:04 -07002174 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
Sagi Grimberg0b366582017-07-13 11:09:44 +03002175
Sagi Grimberg5651cd32019-05-28 22:49:04 -07002176 if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) {
Sagi Grimbergb65bb772018-12-11 23:38:58 -08002177 /* separate read/write queues */
Sagi Grimberg5651cd32019-05-28 22:49:04 -07002178 set->map[HCTX_TYPE_DEFAULT].nr_queues =
2179 ctrl->io_queues[HCTX_TYPE_DEFAULT];
2180 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
2181 set->map[HCTX_TYPE_READ].nr_queues =
2182 ctrl->io_queues[HCTX_TYPE_READ];
Sagi Grimbergb65bb772018-12-11 23:38:58 -08002183 set->map[HCTX_TYPE_READ].queue_offset =
Sagi Grimberg5651cd32019-05-28 22:49:04 -07002184 ctrl->io_queues[HCTX_TYPE_DEFAULT];
Sagi Grimbergb65bb772018-12-11 23:38:58 -08002185 } else {
Sagi Grimberg5651cd32019-05-28 22:49:04 -07002186 /* shared read/write queues */
2187 set->map[HCTX_TYPE_DEFAULT].nr_queues =
2188 ctrl->io_queues[HCTX_TYPE_DEFAULT];
2189 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
2190 set->map[HCTX_TYPE_READ].nr_queues =
2191 ctrl->io_queues[HCTX_TYPE_DEFAULT];
Sagi Grimbergb65bb772018-12-11 23:38:58 -08002192 set->map[HCTX_TYPE_READ].queue_offset = 0;
2193 }
2194 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT],
2195 ctrl->device->dev, 0);
2196 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ],
2197 ctrl->device->dev, 0);
Sagi Grimbergff8519f2018-12-14 11:06:10 -08002198
Sagi Grimberg5651cd32019-05-28 22:49:04 -07002199 if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) {
2200 /* map dedicated poll queues only if we have queues left */
Sagi Grimbergff8519f2018-12-14 11:06:10 -08002201 set->map[HCTX_TYPE_POLL].nr_queues =
Sagi Grimbergb1064d32019-01-18 16:43:24 -08002202 ctrl->io_queues[HCTX_TYPE_POLL];
Sagi Grimbergff8519f2018-12-14 11:06:10 -08002203 set->map[HCTX_TYPE_POLL].queue_offset =
Sagi Grimberg5651cd32019-05-28 22:49:04 -07002204 ctrl->io_queues[HCTX_TYPE_DEFAULT] +
2205 ctrl->io_queues[HCTX_TYPE_READ];
Sagi Grimbergff8519f2018-12-14 11:06:10 -08002206 blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]);
2207 }
Sagi Grimberg5651cd32019-05-28 22:49:04 -07002208
2209 dev_info(ctrl->ctrl.device,
2210 "mapped %d/%d/%d default/read/poll queues.\n",
2211 ctrl->io_queues[HCTX_TYPE_DEFAULT],
2212 ctrl->io_queues[HCTX_TYPE_READ],
2213 ctrl->io_queues[HCTX_TYPE_POLL]);
2214
Sagi Grimbergb65bb772018-12-11 23:38:58 -08002215 return 0;
Sagi Grimberg0b366582017-07-13 11:09:44 +03002216}
2217
Eric Biggersf363b082017-03-30 13:39:16 -07002218static const struct blk_mq_ops nvme_rdma_mq_ops = {
Christoph Hellwig71102302016-07-06 21:55:52 +09002219 .queue_rq = nvme_rdma_queue_rq,
2220 .complete = nvme_rdma_complete_rq,
Christoph Hellwig71102302016-07-06 21:55:52 +09002221 .init_request = nvme_rdma_init_request,
2222 .exit_request = nvme_rdma_exit_request,
Christoph Hellwig71102302016-07-06 21:55:52 +09002223 .init_hctx = nvme_rdma_init_hctx,
Christoph Hellwig71102302016-07-06 21:55:52 +09002224 .timeout = nvme_rdma_timeout,
Sagi Grimberg0b366582017-07-13 11:09:44 +03002225 .map_queues = nvme_rdma_map_queues,
Sagi Grimbergff8519f2018-12-14 11:06:10 -08002226 .poll = nvme_rdma_poll,
Christoph Hellwig71102302016-07-06 21:55:52 +09002227};
2228
Eric Biggersf363b082017-03-30 13:39:16 -07002229static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
Christoph Hellwig71102302016-07-06 21:55:52 +09002230 .queue_rq = nvme_rdma_queue_rq,
2231 .complete = nvme_rdma_complete_rq,
Christoph Hellwig385475e2017-06-13 09:15:19 +02002232 .init_request = nvme_rdma_init_request,
2233 .exit_request = nvme_rdma_exit_request,
Christoph Hellwig71102302016-07-06 21:55:52 +09002234 .init_hctx = nvme_rdma_init_admin_hctx,
2235 .timeout = nvme_rdma_timeout,
2236};
2237
Sagi Grimberg18398af2017-07-10 09:22:31 +03002238static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
Christoph Hellwig71102302016-07-06 21:55:52 +09002239{
Sagi Grimberg794a4cb2019-01-01 00:19:30 -08002240 cancel_work_sync(&ctrl->err_work);
2241 cancel_delayed_work_sync(&ctrl->reconnect_work);
2242
Sagi Grimberg75862c72018-07-09 12:49:07 +03002243 nvme_rdma_teardown_io_queues(ctrl, shutdown);
Ming Lei6ca1d902021-10-14 16:17:06 +08002244 nvme_stop_admin_queue(&ctrl->ctrl);
Sagi Grimberg18398af2017-07-10 09:22:31 +03002245 if (shutdown)
Christoph Hellwig71102302016-07-06 21:55:52 +09002246 nvme_shutdown_ctrl(&ctrl->ctrl);
Sagi Grimberg18398af2017-07-10 09:22:31 +03002247 else
Sagi Grimbergb5b05042019-07-22 17:06:54 -07002248 nvme_disable_ctrl(&ctrl->ctrl);
Sagi Grimberg75862c72018-07-09 12:49:07 +03002249 nvme_rdma_teardown_admin_queue(ctrl, shutdown);
Christoph Hellwig71102302016-07-06 21:55:52 +09002250}
2251
Christoph Hellwigc5017e82017-10-29 10:44:29 +02002252static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl)
Sagi Grimberg2461a8d2016-07-24 09:29:51 +03002253{
Christoph Hellwige9bc2582017-10-29 10:44:30 +02002254 nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true);
Christoph Hellwig71102302016-07-06 21:55:52 +09002255}
2256
Christoph Hellwig71102302016-07-06 21:55:52 +09002257static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
2258{
Christoph Hellwigd86c4d82017-06-15 15:41:08 +02002259 struct nvme_rdma_ctrl *ctrl =
2260 container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work);
Christoph Hellwig71102302016-07-06 21:55:52 +09002261
Sagi Grimbergd09f2b42017-07-02 10:56:43 +03002262 nvme_stop_ctrl(&ctrl->ctrl);
Sagi Grimberg18398af2017-07-10 09:22:31 +03002263 nvme_rdma_shutdown_ctrl(ctrl, false);
Christoph Hellwig71102302016-07-06 21:55:52 +09002264
Max Gurtovoyad6a0a52018-01-31 18:31:24 +02002265 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
Sagi Grimbergd5bf4b72017-12-21 14:54:15 +02002266 /* state change failure should never happen */
2267 WARN_ON_ONCE(1);
2268 return;
2269 }
2270
Sagi Grimbergc66e2992018-07-09 12:49:06 +03002271 if (nvme_rdma_setup_ctrl(ctrl, false))
Sagi Grimberg370ae6e2017-07-10 09:22:38 +03002272 goto out_fail;
Christoph Hellwig71102302016-07-06 21:55:52 +09002273
Christoph Hellwig71102302016-07-06 21:55:52 +09002274 return;
2275
Sagi Grimberg370ae6e2017-07-10 09:22:38 +03002276out_fail:
Nitzan Carmi8000d1f2018-01-17 11:01:14 +00002277 ++ctrl->ctrl.nr_reconnects;
2278 nvme_rdma_reconnect_or_remove(ctrl);
Christoph Hellwig71102302016-07-06 21:55:52 +09002279}
2280
Christoph Hellwig71102302016-07-06 21:55:52 +09002281static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
2282 .name = "rdma",
2283 .module = THIS_MODULE,
Max Gurtovoy5ec5d3b2020-05-19 17:05:56 +03002284 .flags = NVME_F_FABRICS | NVME_F_METADATA_SUPPORTED,
Christoph Hellwig71102302016-07-06 21:55:52 +09002285 .reg_read32 = nvmf_reg_read32,
2286 .reg_read64 = nvmf_reg_read64,
2287 .reg_write32 = nvmf_reg_write32,
Christoph Hellwig71102302016-07-06 21:55:52 +09002288 .free_ctrl = nvme_rdma_free_ctrl,
2289 .submit_async_event = nvme_rdma_submit_async_event,
Christoph Hellwigc5017e82017-10-29 10:44:29 +02002290 .delete_ctrl = nvme_rdma_delete_ctrl,
Christoph Hellwig71102302016-07-06 21:55:52 +09002291 .get_address = nvmf_get_address,
2292};
2293
James Smart36e835f2017-10-20 16:17:09 -07002294/*
2295 * Fails a connection request if it matches an existing controller
2296 * (association) with the same tuple:
2297 * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN>
2298 *
2299 * if local address is not specified in the request, it will match an
2300 * existing controller with all the other parameters the same and no
2301 * local port address specified as well.
2302 *
2303 * The ports don't need to be compared as they are intrinsically
2304 * already matched by the port pointers supplied.
2305 */
2306static bool
2307nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts)
2308{
2309 struct nvme_rdma_ctrl *ctrl;
2310 bool found = false;
2311
2312 mutex_lock(&nvme_rdma_ctrl_mutex);
2313 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
Sagi Grimbergb7c7be6f62018-10-18 17:40:40 -07002314 found = nvmf_ip_options_match(&ctrl->ctrl, opts);
James Smart36e835f2017-10-20 16:17:09 -07002315 if (found)
2316 break;
2317 }
2318 mutex_unlock(&nvme_rdma_ctrl_mutex);
2319
2320 return found;
2321}
2322
Christoph Hellwig71102302016-07-06 21:55:52 +09002323static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
2324 struct nvmf_ctrl_options *opts)
2325{
2326 struct nvme_rdma_ctrl *ctrl;
2327 int ret;
2328 bool changed;
2329
2330 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
2331 if (!ctrl)
2332 return ERR_PTR(-ENOMEM);
2333 ctrl->ctrl.opts = opts;
2334 INIT_LIST_HEAD(&ctrl->list);
2335
Sagi Grimbergbb59b8e2018-10-19 00:50:29 -07002336 if (!(opts->mask & NVMF_OPT_TRSVCID)) {
2337 opts->trsvcid =
2338 kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL);
2339 if (!opts->trsvcid) {
2340 ret = -ENOMEM;
2341 goto out_free_ctrl;
2342 }
2343 opts->mask |= NVMF_OPT_TRSVCID;
2344 }
Sagi Grimberg0928f9b2017-02-05 21:49:32 +02002345
2346 ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
Sagi Grimbergbb59b8e2018-10-19 00:50:29 -07002347 opts->traddr, opts->trsvcid, &ctrl->addr);
Christoph Hellwig71102302016-07-06 21:55:52 +09002348 if (ret) {
Sagi Grimbergbb59b8e2018-10-19 00:50:29 -07002349 pr_err("malformed address passed: %s:%s\n",
2350 opts->traddr, opts->trsvcid);
Christoph Hellwig71102302016-07-06 21:55:52 +09002351 goto out_free_ctrl;
2352 }
2353
Max Gurtovoy8f4e8da2017-02-19 20:08:03 +02002354 if (opts->mask & NVMF_OPT_HOST_TRADDR) {
Sagi Grimberg0928f9b2017-02-05 21:49:32 +02002355 ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
2356 opts->host_traddr, NULL, &ctrl->src_addr);
Max Gurtovoy8f4e8da2017-02-19 20:08:03 +02002357 if (ret) {
Sagi Grimberg0928f9b2017-02-05 21:49:32 +02002358 pr_err("malformed src address passed: %s\n",
Max Gurtovoy8f4e8da2017-02-19 20:08:03 +02002359 opts->host_traddr);
2360 goto out_free_ctrl;
2361 }
2362 }
2363
James Smart36e835f2017-10-20 16:17:09 -07002364 if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) {
2365 ret = -EALREADY;
2366 goto out_free_ctrl;
2367 }
2368
Christoph Hellwig71102302016-07-06 21:55:52 +09002369 INIT_DELAYED_WORK(&ctrl->reconnect_work,
2370 nvme_rdma_reconnect_ctrl_work);
2371 INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
Christoph Hellwigd86c4d82017-06-15 15:41:08 +02002372 INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work);
Christoph Hellwig71102302016-07-06 21:55:52 +09002373
Sagi Grimbergff8519f2018-12-14 11:06:10 -08002374 ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues +
2375 opts->nr_poll_queues + 1;
Jay Freyenseec5af8652016-08-17 15:00:27 -07002376 ctrl->ctrl.sqsize = opts->queue_size - 1;
Christoph Hellwig71102302016-07-06 21:55:52 +09002377 ctrl->ctrl.kato = opts->kato;
2378
2379 ret = -ENOMEM;
Sagi Grimbergd858e5f2017-04-24 10:58:29 +03002380 ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues),
Christoph Hellwig71102302016-07-06 21:55:52 +09002381 GFP_KERNEL);
2382 if (!ctrl->queues)
Sagi Grimberg3d064102018-06-19 15:34:09 +03002383 goto out_free_ctrl;
2384
2385 ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
2386 0 /* no quirks, we're perfect! */);
2387 if (ret)
2388 goto out_kfree_queues;
Christoph Hellwig71102302016-07-06 21:55:52 +09002389
Max Gurtovoyb754a322018-01-31 18:31:25 +02002390 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING);
2391 WARN_ON_ONCE(!changed);
2392
Sagi Grimbergc66e2992018-07-09 12:49:06 +03002393 ret = nvme_rdma_setup_ctrl(ctrl, true);
Christoph Hellwig71102302016-07-06 21:55:52 +09002394 if (ret)
Sagi Grimberg3d064102018-06-19 15:34:09 +03002395 goto out_uninit_ctrl;
Christoph Hellwig71102302016-07-06 21:55:52 +09002396
Sagi Grimberg0928f9b2017-02-05 21:49:32 +02002397 dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n",
Hannes Reineckee5ea42f2021-09-22 08:35:25 +02002398 nvmf_ctrl_subsysnqn(&ctrl->ctrl), &ctrl->addr);
Christoph Hellwig71102302016-07-06 21:55:52 +09002399
Christoph Hellwig71102302016-07-06 21:55:52 +09002400 mutex_lock(&nvme_rdma_ctrl_mutex);
2401 list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
2402 mutex_unlock(&nvme_rdma_ctrl_mutex);
2403
Christoph Hellwig71102302016-07-06 21:55:52 +09002404 return &ctrl->ctrl;
2405
Christoph Hellwig71102302016-07-06 21:55:52 +09002406out_uninit_ctrl:
2407 nvme_uninit_ctrl(&ctrl->ctrl);
2408 nvme_put_ctrl(&ctrl->ctrl);
2409 if (ret > 0)
2410 ret = -EIO;
2411 return ERR_PTR(ret);
Sagi Grimberg3d064102018-06-19 15:34:09 +03002412out_kfree_queues:
2413 kfree(ctrl->queues);
Christoph Hellwig71102302016-07-06 21:55:52 +09002414out_free_ctrl:
2415 kfree(ctrl);
2416 return ERR_PTR(ret);
2417}
2418
2419static struct nvmf_transport_ops nvme_rdma_transport = {
2420 .name = "rdma",
Roy Shterman0de5cd32017-12-25 14:18:30 +02002421 .module = THIS_MODULE,
Christoph Hellwig71102302016-07-06 21:55:52 +09002422 .required_opts = NVMF_OPT_TRADDR,
Max Gurtovoy8f4e8da2017-02-19 20:08:03 +02002423 .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
Sagi Grimbergb65bb772018-12-11 23:38:58 -08002424 NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO |
Israel Rukshine63440d2019-08-18 12:08:52 +03002425 NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES |
2426 NVMF_OPT_TOS,
Christoph Hellwig71102302016-07-06 21:55:52 +09002427 .create_ctrl = nvme_rdma_create_ctrl,
2428};
2429
Steve Wisee87a9112016-09-02 09:01:54 -07002430static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
2431{
2432 struct nvme_rdma_ctrl *ctrl;
Max Gurtovoy9bad0402018-02-28 13:12:39 +02002433 struct nvme_rdma_device *ndev;
2434 bool found = false;
2435
2436 mutex_lock(&device_list_mutex);
2437 list_for_each_entry(ndev, &device_list, entry) {
2438 if (ndev->dev == ib_device) {
2439 found = true;
2440 break;
2441 }
2442 }
2443 mutex_unlock(&device_list_mutex);
2444
2445 if (!found)
2446 return;
Steve Wisee87a9112016-09-02 09:01:54 -07002447
2448 /* Delete all controllers using this device */
2449 mutex_lock(&nvme_rdma_ctrl_mutex);
2450 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2451 if (ctrl->device->dev != ib_device)
2452 continue;
Christoph Hellwigc5017e82017-10-29 10:44:29 +02002453 nvme_delete_ctrl(&ctrl->ctrl);
Steve Wisee87a9112016-09-02 09:01:54 -07002454 }
2455 mutex_unlock(&nvme_rdma_ctrl_mutex);
2456
Roy Shtermanb227c592018-01-14 12:39:02 +02002457 flush_workqueue(nvme_delete_wq);
Steve Wisee87a9112016-09-02 09:01:54 -07002458}
2459
2460static struct ib_client nvme_rdma_ib_client = {
2461 .name = "nvme_rdma",
Steve Wisee87a9112016-09-02 09:01:54 -07002462 .remove = nvme_rdma_remove_one
2463};
2464
Christoph Hellwig71102302016-07-06 21:55:52 +09002465static int __init nvme_rdma_init_module(void)
2466{
Steve Wisee87a9112016-09-02 09:01:54 -07002467 int ret;
2468
Steve Wisee87a9112016-09-02 09:01:54 -07002469 ret = ib_register_client(&nvme_rdma_ib_client);
Sagi Grimberga56c79c2017-03-19 06:21:42 +02002470 if (ret)
Sagi Grimberg9a6327d2017-06-07 20:31:55 +02002471 return ret;
Steve Wisee87a9112016-09-02 09:01:54 -07002472
Sagi Grimberga56c79c2017-03-19 06:21:42 +02002473 ret = nvmf_register_transport(&nvme_rdma_transport);
2474 if (ret)
2475 goto err_unreg_client;
2476
2477 return 0;
2478
2479err_unreg_client:
2480 ib_unregister_client(&nvme_rdma_ib_client);
Sagi Grimberga56c79c2017-03-19 06:21:42 +02002481 return ret;
Christoph Hellwig71102302016-07-06 21:55:52 +09002482}
2483
2484static void __exit nvme_rdma_cleanup_module(void)
2485{
Max Gurtovoy9ad9e8d62019-10-29 16:42:27 +02002486 struct nvme_rdma_ctrl *ctrl;
2487
Christoph Hellwig71102302016-07-06 21:55:52 +09002488 nvmf_unregister_transport(&nvme_rdma_transport);
Steve Wisee87a9112016-09-02 09:01:54 -07002489 ib_unregister_client(&nvme_rdma_ib_client);
Max Gurtovoy9ad9e8d62019-10-29 16:42:27 +02002490
2491 mutex_lock(&nvme_rdma_ctrl_mutex);
2492 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list)
2493 nvme_delete_ctrl(&ctrl->ctrl);
2494 mutex_unlock(&nvme_rdma_ctrl_mutex);
2495 flush_workqueue(nvme_delete_wq);
Christoph Hellwig71102302016-07-06 21:55:52 +09002496}
2497
2498module_init(nvme_rdma_init_module);
2499module_exit(nvme_rdma_cleanup_module);
2500
2501MODULE_LICENSE("GPL v2");