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Thomas Gleixner2874c5f2019-05-27 08:55:01 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Wu Zhangjinbd92aa02009-07-02 23:22:36 +08002/*
3 * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
4 * Author: Fuxin Zhang, zhangfx@lemote.com
5 *
Wu Zhangjinf7a904d2010-01-04 17:16:51 +08006 * Copyright (C) 2009 Lemote Inc.
7 * Author: Wu Zhangjin, wuzhangjin@gmail.com
Wu Zhangjinbd92aa02009-07-02 23:22:36 +08008 */
Jiaxun Yanga746f502020-04-20 21:45:25 +08009
Wu Zhangjinbd92aa02009-07-02 23:22:36 +080010#include <asm/time.h>
Huacai Chene292ccd2014-11-04 14:15:31 +080011#include <asm/hpet.h>
Wu Zhangjinbd92aa02009-07-02 23:22:36 +080012
Wu Zhangjin5e983ff2009-07-02 23:23:03 +080013#include <loongson.h>
Qing Zhang95b56e82021-03-15 15:50:00 +080014#include <linux/clk.h>
15#include <linux/of_clk.h>
Wu Zhangjinbd92aa02009-07-02 23:22:36 +080016
17void __init plat_time_init(void)
18{
Qing Zhang95b56e82021-03-15 15:50:00 +080019 struct clk *clk;
20 struct device_node *np;
21
22 if (loongson_sysconf.fw_interface == LOONGSON_DTB) {
23 of_clk_init(NULL);
24
25 np = of_get_cpu_node(0, NULL);
26 if (!np) {
27 pr_err("Failed to get CPU node\n");
28 return;
29 }
30
31 clk = of_clk_get(np, 0);
32 if (IS_ERR(clk)) {
33 pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
34 return;
35 }
36
37 cpu_clock_freq = clk_get_rate(clk);
38 clk_put(clk);
39 }
40
Wu Zhangjinbd92aa02009-07-02 23:22:36 +080041 /* setup mips r4k timer */
42 mips_hpt_frequency = cpu_clock_freq / 2;
Wu Zhangjin916daba2009-11-17 01:32:57 +080043
Huacai Chene292ccd2014-11-04 14:15:31 +080044#ifdef CONFIG_RS780_HPET
45 setup_hpet_timer();
Huacai Chene292ccd2014-11-04 14:15:31 +080046#endif
Wu Zhangjinbd92aa02009-07-02 23:22:36 +080047}