Wesley Cheng | f06b9fc | 2020-05-04 16:54:23 -0700 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: "http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#" |
| 5 | $schema: "http://devicetree.org/meta-schemas/core.yaml#" |
| 6 | |
| 7 | title: Qualcomm Synopsys Femto High-Speed USB PHY V2 |
| 8 | |
| 9 | maintainers: |
| 10 | - Wesley Cheng <wcheng@codeaurora.org> |
| 11 | |
| 12 | description: | |
| 13 | Qualcomm High-Speed USB PHY |
| 14 | |
| 15 | properties: |
| 16 | compatible: |
| 17 | enum: |
| 18 | - qcom,usb-snps-hs-7nm-phy |
| 19 | - qcom,sm8150-usb-hs-phy |
Jack Pham | fcba632 | 2021-01-15 09:47:22 -0800 | [diff] [blame^] | 20 | - qcom,sm8250-usb-hs-phy |
| 21 | - qcom,sm8350-usb-hs-phy |
Wesley Cheng | f06b9fc | 2020-05-04 16:54:23 -0700 | [diff] [blame] | 22 | - qcom,usb-snps-femto-v2-phy |
| 23 | |
| 24 | reg: |
| 25 | maxItems: 1 |
| 26 | |
| 27 | "#phy-cells": |
| 28 | const: 0 |
| 29 | |
| 30 | clocks: |
| 31 | items: |
| 32 | - description: rpmhcc ref clock |
| 33 | |
| 34 | clock-names: |
| 35 | items: |
| 36 | - const: ref |
| 37 | |
| 38 | resets: |
| 39 | items: |
| 40 | - description: PHY core reset |
| 41 | |
| 42 | vdda-pll-supply: |
| 43 | description: phandle to the regulator VDD supply node. |
| 44 | |
| 45 | vdda18-supply: |
| 46 | description: phandle to the regulator 1.8V supply node. |
| 47 | |
| 48 | vdda33-supply: |
| 49 | description: phandle to the regulator 3.3V supply node. |
| 50 | |
| 51 | required: |
| 52 | - compatible |
| 53 | - reg |
| 54 | - "#phy-cells" |
| 55 | - clocks |
| 56 | - clock-names |
| 57 | - resets |
| 58 | - vdda-pll-supply |
| 59 | - vdda18-supply |
| 60 | - vdda33-supply |
| 61 | |
| 62 | additionalProperties: false |
| 63 | |
| 64 | examples: |
| 65 | - | |
| 66 | #include <dt-bindings/clock/qcom,rpmh.h> |
| 67 | #include <dt-bindings/clock/qcom,gcc-sm8150.h> |
| 68 | phy@88e2000 { |
| 69 | compatible = "qcom,sm8150-usb-hs-phy"; |
Rob Herring | 0db958b | 2020-06-11 08:58:04 -0600 | [diff] [blame] | 70 | reg = <0x088e2000 0x400>; |
Wesley Cheng | f06b9fc | 2020-05-04 16:54:23 -0700 | [diff] [blame] | 71 | #phy-cells = <0>; |
| 72 | |
| 73 | clocks = <&rpmhcc RPMH_CXO_CLK>; |
| 74 | clock-names = "ref"; |
| 75 | |
| 76 | resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; |
Wesley Cheng | b9d3e8a | 2020-05-06 01:26:29 -0700 | [diff] [blame] | 77 | |
| 78 | vdda-pll-supply = <&vdd_usb_hs_core>; |
| 79 | vdda33-supply = <&vdda_usb_hs_3p1>; |
| 80 | vdda18-supply = <&vdda_usb_hs_1p8>; |
Wesley Cheng | f06b9fc | 2020-05-04 16:54:23 -0700 | [diff] [blame] | 81 | }; |
| 82 | ... |