Fariya Fatima | dad0d04 | 2014-03-16 03:47:02 +0530 | [diff] [blame] | 1 | /** |
| 2 | * Copyright (c) 2014 Redpine Signals Inc. |
| 3 | * |
| 4 | * Permission to use, copy, modify, and/or distribute this software for any |
| 5 | * purpose with or without fee is hereby granted, provided that the above |
| 6 | * copyright notice and this permission notice appear in all copies. |
| 7 | * |
| 8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 15 | */ |
| 16 | |
| 17 | #ifndef __RSI_MGMT_H__ |
| 18 | #define __RSI_MGMT_H__ |
| 19 | |
| 20 | #include <linux/sort.h> |
| 21 | #include "rsi_boot_params.h" |
| 22 | #include "rsi_main.h" |
| 23 | |
| 24 | #define MAX_MGMT_PKT_SIZE 512 |
| 25 | #define RSI_NEEDED_HEADROOM 80 |
| 26 | #define RSI_RCV_BUFFER_LEN 2000 |
| 27 | |
| 28 | #define RSI_11B_MODE 0 |
| 29 | #define RSI_11G_MODE BIT(7) |
| 30 | #define RETRY_COUNT 8 |
| 31 | #define RETRY_LONG 4 |
| 32 | #define RETRY_SHORT 7 |
| 33 | #define WMM_SHORT_SLOT_TIME 9 |
| 34 | #define SIFS_DURATION 16 |
| 35 | |
| 36 | #define KEY_TYPE_CLEAR 0 |
| 37 | #define RSI_PAIRWISE_KEY 1 |
| 38 | #define RSI_GROUP_KEY 2 |
| 39 | |
| 40 | /* EPPROM_READ_ADDRESS */ |
| 41 | #define WLAN_MAC_EEPROM_ADDR 40 |
| 42 | #define WLAN_MAC_MAGIC_WORD_LEN 0x01 |
| 43 | #define WLAN_HOST_MODE_LEN 0x04 |
| 44 | #define WLAN_FW_VERSION_LEN 0x08 |
| 45 | #define MAGIC_WORD 0x5A |
| 46 | |
| 47 | /* Receive Frame Types */ |
| 48 | #define TA_CONFIRM_TYPE 0x01 |
| 49 | #define RX_DOT11_MGMT 0x02 |
| 50 | #define TX_STATUS_IND 0x04 |
| 51 | #define PROBEREQ_CONFIRM 2 |
| 52 | #define CARD_READY_IND 0x00 |
| 53 | |
| 54 | #define RSI_DELETE_PEER 0x0 |
| 55 | #define RSI_ADD_PEER 0x1 |
| 56 | #define START_AMPDU_AGGR 0x1 |
| 57 | #define STOP_AMPDU_AGGR 0x0 |
| 58 | #define INTERNAL_MGMT_PKT 0x99 |
| 59 | |
| 60 | #define PUT_BBP_RESET 0 |
| 61 | #define BBP_REG_WRITE 0 |
| 62 | #define RF_RESET_ENABLE BIT(3) |
| 63 | #define RATE_INFO_ENABLE BIT(0) |
| 64 | #define RSI_BROADCAST_PKT BIT(9) |
| 65 | |
| 66 | #define UPPER_20_ENABLE (0x2 << 12) |
| 67 | #define LOWER_20_ENABLE (0x4 << 12) |
| 68 | #define FULL40M_ENABLE 0x6 |
| 69 | |
| 70 | #define RSI_LMAC_CLOCK_80MHZ 0x1 |
| 71 | #define RSI_ENABLE_40MHZ (0x1 << 3) |
| 72 | |
| 73 | #define RX_BA_INDICATION 1 |
| 74 | #define RSI_TBL_SZ 40 |
| 75 | #define MAX_RETRIES 8 |
Jahnavi Meher | 48d11dc | 2014-04-29 01:03:53 +0530 | [diff] [blame] | 76 | #define RSI_IFTYPE_STATION 0 |
Fariya Fatima | dad0d04 | 2014-03-16 03:47:02 +0530 | [diff] [blame] | 77 | |
| 78 | #define STD_RATE_MCS7 0x07 |
| 79 | #define STD_RATE_MCS6 0x06 |
| 80 | #define STD_RATE_MCS5 0x05 |
| 81 | #define STD_RATE_MCS4 0x04 |
| 82 | #define STD_RATE_MCS3 0x03 |
| 83 | #define STD_RATE_MCS2 0x02 |
| 84 | #define STD_RATE_MCS1 0x01 |
| 85 | #define STD_RATE_MCS0 0x00 |
| 86 | #define STD_RATE_54 0x6c |
| 87 | #define STD_RATE_48 0x60 |
| 88 | #define STD_RATE_36 0x48 |
| 89 | #define STD_RATE_24 0x30 |
| 90 | #define STD_RATE_18 0x24 |
| 91 | #define STD_RATE_12 0x18 |
| 92 | #define STD_RATE_11 0x16 |
| 93 | #define STD_RATE_09 0x12 |
| 94 | #define STD_RATE_06 0x0C |
| 95 | #define STD_RATE_5_5 0x0B |
| 96 | #define STD_RATE_02 0x04 |
| 97 | #define STD_RATE_01 0x02 |
| 98 | |
| 99 | #define RSI_RF_TYPE 1 |
| 100 | #define RSI_RATE_00 0x00 |
| 101 | #define RSI_RATE_1 0x0 |
| 102 | #define RSI_RATE_2 0x2 |
| 103 | #define RSI_RATE_5_5 0x4 |
| 104 | #define RSI_RATE_11 0x6 |
| 105 | #define RSI_RATE_6 0x8b |
| 106 | #define RSI_RATE_9 0x8f |
| 107 | #define RSI_RATE_12 0x8a |
| 108 | #define RSI_RATE_18 0x8e |
| 109 | #define RSI_RATE_24 0x89 |
| 110 | #define RSI_RATE_36 0x8d |
| 111 | #define RSI_RATE_48 0x88 |
| 112 | #define RSI_RATE_54 0x8c |
| 113 | #define RSI_RATE_MCS0 0x100 |
| 114 | #define RSI_RATE_MCS1 0x101 |
| 115 | #define RSI_RATE_MCS2 0x102 |
| 116 | #define RSI_RATE_MCS3 0x103 |
| 117 | #define RSI_RATE_MCS4 0x104 |
| 118 | #define RSI_RATE_MCS5 0x105 |
| 119 | #define RSI_RATE_MCS6 0x106 |
| 120 | #define RSI_RATE_MCS7 0x107 |
| 121 | #define RSI_RATE_MCS7_SG 0x307 |
| 122 | |
| 123 | #define BW_20MHZ 0 |
| 124 | #define BW_40MHZ 1 |
| 125 | |
Jahnavi Meher | f870a34 | 2014-06-16 19:41:22 +0530 | [diff] [blame^] | 126 | #define EP_2GHZ_20MHZ 0 |
| 127 | #define EP_2GHZ_40MHZ 1 |
| 128 | #define EP_5GHZ_20MHZ 2 |
| 129 | #define EP_5GHZ_40MHZ 3 |
| 130 | |
Fariya Fatima | dad0d04 | 2014-03-16 03:47:02 +0530 | [diff] [blame] | 131 | #define RSI_SUPP_FILTERS (FIF_ALLMULTI | FIF_PROBE_REQ |\ |
| 132 | FIF_BCN_PRBRESP_PROMISC) |
| 133 | enum opmode { |
| 134 | STA_OPMODE = 1, |
| 135 | AP_OPMODE = 2 |
| 136 | }; |
| 137 | |
| 138 | extern struct ieee80211_rate rsi_rates[12]; |
| 139 | extern const u16 rsi_mcsrates[8]; |
| 140 | |
| 141 | enum sta_notify_events { |
| 142 | STA_CONNECTED = 0, |
| 143 | STA_DISCONNECTED, |
| 144 | STA_TX_ADDBA_DONE, |
| 145 | STA_TX_DELBA, |
| 146 | STA_RX_ADDBA_DONE, |
| 147 | STA_RX_DELBA |
| 148 | }; |
| 149 | |
| 150 | /* Send Frames Types */ |
| 151 | enum cmd_frame_type { |
| 152 | TX_DOT11_MGMT, |
| 153 | RESET_MAC_REQ, |
| 154 | RADIO_CAPABILITIES, |
| 155 | BB_PROG_VALUES_REQUEST, |
| 156 | RF_PROG_VALUES_REQUEST, |
| 157 | WAKEUP_SLEEP_REQUEST, |
| 158 | SCAN_REQUEST, |
| 159 | TSF_UPDATE, |
| 160 | PEER_NOTIFY, |
| 161 | BLOCK_UNBLOCK, |
| 162 | SET_KEY_REQ, |
| 163 | AUTO_RATE_IND, |
| 164 | BOOTUP_PARAMS_REQUEST, |
| 165 | VAP_CAPABILITIES, |
| 166 | EEPROM_READ_TYPE , |
| 167 | EEPROM_WRITE, |
| 168 | GPIO_PIN_CONFIG , |
| 169 | SET_RX_FILTER, |
| 170 | AMPDU_IND, |
| 171 | STATS_REQUEST_FRAME, |
| 172 | BB_BUF_PROG_VALUES_REQ, |
| 173 | BBP_PROG_IN_TA, |
| 174 | BG_SCAN_PARAMS, |
| 175 | BG_SCAN_PROBE_REQ, |
| 176 | CW_MODE_REQ, |
| 177 | PER_CMD_PKT |
| 178 | }; |
| 179 | |
| 180 | struct rsi_mac_frame { |
| 181 | __le16 desc_word[8]; |
| 182 | } __packed; |
| 183 | |
| 184 | struct rsi_boot_params { |
| 185 | __le16 desc_word[8]; |
| 186 | struct bootup_params bootup_params; |
| 187 | } __packed; |
| 188 | |
| 189 | struct rsi_peer_notify { |
| 190 | __le16 desc_word[8]; |
| 191 | u8 mac_addr[6]; |
| 192 | __le16 command; |
| 193 | __le16 mpdu_density; |
| 194 | __le16 reserved; |
| 195 | __le32 sta_flags; |
| 196 | } __packed; |
| 197 | |
| 198 | struct rsi_vap_caps { |
| 199 | __le16 desc_word[8]; |
| 200 | u8 mac_addr[6]; |
| 201 | __le16 keep_alive_period; |
| 202 | u8 bssid[6]; |
| 203 | __le16 reserved; |
| 204 | __le32 flags; |
| 205 | __le16 frag_threshold; |
| 206 | __le16 rts_threshold; |
| 207 | __le32 default_mgmt_rate; |
| 208 | __le32 default_ctrl_rate; |
| 209 | __le32 default_data_rate; |
| 210 | __le16 beacon_interval; |
| 211 | __le16 dtim_period; |
| 212 | } __packed; |
| 213 | |
| 214 | struct rsi_set_key { |
| 215 | __le16 desc_word[8]; |
| 216 | u8 key[4][32]; |
| 217 | u8 tx_mic_key[8]; |
| 218 | u8 rx_mic_key[8]; |
| 219 | } __packed; |
| 220 | |
| 221 | struct rsi_auto_rate { |
| 222 | __le16 desc_word[8]; |
| 223 | __le16 failure_limit; |
| 224 | __le16 initial_boundary; |
| 225 | __le16 max_threshold_limt; |
| 226 | __le16 num_supported_rates; |
| 227 | __le16 aarf_rssi; |
| 228 | __le16 moderate_rate_inx; |
| 229 | __le16 collision_tolerance; |
| 230 | __le16 supported_rates[40]; |
| 231 | } __packed; |
| 232 | |
| 233 | struct qos_params { |
| 234 | __le16 cont_win_min_q; |
| 235 | __le16 cont_win_max_q; |
| 236 | __le16 aifsn_val_q; |
| 237 | __le16 txop_q; |
| 238 | } __packed; |
| 239 | |
| 240 | struct rsi_radio_caps { |
| 241 | __le16 desc_word[8]; |
| 242 | struct qos_params qos_params[MAX_HW_QUEUES]; |
| 243 | u8 num_11n_rates; |
| 244 | u8 num_11ac_rates; |
| 245 | __le16 gcpd_per_rate[20]; |
| 246 | } __packed; |
| 247 | |
| 248 | static inline u32 rsi_get_queueno(u8 *addr, u16 offset) |
| 249 | { |
| 250 | return (le16_to_cpu(*(__le16 *)&addr[offset]) & 0x7000) >> 12; |
| 251 | } |
| 252 | |
| 253 | static inline u32 rsi_get_length(u8 *addr, u16 offset) |
| 254 | { |
| 255 | return (le16_to_cpu(*(__le16 *)&addr[offset])) & 0x0fff; |
| 256 | } |
| 257 | |
| 258 | static inline u8 rsi_get_extended_desc(u8 *addr, u16 offset) |
| 259 | { |
| 260 | return le16_to_cpu(*((__le16 *)&addr[offset + 4])) & 0x00ff; |
| 261 | } |
| 262 | |
| 263 | static inline u8 rsi_get_rssi(u8 *addr) |
| 264 | { |
| 265 | return *(u8 *)(addr + FRAME_DESC_SZ); |
| 266 | } |
| 267 | |
| 268 | static inline u8 rsi_get_channel(u8 *addr) |
| 269 | { |
| 270 | return *(char *)(addr + 15); |
| 271 | } |
| 272 | |
| 273 | int rsi_mgmt_pkt_recv(struct rsi_common *common, u8 *msg); |
| 274 | int rsi_set_vap_capabilities(struct rsi_common *common, enum opmode mode); |
| 275 | int rsi_send_aggregation_params_frame(struct rsi_common *common, u16 tid, |
| 276 | u16 ssn, u8 buf_size, u8 event); |
| 277 | int rsi_hal_load_key(struct rsi_common *common, u8 *data, u16 key_len, |
| 278 | u8 key_type, u8 key_id, u32 cipher); |
| 279 | int rsi_set_channel(struct rsi_common *common, u16 chno); |
| 280 | void rsi_inform_bss_status(struct rsi_common *common, u8 status, |
| 281 | const u8 *bssid, u8 qos_enable, u16 aid); |
| 282 | void rsi_indicate_pkt_to_os(struct rsi_common *common, struct sk_buff *skb); |
| 283 | int rsi_mac80211_attach(struct rsi_common *common); |
| 284 | void rsi_indicate_tx_status(struct rsi_hw *common, struct sk_buff *skb, |
| 285 | int status); |
| 286 | bool rsi_is_cipher_wep(struct rsi_common *common); |
| 287 | void rsi_core_qos_processor(struct rsi_common *common); |
| 288 | void rsi_core_xmit(struct rsi_common *common, struct sk_buff *skb); |
| 289 | int rsi_send_mgmt_pkt(struct rsi_common *common, struct sk_buff *skb); |
| 290 | int rsi_send_data_pkt(struct rsi_common *common, struct sk_buff *skb); |
| 291 | #endif |