Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/mtd/nand.c |
| 3 | * |
| 4 | * Overview: |
| 5 | * This is the generic MTD driver for NAND flash devices. It should be |
| 6 | * capable of working with almost all NAND chips currently available. |
| 7 | * Basic support for AG-AND chips is provided. |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 8 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | * Additional technical information is available on |
maximilian attems | 8b2b403 | 2007-07-28 13:07:16 +0200 | [diff] [blame] | 10 | * http://www.linux-mtd.infradead.org/doc/nand.html |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 11 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 13 | * 2002-2006 Thomas Gleixner (tglx@linutronix.de) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 15 | * Credits: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 16 | * David Woodhouse for adding multichip support |
| 17 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 | * Aleph One Ltd. and Toby Churchill Ltd. for supporting the |
| 19 | * rework for 2K page size chips |
| 20 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 21 | * TODO: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | * Enable cached programming for 2k page size chips |
| 23 | * Check, if mtd->ecctype should be set to MTD_ECC_HW |
| 24 | * if we have HW ecc support. |
| 25 | * The AG-AND chips have nice features for speed improvement, |
| 26 | * which are not supported yet. Read / program 4 pages in one go. |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 27 | * BBT table is not serialized, has to be fixed |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | * This program is free software; you can redistribute it and/or modify |
| 30 | * it under the terms of the GNU General Public License version 2 as |
| 31 | * published by the Free Software Foundation. |
| 32 | * |
| 33 | */ |
| 34 | |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 35 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | #include <linux/delay.h> |
| 37 | #include <linux/errno.h> |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 38 | #include <linux/err.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | #include <linux/sched.h> |
| 40 | #include <linux/slab.h> |
| 41 | #include <linux/types.h> |
| 42 | #include <linux/mtd/mtd.h> |
| 43 | #include <linux/mtd/nand.h> |
| 44 | #include <linux/mtd/nand_ecc.h> |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 45 | #include <linux/mtd/nand_bch.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | #include <linux/interrupt.h> |
| 47 | #include <linux/bitops.h> |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 48 | #include <linux/leds.h> |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 49 | #include <linux/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | #include <linux/mtd/partitions.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 51 | |
| 52 | /* Define default oob placement schemes for large and small page devices */ |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 53 | static struct nand_ecclayout nand_oob_8 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | .eccbytes = 3, |
| 55 | .eccpos = {0, 1, 2}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 56 | .oobfree = { |
| 57 | {.offset = 3, |
| 58 | .length = 2}, |
| 59 | {.offset = 6, |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 60 | .length = 2} } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | }; |
| 62 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 63 | static struct nand_ecclayout nand_oob_16 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | .eccbytes = 6, |
| 65 | .eccpos = {0, 1, 2, 3, 6, 7}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 66 | .oobfree = { |
| 67 | {.offset = 8, |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 68 | . length = 8} } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | }; |
| 70 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 71 | static struct nand_ecclayout nand_oob_64 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | .eccbytes = 24, |
| 73 | .eccpos = { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 74 | 40, 41, 42, 43, 44, 45, 46, 47, |
| 75 | 48, 49, 50, 51, 52, 53, 54, 55, |
| 76 | 56, 57, 58, 59, 60, 61, 62, 63}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 77 | .oobfree = { |
| 78 | {.offset = 2, |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 79 | .length = 38} } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | }; |
| 81 | |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 82 | static struct nand_ecclayout nand_oob_128 = { |
| 83 | .eccbytes = 48, |
| 84 | .eccpos = { |
| 85 | 80, 81, 82, 83, 84, 85, 86, 87, |
| 86 | 88, 89, 90, 91, 92, 93, 94, 95, |
| 87 | 96, 97, 98, 99, 100, 101, 102, 103, |
| 88 | 104, 105, 106, 107, 108, 109, 110, 111, |
| 89 | 112, 113, 114, 115, 116, 117, 118, 119, |
| 90 | 120, 121, 122, 123, 124, 125, 126, 127}, |
| 91 | .oobfree = { |
| 92 | {.offset = 2, |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 93 | .length = 78} } |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 94 | }; |
| 95 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 96 | static int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 97 | int new_state); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 98 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 99 | static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, |
| 100 | struct mtd_oob_ops *ops); |
| 101 | |
Thomas Gleixner | d470a97 | 2006-05-23 23:48:57 +0200 | [diff] [blame] | 102 | /* |
Joe Perches | 8e87d78 | 2008-02-03 17:22:34 +0200 | [diff] [blame] | 103 | * For devices which display every fart in the system on a separate LED. Is |
Thomas Gleixner | d470a97 | 2006-05-23 23:48:57 +0200 | [diff] [blame] | 104 | * compiled away when LED support is disabled. |
| 105 | */ |
| 106 | DEFINE_LED_TRIGGER(nand_led_trigger); |
| 107 | |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 108 | static int check_offs_len(struct mtd_info *mtd, |
| 109 | loff_t ofs, uint64_t len) |
| 110 | { |
| 111 | struct nand_chip *chip = mtd->priv; |
| 112 | int ret = 0; |
| 113 | |
| 114 | /* Start address must align on block boundary */ |
| 115 | if (ofs & ((1 << chip->phys_erase_shift) - 1)) { |
| 116 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Unaligned address\n", __func__); |
| 117 | ret = -EINVAL; |
| 118 | } |
| 119 | |
| 120 | /* Length must align on block boundary */ |
| 121 | if (len & ((1 << chip->phys_erase_shift) - 1)) { |
| 122 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Length not block aligned\n", |
| 123 | __func__); |
| 124 | ret = -EINVAL; |
| 125 | } |
| 126 | |
| 127 | /* Do not allow past end of device */ |
| 128 | if (ofs + len > mtd->size) { |
| 129 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Past end of device\n", |
| 130 | __func__); |
| 131 | ret = -EINVAL; |
| 132 | } |
| 133 | |
| 134 | return ret; |
| 135 | } |
| 136 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | /** |
| 138 | * nand_release_device - [GENERIC] release chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 139 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 140 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 141 | * Deselect, release chip lock and wake up anyone waiting on the device. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 143 | static void nand_release_device(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 145 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | |
| 147 | /* De-select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 148 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 149 | |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 150 | /* Release the controller and the chip */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 151 | spin_lock(&chip->controller->lock); |
| 152 | chip->controller->active = NULL; |
| 153 | chip->state = FL_READY; |
| 154 | wake_up(&chip->controller->wq); |
| 155 | spin_unlock(&chip->controller->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 156 | } |
| 157 | |
| 158 | /** |
| 159 | * nand_read_byte - [DEFAULT] read one byte from the chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 160 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 161 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 162 | * Default read function for 8bit buswith. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 163 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 164 | static uint8_t nand_read_byte(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 165 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 166 | struct nand_chip *chip = mtd->priv; |
| 167 | return readb(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 168 | } |
| 169 | |
| 170 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 171 | * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 172 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 174 | * Default read function for 16bit buswith with endianess conversion. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 175 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 176 | static uint8_t nand_read_byte16(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 177 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 178 | struct nand_chip *chip = mtd->priv; |
| 179 | return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 180 | } |
| 181 | |
| 182 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 183 | * nand_read_word - [DEFAULT] read one word from the chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 184 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 185 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 186 | * Default read function for 16bit buswith without endianess conversion. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 187 | */ |
| 188 | static u16 nand_read_word(struct mtd_info *mtd) |
| 189 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 190 | struct nand_chip *chip = mtd->priv; |
| 191 | return readw(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 192 | } |
| 193 | |
| 194 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 195 | * nand_select_chip - [DEFAULT] control CE line |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 196 | * @mtd: MTD device structure |
| 197 | * @chipnr: chipnumber to select, -1 for deselect |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 198 | * |
| 199 | * Default select function for 1 chip devices. |
| 200 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 201 | static void nand_select_chip(struct mtd_info *mtd, int chipnr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 203 | struct nand_chip *chip = mtd->priv; |
| 204 | |
| 205 | switch (chipnr) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 206 | case -1: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 207 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 208 | break; |
| 209 | case 0: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 210 | break; |
| 211 | |
| 212 | default: |
| 213 | BUG(); |
| 214 | } |
| 215 | } |
| 216 | |
| 217 | /** |
| 218 | * nand_write_buf - [DEFAULT] write buffer to chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 219 | * @mtd: MTD device structure |
| 220 | * @buf: data buffer |
| 221 | * @len: number of bytes to write |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 222 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 223 | * Default write function for 8bit buswith. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 224 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 225 | static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 226 | { |
| 227 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 228 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 229 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 230 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 231 | writeb(buf[i], chip->IO_ADDR_W); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 232 | } |
| 233 | |
| 234 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 235 | * nand_read_buf - [DEFAULT] read chip data into buffer |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 236 | * @mtd: MTD device structure |
| 237 | * @buf: buffer to store date |
| 238 | * @len: number of bytes to read |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 239 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 240 | * Default read function for 8bit buswith. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 241 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 242 | static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 243 | { |
| 244 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 245 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 246 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 247 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 248 | buf[i] = readb(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 249 | } |
| 250 | |
| 251 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 252 | * nand_verify_buf - [DEFAULT] Verify chip data against buffer |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 253 | * @mtd: MTD device structure |
| 254 | * @buf: buffer containing the data to compare |
| 255 | * @len: number of bytes to compare |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 256 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 257 | * Default verify function for 8bit buswith. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 258 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 259 | static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 260 | { |
| 261 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 262 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 263 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 264 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 265 | if (buf[i] != readb(chip->IO_ADDR_R)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 266 | return -EFAULT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | return 0; |
| 268 | } |
| 269 | |
| 270 | /** |
| 271 | * nand_write_buf16 - [DEFAULT] write buffer to chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 272 | * @mtd: MTD device structure |
| 273 | * @buf: data buffer |
| 274 | * @len: number of bytes to write |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 275 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 276 | * Default write function for 16bit buswith. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 277 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 278 | static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 279 | { |
| 280 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 281 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 282 | u16 *p = (u16 *) buf; |
| 283 | len >>= 1; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 284 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 285 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 286 | writew(p[i], chip->IO_ADDR_W); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 287 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 288 | } |
| 289 | |
| 290 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 291 | * nand_read_buf16 - [DEFAULT] read chip data into buffer |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 292 | * @mtd: MTD device structure |
| 293 | * @buf: buffer to store date |
| 294 | * @len: number of bytes to read |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 295 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 296 | * Default read function for 16bit buswith. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 297 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 298 | static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 299 | { |
| 300 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 301 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | u16 *p = (u16 *) buf; |
| 303 | len >>= 1; |
| 304 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 305 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 306 | p[i] = readw(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 307 | } |
| 308 | |
| 309 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 310 | * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 311 | * @mtd: MTD device structure |
| 312 | * @buf: buffer containing the data to compare |
| 313 | * @len: number of bytes to compare |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 314 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 315 | * Default verify function for 16bit buswith. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 316 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 317 | static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 318 | { |
| 319 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 320 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 321 | u16 *p = (u16 *) buf; |
| 322 | len >>= 1; |
| 323 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 324 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 325 | if (p[i] != readw(chip->IO_ADDR_R)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 326 | return -EFAULT; |
| 327 | |
| 328 | return 0; |
| 329 | } |
| 330 | |
| 331 | /** |
| 332 | * nand_block_bad - [DEFAULT] Read bad block marker from the chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 333 | * @mtd: MTD device structure |
| 334 | * @ofs: offset from device start |
| 335 | * @getchip: 0, if the chip is already selected |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 336 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 337 | * Check, if the block is bad. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 338 | */ |
| 339 | static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) |
| 340 | { |
| 341 | int page, chipnr, res = 0; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 342 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 343 | u16 bad; |
| 344 | |
Brian Norris | 5fb1549 | 2011-05-31 16:31:21 -0700 | [diff] [blame] | 345 | if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) |
Kevin Cernekee | b60b08b | 2010-05-04 20:58:10 -0700 | [diff] [blame] | 346 | ofs += mtd->erasesize - mtd->writesize; |
| 347 | |
Thomas Knobloch | 1a12f46 | 2007-05-03 07:39:37 +0100 | [diff] [blame] | 348 | page = (int)(ofs >> chip->page_shift) & chip->pagemask; |
| 349 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 350 | if (getchip) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 351 | chipnr = (int)(ofs >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 352 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 353 | nand_get_device(chip, mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 354 | |
| 355 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 356 | chip->select_chip(mtd, chipnr); |
Thomas Knobloch | 1a12f46 | 2007-05-03 07:39:37 +0100 | [diff] [blame] | 357 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 358 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 359 | if (chip->options & NAND_BUSWIDTH_16) { |
| 360 | chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE, |
Thomas Knobloch | 1a12f46 | 2007-05-03 07:39:37 +0100 | [diff] [blame] | 361 | page); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 362 | bad = cpu_to_le16(chip->read_word(mtd)); |
| 363 | if (chip->badblockpos & 0x1) |
Vitaly Wool | 49196f3 | 2005-11-02 16:54:46 +0000 | [diff] [blame] | 364 | bad >>= 8; |
Maxim Levitsky | e0b58d0 | 2010-02-22 20:39:38 +0200 | [diff] [blame] | 365 | else |
| 366 | bad &= 0xFF; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 367 | } else { |
Thomas Knobloch | 1a12f46 | 2007-05-03 07:39:37 +0100 | [diff] [blame] | 368 | chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page); |
Maxim Levitsky | e0b58d0 | 2010-02-22 20:39:38 +0200 | [diff] [blame] | 369 | bad = chip->read_byte(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 371 | |
Maxim Levitsky | e0b58d0 | 2010-02-22 20:39:38 +0200 | [diff] [blame] | 372 | if (likely(chip->badblockbits == 8)) |
| 373 | res = bad != 0xFF; |
| 374 | else |
| 375 | res = hweight8(bad) < chip->badblockbits; |
| 376 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 377 | if (getchip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 378 | nand_release_device(mtd); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 379 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 380 | return res; |
| 381 | } |
| 382 | |
| 383 | /** |
| 384 | * nand_default_block_markbad - [DEFAULT] mark a block bad |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 385 | * @mtd: MTD device structure |
| 386 | * @ofs: offset from device start |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 387 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 388 | * This is the default implementation, which can be overridden by a hardware |
| 389 | * specific driver. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 390 | */ |
| 391 | static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) |
| 392 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 393 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 394 | uint8_t buf[2] = { 0, 0 }; |
Brian Norris | 02ed70b | 2010-07-21 16:53:47 -0700 | [diff] [blame] | 395 | int block, ret, i = 0; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 396 | |
Brian Norris | 5fb1549 | 2011-05-31 16:31:21 -0700 | [diff] [blame] | 397 | if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) |
Kevin Cernekee | b60b08b | 2010-05-04 20:58:10 -0700 | [diff] [blame] | 398 | ofs += mtd->erasesize - mtd->writesize; |
| 399 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 400 | /* Get block number */ |
Andre Renaud | 4226b51 | 2007-04-17 13:50:59 -0400 | [diff] [blame] | 401 | block = (int)(ofs >> chip->bbt_erase_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 402 | if (chip->bbt) |
| 403 | chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 404 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 405 | /* Do we have a flash based bad block table? */ |
Brian Norris | bb9ebd4e | 2011-05-31 16:31:23 -0700 | [diff] [blame] | 406 | if (chip->bbt_options & NAND_BBT_USE_FLASH) |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 407 | ret = nand_update_bbt(mtd, ofs); |
| 408 | else { |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 409 | nand_get_device(chip, mtd, FL_WRITING); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 410 | |
Brian Norris | a0dc552 | 2011-05-31 16:31:20 -0700 | [diff] [blame] | 411 | /* |
| 412 | * Write to first two pages if necessary. If we write to more |
| 413 | * than one location, the first error encountered quits the |
| 414 | * procedure. We write two bytes per location, so we dont have |
| 415 | * to mess with 16 bit access. |
Brian Norris | 02ed70b | 2010-07-21 16:53:47 -0700 | [diff] [blame] | 416 | */ |
| 417 | do { |
| 418 | chip->ops.len = chip->ops.ooblen = 2; |
| 419 | chip->ops.datbuf = NULL; |
| 420 | chip->ops.oobbuf = buf; |
| 421 | chip->ops.ooboffs = chip->badblockpos & ~0x01; |
| 422 | |
| 423 | ret = nand_do_write_oob(mtd, ofs, &chip->ops); |
| 424 | |
Brian Norris | 02ed70b | 2010-07-21 16:53:47 -0700 | [diff] [blame] | 425 | i++; |
| 426 | ofs += mtd->writesize; |
Brian Norris | 5fb1549 | 2011-05-31 16:31:21 -0700 | [diff] [blame] | 427 | } while (!ret && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && |
Brian Norris | 02ed70b | 2010-07-21 16:53:47 -0700 | [diff] [blame] | 428 | i < 2); |
| 429 | |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 430 | nand_release_device(mtd); |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 431 | } |
| 432 | if (!ret) |
| 433 | mtd->ecc_stats.badblocks++; |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 434 | |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 435 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 436 | } |
| 437 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 438 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 439 | * nand_check_wp - [GENERIC] check if the chip is write protected |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 440 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 441 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 442 | * Check, if the device is write protected. The function expects, that the |
| 443 | * device is already selected. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 444 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 445 | static int nand_check_wp(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 446 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 447 | struct nand_chip *chip = mtd->priv; |
Maxim Levitsky | 93edbad | 2010-02-22 20:39:40 +0200 | [diff] [blame] | 448 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 449 | /* Broken xD cards report WP despite being writable */ |
Maxim Levitsky | 93edbad | 2010-02-22 20:39:40 +0200 | [diff] [blame] | 450 | if (chip->options & NAND_BROKEN_XD) |
| 451 | return 0; |
| 452 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 453 | /* Check the WP bit */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 454 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
| 455 | return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 456 | } |
| 457 | |
| 458 | /** |
| 459 | * nand_block_checkbad - [GENERIC] Check if a block is marked bad |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 460 | * @mtd: MTD device structure |
| 461 | * @ofs: offset from device start |
| 462 | * @getchip: 0, if the chip is already selected |
| 463 | * @allowbbt: 1, if its allowed to access the bbt area |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 464 | * |
| 465 | * Check, if the block is bad. Either by reading the bad block table or |
| 466 | * calling of the scan function. |
| 467 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 468 | static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, |
| 469 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 470 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 471 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 472 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 473 | if (!chip->bbt) |
| 474 | return chip->block_bad(mtd, ofs, getchip); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 475 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 476 | /* Return info from the table */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 477 | return nand_isbad_bbt(mtd, ofs, allowbbt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 478 | } |
| 479 | |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 480 | /** |
| 481 | * panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands. |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 482 | * @mtd: MTD device structure |
| 483 | * @timeo: Timeout |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 484 | * |
| 485 | * Helper function for nand_wait_ready used when needing to wait in interrupt |
| 486 | * context. |
| 487 | */ |
| 488 | static void panic_nand_wait_ready(struct mtd_info *mtd, unsigned long timeo) |
| 489 | { |
| 490 | struct nand_chip *chip = mtd->priv; |
| 491 | int i; |
| 492 | |
| 493 | /* Wait for the device to get ready */ |
| 494 | for (i = 0; i < timeo; i++) { |
| 495 | if (chip->dev_ready(mtd)) |
| 496 | break; |
| 497 | touch_softlockup_watchdog(); |
| 498 | mdelay(1); |
| 499 | } |
| 500 | } |
| 501 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 502 | /* Wait for the ready pin, after a command. The timeout is catched later */ |
David Woodhouse | 4b648b0 | 2006-09-25 17:05:24 +0100 | [diff] [blame] | 503 | void nand_wait_ready(struct mtd_info *mtd) |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 504 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 505 | struct nand_chip *chip = mtd->priv; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 506 | unsigned long timeo = jiffies + 2; |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 507 | |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 508 | /* 400ms timeout */ |
| 509 | if (in_interrupt() || oops_in_progress) |
| 510 | return panic_nand_wait_ready(mtd, 400); |
| 511 | |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 512 | led_trigger_event(nand_led_trigger, LED_FULL); |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 513 | /* Wait until command is processed or timeout occures */ |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 514 | do { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 515 | if (chip->dev_ready(mtd)) |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 516 | break; |
Ingo Molnar | 8446f1d | 2005-09-06 15:16:27 -0700 | [diff] [blame] | 517 | touch_softlockup_watchdog(); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 518 | } while (time_before(jiffies, timeo)); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 519 | led_trigger_event(nand_led_trigger, LED_OFF); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 520 | } |
David Woodhouse | 4b648b0 | 2006-09-25 17:05:24 +0100 | [diff] [blame] | 521 | EXPORT_SYMBOL_GPL(nand_wait_ready); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 522 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 523 | /** |
| 524 | * nand_command - [DEFAULT] Send command to NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 525 | * @mtd: MTD device structure |
| 526 | * @command: the command to be sent |
| 527 | * @column: the column address for this command, -1 if none |
| 528 | * @page_addr: the page address for this command, -1 if none |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 529 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 530 | * Send command to NAND device. This function is used for small page devices |
| 531 | * (256/512 Bytes per page). |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 532 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 533 | static void nand_command(struct mtd_info *mtd, unsigned int command, |
| 534 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 535 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 536 | register struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 537 | int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 538 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 539 | /* Write out the command to the device */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 540 | if (command == NAND_CMD_SEQIN) { |
| 541 | int readcmd; |
| 542 | |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 543 | if (column >= mtd->writesize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 544 | /* OOB area */ |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 545 | column -= mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 546 | readcmd = NAND_CMD_READOOB; |
| 547 | } else if (column < 256) { |
| 548 | /* First 256 bytes --> READ0 */ |
| 549 | readcmd = NAND_CMD_READ0; |
| 550 | } else { |
| 551 | column -= 256; |
| 552 | readcmd = NAND_CMD_READ1; |
| 553 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 554 | chip->cmd_ctrl(mtd, readcmd, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 555 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 556 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 557 | chip->cmd_ctrl(mtd, command, ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 558 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 559 | /* Address cycle, when necessary */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 560 | ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE; |
| 561 | /* Serially input address */ |
| 562 | if (column != -1) { |
| 563 | /* Adjust columns for 16 bit buswidth */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 564 | if (chip->options & NAND_BUSWIDTH_16) |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 565 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 566 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 567 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 568 | } |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 569 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 570 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 571 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 572 | chip->cmd_ctrl(mtd, page_addr >> 8, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 573 | /* One more address cycle for devices > 32MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 574 | if (chip->chipsize > (32 << 20)) |
| 575 | chip->cmd_ctrl(mtd, page_addr >> 16, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 576 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 577 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 578 | |
| 579 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 580 | * Program and erase have their own busy handlers status and sequential |
| 581 | * in needs no delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 582 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 583 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 584 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 585 | case NAND_CMD_PAGEPROG: |
| 586 | case NAND_CMD_ERASE1: |
| 587 | case NAND_CMD_ERASE2: |
| 588 | case NAND_CMD_SEQIN: |
| 589 | case NAND_CMD_STATUS: |
| 590 | return; |
| 591 | |
| 592 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 593 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 594 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 595 | udelay(chip->chip_delay); |
| 596 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 597 | NAND_CTRL_CLE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 598 | chip->cmd_ctrl(mtd, |
| 599 | NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 600 | while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) |
| 601 | ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 602 | return; |
| 603 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 604 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 605 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 606 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 607 | * If we don't have access to the busy pin, we apply the given |
| 608 | * command delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 609 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 610 | if (!chip->dev_ready) { |
| 611 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 612 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 613 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 614 | } |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 615 | /* |
| 616 | * Apply this short delay always to ensure that we do wait tWB in |
| 617 | * any case on any machine. |
| 618 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 619 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 620 | |
| 621 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 622 | } |
| 623 | |
| 624 | /** |
| 625 | * nand_command_lp - [DEFAULT] Send command to NAND large page device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 626 | * @mtd: MTD device structure |
| 627 | * @command: the command to be sent |
| 628 | * @column: the column address for this command, -1 if none |
| 629 | * @page_addr: the page address for this command, -1 if none |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 630 | * |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 631 | * Send command to NAND device. This is the version for the new large page |
| 632 | * devices We dont have the separate regions as we have in the small page |
| 633 | * devices. We must emulate NAND_CMD_READOOB to keep the code compatible. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 634 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 635 | static void nand_command_lp(struct mtd_info *mtd, unsigned int command, |
| 636 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 637 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 638 | register struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 639 | |
| 640 | /* Emulate NAND_CMD_READOOB */ |
| 641 | if (command == NAND_CMD_READOOB) { |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 642 | column += mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 643 | command = NAND_CMD_READ0; |
| 644 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 645 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 646 | /* Command latch cycle */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 647 | chip->cmd_ctrl(mtd, command & 0xff, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 648 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 649 | |
| 650 | if (column != -1 || page_addr != -1) { |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 651 | int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 652 | |
| 653 | /* Serially input address */ |
| 654 | if (column != -1) { |
| 655 | /* Adjust columns for 16 bit buswidth */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 656 | if (chip->options & NAND_BUSWIDTH_16) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 657 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 658 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 659 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 660 | chip->cmd_ctrl(mtd, column >> 8, ctrl); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 661 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 662 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 663 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
| 664 | chip->cmd_ctrl(mtd, page_addr >> 8, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 665 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 666 | /* One more address cycle for devices > 128MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 667 | if (chip->chipsize > (128 << 20)) |
| 668 | chip->cmd_ctrl(mtd, page_addr >> 16, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 669 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 670 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 671 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 672 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 673 | |
| 674 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 675 | * Program and erase have their own busy handlers status, sequential |
| 676 | * in, and deplete1 need no delay. |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 677 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 678 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 679 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 680 | case NAND_CMD_CACHEDPROG: |
| 681 | case NAND_CMD_PAGEPROG: |
| 682 | case NAND_CMD_ERASE1: |
| 683 | case NAND_CMD_ERASE2: |
| 684 | case NAND_CMD_SEQIN: |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 685 | case NAND_CMD_RNDIN: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 686 | case NAND_CMD_STATUS: |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 687 | case NAND_CMD_DEPLETE1: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 688 | return; |
| 689 | |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 690 | case NAND_CMD_STATUS_ERROR: |
| 691 | case NAND_CMD_STATUS_ERROR0: |
| 692 | case NAND_CMD_STATUS_ERROR1: |
| 693 | case NAND_CMD_STATUS_ERROR2: |
| 694 | case NAND_CMD_STATUS_ERROR3: |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 695 | /* Read error status commands require only a short delay */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 696 | udelay(chip->chip_delay); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 697 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 698 | |
| 699 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 700 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 701 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 702 | udelay(chip->chip_delay); |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 703 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
| 704 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 705 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 706 | NAND_NCE | NAND_CTRL_CHANGE); |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 707 | while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) |
| 708 | ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 709 | return; |
| 710 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 711 | case NAND_CMD_RNDOUT: |
| 712 | /* No ready / busy check necessary */ |
| 713 | chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART, |
| 714 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 715 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 716 | NAND_NCE | NAND_CTRL_CHANGE); |
| 717 | return; |
| 718 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 719 | case NAND_CMD_READ0: |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 720 | chip->cmd_ctrl(mtd, NAND_CMD_READSTART, |
| 721 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 722 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 723 | NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 724 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 725 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 726 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 727 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 728 | * If we don't have access to the busy pin, we apply the given |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 729 | * command delay. |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 730 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 731 | if (!chip->dev_ready) { |
| 732 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 733 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 734 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 735 | } |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 736 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 737 | /* |
| 738 | * Apply this short delay always to ensure that we do wait tWB in |
| 739 | * any case on any machine. |
| 740 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 741 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 742 | |
| 743 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 744 | } |
| 745 | |
| 746 | /** |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 747 | * panic_nand_get_device - [GENERIC] Get chip for selected access |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 748 | * @chip: the nand chip descriptor |
| 749 | * @mtd: MTD device structure |
| 750 | * @new_state: the state which is requested |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 751 | * |
| 752 | * Used when in panic, no locks are taken. |
| 753 | */ |
| 754 | static void panic_nand_get_device(struct nand_chip *chip, |
| 755 | struct mtd_info *mtd, int new_state) |
| 756 | { |
| 757 | /* Hardware controller shared among independend devices */ |
| 758 | chip->controller->active = chip; |
| 759 | chip->state = new_state; |
| 760 | } |
| 761 | |
| 762 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 763 | * nand_get_device - [GENERIC] Get chip for selected access |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 764 | * @chip: the nand chip descriptor |
| 765 | * @mtd: MTD device structure |
| 766 | * @new_state: the state which is requested |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 767 | * |
| 768 | * Get the device and lock it for exclusive access |
| 769 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 770 | static int |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 771 | nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 772 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 773 | spinlock_t *lock = &chip->controller->lock; |
| 774 | wait_queue_head_t *wq = &chip->controller->wq; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 775 | DECLARE_WAITQUEUE(wait, current); |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 776 | retry: |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 777 | spin_lock(lock); |
| 778 | |
vimal singh | b8b3ee9 | 2009-07-09 20:41:22 +0530 | [diff] [blame] | 779 | /* Hardware controller shared among independent devices */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 780 | if (!chip->controller->active) |
| 781 | chip->controller->active = chip; |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 782 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 783 | if (chip->controller->active == chip && chip->state == FL_READY) { |
| 784 | chip->state = new_state; |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 785 | spin_unlock(lock); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 786 | return 0; |
| 787 | } |
| 788 | if (new_state == FL_PM_SUSPENDED) { |
Li Yang | 6b0d9a8 | 2009-11-17 14:45:49 -0800 | [diff] [blame] | 789 | if (chip->controller->active->state == FL_PM_SUSPENDED) { |
| 790 | chip->state = FL_PM_SUSPENDED; |
| 791 | spin_unlock(lock); |
| 792 | return 0; |
Li Yang | 6b0d9a8 | 2009-11-17 14:45:49 -0800 | [diff] [blame] | 793 | } |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 794 | } |
| 795 | set_current_state(TASK_UNINTERRUPTIBLE); |
| 796 | add_wait_queue(wq, &wait); |
| 797 | spin_unlock(lock); |
| 798 | schedule(); |
| 799 | remove_wait_queue(wq, &wait); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 800 | goto retry; |
| 801 | } |
| 802 | |
| 803 | /** |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 804 | * panic_nand_wait - [GENERIC] wait until the command is done |
| 805 | * @mtd: MTD device structure |
| 806 | * @chip: NAND chip structure |
| 807 | * @timeo: timeout |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 808 | * |
| 809 | * Wait for command done. This is a helper function for nand_wait used when |
| 810 | * we are in interrupt context. May happen when in panic and trying to write |
Uwe Kleine-König | b595076 | 2010-11-01 15:38:34 -0400 | [diff] [blame] | 811 | * an oops through mtdoops. |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 812 | */ |
| 813 | static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip, |
| 814 | unsigned long timeo) |
| 815 | { |
| 816 | int i; |
| 817 | for (i = 0; i < timeo; i++) { |
| 818 | if (chip->dev_ready) { |
| 819 | if (chip->dev_ready(mtd)) |
| 820 | break; |
| 821 | } else { |
| 822 | if (chip->read_byte(mtd) & NAND_STATUS_READY) |
| 823 | break; |
| 824 | } |
| 825 | mdelay(1); |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 826 | } |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 827 | } |
| 828 | |
| 829 | /** |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 830 | * nand_wait - [DEFAULT] wait until the command is done |
| 831 | * @mtd: MTD device structure |
| 832 | * @chip: NAND chip structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 833 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 834 | * Wait for command done. This applies to erase and program only. Erase can |
| 835 | * take up to 400ms and program up to 20ms according to general NAND and |
| 836 | * SmartMedia specs. |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 837 | */ |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 838 | static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 839 | { |
| 840 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 841 | unsigned long timeo = jiffies; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 842 | int status, state = chip->state; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 843 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 844 | if (state == FL_ERASING) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 845 | timeo += (HZ * 400) / 1000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 846 | else |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 847 | timeo += (HZ * 20) / 1000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 848 | |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 849 | led_trigger_event(nand_led_trigger, LED_FULL); |
| 850 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 851 | /* |
| 852 | * Apply this short delay always to ensure that we do wait tWB in any |
| 853 | * case on any machine. |
| 854 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 855 | ndelay(100); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 856 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 857 | if ((state == FL_ERASING) && (chip->options & NAND_IS_AND)) |
| 858 | chip->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 859 | else |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 860 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 861 | |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 862 | if (in_interrupt() || oops_in_progress) |
| 863 | panic_nand_wait(mtd, chip, timeo); |
| 864 | else { |
| 865 | while (time_before(jiffies, timeo)) { |
| 866 | if (chip->dev_ready) { |
| 867 | if (chip->dev_ready(mtd)) |
| 868 | break; |
| 869 | } else { |
| 870 | if (chip->read_byte(mtd) & NAND_STATUS_READY) |
| 871 | break; |
| 872 | } |
| 873 | cond_resched(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 874 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 875 | } |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 876 | led_trigger_event(nand_led_trigger, LED_OFF); |
| 877 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 878 | status = (int)chip->read_byte(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 879 | return status; |
| 880 | } |
| 881 | |
| 882 | /** |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 883 | * __nand_unlock - [REPLACEABLE] unlocks specified locked blocks |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 884 | * @mtd: mtd info |
| 885 | * @ofs: offset to start unlock from |
| 886 | * @len: length to unlock |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 887 | * @invert: when = 0, unlock the range of blocks within the lower and |
| 888 | * upper boundary address |
| 889 | * when = 1, unlock the range of blocks outside the boundaries |
| 890 | * of the lower and upper boundary address |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 891 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 892 | * Returs unlock status. |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 893 | */ |
| 894 | static int __nand_unlock(struct mtd_info *mtd, loff_t ofs, |
| 895 | uint64_t len, int invert) |
| 896 | { |
| 897 | int ret = 0; |
| 898 | int status, page; |
| 899 | struct nand_chip *chip = mtd->priv; |
| 900 | |
| 901 | /* Submit address of first page to unlock */ |
| 902 | page = ofs >> chip->page_shift; |
| 903 | chip->cmdfunc(mtd, NAND_CMD_UNLOCK1, -1, page & chip->pagemask); |
| 904 | |
| 905 | /* Submit address of last page to unlock */ |
| 906 | page = (ofs + len) >> chip->page_shift; |
| 907 | chip->cmdfunc(mtd, NAND_CMD_UNLOCK2, -1, |
| 908 | (page | invert) & chip->pagemask); |
| 909 | |
| 910 | /* Call wait ready function */ |
| 911 | status = chip->waitfunc(mtd, chip); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 912 | /* See if device thinks it succeeded */ |
| 913 | if (status & 0x01) { |
| 914 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Error status = 0x%08x\n", |
| 915 | __func__, status); |
| 916 | ret = -EIO; |
| 917 | } |
| 918 | |
| 919 | return ret; |
| 920 | } |
| 921 | |
| 922 | /** |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 923 | * nand_unlock - [REPLACEABLE] unlocks specified locked blocks |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 924 | * @mtd: mtd info |
| 925 | * @ofs: offset to start unlock from |
| 926 | * @len: length to unlock |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 927 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 928 | * Returns unlock status. |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 929 | */ |
| 930 | int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) |
| 931 | { |
| 932 | int ret = 0; |
| 933 | int chipnr; |
| 934 | struct nand_chip *chip = mtd->priv; |
| 935 | |
| 936 | DEBUG(MTD_DEBUG_LEVEL3, "%s: start = 0x%012llx, len = %llu\n", |
| 937 | __func__, (unsigned long long)ofs, len); |
| 938 | |
| 939 | if (check_offs_len(mtd, ofs, len)) |
| 940 | ret = -EINVAL; |
| 941 | |
| 942 | /* Align to last block address if size addresses end of the device */ |
| 943 | if (ofs + len == mtd->size) |
| 944 | len -= mtd->erasesize; |
| 945 | |
| 946 | nand_get_device(chip, mtd, FL_UNLOCKING); |
| 947 | |
| 948 | /* Shift to get chip number */ |
| 949 | chipnr = ofs >> chip->chip_shift; |
| 950 | |
| 951 | chip->select_chip(mtd, chipnr); |
| 952 | |
| 953 | /* Check, if it is write protected */ |
| 954 | if (nand_check_wp(mtd)) { |
| 955 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Device is write protected!!!\n", |
| 956 | __func__); |
| 957 | ret = -EIO; |
| 958 | goto out; |
| 959 | } |
| 960 | |
| 961 | ret = __nand_unlock(mtd, ofs, len, 0); |
| 962 | |
| 963 | out: |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 964 | nand_release_device(mtd); |
| 965 | |
| 966 | return ret; |
| 967 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 968 | EXPORT_SYMBOL(nand_unlock); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 969 | |
| 970 | /** |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 971 | * nand_lock - [REPLACEABLE] locks all blocks present in the device |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 972 | * @mtd: mtd info |
| 973 | * @ofs: offset to start unlock from |
| 974 | * @len: length to unlock |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 975 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 976 | * This feature is not supported in many NAND parts. 'Micron' NAND parts do |
| 977 | * have this feature, but it allows only to lock all blocks, not for specified |
| 978 | * range for block. Implementing 'lock' feature by making use of 'unlock', for |
| 979 | * now. |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 980 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 981 | * Returns lock status. |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 982 | */ |
| 983 | int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) |
| 984 | { |
| 985 | int ret = 0; |
| 986 | int chipnr, status, page; |
| 987 | struct nand_chip *chip = mtd->priv; |
| 988 | |
| 989 | DEBUG(MTD_DEBUG_LEVEL3, "%s: start = 0x%012llx, len = %llu\n", |
| 990 | __func__, (unsigned long long)ofs, len); |
| 991 | |
| 992 | if (check_offs_len(mtd, ofs, len)) |
| 993 | ret = -EINVAL; |
| 994 | |
| 995 | nand_get_device(chip, mtd, FL_LOCKING); |
| 996 | |
| 997 | /* Shift to get chip number */ |
| 998 | chipnr = ofs >> chip->chip_shift; |
| 999 | |
| 1000 | chip->select_chip(mtd, chipnr); |
| 1001 | |
| 1002 | /* Check, if it is write protected */ |
| 1003 | if (nand_check_wp(mtd)) { |
| 1004 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Device is write protected!!!\n", |
| 1005 | __func__); |
| 1006 | status = MTD_ERASE_FAILED; |
| 1007 | ret = -EIO; |
| 1008 | goto out; |
| 1009 | } |
| 1010 | |
| 1011 | /* Submit address of first page to lock */ |
| 1012 | page = ofs >> chip->page_shift; |
| 1013 | chip->cmdfunc(mtd, NAND_CMD_LOCK, -1, page & chip->pagemask); |
| 1014 | |
| 1015 | /* Call wait ready function */ |
| 1016 | status = chip->waitfunc(mtd, chip); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1017 | /* See if device thinks it succeeded */ |
| 1018 | if (status & 0x01) { |
| 1019 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Error status = 0x%08x\n", |
| 1020 | __func__, status); |
| 1021 | ret = -EIO; |
| 1022 | goto out; |
| 1023 | } |
| 1024 | |
| 1025 | ret = __nand_unlock(mtd, ofs, len, 0x1); |
| 1026 | |
| 1027 | out: |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1028 | nand_release_device(mtd); |
| 1029 | |
| 1030 | return ret; |
| 1031 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1032 | EXPORT_SYMBOL(nand_lock); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1033 | |
| 1034 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1035 | * nand_read_page_raw - [Intern] read raw page data without ecc |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1036 | * @mtd: mtd info structure |
| 1037 | * @chip: nand chip info structure |
| 1038 | * @buf: buffer to store read data |
| 1039 | * @page: page number to read |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1040 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1041 | * Not for syndrome calculating ecc controllers, which use a special oob |
| 1042 | * layout. |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1043 | */ |
| 1044 | static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, |
Sneha Narnakaje | 46a8cf2 | 2009-09-18 12:51:46 -0700 | [diff] [blame] | 1045 | uint8_t *buf, int page) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1046 | { |
| 1047 | chip->read_buf(mtd, buf, mtd->writesize); |
| 1048 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1049 | return 0; |
| 1050 | } |
| 1051 | |
| 1052 | /** |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1053 | * nand_read_page_raw_syndrome - [Intern] read raw page data without ecc |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1054 | * @mtd: mtd info structure |
| 1055 | * @chip: nand chip info structure |
| 1056 | * @buf: buffer to store read data |
| 1057 | * @page: page number to read |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1058 | * |
| 1059 | * We need a special oob layout and handling even when OOB isn't used. |
| 1060 | */ |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1061 | static int nand_read_page_raw_syndrome(struct mtd_info *mtd, |
| 1062 | struct nand_chip *chip, |
| 1063 | uint8_t *buf, int page) |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1064 | { |
| 1065 | int eccsize = chip->ecc.size; |
| 1066 | int eccbytes = chip->ecc.bytes; |
| 1067 | uint8_t *oob = chip->oob_poi; |
| 1068 | int steps, size; |
| 1069 | |
| 1070 | for (steps = chip->ecc.steps; steps > 0; steps--) { |
| 1071 | chip->read_buf(mtd, buf, eccsize); |
| 1072 | buf += eccsize; |
| 1073 | |
| 1074 | if (chip->ecc.prepad) { |
| 1075 | chip->read_buf(mtd, oob, chip->ecc.prepad); |
| 1076 | oob += chip->ecc.prepad; |
| 1077 | } |
| 1078 | |
| 1079 | chip->read_buf(mtd, oob, eccbytes); |
| 1080 | oob += eccbytes; |
| 1081 | |
| 1082 | if (chip->ecc.postpad) { |
| 1083 | chip->read_buf(mtd, oob, chip->ecc.postpad); |
| 1084 | oob += chip->ecc.postpad; |
| 1085 | } |
| 1086 | } |
| 1087 | |
| 1088 | size = mtd->oobsize - (oob - chip->oob_poi); |
| 1089 | if (size) |
| 1090 | chip->read_buf(mtd, oob, size); |
| 1091 | |
| 1092 | return 0; |
| 1093 | } |
| 1094 | |
| 1095 | /** |
Artem Bityutskiy | d29ebdb | 2006-10-19 16:04:02 +0300 | [diff] [blame] | 1096 | * nand_read_page_swecc - [REPLACABLE] software ecc based page read function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1097 | * @mtd: mtd info structure |
| 1098 | * @chip: nand chip info structure |
| 1099 | * @buf: buffer to store read data |
| 1100 | * @page: page number to read |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1101 | */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1102 | static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
Sneha Narnakaje | 46a8cf2 | 2009-09-18 12:51:46 -0700 | [diff] [blame] | 1103 | uint8_t *buf, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1104 | { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1105 | int i, eccsize = chip->ecc.size; |
| 1106 | int eccbytes = chip->ecc.bytes; |
| 1107 | int eccsteps = chip->ecc.steps; |
| 1108 | uint8_t *p = buf; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1109 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
| 1110 | uint8_t *ecc_code = chip->buffers->ecccode; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 1111 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1112 | |
Sneha Narnakaje | 46a8cf2 | 2009-09-18 12:51:46 -0700 | [diff] [blame] | 1113 | chip->ecc.read_page_raw(mtd, chip, buf, page); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1114 | |
| 1115 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) |
| 1116 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1117 | |
| 1118 | for (i = 0; i < chip->ecc.total; i++) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1119 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1120 | |
| 1121 | eccsteps = chip->ecc.steps; |
| 1122 | p = buf; |
| 1123 | |
| 1124 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1125 | int stat; |
| 1126 | |
| 1127 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
Matt Reimer | c32b8dc | 2007-10-17 14:33:23 -0700 | [diff] [blame] | 1128 | if (stat < 0) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1129 | mtd->ecc_stats.failed++; |
| 1130 | else |
| 1131 | mtd->ecc_stats.corrected += stat; |
| 1132 | } |
| 1133 | return 0; |
Thomas Gleixner | 22c60f5 | 2005-04-04 19:56:32 +0100 | [diff] [blame] | 1134 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1135 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1136 | /** |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1137 | * nand_read_subpage - [REPLACABLE] software ecc based sub-page read function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1138 | * @mtd: mtd info structure |
| 1139 | * @chip: nand chip info structure |
| 1140 | * @data_offs: offset of requested data within the page |
| 1141 | * @readlen: data length |
| 1142 | * @bufpoi: buffer to store read data |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1143 | */ |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1144 | static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, |
| 1145 | uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi) |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1146 | { |
| 1147 | int start_step, end_step, num_steps; |
| 1148 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
| 1149 | uint8_t *p; |
| 1150 | int data_col_addr, i, gaps = 0; |
| 1151 | int datafrag_len, eccfrag_len, aligned_len, aligned_pos; |
| 1152 | int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1; |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1153 | int index = 0; |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1154 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1155 | /* Column address wihin the page aligned to ECC size (256bytes) */ |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1156 | start_step = data_offs / chip->ecc.size; |
| 1157 | end_step = (data_offs + readlen - 1) / chip->ecc.size; |
| 1158 | num_steps = end_step - start_step + 1; |
| 1159 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1160 | /* Data size aligned to ECC ecc.size */ |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1161 | datafrag_len = num_steps * chip->ecc.size; |
| 1162 | eccfrag_len = num_steps * chip->ecc.bytes; |
| 1163 | |
| 1164 | data_col_addr = start_step * chip->ecc.size; |
| 1165 | /* If we read not a page aligned data */ |
| 1166 | if (data_col_addr != 0) |
| 1167 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1); |
| 1168 | |
| 1169 | p = bufpoi + data_col_addr; |
| 1170 | chip->read_buf(mtd, p, datafrag_len); |
| 1171 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1172 | /* Calculate ECC */ |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1173 | for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) |
| 1174 | chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]); |
| 1175 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1176 | /* |
| 1177 | * The performance is faster if we position offsets according to |
| 1178 | * ecc.pos. Let's make sure that there are no gaps in ecc positions. |
| 1179 | */ |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1180 | for (i = 0; i < eccfrag_len - 1; i++) { |
| 1181 | if (eccpos[i + start_step * chip->ecc.bytes] + 1 != |
| 1182 | eccpos[i + start_step * chip->ecc.bytes + 1]) { |
| 1183 | gaps = 1; |
| 1184 | break; |
| 1185 | } |
| 1186 | } |
| 1187 | if (gaps) { |
| 1188 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1); |
| 1189 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1190 | } else { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1191 | /* |
| 1192 | * Send the command to read the particular ecc bytes take care |
| 1193 | * about buswidth alignment in read_buf. |
| 1194 | */ |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1195 | index = start_step * chip->ecc.bytes; |
| 1196 | |
| 1197 | aligned_pos = eccpos[index] & ~(busw - 1); |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1198 | aligned_len = eccfrag_len; |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1199 | if (eccpos[index] & (busw - 1)) |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1200 | aligned_len++; |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1201 | if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1)) |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1202 | aligned_len++; |
| 1203 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1204 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, |
| 1205 | mtd->writesize + aligned_pos, -1); |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1206 | chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len); |
| 1207 | } |
| 1208 | |
| 1209 | for (i = 0; i < eccfrag_len; i++) |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1210 | chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]]; |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1211 | |
| 1212 | p = bufpoi + data_col_addr; |
| 1213 | for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) { |
| 1214 | int stat; |
| 1215 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1216 | stat = chip->ecc.correct(mtd, p, |
| 1217 | &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]); |
Baruch Siach | 12c8eb9 | 2010-08-09 07:20:23 +0300 | [diff] [blame] | 1218 | if (stat < 0) |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1219 | mtd->ecc_stats.failed++; |
| 1220 | else |
| 1221 | mtd->ecc_stats.corrected += stat; |
| 1222 | } |
| 1223 | return 0; |
| 1224 | } |
| 1225 | |
| 1226 | /** |
Artem Bityutskiy | d29ebdb | 2006-10-19 16:04:02 +0300 | [diff] [blame] | 1227 | * nand_read_page_hwecc - [REPLACABLE] hardware ecc based page read function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1228 | * @mtd: mtd info structure |
| 1229 | * @chip: nand chip info structure |
| 1230 | * @buf: buffer to store read data |
| 1231 | * @page: page number to read |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1232 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1233 | * Not for syndrome calculating ecc controllers which need a special oob |
| 1234 | * layout. |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1235 | */ |
| 1236 | static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, |
Sneha Narnakaje | 46a8cf2 | 2009-09-18 12:51:46 -0700 | [diff] [blame] | 1237 | uint8_t *buf, int page) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1238 | { |
| 1239 | int i, eccsize = chip->ecc.size; |
| 1240 | int eccbytes = chip->ecc.bytes; |
| 1241 | int eccsteps = chip->ecc.steps; |
| 1242 | uint8_t *p = buf; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1243 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
| 1244 | uint8_t *ecc_code = chip->buffers->ecccode; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 1245 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1246 | |
| 1247 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1248 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 1249 | chip->read_buf(mtd, p, eccsize); |
| 1250 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1251 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1252 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1253 | |
| 1254 | for (i = 0; i < chip->ecc.total; i++) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1255 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1256 | |
| 1257 | eccsteps = chip->ecc.steps; |
| 1258 | p = buf; |
| 1259 | |
| 1260 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1261 | int stat; |
| 1262 | |
| 1263 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
Matt Reimer | c32b8dc | 2007-10-17 14:33:23 -0700 | [diff] [blame] | 1264 | if (stat < 0) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1265 | mtd->ecc_stats.failed++; |
| 1266 | else |
| 1267 | mtd->ecc_stats.corrected += stat; |
| 1268 | } |
| 1269 | return 0; |
| 1270 | } |
| 1271 | |
| 1272 | /** |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1273 | * nand_read_page_hwecc_oob_first - [REPLACABLE] hw ecc, read oob first |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1274 | * @mtd: mtd info structure |
| 1275 | * @chip: nand chip info structure |
| 1276 | * @buf: buffer to store read data |
| 1277 | * @page: page number to read |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1278 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1279 | * Hardware ECC for large page chips, require OOB to be read first. For this |
| 1280 | * ECC mode, the write_page method is re-used from ECC_HW. These methods |
| 1281 | * read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with |
| 1282 | * multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from |
| 1283 | * the data area, by overwriting the NAND manufacturer bad block markings. |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1284 | */ |
| 1285 | static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd, |
| 1286 | struct nand_chip *chip, uint8_t *buf, int page) |
| 1287 | { |
| 1288 | int i, eccsize = chip->ecc.size; |
| 1289 | int eccbytes = chip->ecc.bytes; |
| 1290 | int eccsteps = chip->ecc.steps; |
| 1291 | uint8_t *p = buf; |
| 1292 | uint8_t *ecc_code = chip->buffers->ecccode; |
| 1293 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
| 1294 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
| 1295 | |
| 1296 | /* Read the OOB area first */ |
| 1297 | chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); |
| 1298 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1299 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); |
| 1300 | |
| 1301 | for (i = 0; i < chip->ecc.total; i++) |
| 1302 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
| 1303 | |
| 1304 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1305 | int stat; |
| 1306 | |
| 1307 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 1308 | chip->read_buf(mtd, p, eccsize); |
| 1309 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1310 | |
| 1311 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL); |
| 1312 | if (stat < 0) |
| 1313 | mtd->ecc_stats.failed++; |
| 1314 | else |
| 1315 | mtd->ecc_stats.corrected += stat; |
| 1316 | } |
| 1317 | return 0; |
| 1318 | } |
| 1319 | |
| 1320 | /** |
Artem Bityutskiy | d29ebdb | 2006-10-19 16:04:02 +0300 | [diff] [blame] | 1321 | * nand_read_page_syndrome - [REPLACABLE] hardware ecc syndrom based page read |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1322 | * @mtd: mtd info structure |
| 1323 | * @chip: nand chip info structure |
| 1324 | * @buf: buffer to store read data |
| 1325 | * @page: page number to read |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1326 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1327 | * The hw generator calculates the error syndrome automatically. Therefore we |
| 1328 | * need a special oob layout and handling. |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1329 | */ |
| 1330 | static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
Sneha Narnakaje | 46a8cf2 | 2009-09-18 12:51:46 -0700 | [diff] [blame] | 1331 | uint8_t *buf, int page) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1332 | { |
| 1333 | int i, eccsize = chip->ecc.size; |
| 1334 | int eccbytes = chip->ecc.bytes; |
| 1335 | int eccsteps = chip->ecc.steps; |
| 1336 | uint8_t *p = buf; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1337 | uint8_t *oob = chip->oob_poi; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1338 | |
| 1339 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1340 | int stat; |
| 1341 | |
| 1342 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 1343 | chip->read_buf(mtd, p, eccsize); |
| 1344 | |
| 1345 | if (chip->ecc.prepad) { |
| 1346 | chip->read_buf(mtd, oob, chip->ecc.prepad); |
| 1347 | oob += chip->ecc.prepad; |
| 1348 | } |
| 1349 | |
| 1350 | chip->ecc.hwctl(mtd, NAND_ECC_READSYN); |
| 1351 | chip->read_buf(mtd, oob, eccbytes); |
| 1352 | stat = chip->ecc.correct(mtd, p, oob, NULL); |
| 1353 | |
Matt Reimer | c32b8dc | 2007-10-17 14:33:23 -0700 | [diff] [blame] | 1354 | if (stat < 0) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1355 | mtd->ecc_stats.failed++; |
| 1356 | else |
| 1357 | mtd->ecc_stats.corrected += stat; |
| 1358 | |
| 1359 | oob += eccbytes; |
| 1360 | |
| 1361 | if (chip->ecc.postpad) { |
| 1362 | chip->read_buf(mtd, oob, chip->ecc.postpad); |
| 1363 | oob += chip->ecc.postpad; |
| 1364 | } |
| 1365 | } |
| 1366 | |
| 1367 | /* Calculate remaining oob bytes */ |
Vitaly Wool | 7e4178f | 2006-06-07 09:34:37 +0400 | [diff] [blame] | 1368 | i = mtd->oobsize - (oob - chip->oob_poi); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1369 | if (i) |
| 1370 | chip->read_buf(mtd, oob, i); |
| 1371 | |
| 1372 | return 0; |
| 1373 | } |
| 1374 | |
| 1375 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1376 | * nand_transfer_oob - [Internal] Transfer oob to client buffer |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1377 | * @chip: nand chip structure |
| 1378 | * @oob: oob destination address |
| 1379 | * @ops: oob ops structure |
| 1380 | * @len: size of oob to transfer |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1381 | */ |
| 1382 | static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob, |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1383 | struct mtd_oob_ops *ops, size_t len) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1384 | { |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1385 | switch (ops->mode) { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1386 | |
| 1387 | case MTD_OOB_PLACE: |
| 1388 | case MTD_OOB_RAW: |
| 1389 | memcpy(oob, chip->oob_poi + ops->ooboffs, len); |
| 1390 | return oob + len; |
| 1391 | |
| 1392 | case MTD_OOB_AUTO: { |
| 1393 | struct nand_oobfree *free = chip->ecc.layout->oobfree; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1394 | uint32_t boffs = 0, roffs = ops->ooboffs; |
| 1395 | size_t bytes = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1396 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1397 | for (; free->length && len; free++, len -= bytes) { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1398 | /* Read request not from offset 0? */ |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1399 | if (unlikely(roffs)) { |
| 1400 | if (roffs >= free->length) { |
| 1401 | roffs -= free->length; |
| 1402 | continue; |
| 1403 | } |
| 1404 | boffs = free->offset + roffs; |
| 1405 | bytes = min_t(size_t, len, |
| 1406 | (free->length - roffs)); |
| 1407 | roffs = 0; |
| 1408 | } else { |
| 1409 | bytes = min_t(size_t, len, free->length); |
| 1410 | boffs = free->offset; |
| 1411 | } |
| 1412 | memcpy(oob, chip->oob_poi + boffs, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1413 | oob += bytes; |
| 1414 | } |
| 1415 | return oob; |
| 1416 | } |
| 1417 | default: |
| 1418 | BUG(); |
| 1419 | } |
| 1420 | return NULL; |
| 1421 | } |
| 1422 | |
| 1423 | /** |
| 1424 | * nand_do_read_ops - [Internal] Read data with ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1425 | * @mtd: MTD device structure |
| 1426 | * @from: offset to read from |
| 1427 | * @ops: oob ops structure |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1428 | * |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1429 | * Internal function. Called with chip held. |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1430 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1431 | static int nand_do_read_ops(struct mtd_info *mtd, loff_t from, |
| 1432 | struct mtd_oob_ops *ops) |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1433 | { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1434 | int chipnr, page, realpage, col, bytes, aligned; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1435 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1436 | struct mtd_ecc_stats stats; |
| 1437 | int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
| 1438 | int sndcmd = 1; |
| 1439 | int ret = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1440 | uint32_t readlen = ops->len; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1441 | uint32_t oobreadlen = ops->ooblen; |
Maxim Levitsky | 9aca334 | 2010-02-22 20:39:35 +0200 | [diff] [blame] | 1442 | uint32_t max_oobsize = ops->mode == MTD_OOB_AUTO ? |
| 1443 | mtd->oobavail : mtd->oobsize; |
| 1444 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1445 | uint8_t *bufpoi, *oob, *buf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1446 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1447 | stats = mtd->ecc_stats; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1448 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1449 | chipnr = (int)(from >> chip->chip_shift); |
| 1450 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1451 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1452 | realpage = (int)(from >> chip->page_shift); |
| 1453 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1454 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1455 | col = (int)(from & (mtd->writesize - 1)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1456 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1457 | buf = ops->datbuf; |
| 1458 | oob = ops->oobbuf; |
| 1459 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1460 | while (1) { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1461 | bytes = min(mtd->writesize - col, readlen); |
| 1462 | aligned = (bytes == mtd->writesize); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1463 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1464 | /* Is the current page in the buffer? */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1465 | if (realpage != chip->pagebuf || oob) { |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1466 | bufpoi = aligned ? buf : chip->buffers->databuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1467 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1468 | if (likely(sndcmd)) { |
| 1469 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); |
| 1470 | sndcmd = 0; |
| 1471 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1472 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1473 | /* Now read the page into the buffer */ |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 1474 | if (unlikely(ops->mode == MTD_OOB_RAW)) |
Sneha Narnakaje | 46a8cf2 | 2009-09-18 12:51:46 -0700 | [diff] [blame] | 1475 | ret = chip->ecc.read_page_raw(mtd, chip, |
| 1476 | bufpoi, page); |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1477 | else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob) |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1478 | ret = chip->ecc.read_subpage(mtd, chip, |
| 1479 | col, bytes, bufpoi); |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 1480 | else |
Sneha Narnakaje | 46a8cf2 | 2009-09-18 12:51:46 -0700 | [diff] [blame] | 1481 | ret = chip->ecc.read_page(mtd, chip, bufpoi, |
| 1482 | page); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1483 | if (ret < 0) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1484 | break; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1485 | |
| 1486 | /* Transfer not aligned data */ |
| 1487 | if (!aligned) { |
Artem Bityutskiy | c1194c7 | 2010-09-03 22:01:16 +0300 | [diff] [blame] | 1488 | if (!NAND_SUBPAGE_READ(chip) && !oob && |
| 1489 | !(mtd->ecc_stats.failed - stats.failed)) |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1490 | chip->pagebuf = realpage; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1491 | memcpy(buf, chip->buffers->databuf + col, bytes); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1492 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1493 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1494 | buf += bytes; |
| 1495 | |
| 1496 | if (unlikely(oob)) { |
Maxim Levitsky | 9aca334 | 2010-02-22 20:39:35 +0200 | [diff] [blame] | 1497 | |
Maxim Levitsky | b64d39d | 2010-02-22 20:39:37 +0200 | [diff] [blame] | 1498 | int toread = min(oobreadlen, max_oobsize); |
| 1499 | |
| 1500 | if (toread) { |
| 1501 | oob = nand_transfer_oob(chip, |
| 1502 | oob, ops, toread); |
| 1503 | oobreadlen -= toread; |
| 1504 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1505 | } |
| 1506 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1507 | if (!(chip->options & NAND_NO_READRDY)) { |
| 1508 | /* |
| 1509 | * Apply delay or wait for ready/busy pin. Do |
| 1510 | * this before the AUTOINCR check, so no |
| 1511 | * problems arise if a chip which does auto |
| 1512 | * increment is marked as NOAUTOINCR by the |
| 1513 | * board driver. |
| 1514 | */ |
| 1515 | if (!chip->dev_ready) |
| 1516 | udelay(chip->chip_delay); |
| 1517 | else |
| 1518 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1519 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1520 | } else { |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1521 | memcpy(buf, chip->buffers->databuf + col, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1522 | buf += bytes; |
| 1523 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1524 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1525 | readlen -= bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1526 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1527 | if (!readlen) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1528 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1529 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1530 | /* For subsequent reads align to page boundary */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1531 | col = 0; |
| 1532 | /* Increment page address */ |
| 1533 | realpage++; |
| 1534 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1535 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1536 | /* Check, if we cross a chip boundary */ |
| 1537 | if (!page) { |
| 1538 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1539 | chip->select_chip(mtd, -1); |
| 1540 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1541 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1542 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1543 | /* |
| 1544 | * Check, if the chip supports auto page increment or if we |
| 1545 | * have hit a block boundary. |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1546 | */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1547 | if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck)) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1548 | sndcmd = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1549 | } |
| 1550 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1551 | ops->retlen = ops->len - (size_t) readlen; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1552 | if (oob) |
| 1553 | ops->oobretlen = ops->ooblen - oobreadlen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1554 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1555 | if (ret) |
| 1556 | return ret; |
| 1557 | |
Thomas Gleixner | 9a1fcdf | 2006-05-29 14:56:39 +0200 | [diff] [blame] | 1558 | if (mtd->ecc_stats.failed - stats.failed) |
| 1559 | return -EBADMSG; |
| 1560 | |
| 1561 | return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1562 | } |
| 1563 | |
| 1564 | /** |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 1565 | * nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1566 | * @mtd: MTD device structure |
| 1567 | * @from: offset to read from |
| 1568 | * @len: number of bytes to read |
| 1569 | * @retlen: pointer to variable to store the number of read bytes |
| 1570 | * @buf: the databuffer to put data |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1571 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1572 | * Get hold of the chip and call nand_do_read. |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1573 | */ |
| 1574 | static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, |
| 1575 | size_t *retlen, uint8_t *buf) |
| 1576 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1577 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1578 | int ret; |
| 1579 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1580 | /* Do not allow reads past end of device */ |
| 1581 | if ((from + len) > mtd->size) |
| 1582 | return -EINVAL; |
| 1583 | if (!len) |
| 1584 | return 0; |
| 1585 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1586 | nand_get_device(chip, mtd, FL_READING); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1587 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1588 | chip->ops.len = len; |
| 1589 | chip->ops.datbuf = buf; |
| 1590 | chip->ops.oobbuf = NULL; |
| 1591 | |
| 1592 | ret = nand_do_read_ops(mtd, from, &chip->ops); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1593 | |
Richard Purdie | 7fd5aec | 2006-08-27 01:23:33 -0700 | [diff] [blame] | 1594 | *retlen = chip->ops.retlen; |
| 1595 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1596 | nand_release_device(mtd); |
| 1597 | |
| 1598 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1599 | } |
| 1600 | |
| 1601 | /** |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1602 | * nand_read_oob_std - [REPLACABLE] the most common OOB data read function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1603 | * @mtd: mtd info structure |
| 1604 | * @chip: nand chip info structure |
| 1605 | * @page: page number to read |
| 1606 | * @sndcmd: flag whether to issue read command or not |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1607 | */ |
| 1608 | static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip, |
| 1609 | int page, int sndcmd) |
| 1610 | { |
| 1611 | if (sndcmd) { |
| 1612 | chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); |
| 1613 | sndcmd = 0; |
| 1614 | } |
| 1615 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1616 | return sndcmd; |
| 1617 | } |
| 1618 | |
| 1619 | /** |
| 1620 | * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC |
| 1621 | * with syndromes |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1622 | * @mtd: mtd info structure |
| 1623 | * @chip: nand chip info structure |
| 1624 | * @page: page number to read |
| 1625 | * @sndcmd: flag whether to issue read command or not |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1626 | */ |
| 1627 | static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
| 1628 | int page, int sndcmd) |
| 1629 | { |
| 1630 | uint8_t *buf = chip->oob_poi; |
| 1631 | int length = mtd->oobsize; |
| 1632 | int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; |
| 1633 | int eccsize = chip->ecc.size; |
| 1634 | uint8_t *bufpoi = buf; |
| 1635 | int i, toread, sndrnd = 0, pos; |
| 1636 | |
| 1637 | chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page); |
| 1638 | for (i = 0; i < chip->ecc.steps; i++) { |
| 1639 | if (sndrnd) { |
| 1640 | pos = eccsize + i * (eccsize + chunk); |
| 1641 | if (mtd->writesize > 512) |
| 1642 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1); |
| 1643 | else |
| 1644 | chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page); |
| 1645 | } else |
| 1646 | sndrnd = 1; |
| 1647 | toread = min_t(int, length, chunk); |
| 1648 | chip->read_buf(mtd, bufpoi, toread); |
| 1649 | bufpoi += toread; |
| 1650 | length -= toread; |
| 1651 | } |
| 1652 | if (length > 0) |
| 1653 | chip->read_buf(mtd, bufpoi, length); |
| 1654 | |
| 1655 | return 1; |
| 1656 | } |
| 1657 | |
| 1658 | /** |
| 1659 | * nand_write_oob_std - [REPLACABLE] the most common OOB data write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1660 | * @mtd: mtd info structure |
| 1661 | * @chip: nand chip info structure |
| 1662 | * @page: page number to write |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1663 | */ |
| 1664 | static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip, |
| 1665 | int page) |
| 1666 | { |
| 1667 | int status = 0; |
| 1668 | const uint8_t *buf = chip->oob_poi; |
| 1669 | int length = mtd->oobsize; |
| 1670 | |
| 1671 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page); |
| 1672 | chip->write_buf(mtd, buf, length); |
| 1673 | /* Send command to program the OOB data */ |
| 1674 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
| 1675 | |
| 1676 | status = chip->waitfunc(mtd, chip); |
| 1677 | |
Savin Zlobec | 0d420f9 | 2006-06-21 11:51:20 +0200 | [diff] [blame] | 1678 | return status & NAND_STATUS_FAIL ? -EIO : 0; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1679 | } |
| 1680 | |
| 1681 | /** |
| 1682 | * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1683 | * with syndrome - only for large page flash |
| 1684 | * @mtd: mtd info structure |
| 1685 | * @chip: nand chip info structure |
| 1686 | * @page: page number to write |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1687 | */ |
| 1688 | static int nand_write_oob_syndrome(struct mtd_info *mtd, |
| 1689 | struct nand_chip *chip, int page) |
| 1690 | { |
| 1691 | int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; |
| 1692 | int eccsize = chip->ecc.size, length = mtd->oobsize; |
| 1693 | int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps; |
| 1694 | const uint8_t *bufpoi = chip->oob_poi; |
| 1695 | |
| 1696 | /* |
| 1697 | * data-ecc-data-ecc ... ecc-oob |
| 1698 | * or |
| 1699 | * data-pad-ecc-pad-data-pad .... ecc-pad-oob |
| 1700 | */ |
| 1701 | if (!chip->ecc.prepad && !chip->ecc.postpad) { |
| 1702 | pos = steps * (eccsize + chunk); |
| 1703 | steps = 0; |
| 1704 | } else |
Vitaly Wool | 8b0036e | 2006-07-11 09:11:25 +0200 | [diff] [blame] | 1705 | pos = eccsize; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1706 | |
| 1707 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page); |
| 1708 | for (i = 0; i < steps; i++) { |
| 1709 | if (sndcmd) { |
| 1710 | if (mtd->writesize <= 512) { |
| 1711 | uint32_t fill = 0xFFFFFFFF; |
| 1712 | |
| 1713 | len = eccsize; |
| 1714 | while (len > 0) { |
| 1715 | int num = min_t(int, len, 4); |
| 1716 | chip->write_buf(mtd, (uint8_t *)&fill, |
| 1717 | num); |
| 1718 | len -= num; |
| 1719 | } |
| 1720 | } else { |
| 1721 | pos = eccsize + i * (eccsize + chunk); |
| 1722 | chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1); |
| 1723 | } |
| 1724 | } else |
| 1725 | sndcmd = 1; |
| 1726 | len = min_t(int, length, chunk); |
| 1727 | chip->write_buf(mtd, bufpoi, len); |
| 1728 | bufpoi += len; |
| 1729 | length -= len; |
| 1730 | } |
| 1731 | if (length > 0) |
| 1732 | chip->write_buf(mtd, bufpoi, length); |
| 1733 | |
| 1734 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
| 1735 | status = chip->waitfunc(mtd, chip); |
| 1736 | |
| 1737 | return status & NAND_STATUS_FAIL ? -EIO : 0; |
| 1738 | } |
| 1739 | |
| 1740 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1741 | * nand_do_read_oob - [Intern] NAND read out-of-band |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1742 | * @mtd: MTD device structure |
| 1743 | * @from: offset to read from |
| 1744 | * @ops: oob operations description structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1745 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1746 | * NAND read out-of-band data from the spare area. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1747 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1748 | static int nand_do_read_oob(struct mtd_info *mtd, loff_t from, |
| 1749 | struct mtd_oob_ops *ops) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1750 | { |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1751 | int page, realpage, chipnr, sndcmd = 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1752 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1753 | int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1754 | int readlen = ops->ooblen; |
| 1755 | int len; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1756 | uint8_t *buf = ops->oobbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1757 | |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 1758 | DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08Lx, len = %i\n", |
| 1759 | __func__, (unsigned long long)from, readlen); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1760 | |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1761 | if (ops->mode == MTD_OOB_AUTO) |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1762 | len = chip->ecc.layout->oobavail; |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1763 | else |
| 1764 | len = mtd->oobsize; |
| 1765 | |
| 1766 | if (unlikely(ops->ooboffs >= len)) { |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 1767 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt to start read " |
| 1768 | "outside oob\n", __func__); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1769 | return -EINVAL; |
| 1770 | } |
| 1771 | |
| 1772 | /* Do not allow reads past end of device */ |
| 1773 | if (unlikely(from >= mtd->size || |
| 1774 | ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) - |
| 1775 | (from >> chip->page_shift)) * len)) { |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 1776 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt read beyond end " |
| 1777 | "of device\n", __func__); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1778 | return -EINVAL; |
| 1779 | } |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1780 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1781 | chipnr = (int)(from >> chip->chip_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1782 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1783 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1784 | /* Shift to get page */ |
| 1785 | realpage = (int)(from >> chip->page_shift); |
| 1786 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1787 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1788 | while (1) { |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1789 | sndcmd = chip->ecc.read_oob(mtd, chip, page, sndcmd); |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1790 | |
| 1791 | len = min(len, readlen); |
| 1792 | buf = nand_transfer_oob(chip, buf, ops, len); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1793 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1794 | if (!(chip->options & NAND_NO_READRDY)) { |
| 1795 | /* |
| 1796 | * Apply delay or wait for ready/busy pin. Do this |
| 1797 | * before the AUTOINCR check, so no problems arise if a |
| 1798 | * chip which does auto increment is marked as |
| 1799 | * NOAUTOINCR by the board driver. |
Thomas Gleixner | 19870da | 2005-07-15 14:53:51 +0100 | [diff] [blame] | 1800 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1801 | if (!chip->dev_ready) |
| 1802 | udelay(chip->chip_delay); |
Thomas Gleixner | 19870da | 2005-07-15 14:53:51 +0100 | [diff] [blame] | 1803 | else |
| 1804 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1805 | } |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1806 | |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1807 | readlen -= len; |
Savin Zlobec | 0d420f9 | 2006-06-21 11:51:20 +0200 | [diff] [blame] | 1808 | if (!readlen) |
| 1809 | break; |
| 1810 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1811 | /* Increment page address */ |
| 1812 | realpage++; |
| 1813 | |
| 1814 | page = realpage & chip->pagemask; |
| 1815 | /* Check, if we cross a chip boundary */ |
| 1816 | if (!page) { |
| 1817 | chipnr++; |
| 1818 | chip->select_chip(mtd, -1); |
| 1819 | chip->select_chip(mtd, chipnr); |
| 1820 | } |
| 1821 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1822 | /* |
| 1823 | * Check, if the chip supports auto page increment or if we |
| 1824 | * have hit a block boundary. |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1825 | */ |
| 1826 | if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck)) |
| 1827 | sndcmd = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1828 | } |
| 1829 | |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1830 | ops->oobretlen = ops->ooblen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1831 | return 0; |
| 1832 | } |
| 1833 | |
| 1834 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1835 | * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1836 | * @mtd: MTD device structure |
| 1837 | * @from: offset to read from |
| 1838 | * @ops: oob operation description structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1839 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1840 | * NAND read data and/or out-of-band data. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1841 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1842 | static int nand_read_oob(struct mtd_info *mtd, loff_t from, |
| 1843 | struct mtd_oob_ops *ops) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1844 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1845 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1846 | int ret = -ENOTSUPP; |
| 1847 | |
| 1848 | ops->retlen = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1849 | |
| 1850 | /* Do not allow reads past end of device */ |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1851 | if (ops->datbuf && (from + ops->len) > mtd->size) { |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 1852 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt read " |
| 1853 | "beyond end of device\n", __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1854 | return -EINVAL; |
| 1855 | } |
| 1856 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1857 | nand_get_device(chip, mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1858 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1859 | switch (ops->mode) { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1860 | case MTD_OOB_PLACE: |
| 1861 | case MTD_OOB_AUTO: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1862 | case MTD_OOB_RAW: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1863 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1864 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1865 | default: |
| 1866 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1867 | } |
| 1868 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1869 | if (!ops->datbuf) |
| 1870 | ret = nand_do_read_oob(mtd, from, ops); |
| 1871 | else |
| 1872 | ret = nand_do_read_ops(mtd, from, ops); |
| 1873 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1874 | out: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1875 | nand_release_device(mtd); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1876 | return ret; |
| 1877 | } |
| 1878 | |
| 1879 | |
| 1880 | /** |
| 1881 | * nand_write_page_raw - [Intern] raw page write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1882 | * @mtd: mtd info structure |
| 1883 | * @chip: nand chip info structure |
| 1884 | * @buf: data buffer |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1885 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1886 | * Not for syndrome calculating ecc controllers, which use a special oob |
| 1887 | * layout. |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1888 | */ |
| 1889 | static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, |
| 1890 | const uint8_t *buf) |
| 1891 | { |
| 1892 | chip->write_buf(mtd, buf, mtd->writesize); |
| 1893 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1894 | } |
| 1895 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1896 | /** |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1897 | * nand_write_page_raw_syndrome - [Intern] raw page write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1898 | * @mtd: mtd info structure |
| 1899 | * @chip: nand chip info structure |
| 1900 | * @buf: data buffer |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1901 | * |
| 1902 | * We need a special oob layout and handling even when ECC isn't checked. |
| 1903 | */ |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1904 | static void nand_write_page_raw_syndrome(struct mtd_info *mtd, |
| 1905 | struct nand_chip *chip, |
| 1906 | const uint8_t *buf) |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1907 | { |
| 1908 | int eccsize = chip->ecc.size; |
| 1909 | int eccbytes = chip->ecc.bytes; |
| 1910 | uint8_t *oob = chip->oob_poi; |
| 1911 | int steps, size; |
| 1912 | |
| 1913 | for (steps = chip->ecc.steps; steps > 0; steps--) { |
| 1914 | chip->write_buf(mtd, buf, eccsize); |
| 1915 | buf += eccsize; |
| 1916 | |
| 1917 | if (chip->ecc.prepad) { |
| 1918 | chip->write_buf(mtd, oob, chip->ecc.prepad); |
| 1919 | oob += chip->ecc.prepad; |
| 1920 | } |
| 1921 | |
| 1922 | chip->read_buf(mtd, oob, eccbytes); |
| 1923 | oob += eccbytes; |
| 1924 | |
| 1925 | if (chip->ecc.postpad) { |
| 1926 | chip->write_buf(mtd, oob, chip->ecc.postpad); |
| 1927 | oob += chip->ecc.postpad; |
| 1928 | } |
| 1929 | } |
| 1930 | |
| 1931 | size = mtd->oobsize - (oob - chip->oob_poi); |
| 1932 | if (size) |
| 1933 | chip->write_buf(mtd, oob, size); |
| 1934 | } |
| 1935 | /** |
Artem Bityutskiy | d29ebdb | 2006-10-19 16:04:02 +0300 | [diff] [blame] | 1936 | * nand_write_page_swecc - [REPLACABLE] software ecc based page write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1937 | * @mtd: mtd info structure |
| 1938 | * @chip: nand chip info structure |
| 1939 | * @buf: data buffer |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1940 | */ |
| 1941 | static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 1942 | const uint8_t *buf) |
| 1943 | { |
| 1944 | int i, eccsize = chip->ecc.size; |
| 1945 | int eccbytes = chip->ecc.bytes; |
| 1946 | int eccsteps = chip->ecc.steps; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1947 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1948 | const uint8_t *p = buf; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 1949 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1950 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1951 | /* Software ecc calculation */ |
| 1952 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) |
| 1953 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1954 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1955 | for (i = 0; i < chip->ecc.total; i++) |
| 1956 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1957 | |
Thomas Gleixner | 90424de | 2007-04-05 11:44:05 +0200 | [diff] [blame] | 1958 | chip->ecc.write_page_raw(mtd, chip, buf); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1959 | } |
| 1960 | |
| 1961 | /** |
Artem Bityutskiy | d29ebdb | 2006-10-19 16:04:02 +0300 | [diff] [blame] | 1962 | * nand_write_page_hwecc - [REPLACABLE] hardware ecc based page write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1963 | * @mtd: mtd info structure |
| 1964 | * @chip: nand chip info structure |
| 1965 | * @buf: data buffer |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1966 | */ |
| 1967 | static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 1968 | const uint8_t *buf) |
| 1969 | { |
| 1970 | int i, eccsize = chip->ecc.size; |
| 1971 | int eccbytes = chip->ecc.bytes; |
| 1972 | int eccsteps = chip->ecc.steps; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1973 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1974 | const uint8_t *p = buf; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 1975 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1976 | |
| 1977 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1978 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
David Woodhouse | 29da9ce | 2006-05-26 23:05:44 +0100 | [diff] [blame] | 1979 | chip->write_buf(mtd, p, eccsize); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1980 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1981 | } |
| 1982 | |
| 1983 | for (i = 0; i < chip->ecc.total; i++) |
| 1984 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
| 1985 | |
| 1986 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1987 | } |
| 1988 | |
| 1989 | /** |
Artem Bityutskiy | d29ebdb | 2006-10-19 16:04:02 +0300 | [diff] [blame] | 1990 | * nand_write_page_syndrome - [REPLACABLE] hardware ecc syndrom based page write |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1991 | * @mtd: mtd info structure |
| 1992 | * @chip: nand chip info structure |
| 1993 | * @buf: data buffer |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1994 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1995 | * The hw generator calculates the error syndrome automatically. Therefore we |
| 1996 | * need a special oob layout and handling. |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1997 | */ |
| 1998 | static void nand_write_page_syndrome(struct mtd_info *mtd, |
| 1999 | struct nand_chip *chip, const uint8_t *buf) |
| 2000 | { |
| 2001 | int i, eccsize = chip->ecc.size; |
| 2002 | int eccbytes = chip->ecc.bytes; |
| 2003 | int eccsteps = chip->ecc.steps; |
| 2004 | const uint8_t *p = buf; |
| 2005 | uint8_t *oob = chip->oob_poi; |
| 2006 | |
| 2007 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 2008 | |
| 2009 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
| 2010 | chip->write_buf(mtd, p, eccsize); |
| 2011 | |
| 2012 | if (chip->ecc.prepad) { |
| 2013 | chip->write_buf(mtd, oob, chip->ecc.prepad); |
| 2014 | oob += chip->ecc.prepad; |
| 2015 | } |
| 2016 | |
| 2017 | chip->ecc.calculate(mtd, p, oob); |
| 2018 | chip->write_buf(mtd, oob, eccbytes); |
| 2019 | oob += eccbytes; |
| 2020 | |
| 2021 | if (chip->ecc.postpad) { |
| 2022 | chip->write_buf(mtd, oob, chip->ecc.postpad); |
| 2023 | oob += chip->ecc.postpad; |
| 2024 | } |
| 2025 | } |
| 2026 | |
| 2027 | /* Calculate remaining oob bytes */ |
Vitaly Wool | 7e4178f | 2006-06-07 09:34:37 +0400 | [diff] [blame] | 2028 | i = mtd->oobsize - (oob - chip->oob_poi); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2029 | if (i) |
| 2030 | chip->write_buf(mtd, oob, i); |
| 2031 | } |
| 2032 | |
| 2033 | /** |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 2034 | * nand_write_page - [REPLACEABLE] write one page |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2035 | * @mtd: MTD device structure |
| 2036 | * @chip: NAND chip descriptor |
| 2037 | * @buf: the data to write |
| 2038 | * @page: page number to write |
| 2039 | * @cached: cached programming |
| 2040 | * @raw: use _raw version of write_page |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2041 | */ |
| 2042 | static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 2043 | const uint8_t *buf, int page, int cached, int raw) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2044 | { |
| 2045 | int status; |
| 2046 | |
| 2047 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); |
| 2048 | |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 2049 | if (unlikely(raw)) |
| 2050 | chip->ecc.write_page_raw(mtd, chip, buf); |
| 2051 | else |
| 2052 | chip->ecc.write_page(mtd, chip, buf); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2053 | |
| 2054 | /* |
| 2055 | * Cached progamming disabled for now, Not sure if its worth the |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2056 | * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s). |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2057 | */ |
| 2058 | cached = 0; |
| 2059 | |
| 2060 | if (!cached || !(chip->options & NAND_CACHEPRG)) { |
| 2061 | |
| 2062 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2063 | status = chip->waitfunc(mtd, chip); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2064 | /* |
| 2065 | * See if operation failed and additional status checks are |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2066 | * available. |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2067 | */ |
| 2068 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 2069 | status = chip->errstat(mtd, chip, FL_WRITING, status, |
| 2070 | page); |
| 2071 | |
| 2072 | if (status & NAND_STATUS_FAIL) |
| 2073 | return -EIO; |
| 2074 | } else { |
| 2075 | chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2076 | status = chip->waitfunc(mtd, chip); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2077 | } |
| 2078 | |
| 2079 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE |
| 2080 | /* Send command to read back the data */ |
| 2081 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); |
| 2082 | |
| 2083 | if (chip->verify_buf(mtd, buf, mtd->writesize)) |
| 2084 | return -EIO; |
| 2085 | #endif |
| 2086 | return 0; |
| 2087 | } |
| 2088 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2089 | /** |
| 2090 | * nand_fill_oob - [Internal] Transfer client buffer to oob |
THOMSON, Adam (Adam) | f722013e | 2011-06-14 16:52:38 +0200 | [diff] [blame^] | 2091 | * @mtd: MTD device structure |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2092 | * @oob: oob data buffer |
| 2093 | * @len: oob data write length |
| 2094 | * @ops: oob ops structure |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2095 | */ |
THOMSON, Adam (Adam) | f722013e | 2011-06-14 16:52:38 +0200 | [diff] [blame^] | 2096 | static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len, |
| 2097 | struct mtd_oob_ops *ops) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2098 | { |
THOMSON, Adam (Adam) | f722013e | 2011-06-14 16:52:38 +0200 | [diff] [blame^] | 2099 | struct nand_chip *chip = mtd->priv; |
| 2100 | |
| 2101 | /* |
| 2102 | * Initialise to all 0xFF, to avoid the possibility of left over OOB |
| 2103 | * data from a previous OOB read. |
| 2104 | */ |
| 2105 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
| 2106 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2107 | switch (ops->mode) { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2108 | |
| 2109 | case MTD_OOB_PLACE: |
| 2110 | case MTD_OOB_RAW: |
| 2111 | memcpy(chip->oob_poi + ops->ooboffs, oob, len); |
| 2112 | return oob + len; |
| 2113 | |
| 2114 | case MTD_OOB_AUTO: { |
| 2115 | struct nand_oobfree *free = chip->ecc.layout->oobfree; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2116 | uint32_t boffs = 0, woffs = ops->ooboffs; |
| 2117 | size_t bytes = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2118 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2119 | for (; free->length && len; free++, len -= bytes) { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2120 | /* Write request not from offset 0? */ |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2121 | if (unlikely(woffs)) { |
| 2122 | if (woffs >= free->length) { |
| 2123 | woffs -= free->length; |
| 2124 | continue; |
| 2125 | } |
| 2126 | boffs = free->offset + woffs; |
| 2127 | bytes = min_t(size_t, len, |
| 2128 | (free->length - woffs)); |
| 2129 | woffs = 0; |
| 2130 | } else { |
| 2131 | bytes = min_t(size_t, len, free->length); |
| 2132 | boffs = free->offset; |
| 2133 | } |
Vitaly Wool | 8b0036e | 2006-07-11 09:11:25 +0200 | [diff] [blame] | 2134 | memcpy(chip->oob_poi + boffs, oob, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2135 | oob += bytes; |
| 2136 | } |
| 2137 | return oob; |
| 2138 | } |
| 2139 | default: |
| 2140 | BUG(); |
| 2141 | } |
| 2142 | return NULL; |
| 2143 | } |
| 2144 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2145 | #define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2146 | |
| 2147 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2148 | * nand_do_write_ops - [Internal] NAND write with ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2149 | * @mtd: MTD device structure |
| 2150 | * @to: offset to write to |
| 2151 | * @ops: oob operations description structure |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2152 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2153 | * NAND write with ECC. |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2154 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2155 | static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, |
| 2156 | struct mtd_oob_ops *ops) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2157 | { |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2158 | int chipnr, realpage, page, blockmask, column; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2159 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2160 | uint32_t writelen = ops->len; |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2161 | |
| 2162 | uint32_t oobwritelen = ops->ooblen; |
| 2163 | uint32_t oobmaxlen = ops->mode == MTD_OOB_AUTO ? |
| 2164 | mtd->oobavail : mtd->oobsize; |
| 2165 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2166 | uint8_t *oob = ops->oobbuf; |
| 2167 | uint8_t *buf = ops->datbuf; |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2168 | int ret, subpage; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2169 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2170 | ops->retlen = 0; |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2171 | if (!writelen) |
| 2172 | return 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2173 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2174 | /* Reject writes, which are not page aligned */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2175 | if (NOTALIGNED(to) || NOTALIGNED(ops->len)) { |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2176 | printk(KERN_NOTICE "%s: Attempt to write not " |
| 2177 | "page aligned data\n", __func__); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2178 | return -EINVAL; |
| 2179 | } |
| 2180 | |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2181 | column = to & (mtd->writesize - 1); |
| 2182 | subpage = column || (writelen & (mtd->writesize - 1)); |
| 2183 | |
| 2184 | if (subpage && oob) |
| 2185 | return -EINVAL; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2186 | |
Thomas Gleixner | 6a93096 | 2006-06-28 00:11:45 +0200 | [diff] [blame] | 2187 | chipnr = (int)(to >> chip->chip_shift); |
| 2188 | chip->select_chip(mtd, chipnr); |
| 2189 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2190 | /* Check, if it is write protected */ |
| 2191 | if (nand_check_wp(mtd)) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2192 | return -EIO; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2193 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2194 | realpage = (int)(to >> chip->page_shift); |
| 2195 | page = realpage & chip->pagemask; |
| 2196 | blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
| 2197 | |
| 2198 | /* Invalidate the page cache, when we write to the cached page */ |
| 2199 | if (to <= (chip->pagebuf << chip->page_shift) && |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2200 | (chip->pagebuf << chip->page_shift) < (to + ops->len)) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2201 | chip->pagebuf = -1; |
| 2202 | |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2203 | /* Don't allow multipage oob writes with offset */ |
Jon Povey | cdcf12b | 2010-09-30 20:41:34 +0900 | [diff] [blame] | 2204 | if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2205 | return -EINVAL; |
| 2206 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2207 | while (1) { |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2208 | int bytes = mtd->writesize; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2209 | int cached = writelen > bytes && page != blockmask; |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2210 | uint8_t *wbuf = buf; |
| 2211 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2212 | /* Partial page write? */ |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2213 | if (unlikely(column || writelen < (mtd->writesize - 1))) { |
| 2214 | cached = 0; |
| 2215 | bytes = min_t(int, bytes - column, (int) writelen); |
| 2216 | chip->pagebuf = -1; |
| 2217 | memset(chip->buffers->databuf, 0xff, mtd->writesize); |
| 2218 | memcpy(&chip->buffers->databuf[column], buf, bytes); |
| 2219 | wbuf = chip->buffers->databuf; |
| 2220 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2221 | |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2222 | if (unlikely(oob)) { |
| 2223 | size_t len = min(oobwritelen, oobmaxlen); |
THOMSON, Adam (Adam) | f722013e | 2011-06-14 16:52:38 +0200 | [diff] [blame^] | 2224 | oob = nand_fill_oob(mtd, oob, len, ops); |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2225 | oobwritelen -= len; |
THOMSON, Adam (Adam) | f722013e | 2011-06-14 16:52:38 +0200 | [diff] [blame^] | 2226 | } else { |
| 2227 | /* We still need to erase leftover OOB data */ |
| 2228 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2229 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2230 | |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2231 | ret = chip->write_page(mtd, chip, wbuf, page, cached, |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 2232 | (ops->mode == MTD_OOB_RAW)); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2233 | if (ret) |
| 2234 | break; |
| 2235 | |
| 2236 | writelen -= bytes; |
| 2237 | if (!writelen) |
| 2238 | break; |
| 2239 | |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2240 | column = 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2241 | buf += bytes; |
| 2242 | realpage++; |
| 2243 | |
| 2244 | page = realpage & chip->pagemask; |
| 2245 | /* Check, if we cross a chip boundary */ |
| 2246 | if (!page) { |
| 2247 | chipnr++; |
| 2248 | chip->select_chip(mtd, -1); |
| 2249 | chip->select_chip(mtd, chipnr); |
| 2250 | } |
| 2251 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2252 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2253 | ops->retlen = ops->len - writelen; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2254 | if (unlikely(oob)) |
| 2255 | ops->oobretlen = ops->ooblen; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2256 | return ret; |
| 2257 | } |
| 2258 | |
| 2259 | /** |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2260 | * panic_nand_write - [MTD Interface] NAND write with ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2261 | * @mtd: MTD device structure |
| 2262 | * @to: offset to write to |
| 2263 | * @len: number of bytes to write |
| 2264 | * @retlen: pointer to variable to store the number of written bytes |
| 2265 | * @buf: the data to write |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2266 | * |
| 2267 | * NAND write with ECC. Used when performing writes in interrupt context, this |
| 2268 | * may for example be called by mtdoops when writing an oops while in panic. |
| 2269 | */ |
| 2270 | static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len, |
| 2271 | size_t *retlen, const uint8_t *buf) |
| 2272 | { |
| 2273 | struct nand_chip *chip = mtd->priv; |
| 2274 | int ret; |
| 2275 | |
| 2276 | /* Do not allow reads past end of device */ |
| 2277 | if ((to + len) > mtd->size) |
| 2278 | return -EINVAL; |
| 2279 | if (!len) |
| 2280 | return 0; |
| 2281 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2282 | /* Wait for the device to get ready */ |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2283 | panic_nand_wait(mtd, chip, 400); |
| 2284 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2285 | /* Grab the device */ |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2286 | panic_nand_get_device(chip, mtd, FL_WRITING); |
| 2287 | |
| 2288 | chip->ops.len = len; |
| 2289 | chip->ops.datbuf = (uint8_t *)buf; |
| 2290 | chip->ops.oobbuf = NULL; |
| 2291 | |
| 2292 | ret = nand_do_write_ops(mtd, to, &chip->ops); |
| 2293 | |
| 2294 | *retlen = chip->ops.retlen; |
| 2295 | return ret; |
| 2296 | } |
| 2297 | |
| 2298 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2299 | * nand_write - [MTD Interface] NAND write with ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2300 | * @mtd: MTD device structure |
| 2301 | * @to: offset to write to |
| 2302 | * @len: number of bytes to write |
| 2303 | * @retlen: pointer to variable to store the number of written bytes |
| 2304 | * @buf: the data to write |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2305 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2306 | * NAND write with ECC. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2307 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2308 | static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 2309 | size_t *retlen, const uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2310 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2311 | struct nand_chip *chip = mtd->priv; |
| 2312 | int ret; |
| 2313 | |
| 2314 | /* Do not allow reads past end of device */ |
| 2315 | if ((to + len) > mtd->size) |
| 2316 | return -EINVAL; |
| 2317 | if (!len) |
| 2318 | return 0; |
| 2319 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2320 | nand_get_device(chip, mtd, FL_WRITING); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2321 | |
| 2322 | chip->ops.len = len; |
| 2323 | chip->ops.datbuf = (uint8_t *)buf; |
| 2324 | chip->ops.oobbuf = NULL; |
| 2325 | |
| 2326 | ret = nand_do_write_ops(mtd, to, &chip->ops); |
| 2327 | |
Richard Purdie | 7fd5aec | 2006-08-27 01:23:33 -0700 | [diff] [blame] | 2328 | *retlen = chip->ops.retlen; |
| 2329 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2330 | nand_release_device(mtd); |
| 2331 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2332 | return ret; |
| 2333 | } |
| 2334 | |
| 2335 | /** |
| 2336 | * nand_do_write_oob - [MTD Interface] NAND write out-of-band |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2337 | * @mtd: MTD device structure |
| 2338 | * @to: offset to write to |
| 2339 | * @ops: oob operation description structure |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2340 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2341 | * NAND write out-of-band. |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2342 | */ |
| 2343 | static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, |
| 2344 | struct mtd_oob_ops *ops) |
| 2345 | { |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2346 | int chipnr, page, status, len; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2347 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2348 | |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2349 | DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n", |
| 2350 | __func__, (unsigned int)to, (int)ops->ooblen); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2351 | |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2352 | if (ops->mode == MTD_OOB_AUTO) |
| 2353 | len = chip->ecc.layout->oobavail; |
| 2354 | else |
| 2355 | len = mtd->oobsize; |
| 2356 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2357 | /* Do not allow write past end of page */ |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2358 | if ((ops->ooboffs + ops->ooblen) > len) { |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2359 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt to write " |
| 2360 | "past end of page\n", __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2361 | return -EINVAL; |
| 2362 | } |
| 2363 | |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2364 | if (unlikely(ops->ooboffs >= len)) { |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2365 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt to start " |
| 2366 | "write outside oob\n", __func__); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2367 | return -EINVAL; |
| 2368 | } |
| 2369 | |
Jason Liu | 775adc3d4 | 2011-02-25 13:06:18 +0800 | [diff] [blame] | 2370 | /* Do not allow write past end of device */ |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2371 | if (unlikely(to >= mtd->size || |
| 2372 | ops->ooboffs + ops->ooblen > |
| 2373 | ((mtd->size >> chip->page_shift) - |
| 2374 | (to >> chip->page_shift)) * len)) { |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2375 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt write beyond " |
| 2376 | "end of device\n", __func__); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2377 | return -EINVAL; |
| 2378 | } |
| 2379 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 2380 | chipnr = (int)(to >> chip->chip_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2381 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2382 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 2383 | /* Shift to get page */ |
| 2384 | page = (int)(to >> chip->page_shift); |
| 2385 | |
| 2386 | /* |
| 2387 | * Reset the chip. Some chips (like the Toshiba TC5832DC found in one |
| 2388 | * of my DiskOnChip 2000 test units) will clear the whole data page too |
| 2389 | * if we don't do this. I have no clue why, but I seem to have 'fixed' |
| 2390 | * it in the doc2000 driver in August 1999. dwmw2. |
| 2391 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2392 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2393 | |
| 2394 | /* Check, if it is write protected */ |
| 2395 | if (nand_check_wp(mtd)) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2396 | return -EROFS; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2397 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2398 | /* Invalidate the page cache, if we write to the cached page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2399 | if (page == chip->pagebuf) |
| 2400 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2401 | |
THOMSON, Adam (Adam) | f722013e | 2011-06-14 16:52:38 +0200 | [diff] [blame^] | 2402 | nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2403 | status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2404 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2405 | if (status) |
| 2406 | return status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2407 | |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2408 | ops->oobretlen = ops->ooblen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2409 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2410 | return 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2411 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2412 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2413 | /** |
| 2414 | * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2415 | * @mtd: MTD device structure |
| 2416 | * @to: offset to write to |
| 2417 | * @ops: oob operation description structure |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2418 | */ |
| 2419 | static int nand_write_oob(struct mtd_info *mtd, loff_t to, |
| 2420 | struct mtd_oob_ops *ops) |
| 2421 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2422 | struct nand_chip *chip = mtd->priv; |
| 2423 | int ret = -ENOTSUPP; |
| 2424 | |
| 2425 | ops->retlen = 0; |
| 2426 | |
| 2427 | /* Do not allow writes past end of device */ |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2428 | if (ops->datbuf && (to + ops->len) > mtd->size) { |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2429 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt write beyond " |
| 2430 | "end of device\n", __func__); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2431 | return -EINVAL; |
| 2432 | } |
| 2433 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2434 | nand_get_device(chip, mtd, FL_WRITING); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2435 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2436 | switch (ops->mode) { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2437 | case MTD_OOB_PLACE: |
| 2438 | case MTD_OOB_AUTO: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2439 | case MTD_OOB_RAW: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2440 | break; |
| 2441 | |
| 2442 | default: |
| 2443 | goto out; |
| 2444 | } |
| 2445 | |
| 2446 | if (!ops->datbuf) |
| 2447 | ret = nand_do_write_oob(mtd, to, ops); |
| 2448 | else |
| 2449 | ret = nand_do_write_ops(mtd, to, ops); |
| 2450 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 2451 | out: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2452 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2453 | return ret; |
| 2454 | } |
| 2455 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2456 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2457 | * single_erease_cmd - [GENERIC] NAND standard block erase command function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2458 | * @mtd: MTD device structure |
| 2459 | * @page: the page address of the block which will be erased |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2460 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2461 | * Standard erase command for NAND chips. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2462 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2463 | static void single_erase_cmd(struct mtd_info *mtd, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2464 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2465 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2466 | /* Send commands to erase a block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2467 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
| 2468 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2469 | } |
| 2470 | |
| 2471 | /** |
| 2472 | * multi_erease_cmd - [GENERIC] AND specific block erase command function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2473 | * @mtd: MTD device structure |
| 2474 | * @page: the page address of the block which will be erased |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2475 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2476 | * AND multi block erase command function. Erase 4 consecutive blocks. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2477 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2478 | static void multi_erase_cmd(struct mtd_info *mtd, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2479 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2480 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2481 | /* Send commands to erase a block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2482 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 2483 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 2484 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 2485 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
| 2486 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2487 | } |
| 2488 | |
| 2489 | /** |
| 2490 | * nand_erase - [MTD Interface] erase block(s) |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2491 | * @mtd: MTD device structure |
| 2492 | * @instr: erase instruction |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2493 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2494 | * Erase one ore more blocks. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2495 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2496 | static int nand_erase(struct mtd_info *mtd, struct erase_info *instr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2497 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2498 | return nand_erase_nand(mtd, instr, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2499 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2500 | |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 2501 | #define BBT_PAGE_MASK 0xffffff3f |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2502 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2503 | * nand_erase_nand - [Internal] erase block(s) |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2504 | * @mtd: MTD device structure |
| 2505 | * @instr: erase instruction |
| 2506 | * @allowbbt: allow erasing the bbt area |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2507 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2508 | * Erase one ore more blocks. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2509 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2510 | int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, |
| 2511 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2512 | { |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2513 | int page, status, pages_per_block, ret, chipnr; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2514 | struct nand_chip *chip = mtd->priv; |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2515 | loff_t rewrite_bbt[NAND_MAX_CHIPS] = {0}; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2516 | unsigned int bbt_masked_page = 0xffffffff; |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2517 | loff_t len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2518 | |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2519 | DEBUG(MTD_DEBUG_LEVEL3, "%s: start = 0x%012llx, len = %llu\n", |
| 2520 | __func__, (unsigned long long)instr->addr, |
| 2521 | (unsigned long long)instr->len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2522 | |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 2523 | if (check_offs_len(mtd, instr->addr, instr->len)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2524 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2525 | |
Adrian Hunter | bb0eb21 | 2008-08-12 12:40:50 +0300 | [diff] [blame] | 2526 | instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2527 | |
| 2528 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2529 | nand_get_device(chip, mtd, FL_ERASING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2530 | |
| 2531 | /* Shift to get first page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2532 | page = (int)(instr->addr >> chip->page_shift); |
| 2533 | chipnr = (int)(instr->addr >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2534 | |
| 2535 | /* Calculate pages in each block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2536 | pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2537 | |
| 2538 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2539 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2540 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2541 | /* Check, if it is write protected */ |
| 2542 | if (nand_check_wp(mtd)) { |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2543 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Device is write protected!!!\n", |
| 2544 | __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2545 | instr->state = MTD_ERASE_FAILED; |
| 2546 | goto erase_exit; |
| 2547 | } |
| 2548 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2549 | /* |
| 2550 | * If BBT requires refresh, set the BBT page mask to see if the BBT |
| 2551 | * should be rewritten. Otherwise the mask is set to 0xffffffff which |
| 2552 | * can not be matched. This is also done when the bbt is actually |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2553 | * erased to avoid recusrsive updates. |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2554 | */ |
| 2555 | if (chip->options & BBT_AUTO_REFRESH && !allowbbt) |
| 2556 | bbt_masked_page = chip->bbt_td->pages[chipnr] & BBT_PAGE_MASK; |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 2557 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2558 | /* Loop through the pages */ |
| 2559 | len = instr->len; |
| 2560 | |
| 2561 | instr->state = MTD_ERASING; |
| 2562 | |
| 2563 | while (len) { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2564 | /* Heck if we have a bad block, we do not erase bad blocks! */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2565 | if (nand_block_checkbad(mtd, ((loff_t) page) << |
| 2566 | chip->page_shift, 0, allowbbt)) { |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2567 | printk(KERN_WARNING "%s: attempt to erase a bad block " |
| 2568 | "at page 0x%08x\n", __func__, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2569 | instr->state = MTD_ERASE_FAILED; |
| 2570 | goto erase_exit; |
| 2571 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2572 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2573 | /* |
| 2574 | * Invalidate the page cache, if we erase the block which |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2575 | * contains the current cached page. |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2576 | */ |
| 2577 | if (page <= chip->pagebuf && chip->pagebuf < |
| 2578 | (page + pages_per_block)) |
| 2579 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2580 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2581 | chip->erase_cmd(mtd, page & chip->pagemask); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2582 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2583 | status = chip->waitfunc(mtd, chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2584 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2585 | /* |
| 2586 | * See if operation failed and additional status checks are |
| 2587 | * available |
| 2588 | */ |
| 2589 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 2590 | status = chip->errstat(mtd, chip, FL_ERASING, |
| 2591 | status, page); |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 2592 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2593 | /* See if block erase succeeded */ |
David A. Marlin | a4ab4c5 | 2005-01-23 18:30:53 +0000 | [diff] [blame] | 2594 | if (status & NAND_STATUS_FAIL) { |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2595 | DEBUG(MTD_DEBUG_LEVEL0, "%s: Failed erase, " |
| 2596 | "page 0x%08x\n", __func__, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2597 | instr->state = MTD_ERASE_FAILED; |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2598 | instr->fail_addr = |
| 2599 | ((loff_t)page << chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2600 | goto erase_exit; |
| 2601 | } |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 2602 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2603 | /* |
| 2604 | * If BBT requires refresh, set the BBT rewrite flag to the |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2605 | * page being erased. |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2606 | */ |
| 2607 | if (bbt_masked_page != 0xffffffff && |
| 2608 | (page & BBT_PAGE_MASK) == bbt_masked_page) |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2609 | rewrite_bbt[chipnr] = |
| 2610 | ((loff_t)page << chip->page_shift); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2611 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2612 | /* Increment page address and decrement length */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2613 | len -= (1 << chip->phys_erase_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2614 | page += pages_per_block; |
| 2615 | |
| 2616 | /* Check, if we cross a chip boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2617 | if (len && !(page & chip->pagemask)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2618 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2619 | chip->select_chip(mtd, -1); |
| 2620 | chip->select_chip(mtd, chipnr); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 2621 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2622 | /* |
| 2623 | * If BBT requires refresh and BBT-PERCHIP, set the BBT |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2624 | * page mask to see if this BBT should be rewritten. |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2625 | */ |
| 2626 | if (bbt_masked_page != 0xffffffff && |
| 2627 | (chip->bbt_td->options & NAND_BBT_PERCHIP)) |
| 2628 | bbt_masked_page = chip->bbt_td->pages[chipnr] & |
| 2629 | BBT_PAGE_MASK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2630 | } |
| 2631 | } |
| 2632 | instr->state = MTD_ERASE_DONE; |
| 2633 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 2634 | erase_exit: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2635 | |
| 2636 | ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2637 | |
| 2638 | /* Deselect and wake up anyone waiting on the device */ |
| 2639 | nand_release_device(mtd); |
| 2640 | |
David Woodhouse | 49defc0 | 2007-10-06 15:01:59 -0400 | [diff] [blame] | 2641 | /* Do call back function */ |
| 2642 | if (!ret) |
| 2643 | mtd_erase_callback(instr); |
| 2644 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2645 | /* |
| 2646 | * If BBT requires refresh and erase was successful, rewrite any |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2647 | * selected bad block tables. |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2648 | */ |
| 2649 | if (bbt_masked_page == 0xffffffff || ret) |
| 2650 | return ret; |
| 2651 | |
| 2652 | for (chipnr = 0; chipnr < chip->numchips; chipnr++) { |
| 2653 | if (!rewrite_bbt[chipnr]) |
| 2654 | continue; |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2655 | /* Update the BBT for chip */ |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2656 | DEBUG(MTD_DEBUG_LEVEL0, "%s: nand_update_bbt " |
| 2657 | "(%d:0x%0llx 0x%0x)\n", __func__, chipnr, |
| 2658 | rewrite_bbt[chipnr], chip->bbt_td->pages[chipnr]); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2659 | nand_update_bbt(mtd, rewrite_bbt[chipnr]); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 2660 | } |
| 2661 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2662 | /* Return more or less happy */ |
| 2663 | return ret; |
| 2664 | } |
| 2665 | |
| 2666 | /** |
| 2667 | * nand_sync - [MTD Interface] sync |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2668 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2669 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2670 | * Sync is actually a wait for chip ready function. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2671 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2672 | static void nand_sync(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2673 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2674 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2675 | |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2676 | DEBUG(MTD_DEBUG_LEVEL3, "%s: called\n", __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2677 | |
| 2678 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2679 | nand_get_device(chip, mtd, FL_SYNCING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2680 | /* Release it and go back */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2681 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2682 | } |
| 2683 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2684 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2685 | * nand_block_isbad - [MTD Interface] Check if block at offset is bad |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2686 | * @mtd: MTD device structure |
| 2687 | * @offs: offset relative to mtd start |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2688 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2689 | static int nand_block_isbad(struct mtd_info *mtd, loff_t offs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2690 | { |
| 2691 | /* Check for invalid offset */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2692 | if (offs > mtd->size) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2693 | return -EINVAL; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2694 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2695 | return nand_block_checkbad(mtd, offs, 1, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2696 | } |
| 2697 | |
| 2698 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2699 | * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2700 | * @mtd: MTD device structure |
| 2701 | * @ofs: offset relative to mtd start |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2702 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2703 | static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2704 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2705 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2706 | int ret; |
| 2707 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2708 | ret = nand_block_isbad(mtd, ofs); |
| 2709 | if (ret) { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2710 | /* If it was bad already, return success and do nothing */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2711 | if (ret > 0) |
| 2712 | return 0; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2713 | return ret; |
| 2714 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2715 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2716 | return chip->block_markbad(mtd, ofs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2717 | } |
| 2718 | |
| 2719 | /** |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2720 | * nand_suspend - [MTD Interface] Suspend the NAND flash |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2721 | * @mtd: MTD device structure |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2722 | */ |
| 2723 | static int nand_suspend(struct mtd_info *mtd) |
| 2724 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2725 | struct nand_chip *chip = mtd->priv; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2726 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2727 | return nand_get_device(chip, mtd, FL_PM_SUSPENDED); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2728 | } |
| 2729 | |
| 2730 | /** |
| 2731 | * nand_resume - [MTD Interface] Resume the NAND flash |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2732 | * @mtd: MTD device structure |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2733 | */ |
| 2734 | static void nand_resume(struct mtd_info *mtd) |
| 2735 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2736 | struct nand_chip *chip = mtd->priv; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2737 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2738 | if (chip->state == FL_PM_SUSPENDED) |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2739 | nand_release_device(mtd); |
| 2740 | else |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2741 | printk(KERN_ERR "%s called for a chip which is not " |
| 2742 | "in suspended state\n", __func__); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2743 | } |
| 2744 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2745 | /* Set default functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2746 | static void nand_set_defaults(struct nand_chip *chip, int busw) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2747 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2748 | /* check for proper chip_delay setup, set 20us if not */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2749 | if (!chip->chip_delay) |
| 2750 | chip->chip_delay = 20; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2751 | |
| 2752 | /* check, if a user supplied command function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2753 | if (chip->cmdfunc == NULL) |
| 2754 | chip->cmdfunc = nand_command; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2755 | |
| 2756 | /* check, if a user supplied wait function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2757 | if (chip->waitfunc == NULL) |
| 2758 | chip->waitfunc = nand_wait; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2759 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2760 | if (!chip->select_chip) |
| 2761 | chip->select_chip = nand_select_chip; |
| 2762 | if (!chip->read_byte) |
| 2763 | chip->read_byte = busw ? nand_read_byte16 : nand_read_byte; |
| 2764 | if (!chip->read_word) |
| 2765 | chip->read_word = nand_read_word; |
| 2766 | if (!chip->block_bad) |
| 2767 | chip->block_bad = nand_block_bad; |
| 2768 | if (!chip->block_markbad) |
| 2769 | chip->block_markbad = nand_default_block_markbad; |
| 2770 | if (!chip->write_buf) |
| 2771 | chip->write_buf = busw ? nand_write_buf16 : nand_write_buf; |
| 2772 | if (!chip->read_buf) |
| 2773 | chip->read_buf = busw ? nand_read_buf16 : nand_read_buf; |
| 2774 | if (!chip->verify_buf) |
| 2775 | chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf; |
| 2776 | if (!chip->scan_bbt) |
| 2777 | chip->scan_bbt = nand_default_bbt; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2778 | |
| 2779 | if (!chip->controller) { |
| 2780 | chip->controller = &chip->hwcontrol; |
| 2781 | spin_lock_init(&chip->controller->lock); |
| 2782 | init_waitqueue_head(&chip->controller->wq); |
| 2783 | } |
| 2784 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2785 | } |
| 2786 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2787 | /* Sanitize ONFI strings so we can safely print them */ |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 2788 | static void sanitize_string(uint8_t *s, size_t len) |
| 2789 | { |
| 2790 | ssize_t i; |
| 2791 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2792 | /* Null terminate */ |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 2793 | s[len - 1] = 0; |
| 2794 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2795 | /* Remove non printable chars */ |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 2796 | for (i = 0; i < len - 1; i++) { |
| 2797 | if (s[i] < ' ' || s[i] > 127) |
| 2798 | s[i] = '?'; |
| 2799 | } |
| 2800 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2801 | /* Remove trailing spaces */ |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 2802 | strim(s); |
| 2803 | } |
| 2804 | |
| 2805 | static u16 onfi_crc16(u16 crc, u8 const *p, size_t len) |
| 2806 | { |
| 2807 | int i; |
| 2808 | while (len--) { |
| 2809 | crc ^= *p++ << 8; |
| 2810 | for (i = 0; i < 8; i++) |
| 2811 | crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0); |
| 2812 | } |
| 2813 | |
| 2814 | return crc; |
| 2815 | } |
| 2816 | |
| 2817 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2818 | * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise. |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2819 | */ |
| 2820 | static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, |
| 2821 | int busw) |
| 2822 | { |
| 2823 | struct nand_onfi_params *p = &chip->onfi_params; |
| 2824 | int i; |
| 2825 | int val; |
| 2826 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2827 | /* Try ONFI for unknow chip or LP */ |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2828 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1); |
| 2829 | if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' || |
| 2830 | chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I') |
| 2831 | return 0; |
| 2832 | |
| 2833 | printk(KERN_INFO "ONFI flash detected\n"); |
| 2834 | chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1); |
| 2835 | for (i = 0; i < 3; i++) { |
| 2836 | chip->read_buf(mtd, (uint8_t *)p, sizeof(*p)); |
| 2837 | if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) == |
| 2838 | le16_to_cpu(p->crc)) { |
| 2839 | printk(KERN_INFO "ONFI param page %d valid\n", i); |
| 2840 | break; |
| 2841 | } |
| 2842 | } |
| 2843 | |
| 2844 | if (i == 3) |
| 2845 | return 0; |
| 2846 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2847 | /* Check version */ |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2848 | val = le16_to_cpu(p->revision); |
Brian Norris | b7b1a29 | 2010-12-12 00:23:33 -0800 | [diff] [blame] | 2849 | if (val & (1 << 5)) |
| 2850 | chip->onfi_version = 23; |
| 2851 | else if (val & (1 << 4)) |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2852 | chip->onfi_version = 22; |
| 2853 | else if (val & (1 << 3)) |
| 2854 | chip->onfi_version = 21; |
| 2855 | else if (val & (1 << 2)) |
| 2856 | chip->onfi_version = 20; |
Brian Norris | b7b1a29 | 2010-12-12 00:23:33 -0800 | [diff] [blame] | 2857 | else if (val & (1 << 1)) |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2858 | chip->onfi_version = 10; |
Brian Norris | b7b1a29 | 2010-12-12 00:23:33 -0800 | [diff] [blame] | 2859 | else |
| 2860 | chip->onfi_version = 0; |
| 2861 | |
| 2862 | if (!chip->onfi_version) { |
| 2863 | printk(KERN_INFO "%s: unsupported ONFI version: %d\n", |
| 2864 | __func__, val); |
| 2865 | return 0; |
| 2866 | } |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2867 | |
| 2868 | sanitize_string(p->manufacturer, sizeof(p->manufacturer)); |
| 2869 | sanitize_string(p->model, sizeof(p->model)); |
| 2870 | if (!mtd->name) |
| 2871 | mtd->name = p->model; |
| 2872 | mtd->writesize = le32_to_cpu(p->byte_per_page); |
| 2873 | mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize; |
| 2874 | mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); |
David Woodhouse | 4ccb3b4 | 2010-12-03 16:36:34 +0000 | [diff] [blame] | 2875 | chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize; |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2876 | busw = 0; |
| 2877 | if (le16_to_cpu(p->features) & 1) |
| 2878 | busw = NAND_BUSWIDTH_16; |
| 2879 | |
| 2880 | chip->options &= ~NAND_CHIPOPTIONS_MSK; |
| 2881 | chip->options |= (NAND_NO_READRDY | |
| 2882 | NAND_NO_AUTOINCR) & NAND_CHIPOPTIONS_MSK; |
| 2883 | |
| 2884 | return 1; |
| 2885 | } |
| 2886 | |
| 2887 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2888 | * Get the flash and manufacturer id and lookup if the type is supported. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2889 | */ |
| 2890 | static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2891 | struct nand_chip *chip, |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 2892 | int busw, |
| 2893 | int *maf_id, int *dev_id, |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 2894 | struct nand_flash_dev *type) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2895 | { |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 2896 | int i, maf_idx; |
Kevin Cernekee | 426c457 | 2010-05-04 20:58:03 -0700 | [diff] [blame] | 2897 | u8 id_data[8]; |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2898 | int ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2899 | |
| 2900 | /* Select the device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2901 | chip->select_chip(mtd, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2902 | |
Karl Beldan | ef89a88 | 2008-09-15 14:37:29 +0200 | [diff] [blame] | 2903 | /* |
| 2904 | * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx) |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2905 | * after power-up. |
Karl Beldan | ef89a88 | 2008-09-15 14:37:29 +0200 | [diff] [blame] | 2906 | */ |
| 2907 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
| 2908 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2909 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2910 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2911 | |
| 2912 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2913 | *maf_id = chip->read_byte(mtd); |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 2914 | *dev_id = chip->read_byte(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2915 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2916 | /* |
| 2917 | * Try again to make sure, as some systems the bus-hold or other |
Ben Dooks | ed8165c | 2008-04-14 14:58:58 +0100 | [diff] [blame] | 2918 | * interface concerns can cause random data which looks like a |
| 2919 | * possibly credible NAND flash to appear. If the two results do |
| 2920 | * not match, ignore the device completely. |
| 2921 | */ |
| 2922 | |
| 2923 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
| 2924 | |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 2925 | for (i = 0; i < 2; i++) |
Kevin Cernekee | 426c457 | 2010-05-04 20:58:03 -0700 | [diff] [blame] | 2926 | id_data[i] = chip->read_byte(mtd); |
Ben Dooks | ed8165c | 2008-04-14 14:58:58 +0100 | [diff] [blame] | 2927 | |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 2928 | if (id_data[0] != *maf_id || id_data[1] != *dev_id) { |
Ben Dooks | ed8165c | 2008-04-14 14:58:58 +0100 | [diff] [blame] | 2929 | printk(KERN_INFO "%s: second ID read did not match " |
| 2930 | "%02x,%02x against %02x,%02x\n", __func__, |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 2931 | *maf_id, *dev_id, id_data[0], id_data[1]); |
Ben Dooks | ed8165c | 2008-04-14 14:58:58 +0100 | [diff] [blame] | 2932 | return ERR_PTR(-ENODEV); |
| 2933 | } |
| 2934 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2935 | if (!type) |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 2936 | type = nand_flash_ids; |
| 2937 | |
| 2938 | for (; type->name != NULL; type++) |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 2939 | if (*dev_id == type->id) |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2940 | break; |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 2941 | |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 2942 | chip->onfi_version = 0; |
| 2943 | if (!type->name || !type->pagesize) { |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2944 | /* Check is chip is ONFI compliant */ |
| 2945 | ret = nand_flash_detect_onfi(mtd, chip, busw); |
| 2946 | if (ret) |
| 2947 | goto ident_done; |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 2948 | } |
| 2949 | |
| 2950 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
| 2951 | |
| 2952 | /* Read entire ID string */ |
| 2953 | |
| 2954 | for (i = 0; i < 8; i++) |
| 2955 | id_data[i] = chip->read_byte(mtd); |
| 2956 | |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 2957 | if (!type->name) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2958 | return ERR_PTR(-ENODEV); |
| 2959 | |
Thomas Gleixner | ba0251fe | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2960 | if (!mtd->name) |
| 2961 | mtd->name = type->name; |
| 2962 | |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2963 | chip->chipsize = (uint64_t)type->chipsize << 20; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2964 | |
Huang Shijie | 12a40a5 | 2010-09-27 10:43:53 +0800 | [diff] [blame] | 2965 | if (!type->pagesize && chip->init_size) { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2966 | /* Set the pagesize, oobsize, erasesize by the driver */ |
Huang Shijie | 12a40a5 | 2010-09-27 10:43:53 +0800 | [diff] [blame] | 2967 | busw = chip->init_size(mtd, chip, id_data); |
| 2968 | } else if (!type->pagesize) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2969 | int extid; |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2970 | /* The 3rd id byte holds MLC / multichip data */ |
Kevin Cernekee | 426c457 | 2010-05-04 20:58:03 -0700 | [diff] [blame] | 2971 | chip->cellinfo = id_data[2]; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2972 | /* The 4th id byte is the important one */ |
Kevin Cernekee | 426c457 | 2010-05-04 20:58:03 -0700 | [diff] [blame] | 2973 | extid = id_data[3]; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2974 | |
Kevin Cernekee | 426c457 | 2010-05-04 20:58:03 -0700 | [diff] [blame] | 2975 | /* |
| 2976 | * Field definitions are in the following datasheets: |
| 2977 | * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32) |
Brian Norris | 34c5bf6 | 2010-08-20 10:50:43 -0700 | [diff] [blame] | 2978 | * New style (6 byte ID): Samsung K9GBG08U0M (p.40) |
Kevin Cernekee | 426c457 | 2010-05-04 20:58:03 -0700 | [diff] [blame] | 2979 | * |
| 2980 | * Check for wraparound + Samsung ID + nonzero 6th byte |
| 2981 | * to decide what to do. |
| 2982 | */ |
| 2983 | if (id_data[0] == id_data[6] && id_data[1] == id_data[7] && |
| 2984 | id_data[0] == NAND_MFR_SAMSUNG && |
Tilman Sauerbeck | cfe3fda | 2010-08-20 14:01:47 -0700 | [diff] [blame] | 2985 | (chip->cellinfo & NAND_CI_CELLTYPE_MSK) && |
Kevin Cernekee | 426c457 | 2010-05-04 20:58:03 -0700 | [diff] [blame] | 2986 | id_data[5] != 0x00) { |
| 2987 | /* Calc pagesize */ |
| 2988 | mtd->writesize = 2048 << (extid & 0x03); |
| 2989 | extid >>= 2; |
| 2990 | /* Calc oobsize */ |
Brian Norris | 34c5bf6 | 2010-08-20 10:50:43 -0700 | [diff] [blame] | 2991 | switch (extid & 0x03) { |
| 2992 | case 1: |
| 2993 | mtd->oobsize = 128; |
| 2994 | break; |
| 2995 | case 2: |
| 2996 | mtd->oobsize = 218; |
| 2997 | break; |
| 2998 | case 3: |
| 2999 | mtd->oobsize = 400; |
| 3000 | break; |
| 3001 | default: |
| 3002 | mtd->oobsize = 436; |
| 3003 | break; |
| 3004 | } |
Kevin Cernekee | 426c457 | 2010-05-04 20:58:03 -0700 | [diff] [blame] | 3005 | extid >>= 2; |
| 3006 | /* Calc blocksize */ |
| 3007 | mtd->erasesize = (128 * 1024) << |
| 3008 | (((extid >> 1) & 0x04) | (extid & 0x03)); |
| 3009 | busw = 0; |
| 3010 | } else { |
| 3011 | /* Calc pagesize */ |
| 3012 | mtd->writesize = 1024 << (extid & 0x03); |
| 3013 | extid >>= 2; |
| 3014 | /* Calc oobsize */ |
| 3015 | mtd->oobsize = (8 << (extid & 0x01)) * |
| 3016 | (mtd->writesize >> 9); |
| 3017 | extid >>= 2; |
| 3018 | /* Calc blocksize. Blocksize is multiples of 64KiB */ |
| 3019 | mtd->erasesize = (64 * 1024) << (extid & 0x03); |
| 3020 | extid >>= 2; |
| 3021 | /* Get buswidth information */ |
| 3022 | busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0; |
| 3023 | } |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3024 | } else { |
| 3025 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3026 | * Old devices have chip data hardcoded in the device id table. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3027 | */ |
Thomas Gleixner | ba0251fe | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 3028 | mtd->erasesize = type->erasesize; |
| 3029 | mtd->writesize = type->pagesize; |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 3030 | mtd->oobsize = mtd->writesize / 32; |
Thomas Gleixner | ba0251fe | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 3031 | busw = type->options & NAND_BUSWIDTH_16; |
Brian Norris | 2173bae | 2010-08-19 08:11:02 -0700 | [diff] [blame] | 3032 | |
| 3033 | /* |
| 3034 | * Check for Spansion/AMD ID + repeating 5th, 6th byte since |
| 3035 | * some Spansion chips have erasesize that conflicts with size |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3036 | * listed in nand_ids table. |
Brian Norris | 2173bae | 2010-08-19 08:11:02 -0700 | [diff] [blame] | 3037 | * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39) |
| 3038 | */ |
| 3039 | if (*maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && |
| 3040 | id_data[5] == 0x00 && id_data[6] == 0x00 && |
| 3041 | id_data[7] == 0x00 && mtd->writesize == 512) { |
| 3042 | mtd->erasesize = 128 * 1024; |
| 3043 | mtd->erasesize <<= ((id_data[3] & 0x03) << 1); |
| 3044 | } |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3045 | } |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3046 | /* Get chip options, preserve non chip based options */ |
| 3047 | chip->options &= ~NAND_CHIPOPTIONS_MSK; |
| 3048 | chip->options |= type->options & NAND_CHIPOPTIONS_MSK; |
| 3049 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3050 | /* |
| 3051 | * Check if chip is not a Samsung device. Do not clear the |
| 3052 | * options for chips which do not have an extended id. |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3053 | */ |
| 3054 | if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize) |
| 3055 | chip->options &= ~NAND_SAMSUNG_LP_OPTIONS; |
| 3056 | ident_done: |
| 3057 | |
| 3058 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3059 | * Set chip as a default. Board drivers can override it, if necessary. |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3060 | */ |
| 3061 | chip->options |= NAND_NO_AUTOINCR; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3062 | |
| 3063 | /* Try to identify manufacturer */ |
David Woodhouse | 9a90986 | 2006-07-15 13:26:18 +0100 | [diff] [blame] | 3064 | for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3065 | if (nand_manuf_ids[maf_idx].id == *maf_id) |
| 3066 | break; |
| 3067 | } |
| 3068 | |
| 3069 | /* |
| 3070 | * Check, if buswidth is correct. Hardware drivers should set |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3071 | * chip correct! |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3072 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3073 | if (busw != (chip->options & NAND_BUSWIDTH_16)) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3074 | printk(KERN_INFO "NAND device: Manufacturer ID:" |
| 3075 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3076 | *dev_id, nand_manuf_ids[maf_idx].name, mtd->name); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3077 | printk(KERN_WARNING "NAND bus width %d instead %d bit\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3078 | (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3079 | busw ? 16 : 8); |
| 3080 | return ERR_PTR(-EINVAL); |
| 3081 | } |
| 3082 | |
| 3083 | /* Calculate the address shift from the page size */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3084 | chip->page_shift = ffs(mtd->writesize) - 1; |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3085 | /* Convert chipsize to number of pages per chip -1 */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3086 | chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3087 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3088 | chip->bbt_erase_shift = chip->phys_erase_shift = |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3089 | ffs(mtd->erasesize) - 1; |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 3090 | if (chip->chipsize & 0xffffffff) |
| 3091 | chip->chip_shift = ffs((unsigned)chip->chipsize) - 1; |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3092 | else { |
| 3093 | chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32)); |
| 3094 | chip->chip_shift += 32 - 1; |
| 3095 | } |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3096 | |
Artem Bityutskiy | 26d9be1 | 2011-04-28 20:26:59 +0300 | [diff] [blame] | 3097 | chip->badblockbits = 8; |
| 3098 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3099 | /* Set the bad block position */ |
Brian Norris | 065a1ed | 2010-08-18 11:25:04 -0700 | [diff] [blame] | 3100 | if (mtd->writesize > 512 || (busw & NAND_BUSWIDTH_16)) |
Brian Norris | c7b28e2 | 2010-07-13 15:13:00 -0700 | [diff] [blame] | 3101 | chip->badblockpos = NAND_LARGE_BADBLOCK_POS; |
Brian Norris | 065a1ed | 2010-08-18 11:25:04 -0700 | [diff] [blame] | 3102 | else |
| 3103 | chip->badblockpos = NAND_SMALL_BADBLOCK_POS; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3104 | |
Kevin Cernekee | b60b08b | 2010-05-04 20:58:10 -0700 | [diff] [blame] | 3105 | /* |
| 3106 | * Bad block marker is stored in the last page of each block |
Brian Norris | c7b28e2 | 2010-07-13 15:13:00 -0700 | [diff] [blame] | 3107 | * on Samsung and Hynix MLC devices; stored in first two pages |
| 3108 | * of each block on Micron devices with 2KiB pages and on |
Brian Norris | 13ed7ae | 2010-08-20 12:36:12 -0700 | [diff] [blame] | 3109 | * SLC Samsung, Hynix, Toshiba and AMD/Spansion. All others scan |
| 3110 | * only the first page. |
Kevin Cernekee | b60b08b | 2010-05-04 20:58:10 -0700 | [diff] [blame] | 3111 | */ |
| 3112 | if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) && |
| 3113 | (*maf_id == NAND_MFR_SAMSUNG || |
| 3114 | *maf_id == NAND_MFR_HYNIX)) |
Brian Norris | 5fb1549 | 2011-05-31 16:31:21 -0700 | [diff] [blame] | 3115 | chip->bbt_options |= NAND_BBT_SCANLASTPAGE; |
Brian Norris | c7b28e2 | 2010-07-13 15:13:00 -0700 | [diff] [blame] | 3116 | else if ((!(chip->cellinfo & NAND_CI_CELLTYPE_MSK) && |
| 3117 | (*maf_id == NAND_MFR_SAMSUNG || |
| 3118 | *maf_id == NAND_MFR_HYNIX || |
Brian Norris | 13ed7ae | 2010-08-20 12:36:12 -0700 | [diff] [blame] | 3119 | *maf_id == NAND_MFR_TOSHIBA || |
Brian Norris | c7b28e2 | 2010-07-13 15:13:00 -0700 | [diff] [blame] | 3120 | *maf_id == NAND_MFR_AMD)) || |
| 3121 | (mtd->writesize == 2048 && |
| 3122 | *maf_id == NAND_MFR_MICRON)) |
Brian Norris | 5fb1549 | 2011-05-31 16:31:21 -0700 | [diff] [blame] | 3123 | chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; |
Brian Norris | c7b28e2 | 2010-07-13 15:13:00 -0700 | [diff] [blame] | 3124 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3125 | /* Check for AND chips with 4 page planes */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3126 | if (chip->options & NAND_4PAGE_ARRAY) |
| 3127 | chip->erase_cmd = multi_erase_cmd; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3128 | else |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3129 | chip->erase_cmd = single_erase_cmd; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3130 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3131 | /* Do not replace user supplied command function! */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3132 | if (mtd->writesize > 512 && chip->cmdfunc == nand_command) |
| 3133 | chip->cmdfunc = nand_command_lp; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3134 | |
| 3135 | printk(KERN_INFO "NAND device: Manufacturer ID:" |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3136 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, *dev_id, |
| 3137 | nand_manuf_ids[maf_idx].name, |
Brian Norris | 0b524fb | 2010-12-12 00:23:32 -0800 | [diff] [blame] | 3138 | chip->onfi_version ? chip->onfi_params.model : type->name); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3139 | |
| 3140 | return type; |
| 3141 | } |
| 3142 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3143 | /** |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3144 | * nand_scan_ident - [NAND Interface] Scan for the NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3145 | * @mtd: MTD device structure |
| 3146 | * @maxchips: number of chips to scan for |
| 3147 | * @table: alternative NAND ID table |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3148 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3149 | * This is the first phase of the normal nand_scan() function. It reads the |
| 3150 | * flash ID and sets up MTD fields accordingly. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3151 | * |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3152 | * The mtd->owner field must be set to the module of the caller. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3153 | */ |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3154 | int nand_scan_ident(struct mtd_info *mtd, int maxchips, |
| 3155 | struct nand_flash_dev *table) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3156 | { |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3157 | int i, busw, nand_maf_id, nand_dev_id; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3158 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3159 | struct nand_flash_dev *type; |
| 3160 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3161 | /* Get buswidth to select the correct functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3162 | busw = chip->options & NAND_BUSWIDTH_16; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3163 | /* Set the default functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3164 | nand_set_defaults(chip, busw); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3165 | |
| 3166 | /* Read the flash type */ |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3167 | type = nand_get_flash_type(mtd, chip, busw, |
| 3168 | &nand_maf_id, &nand_dev_id, table); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3169 | |
| 3170 | if (IS_ERR(type)) { |
Ben Dooks | b1c6e6d | 2009-11-02 18:12:33 +0000 | [diff] [blame] | 3171 | if (!(chip->options & NAND_SCAN_SILENT_NODEV)) |
| 3172 | printk(KERN_WARNING "No NAND device found.\n"); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3173 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3174 | return PTR_ERR(type); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3175 | } |
| 3176 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3177 | /* Check for a chip array */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 3178 | for (i = 1; i < maxchips; i++) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3179 | chip->select_chip(mtd, i); |
Karl Beldan | ef89a88 | 2008-09-15 14:37:29 +0200 | [diff] [blame] | 3180 | /* See comment in nand_get_flash_type for reset */ |
| 3181 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3182 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3183 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3184 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3185 | if (nand_maf_id != chip->read_byte(mtd) || |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3186 | nand_dev_id != chip->read_byte(mtd)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3187 | break; |
| 3188 | } |
| 3189 | if (i > 1) |
| 3190 | printk(KERN_INFO "%d NAND chips detected\n", i); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3191 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3192 | /* Store the number of chips and calc total size for mtd */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3193 | chip->numchips = i; |
| 3194 | mtd->size = i * chip->chipsize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3195 | |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3196 | return 0; |
| 3197 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3198 | EXPORT_SYMBOL(nand_scan_ident); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3199 | |
| 3200 | |
| 3201 | /** |
| 3202 | * nand_scan_tail - [NAND Interface] Scan for the NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3203 | * @mtd: MTD device structure |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3204 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3205 | * This is the second phase of the normal nand_scan() function. It fills out |
| 3206 | * all the uninitialized function pointers with the defaults and scans for a |
| 3207 | * bad block table if appropriate. |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3208 | */ |
| 3209 | int nand_scan_tail(struct mtd_info *mtd) |
| 3210 | { |
| 3211 | int i; |
| 3212 | struct nand_chip *chip = mtd->priv; |
| 3213 | |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 3214 | if (!(chip->options & NAND_OWN_BUFFERS)) |
| 3215 | chip->buffers = kmalloc(sizeof(*chip->buffers), GFP_KERNEL); |
| 3216 | if (!chip->buffers) |
| 3217 | return -ENOMEM; |
| 3218 | |
David Woodhouse | 7dcdcbef | 2006-10-21 17:09:53 +0100 | [diff] [blame] | 3219 | /* Set the internal oob buffer location, just after the page data */ |
David Woodhouse | 784f4d5 | 2006-10-22 01:47:45 +0100 | [diff] [blame] | 3220 | chip->oob_poi = chip->buffers->databuf + mtd->writesize; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3221 | |
| 3222 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3223 | * If no default placement scheme is given, select an appropriate one. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3224 | */ |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 3225 | if (!chip->ecc.layout && (chip->ecc.mode != NAND_ECC_SOFT_BCH)) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3226 | switch (mtd->oobsize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3227 | case 8: |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 3228 | chip->ecc.layout = &nand_oob_8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3229 | break; |
| 3230 | case 16: |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 3231 | chip->ecc.layout = &nand_oob_16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3232 | break; |
| 3233 | case 64: |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 3234 | chip->ecc.layout = &nand_oob_64; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3235 | break; |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 3236 | case 128: |
| 3237 | chip->ecc.layout = &nand_oob_128; |
| 3238 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3239 | default: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3240 | printk(KERN_WARNING "No oob scheme defined for " |
| 3241 | "oobsize %d\n", mtd->oobsize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3242 | BUG(); |
| 3243 | } |
| 3244 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3245 | |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 3246 | if (!chip->write_page) |
| 3247 | chip->write_page = nand_write_page; |
| 3248 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3249 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3250 | * Check ECC mode, default to software if 3byte/512byte hardware ECC is |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3251 | * selected and we have 256 byte pagesize fallback to software ECC |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 3252 | */ |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 3253 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3254 | switch (chip->ecc.mode) { |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 3255 | case NAND_ECC_HW_OOB_FIRST: |
| 3256 | /* Similar to NAND_ECC_HW, but a separate read_page handle */ |
| 3257 | if (!chip->ecc.calculate || !chip->ecc.correct || |
| 3258 | !chip->ecc.hwctl) { |
| 3259 | printk(KERN_WARNING "No ECC functions supplied; " |
| 3260 | "Hardware ECC not possible\n"); |
| 3261 | BUG(); |
| 3262 | } |
| 3263 | if (!chip->ecc.read_page) |
| 3264 | chip->ecc.read_page = nand_read_page_hwecc_oob_first; |
| 3265 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 3266 | case NAND_ECC_HW: |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3267 | /* Use standard hwecc read page function? */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 3268 | if (!chip->ecc.read_page) |
| 3269 | chip->ecc.read_page = nand_read_page_hwecc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 3270 | if (!chip->ecc.write_page) |
| 3271 | chip->ecc.write_page = nand_write_page_hwecc; |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 3272 | if (!chip->ecc.read_page_raw) |
| 3273 | chip->ecc.read_page_raw = nand_read_page_raw; |
| 3274 | if (!chip->ecc.write_page_raw) |
| 3275 | chip->ecc.write_page_raw = nand_write_page_raw; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 3276 | if (!chip->ecc.read_oob) |
| 3277 | chip->ecc.read_oob = nand_read_oob_std; |
| 3278 | if (!chip->ecc.write_oob) |
| 3279 | chip->ecc.write_oob = nand_write_oob_std; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 3280 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 3281 | case NAND_ECC_HW_SYNDROME: |
Scott Wood | 78b6517 | 2007-12-13 11:15:28 -0600 | [diff] [blame] | 3282 | if ((!chip->ecc.calculate || !chip->ecc.correct || |
| 3283 | !chip->ecc.hwctl) && |
| 3284 | (!chip->ecc.read_page || |
Scott Wood | 1c45f60 | 2008-01-16 10:36:03 -0600 | [diff] [blame] | 3285 | chip->ecc.read_page == nand_read_page_hwecc || |
Scott Wood | 78b6517 | 2007-12-13 11:15:28 -0600 | [diff] [blame] | 3286 | !chip->ecc.write_page || |
Scott Wood | 1c45f60 | 2008-01-16 10:36:03 -0600 | [diff] [blame] | 3287 | chip->ecc.write_page == nand_write_page_hwecc)) { |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 3288 | printk(KERN_WARNING "No ECC functions supplied; " |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 3289 | "Hardware ECC not possible\n"); |
| 3290 | BUG(); |
| 3291 | } |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3292 | /* Use standard syndrome read/write page function? */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 3293 | if (!chip->ecc.read_page) |
| 3294 | chip->ecc.read_page = nand_read_page_syndrome; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 3295 | if (!chip->ecc.write_page) |
| 3296 | chip->ecc.write_page = nand_write_page_syndrome; |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 3297 | if (!chip->ecc.read_page_raw) |
| 3298 | chip->ecc.read_page_raw = nand_read_page_raw_syndrome; |
| 3299 | if (!chip->ecc.write_page_raw) |
| 3300 | chip->ecc.write_page_raw = nand_write_page_raw_syndrome; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 3301 | if (!chip->ecc.read_oob) |
| 3302 | chip->ecc.read_oob = nand_read_oob_syndrome; |
| 3303 | if (!chip->ecc.write_oob) |
| 3304 | chip->ecc.write_oob = nand_write_oob_syndrome; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 3305 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3306 | if (mtd->writesize >= chip->ecc.size) |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 3307 | break; |
| 3308 | printk(KERN_WARNING "%d byte HW ECC not possible on " |
| 3309 | "%d byte page size, fallback to SW ECC\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3310 | chip->ecc.size, mtd->writesize); |
| 3311 | chip->ecc.mode = NAND_ECC_SOFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3312 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 3313 | case NAND_ECC_SOFT: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3314 | chip->ecc.calculate = nand_calculate_ecc; |
| 3315 | chip->ecc.correct = nand_correct_data; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 3316 | chip->ecc.read_page = nand_read_page_swecc; |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 3317 | chip->ecc.read_subpage = nand_read_subpage; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 3318 | chip->ecc.write_page = nand_write_page_swecc; |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 3319 | chip->ecc.read_page_raw = nand_read_page_raw; |
| 3320 | chip->ecc.write_page_raw = nand_write_page_raw; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 3321 | chip->ecc.read_oob = nand_read_oob_std; |
| 3322 | chip->ecc.write_oob = nand_write_oob_std; |
Singh, Vimal | 9a73290 | 2008-12-12 00:10:57 +0000 | [diff] [blame] | 3323 | if (!chip->ecc.size) |
| 3324 | chip->ecc.size = 256; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3325 | chip->ecc.bytes = 3; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3326 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3327 | |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 3328 | case NAND_ECC_SOFT_BCH: |
| 3329 | if (!mtd_nand_has_bch()) { |
| 3330 | printk(KERN_WARNING "CONFIG_MTD_ECC_BCH not enabled\n"); |
| 3331 | BUG(); |
| 3332 | } |
| 3333 | chip->ecc.calculate = nand_bch_calculate_ecc; |
| 3334 | chip->ecc.correct = nand_bch_correct_data; |
| 3335 | chip->ecc.read_page = nand_read_page_swecc; |
| 3336 | chip->ecc.read_subpage = nand_read_subpage; |
| 3337 | chip->ecc.write_page = nand_write_page_swecc; |
| 3338 | chip->ecc.read_page_raw = nand_read_page_raw; |
| 3339 | chip->ecc.write_page_raw = nand_write_page_raw; |
| 3340 | chip->ecc.read_oob = nand_read_oob_std; |
| 3341 | chip->ecc.write_oob = nand_write_oob_std; |
| 3342 | /* |
| 3343 | * Board driver should supply ecc.size and ecc.bytes values to |
| 3344 | * select how many bits are correctable; see nand_bch_init() |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3345 | * for details. Otherwise, default to 4 bits for large page |
| 3346 | * devices. |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 3347 | */ |
| 3348 | if (!chip->ecc.size && (mtd->oobsize >= 64)) { |
| 3349 | chip->ecc.size = 512; |
| 3350 | chip->ecc.bytes = 7; |
| 3351 | } |
| 3352 | chip->ecc.priv = nand_bch_init(mtd, |
| 3353 | chip->ecc.size, |
| 3354 | chip->ecc.bytes, |
| 3355 | &chip->ecc.layout); |
| 3356 | if (!chip->ecc.priv) { |
| 3357 | printk(KERN_WARNING "BCH ECC initialization failed!\n"); |
| 3358 | BUG(); |
| 3359 | } |
| 3360 | break; |
| 3361 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3362 | case NAND_ECC_NONE: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3363 | printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. " |
| 3364 | "This is not recommended !!\n"); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 3365 | chip->ecc.read_page = nand_read_page_raw; |
| 3366 | chip->ecc.write_page = nand_write_page_raw; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 3367 | chip->ecc.read_oob = nand_read_oob_std; |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 3368 | chip->ecc.read_page_raw = nand_read_page_raw; |
| 3369 | chip->ecc.write_page_raw = nand_write_page_raw; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 3370 | chip->ecc.write_oob = nand_write_oob_std; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3371 | chip->ecc.size = mtd->writesize; |
| 3372 | chip->ecc.bytes = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3373 | break; |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 3374 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3375 | default: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3376 | printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3377 | chip->ecc.mode); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3378 | BUG(); |
| 3379 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3380 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3381 | /* |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 3382 | * The number of bytes available for a client to place data into |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3383 | * the out of band area. |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 3384 | */ |
| 3385 | chip->ecc.layout->oobavail = 0; |
David Brownell | 81d19b0 | 2009-04-21 19:51:20 -0700 | [diff] [blame] | 3386 | for (i = 0; chip->ecc.layout->oobfree[i].length |
| 3387 | && i < ARRAY_SIZE(chip->ecc.layout->oobfree); i++) |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 3388 | chip->ecc.layout->oobavail += |
| 3389 | chip->ecc.layout->oobfree[i].length; |
Vitaly Wool | 1f92267 | 2007-03-06 16:56:34 +0300 | [diff] [blame] | 3390 | mtd->oobavail = chip->ecc.layout->oobavail; |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 3391 | |
| 3392 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3393 | * Set the number of read / write steps for one page depending on ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3394 | * mode. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3395 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3396 | chip->ecc.steps = mtd->writesize / chip->ecc.size; |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 3397 | if (chip->ecc.steps * chip->ecc.size != mtd->writesize) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 3398 | printk(KERN_WARNING "Invalid ecc parameters\n"); |
| 3399 | BUG(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3400 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 3401 | chip->ecc.total = chip->ecc.steps * chip->ecc.bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3402 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3403 | /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 3404 | if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && |
| 3405 | !(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) { |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 3406 | switch (chip->ecc.steps) { |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 3407 | case 2: |
| 3408 | mtd->subpage_sft = 1; |
| 3409 | break; |
| 3410 | case 4: |
| 3411 | case 8: |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 3412 | case 16: |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 3413 | mtd->subpage_sft = 2; |
| 3414 | break; |
| 3415 | } |
| 3416 | } |
| 3417 | chip->subpagesize = mtd->writesize >> mtd->subpage_sft; |
| 3418 | |
Thomas Gleixner | 04bbd0e | 2006-05-25 09:45:29 +0200 | [diff] [blame] | 3419 | /* Initialize state */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3420 | chip->state = FL_READY; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3421 | |
| 3422 | /* De-select the device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3423 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3424 | |
| 3425 | /* Invalidate the pagebuffer reference */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3426 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3427 | |
| 3428 | /* Fill in remaining MTD driver data */ |
| 3429 | mtd->type = MTD_NANDFLASH; |
Maxim Levitsky | 93edbad | 2010-02-22 20:39:40 +0200 | [diff] [blame] | 3430 | mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM : |
| 3431 | MTD_CAP_NANDFLASH; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3432 | mtd->erase = nand_erase; |
| 3433 | mtd->point = NULL; |
| 3434 | mtd->unpoint = NULL; |
| 3435 | mtd->read = nand_read; |
| 3436 | mtd->write = nand_write; |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 3437 | mtd->panic_write = panic_nand_write; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3438 | mtd->read_oob = nand_read_oob; |
| 3439 | mtd->write_oob = nand_write_oob; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3440 | mtd->sync = nand_sync; |
| 3441 | mtd->lock = NULL; |
| 3442 | mtd->unlock = NULL; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 3443 | mtd->suspend = nand_suspend; |
| 3444 | mtd->resume = nand_resume; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3445 | mtd->block_isbad = nand_block_isbad; |
| 3446 | mtd->block_markbad = nand_block_markbad; |
Anatolij Gustschin | cbcab65 | 2010-12-16 23:42:16 +0100 | [diff] [blame] | 3447 | mtd->writebufsize = mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3448 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 3449 | /* propagate ecc.layout to mtd_info */ |
| 3450 | mtd->ecclayout = chip->ecc.layout; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3451 | |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 3452 | /* Check, if we should skip the bad block table scan */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3453 | if (chip->options & NAND_SKIP_BBTSCAN) |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 3454 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3455 | |
| 3456 | /* Build bad block table */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3457 | return chip->scan_bbt(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3458 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3459 | EXPORT_SYMBOL(nand_scan_tail); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3460 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3461 | /* |
| 3462 | * is_module_text_address() isn't exported, and it's mostly a pointless |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3463 | * test if this is a module _anyway_ -- they'd have to try _really_ hard |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3464 | * to call us from in-kernel code if the core NAND support is modular. |
| 3465 | */ |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3466 | #ifdef MODULE |
| 3467 | #define caller_is_module() (1) |
| 3468 | #else |
| 3469 | #define caller_is_module() \ |
Rusty Russell | a6e6abd | 2009-03-31 13:05:31 -0600 | [diff] [blame] | 3470 | is_module_text_address((unsigned long)__builtin_return_address(0)) |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3471 | #endif |
| 3472 | |
| 3473 | /** |
| 3474 | * nand_scan - [NAND Interface] Scan for the NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3475 | * @mtd: MTD device structure |
| 3476 | * @maxchips: number of chips to scan for |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3477 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3478 | * This fills out all the uninitialized function pointers with the defaults. |
| 3479 | * The flash ID is read and the mtd/chip structures are filled with the |
| 3480 | * appropriate values. The mtd->owner field must be set to the module of the |
| 3481 | * caller. |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3482 | */ |
| 3483 | int nand_scan(struct mtd_info *mtd, int maxchips) |
| 3484 | { |
| 3485 | int ret; |
| 3486 | |
| 3487 | /* Many callers got this wrong, so check for it for a while... */ |
| 3488 | if (!mtd->owner && caller_is_module()) { |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 3489 | printk(KERN_CRIT "%s called with NULL mtd->owner!\n", |
| 3490 | __func__); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3491 | BUG(); |
| 3492 | } |
| 3493 | |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3494 | ret = nand_scan_ident(mtd, maxchips, NULL); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3495 | if (!ret) |
| 3496 | ret = nand_scan_tail(mtd); |
| 3497 | return ret; |
| 3498 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3499 | EXPORT_SYMBOL(nand_scan); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3500 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3501 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3502 | * nand_release - [NAND Interface] Free resources held by the NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3503 | * @mtd: MTD device structure |
| 3504 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 3505 | void nand_release(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3506 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3507 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3508 | |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 3509 | if (chip->ecc.mode == NAND_ECC_SOFT_BCH) |
| 3510 | nand_bch_free((struct nand_bch_control *)chip->ecc.priv); |
| 3511 | |
Jamie Iles | 5ffcaf3 | 2011-05-23 10:22:46 +0100 | [diff] [blame] | 3512 | mtd_device_unregister(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3513 | |
Jesper Juhl | fa67164 | 2005-11-07 01:01:27 -0800 | [diff] [blame] | 3514 | /* Free bad block table memory */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3515 | kfree(chip->bbt); |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 3516 | if (!(chip->options & NAND_OWN_BUFFERS)) |
| 3517 | kfree(chip->buffers); |
Brian Norris | 58373ff | 2010-07-15 12:15:44 -0700 | [diff] [blame] | 3518 | |
| 3519 | /* Free bad block descriptor memory */ |
| 3520 | if (chip->badblock_pattern && chip->badblock_pattern->options |
| 3521 | & NAND_BBT_DYNAMICSTRUCT) |
| 3522 | kfree(chip->badblock_pattern); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3523 | } |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 3524 | EXPORT_SYMBOL_GPL(nand_release); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 3525 | |
| 3526 | static int __init nand_base_init(void) |
| 3527 | { |
| 3528 | led_trigger_register_simple("nand-disk", &nand_led_trigger); |
| 3529 | return 0; |
| 3530 | } |
| 3531 | |
| 3532 | static void __exit nand_base_exit(void) |
| 3533 | { |
| 3534 | led_trigger_unregister_simple(nand_led_trigger); |
| 3535 | } |
| 3536 | |
| 3537 | module_init(nand_base_init); |
| 3538 | module_exit(nand_base_exit); |
| 3539 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 3540 | MODULE_LICENSE("GPL"); |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3541 | MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>"); |
| 3542 | MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>"); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 3543 | MODULE_DESCRIPTION("Generic NAND flash driver code"); |