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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / f71077a4d84bbe8c7b91b7db7c4ef815755ac5e3 / . / arch / arc / kernel / asm-offsets.c
blob: 0e884036ab74365a687c8cabfd1ab67fec27bdda [file] [log] [blame]
Thomas Gleixnerd2912cb2019-06-04 10:11:33 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530[diff] [blame]2/*
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530[diff] [blame]4 */
5
6#include <linux/sched.h>
7#include <linux/mm.h>
8#include <linux/interrupt.h>
9#include <linux/thread_info.h>
10#include <linux/kbuild.h>
Sachin Kamat1ec9db12013-03-06 16:53:44 +0530[diff] [blame]11#include <linux/ptrace.h>
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530[diff] [blame]12#include <asm/hardirq.h>
13#include <asm/page.h>
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530[diff] [blame]14
Eugeniy Paltsev7321e2e2020-03-05 23:02:51 +0300[diff] [blame]15
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530[diff] [blame]16int main(void)
17{
18 DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
19 DEFINE(TASK_THREAD_INFO, offsetof(struct task_struct, stack));
20
21 BLANK();
22
23 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
24 DEFINE(THREAD_CALLEE_REG, offsetof(struct thread_struct, callee_reg));
25 DEFINE(THREAD_FAULT_ADDR,
26 offsetof(struct thread_struct, fault_address));
27
28 BLANK();
29
30 DEFINE(THREAD_INFO_FLAGS, offsetof(struct thread_info, flags));
31 DEFINE(THREAD_INFO_PREEMPT_COUNT,
32 offsetof(struct thread_info, preempt_count));
33
34 BLANK();
35
36 DEFINE(TASK_ACT_MM, offsetof(struct task_struct, active_mm));
37 DEFINE(TASK_TGID, offsetof(struct task_struct, tgid));
Ruud Derwig2924cd12014-12-03 15:52:41 +0100[diff] [blame]38 DEFINE(TASK_PID, offsetof(struct task_struct, pid));
39 DEFINE(TASK_COMM, offsetof(struct task_struct, comm));
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530[diff] [blame]40
41 DEFINE(MM_CTXT, offsetof(struct mm_struct, context));
42 DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));
43
44 DEFINE(MM_CTXT_ASID, offsetof(mm_context_t, asid));
45
46 BLANK();
47
48 DEFINE(PT_status32, offsetof(struct pt_regs, status32));
Vineet Gupta502a0c72013-06-11 18:56:54 +0530[diff] [blame]49 DEFINE(PT_event, offsetof(struct pt_regs, event));
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530[diff] [blame]50 DEFINE(PT_sp, offsetof(struct pt_regs, sp));
51 DEFINE(PT_r0, offsetof(struct pt_regs, r0));
52 DEFINE(PT_r1, offsetof(struct pt_regs, r1));
53 DEFINE(PT_r2, offsetof(struct pt_regs, r2));
54 DEFINE(PT_r3, offsetof(struct pt_regs, r3));
55 DEFINE(PT_r4, offsetof(struct pt_regs, r4));
56 DEFINE(PT_r5, offsetof(struct pt_regs, r5));
57 DEFINE(PT_r6, offsetof(struct pt_regs, r6));
58 DEFINE(PT_r7, offsetof(struct pt_regs, r7));
Vineet Guptaa4880802019-05-15 15:36:46 -0700[diff] [blame]59 DEFINE(PT_r8, offsetof(struct pt_regs, r8));
60 DEFINE(PT_r10, offsetof(struct pt_regs, r10));
61 DEFINE(PT_r26, offsetof(struct pt_regs, r26));
Vineet Gupta4255b072014-09-22 16:51:47 +0530[diff] [blame]62 DEFINE(PT_ret, offsetof(struct pt_regs, ret));
Vineet Guptaa4880802019-05-15 15:36:46 -0700[diff] [blame]63 DEFINE(PT_blink, offsetof(struct pt_regs, blink));
64 DEFINE(PT_lpe, offsetof(struct pt_regs, lp_end));
65 DEFINE(PT_lpc, offsetof(struct pt_regs, lp_count));
66 DEFINE(PT_user_r25, offsetof(struct pt_regs, user_r25));
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530[diff] [blame]67
Vineet Gupta16f9afe2013-05-27 21:43:41 +0530[diff] [blame]68 DEFINE(SZ_CALLEE_REGS, sizeof(struct callee_regs));
Vineet Gupta359105b2013-05-28 13:50:41 +0530[diff] [blame]69 DEFINE(SZ_PT_REGS, sizeof(struct pt_regs));
Vineet Gupta0d7b8852014-10-07 14:12:13 +0530[diff] [blame]70
Eugeniy Paltsev7ecc6c12019-12-27 21:03:43 +0300[diff] [blame]71#ifdef CONFIG_ISA_ARCV2
72 OFFSET(PT_r12, pt_regs, r12);
73 OFFSET(PT_r30, pt_regs, r30);
74#endif
75#ifdef CONFIG_ARC_HAS_ACCL_REGS
76 OFFSET(PT_r58, pt_regs, r58);
77 OFFSET(PT_r59, pt_regs, r59);
78#endif
Eugeniy Paltsev7321e2e2020-03-05 23:02:51 +0300[diff] [blame]79#ifdef CONFIG_ARC_DSP_SAVE_RESTORE_REGS
80 OFFSET(PT_DSP_CTRL, pt_regs, DSP_CTRL);
81#endif
Eugeniy Paltsev7ecc6c12019-12-27 21:03:43 +0300[diff] [blame]82
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530[diff] [blame]83 return 0;
84}