blob: ff8170dbbc3c3e2ca2c5ed17cd682c2c87a98836 [file] [log] [blame]
Thomas Gleixnerd2912cb2019-06-04 10:11:33 +02001// SPDX-License-Identifier: GPL-2.0-only
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +02002/*
3 * Copyright (c) 2017 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +02004 */
5
Peng Fan79806d32021-05-06 12:08:43 +08006#include <linux/arm-smccc.h>
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +02007#include <linux/clk.h>
8#include <linux/err.h>
9#include <linux/interrupt.h>
10#include <linux/kernel.h>
Peng Fan2df70622021-03-06 19:24:25 +080011#include <linux/mailbox_client.h>
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +020012#include <linux/mfd/syscon.h>
13#include <linux/module.h>
14#include <linux/of_address.h>
Peng Fanb29b4242021-03-06 19:24:22 +080015#include <linux/of_reserved_mem.h>
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +020016#include <linux/of_device.h>
17#include <linux/platform_device.h>
18#include <linux/regmap.h>
19#include <linux/remoteproc.h>
Peng Fan2df70622021-03-06 19:24:25 +080020#include <linux/workqueue.h>
21
Shengjiu Wangebcd5d52021-10-11 17:20:12 +080022#include "imx_rproc.h"
Peng Fan2df70622021-03-06 19:24:25 +080023#include "remoteproc_internal.h"
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +020024
25#define IMX7D_SRC_SCR 0x0C
26#define IMX7D_ENABLE_M4 BIT(3)
27#define IMX7D_SW_M4P_RST BIT(2)
28#define IMX7D_SW_M4C_RST BIT(1)
29#define IMX7D_SW_M4C_NON_SCLR_RST BIT(0)
30
31#define IMX7D_M4_RST_MASK (IMX7D_ENABLE_M4 | IMX7D_SW_M4P_RST \
32 | IMX7D_SW_M4C_RST \
33 | IMX7D_SW_M4C_NON_SCLR_RST)
34
35#define IMX7D_M4_START (IMX7D_ENABLE_M4 | IMX7D_SW_M4P_RST \
36 | IMX7D_SW_M4C_RST)
37#define IMX7D_M4_STOP IMX7D_SW_M4C_NON_SCLR_RST
38
39/* Address: 0x020D8000 */
40#define IMX6SX_SRC_SCR 0x00
41#define IMX6SX_ENABLE_M4 BIT(22)
42#define IMX6SX_SW_M4P_RST BIT(12)
43#define IMX6SX_SW_M4C_NON_SCLR_RST BIT(4)
44#define IMX6SX_SW_M4C_RST BIT(3)
45
46#define IMX6SX_M4_START (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST \
47 | IMX6SX_SW_M4C_RST)
48#define IMX6SX_M4_STOP IMX6SX_SW_M4C_NON_SCLR_RST
49#define IMX6SX_M4_RST_MASK (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST \
50 | IMX6SX_SW_M4C_NON_SCLR_RST \
51 | IMX6SX_SW_M4C_RST)
52
Peng Fanf638a192021-04-08 09:44:47 +080053#define IMX_RPROC_MEM_MAX 32
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +020054
Peng Fan79806d32021-05-06 12:08:43 +080055#define IMX_SIP_RPROC 0xC2000005
56#define IMX_SIP_RPROC_START 0x00
57#define IMX_SIP_RPROC_STARTED 0x01
58#define IMX_SIP_RPROC_STOP 0x02
59
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +020060/**
61 * struct imx_rproc_mem - slim internal memory structure
62 * @cpu_addr: MPU virtual address of the memory region
63 * @sys_addr: Bus address used to access the memory region
64 * @size: Size of the memory region
65 */
66struct imx_rproc_mem {
67 void __iomem *cpu_addr;
68 phys_addr_t sys_addr;
69 size_t size;
70};
71
72/* att flags */
73/* M4 own area. Can be mapped at probe */
74#define ATT_OWN BIT(1)
Dong Aisheng91bb2662021-09-10 17:06:18 +080075#define ATT_IOMEM BIT(2)
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +020076
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +020077struct imx_rproc {
78 struct device *dev;
79 struct regmap *regmap;
80 struct rproc *rproc;
81 const struct imx_rproc_dcfg *dcfg;
Peng Fanf638a192021-04-08 09:44:47 +080082 struct imx_rproc_mem mem[IMX_RPROC_MEM_MAX];
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +020083 struct clk *clk;
Peng Fan2df70622021-03-06 19:24:25 +080084 struct mbox_client cl;
85 struct mbox_chan *tx_ch;
86 struct mbox_chan *rx_ch;
87 struct work_struct rproc_work;
88 struct workqueue_struct *workqueue;
Peng Fan5e4c1242021-04-08 09:44:49 +080089 void __iomem *rsc_table;
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +020090};
91
Peng Fan79806d32021-05-06 12:08:43 +080092static const struct imx_rproc_att imx_rproc_att_imx8mn[] = {
93 /* dev addr , sys addr , size , flags */
94 /* ITCM */
Dong Aisheng91bb2662021-09-10 17:06:18 +080095 { 0x00000000, 0x007E0000, 0x00020000, ATT_OWN | ATT_IOMEM },
Peng Fan79806d32021-05-06 12:08:43 +080096 /* OCRAM_S */
97 { 0x00180000, 0x00180000, 0x00009000, 0 },
98 /* OCRAM */
99 { 0x00900000, 0x00900000, 0x00020000, 0 },
100 /* OCRAM */
101 { 0x00920000, 0x00920000, 0x00020000, 0 },
102 /* OCRAM */
103 { 0x00940000, 0x00940000, 0x00050000, 0 },
104 /* QSPI Code - alias */
105 { 0x08000000, 0x08000000, 0x08000000, 0 },
106 /* DDR (Code) - alias */
107 { 0x10000000, 0x40000000, 0x0FFE0000, 0 },
108 /* DTCM */
Dong Aisheng91bb2662021-09-10 17:06:18 +0800109 { 0x20000000, 0x00800000, 0x00020000, ATT_OWN | ATT_IOMEM },
Peng Fan79806d32021-05-06 12:08:43 +0800110 /* OCRAM_S - alias */
111 { 0x20180000, 0x00180000, 0x00008000, ATT_OWN },
112 /* OCRAM */
113 { 0x20200000, 0x00900000, 0x00020000, ATT_OWN },
114 /* OCRAM */
115 { 0x20220000, 0x00920000, 0x00020000, ATT_OWN },
116 /* OCRAM */
117 { 0x20240000, 0x00940000, 0x00040000, ATT_OWN },
118 /* DDR (Data) */
119 { 0x40000000, 0x40000000, 0x80000000, 0 },
120};
121
Peng Fan4ab8f962021-03-06 19:24:23 +0800122static const struct imx_rproc_att imx_rproc_att_imx8mq[] = {
123 /* dev addr , sys addr , size , flags */
124 /* TCML - alias */
Dong Aisheng91bb2662021-09-10 17:06:18 +0800125 { 0x00000000, 0x007e0000, 0x00020000, ATT_IOMEM},
Peng Fan4ab8f962021-03-06 19:24:23 +0800126 /* OCRAM_S */
127 { 0x00180000, 0x00180000, 0x00008000, 0 },
128 /* OCRAM */
129 { 0x00900000, 0x00900000, 0x00020000, 0 },
130 /* OCRAM */
131 { 0x00920000, 0x00920000, 0x00020000, 0 },
132 /* QSPI Code - alias */
133 { 0x08000000, 0x08000000, 0x08000000, 0 },
134 /* DDR (Code) - alias */
135 { 0x10000000, 0x80000000, 0x0FFE0000, 0 },
136 /* TCML */
Dong Aisheng91bb2662021-09-10 17:06:18 +0800137 { 0x1FFE0000, 0x007E0000, 0x00020000, ATT_OWN | ATT_IOMEM},
Peng Fan4ab8f962021-03-06 19:24:23 +0800138 /* TCMU */
Dong Aisheng91bb2662021-09-10 17:06:18 +0800139 { 0x20000000, 0x00800000, 0x00020000, ATT_OWN | ATT_IOMEM},
Peng Fan4ab8f962021-03-06 19:24:23 +0800140 /* OCRAM_S */
141 { 0x20180000, 0x00180000, 0x00008000, ATT_OWN },
142 /* OCRAM */
143 { 0x20200000, 0x00900000, 0x00020000, ATT_OWN },
144 /* OCRAM */
145 { 0x20220000, 0x00920000, 0x00020000, ATT_OWN },
146 /* DDR (Data) */
147 { 0x40000000, 0x40000000, 0x80000000, 0 },
148};
149
Peng Fand59eedc2021-06-22 14:01:48 +0800150static const struct imx_rproc_att imx_rproc_att_imx8ulp[] = {
151 {0x1FFC0000, 0x1FFC0000, 0xC0000, ATT_OWN},
152 {0x21000000, 0x21000000, 0x10000, ATT_OWN},
153 {0x80000000, 0x80000000, 0x60000000, 0}
154};
155
Peng Fanc8a1a562021-05-06 12:08:42 +0800156static const struct imx_rproc_att imx_rproc_att_imx7ulp[] = {
157 {0x1FFD0000, 0x1FFD0000, 0x30000, ATT_OWN},
158 {0x20000000, 0x20000000, 0x10000, ATT_OWN},
159 {0x2F000000, 0x2F000000, 0x20000, ATT_OWN},
160 {0x2F020000, 0x2F020000, 0x20000, ATT_OWN},
161 {0x60000000, 0x60000000, 0x40000000, 0}
162};
163
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200164static const struct imx_rproc_att imx_rproc_att_imx7d[] = {
165 /* dev addr , sys addr , size , flags */
166 /* OCRAM_S (M4 Boot code) - alias */
167 { 0x00000000, 0x00180000, 0x00008000, 0 },
168 /* OCRAM_S (Code) */
169 { 0x00180000, 0x00180000, 0x00008000, ATT_OWN },
170 /* OCRAM (Code) - alias */
171 { 0x00900000, 0x00900000, 0x00020000, 0 },
172 /* OCRAM_EPDC (Code) - alias */
173 { 0x00920000, 0x00920000, 0x00020000, 0 },
174 /* OCRAM_PXP (Code) - alias */
175 { 0x00940000, 0x00940000, 0x00008000, 0 },
176 /* TCML (Code) */
Dong Aisheng91bb2662021-09-10 17:06:18 +0800177 { 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN | ATT_IOMEM },
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200178 /* DDR (Code) - alias, first part of DDR (Data) */
179 { 0x10000000, 0x80000000, 0x0FFF0000, 0 },
180
181 /* TCMU (Data) */
Dong Aisheng91bb2662021-09-10 17:06:18 +0800182 { 0x20000000, 0x00800000, 0x00008000, ATT_OWN | ATT_IOMEM },
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200183 /* OCRAM (Data) */
184 { 0x20200000, 0x00900000, 0x00020000, 0 },
185 /* OCRAM_EPDC (Data) */
186 { 0x20220000, 0x00920000, 0x00020000, 0 },
187 /* OCRAM_PXP (Data) */
188 { 0x20240000, 0x00940000, 0x00008000, 0 },
189 /* DDR (Data) */
190 { 0x80000000, 0x80000000, 0x60000000, 0 },
191};
192
193static const struct imx_rproc_att imx_rproc_att_imx6sx[] = {
194 /* dev addr , sys addr , size , flags */
195 /* TCML (M4 Boot Code) - alias */
Dong Aisheng91bb2662021-09-10 17:06:18 +0800196 { 0x00000000, 0x007F8000, 0x00008000, ATT_IOMEM },
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200197 /* OCRAM_S (Code) */
198 { 0x00180000, 0x008F8000, 0x00004000, 0 },
199 /* OCRAM_S (Code) - alias */
200 { 0x00180000, 0x008FC000, 0x00004000, 0 },
201 /* TCML (Code) */
Dong Aisheng91bb2662021-09-10 17:06:18 +0800202 { 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN | ATT_IOMEM },
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200203 /* DDR (Code) - alias, first part of DDR (Data) */
204 { 0x10000000, 0x80000000, 0x0FFF8000, 0 },
205
206 /* TCMU (Data) */
Dong Aisheng91bb2662021-09-10 17:06:18 +0800207 { 0x20000000, 0x00800000, 0x00008000, ATT_OWN | ATT_IOMEM },
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200208 /* OCRAM_S (Data) - alias? */
209 { 0x208F8000, 0x008F8000, 0x00004000, 0 },
210 /* DDR (Data) */
211 { 0x80000000, 0x80000000, 0x60000000, 0 },
212};
213
Peng Fan79806d32021-05-06 12:08:43 +0800214static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn = {
215 .att = imx_rproc_att_imx8mn,
216 .att_size = ARRAY_SIZE(imx_rproc_att_imx8mn),
217 .method = IMX_RPROC_SMC,
218};
219
Peng Fan4ab8f962021-03-06 19:24:23 +0800220static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = {
221 .src_reg = IMX7D_SRC_SCR,
222 .src_mask = IMX7D_M4_RST_MASK,
223 .src_start = IMX7D_M4_START,
224 .src_stop = IMX7D_M4_STOP,
225 .att = imx_rproc_att_imx8mq,
226 .att_size = ARRAY_SIZE(imx_rproc_att_imx8mq),
Peng Fan52bda8d2021-05-06 12:08:40 +0800227 .method = IMX_RPROC_MMIO,
Peng Fan4ab8f962021-03-06 19:24:23 +0800228};
229
Peng Fand59eedc2021-06-22 14:01:48 +0800230static const struct imx_rproc_dcfg imx_rproc_cfg_imx8ulp = {
231 .att = imx_rproc_att_imx8ulp,
232 .att_size = ARRAY_SIZE(imx_rproc_att_imx8ulp),
233 .method = IMX_RPROC_NONE,
234};
235
Peng Fanc8a1a562021-05-06 12:08:42 +0800236static const struct imx_rproc_dcfg imx_rproc_cfg_imx7ulp = {
237 .att = imx_rproc_att_imx7ulp,
238 .att_size = ARRAY_SIZE(imx_rproc_att_imx7ulp),
239 .method = IMX_RPROC_NONE,
240};
241
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200242static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = {
243 .src_reg = IMX7D_SRC_SCR,
244 .src_mask = IMX7D_M4_RST_MASK,
245 .src_start = IMX7D_M4_START,
246 .src_stop = IMX7D_M4_STOP,
247 .att = imx_rproc_att_imx7d,
248 .att_size = ARRAY_SIZE(imx_rproc_att_imx7d),
Peng Fan52bda8d2021-05-06 12:08:40 +0800249 .method = IMX_RPROC_MMIO,
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200250};
251
252static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = {
253 .src_reg = IMX6SX_SRC_SCR,
254 .src_mask = IMX6SX_M4_RST_MASK,
255 .src_start = IMX6SX_M4_START,
256 .src_stop = IMX6SX_M4_STOP,
257 .att = imx_rproc_att_imx6sx,
258 .att_size = ARRAY_SIZE(imx_rproc_att_imx6sx),
Peng Fan52bda8d2021-05-06 12:08:40 +0800259 .method = IMX_RPROC_MMIO,
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200260};
261
262static int imx_rproc_start(struct rproc *rproc)
263{
264 struct imx_rproc *priv = rproc->priv;
265 const struct imx_rproc_dcfg *dcfg = priv->dcfg;
266 struct device *dev = priv->dev;
Peng Fan79806d32021-05-06 12:08:43 +0800267 struct arm_smccc_res res;
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200268 int ret;
269
Peng Fan79806d32021-05-06 12:08:43 +0800270 switch (dcfg->method) {
271 case IMX_RPROC_MMIO:
272 ret = regmap_update_bits(priv->regmap, dcfg->src_reg, dcfg->src_mask,
273 dcfg->src_start);
274 break;
275 case IMX_RPROC_SMC:
276 arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_START, 0, 0, 0, 0, 0, 0, &res);
277 ret = res.a0;
278 break;
279 default:
280 return -EOPNOTSUPP;
281 }
282
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200283 if (ret)
Peng Fan79806d32021-05-06 12:08:43 +0800284 dev_err(dev, "Failed to enable remote core!\n");
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200285
286 return ret;
287}
288
289static int imx_rproc_stop(struct rproc *rproc)
290{
291 struct imx_rproc *priv = rproc->priv;
292 const struct imx_rproc_dcfg *dcfg = priv->dcfg;
293 struct device *dev = priv->dev;
Peng Fan79806d32021-05-06 12:08:43 +0800294 struct arm_smccc_res res;
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200295 int ret;
296
Peng Fan79806d32021-05-06 12:08:43 +0800297 switch (dcfg->method) {
298 case IMX_RPROC_MMIO:
299 ret = regmap_update_bits(priv->regmap, dcfg->src_reg, dcfg->src_mask,
300 dcfg->src_stop);
301 break;
302 case IMX_RPROC_SMC:
303 arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_STOP, 0, 0, 0, 0, 0, 0, &res);
304 ret = res.a0;
305 if (res.a1)
306 dev_info(dev, "Not in wfi, force stopped\n");
307 break;
308 default:
Peng Fanc8a1a562021-05-06 12:08:42 +0800309 return -EOPNOTSUPP;
Peng Fan79806d32021-05-06 12:08:43 +0800310 }
Peng Fanc8a1a562021-05-06 12:08:42 +0800311
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200312 if (ret)
Peng Fan79806d32021-05-06 12:08:43 +0800313 dev_err(dev, "Failed to stop remote core\n");
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200314
315 return ret;
316}
317
318static int imx_rproc_da_to_sys(struct imx_rproc *priv, u64 da,
Dong Aisheng91bb2662021-09-10 17:06:18 +0800319 size_t len, u64 *sys, bool *is_iomem)
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200320{
321 const struct imx_rproc_dcfg *dcfg = priv->dcfg;
322 int i;
323
324 /* parse address translation table */
325 for (i = 0; i < dcfg->att_size; i++) {
326 const struct imx_rproc_att *att = &dcfg->att[i];
327
328 if (da >= att->da && da + len < att->da + att->size) {
329 unsigned int offset = da - att->da;
330
331 *sys = att->sa + offset;
Dong Aisheng91bb2662021-09-10 17:06:18 +0800332 if (is_iomem)
333 *is_iomem = att->flags & ATT_IOMEM;
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200334 return 0;
335 }
336 }
337
Clement Leger9ce3bf22020-03-02 10:38:55 +0100338 dev_warn(priv->dev, "Translation failed: da = 0x%llx len = 0x%zx\n",
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200339 da, len);
340 return -ENOENT;
341}
342
Peng Fan40df0a92021-03-06 19:24:19 +0800343static void *imx_rproc_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200344{
345 struct imx_rproc *priv = rproc->priv;
346 void *va = NULL;
347 u64 sys;
348 int i;
349
Clement Leger9ce3bf22020-03-02 10:38:55 +0100350 if (len == 0)
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200351 return NULL;
352
353 /*
354 * On device side we have many aliases, so we need to convert device
355 * address (M4) to system bus address first.
356 */
Dong Aisheng91bb2662021-09-10 17:06:18 +0800357 if (imx_rproc_da_to_sys(priv, da, len, &sys, is_iomem))
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200358 return NULL;
359
Peng Fanf638a192021-04-08 09:44:47 +0800360 for (i = 0; i < IMX_RPROC_MEM_MAX; i++) {
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200361 if (sys >= priv->mem[i].sys_addr && sys + len <
362 priv->mem[i].sys_addr + priv->mem[i].size) {
363 unsigned int offset = sys - priv->mem[i].sys_addr;
364 /* __force to make sparse happy with type conversion */
365 va = (__force void *)(priv->mem[i].cpu_addr + offset);
366 break;
367 }
368 }
369
Clement Leger9ce3bf22020-03-02 10:38:55 +0100370 dev_dbg(&rproc->dev, "da = 0x%llx len = 0x%zx va = 0x%p\n",
371 da, len, va);
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200372
373 return va;
374}
375
Peng Fanb29b4242021-03-06 19:24:22 +0800376static int imx_rproc_mem_alloc(struct rproc *rproc,
377 struct rproc_mem_entry *mem)
378{
379 struct device *dev = rproc->dev.parent;
380 void *va;
381
382 dev_dbg(dev, "map memory: %p+%zx\n", &mem->dma, mem->len);
383 va = ioremap_wc(mem->dma, mem->len);
384 if (IS_ERR_OR_NULL(va)) {
385 dev_err(dev, "Unable to map memory region: %p+%zx\n",
386 &mem->dma, mem->len);
387 return -ENOMEM;
388 }
389
390 /* Update memory entry va */
391 mem->va = va;
392
393 return 0;
394}
395
396static int imx_rproc_mem_release(struct rproc *rproc,
397 struct rproc_mem_entry *mem)
398{
399 dev_dbg(rproc->dev.parent, "unmap memory: %pa\n", &mem->dma);
400 iounmap(mem->va);
401
402 return 0;
403}
404
Peng Fan10a3d402021-04-08 09:44:48 +0800405static int imx_rproc_prepare(struct rproc *rproc)
Peng Fanb29b4242021-03-06 19:24:22 +0800406{
407 struct imx_rproc *priv = rproc->priv;
408 struct device_node *np = priv->dev->of_node;
409 struct of_phandle_iterator it;
410 struct rproc_mem_entry *mem;
411 struct reserved_mem *rmem;
412 u32 da;
413
414 /* Register associated reserved memory regions */
415 of_phandle_iterator_init(&it, np, "memory-region", NULL, 0);
416 while (of_phandle_iterator_next(&it) == 0) {
417 /*
418 * Ignore the first memory region which will be used vdev buffer.
419 * No need to do extra handlings, rproc_add_virtio_dev will handle it.
420 */
421 if (!strcmp(it.node->name, "vdev0buffer"))
422 continue;
423
424 rmem = of_reserved_mem_lookup(it.node);
425 if (!rmem) {
426 dev_err(priv->dev, "unable to acquire memory-region\n");
427 return -EINVAL;
428 }
429
430 /* No need to translate pa to da, i.MX use same map */
431 da = rmem->base;
432
433 /* Register memory region */
434 mem = rproc_mem_entry_init(priv->dev, NULL, (dma_addr_t)rmem->base, rmem->size, da,
435 imx_rproc_mem_alloc, imx_rproc_mem_release,
436 it.node->name);
437
438 if (mem)
439 rproc_coredump_add_segment(rproc, da, rmem->size);
440 else
441 return -ENOMEM;
442
443 rproc_add_carveout(rproc, mem);
444 }
445
446 return 0;
447}
448
449static int imx_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
450{
Peng Fan10a3d402021-04-08 09:44:48 +0800451 int ret;
Peng Fanb29b4242021-03-06 19:24:22 +0800452
453 ret = rproc_elf_load_rsc_table(rproc, fw);
454 if (ret)
455 dev_info(&rproc->dev, "No resource table in elf\n");
456
457 return 0;
458}
459
Peng Fan2df70622021-03-06 19:24:25 +0800460static void imx_rproc_kick(struct rproc *rproc, int vqid)
461{
462 struct imx_rproc *priv = rproc->priv;
463 int err;
464 __u32 mmsg;
465
466 if (!priv->tx_ch) {
467 dev_err(priv->dev, "No initialized mbox tx channel\n");
468 return;
469 }
470
471 /*
472 * Send the index of the triggered virtqueue as the mu payload.
473 * Let remote processor know which virtqueue is used.
474 */
475 mmsg = vqid << 16;
476
477 err = mbox_send_message(priv->tx_ch, (void *)&mmsg);
478 if (err < 0)
479 dev_err(priv->dev, "%s: failed (%d, err:%d)\n",
480 __func__, vqid, err);
481}
482
Peng Fan5e4c1242021-04-08 09:44:49 +0800483static int imx_rproc_attach(struct rproc *rproc)
484{
485 return 0;
486}
487
488static struct resource_table *imx_rproc_get_loaded_rsc_table(struct rproc *rproc, size_t *table_sz)
489{
490 struct imx_rproc *priv = rproc->priv;
491
492 /* The resource table has already been mapped in imx_rproc_addr_init */
493 if (!priv->rsc_table)
494 return NULL;
495
496 *table_sz = SZ_1K;
497 return (struct resource_table *)priv->rsc_table;
498}
499
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200500static const struct rproc_ops imx_rproc_ops = {
Peng Fan10a3d402021-04-08 09:44:48 +0800501 .prepare = imx_rproc_prepare,
Peng Fan5e4c1242021-04-08 09:44:49 +0800502 .attach = imx_rproc_attach,
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200503 .start = imx_rproc_start,
504 .stop = imx_rproc_stop,
Peng Fan2df70622021-03-06 19:24:25 +0800505 .kick = imx_rproc_kick,
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200506 .da_to_va = imx_rproc_da_to_va,
Peng Fanb29b4242021-03-06 19:24:22 +0800507 .load = rproc_elf_load_segments,
508 .parse_fw = imx_rproc_parse_fw,
509 .find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table,
Peng Fan5e4c1242021-04-08 09:44:49 +0800510 .get_loaded_rsc_table = imx_rproc_get_loaded_rsc_table,
Peng Fanb29b4242021-03-06 19:24:22 +0800511 .sanity_check = rproc_elf_sanity_check,
512 .get_boot_addr = rproc_elf_get_boot_addr,
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200513};
514
515static int imx_rproc_addr_init(struct imx_rproc *priv,
516 struct platform_device *pdev)
517{
518 const struct imx_rproc_dcfg *dcfg = priv->dcfg;
519 struct device *dev = &pdev->dev;
520 struct device_node *np = dev->of_node;
521 int a, b = 0, err, nph;
522
523 /* remap required addresses */
524 for (a = 0; a < dcfg->att_size; a++) {
525 const struct imx_rproc_att *att = &dcfg->att[a];
526
527 if (!(att->flags & ATT_OWN))
528 continue;
529
Peng Fanf638a192021-04-08 09:44:47 +0800530 if (b >= IMX_RPROC_MEM_MAX)
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200531 break;
532
Dong Aisheng91bb2662021-09-10 17:06:18 +0800533 if (att->flags & ATT_IOMEM)
534 priv->mem[b].cpu_addr = devm_ioremap(&pdev->dev,
535 att->sa, att->size);
536 else
537 priv->mem[b].cpu_addr = devm_ioremap_wc(&pdev->dev,
538 att->sa, att->size);
Wei Yongjun68a39a32017-10-11 10:48:44 +0000539 if (!priv->mem[b].cpu_addr) {
Peng Fan1896b3d2021-03-06 19:24:20 +0800540 dev_err(dev, "failed to remap %#x bytes from %#x\n", att->size, att->sa);
Wei Yongjun68a39a32017-10-11 10:48:44 +0000541 return -ENOMEM;
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200542 }
543 priv->mem[b].sys_addr = att->sa;
544 priv->mem[b].size = att->size;
545 b++;
546 }
547
548 /* memory-region is optional property */
549 nph = of_count_phandle_with_args(np, "memory-region", NULL);
550 if (nph <= 0)
551 return 0;
552
553 /* remap optional addresses */
554 for (a = 0; a < nph; a++) {
555 struct device_node *node;
556 struct resource res;
557
558 node = of_parse_phandle(np, "memory-region", a);
Dong Aishengafe670e2021-09-10 17:06:19 +0800559 /* Not map vdevbuffer, vdevring region */
560 if (!strncmp(node->name, "vdev", strlen("vdev")))
Peng Fan8f2d8962021-03-06 19:24:24 +0800561 continue;
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200562 err = of_address_to_resource(node, 0, &res);
563 if (err) {
564 dev_err(dev, "unable to resolve memory region\n");
565 return err;
566 }
567
Peng Fan6e962bf2021-04-08 09:44:46 +0800568 of_node_put(node);
569
Peng Fanf638a192021-04-08 09:44:47 +0800570 if (b >= IMX_RPROC_MEM_MAX)
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200571 break;
572
Peng Fanecadcc42021-03-06 19:24:21 +0800573 /* Not use resource version, because we might share region */
Dong Aisheng28d55542021-09-10 17:06:21 +0800574 priv->mem[b].cpu_addr = devm_ioremap_wc(&pdev->dev, res.start, resource_size(&res));
Wei Yongjun18cda802021-03-12 08:04:20 +0000575 if (!priv->mem[b].cpu_addr) {
Peng Fan1896b3d2021-03-06 19:24:20 +0800576 dev_err(dev, "failed to remap %pr\n", &res);
Wei Yongjun18cda802021-03-12 08:04:20 +0000577 return -ENOMEM;
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200578 }
579 priv->mem[b].sys_addr = res.start;
580 priv->mem[b].size = resource_size(&res);
Dong Aishenge90547d2021-09-10 17:06:20 +0800581 if (!strcmp(node->name, "rsc-table"))
Peng Fan5e4c1242021-04-08 09:44:49 +0800582 priv->rsc_table = priv->mem[b].cpu_addr;
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200583 b++;
584 }
585
586 return 0;
587}
588
Peng Fan2df70622021-03-06 19:24:25 +0800589static void imx_rproc_vq_work(struct work_struct *work)
590{
591 struct imx_rproc *priv = container_of(work, struct imx_rproc,
592 rproc_work);
593
594 rproc_vq_interrupt(priv->rproc, 0);
595 rproc_vq_interrupt(priv->rproc, 1);
596}
597
598static void imx_rproc_rx_callback(struct mbox_client *cl, void *msg)
599{
600 struct rproc *rproc = dev_get_drvdata(cl->dev);
601 struct imx_rproc *priv = rproc->priv;
602
603 queue_work(priv->workqueue, &priv->rproc_work);
604}
605
606static int imx_rproc_xtr_mbox_init(struct rproc *rproc)
607{
608 struct imx_rproc *priv = rproc->priv;
609 struct device *dev = priv->dev;
610 struct mbox_client *cl;
611 int ret;
612
613 if (!of_get_property(dev->of_node, "mbox-names", NULL))
614 return 0;
615
616 cl = &priv->cl;
617 cl->dev = dev;
618 cl->tx_block = true;
619 cl->tx_tout = 100;
620 cl->knows_txdone = false;
621 cl->rx_callback = imx_rproc_rx_callback;
622
623 priv->tx_ch = mbox_request_channel_byname(cl, "tx");
624 if (IS_ERR(priv->tx_ch)) {
625 ret = PTR_ERR(priv->tx_ch);
626 return dev_err_probe(cl->dev, ret,
627 "failed to request tx mailbox channel: %d\n", ret);
628 }
629
630 priv->rx_ch = mbox_request_channel_byname(cl, "rx");
631 if (IS_ERR(priv->rx_ch)) {
632 mbox_free_channel(priv->tx_ch);
633 ret = PTR_ERR(priv->rx_ch);
634 return dev_err_probe(cl->dev, ret,
635 "failed to request rx mailbox channel: %d\n", ret);
636 }
637
638 return 0;
639}
640
641static void imx_rproc_free_mbox(struct rproc *rproc)
642{
643 struct imx_rproc *priv = rproc->priv;
644
645 mbox_free_channel(priv->tx_ch);
646 mbox_free_channel(priv->rx_ch);
647}
648
Peng Fan5e4c1242021-04-08 09:44:49 +0800649static int imx_rproc_detect_mode(struct imx_rproc *priv)
650{
Peng Fanc8a1a562021-05-06 12:08:42 +0800651 struct regmap_config config = { .name = "imx-rproc" };
Peng Fan5e4c1242021-04-08 09:44:49 +0800652 const struct imx_rproc_dcfg *dcfg = priv->dcfg;
653 struct device *dev = priv->dev;
Peng Fanc8a1a562021-05-06 12:08:42 +0800654 struct regmap *regmap;
Peng Fan79806d32021-05-06 12:08:43 +0800655 struct arm_smccc_res res;
Peng Fan5e4c1242021-04-08 09:44:49 +0800656 int ret;
657 u32 val;
658
Peng Fanc8a1a562021-05-06 12:08:42 +0800659 switch (dcfg->method) {
660 case IMX_RPROC_NONE:
661 priv->rproc->state = RPROC_DETACHED;
662 return 0;
Peng Fan79806d32021-05-06 12:08:43 +0800663 case IMX_RPROC_SMC:
664 arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_STARTED, 0, 0, 0, 0, 0, 0, &res);
665 if (res.a0)
666 priv->rproc->state = RPROC_DETACHED;
667 return 0;
Peng Fanc8a1a562021-05-06 12:08:42 +0800668 default:
669 break;
670 }
671
672 regmap = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon");
673 if (IS_ERR(regmap)) {
674 dev_err(dev, "failed to find syscon\n");
675 return PTR_ERR(regmap);
676 }
677
678 priv->regmap = regmap;
679 regmap_attach_dev(dev, regmap, &config);
680
681 ret = regmap_read(regmap, dcfg->src_reg, &val);
Peng Fan5e4c1242021-04-08 09:44:49 +0800682 if (ret) {
683 dev_err(dev, "Failed to read src\n");
684 return ret;
685 }
686
687 if (!(val & dcfg->src_stop))
688 priv->rproc->state = RPROC_DETACHED;
689
690 return 0;
691}
692
Peng Fancc0316c2021-05-06 12:08:41 +0800693static int imx_rproc_clk_enable(struct imx_rproc *priv)
694{
695 const struct imx_rproc_dcfg *dcfg = priv->dcfg;
696 struct device *dev = priv->dev;
697 int ret;
698
699 /* Remote core is not under control of Linux */
700 if (dcfg->method == IMX_RPROC_NONE)
701 return 0;
702
703 priv->clk = devm_clk_get(dev, NULL);
704 if (IS_ERR(priv->clk)) {
705 dev_err(dev, "Failed to get clock\n");
706 return PTR_ERR(priv->clk);
707 }
708
709 /*
710 * clk for M4 block including memory. Should be
711 * enabled before .start for FW transfer.
712 */
713 ret = clk_prepare_enable(priv->clk);
714 if (ret) {
715 dev_err(dev, "Failed to enable clock\n");
716 return ret;
717 }
718
719 return 0;
720}
721
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200722static int imx_rproc_probe(struct platform_device *pdev)
723{
724 struct device *dev = &pdev->dev;
725 struct device_node *np = dev->of_node;
726 struct imx_rproc *priv;
727 struct rproc *rproc;
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200728 const struct imx_rproc_dcfg *dcfg;
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200729 int ret;
730
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200731 /* set some other name then imx */
732 rproc = rproc_alloc(dev, "imx-rproc", &imx_rproc_ops,
733 NULL, sizeof(*priv));
Christophe JAILLET99a31ad2018-03-14 20:56:39 +0100734 if (!rproc)
735 return -ENOMEM;
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200736
737 dcfg = of_device_get_match_data(dev);
Christophe JAILLETde6f83f2018-03-14 20:56:37 +0100738 if (!dcfg) {
739 ret = -EINVAL;
740 goto err_put_rproc;
741 }
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200742
743 priv = rproc->priv;
744 priv->rproc = rproc;
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200745 priv->dcfg = dcfg;
746 priv->dev = dev;
747
748 dev_set_drvdata(dev, rproc);
Peng Fan2df70622021-03-06 19:24:25 +0800749 priv->workqueue = create_workqueue(dev_name(dev));
750 if (!priv->workqueue) {
751 dev_err(dev, "cannot create workqueue\n");
752 ret = -ENOMEM;
753 goto err_put_rproc;
754 }
755
756 ret = imx_rproc_xtr_mbox_init(rproc);
757 if (ret)
758 goto err_put_wkq;
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200759
760 ret = imx_rproc_addr_init(priv, pdev);
761 if (ret) {
Fabio Estevam16a3c632019-06-03 20:46:28 -0300762 dev_err(dev, "failed on imx_rproc_addr_init\n");
Peng Fan2df70622021-03-06 19:24:25 +0800763 goto err_put_mbox;
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200764 }
765
Peng Fan5e4c1242021-04-08 09:44:49 +0800766 ret = imx_rproc_detect_mode(priv);
767 if (ret)
768 goto err_put_mbox;
769
Peng Fancc0316c2021-05-06 12:08:41 +0800770 ret = imx_rproc_clk_enable(priv);
771 if (ret)
Peng Fan2df70622021-03-06 19:24:25 +0800772 goto err_put_mbox;
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200773
Peng Fan2df70622021-03-06 19:24:25 +0800774 INIT_WORK(&priv->rproc_work, imx_rproc_vq_work);
775
Peng Fane13d1a42021-05-06 12:08:39 +0800776 if (rproc->state != RPROC_DETACHED)
777 rproc->auto_boot = of_property_read_bool(np, "fsl,auto-boot");
778
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200779 ret = rproc_add(rproc);
780 if (ret) {
781 dev_err(dev, "rproc_add failed\n");
782 goto err_put_clk;
783 }
784
Christophe JAILLET99a31ad2018-03-14 20:56:39 +0100785 return 0;
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200786
787err_put_clk:
788 clk_disable_unprepare(priv->clk);
Peng Fan2df70622021-03-06 19:24:25 +0800789err_put_mbox:
790 imx_rproc_free_mbox(rproc);
791err_put_wkq:
792 destroy_workqueue(priv->workqueue);
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200793err_put_rproc:
794 rproc_free(rproc);
Christophe JAILLET99a31ad2018-03-14 20:56:39 +0100795
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200796 return ret;
797}
798
799static int imx_rproc_remove(struct platform_device *pdev)
800{
801 struct rproc *rproc = platform_get_drvdata(pdev);
802 struct imx_rproc *priv = rproc->priv;
803
804 clk_disable_unprepare(priv->clk);
805 rproc_del(rproc);
Peng Fan2df70622021-03-06 19:24:25 +0800806 imx_rproc_free_mbox(rproc);
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200807 rproc_free(rproc);
808
809 return 0;
810}
811
812static const struct of_device_id imx_rproc_of_match[] = {
Peng Fanc8a1a562021-05-06 12:08:42 +0800813 { .compatible = "fsl,imx7ulp-cm4", .data = &imx_rproc_cfg_imx7ulp },
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200814 { .compatible = "fsl,imx7d-cm4", .data = &imx_rproc_cfg_imx7d },
815 { .compatible = "fsl,imx6sx-cm4", .data = &imx_rproc_cfg_imx6sx },
Peng Fan4ab8f962021-03-06 19:24:23 +0800816 { .compatible = "fsl,imx8mq-cm4", .data = &imx_rproc_cfg_imx8mq },
817 { .compatible = "fsl,imx8mm-cm4", .data = &imx_rproc_cfg_imx8mq },
Peng Fan79806d32021-05-06 12:08:43 +0800818 { .compatible = "fsl,imx8mn-cm7", .data = &imx_rproc_cfg_imx8mn },
819 { .compatible = "fsl,imx8mp-cm7", .data = &imx_rproc_cfg_imx8mn },
Peng Fand59eedc2021-06-22 14:01:48 +0800820 { .compatible = "fsl,imx8ulp-cm33", .data = &imx_rproc_cfg_imx8ulp },
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200821 {},
822};
823MODULE_DEVICE_TABLE(of, imx_rproc_of_match);
824
825static struct platform_driver imx_rproc_driver = {
826 .probe = imx_rproc_probe,
827 .remove = imx_rproc_remove,
828 .driver = {
829 .name = "imx-rproc",
830 .of_match_table = imx_rproc_of_match,
831 },
832};
833
834module_platform_driver(imx_rproc_driver);
835
836MODULE_LICENSE("GPL v2");
Peng Fan4ab8f962021-03-06 19:24:23 +0800837MODULE_DESCRIPTION("i.MX remote processor control driver");
Oleksij Rempela0ff4aa62017-08-17 09:15:26 +0200838MODULE_AUTHOR("Oleksij Rempel <o.rempel@pengutronix.de>");